Commit Graph

48 Commits

Author SHA1 Message Date
Manoj Koppolu
70a05f6dae am64x/am243: tamagawa: add global reinit
- add global reinit
- remove redudant code

Fixes: PINDSW-5472

Signed-off-by: Manoj Koppolu <manoj_koppolu@ti.com>
2023-12-20 19:59:36 +05:30
Manoj Koppolu
e79cc36228 am64x/am243: tamagawa: Enable periodic trigger mode for multi-channel
- add multi channel lp pru example
- enable trigger mode

Fixes: PINDSW-5472

Signed-off-by: Manoj Koppolu <manoj_koppolu@ti.com>
2023-12-20 19:58:42 +05:30
Dhaval Khandla
a5f10acb7b am243x/am64x: hdsl: Fix stuffing in learn state
- Data pattern was not correct

Fixes: PINDSW-7129

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-12-19 12:01:57 +05:30
Dhaval Khandla
0324024e00 am243x/am64x: hdsl: Fix reset issue with certain encoders
- Revert commit af129481c2 for free run mode
- Add a separate build macro for SYNC mode

Fixes: PINDSW-7126

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-12-18 18:56:31 +05:30
Dhaval Khandla
047c1db56a am243x/am64x: hdsl: Add a section to place main in beginning of IMEM
- Add a new section for main.asm file
- Fix the build for 225 MHz sync mode firmware

Fixes: PINDSW-7127

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-12-18 18:56:31 +05:30
Dhaval Khandla
18fd4362c8 Pull request #72: am243x: bissc: Refactor the code
Merge in PINDSW/motor_control_sdk from PINDSW-5479_update_bissc to next

* commit 'c5bc321959da60d80ded93ea4a9ce96514edd614':
  am243x: bissc: Refactor the code
2023-12-15 09:54:57 -06:00
Achala Ram
b89b36ccb1 am243x/am64x: Endat: Update register offset
- Update register offset
- Update Multi channel single PRU firmware binary

Fixes: PINDSW-7125

Signed-off-by: Achala Ram <a-ram@ti.com>
2023-12-15 14:45:57 +05:30
Dhaval Khandla
c5bc321959 am243x: bissc: Refactor the code
- Align to coding guidelines
- Remove am243x-evm examples

Fixes: PINDSW-5479

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-12-14 18:06:44 +05:30
Rajul Bhambay
4aa9cfe08d am64x/am243x: hdsl: Fix for multiple sync frequency
- Add frequency support from 8 to 50 KHz
- Add ES value support from 1 to 10

Fixes: PINDSW-7049

Signed-off-by: Rajul Bhambay <r-bhambay@ti.com>
2023-12-07 14:59:38 +05:30
Dhaval Khandla
2c4dd5bfc0 am243x: bissc: Add examples, driver and firmwares
- Add support for single channel
- Add support for multi channel using single PRU
- Add support for multi channel using multiple PRUs with load share mode

Fixes: PINDSW-5468, PINDSW-5479, PINDSW-5488, PINDSW-5494, PINDSW-5495

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-12-04 15:54:58 +05:30
Dhaval Khandla
9fa938d6ae am64x/am243x: hdsl: Fix the clearing behavior of ONLINE STATUS 1 SCE bit
- Fix register corruption during SUM/SSUM update in ONLINE STATUS

Fixes: PINDSW-7048

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-11-09 10:05:53 +05:30
Dhaval Khandla
ccda32786b am64x/am243x: hdsl: Fix SSUM bit in EVENT_S register
- Bit should be set if summary is non-zero

Fixes: PINDSW-6629

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-11-09 10:05:53 +05:30
Dhaval Khandla
54303c850e am64x/am243x: hdsl: Add APIs for long message read and write
- Also update the HDSL_write_pc_buffer API
- Update the SDK example to use updated APIs
- Set bit 7 in PC_ADD_H and PC_OFF_H in firmware for long messages

Fixes: PINDSW-7032

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-11-09 10:05:52 +05:30
Dhaval Khandla
3e7fbec549 am64x/am243x: hdsl: Add support for PIPE_D register
Fixes: PINDSW-7030

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-11-09 10:05:52 +05:30
Dhaval Khandla
2f0a4eed8a am64x/am243x: hdsl: Fix the QM update for safe channel 2
- Remove increment by 1 after CRC check success on safe channel 2 data
- For CRC check failure, decrement by 8

Fixes: PINDSW-6944

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-11-09 10:05:52 +05:30
Dhaval Khandla
35788f6e64 am64x/am243x: hdsl: Fix the reset value of PRST bit in status/event
- Set the bit during initialization for status and event registers
- Unset the bit in status registers after link_check state

Fixes: PINDSW-6628

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-11-09 10:05:52 +05:30
Achala Ram
e30404858c am64x/am243x: EnDat: Add configurable memory support
- Add configurable memory support for encoder info

Fixes: PINDSW-7015

Signed-off-by: Achala Ram <a-ram@ti.com>
2023-10-25 17:16:09 +05:30
Achala Ram
a905b3a21f am64x/am243x: Tamagawa: Update name of defined symbols and include path
- Update include path of icss_regs.inc and icss_cfg_regs.inc files

- Update defined symbols name

Fixes: PINDSW-6931

Signed-off-by: Achala Ram <a-ram@ti.com>
2023-09-20 13:46:02 +05:30
Naresh A
553fbde312 am64x/am243x/am263x: build: Make Release mode as default configuration
Make Release mode as the default configuration for the examples

Fixes: PINDSW-6926

Signed off by: Naresh A <nareshk@ti.com>
2023-09-17 16:30:43 +05:30
Dhaval Khandla
f03a3f1d23 Pull request #26: Update documentation for 9.0 release
Merge in PINDSW/motor_control_sdk from PINDSW-6907_update_docs to next

* commit '1cf4e56faff74ba2d4f999e8f4eff93e4c5bca4b':
  am64x/am243x/am263x: docs: Update block diagram
  am64x/am243x: examples/source: Fix the license text
2023-09-14 07:28:02 -05:00
Rajul Bhambay
af129481c2 am64x/am243x: HDSL: Multi-channel Free-run Mode bugs
- Multiple setups fix
 - Multiple encoders fix

Fixes: PINDSW-6909

Signed-off-by: Rajul Bhambay <r-bhambay@ti.com>
2023-09-14 10:53:13 +05:30
Dhaval Khandla
2d2c5b1b91 am64x/am243x: examples/source: Fix the license text
Fixes: PINDSW-6908

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-09-13 18:46:41 +05:30
Rajul Bhambay
0d9a5d95eb am64x/am243x: HDSL: Multi-channel Sync Mode bugs
- Multiple setups fix
 - Multiple encoders fix

Fixes: PINDSW-6893

Signed-off-by: Rajul Bhambay <r-bhambay@ti.com>
2023-09-13 16:07:23 +05:30
Dhaval Khandla
c52e07cb7b Pull request #22: HDSL: Merge HDSL Examples
Merge in PINDSW/motor_control_sdk from PINDSW-6651_merge_hdsl_examples to next

* commit '47060ba7b13cc305a30560f28d33651a56a74321':
  am64x/am243x: hdsl: Add retry for Udma_ringDequeueRaw if it fails
  am64x/am243x: hdsl: Merge the trace example with the main example
  am243x: hdsl: Set 300 MHz ICSSG core clock frequency fo am243x-lp examples
2023-09-13 04:34:59 -05:00
Rajul Bhambay
2247d9b77b am64x/am243x: HDSL: Multi-channel Sync Mode bugs
- Multiple setups fix
 - Multiple encoders fix

Fixes: PINDSW-6893

Signed-off-by: Rajul Bhambay <r-bhambay@ti.com>
2023-09-13 13:49:29 +05:30
Achala Ram
af61f50a46 am64x/am243x: EnDat: Enable long time test run
- Enable long time test run for position command
- Load all core firmware in load share mode

Fixes: PINDSW-6686

Signed-off-by: Achala Ram <a-ram@ti.com>
2023-09-11 15:44:28 +05:30
Dhaval Khandla
db642b84db am64x/am243x: hdsl: Merge the trace example with the main example
- Update the UART options
- Fix and update the variable names for tracing
- Enable DMA in sysconfig

Fixes: PINDSW-6639, PINDSW-6651

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-09-11 11:47:35 +05:30
Dhaval Khandla
a3cfd189bf Pull request #21: am64x/am243x: hdsl: Remove UART option 16 for long message test
Merge in PINDSW/motor_control_sdk from PINDSW-6641_fix_long_message_test_case to next

* commit 'e0a42c5a8286af60c1570a1c97d66993afd9e14e':
  am64x/am243x: hdsl: Remove UART option 16 for long message test
2023-09-10 23:07:49 -05:00
Dhaval Khandla
e0a42c5a82 am64x/am243x: hdsl: Remove UART option 16 for long message test
- Test case does not have correct pass/fail conditions

Fixes: PINDSW-6641

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-09-07 09:22:10 +05:30
Dhaval Khandla
81850f6662 allsoc: docs: Update the main page of documentation
- Update the text
- Update the block diagram and links
- Add links to IC SDK and MCU+ SDK
- Fix the documentation build warnings

Fixes: PINDSW-6552

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-09-04 13:09:23 +05:30
Dhaval Khandla
3cc1c220cd allsoc: docs: Fix the doxygen groups for API documentation
- Create separate groups for position sense and current sense

Fixes: PINDSW-6632

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-09-04 13:09:22 +05:30
Achala Ram
ed38acdd56 Pull request #13: am64x/am243x: EnDat: remove rx waiting bug
Merge in PINDSW/motor_control_sdk from a0502729_PINDSW-6569_EnDat_release_bug to next

* commit '84de86d58c05d9416377d7cf6c93774b2de0bc44':
  am64x/am243x: EnDat: Resolve rx waiting bug
2023-08-29 06:18:50 -05:00
Achala Ram
84de86d58c am64x/am243x: EnDat: Resolve rx waiting bug
-Resolve rx waiting for channel0 and channel2

Fixes: PINDSW-6569

Signed-off-by: Achala Ram <a-ram@ti.com>
2023-08-29 15:37:07 +05:30
Rajul Bhambay
7f45f14721 am64x/am243x: HDSL: Multi-channel Sync Mode
- 2 channels in Sync mode
 - fix for long msg issue

Fixes: PINDSW-5489, PINDSW-5538

Signed-off-by: Rajul Bhambay <r-bhambay@ti.com>
2023-08-29 15:01:42 +05:30
Dhaval Khandla
7bc9f4f7bf am64x/am243x: hdsl: Update VERSION register definition
- Remove coding field
- Higher 4 bits represent major version
- Update version to 0.5

Fixes: PINDSW-6536

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-27 15:58:23 +05:30
Dhaval Khandla
c1f342479a am64x/am243x: hdsl: Remove maximum deviation related processing
- Remove MAXDEV_H, MAXDEV_L, MAXDEV_H_THRES, MAXDEV_L_THRES from memory map
  in driver
- Fix the typo in register names for threshold registers

Fixes: PINDSW-6543

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-27 15:58:23 +05:30
Achala Ram
34b6260184 am64x/am243: EnDat: Enable periodic trigger mode for multi-channel
- Also fix propagation delay related configuration

Fixes: PINDSW-5681,PINDSW-6533

Signed-off-by: Achala Ram <a-ram@ti.com>
2023-08-25 22:16:39 +05:30
Dhaval Khandla
47b87f5cf7 am64x/am243x: hdsl: Remove SUC instruction usage
- SUC instruction does not work as expected

Fixes: PINDSW-6531

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 17:00:53 +05:30
Dhaval Khandla
0fe32fbc31 am64x/am243x: hdsl: Fix ONLINE_STATUS_1 register corruption
- TEMP_REG1 was being used by QM_ADD and ONLINE STATUS update in
  v-frame processing
- Update version to 0.4

Fixes: PINDSW-6487

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
4f8af91522 am64x/am243x: hdsl: Fix QMLW bits in ONLINE STATUS registers
- Mask was not applied to QM register before checking the low value
- Enable QMLW/POS checks for all H-frames

Fixes: PINDSW-6530

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
dd0d2e356b am64x/am243x: hdsl: Make FREL/FRES bit set sticky in EVENT/EVENT_S
- Firmware should not clear these bits in EVENT/EVENT_S registers
- Update the version to 0.3

Fixes: PINDSW-6526

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
6b8d4c32cc am64x/am243x: hdsl: Fix reset behaviour after triggering manual reset
- Remove HALT instructions
- Clear all registers after reset

Fixes: PINDSW-6492

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
36a591f12b am64x/am243x: hdsl: Add versioning in firmware
- Update the version to 0.2
- Use the VERSION and VERSION2 register
- Remove the hardcoding from driver

Fixes: PINDSW-6518

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
7605041284 am64x/am243x: hdsl: Fix the SUM/SSUM/FIX1 bit configuration in ONLINE STATUS registers
- MASK_SUM should not be used for masking SUMMARY while updating these
  SUM and SSUM bits in ONLINE STATUS registers
- Fix the mask for SCE and VPOS updates

Fixes: PINDSW-6487, PINDSW-6488

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
8d4349c792 am64x/am243x: hdsl: Fix the fast position and velocity calculation
- Fix sign extension in estimator for relative position and acceleration
  addition
- Fix sign estimation for relative position calculation
- Remove an unnecessary RET instruction
- Fix register corruption for ALIGN_PH
- Fix register usage for DTE error signaling

Fixes: PINDSW-5689

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:01 +05:30
Dhaval Khandla
9ac1395d6e am64x/am243x: hdsl: Fix the two most significant bytes of fast position
- Register corruption was causing loss of multi-turn data in fast position

Fixes: PINDSW-5651

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:00 +05:30
Dhaval Khandla
9ce9770c05 am64x/am243x: hdsl: Update the register memory map
- Fix the address of ONLINE STATUS bytes by adding a reserved byte
- Create separate entries for low and high bytes of ONLINE STATUS registers
- Add SAFE_CTRL and POSTX registers
- Use high and low addresses in firmware for ONLINE STATUS registers

Fixes: PINDSW-6489

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2023-08-22 14:40:00 +05:30
Naresh A
206f344bd1 am64x/am243x/am263x : remove motor_control folder from the repository
remove motor_control folder from the repository

Fixes: PINDSW-5635

Signed-off-by: Naresh A <nareshk@ti.com>
2023-07-13 15:23:20 +05:30