Pull request #21: am64x/am243x: hdsl: Remove UART option 16 for long message test
Merge in PINDSW/motor_control_sdk from PINDSW-6641_fix_long_message_test_case to next * commit 'e0a42c5a8286af60c1570a1c97d66993afd9e14e': am64x/am243x: hdsl: Remove UART option 16 for long message test
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commit
a3cfd189bf
@ -370,9 +370,6 @@ void process_request(HDSL_Handle hdslHandle,int menu){
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case MENU_DIRECT_READ_RID0_LENGTH8:
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direct_read_rid0_length8(hdslHandle);
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break;
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case MENU_DIRECT_READ_RID0_LENGTH8_OFFSET6:
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direct_read_rid0_length8_offset6(hdslHandle);
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break;
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case MENU_DIRECT_READ_RID81_LENGTH8:
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direct_read_rid81_length8(hdslHandle);
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break;
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@ -690,7 +687,6 @@ static void display_menu(void)
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DebugP_log("\r\n | %2d : Access on RID 81h, direct read access with length 2 |", MENU_DIRECT_READ_RID81_LENGTH2);
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DebugP_log("\r\n | %2d : Access on RID 0h, indirect write, length 8, with offset 0 |", MENU_INDIRECT_WRITE_RID0_LENGTH8_OFFSET0);
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DebugP_log("\r\n | %2d : Access on RID 0h; indirect write, length 8, without offset value |", MENU_INDIRECT_WRITE_RID0_LENGTH8);
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DebugP_log("\r\n | %2d : Access on RID 0h, direct read, length 8, with offset 6 |", MENU_DIRECT_READ_RID0_LENGTH8_OFFSET6);
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DebugP_log("\r\n |------------------------------------------------------------------------------|\n");
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DebugP_log("\r\n Enter value: ");
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}
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@ -934,39 +930,6 @@ void indirect_write_rid0_length8(HDSL_Handle hdslHandle)
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}
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}
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void direct_read_rid0_length8_offset6(HDSL_Handle hdslHandle)
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{
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uint8_t dir=0x00;
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gPc_addrh = 0xec;
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gPc_addrl = 0x00;
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gPc_offh = 0x80;
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gPc_offl = 0x06;
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HDSL_set_pc_addr(hdslHandle, gPc_addrh, gPc_addrl, gPc_offh, gPc_offl);
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HDSL_set_pc_ctrl(hdslHandle,dir);
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ClockP_sleep(1);
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gPc_buf0 = HDSL_read_pc_buffer(hdslHandle,0);
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if(gPc_buf0 == 0x41)
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{
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gPc_buf1 = HDSL_read_pc_buffer(hdslHandle,1);
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if(gPc_buf1 == 0x10)
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{
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DebugP_log("\r\n PASS ");
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}
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else
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{
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DebugP_log("\r\n FAIL: gPc_buf1 != 0x10 = %u", gPc_buf1);
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}
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}
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else
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{
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DebugP_log("\r\n FAIL: gPc_buf0 != 0x41 = %u", gPc_buf0);
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}
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}
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static int get_menu(void)
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{
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unsigned int cmd;
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@ -63,11 +63,10 @@ void TC_write_pc_short_msg();
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//void _copy_reg_into_ddr();
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void direct_read_rid0_length8();
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void direct_read_rid0_length8_offset6();
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void direct_read_rid81_length8();
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void direct_read_rid81_length2();
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void indirect_write_rid0_length8();
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void indirect_write_rid0_length8_offset0();
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void indirect_write_rid0_length8_offset0();
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/**
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* @name HDSL_sync_calculation
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@ -111,7 +111,6 @@ enum {
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MENU_DIRECT_READ_RID81_LENGTH2,
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MENU_INDIRECT_WRITE_RID0_LENGTH8_OFFSET0,
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MENU_INDIRECT_WRITE_RID0_LENGTH8,
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MENU_DIRECT_READ_RID0_LENGTH8_OFFSET6,
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MENU_LIMIT,
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MENU_INVALID,
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};
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