подсчёт контрольной суммы
This commit is contained in:
parent
a43486cd7d
commit
48fe9bdad8
@ -128,7 +128,7 @@
|
||||
<listOptionValue builtIn="false" value="CCS_MBS_VERSION=6.1.3"/>
|
||||
<listOptionValue builtIn="false" value="RUNTIME_SUPPORT_LIBRARY=libc.a"/>
|
||||
<listOptionValue builtIn="false" value="OUTPUT_TYPE=executable"/>
|
||||
<listOptionValue builtIn="false" value="PRODUCTS=c2000ware_software_package:4.3.0.00;"/>
|
||||
<listOptionValue builtIn="false" value="PRODUCTS=c2000ware_software_package:5.1.0.00;"/>
|
||||
<listOptionValue builtIn="false" value="PRODUCT_MACRO_IMPORTS={"c2000ware_software_package":["${COM_TI_C2000WARE_SOFTWARE_PACKAGE_INCLUDE_PATH}","${COM_TI_C2000WARE_SOFTWARE_PACKAGE_LIBRARY_PATH}","${COM_TI_C2000WARE_SOFTWARE_PACKAGE_LIBRARIES}","${COM_TI_C2000WARE_SOFTWARE_PACKAGE_SYMBOLS}","${COM_TI_C2000WARE_SOFTWARE_PACKAGE_SYSCONFIG_MANIFEST}"]}"/>
|
||||
</option>
|
||||
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.197899427" name="Compiler version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="22.6.0.LTS" valueType="string"/>
|
||||
@ -151,13 +151,14 @@
|
||||
<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DISPLAY_ERROR_NUMBER.1020551485" name="Emit diagnostic identifier numbers (--display_error_number, -pden)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DISPLAY_ERROR_NUMBER" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DIAG_WRAP.1678665744" name="Wrap diagnostic messages (--diag_wrap)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DIAG_WRAP" useByScannerDiscovery="false" value="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DIAG_WRAP.off" valueType="enumerated"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.INCLUDE_PATH.71573062" name="Add dir to #include search path (--include_path, -I)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.INCLUDE_PATH" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value="${COM_TI_C2000WARE_SOFTWARE_PACKAGE_INCLUDE_PATH}"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/lib}"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/src/CLB}"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/src/Peripherals}"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/src/ExternalEEPROM}"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/Freemaster}"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/src}"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/src/vector}"/>
|
||||
<listOptionValue builtIn="false" value="${COM_TI_C2000WARE_SOFTWARE_PACKAGE_INCLUDE_PATH}"/>
|
||||
<listOptionValue builtIn="false" value="${PROJECT_ROOT}"/>
|
||||
<listOptionValue builtIn="false" value="${C2000WARE_COMMON_INCLUDE}"/>
|
||||
<listOptionValue builtIn="false" value="${C2000WARE_HEADERS_INCLUDE}"/>
|
||||
@ -165,7 +166,8 @@
|
||||
</option>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEFINE.2084039298" name="Pre-define NAME (--define, -D)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEFINE" valueType="definedSymbols">
|
||||
<listOptionValue builtIn="false" value="${COM_TI_C2000WARE_SOFTWARE_PACKAGE_SYMBOLS}"/>
|
||||
<listOptionValue builtIn="false" value="USE_20MHZ_XTAL"/>
|
||||
<listOptionValue builtIn="false" value="NRS485"/>
|
||||
<listOptionValue builtIn="false" value="USE_25MHZ_XTAL"/>
|
||||
<listOptionValue builtIn="false" value="DEBUG"/>
|
||||
<listOptionValue builtIn="false" value="CPU1"/>
|
||||
<listOptionValue builtIn="false" value="_FLASH"/>
|
||||
|
||||
@ -6,6 +6,8 @@ encoding//CPU1_FLASH/lib/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_FLASH/makefile=UTF-8
|
||||
encoding//CPU1_FLASH/objects.mk=UTF-8
|
||||
encoding//CPU1_FLASH/sources.mk=UTF-8
|
||||
encoding//CPU1_FLASH/src/CLB/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_FLASH/src/CLB/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_FLASH/src/ExternalEEPROM/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_FLASH/src/ExternalEEPROM/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_FLASH/src/Peripherals/subdir_rules.mk=UTF-8
|
||||
|
||||
Binary file not shown.
@ -19,6 +19,7 @@
|
||||
#include "frmmstr_run.h"
|
||||
#include "ExtEEPROM.h"
|
||||
#include "adc_init.h"
|
||||
#include "biss.h"
|
||||
|
||||
void main(void)
|
||||
{
|
||||
@ -28,7 +29,8 @@ void main(void)
|
||||
// asm (" NOP");
|
||||
//ExtEEPROM_run();
|
||||
frmmstr_run();
|
||||
adc_run();
|
||||
AdcRun();
|
||||
BissClkgenRun();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -70,6 +70,8 @@
|
||||
//
|
||||
#define DCC_COUNTER0_TOLERANCE 1
|
||||
|
||||
|
||||
|
||||
#ifdef USE_20MHZ_XTAL
|
||||
|
||||
#define OSC_FREQ 20
|
||||
@ -210,6 +212,17 @@ void InitSysCtrl(void)
|
||||
// documentation on steps to reconfigure the controlCARD from 20MHz to
|
||||
// 25MHz.
|
||||
//
|
||||
//òóò âûëåò ïî êâàðöó
|
||||
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
ESTOP0;
|
||||
while(1);
|
||||
}
|
||||
@ -861,8 +874,25 @@ void InitSysPll(Uint16 clock_source, Uint16 imult, Uint32 refdiv, Uint32 odiv,
|
||||
EDIS;
|
||||
}
|
||||
else
|
||||
ESTOP0; // If the frequency is out of range, stop here.
|
||||
{
|
||||
EALLOW;
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO6 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO7 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO7 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 1;
|
||||
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO10 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
EDIS;
|
||||
ESTOP0; // If the frequency is out of range, stop here.
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
@ -1181,6 +1211,7 @@ SysXtalOscSESel (void)
|
||||
//
|
||||
if(ClkCfgRegs.MCDCR.bit.MCLKSTS != 0)
|
||||
{
|
||||
|
||||
ESTOP0;
|
||||
}
|
||||
}
|
||||
@ -1286,8 +1317,25 @@ IsPLLValid(Uint32 base, Uint16 oscSource, Uint16 pllclk, Uint16 imult,
|
||||
CpuSysRegs.PCLKCR21.bit.DCC2 = 1;
|
||||
}
|
||||
else
|
||||
ESTOP0; // Invalid DCC selected
|
||||
{
|
||||
EALLOW;
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO6 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO7 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO7 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 1;
|
||||
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO10 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 0;
|
||||
EDIS;
|
||||
ESTOP0; // Invalid DCC selected
|
||||
}
|
||||
//
|
||||
// Clear Error & Done Flag
|
||||
//
|
||||
@ -1446,8 +1494,25 @@ void ComputeCntrSeedValue(Uint32 base, float fclk1_0ratio, Uint32 tolerance)
|
||||
else if(base == SYSCTL_DCC_BASE2)
|
||||
DccRegs = &Dcc2Regs;
|
||||
else
|
||||
ESTOP0; // Invalid DCC selected
|
||||
{
|
||||
EALLOW;
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO6 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 1;
|
||||
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO7 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO7 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 1;
|
||||
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO10 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
EDIS;
|
||||
ESTOP0; // Invalid DCC selected
|
||||
}
|
||||
//
|
||||
// Configure COUNTER-0, COUNTER-1 & Valid Window
|
||||
//
|
||||
|
||||
@ -26,7 +26,7 @@ __interrupt void adcb1_isr(void)
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
|
||||
}
|
||||
|
||||
void ConfigureADC(void)
|
||||
void ADCConfigure(void)
|
||||
{
|
||||
|
||||
//
|
||||
@ -76,7 +76,7 @@ void ConfigureADC(void)
|
||||
}
|
||||
|
||||
|
||||
void adc_run(void)
|
||||
void AdcRun(void)
|
||||
{
|
||||
if(adc_start)
|
||||
{
|
||||
@ -86,7 +86,7 @@ void adc_run(void)
|
||||
}
|
||||
|
||||
|
||||
void adc_start_set(void)
|
||||
void AdcStartSet(void)
|
||||
{
|
||||
adc_start = 1;
|
||||
}
|
||||
|
||||
@ -13,8 +13,8 @@
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
void ConfigureADC(void);
|
||||
void adc_run(void);
|
||||
void adc_start_set(void);
|
||||
void ADCConfigure(void);
|
||||
void AdcRun(void);
|
||||
void AdcStartSet(void);
|
||||
|
||||
#endif /* SRC_PERIPHERALS_ADC_INIT_H_ */
|
||||
|
||||
@ -6,13 +6,13 @@
|
||||
*/
|
||||
#include "f28x_project.h"
|
||||
|
||||
void GpioInit(void)
|
||||
void GpioDiodInit(void)
|
||||
{
|
||||
EALLOW;
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO6 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO6 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 1;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO7 = 0;
|
||||
@ -23,11 +23,52 @@ void GpioInit(void)
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO10 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 0;
|
||||
// GpioCtrlRegs.GPAGMUX2.bit.GPIO21 = 0;
|
||||
// GpioCtrlRegs.GPADIR.bit.GPIO21 = 1;
|
||||
// GpioDataRegs.GPADAT.bit.GPIO21 = 0;
|
||||
|
||||
EDIS;
|
||||
}
|
||||
|
||||
void GpioSetGreen(void)
|
||||
{
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
}
|
||||
|
||||
void GpioSetBlue(void)
|
||||
{
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 0;
|
||||
}
|
||||
|
||||
void GpioSetOrange(void)
|
||||
{
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = 0;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = 1;
|
||||
}
|
||||
|
||||
void GpioInit(void)
|
||||
{
|
||||
EALLOW;
|
||||
|
||||
GpioCtrlRegs.GPCMUX2.bit.GPIO95 = 0; // ğåëå ñèëîâîå
|
||||
GpioCtrlRegs.GPCGMUX2.bit.GPIO95 = 0;
|
||||
@ -38,67 +79,32 @@ void GpioInit(void)
|
||||
GpioCtrlRegs.GPCGMUX1.bit.GPIO64 = 0;
|
||||
GpioCtrlRegs.GPCDIR.bit.GPIO64 = 0;
|
||||
GpioDataRegs.GPCDAT.bit.GPIO64 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPBMUX2.bit.GPIO55 = 0;
|
||||
// GpioCtrlRegs.GPBGMUX2.bit.GPIO55 = 0;
|
||||
// GpioCtrlRegs.GPBDIR.bit.GPIO55 = 1;
|
||||
// GpioDataRegs.GPBDAT.bit.GPIO55 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPBMUX2.bit.GPIO56 = 0;
|
||||
// GpioCtrlRegs.GPBGMUX2.bit.GPIO56 = 0;
|
||||
// GpioCtrlRegs.GPBDIR.bit.GPIO56 = 1;
|
||||
// GpioDataRegs.GPBDAT.bit.GPIO56 = 0;
|
||||
//
|
||||
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO57 = 0;
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO57 = 0;
|
||||
GpioCtrlRegs.GPBDIR.bit.GPIO57 = 1;
|
||||
GpioDataRegs.GPBDAT.bit.GPIO57 = 0;
|
||||
|
||||
GpioDataRegs.GPBDAT.bit.GPIO57 = 1;//BISS-C_PWR_EN
|
||||
|
||||
GpioCtrlRegs.GPCMUX2.bit.GPIO83 = 0;
|
||||
GpioCtrlRegs.GPCGMUX2.bit.GPIO83 = 0;
|
||||
GpioCtrlRegs.GPCDIR.bit.GPIO83 = 1;
|
||||
#ifdef RS485
|
||||
GpioDataRegs.GPCDAT.bit.GPIO83 = 0;
|
||||
|
||||
#else
|
||||
GpioDataRegs.GPCDAT.bit.GPIO83 = 1;
|
||||
#endif
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 0;
|
||||
GpioCtrlRegs.GPAGMUX2.bit.GPIO21 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO21 = 1;
|
||||
#ifdef RS485
|
||||
GpioDataRegs.GPADAT.bit.GPIO21 = 1;
|
||||
//
|
||||
//
|
||||
//
|
||||
// GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0;
|
||||
// GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0;
|
||||
// GpioCtrlRegs.GPADIR.bit.GPIO18 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0;
|
||||
// GpioCtrlRegs.GPAGMUX2.bit.GPIO19 = 0;
|
||||
// GpioCtrlRegs.GPADIR.bit.GPIO19 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPCMUX2.bit.GPIO90 = 0;
|
||||
// GpioCtrlRegs.GPCGMUX2.bit.GPIO90 = 0;
|
||||
// GpioCtrlRegs.GPCDIR.bit.GPIO90 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPCMUX2.bit.GPIO92 = 0;
|
||||
// GpioCtrlRegs.GPCGMUX2.bit.GPIO92 = 0;
|
||||
// GpioCtrlRegs.GPCDIR.bit.GPIO92 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPCMUX2.bit.GPIO94 = 0;
|
||||
// GpioCtrlRegs.GPCGMUX2.bit.GPIO94 = 0;
|
||||
// GpioCtrlRegs.GPCDIR.bit.GPIO94 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPDMUX2.bit.GPIO127 = 0;
|
||||
// GpioCtrlRegs.GPDGMUX2.bit.GPIO127 = 0;
|
||||
// GpioCtrlRegs.GPDDIR.bit.GPIO127 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPEMUX2.bit.GPIO147 = 0;
|
||||
// GpioCtrlRegs.GPEGMUX2.bit.GPIO147 = 0;
|
||||
// GpioCtrlRegs.GPEDIR.bit.GPIO147 = 0;
|
||||
//
|
||||
#else
|
||||
GpioDataRegs.GPADAT.bit.GPIO21 = 0;
|
||||
#endif
|
||||
GpioCtrlRegs.GPDMUX1.bit.GPIO103 = 0;
|
||||
GpioCtrlRegs.GPDGMUX1.bit.GPIO103 = 0;
|
||||
GpioCtrlRegs.GPDDIR.bit.GPIO103 = 1;
|
||||
GpioDataRegs.GPDDAT.bit.GPIO103 = 0;
|
||||
GpioDataRegs.GPDDAT.bit.GPIO103 = 0; //BISS-C_PWR_12V/5V
|
||||
|
||||
EDIS;
|
||||
}
|
||||
@ -114,21 +120,37 @@ void GpioInit(void)
|
||||
//}
|
||||
|
||||
|
||||
void Gpio6out(uint16_t out_bit)
|
||||
|
||||
|
||||
void Gpio6out(uint16_t out_bit)//led_r
|
||||
{
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = out_bit;
|
||||
}
|
||||
|
||||
void Gpio7out(uint16_t out_bit)
|
||||
void Gpio7out(uint16_t out_bit)//led_b
|
||||
{
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = out_bit;
|
||||
}
|
||||
|
||||
void Gpio10out(uint16_t out_bit)
|
||||
void Gpio10out(uint16_t out_bit)//led_g
|
||||
{
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = out_bit;
|
||||
}
|
||||
|
||||
void Gpio_rainbow(uint16_t color)
|
||||
{
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = color & 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = color & 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO10 = color & 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = (color >> 1) & 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = (color >> 1) & 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO7 = (color >> 1) & 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = (color >> 2) & 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = (color >> 2) & 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO6 = (color >> 2) & 1;
|
||||
}
|
||||
|
||||
|
||||
void Gpio55out(uint16_t out_bit)
|
||||
{
|
||||
GpioDataRegs.GPBDAT.bit.GPIO55 = out_bit;
|
||||
|
||||
@ -20,6 +20,11 @@
|
||||
#define FaultPWM !GpioDataRegs.GPCDAT.bit.GPIO64
|
||||
|
||||
|
||||
void GpioDiodInit(void);
|
||||
void GpioSetGreen(void);
|
||||
void GpioSetBlue(void);
|
||||
void GpioSetOrange(void);
|
||||
|
||||
|
||||
void GpioInit(void);
|
||||
//void Gpio20out(uint16_t out_bit);
|
||||
@ -32,5 +37,6 @@ void Gpio55out(uint16_t out_bit);
|
||||
void Gpio56out(uint16_t out_bit);
|
||||
void Gpio57out(uint16_t out_bit);
|
||||
void Gpio95out(uint16_t out_bit);
|
||||
void Gpio_rainbow(uint16_t color);
|
||||
|
||||
#endif /* SRC_GPIO_INIT_H_ */
|
||||
|
||||
@ -132,8 +132,8 @@ __interrupt void epwm2_isr(void)
|
||||
if(PwmFlagStartADC) /// ацп не запустился, ток не был измерен
|
||||
{
|
||||
PwmFlagStartADC = 0;
|
||||
FMSTR_enable_set();
|
||||
adc_start_set();
|
||||
FMSTREnableSet();
|
||||
AdcStartSet();
|
||||
PWM_ABC_StopAllClose();
|
||||
PWM_motor.UA = PERIOD_2;
|
||||
PWM_motor.UB = PERIOD_2;
|
||||
|
||||
@ -6,6 +6,7 @@
|
||||
*/
|
||||
|
||||
#include "f28x_project.h"
|
||||
#include "biss.h"
|
||||
|
||||
#define SPI_PROGRAM_CS_GPAMUX1 GpioCtrlRegs.GPDMUX1.bit.GPIO98
|
||||
#define SPI_PROGRAM_CS_GPAGMUX1 GpioCtrlRegs.GPDGMUX1.bit.GPIO98
|
||||
@ -13,6 +14,9 @@
|
||||
#define SPI_PROGRAM_CS_GPADAT GpioDataRegs.GPDDAT.bit.GPIO98
|
||||
|
||||
|
||||
|
||||
uint16_t BissCount = BISS_C_BITS;
|
||||
|
||||
__interrupt void spia_rx_isr(void);
|
||||
__interrupt void spia_tx_isr(void);
|
||||
|
||||
@ -20,6 +24,13 @@ __interrupt void spib_rx_isr(void);
|
||||
__interrupt void spib_tx_isr(void);
|
||||
|
||||
|
||||
__interrupt void spic_rx_isr(void);
|
||||
__interrupt void spic_tx_isr(void);
|
||||
|
||||
uint16_t rxBuff[BISS_C_BITS];
|
||||
uint16_t indexRxBuff = 0;
|
||||
|
||||
|
||||
|
||||
void SpiAInit(void)
|
||||
{
|
||||
@ -173,14 +184,13 @@ __interrupt void spia_tx_isr(void)
|
||||
|
||||
|
||||
|
||||
|
||||
void SpiBInit(void)
|
||||
{
|
||||
|
||||
CpuSysRegs.PCLKCR8.bit.SPI_B = 1;
|
||||
|
||||
SpibRegs.SPIFFTX.all = 0xE040;
|
||||
SpibRegs.SPIFFRX.all = 0x2044;
|
||||
SpibRegs.SPIFFTX.all = 0xE04F;
|
||||
SpibRegs.SPIFFRX.all = 0x2026;//RXFIFORESET = 1; RXFFINTCLR = 1; RXFFIENA = 1; RXFFIL = 6
|
||||
SpibRegs.SPIFFCT.all = 0x0;
|
||||
|
||||
//
|
||||
@ -194,30 +204,40 @@ void SpiBInit(void)
|
||||
//
|
||||
SpibRegs.SPICCR.bit.SPISWRESET = 0;
|
||||
SpibRegs.SPICCR.bit.CLKPOLARITY = 0;
|
||||
SpibRegs.SPICCR.bit.SPICHAR = (8 - 1);
|
||||
SpibRegs.SPICCR.bit.SPICHAR = 0xF; //16
|
||||
SpibRegs.SPICCR.bit.SPILBK = 0;
|
||||
SpibRegs.SPICCR.bit.HS_MODE = 1;
|
||||
|
||||
//
|
||||
// Enable master (0 == slave, 1 == master)
|
||||
// Enable transmission (Talk)
|
||||
// Clock phase (0 == normal, 1 == delayed)
|
||||
// SPI interrupts are disabled
|
||||
// SPI interrupts are enabled
|
||||
//
|
||||
SpibRegs.SPICTL.bit.MASTER_SLAVE = 1;
|
||||
SpibRegs.SPICTL.bit.MASTER_SLAVE = 0;//Slave
|
||||
SpibRegs.SPICTL.bit.TALK = 1;
|
||||
SpibRegs.SPICTL.bit.CLK_PHASE = 1;
|
||||
SpibRegs.SPICTL.bit.SPIINTENA = 0;
|
||||
SpibRegs.SPICTL.bit.SPIINTENA = 1;
|
||||
|
||||
PieCtrlRegs.PIEIER6.bit.INTx3 = 0; //3.4.5 PIE Channel Mapping str 150 of trm
|
||||
PieCtrlRegs.PIEIER6.bit.INTx4 = 0;
|
||||
|
||||
EALLOW;
|
||||
PieVectTable.SPIB_RX_INT = &spib_rx_isr;
|
||||
PieVectTable.SPIB_TX_INT = &spib_tx_isr;
|
||||
EDIS;
|
||||
|
||||
IER |= M_INT6;
|
||||
|
||||
PieCtrlRegs.PIEIER6.bit.INTx3 = 1; //3.4.5 PIE Channel Mapping str 150 of trm
|
||||
PieCtrlRegs.PIEIER6.bit.INTx4 = 1; // 3 - RX, 4 - TX
|
||||
|
||||
|
||||
SpibRegs.SPIFFTX.bit.TXFFIENA = 0;
|
||||
SpibRegs.SPIFFRX.bit.RXFFIENA = 1;
|
||||
//
|
||||
// Set the baud rate using a 1 MHz SPICLK
|
||||
// BRR = (LSPCLK / SPICLK) - 1
|
||||
//
|
||||
SpibRegs.SPIBRR.bit.SPI_BIT_RATE = 99;
|
||||
SpibRegs.SPIBRR.bit.SPI_BIT_RATE = ((50000000 / 1000000) - 1);
|
||||
|
||||
// Set FREE bit
|
||||
// Halting on a breakpoint will not halt the SPI
|
||||
@ -240,20 +260,32 @@ void SpiBGpioInit(void)
|
||||
// Pull-ups can be enabled or disabled by the user.
|
||||
// This will enable the pullups for the specified pins.
|
||||
//
|
||||
GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0; // Enable pull-up on GPIO16 (SPISIMOA)
|
||||
GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0; // Enable pull-up on GPIO17 (SPISOMIA)
|
||||
GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0; // Enable pull-up on GPIO18 (SPICLKA)
|
||||
GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0; // Enable pull-up on GPIO19 (SPISTEA)
|
||||
GpioCtrlRegs.GPDPUD.bit.GPIO100 = 0; // Enable pull-up on GPIO16 (SPISIMOB)
|
||||
// GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0; // Enable pull-up on GPIO17 (SPISOMIB)
|
||||
|
||||
GpioCtrlRegs.GPDPUD.bit.GPIO102 = 0; // Enable pull-up on GPIO18 (SPICLKB)
|
||||
// GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0; // Enable pull-up on GPIO18 (SPICLKB)
|
||||
|
||||
GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0; // Enable pull-up on GPIO19 (SPISTEB)
|
||||
|
||||
//
|
||||
// Set qualification for selected pins to asynch only
|
||||
//
|
||||
// This will select asynch (no qualification) for the selected pins.
|
||||
//
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 3; // Asynch input GPIO16 (SPISIMOA)
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 3; // Asynch input GPIO17 (SPISOMIA)
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 3; // Asynch input GPIO18 (SPICLKA)
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 3; // Asynch input GPIO19 (SPISTEA)
|
||||
GpioCtrlRegs.GPDQSEL1.bit.GPIO100 = 3; // Asynch input GPIO16 (SPISIMOB)
|
||||
// GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 3; // Asynch input GPIO17 (SPISOMIB)
|
||||
|
||||
GpioCtrlRegs.GPDQSEL1.bit.GPIO102 = 3; // Asynch input GPIO18 (SPICLKB)
|
||||
// GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 3; // Asynch input GPIO18 (SPICLKB)
|
||||
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 3; // Asynch input GPIO19 (SPISTEB)
|
||||
|
||||
|
||||
GpioCtrlRegs.GPDMUX1.bit.GPIO99 = 0;
|
||||
GpioCtrlRegs.GPDGMUX1.bit.GPIO99 = 0;
|
||||
GpioCtrlRegs.GPDDIR.bit.GPIO99 = 1;
|
||||
GpioDataRegs.GPDDAT.bit.GPIO99 = 0;
|
||||
|
||||
//
|
||||
// Configure SPI-A pins
|
||||
@ -261,10 +293,14 @@ void SpiBGpioInit(void)
|
||||
// This specifies which of the possible GPIO pins will be SPI functional
|
||||
// pins.
|
||||
//
|
||||
GPIO_SetupPinMux(24, 0, 6);
|
||||
GPIO_SetupPinMux(25, 0, 6);
|
||||
GPIO_SetupPinMux(26, 0, 6);
|
||||
GPIO_SetupPinMux(100, 0, 6);
|
||||
// GPIO_SetupPinMux(25, 0, 6);
|
||||
|
||||
GPIO_SetupPinMux(102, 0, 6);
|
||||
// GPIO_SetupPinMux(26, 0, 6);
|
||||
|
||||
GPIO_SetupPinMux(27, 0, 6);
|
||||
// SpibRegs.SPITXBUF = 0xFFFF;
|
||||
|
||||
// GpioCtrlRegs.GPAMUX1.bit.GPIO24 = 2; // Configure GPIO16 as SPISIMOA
|
||||
// GpioCtrlRegs.GPAMUX1.bit.GPIO25 = 2; // Configure GPIO17 as SPISOMIA
|
||||
@ -279,14 +315,18 @@ void SpiBGpioInit(void)
|
||||
|
||||
void transmitBData(uint16_t a)
|
||||
{
|
||||
SpibRegs.SPITXBUF = a<<8;
|
||||
SpibRegs.SPITXBUF = a;
|
||||
}
|
||||
|
||||
|
||||
__interrupt void spib_rx_isr(void)
|
||||
{
|
||||
// SpibRegs.SPIFFRX.all = 0x2036;//RXFIFORESET = 1; RXFFINTCLR = 1; RXFFIENA = 1; RXFFIL = 6
|
||||
uint16_t temp = SpibRegs.SPISTS.all;
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
|
||||
SpibRegs.SPIFFRX.bit.RXFFIL = 6;
|
||||
SpibRegs.SPIFFRX.bit.RXFFIENA = 1;
|
||||
SpibRegs.SPIFFRX.bit.RXFFINTCLR = 1;
|
||||
}
|
||||
|
||||
|
||||
@ -294,4 +334,194 @@ __interrupt void spib_tx_isr(void)
|
||||
{
|
||||
uint16_t temp = SpibRegs.SPISTS.all;
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
|
||||
SpibRegs.SPIFFTX.all = 0xE04F;
|
||||
SpibRegs.SPIFFTX.bit.TXFFIL = 0x0;
|
||||
// SpibRegs.SPIFFTX.bit.TXFFIENA = 1;
|
||||
SpibRegs.SPIFFTX.bit.TXFFINTCLR = 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
//Spi-C
|
||||
|
||||
|
||||
|
||||
|
||||
void SpiCInit(void)
|
||||
{
|
||||
|
||||
CpuSysRegs.PCLKCR8.bit.SPI_C = 1;
|
||||
|
||||
SpicRegs.SPIFFTX.all = 0xE04F;
|
||||
SpicRegs.SPIFFRX.all = 0x2026;//RXFIFORESET = 1; RXFFINTCLR = 1; RXFFIENA = 1; RXFFIL = 6
|
||||
SpicRegs.SPIFFCT.all = 0x0;
|
||||
SpicRegs.SPIFFRX.bit.RXFFIL = BissCount;
|
||||
|
||||
//
|
||||
// Initialize core SPI registers
|
||||
//
|
||||
//
|
||||
// Set reset low before configuration changes
|
||||
// Clock polarity (0 == rising, 1 == falling)
|
||||
// 16-bit character
|
||||
// Enable loop-back
|
||||
//
|
||||
SpicRegs.SPICCR.bit.SPISWRESET = 0;
|
||||
SpicRegs.SPICCR.bit.CLKPOLARITY = BISS_CLK_POL;
|
||||
SpicRegs.SPICCR.bit.SPICHAR = 0xF; //16
|
||||
SpicRegs.SPICCR.bit.SPILBK = 0;
|
||||
SpicRegs.SPICCR.bit.HS_MODE = 1;
|
||||
|
||||
//
|
||||
// Enable master (0 == slave, 1 == master)
|
||||
// Enable transmission (Talk)
|
||||
// Clock phase (0 == normal, 1 == delayed)
|
||||
// SPI interrupts are enabled
|
||||
//
|
||||
SpicRegs.SPICTL.bit.MASTER_SLAVE = 0;//Slave
|
||||
SpicRegs.SPICTL.bit.TALK = 1;
|
||||
SpicRegs.SPICTL.bit.CLK_PHASE = BISS_CLK_PHASE;
|
||||
SpicRegs.SPICTL.bit.SPIINTENA = 1;
|
||||
|
||||
|
||||
EALLOW;
|
||||
PieVectTable.SPIC_RX_INT = &spic_rx_isr;
|
||||
PieVectTable.SPIC_TX_INT = &spic_tx_isr;
|
||||
EDIS;
|
||||
|
||||
IER |= M_INT6;
|
||||
|
||||
PieCtrlRegs.PIEIER6.bit.INTx9 = 1; //3.4.5 PIE Channel Mapping str 150 of trm
|
||||
PieCtrlRegs.PIEIER6.bit.INTx10 = 1; // 3 - RX, 4 - TX
|
||||
|
||||
|
||||
SpicRegs.SPIFFTX.bit.TXFFIENA = 0;
|
||||
SpicRegs.SPIFFRX.bit.RXFFIENA = 1;
|
||||
//
|
||||
// Set the baud rate using a 1 MHz SPICLK
|
||||
// BRR = (LSPCLK / SPICLK) - 1
|
||||
//
|
||||
SpicRegs.SPIBRR.bit.SPI_BIT_RATE = ((50000000 / 1000000) - 1);
|
||||
|
||||
// Set FREE bit
|
||||
// Halting on a breakpoint will not halt the SPI
|
||||
//
|
||||
SpicRegs.SPIPRI.bit.FREE = 1;
|
||||
|
||||
SpicRegs.SPIPRI.bit.STEINV = 1;
|
||||
//
|
||||
// Release the SPI from reset
|
||||
//
|
||||
SpicRegs.SPICCR.bit.SPISWRESET = 1;
|
||||
|
||||
}
|
||||
|
||||
void SpiCGpioInit(void)
|
||||
{
|
||||
EALLOW;
|
||||
|
||||
//
|
||||
// Enable internal pull-up for the selected pins
|
||||
//
|
||||
// Pull-ups can be enabled or disabled by the user.
|
||||
// This will enable the pullups for the specified pins.
|
||||
//
|
||||
GpioCtrlRegs.GPDPUD.bit.GPIO100 = 0; // Enable pull-up on (SPISIMOB)
|
||||
|
||||
|
||||
GpioCtrlRegs.GPDPUD.bit.GPIO102 = 0; // Enable pull-up on (SPICLKB)
|
||||
|
||||
|
||||
GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0; // Enable pull-up on (SPISTEB)
|
||||
|
||||
//
|
||||
// Set qualification for selected pins to asynch only
|
||||
//
|
||||
// This will select asynch (no qualification) for the selected pins.
|
||||
//
|
||||
GpioCtrlRegs.GPDQSEL1.bit.GPIO100 = 3; // Asynch input(SPISIMOB)
|
||||
|
||||
|
||||
GpioCtrlRegs.GPDQSEL1.bit.GPIO102 = 3; // Asynch input(SPICLKB)
|
||||
|
||||
|
||||
GpioCtrlRegs.GPCQSEL1.bit.GPIO72 = 3; // Asynch input(SPISTEB)
|
||||
|
||||
|
||||
GpioCtrlRegs.GPDMUX1.bit.GPIO99 = 0;
|
||||
GpioCtrlRegs.GPDGMUX1.bit.GPIO99 = 0;
|
||||
GpioCtrlRegs.GPDDIR.bit.GPIO99 = 1;
|
||||
GpioDataRegs.GPDDAT.bit.GPIO99 = 0;
|
||||
|
||||
//
|
||||
// Configure SPI-A pins
|
||||
//
|
||||
// This specifies which of the possible GPIO pins will be SPI functional
|
||||
// pins.
|
||||
//
|
||||
GPIO_SetupPinMux(100, 0, 6);
|
||||
|
||||
|
||||
GPIO_SetupPinMux(102, 0, 6);
|
||||
|
||||
|
||||
GPIO_SetupPinMux(72, 0, 15);
|
||||
|
||||
|
||||
|
||||
EDIS;
|
||||
}
|
||||
|
||||
void transmitCData(uint16_t a)
|
||||
{
|
||||
SpicRegs.SPITXBUF = a;
|
||||
}
|
||||
|
||||
void resetIndexRxBuff(void)
|
||||
{
|
||||
indexRxBuff = 0;
|
||||
}
|
||||
|
||||
uint64_t BissTest = 0;
|
||||
uint16_t BissErrRead = 0;
|
||||
uint32_t BissTestShift0[16];
|
||||
|
||||
|
||||
__interrupt void spic_rx_isr(void)
|
||||
{
|
||||
uint16_t BissEmptyBits = 0;
|
||||
for(indexRxBuff = 0; indexRxBuff < BissCount; indexRxBuff++)
|
||||
{
|
||||
rxBuff[indexRxBuff] = SpicRegs.SPIRXBUF;
|
||||
}
|
||||
|
||||
BissTest = ((uint64_t)rxBuff[0] << 48) + ((uint64_t)rxBuff[1] << 32) + ((uint64_t)rxBuff[2] << 16) + ((uint64_t)rxBuff[3]);
|
||||
|
||||
while(((BissTest & 0xC000000000000000) != 0x8000000000000000) && (BissEmptyBits < 15))
|
||||
{
|
||||
BissTest = BissTest << 1;
|
||||
BissEmptyBits++;
|
||||
}
|
||||
BissTestShift0[BissEmptyBits]++;
|
||||
if( (BissTest & 0xC000000000000000) == 0x8000000000000000) BissCalc(BissTest);
|
||||
else BissErrRead++;
|
||||
|
||||
|
||||
|
||||
uint16_t temp = SpicRegs.SPISTS.all;
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
|
||||
SpicRegs.SPIFFRX.bit.RXFFIL = BissCount;
|
||||
SpicRegs.SPIFFRX.bit.RXFFIENA = 1;
|
||||
SpicRegs.SPIFFRX.bit.RXFFINTCLR = 1;
|
||||
}
|
||||
|
||||
|
||||
__interrupt void spic_tx_isr(void)
|
||||
{
|
||||
uint16_t temp = SpibRegs.SPISTS.all;
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
|
||||
SpicRegs.SPIFFTX.all = 0xE04F;
|
||||
SpicRegs.SPIFFTX.bit.TXFFIL = 0x0;
|
||||
// SpibRegs.SPIFFTX.bit.TXFFIENA = 1;
|
||||
SpicRegs.SPIFFTX.bit.TXFFINTCLR = 1;
|
||||
}
|
||||
|
||||
@ -19,6 +19,9 @@ void SpiBInit(void);
|
||||
void transmitBData(uint16_t a);
|
||||
void Gpio_SPI_CS_BL25CM1A(uint16_t out_bit);
|
||||
|
||||
void SpiCInit(void);
|
||||
void SpiCGpioInit(void);
|
||||
|
||||
|
||||
#ifdef ExtEEPROM_SPIB
|
||||
|
||||
|
||||
@ -5,25 +5,199 @@
|
||||
* Author: seklyuts
|
||||
*/
|
||||
#include "f28x_project.h"
|
||||
#include "CLB_init.h"
|
||||
#include "math.h"
|
||||
#include "biss.h"
|
||||
#include "CLB/board.h"
|
||||
#include "crc.h"
|
||||
|
||||
#define DEVICE_SYSCLK_FREQ 200000000
|
||||
#define CLB_CLOCK_FREQ (DEVICE_SYSCLK_FREQ / 2)
|
||||
|
||||
|
||||
void init_Biss(void)
|
||||
|
||||
#define CLKGEN_MIN_FREQ ((float) 1.0)
|
||||
#define CLKGEN_MAX_FREQ ((float) 10e6)
|
||||
|
||||
#define CLKGEN_LOAD_GP_FLAG ((uint32_t) 0x0001)
|
||||
#define CLKGEN_RUN_GP_FLAG ((uint32_t) 0x0002)
|
||||
|
||||
uint16_t biss_on = 0;
|
||||
uint16_t biss_auto = 1;
|
||||
|
||||
void BissInit(void)
|
||||
{
|
||||
EALLOW;
|
||||
|
||||
CpuSysRegs.PCLKCR17.bit.CLB1 = 1;
|
||||
CpuSysRegs.PCLKCR17.bit.CLB2 = 1;
|
||||
|
||||
|
||||
ClkCfgRegs.CLBCLKCTL.bit.CLBCLKDIV = 1;
|
||||
ClkCfgRegs.CLBCLKCTL.bit.CLKMODECLB1 = 0;
|
||||
ClkCfgRegs.CLBCLKCTL.bit.CLKMODECLB2 = 0;
|
||||
ClkCfgRegs.CLBCLKCTL.bit.TILECLKDIV = 0;
|
||||
|
||||
// Clb1LogicCtrlRegs.CLB_OUT_EN |= 1UL << 17UL;
|
||||
// Clb1LogicCfgRegs.CLB_MISC_ACCESS_CTRL.bit.BLKEN = 0;
|
||||
// Clb1LogicCfgRegs.CLB_MISC_ACCESS_CTRL.bit.SPIEN = 0;
|
||||
// Clb1LogicCfgRegs.CLB_SPI_DATA_CTRL_HI.bit.STRB = 0;
|
||||
// Clb1LogicCfgRegs.CLB_SPI_DATA_CTRL_HI.bit.SHIFT = 0;
|
||||
|
||||
Board_init();
|
||||
|
||||
BissClkgenSetup(16*BISS_C_BITS, 16*BISS_C_BITS, BISS_BR, 2);
|
||||
|
||||
|
||||
// InputXbarRegs.INPUT1SELECT = 100;
|
||||
// ClbInputXbarRegs.INPUT1SELECT =
|
||||
|
||||
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
void init_GPIO_Biss(void)
|
||||
|
||||
void BissGpioInit(void)
|
||||
{
|
||||
EALLOW;
|
||||
|
||||
GpioCtrlRegs.GPDMUX1.bit.GPIO96 = 2;//14 = 1110
|
||||
GpioCtrlRegs.GPDGMUX1.bit.GPIO96 = 3;
|
||||
GpioCtrlRegs.GPDDIR.bit.GPIO96 = 1;
|
||||
GpioDataRegs.GPDDAT.bit.GPIO96 = 0;
|
||||
|
||||
|
||||
GpioCtrlRegs.GPDMUX1.bit.GPIO97 = 2;//14 = 1110
|
||||
GpioCtrlRegs.GPDGMUX1.bit.GPIO97 = 3;
|
||||
GpioCtrlRegs.GPDDIR.bit.GPIO97 = 1;
|
||||
GpioDataRegs.GPDDAT.bit.GPIO97 = 0;
|
||||
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
void BissClkgenSetup(unsigned int bits_num_m,
|
||||
unsigned int bits_num_s,
|
||||
float freq_hz,
|
||||
unsigned int phase_us)
|
||||
{
|
||||
const uint32_t half_period_num_m = bits_num_m * 2;
|
||||
const uint32_t half_period_num_s = bits_num_s * 2;
|
||||
const uint32_t half_period_clb_clocks = ceilf(((float) CLB_CLOCK_FREQ / freq_hz) / 2.0);
|
||||
const uint32_t phase_clb_clocks = 1 + ceilf((float) CLB_CLOCK_FREQ * ((float) phase_us * 1e-6));
|
||||
|
||||
const uint32_t push_data_m[4] =
|
||||
{
|
||||
half_period_clb_clocks - 1,
|
||||
half_period_num_m - 1,
|
||||
phase_clb_clocks,
|
||||
0,
|
||||
};
|
||||
|
||||
CLB_writeFIFOs1(push_data_m);
|
||||
Clb1LogicCtrlRegs.CLB_GP_REG.all = CLKGEN_LOAD_GP_FLAG;
|
||||
DELAY_US(10);
|
||||
Clb1LogicCtrlRegs.CLB_GP_REG.all = 0;
|
||||
|
||||
|
||||
while (((Clb1LogicCtrlRegs.CLB_BUF_PTR.all >> 16) & 0x03) == 0);
|
||||
|
||||
|
||||
CLB_clearFIFOs1();
|
||||
|
||||
const uint32_t push_data_s[4] = {
|
||||
half_period_clb_clocks - 1,
|
||||
half_period_num_s - 1,
|
||||
0,
|
||||
0
|
||||
};
|
||||
|
||||
CLB_writeFIFOs2(push_data_s);
|
||||
|
||||
Clb2LogicCtrlRegs.CLB_GP_REG.all = CLKGEN_LOAD_GP_FLAG;
|
||||
DELAY_US(10);
|
||||
Clb2LogicCtrlRegs.CLB_GP_REG.all = 0;
|
||||
|
||||
while (((Clb2LogicCtrlRegs.CLB_BUF_PTR.all >> 16) & 0x03) == 0);
|
||||
|
||||
CLB_clearFIFOs2();
|
||||
}
|
||||
|
||||
void BissClkgenRun(void) {
|
||||
|
||||
if(biss_on)
|
||||
{
|
||||
biss_on = 0;
|
||||
Clb1LogicCtrlRegs.CLB_GP_REG.all = CLKGEN_RUN_GP_FLAG;
|
||||
DELAY_US(10);
|
||||
Clb1LogicCtrlRegs.CLB_GP_REG.all = 0;
|
||||
|
||||
while ((((Clb1LogicCtrlRegs.CLB_BUF_PTR.all >> 16) & 0x03) == 0) && (((Clb2LogicCtrlRegs.CLB_BUF_PTR.all >> 16) & 0x03) == 0));
|
||||
|
||||
CLB_clearFIFOs1();
|
||||
CLB_clearFIFOs2();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void BissStartSet(void)
|
||||
{
|
||||
if(biss_auto == 1) {biss_on = 1;}
|
||||
}
|
||||
|
||||
uint64_t BiSStheta = 0;
|
||||
uint16_t BissCRC = 0, BissCRC_ = 0, BissCRC2_ = 0;
|
||||
uint16_t BissErr = 0;
|
||||
uint16_t BissWarn = 0;
|
||||
uint32_t Bissth1 = 0;
|
||||
uint16_t Bissth2 = 0;
|
||||
uint64_t BissAllCRC;
|
||||
|
||||
uint16_t BissTestShift1[16];
|
||||
uint16_t BissErrData = 0;
|
||||
uint64_t BissAll = 0;
|
||||
uint32_t WrongCS =0, RightCS = 0;
|
||||
|
||||
|
||||
void BissCalc(uint64_t BissData)
|
||||
{
|
||||
uint16_t BissEmptyBits = 0;
|
||||
|
||||
BissData = BissData << 2;
|
||||
|
||||
while(((BissData & 0xC000000000000000) != 0x8000000000000000) && (BissEmptyBits < 15))
|
||||
{
|
||||
BissData = BissData << 1;
|
||||
BissEmptyBits++;
|
||||
}
|
||||
|
||||
BissTestShift1[BissEmptyBits]++;
|
||||
|
||||
if(BissEmptyBits >= 15)
|
||||
{
|
||||
BissErrData++;
|
||||
}
|
||||
else
|
||||
{
|
||||
BissAll = BissData << 2;
|
||||
|
||||
BiSStheta = (BissAll & 0xFFFFFFFFF0000000) >> 28;
|
||||
Bissth1 = (BiSStheta & 0x7FFFF);
|
||||
Bissth2 = Bissth1 >> 3;
|
||||
BissCRC = (BissAll & 0x0000000003F00000) >> 20;
|
||||
BissAllCRC = (BissAll & 0xFFFFFFFFFC000000) >> 26; //38 bit
|
||||
BissCRC2_ = crcbitbybitfast(BissAllCRC);
|
||||
if(BissCRC2_ != BissCRC)
|
||||
{
|
||||
WrongCS++;
|
||||
}
|
||||
else
|
||||
{
|
||||
RightCS++;
|
||||
}
|
||||
BissErr = (BissAll & 0x0000000008000000) >> 27;
|
||||
BissWarn = (BissAll & 0x0000000004000000) >> 26;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@ -8,10 +8,25 @@
|
||||
#ifndef SRC_BISS_H_
|
||||
#define SRC_BISS_H_
|
||||
|
||||
#define BISS_C_BITS 4 //êîë-âî ÷èòàåìûõ 16-áèòíûõ ñëîâ
|
||||
|
||||
void init_Biss(void);
|
||||
void init_GPIO_Biss(void);
|
||||
#define BISS_CLK_POL 1
|
||||
#define BISS_CLK_PHASE 1
|
||||
|
||||
#define BISS_BR 1500000
|
||||
|
||||
void BissInit(void);
|
||||
void BissGpioInit(void);
|
||||
|
||||
void BissClkgenSetup(unsigned int bits_num_m,
|
||||
unsigned int bits_num_s,
|
||||
float freq_hz,
|
||||
unsigned int phase_us);
|
||||
|
||||
void BissClkgenRun(void);
|
||||
|
||||
void BissStartSet(void);
|
||||
void BissCalc(uint64_t BissData);
|
||||
|
||||
#endif /* SRC_BISS_H_ */
|
||||
|
||||
|
||||
132
Projects/epwm_test/src/crc.c
Normal file
132
Projects/epwm_test/src/crc.c
Normal file
@ -0,0 +1,132 @@
|
||||
/*
|
||||
* crc.c
|
||||
*
|
||||
* Created on: 7 ìàð. 2024 ã.
|
||||
* Author: seklyuts
|
||||
*/
|
||||
|
||||
#include "f28x_project.h"
|
||||
|
||||
|
||||
const int order = 6;
|
||||
const unsigned long polynom = 0x43;
|
||||
const int direct = 1;
|
||||
const unsigned long crcinit = 0x0000;
|
||||
const unsigned long crcxor = 0xffff;
|
||||
const int refin = 0;
|
||||
const int refout = 0;
|
||||
// internal global values:
|
||||
unsigned long crcmask;
|
||||
unsigned long crchighbit;
|
||||
unsigned long crcinit_direct;
|
||||
unsigned long crcinit_nondirect;
|
||||
unsigned long crctab[256];
|
||||
|
||||
|
||||
unsigned long reflect (unsigned long crc, int bitnum) {
|
||||
// reflects the lower ’bitnum’ bits of ’crc’
|
||||
unsigned long i, j=1, crcout=0;
|
||||
for (i=(unsigned long)1<<(bitnum-1); i; i>>=1) {
|
||||
if (crc & i) crcout|=j;
|
||||
j<<= 1;
|
||||
}
|
||||
return (crcout);
|
||||
}
|
||||
|
||||
|
||||
unsigned long crcbitbybit(unsigned char* p, unsigned long len) {
|
||||
// bit by bit algorithm with augmented zero bytes.
|
||||
// does not use lookup table, suited for polynom orders between 1...32.
|
||||
unsigned long i, j, c, bit;
|
||||
unsigned long crc = crcinit_nondirect;
|
||||
for (i=0; i<len; i++) {
|
||||
c = (unsigned long)*p++;
|
||||
if (refin) c = reflect(c, 8);
|
||||
for (j=0x80; j; j>>=1) {
|
||||
bit = crc & crchighbit;
|
||||
crc<<= 1;
|
||||
if (c & j) crc|= 1;
|
||||
if (bit) crc^= polynom;
|
||||
}
|
||||
}
|
||||
for (i=0; i<order; i++) {
|
||||
bit = crc & crchighbit;
|
||||
crc<<= 1;
|
||||
if (bit) crc^= polynom;
|
||||
}
|
||||
if (refout) crc=reflect(crc, order);
|
||||
crc^= crcxor;
|
||||
crc&= crcmask;
|
||||
return(crc);
|
||||
}
|
||||
|
||||
|
||||
//unsigned long crcbitbybitfast(unsigned char* p, unsigned long len) {
|
||||
uint16_t crcbitbybitfast(uint64_t data)
|
||||
{
|
||||
// fast bit by bit algorithm without augmented zero bytes.
|
||||
// does not use lookup table, suited for polynom orders between 1...32.
|
||||
unsigned long i, j, c, bit;
|
||||
unsigned long crc = crcinit_direct;
|
||||
|
||||
crcmask = ((((uint64_t)1<<(order-1))-1)<<1)|1;
|
||||
crchighbit = (uint64_t)1<<(order-1);
|
||||
|
||||
uint16_t p[5];
|
||||
p[4] = data & 0xFF;
|
||||
p[3] = (data >> 8) & 0xFF;
|
||||
p[2] = (data >> 16) & 0xFF;
|
||||
p[1] = (data >> 24) & 0xFF;
|
||||
p[0] = (data >> 32) & 0xFF;
|
||||
for (i=0; i<5; i++) {
|
||||
c = p[i];
|
||||
// if (refin) c = reflect(c, 8);
|
||||
for (j=0x80; j; j>>=1) {
|
||||
bit = crc & crchighbit;
|
||||
crc<<= 1;
|
||||
if (c & j) bit^= crchighbit;
|
||||
if (bit) crc^= polynom;
|
||||
}
|
||||
}
|
||||
// if (refout) crc=reflect(crc, order);
|
||||
crc^= crcxor;
|
||||
crc&= crcmask;
|
||||
return(crc);
|
||||
}
|
||||
|
||||
|
||||
#define ALL_BITS 38
|
||||
#define CS_BITS 6
|
||||
|
||||
|
||||
uint16_t calcCRC(uint64_t data) // 38 bit -> 6 bit // x6 + x1 + 1/// poly = 0b1000011 = 0x86;
|
||||
{
|
||||
uint64_t temp1, temp2, crc = 0;
|
||||
uint64_t poly = (uint64_t)0b1000011 << (ALL_BITS - CS_BITS - 1);
|
||||
uint16_t i = 0;
|
||||
crc = poly;
|
||||
temp1 = data;
|
||||
crc ^= temp1;
|
||||
|
||||
for(i=0; i < (ALL_BITS - CS_BITS); i++)
|
||||
{
|
||||
// crc = (crc & ((uint64_t)1 << (ALL_BITS-1))) ? ((crc ^ poly) << 1) : (crc << 1);
|
||||
|
||||
temp2 = ((uint64_t)1 << (ALL_BITS-1));
|
||||
|
||||
if(crc & temp2)
|
||||
{
|
||||
crc = ((crc ^ poly) << 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
crc = (crc << 1);
|
||||
}
|
||||
|
||||
}
|
||||
return (crc >> (ALL_BITS - CS_BITS));
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
15
Projects/epwm_test/src/crc.h
Normal file
15
Projects/epwm_test/src/crc.h
Normal file
@ -0,0 +1,15 @@
|
||||
/*
|
||||
* crc.h
|
||||
*
|
||||
* Created on: 7 ìàð. 2024 ã.
|
||||
* Author: seklyuts
|
||||
*/
|
||||
|
||||
#ifndef SRC_CRC_H_
|
||||
#define SRC_CRC_H_
|
||||
|
||||
|
||||
uint16_t crcbitbybitfast(uint64_t data);
|
||||
|
||||
|
||||
#endif /* SRC_CRC_H_ */
|
||||
@ -11,17 +11,17 @@
|
||||
uint16_t frmEn = 0;
|
||||
|
||||
|
||||
uint16_t FMSTR_is_enable(void)
|
||||
uint16_t FMSTRIsEnable(void)
|
||||
{
|
||||
return frmEn;
|
||||
}
|
||||
|
||||
void FMSTR_enable_clr(void)
|
||||
void FMSTREnableClr(void)
|
||||
{
|
||||
frmEn = 0;
|
||||
}
|
||||
|
||||
void FMSTR_enable_set(void)
|
||||
void FMSTREnableSet(void)
|
||||
{
|
||||
frmEn = 1;
|
||||
}
|
||||
@ -116,7 +116,7 @@ void FRMUartInit(void)
|
||||
|
||||
SciaRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset
|
||||
|
||||
FMSTR_enable_set();
|
||||
FMSTREnableSet();
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -24,8 +24,8 @@ FMSTR_SCISR FMSTR_SCI_RDCLRSR(void);
|
||||
//void FMSTR_InitSerial(void) ;
|
||||
void FRMUartInit(void);
|
||||
|
||||
uint16_t FMSTR_is_enable(void);
|
||||
void FMSTR_enable_clr(void);
|
||||
void FMSTR_enable_set(void);
|
||||
uint16_t FMSTRIsEnable(void);
|
||||
void FMSTREnableClr(void);
|
||||
void FMSTREnableSet(void);
|
||||
|
||||
#endif /* SRC_FRM_UART_H_ */
|
||||
|
||||
@ -17,7 +17,7 @@ volatile uint16_t Rele=0;
|
||||
void frmmstr_run(void)
|
||||
{
|
||||
static uint16_t diod = 0;
|
||||
if(FMSTR_is_enable()) {
|
||||
if(FMSTRIsEnable()) {
|
||||
if(counter < 100) counter++;
|
||||
else
|
||||
{
|
||||
@ -27,13 +27,16 @@ static uint16_t diod = 0;
|
||||
{
|
||||
counter1=0;
|
||||
counter2++;
|
||||
if(diod) {Gpio7out(0); diod = 0;}
|
||||
else {Gpio7out(1); diod = 1;}
|
||||
diod++;
|
||||
if(diod > 7) diod = 0;
|
||||
Gpio_rainbow(diod);
|
||||
//if(diod) {Gpio7out(0); diod = 0;}
|
||||
//else {Gpio7out(1); diod = 1;}
|
||||
}
|
||||
}
|
||||
FMSTR_Poll();
|
||||
FMSTR_Recorder();
|
||||
FMSTR_enable_clr();
|
||||
FMSTREnableClr();
|
||||
Gpio95out(Rele);
|
||||
}
|
||||
}
|
||||
|
||||
@ -5,6 +5,8 @@
|
||||
* Author: seklyuts
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include "pwm_init.h"
|
||||
#include "f28x_project.h"
|
||||
#include "pwm_interrupts.h"
|
||||
@ -19,12 +21,18 @@
|
||||
#include "ZD24C02A.h"
|
||||
#include "vector.h"
|
||||
#include "adc_init.h"
|
||||
|
||||
#include "biss.h"
|
||||
|
||||
|
||||
void InitPerif(void)
|
||||
{
|
||||
|
||||
GpioDiodInit();
|
||||
|
||||
GpioSetGreen();
|
||||
InitSysCtrl();
|
||||
GpioSetBlue();
|
||||
|
||||
|
||||
|
||||
// Clear all interrupts and initialize PIE vector table:
|
||||
@ -70,6 +78,12 @@ void InitPerif(void)
|
||||
|
||||
vectorInitCurrLoop();
|
||||
|
||||
SpiCInit();
|
||||
SpiCGpioInit();
|
||||
BissInit();
|
||||
BissGpioInit();
|
||||
|
||||
|
||||
// SpiGpioInit();
|
||||
// SpiInit();
|
||||
// I2CMasterGpioInit();
|
||||
@ -79,8 +93,6 @@ void InitPerif(void)
|
||||
// vectorInitCurrLoop();
|
||||
// ConfigureADC();
|
||||
|
||||
|
||||
|
||||
//
|
||||
// Enable global Interrupts and higher priority real-time debug events:
|
||||
//
|
||||
|
||||
@ -17,6 +17,7 @@
|
||||
#include "frm_uart.h"
|
||||
#include "skvt.h"
|
||||
#include "adc_init.h"
|
||||
#include "biss.h"
|
||||
|
||||
#define IMAX_A 25.0 //A
|
||||
#define IMAX (IMAX_A*BIT_MAX/FACTOR_CURRENT_MOTOR_A)
|
||||
@ -132,8 +133,9 @@ void vectorControl(int16_t CurrentA, int16_t CurrentB, int16_t CurrentC, int16_t
|
||||
Udc = sdfmUdc * FACTOR_VDC;
|
||||
vector_klark_park(SectorCheckOn,Ia,Ib,Ic);
|
||||
vector_inversion();
|
||||
FMSTR_enable_set();
|
||||
adc_start_set();
|
||||
BissStartSet();
|
||||
FMSTREnableSet();
|
||||
AdcStartSet();
|
||||
|
||||
}
|
||||
|
||||
@ -190,14 +192,12 @@ int16_t vector_mcsinPIxLUT(int16_t Value, int16_t *psinTable)
|
||||
// set saturation on
|
||||
if (Value>=0)
|
||||
{
|
||||
return ( Value > ANGLE_PI_DIVIDE_2_F16 ? -psinTable[(2*SIN_LENGTH_TABLE- \
|
||||
(Value>> SIN_INDEX_SHIFT))] : -psinTable[(Value >> SIN_INDEX_SHIFT)] );
|
||||
return ( Value > ANGLE_PI_DIVIDE_2_F16 ? -psinTable[(2*SIN_LENGTH_TABLE- (Value>> SIN_INDEX_SHIFT))] : -psinTable[(Value >> SIN_INDEX_SHIFT)] );
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
return ( Value < -ANGLE_PI_DIVIDE_2_F16 ? psinTable[(2*SIN_LENGTH_TABLE- \
|
||||
-(Value >> SIN_INDEX_SHIFT))] : psinTable[(-(Value >> SIN_INDEX_SHIFT))] );
|
||||
return ( Value < -ANGLE_PI_DIVIDE_2_F16 ? psinTable[(2*SIN_LENGTH_TABLE- -(Value >> SIN_INDEX_SHIFT))] : psinTable[(-(Value >> SIN_INDEX_SHIFT))] );
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user