разделение на дебажную и рабочую с разными частотами кварца
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Eugene
parent
d22457044c
commit
fe2fe40ad9
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<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.INCLUDE_PATH.1562489455" name="Add dir to #include search path (--include_path, -I)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.INCLUDE_PATH" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value="D:/MU/UFC/prj/UFC_Application-feature-sdfm/ufc_app/mem_test/device"/>
|
||||
<listOptionValue builtIn="false" value="${COM_TI_C2000WARE_SOFTWARE_PACKAGE_INSTALL_DIR}/libraries/flash_api/f2838x/c28x/include/FlashAPI"/>
|
||||
<listOptionValue builtIn="false" value="${COM_TI_C2000WARE_SOFTWARE_PACKAGE_INSTALL_DIR}/libraries/flash_api/f2838x/c28x/lib"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/device/driverlib}"/>
|
||||
<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/device/driverlib/inc}"/>
|
||||
<listOptionValue builtIn="false" value="${SYSCONFIG_TOOL_INCLUDE_PATH}"/>
|
||||
<listOptionValue builtIn="false" value="${COM_TI_C2000WARE_SOFTWARE_PACKAGE_INCLUDE_PATH}"/>
|
||||
<listOptionValue builtIn="false" value="${PROJECT_ROOT}"/>
|
||||
<listOptionValue builtIn="false" value="${PROJECT_ROOT}/device"/>
|
||||
<listOptionValue builtIn="false" value="${CG_TOOL_ROOT}/include"/>
|
||||
<listOptionValue builtIn="false" value="D:/MU/UFC/prj/UFC_Application-feature-sdfm/ufc_app/mem_test/Freemaster"/>
|
||||
<listOptionValue builtIn="false" value="D:/MU/UFC/prj/UFC_Application-feature-sdfm/ufc_app/mem_test/src/ExternalEEPROM"/>
|
||||
<listOptionValue builtIn="false" value="D:/MU/UFC/prj/UFC_Application-feature-sdfm/ufc_app/mem_test/src/Peripherals"/>
|
||||
<listOptionValue builtIn="false" value="D:/MU/UFC/prj/UFC_Application-feature-sdfm/ufc_app/mem_test/lib"/>
|
||||
<listOptionValue builtIn="false" value="D:/MU/UFC/prj/UFC_Application-feature-sdfm/ufc_app/mem_test/src"/>
|
||||
<listOptionValue builtIn="false" value="D:/MU/UFC/prj/UFC_Application-feature-sdfm/ufc_app/mem_test"/>
|
||||
<listOptionValue builtIn="false" value="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2838x/common/include"/>
|
||||
<listOptionValue builtIn="false" value="C:/ti/c2000/C2000Ware_4_03_00_00/device_support/f2838x/headers/include"/>
|
||||
<listOptionValue builtIn="false" value="C:/ti/ccs1230/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include"/>
|
||||
</option>
|
||||
<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__C_SRCS.1209888095" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__C_SRCS"/>
|
||||
<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__CPP_SRCS.2075133629" name="C++ Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__CPP_SRCS"/>
|
||||
<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM_SRCS.1705598275" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM_SRCS"/>
|
||||
<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM2_SRCS.2147135845" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM2_SRCS"/>
|
||||
</tool>
|
||||
<tool id="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.linkerDebug.1032426986" name="C2000 Linker" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.linkerDebug.881262039"/>
|
||||
<tool id="com.ti.ccstudio.buildDefinitions.C2000_22.6.hex.1193848736" name="C2000 Hex Utility" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.hex.1158870401"/>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="2838x_RAM_combined_lnk_cpu2.cmd|device/driverlib|2838x_FLASH_lnk_cpu1.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
|
||||
6
Projects/mem_test/.gitignore
vendored
6
Projects/mem_test/.gitignore
vendored
@ -1,3 +1,5 @@
|
||||
/CPU1_FLASH/
|
||||
/CPU1_RAM/
|
||||
/CPU2_RAM/
|
||||
/CPU1_RAM_DEBUG/
|
||||
/CPU1_RAM_RELEASE/
|
||||
/CPU2_RAM_RELEASE/
|
||||
|
||||
|
||||
@ -1,21 +1,21 @@
|
||||
eclipse.preferences.version=1
|
||||
encoding//CPU1_RAM/Freemaster/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM/Freemaster/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM/device/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM/device/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM/lib/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM/lib/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM/makefile=UTF-8
|
||||
encoding//CPU1_RAM/objects.mk=UTF-8
|
||||
encoding//CPU1_RAM/sources.mk=UTF-8
|
||||
encoding//CPU1_RAM/src/ExternalEEPROM/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM/src/ExternalEEPROM/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM/src/Peripherals/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM/src/Peripherals/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM/src/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM/src/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/Freemaster/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/Freemaster/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/device/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/device/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/lib/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/lib/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/makefile=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/objects.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/sources.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/src/ExternalEEPROM/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/src/ExternalEEPROM/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/src/Peripherals/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/src/Peripherals/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/src/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/src/subdir_vars.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/subdir_rules.mk=UTF-8
|
||||
encoding//CPU1_RAM_RELEASE/subdir_vars.mk=UTF-8
|
||||
encoding//CPU2_RAM/device/subdir_rules.mk=UTF-8
|
||||
encoding//CPU2_RAM/device/subdir_vars.mk=UTF-8
|
||||
encoding//CPU2_RAM/lib/subdir_rules.mk=UTF-8
|
||||
|
||||
@ -250,7 +250,7 @@ void setup_emif1_pinmux_async_16bit(Uint16 cpu_sel)
|
||||
{
|
||||
Uint16 i;
|
||||
|
||||
for (i=38; i<=52; i++)
|
||||
for (i=48; i<=52; i++)//38 to 52
|
||||
{
|
||||
if ((i != 42) && (i != 43))
|
||||
{
|
||||
@ -259,11 +259,17 @@ void setup_emif1_pinmux_async_16bit(Uint16 cpu_sel)
|
||||
}
|
||||
|
||||
|
||||
for (i=69; i<=92; i++)
|
||||
for (i=76; i<=82; i++) //69 to 82
|
||||
{
|
||||
if ((i != 83) && (i != 84) && (i != 85))
|
||||
{
|
||||
GPIO_SetupPinMux(i,cpu_sel,2);//D2 - D15, A13 - A19
|
||||
GPIO_SetupPinMux(i,cpu_sel,2);//D2 - D15
|
||||
}
|
||||
}
|
||||
|
||||
for (i=86; i<=92; i++) //86 to 92
|
||||
{
|
||||
{
|
||||
GPIO_SetupPinMux(i,cpu_sel,2);//A13 - A19
|
||||
}
|
||||
}
|
||||
|
||||
@ -278,7 +284,7 @@ void setup_emif1_pinmux_async_16bit(Uint16 cpu_sel)
|
||||
GpioDataRegs.GPADAT.bit.GPIO26 = 1;
|
||||
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO27 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO27 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO27 = 0;//Byte mode
|
||||
|
||||
GPIO_SetupPinMux(29,cpu_sel,9);//CS3
|
||||
GPIO_SetupPinMux(31,cpu_sel,2);//WEN
|
||||
|
||||
@ -213,7 +213,7 @@ void InitSysCtrl(void)
|
||||
ESTOP0;
|
||||
while(1);
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
//
|
||||
// Initialize the SYSPLL control to generate a 200Mhz clock
|
||||
//
|
||||
@ -258,10 +258,11 @@ void InitSysCtrl(void)
|
||||
// registers and the calibrated values will be lost.
|
||||
//
|
||||
Device_cal();
|
||||
#endif
|
||||
|
||||
#endif // _FLASH
|
||||
#endif // DEBUG
|
||||
#endif // CPU1
|
||||
|
||||
|
||||
//
|
||||
// Turn on all peripherals
|
||||
//
|
||||
|
||||
@ -10,7 +10,8 @@
|
||||
#define TEST_PASS 0xABCDABCD
|
||||
#define TEST_FAIL 0xDEADDEAD
|
||||
#define ASRAM_CS2_START_ADDR 0x100000
|
||||
#define ASRAM_CS2_SIZE 0x8000
|
||||
#define ASRAM_CS2_SIZE 0x100000
|
||||
#define STEP 0x100
|
||||
#define EMIF1 0
|
||||
#define EMIF2 1
|
||||
#define MEM_D_WIDTH 1 // 16Bit Memory Interface
|
||||
@ -43,13 +44,15 @@ extern void setup_emif1_pinmux_async_16bit(Uint16);
|
||||
// mem_read_write - This function performs simple read/write word accesses
|
||||
// to memory.
|
||||
//
|
||||
uint16_t Arr1[256], Arr2[256];
|
||||
|
||||
char
|
||||
mem_read_write(Uint32 start_addr, Uint32 mem_size)
|
||||
mem_read_write(Uint32 start_addr, Uint32 mem_size, Uint16 step)
|
||||
{
|
||||
unsigned long mem_rds;
|
||||
unsigned long mem_wds;
|
||||
long *XMEM_ps;
|
||||
unsigned int i;
|
||||
Uint32 i;
|
||||
|
||||
//
|
||||
//Write data
|
||||
@ -60,9 +63,11 @@ mem_read_write(Uint32 start_addr, Uint32 mem_size)
|
||||
//Fill memory
|
||||
//
|
||||
mem_wds = 0x01234567;
|
||||
for (i=0; i < mem_size; i++)
|
||||
for (i=0; i < mem_size; i+=step)
|
||||
{
|
||||
*XMEM_ps++ = mem_wds;
|
||||
*XMEM_ps = mem_wds;
|
||||
if(i < 256) Arr1[i] = mem_wds & 0x1FF;
|
||||
XMEM_ps += step;
|
||||
mem_wds += 0x11111111;
|
||||
}
|
||||
|
||||
@ -71,14 +76,14 @@ mem_read_write(Uint32 start_addr, Uint32 mem_size)
|
||||
//
|
||||
mem_wds = 0x01234567;
|
||||
XMEM_ps = (long *)start_addr;
|
||||
for (i=0; i < mem_size; i++)
|
||||
for (i=0; i < mem_size; i+=step)
|
||||
{
|
||||
mem_rds = *XMEM_ps;
|
||||
if( mem_rds != mem_wds)
|
||||
if( (mem_rds & 0x1FF) != (mem_wds & 0x1FF) )
|
||||
{
|
||||
return(1);
|
||||
if(i < 256) Arr2[i] = mem_rds & 0x1FF;
|
||||
}
|
||||
XMEM_ps++;
|
||||
XMEM_ps+= step;
|
||||
mem_wds += 0x11111111;
|
||||
}
|
||||
return(0);
|
||||
@ -325,8 +330,10 @@ void emif_init(void)
|
||||
//
|
||||
setup_emif1_pinmux_async_16bit(0);
|
||||
|
||||
Emif1Regs.ASYNC_WCCR.bit.WP0 = 0;
|
||||
|
||||
//
|
||||
//Configure the access timing for CS2 space
|
||||
//Configure the access timing for CS3 space
|
||||
//
|
||||
Emif1Regs.ASYNC_CS3_CR.all = (EMIF_ASYNC_ASIZE_16 | // 16Bit Memory
|
||||
// Interface
|
||||
@ -338,41 +345,41 @@ void emif_init(void)
|
||||
// of 4 Emif Clock
|
||||
EMIF_ASYNC_RSETUP_1 | // Read Setup time
|
||||
// of 1 Emif Clock
|
||||
EMIF_ASYNC_WHOLD_1 | // Write Hold time
|
||||
EMIF_ASYNC_WHOLD_8 | // Write Hold time
|
||||
// of 1 Emif Clock
|
||||
EMIF_ASYNC_WSTROBE_1 | // Write Strobe time
|
||||
EMIF_ASYNC_WSTROBE_32 | // Write Strobe time
|
||||
// of 1 Emif Clock
|
||||
EMIF_ASYNC_WSETUP_1 | // Write Setup time
|
||||
// of 1 Emif Clock
|
||||
EMIF_ASYNC_EW_DISABLE | // Extended Wait
|
||||
EMIF_ASYNC_EW_ENABLE | // Extended Wait
|
||||
// Disable.
|
||||
EMIF_ASYNC_SS_DISABLE // Strobe Select Mode
|
||||
EMIF_ASYNC_SS_ENABLE // Strobe Select Mode
|
||||
// Disable.
|
||||
);
|
||||
|
||||
//
|
||||
//Check basic RD/WR access to CS2 space
|
||||
//
|
||||
ErrCount_local = mem_read_write(ASRAM_CS2_START_ADDR, ASRAM_CS2_SIZE);
|
||||
ErrCount_local = mem_read_write(ASRAM_CS2_START_ADDR, ASRAM_CS2_SIZE, STEP);
|
||||
ErrCount = ErrCount + ErrCount_local;
|
||||
|
||||
//
|
||||
//Address walk checks (Tested for Memory with address width of 16bit)
|
||||
//
|
||||
ErrCount_local = mem_addr_walk(ASRAM_CS2_START_ADDR, 16);
|
||||
ErrCount = ErrCount + ErrCount_local;
|
||||
// ErrCount_local = mem_addr_walk(ASRAM_CS2_START_ADDR, 16);
|
||||
// ErrCount = ErrCount + ErrCount_local;
|
||||
|
||||
//
|
||||
//Data walk checks
|
||||
//
|
||||
ErrCount_local = mem_data_walk(ASRAM_CS2_START_ADDR, ASRAM_CS2_SIZE);
|
||||
ErrCount = ErrCount + ErrCount_local;
|
||||
// ErrCount_local = mem_data_walk(ASRAM_CS2_START_ADDR, ASRAM_CS2_SIZE);
|
||||
// ErrCount = ErrCount + ErrCount_local;
|
||||
|
||||
//
|
||||
//Data size checks
|
||||
//
|
||||
ErrCount_local = mem_data_size(ASRAM_CS2_START_ADDR, 4);
|
||||
ErrCount = ErrCount + ErrCount_local;
|
||||
// ErrCount_local = mem_data_size(ASRAM_CS2_START_ADDR, 4);
|
||||
// ErrCount = ErrCount + ErrCount_local;
|
||||
|
||||
if (ErrCount == 0x0)
|
||||
{
|
||||
|
||||
@ -384,12 +384,11 @@ void ipc_run(void)
|
||||
if((InCommand >> 16) == RESET_NOW)
|
||||
{
|
||||
// CpuSysRegs.SIMRESET.all = 0xA5A50002;//bit.XRSn
|
||||
|
||||
// EALLOW;
|
||||
// CmConfRegs.CMRESCTL.all = SYSCTL_CMRESCTL_RESET | SYSCTL_REG_KEY;//.bit.RESETSTS = 1;
|
||||
// DevCfgRegs.CPU2RESCTL.all = ((uint32_t)SYSCTL_CPU2RESCTL_RESET |(SYSCTL_REG_KEY & SYSCTL_CPU2RESCTL_KEY_M)); //.bit.RESET = 1;
|
||||
// EDIS;
|
||||
CpuSysRegs.SIMRESET.all = ((uint32_t)SYSCTL_REG_KEY | (uint32_t)1);
|
||||
CpuSysRegs.SIMRESET.all = ((uint32_t)SYSCTL_REG_KEY | (uint32_t)1);//ďđîăđŕěěíűé ńáđîń âńĺő ęîíňđîëëĺđîâ
|
||||
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C, 0, 0);
|
||||
IPC_setFlagLtoR(IPC_CPU1_L_CM_R,(1<<0));
|
||||
ReadFromCm = 0;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user