dev(UML-981): Повторно выкладываю osal

profinet_stack/osal/.clang-format

@@ -0,0 +1,41 @@
+AlignAfterOpenBracket: AlwaysBreak
+AlignConsecutiveAssignments: true
+AlignConsecutiveMacros: true
+AllowAllArgumentsOnNextLine: false
+AllowAllParametersOfDeclarationOnNextLine: false
+AllowShortCaseLabelsOnASingleLine: false
+AllowShortFunctionsOnASingleLine: None
+AllowShortIfStatementsOnASingleLine: Never
+BinPackArguments: false
+BinPackParameters: false
+BreakBeforeBraces: Custom
+BraceWrapping:
+  AfterCaseLabel: true
+  AfterClass: true
+  AfterControlStatement: true
+  AfterEnum: true
+  AfterFunction: true
+  AfterNamespace: true
+  AfterStruct: true
+  AfterUnion: true
+  BeforeCatch: true
+  BeforeElse: true
+  IndentBraces: false
+  SplitEmptyFunction: true
+  SplitEmptyRecord: true
+  SplitEmptyNamespace: false
+  AfterExternBlock: false
+ColumnLimit: 80
+ContinuationIndentWidth: 3
+IndentCaseLabels: false
+IndentWidth: 3
+PenaltyBreakAssignment: 10
+PenaltyBreakBeforeFirstCallParameter: 30
+PenaltyBreakComment: 10
+PenaltyBreakString: 1000
+PenaltyExcessCharacter: 15
+PenaltyReturnTypeOnItsOwnLine: 100000
+PointerAlignment: Middle
+SortIncludes: false
+SpaceBeforeParens: NonEmptyParentheses
+UseTab: Never

profinet_stack/osal/.gitignore

@@ -0,0 +1,7 @@
+build*/
+*~
+*#
+
+.cproject
+.project
+.dir-locals.el

profinet_stack/osal/CMakeLists.txt

@@ -0,0 +1,146 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2017 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+cmake_minimum_required (VERSION 3.14)
+list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/cmake")
+list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/cmake/tools")
+project (OSAL VERSION 0.1.0)
+
+include(GetGitRevision)
+
+# Default settings if this is the main project
+if (CMAKE_PROJECT_NAME STREQUAL OSAL)
+  include(CTest)
+
+  # Default to release build with debug info
+  if (NOT CMAKE_BUILD_TYPE)
+    set (CMAKE_BUILD_TYPE RelWithDebInfo CACHE STRING
+      "Choose the type of build, options are: None Debug Release RelWithDebInfo MinSizeRel."
+      FORCE)
+  endif (NOT CMAKE_BUILD_TYPE)
+
+  # Default to installing in build directory
+  if (CMAKE_INSTALL_PREFIX_INITIALIZED_TO_DEFAULT)
+    set(CMAKE_INSTALL_PREFIX ${OSAL_BINARY_DIR}/install
+      CACHE PATH "Default install path" FORCE)
+  endif()
+
+  message(STATUS "Current build type is: ${CMAKE_BUILD_TYPE}")
+  message(STATUS "Current install path is: ${CMAKE_INSTALL_PREFIX}")
+  message(STATUS "Building for ${CMAKE_SYSTEM_NAME}")
+endif()
+
+# Always use standard .o suffix
+set(CMAKE_C_OUTPUT_EXTENSION_REPLACE 1)
+set(CMAKE_CXX_OUTPUT_EXTENSION_REPLACE 1)
+
+# Generate version numbers
+configure_file (
+  version.h.in
+  ${OSAL_BINARY_DIR}/src/version.h
+  )
+
+# Add platform-dependent targets early, so they can be configured by
+# platform
+add_library(osal "")
+
+# Use position independent code if platform supports shared libraries
+get_property(SUPPORTS_SHARED GLOBAL PROPERTY TARGET_SUPPORTS_SHARED_LIBS)
+if (SUPPORTS_SHARED)
+  set_property(TARGET osal PROPERTY POSITION_INDEPENDENT_CODE ON)
+endif()
+
+if (CMAKE_PROJECT_NAME STREQUAL OSAL AND BUILD_TESTING)
+  add_executable(osal_test "")
+endif()
+
+# Platform configuration
+include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/${CMAKE_SYSTEM_NAME}.cmake)
+
+set_target_properties (osal
+  PROPERTIES
+  C_STANDARD 99
+  )
+
+target_compile_features(osal PUBLIC c_std_99)
+
+target_include_directories(osal
+  PUBLIC
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/include>
+  $<INSTALL_INTERFACE:include>
+  PRIVATE
+  src
+  ${OSAL_BINARY_DIR}/src
+  )
+
+install(
+  TARGETS osal
+  EXPORT OsalTargets
+  )
+
+install(
+  EXPORT OsalTargets
+  FILE OsalTargets.cmake
+  DESTINATION cmake
+)
+
+include(CMakePackageConfigHelpers)
+configure_package_config_file(${CMAKE_CURRENT_SOURCE_DIR}/cmake/OsalConfig.cmake.in
+  "${CMAKE_CURRENT_BINARY_DIR}/OsalConfig.cmake"
+  INSTALL_DESTINATION cmake
+  NO_SET_AND_CHECK_MACRO
+  NO_CHECK_REQUIRED_COMPONENTS_MACRO
+  )
+
+install(FILES
+  ${CMAKE_CURRENT_BINARY_DIR}/OsalConfig.cmake
+  DESTINATION cmake
+  )
+
+install(FILES
+  include/osal.h
+  include/osal_log.h
+  DESTINATION include
+  )
+
+if (CMAKE_PROJECT_NAME STREQUAL OSAL AND BUILD_TESTING)
+  add_subdirectory (test)
+  include(AddGoogleTest)
+  add_gtest(osal_test)
+endif()
+
+# Doxygen configuration
+cmake_policy(SET CMP0057 NEW)
+find_package(Doxygen)
+if (CMAKE_PROJECT_NAME STREQUAL OSAL AND DOXYGEN_FOUND)
+  set(DOXYGEN_OPTIMIZE_OUTPUT_FOR_C YES)
+  set(DOXYGEN_TYPEDEF_HIDES_STRUCT YES)
+  set(DOXYGEN_EXTRACT_STATIC YES)
+  set(DOXYGEN_STRIP_CODE_COMMENTS NO)
+  set(DOXYGEN_MACRO_EXPANSION YES)
+  set(DOXYGEN_EXPAND_ONLY_PREDEF YES)
+  set(DOXYGEN_PREDEFINED OSAL_EXPORT)
+  set(DOXYGEN_EXPAND_AS_DEFINED OSAL_EXPORT)
+  set(DOXYGEN_COLLABORATION_GRAPH NO)
+  set(DOXYGEN_INCLUDE_GRAPH NO)
+  set(DOXYGEN_INCLUDED_BY_GRAPH NO)
+  set(DOXYGEN_RECURSIVE NO)
+  set(DOXYGEN_USE_MDFILE_AS_MAINPAGE README.md)
+  doxygen_add_docs(docs
+    README.md
+    include
+    src
+    )
+endif()

profinet_stack/osal/LICENSE

@@ -0,0 +1,29 @@
+BSD 3-Clause License
+
+Copyright (c) 2020, rt-labs AB
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
+   this list of conditions and the following disclaimer in the documentation
+   and/or other materials provided with the distribution.
+
+3. Neither the name of the copyright holder nor the names of its
+   contributors may be used to endorse or promote products derived from
+   this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

profinet_stack/osal/README.md

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+OS abstraction layer
+====================
+[![Build Status](https://github.com/rtlabs-com/osal/workflows/Build/badge.svg?branch=master)](https://github.com/rtlabs-com/osal/actions?workflow=Build)
+[![CodeQL](https://github.com/rtlabs-com/osal/workflows/CodeQL/badge.svg?branch=master)](https://github.com/rtlabs-com/osal/actions?workflow=CodeQL)
+
+This repository contains an OS abstraction layer. The goal of the
+abstraction layer is to simplify writing software that runs on many
+platforms. This abstraction layer is mainly focused on threading
+functionality.
+
+Cloning
+=======
+
+Clone the source:
+
+```
+$ git clone --recurse-submodules https://github.com/rtlabs-com/osal.git
+```
+
+This will clone the repository with submodules. If you already cloned
+the repository without the `--recurse-submodules` flag then run this
+in the osal folder:
+
+```
+$ git submodule update --init --recursive
+```
+
+Prerequisites for all platforms
+===============================
+
+ * CMake 3.14 or later
+
+Windows
+=======
+
+ * Visual Studio 2017 or later
+
+You can use a windows or unix shell as preferred. The following
+instructions are for a unix shell. CMake is assumed to be in your
+path.
+
+```
+$ cmake -B build.win64 -A x64
+$ cmake --build build.win64 --config Release
+$ cmake --build build.win64 --config Release --target check
+```
+
+This builds the project and runs the unit tests.
+
+Linux
+=====
+
+ * GCC 4.6 or later
+
+```
+$ cmake -B build
+$ cmake --build build --target all check
+```
+
+This builds the project and runs the unit tests.
+
+rt-kernel
+=========
+
+ * Workbench 2020.1 or later
+
+You should use a bash shell, such as for instance the Command Line in
+your Toolbox installation. Set the BSP variable to the name of the BSP
+you wish to build for. Set the RTK variable to the path of your
+rt-kernel tree.
+
+Standalone project
+------------------
+
+This creates standalone makefiles.
+
+```
+$ RTK=/path/to/rt-kernel BSP=xmc48relax cmake \
+   -B build.xmc48relax \
+   -DCMAKE_TOOLCHAIN_FILE=cmake/tools/toolchain/rt-kernel.cmake \
+   -G "Unix Makefiles"
+$ cmake --build build.xmc48relax
+```
+
+Workbench project
+-----------------
+
+This creates a Makefile project that can be imported to Workbench. The
+project will be created in the build directory. The build directory
+should be located outside of the source tree.
+
+```
+$ RTK=/path/to/rt-kernel BSP=xmc48relax cmake \
+   -B build.xmc48relax -S /path/to/osal \
+   -DCMAKE_TOOLCHAIN_FILE=cmake/tools/toolchain/rt-kernel.cmake \
+   -DCMAKE_ECLIPSE_EXECUTABLE=/opt/rt-tools/workbench/Workbench \
+   -DCMAKE_ECLIPSE_GENERATE_SOURCE_PROJECT=TRUE \
+   -G "Eclipse CDT4 - Unix Makefiles"
+```
+
+A source project will also be created in the osal tree. This project
+can also be imported to Workbench. After importing, right-click on the
+project and choose *New* -> *Convert to a C/C++ project*. This will
+setup the project so that the indexer works correctly and the
+Workbench revision control tools can be used.
+
+The library and the unit tests will be built. Note that the tests
+require a stack of at least 6 kB. You may have to increase
+CFG_MAIN_STACK_SIZE in your bsp include/config.h file.
+
+STM32Cube / FreeRTOS / lwIP
+===========================
+
+First, clone the relevant STM32Cube repo for your platform. For
+instance, to build for STM32F7 (fetching a specific tag only):
+
+```
+$ git clone https://github.com/STMicroelectronics/STM32CubeF7.git \
+    -b v1.16.1 --single-branch --depth 1
+```
+
+Then, when configuring specify CPU, board and path to the cloned git
+repository:
+
+```
+$ CPU=cortex-m7fd BOARD=STM32F769I-DISCO CUBE_DIR=/path/to/cube cmake \
+    -B build.cube \
+    -DCMAKE_TOOLCHAIN_FILE=cmake/tools/toolchain/stm32cube.cmake \
+    -G "Unix Makefiles"
+$ cmake --build build.cube
+```
+

profinet_stack/osal/cmake/Linux.cmake

@@ -0,0 +1,57 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2017 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+find_package(Threads)
+
+option (USE_SCHED_FIFO
+  "Use SCHED_FIFO policy. May require extra privileges to run"
+  OFF)
+
+target_sources(osal PRIVATE
+  src/linux/osal.c
+  src/linux/osal_log.c
+  )
+
+target_compile_options(osal
+  PRIVATE
+  -Wall
+  -Wextra
+  -Werror
+  -Wno-unused-parameter
+  $<$<BOOL:${USE_SCHED_FIFO}>:-DUSE_SCHED_FIFO>
+  INTERFACE
+  $<$<CONFIG:Coverage>:--coverage>
+  )
+
+target_include_directories(osal PUBLIC
+  $<BUILD_INTERFACE:${PROJECT_SOURCE_DIR}/src/linux>
+  )
+
+target_link_libraries(osal PUBLIC
+  Threads::Threads
+  rt
+  INTERFACE
+  $<$<CONFIG:Coverage>:--coverage>
+  )
+
+install(FILES
+  src/linux/sys/osal_cc.h
+  src/linux/sys/osal_sys.h
+  DESTINATION include/sys
+  )
+
+if (BUILD_TESTING)
+  set(GOOGLE_TEST_INDIVIDUAL TRUE)
+endif()

profinet_stack/osal/cmake/OsalConfig.cmake.in

@@ -0,0 +1,9 @@
+
+if(${CMAKE_SYSTEM_NAME} STREQUAL "Linux")
+    find_package(Threads REQUIRED)
+endif()
+
+
+@PACKAGE_INIT@
+
+include ( "${CMAKE_CURRENT_LIST_DIR}/OsalTargets.cmake" )

profinet_stack/osal/cmake/STM32Cube.cmake

@@ -0,0 +1,44 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2021 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+target_sources(osal PRIVATE
+  src/freertos/osal.c
+  src/freertos/osal_log.c
+  )
+
+target_compile_options(osal
+  PRIVATE
+  -Wall
+  -Wextra
+  -Werror
+  -Wno-unused-parameter
+  )
+
+target_include_directories(osal PUBLIC
+  $<BUILD_INTERFACE:${PROJECT_SOURCE_DIR}/src/freertos>
+  )
+
+install(FILES
+  src/freertos/sys/osal_cc.h
+  src/freertos/sys/osal_sys.h
+  DESTINATION include/sys
+  )
+
+add_library(cube)
+target_link_libraries(osal cube)
+install(TARGETS cube EXPORT OsalTargets)
+
+set(CORE_DIR src/freertos/${BOARD})
+include(STM32Cube/${BOARD})

profinet_stack/osal/cmake/STM32Cube/STM32F769I-DISCO.cmake

@@ -0,0 +1,152 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2021 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+target_compile_options(cube PUBLIC
+  -DUSE_HAL_DRIVER
+  -DSTM32F769xx
+  )
+
+target_include_directories(cube PUBLIC
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Inc>
+  $<INSTALL_INTERFACE:bsp/Inc>
+
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/include
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2
+
+  ${CUBE_DIR}/Drivers/CMSIS/Device/ST/STM32F7xx/Include
+  ${CUBE_DIR}/Drivers/CMSIS/Include
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Inc
+
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/include
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/system
+
+  ${CUBE_DIR}/Middlewares/Third_Party/FatFs/src
+  )
+
+target_include_directories(cube PRIVATE
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/include/compat/posix
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/include/compat/posix/net
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/include/compat/posix/sys
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/include/compat/stdc
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/include/netif
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/system/arch
+  )
+
+target_sources(cube PRIVATE
+  ${CORE_DIR}/Src/bsp_driver_sd.c
+  ${CORE_DIR}/Src/ethernetif.c
+  ${CORE_DIR}/Src/fatfs.c
+  ${CORE_DIR}/Src/fatfs_platform.c
+  ${CORE_DIR}/Src/lwip.c
+  ${CORE_DIR}/Src/sd_diskio.c
+
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/list.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/api_lib.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/api_msg.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/err.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/if_api.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/netbuf.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/netdb.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/netifapi.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/sockets.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/api/tcpip.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/def.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/init.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/ip.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/mem.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/memp.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/netif.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/pbuf.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/stats.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/tcp.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/tcp_in.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/tcp_out.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/timeouts.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/core/udp.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/src/netif/ethernet.c
+  ${CUBE_DIR}/Middlewares/Third_Party/LwIP/system/OS/sys_arch.c
+
+  ${CUBE_DIR}/Middlewares/Third_Party/FatFs/src/diskio.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FatFs/src/ff.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FatFs/src/ff_gen_drv.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FatFs/src/ff_gen_drv.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FatFs/src/option/ccsbcs.c
+  ${CUBE_DIR}/Middlewares/Third_Party/FatFs/src/option/syscall.c
+
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c
+  ${CUBE_DIR}/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c
+  )
+
+add_library(cube-bsp INTERFACE)
+target_sources(cube-bsp INTERFACE
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/freertos.c>
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/main.c>
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/startup_stm32f769xx.s>
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/stm32f7xx_hal_msp.c>
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/stm32f7xx_hal_timebase_tim.c>
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/stm32f7xx_it.c>
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/stubs.c>
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/syscalls.c>
+  $<BUILD_INTERFACE:${OSAL_SOURCE_DIR}/${CORE_DIR}/Src/system_stm32f7xx.c>
+
+  $<INSTALL_INTERFACE:bsp/Src/freertos.c>
+  $<INSTALL_INTERFACE:bsp/Src/main.c>
+  $<INSTALL_INTERFACE:bsp/Src/startup_stm32f769xx.s>
+  $<INSTALL_INTERFACE:bsp/Src/stm32f7xx_hal_msp.c>
+  $<INSTALL_INTERFACE:bsp/Src/stm32f7xx_hal_timebase_tim.c>
+  $<INSTALL_INTERFACE:bsp/Src/stm32f7xx_it.c>
+  $<INSTALL_INTERFACE:bsp/Src/stubs.c>
+  $<INSTALL_INTERFACE:bsp/Src/syscalls.c>
+  $<INSTALL_INTERFACE:bsp/Src/system_stm32f7xx.c>
+  )
+target_link_options(cube-bsp INTERFACE
+  -specs=nano.specs
+  -T${OSAL_SOURCE_DIR}/${CORE_DIR}/STM32F769NIHx_FLASH.ld
+  )
+target_link_libraries(cube-bsp INTERFACE cube)
+if (CMAKE_PROJECT_NAME STREQUAL OSAL AND BUILD_TESTING)
+  target_link_libraries(osal_test PRIVATE cube-bsp)
+endif()
+
+install(TARGETS cube-bsp EXPORT OsalTargets)
+install(DIRECTORY ${CORE_DIR}/Src DESTINATION bsp)
+install(DIRECTORY ${CORE_DIR}/Inc DESTINATION bsp)

profinet_stack/osal/cmake/Windows.cmake

@@ -0,0 +1,46 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2017 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+target_sources(osal PRIVATE
+  src/windows/osal.c
+  src/windows/osal_log.c
+  )
+
+target_compile_options(osal
+  PRIVATE
+  /W4
+  /WX
+  /wd4100
+  /wd4152
+  PUBLIC
+  /wd4200
+  )
+
+target_link_libraries(osal
+  winmm)
+
+target_include_directories(osal PUBLIC
+  $<BUILD_INTERFACE:${PROJECT_SOURCE_DIR}/src/windows>
+  )
+
+install(FILES
+  src/windows/sys/osal_cc.h
+  src/windows/sys/osal_sys.h
+  DESTINATION include/sys
+  )
+
+if (BUILD_TESTING)
+  set(GOOGLE_TEST_INDIVIDUAL TRUE)
+endif()

profinet_stack/osal/cmake/rt-kernel.cmake

@@ -0,0 +1,37 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2017 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+target_sources(osal PRIVATE
+  src/rt-kernel/osal.c
+  src/rt-kernel/osal_log.c
+  )
+
+target_compile_options(osal
+  PRIVATE
+  -Wall
+  -Wextra
+  -Werror
+  -Wno-unused-parameter
+  )
+
+target_include_directories(osal PUBLIC
+  $<BUILD_INTERFACE:${PROJECT_SOURCE_DIR}/src/rt-kernel>
+  )
+
+install(FILES
+  src/rt-kernel/sys/osal_cc.h
+  src/rt-kernel/sys/osal_sys.h
+  DESTINATION include/sys
+  )

profinet_stack/osal/cmake/tools/.gitattributes

@@ -0,0 +1,2 @@
+# Auto detect text files and perform LF normalization
+* text=auto

profinet_stack/osal/cmake/tools/.gitignore

@@ -0,0 +1,7 @@
+build*/
+*~
+*#
+
+.cproject
+.project
+.dir-locals.el

profinet_stack/osal/cmake/tools/AddGoogleTest.cmake

@@ -0,0 +1,86 @@
+
+cmake_minimum_required(VERSION 3.14)
+
+if (CMAKE_COMPILER_IS_GNUCC AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS 5.0)
+  # gtest doesn't build on older GCC
+  message(FATAL_ERROR
+    "GTest needs at least GCC version 5. Set BUILD_TESTING=OFF to disable tests.")
+endif()
+
+set(gtest_force_shared_crt ON CACHE BOOL "" FORCE)
+if (CMAKE_SYSTEM_NAME STREQUAL rt-kernel)
+  set(gtest_disable_pthreads ON CACHE BOOL "" FORCE)
+  list(APPEND GTEST_COMPILE_OPTIONS
+    -D_POSIX_C_SOURCE=200809L
+    -Wno-psabi
+    )
+endif()
+if (CMAKE_SYSTEM_NAME STREQUAL STM32Cube)
+  set(gtest_disable_pthreads ON CACHE BOOL "" FORCE)
+  list(APPEND GTEST_COMPILE_OPTIONS
+    -D_POSIX_C_SOURCE=200809L
+    -Wno-psabi
+     -D_POSIX_PATH_MAX=80
+    )
+endif()
+
+include(FetchContent)
+FetchContent_Declare(
+  googletest
+  GIT_REPOSITORY      https://github.com/rtlabs-com/googletest.git
+  GIT_TAG             25808659d317cb03409e7949914b274e10e6824f
+  )
+FetchContent_GetProperties(googletest)
+if(NOT googletest_POPULATED)
+  FetchContent_Populate(googletest)
+  set(INSTALL_GTEST OFF CACHE BOOL "")
+  add_subdirectory(${googletest_SOURCE_DIR} ${googletest_BINARY_DIR} EXCLUDE_FROM_ALL)
+  target_compile_options(gtest PRIVATE ${GTEST_COMPILE_OPTIONS})
+endif()
+
+add_custom_target(check COMMAND ${CMAKE_CTEST_COMMAND}
+  --force-new-ctest-process
+  --output-on-failure
+  --build-config "$<CONFIGURATION>")
+set_target_properties(check PROPERTIES FOLDER "Scripts")
+
+if(GOOGLE_TEST_INDIVIDUAL)
+  include(GoogleTest)
+endif()
+
+macro(add_gtest TESTNAME)
+  target_link_libraries(${TESTNAME} PUBLIC gtest)
+
+  if (BUILD_GMOCK)
+    target_link_libraries(${TESTNAME} PUBLIC gmock)
+  endif()
+
+  if(GOOGLE_TEST_INDIVIDUAL)
+    gtest_discover_tests(${TESTNAME}
+      TEST_PREFIX "${TESTNAME}."
+      PROPERTIES FOLDER "Tests")
+  else()
+    add_test(${TESTNAME} ${TESTNAME})
+    set_target_properties(${TESTNAME} PROPERTIES FOLDER "Tests")
+  endif()
+
+endmacro()
+
+mark_as_advanced(
+  gmock_build_tests
+  gtest_build_samples
+  gtest_build_tests
+  gtest_disable_pthreads
+  gtest_force_shared_crt
+  gtest_hide_internal_symbols
+  BUILD_GMOCK
+  BUILD_GTEST
+  )
+
+set_target_properties(gtest gtest_main
+  PROPERTIES FOLDER "Extern")
+
+if(BUILD_GMOCK)
+  set_target_properties(gmock gmock_main
+    PROPERTIES FOLDER "Extern")
+endif()

profinet_stack/osal/cmake/tools/AddOsal.cmake

@@ -0,0 +1,63 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2020 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+# Find OSAL library. This module supports three use-cases:
+#
+# 1) OSAL sibling project
+#
+# If a target named OSAL exists then this module does nothing. This
+# would be the case if OSAL is managed by a superproject.
+#
+# 2) External OSAL
+#
+# Search for and use an external OSAL. CMake will find the external
+# OSAL library if it is installed in a default location such as
+# /usr/include or /usr/local/include. You can also give a search hint
+# by setting the Osal_DIR variable. This could be the case for a
+# native build or a cross-compiled Linux system with a staging folder.
+#
+# 3) Automatic download and build of OSAL
+#
+# Finally, if OSAL is not found in the system it will be downloaded
+# and built automatically.
+
+cmake_minimum_required(VERSION 3.14)
+
+if (NOT TARGET osal)
+  # Attempt to find externally built OSAL
+  find_package(Osal QUIET)
+
+  if (NOT Osal_FOUND)
+    # Download and build OSAL locally as a static library
+    include(FetchContent)
+    FetchContent_Declare(
+      osal
+      GIT_REPOSITORY      https://github.com/rtlabs-com/osal.git
+      GIT_TAG             24c6e4c
+      )
+    FetchContent_GetProperties(osal)
+    if(NOT osal_POPULATED)
+      FetchContent_Populate(osal)
+      set(BUILD_SHARED_LIBS_OLD ${BUILD_SHARED_LIBS})
+      set(BUILD_SHARED_LIBS OFF CACHE INTERNAL "" FORCE)
+      add_subdirectory(${osal_SOURCE_DIR} ${osal_BINARY_DIR} EXCLUDE_FROM_ALL)
+      set(BUILD_SHARED_LIBS ${BUILD_SHARED_LIBS_OLD} CACHE BOOL "" FORCE)
+    endif()
+
+    # Hide Osal_DIR to avoid confusion, as it is not used in this
+    # configuration
+    mark_as_advanced(Osal_DIR)
+  endif()
+endif()

profinet_stack/osal/cmake/tools/FindSphinx.cmake

@@ -0,0 +1,16 @@
+
+# Look for an executable called sphinx-build
+find_program(
+  SPHINX_EXECUTABLE
+  NAMES sphinx-build
+  DOC "Path to sphinx-build executable"
+  )
+
+include(FindPackageHandleStandardArgs)
+
+# Handle standard arguments to find_package like REQUIRED and QUIET
+find_package_handle_standard_args(
+  Sphinx
+  "Failed to find sphinx-build executable"
+  SPHINX_EXECUTABLE
+  )

profinet_stack/osal/cmake/tools/GetGitRevision.cmake

@@ -0,0 +1,25 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2020 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+# Get git revision if available, as projectname_GIT_REVISION
+
+find_package(Git QUIET)
+execute_process(COMMAND
+  "${GIT_EXECUTABLE}" describe --tags --always --dirty
+  WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}"
+  OUTPUT_VARIABLE "${CMAKE_PROJECT_NAME}_GIT_REVISION"
+  ERROR_QUIET
+  OUTPUT_STRIP_TRAILING_WHITESPACE
+  )

profinet_stack/osal/cmake/tools/LICENSE

@@ -0,0 +1,29 @@
+BSD 3-Clause License
+
+Copyright (c) 2020, rt-labs AB
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
+   this list of conditions and the following disclaimer in the documentation
+   and/or other materials provided with the distribution.
+
+3. Neither the name of the copyright holder nor the names of its
+   contributors may be used to endorse or promote products derived from
+   this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

profinet_stack/osal/cmake/tools/Platform/STM32Cube.cmake

@@ -0,0 +1,80 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2021 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+include_guard()
+cmake_minimum_required (VERSION 3.1.2)
+enable_language(ASM)
+
+# Avoid warning when re-running cmake
+set(DUMMY ${CMAKE_TOOLCHAIN_FILE})
+
+# No support for shared libs
+set_property(GLOBAL PROPERTY TARGET_SUPPORTS_SHARED_LIBS FALSE)
+
+set(UNIX 1)
+set(CMAKE_STATIC_LIBRARY_PREFIX "lib")
+set(CMAKE_STATIC_LIBRARY_SUFFIX ".a")
+set(CMAKE_EXECUTABLE_SUFFIX ".elf")
+
+# Do not build executables during configuration stage. Required
+# libraries may not be built yet.
+set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
+
+# Prefer standard extensions
+set(CMAKE_C_OUTPUT_EXTENSION_REPLACE 1)
+set(CMAKE_CXX_OUTPUT_EXTENSION_REPLACE 1)
+set(CMAKE_ASM_OUTPUT_EXTENSION_REPLACE 1)
+
+# Add machine-specific flags
+add_definitions(${MACHINE})
+add_link_options(${MACHINE})
+
+# Common flags
+add_definitions(
+  -fdata-sections
+  -ffunction-sections
+  )
+
+# Common includes
+list (APPEND INCLUDES
+  # nothing yet
+  )
+
+set(CMAKE_ASM_STANDARD_INCLUDE_DIRECTORIES ${INCLUDES})
+set(CMAKE_C_STANDARD_INCLUDE_DIRECTORIES ${INCLUDES})
+set(CMAKE_CXX_STANDARD_INCLUDE_DIRECTORIES ${INCLUDES})
+
+# Linker flags
+add_link_options(
+  -Wl,--gc-sections
+  )
+
+# Libraries
+list (APPEND LIBS
+  -lc
+  -lm
+  -lnosys
+  )
+list(JOIN LIBS " " LIBS) # Convert list to space separated string
+set(CMAKE_C_STANDARD_LIBRARIES ${LIBS})
+set(CMAKE_CXX_STANDARD_LIBRARIES "${LIBS} -lstdc++")
+
+# Macro to add .bin output
+macro(generate_bin TARGET)
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${OBJCOPY}
+    ARGS -O binary ${TARGET}.elf ${TARGET}.bin
+    )
+endmacro()

profinet_stack/osal/cmake/tools/Platform/rt-kernel.cmake

@@ -0,0 +1,111 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2017 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+include_guard()
+cmake_minimum_required (VERSION 3.1.2)
+
+# Avoid warning when re-running cmake
+set(DUMMY ${CMAKE_TOOLCHAIN_FILE})
+
+# No support for shared libs
+set_property(GLOBAL PROPERTY TARGET_SUPPORTS_SHARED_LIBS FALSE)
+
+set(UNIX 1)
+set(CMAKE_STATIC_LIBRARY_PREFIX "lib")
+set(CMAKE_STATIC_LIBRARY_SUFFIX ".a")
+set(CMAKE_EXECUTABLE_SUFFIX ".elf")
+
+# Do not build executables during configuration stage. Required
+# libraries may not be built yet.
+set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
+
+# Prefer standard extensions
+set(CMAKE_C_OUTPUT_EXTENSION_REPLACE 1)
+set(CMAKE_CXX_OUTPUT_EXTENSION_REPLACE 1)
+set(CMAKE_ASM_OUTPUT_EXTENSION_REPLACE 1)
+
+# Add machine-specific flags
+add_definitions(${MACHINE})
+add_link_options(${MACHINE})
+
+if (NOT ${VARIANT} STREQUAL "")
+  add_definitions(-D${VARIANT})
+endif()
+
+# Common flags
+add_definitions(
+  -ffunction-sections
+  -fomit-frame-pointer
+  -fno-strict-aliasing
+  -fshort-wchar
+  )
+
+# Common includes
+list (APPEND INCLUDES
+  ${RTK}/bsp/${BSP}/include
+  ${RTK}/include
+  ${RTK}/include/arch/${ARCH}
+  ${RTK}/lwip/src/include
+  )
+set(CMAKE_ASM_STANDARD_INCLUDE_DIRECTORIES ${INCLUDES})
+set(CMAKE_C_STANDARD_INCLUDE_DIRECTORIES ${INCLUDES})
+set(CMAKE_CXX_STANDARD_INCLUDE_DIRECTORIES ${INCLUDES})
+
+# Linker flags
+add_link_options(
+  -nostartfiles
+  -L${RTK}/lib/${ARCH}/${VARIANT}/${CPU}
+  -T${RTK}/bsp/${BSP}/${BSP}.ld
+  -Wl,--gc-sections
+  )
+
+# Libraries
+list (APPEND LIBS
+  -l${BSP}
+  -l${ARCH}
+  -lkern
+  -ldev
+  -lsio
+  -lblock
+  -lfs
+  -lusb
+  -llwip
+  -lptpd
+  -leth
+  -li2c
+  -lrtc
+  -lcan
+  -lnand
+  -lspi
+  -lnor
+  -lpwm
+  -ladc
+  -ldac
+  -ltrace
+  -lcounter
+  -lshell
+  -llua
+  -lc
+  -lm
+  )
+list(JOIN LIBS " " LIBS) # Convert list to space separated string
+set(CMAKE_C_STANDARD_LIBRARIES ${LIBS})
+set(CMAKE_CXX_STANDARD_LIBRARIES "${LIBS} -lstdc++")
+
+# Group libraries when linking
+
+set(CMAKE_C_LINK_EXECUTABLE "<CMAKE_C_COMPILER> <FLAGS> <CMAKE_C_LINK_FLAGS> <LINK_FLAGS> <OBJECTS> -o <TARGET> -Wl,--start-group <LINK_LIBRARIES> -Wl,--end-group")
+
+set(CMAKE_CXX_LINK_EXECUTABLE "<CMAKE_CXX_COMPILER> <FLAGS> <CMAKE_CXX_LINK_FLAGS> <LINK_FLAGS> <OBJECTS> -o <TARGET> -Wl,--start-group <LINK_LIBRARIES> -Wl,--end-group")

profinet_stack/osal/cmake/tools/README.md

@@ -0,0 +1,5 @@
+CMake tools and utilities
+=========================
+
+This repository contains common cmake functionality for rt-labs
+open-source projects.

profinet_stack/osal/cmake/tools/toolchain/arm7tdmi.cmake

@@ -0,0 +1,17 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2014 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mthumb-interwork
+  -mlittle-endian
+  -mthumb
+  )

profinet_stack/osal/cmake/tools/toolchain/arm926ej-s.cmake

@@ -0,0 +1,16 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2010 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mlittle-endian
+  -mcpu=arm926ej-s
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-a8-neon.cmake

@@ -0,0 +1,17 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2017 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mcpu=cortex-a8
+  -mfpu=neon
+  -mfloat-abi=hard
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-a8.cmake

@@ -0,0 +1,16 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2011 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mfpu=neon
+  -mcpu=cortex-a8
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-a9-vfp.cmake

@@ -0,0 +1,17 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2014 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mcpu=cortex-a9
+  -mfpu=vfpv3-d16
+  -mfloat-abi=hard
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-a9.cmake

@@ -0,0 +1,16 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2014 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mfpu=neon
+  -mcpu=cortex-a9
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-m3.cmake

@@ -0,0 +1,17 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2011 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mfpu=vfp
+  -mcpu=cortex-m3
+  -mthumb
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-m4.cmake

@@ -0,0 +1,17 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2011 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mfpu=vfp
+  -mcpu=cortex-m3
+  -mthumb
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-m4f.cmake

@@ -0,0 +1,18 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2011 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mcpu=cortex-m4
+  -mthumb
+  -mfloat-abi=hard
+  -mfpu=fpv4-sp-d16
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-m7f.cmake

@@ -0,0 +1,18 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2011 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mcpu=cortex-m7
+  -mthumb
+  -mfloat-abi=hard
+  -mfpu=fpv4-sp-d16
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-m7fd.cmake

@@ -0,0 +1,18 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2011 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mcpu=cortex-m7
+  -mthumb
+  -mfloat-abi=hard
+  -mfpu=fpv5-d16
+  )

profinet_stack/osal/cmake/tools/toolchain/cortex-r5-vfp.cmake

@@ -0,0 +1,18 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2018 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mcpu=cortex-r5
+  -mthumb
+  -mfloat-abi=hard
+  -mfpu=vfpv3-d16
+  )

profinet_stack/osal/cmake/tools/toolchain/e200.cmake

@@ -0,0 +1,18 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2011 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mcpu=8540
+  -mregnames
+  -mmultiple
+  -mabi=spe
+  )

profinet_stack/osal/cmake/tools/toolchain/ppc604.cmake

@@ -0,0 +1,19 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# http://www.rt-labs.com
+# Copyright 2011 rt-labs AB, Sweden.
+# See LICENSE file in the project root for full license information.
+#*******************************************************************/
+
+list(APPEND MACHINE
+  -mbig
+  -mregnames
+  -mcpu=powerpc
+  -mcall-sysv
+  -meabi
+  )

profinet_stack/osal/cmake/tools/toolchain/rt-kernel.cmake

@@ -0,0 +1,92 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2017 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+#[=======================================================================[.rst:
+rt-kernel toolchain
+-------------------
+
+The following environment variables must be set when cmake
+configuration is invoked::
+
+  RTK           - Location of rt-kernel tree
+  BSP           - Name of Board Support Package
+
+The following environment variables are optional::
+
+  COMPILERS     - Compiler search path, defaults to /opt/rt-tools/compilers
+
+Your CMAKE_MODULE_PATH must also be configured so that
+Platform/rt-kernel.cmake can be found.
+
+Example to build for the xmc48relax board::
+
+  RTK=/path/to/rt-kernel BSP=xmc48relax cmake \
+     -B build.xmc48relax \
+     -DCMAKE_TOOLCHAIN_FILE=/path/to/rt-kernel.cmake
+#]=======================================================================]
+
+include_guard()
+
+# The name of the target operating system
+set(CMAKE_SYSTEM_NAME rt-kernel)
+
+# Default toolchain search path
+if (NOT DEFINED ENV{COMPILERS})
+  set(ENV{COMPILERS} "/opt/rt-tools/compilers")
+endif()
+
+# Get environment variables
+set(RTK $ENV{RTK} CACHE STRING
+  "Location of rt-kernel tree")
+set(COMPILERS $ENV{COMPILERS} CACHE STRING
+  "Location of compiler toolchain")
+set(BSP $ENV{BSP} CACHE STRING
+  "The name of the BSP to build for")
+
+# Check that bsp.mk exists
+set(BSP_MK_FILE ${RTK}/bsp/${BSP}/${BSP}.mk)
+if (NOT EXISTS ${BSP_MK_FILE})
+  message(FATAL_ERROR "Failed to open ${BSP_MK_FILE}")
+endif()
+
+# Slurp bsp.mk contents
+file(READ ${BSP_MK_FILE} BSP_MK)
+
+# Get CPU
+string(REGEX MATCH "CPU=([A-Za-z0-9_\-]*)" _ ${BSP_MK})
+set(CPU ${CMAKE_MATCH_1} CACHE STRING "")
+
+# Get ARCH
+string(REGEX MATCH "ARCH=([A-Za-z0-9_\-]*)" _ ${BSP_MK})
+set(ARCH ${CMAKE_MATCH_1} CACHE STRING "")
+
+# Get VARIANT
+string(REGEX MATCH "VARIANT=([A-Za-z0-9_\-]*)" _ ${BSP_MK})
+set(VARIANT ${CMAKE_MATCH_1} CACHE STRING "")
+
+# Get CROSS_GCC
+string(REGEX MATCH "CROSS_GCC=([A-Za-z0-9_\-]*)" _ ${BSP_MK})
+set(CROSS_GCC ${CMAKE_MATCH_1} CACHE STRING "")
+
+# Set cross-compiler toolchain
+set(CMAKE_C_COMPILER ${COMPILERS}/${CROSS_GCC}/bin/${CROSS_GCC}-gcc)
+set(CMAKE_CXX_COMPILER ${CMAKE_C_COMPILER})
+if(CMAKE_HOST_WIN32)
+  set(CMAKE_C_COMPILER ${CMAKE_C_COMPILER}.exe)
+  set(CMAKE_CXX_COMPILER ${CMAKE_CXX_COMPILER}.exe)
+endif(CMAKE_HOST_WIN32)
+
+# Set cross-compiler machine-specific flags
+include(toolchain/${CPU})

profinet_stack/osal/cmake/tools/toolchain/stm32cube.cmake

@@ -0,0 +1,54 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2021 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+#[=======================================================================[.rst:
+STM32Cube toolchain
+-------------------
+
+The following environment variables must be set when cmake
+configuration is invoked::
+
+  CPU           - Name of CPU
+  BOARD         - Name of board
+  CUBE_DIR      - Path to STM32Cube firmware
+
+Machine-specific flags will be loaded from toolchain/${CPU}.cmake. See
+the toolchain folder for known values.
+
+Your CMAKE_MODULE_PATH must also be configured so that
+Platform/STM32Cube.cmake can be found.
+#]=======================================================================]
+
+include_guard()
+
+# The name of the target operating system
+set(CMAKE_SYSTEM_NAME STM32Cube)
+
+set(CPU $ENV{CPU} CACHE STRING "")
+set(BOARD $ENV{BOARD} CACHE STRING "")
+set(CUBE_DIR $ENV{CUBE_DIR} CACHE STRING "")
+
+# Set cross-compiler toolchain
+set(CMAKE_C_COMPILER arm-none-eabi-gcc)
+set(CMAKE_CXX_COMPILER ${CMAKE_C_COMPILER})
+set(OBJCOPY arm-none-eabi-objcopy)
+if(CMAKE_HOST_WIN32)
+  set(CMAKE_C_COMPILER ${CMAKE_C_COMPILER}.exe)
+  set(CMAKE_CXX_COMPILER ${CMAKE_CXX_COMPILER}.exe)
+  set(OBJCOPY ${OBJCOPY}.exe)
+endif(CMAKE_HOST_WIN32)
+
+# Set cross-compiler machine-specific flags
+include(toolchain/${CPU})

profinet_stack/osal/include/osal.h

@@ -0,0 +1,131 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef OSAL_H
+#define OSAL_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdarg.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "sys/osal_sys.h"
+#include "sys/osal_cc.h"
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+#ifndef MAX
+#define MAX(a, b) (((a) > (b)) ? (a) : (b))
+#endif
+
+#ifndef BIT
+#define BIT(n) (1U << (n))
+#endif
+
+#ifndef NELEMENTS
+#define NELEMENTS(a) (sizeof (a) / sizeof ((a)[0]))
+#endif
+
+#ifndef OS_WAIT_FOREVER
+#define OS_WAIT_FOREVER 0xFFFFFFFF
+#endif
+
+#ifndef OS_MAIN
+#define OS_MAIN int main
+#endif
+
+#ifndef OS_MUTEX
+typedef void os_mutex_t;
+#endif
+
+#ifndef OS_SEM
+typedef void os_sem_t;
+#endif
+
+#ifndef OS_THREAD
+typedef void os_thread_t;
+#endif
+
+#ifndef OS_EVENT
+typedef void os_event_t;
+#endif
+
+#ifndef OS_MBOX
+typedef void os_mbox_t;
+#endif
+
+#ifndef OS_TIMER
+typedef void os_timer_t;
+#endif
+
+void * os_malloc (size_t size);
+void os_free (void * ptr);
+
+void os_usleep (uint32_t us);
+uint32_t os_get_current_time_us (void);
+
+os_thread_t * os_thread_create (
+   const char * name,
+   uint32_t priority,
+   size_t stacksize,
+   void (*entry) (void * arg),
+   void * arg);
+
+os_mutex_t * os_mutex_create (void);
+void os_mutex_lock (os_mutex_t * mutex);
+void os_mutex_unlock (os_mutex_t * mutex);
+void os_mutex_destroy (os_mutex_t * mutex);
+
+os_sem_t * os_sem_create (size_t count);
+bool os_sem_wait (os_sem_t * sem, uint32_t time);
+void os_sem_signal (os_sem_t * sem);
+void os_sem_destroy (os_sem_t * sem);
+
+os_event_t * os_event_create (void);
+bool os_event_wait (
+   os_event_t * event,
+   uint32_t mask,
+   uint32_t * value,
+   uint32_t time);
+void os_event_set (os_event_t * event, uint32_t value);
+void os_event_clr (os_event_t * event, uint32_t value);
+void os_event_destroy (os_event_t * event);
+
+os_mbox_t * os_mbox_create (size_t size);
+bool os_mbox_fetch (os_mbox_t * mbox, void ** msg, uint32_t time);
+bool os_mbox_post (os_mbox_t * mbox, void * msg, uint32_t time);
+void os_mbox_destroy (os_mbox_t * mbox);
+
+os_timer_t * os_timer_create (
+   uint32_t us,
+   void (*fn) (os_timer_t * timer, void * arg),
+   void * arg,
+   bool oneshot);
+void os_timer_set (os_timer_t * timer, uint32_t us);
+void os_timer_start (os_timer_t * timer);
+void os_timer_stop (os_timer_t * timer);
+void os_timer_destroy (os_timer_t * timer);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* OSAL_H */

profinet_stack/osal/include/osal_log.h

@@ -0,0 +1,78 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef OSAL_LOG_H
+#define OSAL_LOG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "osal.h"
+
+/* Log levels */
+#define LOG_LEVEL_DEBUG   0x00
+#define LOG_LEVEL_INFO    0x01
+#define LOG_LEVEL_WARNING 0x02
+#define LOG_LEVEL_ERROR   0x03
+#define LOG_LEVEL_FATAL   0x04
+#define LOG_LEVEL_MASK    0x07
+#define LOG_LEVEL_GET(t)  (t & LOG_LEVEL_MASK)
+
+/* Log states */
+#define LOG_STATE_ON  0x80
+#define LOG_STATE_OFF 0x00
+
+#define LOG_ENABLED(type)                                                      \
+   ((LOG_LEVEL_GET (type) >= LOG_LEVEL) && (type & LOG_STATE_ON))
+
+/** Log a message if it is enabled */
+#define LOG(type, ...)                                                         \
+   do                                                                          \
+   {                                                                           \
+      if (LOG_ENABLED (type))                                                  \
+      {                                                                        \
+         os_log (type, __VA_ARGS__);                                           \
+      }                                                                        \
+   } while (0)
+
+/** Log debug messages */
+#define LOG_DEBUG(type, ...) LOG ((LOG_LEVEL_DEBUG | type), __VA_ARGS__)
+
+/** Log informational messages */
+#define LOG_INFO(type, ...) LOG ((LOG_LEVEL_INFO | type), __VA_ARGS__)
+
+/** Log warning messages */
+#define LOG_WARNING(type, ...) LOG ((LOG_LEVEL_WARNING | type), __VA_ARGS__)
+
+/** Log error messages */
+#define LOG_ERROR(type, ...) LOG ((LOG_LEVEL_ERROR | type), __VA_ARGS__)
+
+/** Log fatal messages */
+#define LOG_FATAL(type, ...) LOG ((LOG_LEVEL_FATAL | type), __VA_ARGS__)
+
+#define LOG_DEBUG_ENABLED(type)   LOG_ENABLED (LOG_LEVEL_DEBUG | type)
+#define LOG_INFO_ENABLED(type)    LOG_ENABLED (LOG_LEVEL_INFO | type)
+#define LOG_WARNING_ENABLED(type) LOG_ENABLED (LOG_LEVEL_WARNING | type)
+#define LOG_ERROR_ENABLED(type)   LOG_ENABLED (LOG_LEVEL_ERROR | type)
+#define LOG_FATAL_ENABLED(type)   LOG_ENABLED (LOG_LEVEL_FATAL | type)
+
+void os_log (uint8_t type, const char * fmt, ...) CC_FORMAT (2, 3);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* OSAL_LOG_H */

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/FreeRTOSConfig.h

@@ -0,0 +1,161 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          1
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 56 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)65536)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_STATS_FORMATTING_FUNCTIONS     1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configCHECK_FOR_STACK_OVERFLOW           2
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_MALLOC_FAILED_HOOK             1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  0
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS                         1
+#define configTIMER_TASK_PRIORITY                ( 2 )
+#define configTIMER_QUEUE_LENGTH                 10
+#define configTIMER_TASK_STACK_DEPTH             256
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              1
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_xTimerPendFunctionCall       1
+#define INCLUDE_xQueueGetMutexHolder         1
+#define INCLUDE_uxTaskGetStackHighWaterMark  1
+#define INCLUDE_eTaskGetState                1
+
+/*
+ * The CMSIS-RTOS V2 FreeRTOS wrapper is dependent on the heap implementation used
+ * by the application thus the correct define need to be enabled below
+ */
+#define USE_FreeRTOS_HEAP_4
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/bsp_driver_sd.h

@@ -0,0 +1,90 @@
+/**
+ ******************************************************************************
+  * @file    bsp_driver_sd.h (based on stm32756g_eval_sd.h)
+  * @brief   This file contains the common defines and functions prototypes for
+  *          the bsp_driver_sd.c driver.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7_SD_H
+#define __STM32F7_SD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f7xx_hal.h"
+#include "fatfs_platform.h"
+
+/* Exported types --------------------------------------------------------*/
+/**
+  * @brief SD Card information structure
+  */
+#define BSP_SD_CardInfo HAL_SD_CardInfoTypeDef
+
+/* Exported constants --------------------------------------------------------*/
+/**
+  * @brief  SD status structure definition
+  */
+#define   MSD_OK                        ((uint8_t)0x00)
+#define   MSD_ERROR                     ((uint8_t)0x01)
+#define   MSD_ERROR_SD_NOT_PRESENT      ((uint8_t)0x02)
+
+/**
+  * @brief  SD transfer state definition
+  */
+#define   SD_TRANSFER_OK                ((uint8_t)0x00)
+#define   SD_TRANSFER_BUSY              ((uint8_t)0x01)
+
+#define SD_PRESENT               ((uint8_t)0x01)
+#define SD_NOT_PRESENT           ((uint8_t)0x00)
+#define SD_DATATIMEOUT           ((uint32_t)100000000)
+
+#ifdef OLD_API
+/* kept to avoid issue when migrating old projects. */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+#else
+/* USER CODE BEGIN BSP_H_CODE */
+
+/* Exported functions --------------------------------------------------------*/
+uint8_t BSP_SD_Init(void);
+uint8_t BSP_SD_ITConfig(void);
+uint8_t BSP_SD_ReadBlocks(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks, uint32_t Timeout);
+uint8_t BSP_SD_WriteBlocks(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks, uint32_t Timeout);
+uint8_t BSP_SD_ReadBlocks_DMA(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks);
+uint8_t BSP_SD_WriteBlocks_DMA(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks);
+uint8_t BSP_SD_Erase(uint32_t StartAddr, uint32_t EndAddr);
+uint8_t BSP_SD_GetCardState(void);
+void    BSP_SD_GetCardInfo(BSP_SD_CardInfo *CardInfo);
+uint8_t BSP_SD_IsDetected(void);
+
+/* These functions can be modified in case the current settings (e.g. DMA stream)
+   need to be changed for specific application needs */
+void    BSP_SD_AbortCallback(void);
+void    BSP_SD_WriteCpltCallback(void);
+void    BSP_SD_ReadCpltCallback(void);
+/* USER CODE END BSP_H_CODE */
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7_SD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/ethernetif.h

@@ -0,0 +1,55 @@
+/**
+ ******************************************************************************
+  * File Name          : ethernetif.h
+  * Description        : This file provides initialization code for LWIP
+  *                      middleWare.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+#ifndef __ETHERNETIF_H__
+#define __ETHERNETIF_H__
+
+#include "lwip/err.h"
+#include "lwip/netif.h"
+#include "cmsis_os.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Structure that include link thread parameters */
+struct link_str {
+  struct netif *netif;
+  osSemaphoreId semaphore;
+};
+
+/* Within 'USER CODE' section, code will be kept by default at each generation */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Exported functions ------------------------------------------------------- */
+err_t ethernetif_init(struct netif *netif);
+
+void ethernetif_input(void* argument);
+void ethernetif_set_link(void* argument);
+void ethernetif_update_config(struct netif *netif);
+void ethernetif_notify_conn_changed(struct netif *netif);
+
+u32_t sys_jiffies(void);
+u32_t sys_now(void);
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+#endif
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/fatfs.h

@@ -0,0 +1,49 @@
+/**
+  ******************************************************************************
+  * @file   fatfs.h
+  * @brief  Header for fatfs applications
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __fatfs_H
+#define __fatfs_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "ff.h"
+#include "ff_gen_drv.h"
+#include "sd_diskio.h" /* defines SD_Driver as external */
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern uint8_t retSD; /* Return value for SD */
+extern char SDPath[4]; /* SD logical drive path */
+extern FATFS SDFatFS; /* File system object for SD logical drive */
+extern FIL SDFile; /* File object for SD */
+
+void MX_FATFS_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+#ifdef __cplusplus
+}
+#endif
+#endif /*__fatfs_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/fatfs_platform.h

@@ -0,0 +1,26 @@
+/**
+  ******************************************************************************
+  * @file           : fatfs_platform.h
+  * @brief          : fatfs_platform header file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+*/
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f7xx_hal.h"
+/* Defines ------------------------------------------------------------------*/
+#define SD_PRESENT               ((uint8_t)0x01)  /* also in bsp_driver_sd.h */
+#define SD_NOT_PRESENT           ((uint8_t)0x00)  /* also in bsp_driver_sd.h */
+#define SD_DETECT_PIN         GPIO_PIN_15
+#define SD_DETECT_GPIO_PORT   GPIOI
+/* Prototypes ---------------------------------------------------------------*/
+uint8_t	BSP_PlatformIsDetected(void);

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/ffconf.h

@@ -0,0 +1,270 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  *  FatFs - Generic FAT file system module  R0.12c (C)ChaN, 2017
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+#ifndef _FFCONF
+#define _FFCONF 68300	/* Revision ID */
+
+/*-----------------------------------------------------------------------------/
+/ Additional user header to be used
+/-----------------------------------------------------------------------------*/
+
+#include "main.h"
+#include "stm32f7xx_hal.h"
+#include "bsp_driver_sd.h"
+#include "cmsis_os.h" /* _FS_REENTRANT set to 1 and CMSIS API chosen */
+
+/*-----------------------------------------------------------------------------/
+/ Function Configurations
+/-----------------------------------------------------------------------------*/
+
+#define _FS_READONLY         0      /* 0:Read/Write or 1:Read only */
+/* This option switches read-only configuration. (0:Read/Write or 1:Read-only)
+/  Read-only configuration removes writing API functions, f_write(), f_sync(),
+/  f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree()
+/  and optional writing functions as well. */
+
+#define _FS_MINIMIZE         0      /* 0 to 3 */
+/* This option defines minimization level to remove some basic API functions.
+/
+/   0: All basic functions are enabled.
+/   1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename()
+/      are removed.
+/   2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
+/   3: f_lseek() function is removed in addition to 2. */
+
+#define _USE_STRFUNC         2      /* 0:Disable or 1-2:Enable */
+/* This option switches string functions, f_gets(), f_putc(), f_puts() and
+/  f_printf().
+/
+/  0: Disable string functions.
+/  1: Enable without LF-CRLF conversion.
+/  2: Enable with LF-CRLF conversion. */
+
+#define _USE_FIND            0
+/* This option switches filtered directory read functions, f_findfirst() and
+/  f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */
+
+#define _USE_MKFS            1
+/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
+
+#define _USE_FASTSEEK        1
+/* This option switches fast seek feature. (0:Disable or 1:Enable) */
+
+#define	_USE_EXPAND		0
+/* This option switches f_expand function. (0:Disable or 1:Enable) */
+
+#define _USE_CHMOD		0
+/* This option switches attribute manipulation functions, f_chmod() and f_utime().
+/  (0:Disable or 1:Enable) Also _FS_READONLY needs to be 0 to enable this option. */
+
+#define _USE_LABEL           0
+/* This option switches volume label functions, f_getlabel() and f_setlabel().
+/  (0:Disable or 1:Enable) */
+
+#define _USE_FORWARD         0
+/* This option switches f_forward() function. (0:Disable or 1:Enable) */
+
+/*-----------------------------------------------------------------------------/
+/ Locale and Namespace Configurations
+/-----------------------------------------------------------------------------*/
+
+#define _CODE_PAGE         850
+/* This option specifies the OEM code page to be used on the target system.
+/  Incorrect setting of the code page can cause a file open failure.
+/
+/   1   - ASCII (No extended character. Non-LFN cfg. only)
+/   437 - U.S.
+/   720 - Arabic
+/   737 - Greek
+/   771 - KBL
+/   775 - Baltic
+/   850 - Latin 1
+/   852 - Latin 2
+/   855 - Cyrillic
+/   857 - Turkish
+/   860 - Portuguese
+/   861 - Icelandic
+/   862 - Hebrew
+/   863 - Canadian French
+/   864 - Arabic
+/   865 - Nordic
+/   866 - Russian
+/   869 - Greek 2
+/   932 - Japanese (DBCS)
+/   936 - Simplified Chinese (DBCS)
+/   949 - Korean (DBCS)
+/   950 - Traditional Chinese (DBCS)
+*/
+
+#define _USE_LFN     3    /* 0 to 3 */
+#define _MAX_LFN     255  /* Maximum LFN length to handle (12 to 255) */
+/* The _USE_LFN switches the support of long file name (LFN).
+/
+/   0: Disable support of LFN. _MAX_LFN has no effect.
+/   1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe.
+/   2: Enable LFN with dynamic working buffer on the STACK.
+/   3: Enable LFN with dynamic working buffer on the HEAP.
+/
+/  To enable the LFN, Unicode handling functions (option/unicode.c) must be added
+/  to the project. The working buffer occupies (_MAX_LFN + 1) * 2 bytes and
+/  additional 608 bytes at exFAT enabled. _MAX_LFN can be in range from 12 to 255.
+/  It should be set 255 to support full featured LFN operations.
+/  When use stack for the working buffer, take care on stack overflow. When use heap
+/  memory for the working buffer, memory management functions, ff_memalloc() and
+/  ff_memfree(), must be added to the project. */
+
+#define _LFN_UNICODE    0 /* 0:ANSI/OEM or 1:Unicode */
+/* This option switches character encoding on the API. (0:ANSI/OEM or 1:UTF-16)
+/  To use Unicode string for the path name, enable LFN and set _LFN_UNICODE = 1.
+/  This option also affects behavior of string I/O functions. */
+
+#define _STRF_ENCODE    3
+/* When _LFN_UNICODE == 1, this option selects the character encoding ON THE FILE to
+/  be read/written via string I/O functions, f_gets(), f_putc(), f_puts and f_printf().
+/
+/  0: ANSI/OEM
+/  1: UTF-16LE
+/  2: UTF-16BE
+/  3: UTF-8
+/
+/  This option has no effect when _LFN_UNICODE == 0. */
+
+#define _FS_RPATH       0 /* 0 to 2 */
+/* This option configures support of relative path.
+/
+/   0: Disable relative path and remove related functions.
+/   1: Enable relative path. f_chdir() and f_chdrive() are available.
+/   2: f_getcwd() function is available in addition to 1.
+*/
+
+/*---------------------------------------------------------------------------/
+/ Drive/Volume Configurations
+/----------------------------------------------------------------------------*/
+
+#define _VOLUMES    1
+/* Number of volumes (logical drives) to be used. */
+
+/* USER CODE BEGIN Volumes */
+#define _STR_VOLUME_ID          0	/* 0:Use only 0-9 for drive ID, 1:Use strings for drive ID */
+#define _VOLUME_STRS            "RAM","NAND","CF","SD1","SD2","USB1","USB2","USB3"
+/* _STR_VOLUME_ID switches string support of volume ID.
+/  When _STR_VOLUME_ID is set to 1, also pre-defined strings can be used as drive
+/  number in the path name. _VOLUME_STRS defines the drive ID strings for each
+/  logical drives. Number of items must be equal to _VOLUMES. Valid characters for
+/  the drive ID strings are: A-Z and 0-9. */
+/* USER CODE END Volumes */
+
+#define _MULTI_PARTITION     0 /* 0:Single partition, 1:Multiple partition */
+/* This option switches support of multi-partition on a physical drive.
+/  By default (0), each logical drive number is bound to the same physical drive
+/  number and only an FAT volume found on the physical drive will be mounted.
+/  When multi-partition is enabled (1), each logical drive number can be bound to
+/  arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk()
+/  function will be available. */
+#define _MIN_SS    512  /* 512, 1024, 2048 or 4096 */
+#define _MAX_SS    512  /* 512, 1024, 2048 or 4096 */
+/* These options configure the range of sector size to be supported. (512, 1024,
+/  2048 or 4096) Always set both 512 for most systems, all type of memory cards and
+/  harddisk. But a larger value may be required for on-board flash memory and some
+/  type of optical media. When _MAX_SS is larger than _MIN_SS, FatFs is configured
+/  to variable sector size and GET_SECTOR_SIZE command must be implemented to the
+/  disk_ioctl() function. */
+
+#define	_USE_TRIM      0
+/* This option switches support of ATA-TRIM. (0:Disable or 1:Enable)
+/  To enable Trim function, also CTRL_TRIM command should be implemented to the
+/  disk_ioctl() function. */
+
+#define _FS_NOFSINFO    0 /* 0,1,2 or 3 */
+/* If you need to know correct free space on the FAT32 volume, set bit 0 of this
+/  option, and f_getfree() function at first time after volume mount will force
+/  a full FAT scan. Bit 1 controls the use of last allocated cluster number.
+/
+/  bit0=0: Use free cluster count in the FSINFO if available.
+/  bit0=1: Do not trust free cluster count in the FSINFO.
+/  bit1=0: Use last allocated cluster number in the FSINFO if available.
+/  bit1=1: Do not trust last allocated cluster number in the FSINFO.
+*/
+
+/*---------------------------------------------------------------------------/
+/ System Configurations
+/----------------------------------------------------------------------------*/
+
+#define _FS_TINY    0      /* 0:Normal or 1:Tiny */
+/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny)
+/  At the tiny configuration, size of file object (FIL) is reduced _MAX_SS bytes.
+/  Instead of private sector buffer eliminated from the file object, common sector
+/  buffer in the file system object (FATFS) is used for the file data transfer. */
+
+#define _FS_EXFAT	1
+/* This option switches support of exFAT file system. (0:Disable or 1:Enable)
+/  When enable exFAT, also LFN needs to be enabled. (_USE_LFN >= 1)
+/  Note that enabling exFAT discards C89 compatibility. */
+
+#define _FS_NORTC	0
+#define _NORTC_MON	6
+#define _NORTC_MDAY	4
+#define _NORTC_YEAR	2015
+/* The option _FS_NORTC switches timestamp functiton. If the system does not have
+/  any RTC function or valid timestamp is not needed, set _FS_NORTC = 1 to disable
+/  the timestamp function. All objects modified by FatFs will have a fixed timestamp
+/  defined by _NORTC_MON, _NORTC_MDAY and _NORTC_YEAR in local time.
+/  To enable timestamp function (_FS_NORTC = 0), get_fattime() function need to be
+/  added to the project to get current time form real-time clock. _NORTC_MON,
+/  _NORTC_MDAY and _NORTC_YEAR have no effect.
+/  These options have no effect at read-only configuration (_FS_READONLY = 1). */
+
+#define _FS_LOCK    2     /* 0:Disable or >=1:Enable */
+/* The option _FS_LOCK switches file lock function to control duplicated file open
+/  and illegal operation to open objects. This option must be 0 when _FS_READONLY
+/  is 1.
+/
+/  0:  Disable file lock function. To avoid volume corruption, application program
+/      should avoid illegal open, remove and rename to the open objects.
+/  >0: Enable file lock function. The value defines how many files/sub-directories
+/      can be opened simultaneously under file lock control. Note that the file
+/      lock control is independent of re-entrancy. */
+
+#define _FS_REENTRANT    1  /* 0:Disable or 1:Enable */
+#define _FS_TIMEOUT      1000 /* Timeout period in unit of time ticks */
+#define _SYNC_t          osSemaphoreId_t
+/* The option _FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs
+/  module itself. Note that regardless of this option, file access to different
+/  volume is always re-entrant and volume control functions, f_mount(), f_mkfs()
+/  and f_fdisk() function, are always not re-entrant. Only file/directory access
+/  to the same volume is under control of this function.
+/
+/   0: Disable re-entrancy. _FS_TIMEOUT and _SYNC_t have no effect.
+/   1: Enable re-entrancy. Also user provided synchronization handlers,
+/      ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()
+/      function, must be added to the project. Samples are available in
+/      option/syscall.c.
+/
+/  The _FS_TIMEOUT defines timeout period in unit of time tick.
+/  The _SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*,
+/  SemaphoreHandle_t and etc.. A header file for O/S definitions needs to be
+/  included somewhere in the scope of ff.h. */
+
+/* define the ff_malloc ff_free macros as FreeRTOS pvPortMalloc and vPortFree macros */
+#if !defined(ff_malloc) && !defined(ff_free)
+#define ff_malloc  pvPortMalloc
+#define ff_free  vPortFree
+#endif
+
+#endif /* _FFCONF */

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/lwip_hooks.h

@@ -0,0 +1,7 @@
+
+#ifndef LWIP_HOOKS_H
+#define LWIP_HOOKS_H
+
+err_enum_t lwip_hook_unknown_eth_protocol (struct pbuf * pbuf, struct netif * netif);
+
+#endif /* LWIP_HOOKS_H */

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/lwipopts.h

@@ -0,0 +1,143 @@
+
+/**
+  ******************************************************************************
+  * File Name          : Target/lwipopts.h
+  * Description        : This file overrides LwIP stack default configuration
+  *                      done in opt.h file.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion --------------------------------------*/
+#ifndef __LWIPOPTS__H__
+#define __LWIPOPTS__H__
+
+#include "main.h"
+
+/*-----------------------------------------------------------------------------*/
+/* Current version of LwIP supported by CubeMx: 2.1.2 -*/
+/*-----------------------------------------------------------------------------*/
+
+/* Within 'USER CODE' section, code will be kept by default at each generation */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* STM32CubeMX Specific Parameters (not defined in opt.h) ---------------------*/
+/* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
+/*----- WITH_RTOS enabled (Since FREERTOS is set) -----*/
+#define WITH_RTOS 1
+/*----- CHECKSUM_BY_HARDWARE enabled -----*/
+#define CHECKSUM_BY_HARDWARE 1
+/*-----------------------------------------------------------------------------*/
+
+/* LwIP Stack Parameters (modified compared to initialization value in opt.h) -*/
+/* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
+/*----- Value in opt.h for LWIP_DHCP: 0 -----*/
+#define LWIP_DHCP 1
+/*----- Default Value for LWIP_TCPIP_CORE_LOCKING: 0 ---*/
+#define LWIP_TCPIP_CORE_LOCKING 1
+/*----- Value in opt.h for MEM_ALIGNMENT: 1 -----*/
+#define MEM_ALIGNMENT 4
+/*----- Value in opt.h for MEMP_NUM_SYS_TIMEOUT: (LWIP_TCP + IP_REASSEMBLY + LWIP_ARP + (2*LWIP_DHCP) + LWIP_AUTOIP + LWIP_IGMP + LWIP_DNS + (PPP_SUPPORT*6*MEMP_NUM_PPP_PCB) + (LWIP_IPV6 ? (1 + LWIP_IPV6_REASS + LWIP_IPV6_MLD) : 0)) -*/
+#define MEMP_NUM_SYS_TIMEOUT 5
+/*----- Default Value for PBUF_POOL_BUFSIZE: 592 ---*/
+#define PBUF_POOL_BUFSIZE 1536
+/*----- Value in opt.h for LWIP_ETHERNET: LWIP_ARP || PPPOE_SUPPORT -*/
+#define LWIP_ETHERNET 1
+/*----- Value in opt.h for LWIP_DNS_SECURE: (LWIP_DNS_SECURE_RAND_XID | LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING | LWIP_DNS_SECURE_RAND_SRC_PORT) -*/
+#define LWIP_DNS_SECURE 7
+/*----- Value in opt.h for TCP_SND_QUEUELEN: (4*TCP_SND_BUF + (TCP_MSS - 1))/TCP_MSS -----*/
+#define TCP_SND_QUEUELEN 9
+/*----- Value in opt.h for TCP_SNDLOWAT: LWIP_MIN(LWIP_MAX(((TCP_SND_BUF)/2), (2 * TCP_MSS) + 1), (TCP_SND_BUF) - 1) -*/
+#define TCP_SNDLOWAT 1071
+/*----- Value in opt.h for TCP_SNDQUEUELOWAT: LWIP_MAX(TCP_SND_QUEUELEN)/2, 5) -*/
+#define TCP_SNDQUEUELOWAT 5
+/*----- Value in opt.h for TCP_WND_UPDATE_THRESHOLD: LWIP_MIN(TCP_WND/4, TCP_MSS*4) -----*/
+#define TCP_WND_UPDATE_THRESHOLD 536
+/*----- Default Value for LWIP_NETIF_HOSTNAME: 0 ---*/
+#define LWIP_NETIF_HOSTNAME 1
+/*----- Value in opt.h for LWIP_NETIF_LINK_CALLBACK: 0 -----*/
+#define LWIP_NETIF_LINK_CALLBACK 1
+/*----- Default Value for TCPIP_THREAD_NAME: "tcpip_thread" ---*/
+#define TCPIP_THREAD_NAME "tcpip_thread11"
+/*----- Value in opt.h for TCPIP_THREAD_STACKSIZE: 0 -----*/
+#define TCPIP_THREAD_STACKSIZE 4096
+/*----- Value in opt.h for TCPIP_THREAD_PRIO: 1 -----*/
+#define TCPIP_THREAD_PRIO 24
+/*----- Value in opt.h for TCPIP_MBOX_SIZE: 0 -----*/
+#define TCPIP_MBOX_SIZE 6
+/*----- Value in opt.h for SLIPIF_THREAD_STACKSIZE: 0 -----*/
+#define SLIPIF_THREAD_STACKSIZE 1024
+/*----- Value in opt.h for SLIPIF_THREAD_PRIO: 1 -----*/
+#define SLIPIF_THREAD_PRIO 3
+/*----- Value in opt.h for DEFAULT_THREAD_STACKSIZE: 0 -----*/
+#define DEFAULT_THREAD_STACKSIZE 1024
+/*----- Value in opt.h for DEFAULT_THREAD_PRIO: 1 -----*/
+#define DEFAULT_THREAD_PRIO 3
+/*----- Value in opt.h for DEFAULT_UDP_RECVMBOX_SIZE: 0 -----*/
+#define DEFAULT_UDP_RECVMBOX_SIZE 6
+/*----- Value in opt.h for DEFAULT_TCP_RECVMBOX_SIZE: 0 -----*/
+#define DEFAULT_TCP_RECVMBOX_SIZE 6
+/*----- Value in opt.h for DEFAULT_ACCEPTMBOX_SIZE: 0 -----*/
+#define DEFAULT_ACCEPTMBOX_SIZE 6
+/*----- Value in opt.h for LWIP_COMPAT_SOCKETS: 1 -----*/
+#define LWIP_COMPAT_SOCKETS 2
+/*----- Value in opt.h for RECV_BUFSIZE_DEFAULT: INT_MAX -----*/
+#define RECV_BUFSIZE_DEFAULT 2000000000
+/*----- Default Value for SO_REUSE: 0 ---*/
+#define SO_REUSE 1
+/*----- Default Value for LWIP_SNMP: 0 ---*/
+#define LWIP_SNMP 1
+/*----- Default Value for SNMP_USE_NETCONN: 0 ---*/
+#define SNMP_USE_NETCONN 1
+/*----- Default Value for SNMP_USE_RAW: 1 ---*/
+#define SNMP_USE_RAW 0
+/*----- Value in opt.h for MIB2_STATS: 0 or SNMP_LWIP_MIB2 -----*/
+#define MIB2_STATS 1
+/*----- Value in opt.h for CHECKSUM_GEN_IP: 1 -----*/
+#define CHECKSUM_GEN_IP 0
+/*----- Value in opt.h for CHECKSUM_GEN_UDP: 1 -----*/
+#define CHECKSUM_GEN_UDP 0
+/*----- Value in opt.h for CHECKSUM_GEN_TCP: 1 -----*/
+#define CHECKSUM_GEN_TCP 0
+/*----- Value in opt.h for CHECKSUM_GEN_ICMP: 1 -----*/
+#define CHECKSUM_GEN_ICMP 0
+/*----- Value in opt.h for CHECKSUM_GEN_ICMP6: 1 -----*/
+#define CHECKSUM_GEN_ICMP6 0
+/*----- Value in opt.h for CHECKSUM_CHECK_IP: 1 -----*/
+#define CHECKSUM_CHECK_IP 0
+/*----- Value in opt.h for CHECKSUM_CHECK_UDP: 1 -----*/
+#define CHECKSUM_CHECK_UDP 0
+/*----- Value in opt.h for CHECKSUM_CHECK_TCP: 1 -----*/
+#define CHECKSUM_CHECK_TCP 0
+/*----- Value in opt.h for CHECKSUM_CHECK_ICMP: 1 -----*/
+#define CHECKSUM_CHECK_ICMP 0
+/*----- Value in opt.h for CHECKSUM_CHECK_ICMP6: 1 -----*/
+#define CHECKSUM_CHECK_ICMP6 0
+/*-----------------------------------------------------------------------------*/
+/* USER CODE BEGIN 1 */
+#define LWIP_HOOK_FILENAME "lwip_hooks.h"
+#define LWIP_HOOK_UNKNOWN_ETH_PROTOCOL lwip_hook_unknown_eth_protocol
+/* USER CODE END 1 */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__LWIPOPTS__H__ */
+
+/************************* (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/main.h

@@ -0,0 +1,79 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f7xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+extern int SDFatFSMounted;
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define LD_USER2_Pin GPIO_PIN_13
+#define LD_USER2_GPIO_Port GPIOJ
+#define SD_DETECT_Pin GPIO_PIN_15
+#define SD_DETECT_GPIO_Port GPIOI
+#define LD_USER1_Pin GPIO_PIN_5
+#define LD_USER1_GPIO_Port GPIOJ
+#define B_USER_Pin GPIO_PIN_0
+#define B_USER_GPIO_Port GPIOA
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/sd_diskio.h

@@ -0,0 +1,45 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    sd_diskio.h
+  * @brief   Header for sd_diskio.c module
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Note: code generation based on sd_diskio_dma_rtos_template.h */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __SD_DISKIO_H
+#define __SD_DISKIO_H
+
+/* USER CODE BEGIN firstSection */
+/* can be used to modify / undefine following code or add new definitions */
+/* USER CODE END firstSection */
+
+/* Includes ------------------------------------------------------------------*/
+#include "bsp_driver_sd.h"
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+extern const Diskio_drvTypeDef  SD_Driver;
+
+/* USER CODE BEGIN lastSection */
+/* can be used to modify / undefine previous code or add new definitions */
+/* USER CODE END lastSection */
+
+#endif /* __SD_DISKIO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/stm32f7xx_hal_conf.h

@@ -0,0 +1,483 @@
+/**
+  ******************************************************************************
+  * @file    stm32f7xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32f7xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7xx_HAL_CONF_H
+#define __STM32F7xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+
+  /* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_CAN_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DAC_MODULE_ENABLED   */
+/* #define HAL_DCMI_MODULE_ENABLED   */
+/* #define HAL_DMA2D_MODULE_ENABLED   */
+#define HAL_ETH_MODULE_ENABLED
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+/* #define HAL_LTDC_MODULE_ENABLED   */
+/* #define HAL_QSPI_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SAI_MODULE_ENABLED   */
+#define HAL_SD_MODULE_ENABLED
+/* #define HAL_MMC_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+/* #define HAL_PCD_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+/* #define HAL_DFSDM_MODULE_ENABLED   */
+/* #define HAL_DSI_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_MDIOS_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_EXTI_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.  */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            ((uint32_t)15U) /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  ART_ACCLERATOR_ENABLE        0U /* To enable instruction cache and prefetch */
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_JPEG_REGISTER_CALLBACKS        0U /* JPEG register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MDIOS_REGISTER_CALLBACKS       0U /* MDIOS register callback disabled     */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        1U /* UART register callback enabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* LAN8742A_PHY_ADDRESS Address*/
+#define LAN8742A_PHY_ADDRESS           0
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY                 ((uint32_t)0x000000FFU)
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFFU)
+
+#define PHY_READ_TO                     ((uint32_t)0x0000FFFFU)
+#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFFU)
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x00U)    /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x01U)    /*!< Transceiver Basic Status Register    */
+
+#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
+
+/* Section 4: Extended PHY Registers */
+#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
+
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
+
+#define PHY_ISFR                        ((uint16_t)0x001DU)    /*!< PHY Interrupt Source Flag register Offset   */
+#define PHY_ISFR_INT4                   ((uint16_t)0x000BU)  /*!< PHY Link down inturrupt       */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f7xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f7xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f7xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f7xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f7xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f7xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f7xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32f7xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f7xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f7xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f7xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f7xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f7xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f7xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f7xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f7xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f7xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f7xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f7xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f7xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f7xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f7xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f7xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f7xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f7xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f7xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f7xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f7xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f7xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f7xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f7xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f7xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f7xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f7xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f7xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f7xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f7xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f7xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f7xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f7xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f7xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f7xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f7xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f7xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+ #include "stm32f7xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+ #include "stm32f7xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32f7xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7xx_HAL_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Inc/stm32f7xx_it.h

@@ -0,0 +1,73 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f7xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7xx_IT_H
+#define __STM32F7xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM1_UP_TIM10_IRQHandler(void);
+void USART1_IRQHandler(void);
+void DMA2_Stream0_IRQHandler(void);
+void ETH_IRQHandler(void);
+void DMA2_Stream5_IRQHandler(void);
+void DMA2_Stream7_IRQHandler(void);
+void SDMMC2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/STM32F769NIHx_FLASH.ld

@@ -0,0 +1,189 @@
+/*
+******************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by System Workbench for STM32
+**
+**  Abstract    : Linker script for STM32F769NIHx series
+**                2048Kbytes FLASH and 512Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed “as is,” without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20080000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 512K
+FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 2048K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
+

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/bsp_driver_sd.c

@@ -0,0 +1,317 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file    bsp_driver_sd.c for F7 (based on stm32756g_eval_sd.c)
+ * @brief   This file includes a generic uSD card driver.
+ *          To be completed by the user according to the board used for the project.
+ * @note    Some functions generated as weak: they can be overridden by
+ *          - code in user files
+ *          - or BSP code from the FW pack files
+ *          if such files are added to the generated project (by the user).
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+#ifdef OLD_API
+/* kept to avoid issue when migrating old projects. */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+#else
+/* USER CODE BEGIN FirstSection */
+/* can be used to modify / undefine following code or add new definitions */
+/* USER CODE END FirstSection */
+/* Includes ------------------------------------------------------------------*/
+#include "bsp_driver_sd.h"
+
+/* Extern variables ---------------------------------------------------------*/
+
+extern SD_HandleTypeDef hsd2;
+
+/* USER CODE BEGIN BeforeInitSection */
+/* can be used to modify / undefine following code or add code */
+/* USER CODE END BeforeInitSection */
+/**
+  * @brief  Initializes the SD card device.
+  * @retval SD status
+  */
+__weak uint8_t BSP_SD_Init(void)
+{
+  uint8_t sd_state = MSD_OK;
+  /* Check if the SD card is plugged in the slot */
+  if (BSP_SD_IsDetected() != SD_PRESENT)
+  {
+    return MSD_ERROR_SD_NOT_PRESENT;
+  }
+  /* HAL SD initialization */
+  sd_state = HAL_SD_Init(&hsd2);
+  /* Configure SD Bus width (4 bits mode selected) */
+  if (sd_state == MSD_OK)
+  {
+    /* Enable wide operation */
+    if (HAL_SD_ConfigWideBusOperation(&hsd2, SDMMC_BUS_WIDE_4B) != HAL_OK)
+    {
+      sd_state = MSD_ERROR;
+    }
+  }
+
+  return sd_state;
+}
+/* USER CODE BEGIN AfterInitSection */
+/* can be used to modify previous code / undefine following code / add code */
+/* USER CODE END AfterInitSection */
+
+/* USER CODE BEGIN InterruptMode */
+/**
+  * @brief  Configures Interrupt mode for SD detection pin.
+  * @retval Returns 0
+  */
+__weak uint8_t BSP_SD_ITConfig(void)
+{
+  /* Code to be updated by the user or replaced by one from the FW pack (in a stmxxxx_sd.c file) */
+
+  return (uint8_t)0;
+}
+
+/* USER CODE END InterruptMode */
+
+/* USER CODE BEGIN BeforeReadBlocksSection */
+/* can be used to modify previous code / undefine following code / add code */
+/* USER CODE END BeforeReadBlocksSection */
+/**
+  * @brief  Reads block(s) from a specified address in an SD card, in polling mode.
+  * @param  pData: Pointer to the buffer that will contain the data to transmit
+  * @param  ReadAddr: Address from where data is to be read
+  * @param  NumOfBlocks: Number of SD blocks to read
+  * @param  Timeout: Timeout for read operation
+  * @retval SD status
+  */
+__weak uint8_t BSP_SD_ReadBlocks(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks, uint32_t Timeout)
+{
+  uint8_t sd_state = MSD_OK;
+
+  if (HAL_SD_ReadBlocks(&hsd2, (uint8_t *)pData, ReadAddr, NumOfBlocks, Timeout) != HAL_OK)
+  {
+    sd_state = MSD_ERROR;
+  }
+
+  return sd_state;
+}
+
+/* USER CODE BEGIN BeforeWriteBlocksSection */
+/* can be used to modify previous code / undefine following code / add code */
+/* USER CODE END BeforeWriteBlocksSection */
+/**
+  * @brief  Writes block(s) to a specified address in an SD card, in polling mode.
+  * @param  pData: Pointer to the buffer that will contain the data to transmit
+  * @param  WriteAddr: Address from where data is to be written
+  * @param  NumOfBlocks: Number of SD blocks to write
+  * @param  Timeout: Timeout for write operation
+  * @retval SD status
+  */
+__weak uint8_t BSP_SD_WriteBlocks(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks, uint32_t Timeout)
+{
+  uint8_t sd_state = MSD_OK;
+
+  if (HAL_SD_WriteBlocks(&hsd2, (uint8_t *)pData, WriteAddr, NumOfBlocks, Timeout) != HAL_OK)
+  {
+    sd_state = MSD_ERROR;
+  }
+
+  return sd_state;
+}
+
+/* USER CODE BEGIN BeforeReadDMABlocksSection */
+/* can be used to modify previous code / undefine following code / add code */
+/* USER CODE END BeforeReadDMABlocksSection */
+/**
+  * @brief  Reads block(s) from a specified address in an SD card, in DMA mode.
+  * @param  pData: Pointer to the buffer that will contain the data to transmit
+  * @param  ReadAddr: Address from where data is to be read
+  * @param  NumOfBlocks: Number of SD blocks to read
+  * @retval SD status
+  */
+__weak uint8_t BSP_SD_ReadBlocks_DMA(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks)
+{
+  uint8_t sd_state = MSD_OK;
+
+  /* Read block(s) in DMA transfer mode */
+  if (HAL_SD_ReadBlocks_DMA(&hsd2, (uint8_t *)pData, ReadAddr, NumOfBlocks) != HAL_OK)
+  {
+    sd_state = MSD_ERROR;
+  }
+
+  return sd_state;
+}
+
+/* USER CODE BEGIN BeforeWriteDMABlocksSection */
+/* can be used to modify previous code / undefine following code / add code */
+/* USER CODE END BeforeWriteDMABlocksSection */
+/**
+  * @brief  Writes block(s) to a specified address in an SD card, in DMA mode.
+  * @param  pData: Pointer to the buffer that will contain the data to transmit
+  * @param  WriteAddr: Address from where data is to be written
+  * @param  NumOfBlocks: Number of SD blocks to write
+  * @retval SD status
+  */
+__weak uint8_t BSP_SD_WriteBlocks_DMA(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks)
+{
+  uint8_t sd_state = MSD_OK;
+
+  /* Write block(s) in DMA transfer mode */
+  if (HAL_SD_WriteBlocks_DMA(&hsd2, (uint8_t *)pData, WriteAddr, NumOfBlocks) != HAL_OK)
+  {
+    sd_state = MSD_ERROR;
+  }
+
+  return sd_state;
+}
+
+/* USER CODE BEGIN BeforeEraseSection */
+/* can be used to modify previous code / undefine following code / add code */
+/* USER CODE END BeforeEraseSection */
+/**
+  * @brief  Erases the specified memory area of the given SD card.
+  * @param  StartAddr: Start byte address
+  * @param  EndAddr: End byte address
+  * @retval SD status
+  */
+__weak uint8_t BSP_SD_Erase(uint32_t StartAddr, uint32_t EndAddr)
+{
+  uint8_t sd_state = MSD_OK;
+
+  if (HAL_SD_Erase(&hsd2, StartAddr, EndAddr) != HAL_OK)
+  {
+    sd_state = MSD_ERROR;
+  }
+
+  return sd_state;
+}
+
+/* USER CODE BEGIN BeforeGetCardStateSection */
+/* can be used to modify previous code / undefine following code / add code */
+/* USER CODE END BeforeGetCardStateSection */
+
+/**
+  * @brief  Gets the current SD card data status.
+  * @param  None
+  * @retval Data transfer state.
+  *          This value can be one of the following values:
+  *            @arg  SD_TRANSFER_OK: No data transfer is acting
+  *            @arg  SD_TRANSFER_BUSY: Data transfer is acting
+  */
+__weak uint8_t BSP_SD_GetCardState(void)
+{
+  return ((HAL_SD_GetCardState(&hsd2) == HAL_SD_CARD_TRANSFER ) ? SD_TRANSFER_OK : SD_TRANSFER_BUSY);
+}
+
+/**
+  * @brief  Get SD information about specific SD card.
+  * @param  CardInfo: Pointer to HAL_SD_CardInfoTypedef structure
+  * @retval None
+  */
+__weak void BSP_SD_GetCardInfo(HAL_SD_CardInfoTypeDef *CardInfo)
+{
+  /* Get SD card Information */
+  HAL_SD_GetCardInfo(&hsd2, CardInfo);
+}
+
+/* USER CODE BEGIN BeforeCallBacksSection */
+/* can be used to modify previous code / undefine following code / add code */
+/* USER CODE END BeforeCallBacksSection */
+/**
+  * @brief SD Abort callbacks
+  * @param hsd: SD handle
+  * @retval None
+  */
+void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd)
+{
+  BSP_SD_AbortCallback();
+}
+
+/**
+  * @brief Tx Transfer completed callback
+  * @param hsd: SD handle
+  * @retval None
+  */
+void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd)
+{
+  BSP_SD_WriteCpltCallback();
+}
+
+/**
+  * @brief Rx Transfer completed callback
+  * @param hsd: SD handle
+  * @retval None
+  */
+void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd)
+{
+  BSP_SD_ReadCpltCallback();
+}
+
+/* USER CODE BEGIN CallBacksSection_C */
+/**
+  * @brief BSP SD Abort callback
+  * @retval None
+  * @note empty (up to the user to fill it in or to remove it if useless)
+  */
+__weak void BSP_SD_AbortCallback(void)
+{
+
+}
+
+/**
+  * @brief BSP Tx Transfer completed callback
+  * @retval None
+  * @note empty (up to the user to fill it in or to remove it if useless)
+  */
+__weak void BSP_SD_WriteCpltCallback(void)
+{
+
+}
+
+/**
+  * @brief BSP Rx Transfer completed callback
+  * @retval None
+  * @note empty (up to the user to fill it in or to remove it if useless)
+  */
+__weak void BSP_SD_ReadCpltCallback(void)
+{
+
+}
+/* USER CODE END CallBacksSection_C */
+#endif
+
+/**
+ * @brief  Detects if SD card is correctly plugged in the memory slot or not.
+ * @param  None
+ * @retval Returns if SD is detected or not
+ */
+__weak uint8_t BSP_SD_IsDetected(void)
+{
+  __IO uint8_t status = SD_PRESENT;
+
+  if (BSP_PlatformIsDetected() == 0x0)
+  {
+    status = SD_NOT_PRESENT;
+  }
+
+  return status;
+}
+
+/* USER CODE BEGIN AdditionalCode */
+/* user code can be inserted here */
+/* USER CODE END AdditionalCode */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/ethernetif.c

@@ -0,0 +1,775 @@
+/**
+  ******************************************************************************
+  * File Name          : ethernetif.c
+  * Description        : This file provides code for the configuration
+  *                      of the Target/ethernetif.c MiddleWare.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "lwip/opt.h"
+
+#include "lwip/timeouts.h"
+#include "netif/ethernet.h"
+#include "netif/etharp.h"
+#include "lwip/ethip6.h"
+#include "ethernetif.h"
+#include <string.h>
+#include "cmsis_os.h"
+#include "lwip/tcpip.h"
+/* Within 'USER CODE' section, code will be kept by default at each generation */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Private define ------------------------------------------------------------*/
+/* The time to block waiting for input. */
+#define TIME_WAITING_FOR_INPUT ( portMAX_DELAY )
+/* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */
+/* Stack size of the interface thread */
+#define INTERFACE_THREAD_STACK_SIZE ( 2048 )
+/* USER CODE END OS_THREAD_STACK_SIZE_WITH_RTOS */
+/* Network interface name */
+#define IFNAME0 's'
+#define IFNAME1 't'
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/* Private variables ---------------------------------------------------------*/
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+  #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN ETH_DMADescTypeDef  DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END;/* Ethernet Rx MA Descriptor */
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+  #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN ETH_DMADescTypeDef  DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END;/* Ethernet Tx DMA Descriptor */
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+  #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+  #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */
+
+/* Semaphore to signal incoming packets */
+osSemaphoreId s_xSemaphore = NULL;
+/* Global Ethernet handle */
+ETH_HandleTypeDef heth;
+
+/* USER CODE BEGIN 3 */
+
+/* USER CODE END 3 */
+
+/* Private functions ---------------------------------------------------------*/
+
+void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(ethHandle->Instance==ETH)
+  {
+  /* USER CODE BEGIN ETH_MspInit 0 */
+
+  /* USER CODE END ETH_MspInit 0 */
+    /* Enable Peripheral clock */
+    __HAL_RCC_ETH_CLK_ENABLE();
+
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**ETH GPIO Configuration
+    PG14     ------> ETH_TXD1
+    PG13     ------> ETH_TXD0
+    PG11     ------> ETH_TX_EN
+    PC1     ------> ETH_MDC
+    PA1     ------> ETH_REF_CLK
+    PC4     ------> ETH_RXD0
+    PA2     ------> ETH_MDIO
+    PC5     ------> ETH_RXD1
+    PA7     ------> ETH_CRS_DV
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_13|GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* Peripheral interrupt init */
+    HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(ETH_IRQn);
+  /* USER CODE BEGIN ETH_MspInit 1 */
+
+  /* USER CODE END ETH_MspInit 1 */
+  }
+}
+
+void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
+{
+  if(ethHandle->Instance==ETH)
+  {
+  /* USER CODE BEGIN ETH_MspDeInit 0 */
+
+  /* USER CODE END ETH_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ETH_CLK_DISABLE();
+
+    /**ETH GPIO Configuration
+    PG14     ------> ETH_TXD1
+    PG13     ------> ETH_TXD0
+    PG11     ------> ETH_TX_EN
+    PC1     ------> ETH_MDC
+    PA1     ------> ETH_REF_CLK
+    PC4     ------> ETH_RXD0
+    PA2     ------> ETH_MDIO
+    PC5     ------> ETH_RXD1
+    PA7     ------> ETH_CRS_DV
+    */
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_14|GPIO_PIN_13|GPIO_PIN_11);
+
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
+
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
+
+    /* Peripheral interrupt Deinit*/
+    HAL_NVIC_DisableIRQ(ETH_IRQn);
+
+  /* USER CODE BEGIN ETH_MspDeInit 1 */
+
+  /* USER CODE END ETH_MspDeInit 1 */
+  }
+}
+
+/**
+  * @brief  Ethernet Rx Transfer completed callback
+  * @param  heth: ETH handle
+  * @retval None
+  */
+void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
+{
+  osSemaphoreRelease(s_xSemaphore);
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/*******************************************************************************
+                       LL Driver Interface ( LwIP stack --> ETH)
+*******************************************************************************/
+/**
+ * In this function, the hardware should be initialized.
+ * Called from ethernetif_init().
+ *
+ * @param netif the already initialized lwip network interface structure
+ *        for this ethernetif
+ */
+static void low_level_init(struct netif *netif)
+{
+  uint32_t regvalue = 0;
+  HAL_StatusTypeDef hal_eth_init_status;
+/* USER CODE BEGIN OS_THREAD_ATTR_CMSIS_RTOS_V2 */
+  osThreadAttr_t attributes;
+/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
+
+/* Init ETH */
+
+   uint8_t MACAddr[6] ;
+  heth.Instance = ETH;
+  heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
+  heth.Init.Speed = ETH_SPEED_100M;
+  heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
+  heth.Init.PhyAddress = LAN8742A_PHY_ADDRESS;
+  MACAddr[0] = 0x00;
+  MACAddr[1] = 0x80;
+  MACAddr[2] = 0xE1;
+  MACAddr[3] = 0x00;
+  MACAddr[4] = 0x00;
+  MACAddr[5] = 0x00;
+  heth.Init.MACAddr = &MACAddr[0];
+  heth.Init.RxMode = ETH_RXINTERRUPT_MODE;
+  heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
+  heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
+
+  /* USER CODE BEGIN MACADDRESS */
+
+  /* USER CODE END MACADDRESS */
+
+  hal_eth_init_status = HAL_ETH_Init(&heth);
+
+  if (hal_eth_init_status == HAL_OK)
+  {
+    /* Set netif link flag */
+    netif->flags |= NETIF_FLAG_LINK_UP;
+  }
+  /* Initialize Tx Descriptors list: Chain Mode */
+  HAL_ETH_DMATxDescListInit(&heth, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
+
+  /* Initialize Rx Descriptors list: Chain Mode  */
+  HAL_ETH_DMARxDescListInit(&heth, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
+
+#if LWIP_ARP || LWIP_ETHERNET
+
+  /* set MAC hardware address length */
+  netif->hwaddr_len = ETH_HWADDR_LEN;
+
+  /* set MAC hardware address */
+  netif->hwaddr[0] =  heth.Init.MACAddr[0];
+  netif->hwaddr[1] =  heth.Init.MACAddr[1];
+  netif->hwaddr[2] =  heth.Init.MACAddr[2];
+  netif->hwaddr[3] =  heth.Init.MACAddr[3];
+  netif->hwaddr[4] =  heth.Init.MACAddr[4];
+  netif->hwaddr[5] =  heth.Init.MACAddr[5];
+
+  /* maximum transfer unit */
+  netif->mtu = 1500;
+
+  /* Accept broadcast address and ARP traffic */
+  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
+  #if LWIP_ARP
+    netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
+  #else
+    netif->flags |= NETIF_FLAG_BROADCAST;
+  #endif /* LWIP_ARP */
+
+/* create a binary semaphore used for informing ethernetif of frame reception */
+  s_xSemaphore = osSemaphoreNew(1, 1, NULL);
+
+/* create the task that handles the ETH_MAC */
+/* USER CODE BEGIN OS_THREAD_NEW_CMSIS_RTOS_V2 */
+  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
+  attributes.name = "EthIf";
+  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE;
+  attributes.priority = osPriorityRealtime;
+  osThreadNew(ethernetif_input, netif, &attributes);
+/* USER CODE END OS_THREAD_NEW_CMSIS_RTOS_V2 */
+  /* Enable MAC and DMA transmission and reception */
+  HAL_ETH_Start(&heth);
+
+/* USER CODE BEGIN PHY_PRE_CONFIG */
+
+  /* Pass all multicast */
+  uint32_t ffr = heth.Instance->MACFFR;
+  heth.Instance->MACFFR = ffr | ETH_MACFFR_PAM_Msk;
+
+/* USER CODE END PHY_PRE_CONFIG */
+
+  /* Read Register Configuration */
+  HAL_ETH_ReadPHYRegister(&heth, PHY_ISFR, &regvalue);
+  regvalue |= (PHY_ISFR_INT4);
+
+  /* Enable Interrupt on change of link status */
+  HAL_ETH_WritePHYRegister(&heth, PHY_ISFR , regvalue );
+
+  /* Read Register Configuration */
+  HAL_ETH_ReadPHYRegister(&heth, PHY_ISFR , &regvalue);
+
+/* USER CODE BEGIN PHY_POST_CONFIG */
+
+/* USER CODE END PHY_POST_CONFIG */
+
+#endif /* LWIP_ARP || LWIP_ETHERNET */
+
+/* USER CODE BEGIN LOW_LEVEL_INIT */
+
+/* USER CODE END LOW_LEVEL_INIT */
+}
+
+/**
+ * This function should do the actual transmission of the packet. The packet is
+ * contained in the pbuf that is passed to the function. This pbuf
+ * might be chained.
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
+ * @return ERR_OK if the packet could be sent
+ *         an err_t value if the packet couldn't be sent
+ *
+ * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
+ *       strange results. You might consider waiting for space in the DMA queue
+ *       to become available since the stack doesn't retry to send a packet
+ *       dropped because of memory failure (except for the TCP timers).
+ */
+
+static err_t low_level_output(struct netif *netif, struct pbuf *p)
+{
+  err_t errval;
+  struct pbuf *q;
+  uint8_t *buffer = (uint8_t *)(heth.TxDesc->Buffer1Addr);
+  __IO ETH_DMADescTypeDef *DmaTxDesc;
+  uint32_t framelength = 0;
+  uint32_t bufferoffset = 0;
+  uint32_t byteslefttocopy = 0;
+  uint32_t payloadoffset = 0;
+  DmaTxDesc = heth.TxDesc;
+  bufferoffset = 0;
+
+  /* copy frame from pbufs to driver buffers */
+  for(q = p; q != NULL; q = q->next)
+    {
+      /* Is this buffer available? If not, goto error */
+      if((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
+      {
+        errval = ERR_USE;
+        goto error;
+      }
+
+      /* Get bytes in current lwIP buffer */
+      byteslefttocopy = q->len;
+      payloadoffset = 0;
+
+      /* Check if the length of data to copy is bigger than Tx buffer size*/
+      while( (byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE )
+      {
+        /* Copy data to Tx buffer*/
+        memcpy( (uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset) );
+
+        /* Point to next descriptor */
+        DmaTxDesc = (ETH_DMADescTypeDef *)(DmaTxDesc->Buffer2NextDescAddr);
+
+        /* Check if the buffer is available */
+        if((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
+        {
+          errval = ERR_USE;
+          goto error;
+        }
+
+        buffer = (uint8_t *)(DmaTxDesc->Buffer1Addr);
+
+        byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
+        payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
+        framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
+        bufferoffset = 0;
+      }
+
+      /* Copy the remaining bytes */
+      memcpy( (uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy );
+      bufferoffset = bufferoffset + byteslefttocopy;
+      framelength = framelength + byteslefttocopy;
+    }
+
+  /* Prepare transmit descriptors to give to DMA */
+  HAL_ETH_TransmitFrame(&heth, framelength);
+
+  errval = ERR_OK;
+
+error:
+
+  /* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
+  if ((heth.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET)
+  {
+    /* Clear TUS ETHERNET DMA flag */
+    heth.Instance->DMASR = ETH_DMASR_TUS;
+
+    /* Resume DMA transmission*/
+    heth.Instance->DMATPDR = 0;
+  }
+  return errval;
+}
+
+/**
+ * Should allocate a pbuf and transfer the bytes of the incoming
+ * packet from the interface into the pbuf.
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ * @return a pbuf filled with the received packet (including MAC header)
+ *         NULL on memory error
+   */
+static struct pbuf * low_level_input(struct netif *netif)
+{
+  struct pbuf *p = NULL;
+  struct pbuf *q = NULL;
+  uint16_t len = 0;
+  uint8_t *buffer;
+  __IO ETH_DMADescTypeDef *dmarxdesc;
+  uint32_t bufferoffset = 0;
+  uint32_t payloadoffset = 0;
+  uint32_t byteslefttocopy = 0;
+  uint32_t i=0;
+
+  /* get received frame */
+  if (HAL_ETH_GetReceivedFrame_IT(&heth) != HAL_OK)
+
+    return NULL;
+
+  /* Obtain the size of the packet and put it into the "len" variable. */
+  len = heth.RxFrameInfos.length;
+  buffer = (uint8_t *)heth.RxFrameInfos.buffer;
+
+  if (len > 0)
+  {
+    /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
+    p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+  }
+
+  if (p != NULL)
+  {
+    dmarxdesc = heth.RxFrameInfos.FSRxDesc;
+    bufferoffset = 0;
+    for(q = p; q != NULL; q = q->next)
+    {
+      byteslefttocopy = q->len;
+      payloadoffset = 0;
+
+      /* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
+      while( (byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE )
+      {
+        /* Copy data to pbuf */
+        memcpy( (uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
+
+        /* Point to next descriptor */
+        dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
+        buffer = (uint8_t *)(dmarxdesc->Buffer1Addr);
+
+        byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
+        payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
+        bufferoffset = 0;
+      }
+      /* Copy remaining data in pbuf */
+      memcpy( (uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy);
+      bufferoffset = bufferoffset + byteslefttocopy;
+    }
+  }
+
+    /* Release descriptors to DMA */
+    /* Point to first descriptor */
+    dmarxdesc = heth.RxFrameInfos.FSRxDesc;
+    /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
+    for (i=0; i< heth.RxFrameInfos.SegCount; i++)
+    {
+      dmarxdesc->Status |= ETH_DMARXDESC_OWN;
+      dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
+    }
+
+    /* Clear Segment_Count */
+    heth.RxFrameInfos.SegCount =0;
+
+  /* When Rx Buffer unavailable flag is set: clear it and resume reception */
+  if ((heth.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET)
+  {
+    /* Clear RBUS ETHERNET DMA flag */
+    heth.Instance->DMASR = ETH_DMASR_RBUS;
+    /* Resume DMA reception */
+    heth.Instance->DMARPDR = 0;
+  }
+  return p;
+}
+
+/**
+ * This function should be called when a packet is ready to be read
+ * from the interface. It uses the function low_level_input() that
+ * should handle the actual reception of bytes from the network
+ * interface. Then the type of the received packet is determined and
+ * the appropriate input function is called.
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ */
+void ethernetif_input(void* argument)
+{
+  struct pbuf *p;
+  struct netif *netif = (struct netif *) argument;
+
+  for( ;; )
+  {
+    if (osSemaphoreAcquire(s_xSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
+    {
+      do
+      {
+        LOCK_TCPIP_CORE();
+        p = low_level_input( netif );
+        if   (p != NULL)
+        {
+          if (netif->input( p, netif) != ERR_OK )
+          {
+            pbuf_free(p);
+          }
+        }
+        UNLOCK_TCPIP_CORE();
+      } while(p!=NULL);
+    }
+  }
+}
+
+#if !LWIP_ARP
+/**
+ * This function has to be completed by user in case of ARP OFF.
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ * @return ERR_OK if ...
+ */
+static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr)
+{
+  err_t errval;
+  errval = ERR_OK;
+
+/* USER CODE BEGIN 5 */
+
+/* USER CODE END 5 */
+
+  return errval;
+
+}
+#endif /* LWIP_ARP */
+
+/**
+ * Should be called at the beginning of the program to set up the
+ * network interface. It calls the function low_level_init() to do the
+ * actual setup of the hardware.
+ *
+ * This function should be passed as a parameter to netif_add().
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ * @return ERR_OK if the loopif is initialized
+ *         ERR_MEM if private data couldn't be allocated
+ *         any other err_t on error
+ */
+err_t ethernetif_init(struct netif *netif)
+{
+  LWIP_ASSERT("netif != NULL", (netif != NULL));
+
+#if LWIP_NETIF_HOSTNAME
+  /* Initialize interface hostname */
+  netif->hostname = "lwip";
+#endif /* LWIP_NETIF_HOSTNAME */
+
+  netif->name[0] = IFNAME0;
+  netif->name[1] = IFNAME1;
+  /* We directly use etharp_output() here to save a function call.
+   * You can instead declare your own function an call etharp_output()
+   * from it if you have to do some checks before sending (e.g. if link
+   * is available...) */
+
+#if LWIP_IPV4
+#if LWIP_ARP || LWIP_ETHERNET
+#if LWIP_ARP
+  netif->output = etharp_output;
+#else
+  /* The user should write its own code in low_level_output_arp_off function */
+  netif->output = low_level_output_arp_off;
+#endif /* LWIP_ARP */
+#endif /* LWIP_ARP || LWIP_ETHERNET */
+#endif /* LWIP_IPV4 */
+
+#if LWIP_IPV6
+  netif->output_ip6 = ethip6_output;
+#endif /* LWIP_IPV6 */
+
+  netif->linkoutput = low_level_output;
+
+  /* initialize the hardware */
+  low_level_init(netif);
+
+  return ERR_OK;
+}
+
+/* USER CODE BEGIN 6 */
+
+/**
+* @brief  Returns the current time in milliseconds
+*         when LWIP_TIMERS == 1 and NO_SYS == 1
+* @param  None
+* @retval Time
+*/
+u32_t sys_jiffies(void)
+{
+  return HAL_GetTick();
+}
+
+/**
+* @brief  Returns the current time in milliseconds
+*         when LWIP_TIMERS == 1 and NO_SYS == 1
+* @param  None
+* @retval Time
+*/
+u32_t sys_now(void)
+{
+  return HAL_GetTick();
+}
+
+/* USER CODE END 6 */
+
+/**
+  * @brief  This function sets the netif link status.
+  * @param  netif: the network interface
+  * @retval None
+  */
+void ethernetif_set_link(void* argument)
+
+{
+  uint32_t regvalue = 0;
+  struct link_str *link_arg = (struct link_str *)argument;
+
+  for(;;)
+  {
+    /* Read PHY_BSR*/
+    HAL_ETH_ReadPHYRegister(&heth, PHY_BSR, &regvalue);
+
+    regvalue &= PHY_LINKED_STATUS;
+
+    /* Check whether the netif link down and the PHY link is up */
+    if(!netif_is_link_up(link_arg->netif) && (regvalue))
+    {
+      /* network cable is connected */
+      netif_set_link_up(link_arg->netif);
+    }
+    else if(netif_is_link_up(link_arg->netif) && (!regvalue))
+    {
+      /* network cable is dis-connected */
+      netif_set_link_down(link_arg->netif);
+    }
+
+    /* Suspend thread for 200 ms */
+    osDelay(200);
+  }
+}
+
+/* USER CODE BEGIN 7 */
+
+/* USER CODE END 7 */
+
+#if LWIP_NETIF_LINK_CALLBACK
+/**
+  * @brief  Link callback function, this function is called on change of link status
+  *         to update low level driver configuration.
+* @param  netif: The network interface
+  * @retval None
+  */
+void ethernetif_update_config(struct netif *netif)
+{
+  __IO uint32_t tickstart = 0;
+  uint32_t regvalue = 0;
+
+  if(netif_is_link_up(netif))
+  {
+    /* Restart the auto-negotiation */
+    if(heth.Init.AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE)
+    {
+      /* Enable Auto-Negotiation */
+      HAL_ETH_WritePHYRegister(&heth, PHY_BCR, PHY_AUTONEGOTIATION);
+
+      /* Get tick */
+      tickstart = HAL_GetTick();
+
+      /* Wait until the auto-negotiation will be completed */
+      do
+      {
+        HAL_ETH_ReadPHYRegister(&heth, PHY_BSR, &regvalue);
+
+        /* Check for the Timeout ( 1s ) */
+        if((HAL_GetTick() - tickstart ) > 1000)
+        {
+          /* In case of timeout */
+          goto error;
+        }
+      } while (((regvalue & PHY_AUTONEGO_COMPLETE) != PHY_AUTONEGO_COMPLETE));
+
+      /* Read the result of the auto-negotiation */
+      HAL_ETH_ReadPHYRegister(&heth, PHY_SR, &regvalue);
+
+      /* Configure the MAC with the Duplex Mode fixed by the auto-negotiation process */
+      if((regvalue & PHY_DUPLEX_STATUS) != (uint32_t)RESET)
+      {
+        /* Set Ethernet duplex mode to Full-duplex following the auto-negotiation */
+        heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
+      }
+      else
+      {
+        /* Set Ethernet duplex mode to Half-duplex following the auto-negotiation */
+        heth.Init.DuplexMode = ETH_MODE_HALFDUPLEX;
+      }
+      /* Configure the MAC with the speed fixed by the auto-negotiation process */
+      if(regvalue & PHY_SPEED_STATUS)
+      {
+        /* Set Ethernet speed to 10M following the auto-negotiation */
+        heth.Init.Speed = ETH_SPEED_10M;
+      }
+      else
+      {
+        /* Set Ethernet speed to 100M following the auto-negotiation */
+        heth.Init.Speed = ETH_SPEED_100M;
+      }
+    }
+    else /* AutoNegotiation Disable */
+    {
+    error :
+      /* Check parameters */
+      assert_param(IS_ETH_SPEED(heth.Init.Speed));
+      assert_param(IS_ETH_DUPLEX_MODE(heth.Init.DuplexMode));
+
+      /* Set MAC Speed and Duplex Mode to PHY */
+      HAL_ETH_WritePHYRegister(&heth, PHY_BCR, ((uint16_t)(heth.Init.DuplexMode >> 3) |
+                                                     (uint16_t)(heth.Init.Speed >> 1)));
+    }
+
+    /* ETHERNET MAC Re-Configuration */
+    HAL_ETH_ConfigMAC(&heth, (ETH_MACInitTypeDef *) NULL);
+
+    /* Restart MAC interface */
+    HAL_ETH_Start(&heth);
+  }
+  else
+  {
+    /* Stop MAC interface */
+    HAL_ETH_Stop(&heth);
+  }
+
+  ethernetif_notify_conn_changed(netif);
+}
+
+/* USER CODE BEGIN 8 */
+/**
+  * @brief  This function notify user about link status changement.
+  * @param  netif: the network interface
+  * @retval None
+  */
+__weak void ethernetif_notify_conn_changed(struct netif *netif)
+{
+  /* NOTE : This is function could be implemented in user file
+            when the callback is needed,
+  */
+
+}
+/* USER CODE END 8 */
+#endif /* LWIP_NETIF_LINK_CALLBACK */
+
+/* USER CODE BEGIN 9 */
+
+/* USER CODE END 9 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/fatfs.c

@@ -0,0 +1,56 @@
+/**
+  ******************************************************************************
+  * @file   fatfs.c
+  * @brief  Code for fatfs applications
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+#include "fatfs.h"
+
+uint8_t retSD;    /* Return value for SD */
+char SDPath[4];   /* SD logical drive path */
+FATFS SDFatFS;    /* File system object for SD logical drive */
+FIL SDFile;       /* File object for SD */
+
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+void MX_FATFS_Init(void)
+{
+  /*## FatFS: Link the SD driver ###########################*/
+  retSD = FATFS_LinkDriver(&SD_Driver, SDPath);
+
+  /* USER CODE BEGIN Init */
+  /* additional user code for init */
+  /* USER CODE END Init */
+}
+
+/**
+  * @brief  Gets Time from RTC
+  * @param  None
+  * @retval Time in DWORD
+  */
+DWORD get_fattime(void)
+{
+  /* USER CODE BEGIN get_fattime */
+  return 0;
+  /* USER CODE END get_fattime */
+}
+
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/fatfs_platform.c

@@ -0,0 +1,31 @@
+/**
+  ******************************************************************************
+  * @file           : fatfs_platform.c
+  * @brief          : fatfs_platform source file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+*/
+#include "fatfs_platform.h"
+
+uint8_t	BSP_PlatformIsDetected(void) {
+    uint8_t status = SD_PRESENT;
+    /* Check SD card detect pin */
+    if(HAL_GPIO_ReadPin(SD_DETECT_GPIO_PORT, SD_DETECT_PIN) != GPIO_PIN_RESET)
+    {
+        status = SD_NOT_PRESENT;
+    }
+    /* USER CODE BEGIN 1 */
+    /* user code can be inserted here */
+    /* USER CODE END 1 */
+    return status;
+}

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/freertos.c

@@ -0,0 +1,79 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : freertos.c
+  * Description        : Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Hook prototypes */
+void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);
+void vApplicationMallocFailedHook(void);
+
+/* USER CODE BEGIN 4 */
+void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
+{
+   configASSERT (0);
+}
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN 5 */
+void vApplicationMallocFailedHook(void)
+{
+   configASSERT (0);
+}
+/* USER CODE END 5 */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/lwip.c

@@ -0,0 +1,194 @@
+/**
+ ******************************************************************************
+  * File Name          : LWIP.c
+  * Description        : This file provides initialization code for LWIP
+  *                      middleWare.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "lwip.h"
+#include "lwip/init.h"
+#include "lwip/netif.h"
+#if defined ( __CC_ARM )  /* MDK ARM Compiler */
+#include "lwip/sio.h"
+#endif /* MDK ARM Compiler */
+#include "ethernetif.h"
+#include <string.h>
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/* Private function prototypes -----------------------------------------------*/
+/* ETH Variables initialization ----------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+/* Semaphore to signal Ethernet Link state update */
+osSemaphoreId Netif_LinkSemaphore = NULL;
+/* Ethernet link thread Argument */
+struct link_str link_arg;
+
+/* Variables Initialization */
+struct netif gnetif;
+ip4_addr_t ipaddr;
+ip4_addr_t netmask;
+ip4_addr_t gw;
+/* USER CODE BEGIN OS_THREAD_ATTR_CMSIS_RTOS_V2 */
+#define INTERFACE_THREAD_STACK_SIZE ( 2048 )
+osThreadAttr_t attributes;
+/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */
+
+/**
+  * LwIP initialization function
+  */
+void MX_LWIP_Init(void)
+{
+  /* Initilialize the LwIP stack with RTOS */
+  tcpip_init( NULL, NULL );
+
+  /* IP addresses initialization with DHCP (IPv4) */
+  ipaddr.addr = 0;
+  netmask.addr = 0;
+  gw.addr = 0;
+
+  /* add the network interface (IPv4/IPv6) with RTOS */
+  netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
+
+  /* Registers the default network interface */
+  netif_set_default(&gnetif);
+
+  if (netif_is_link_up(&gnetif))
+  {
+    /* When the netif is fully configured this function must be called */
+    netif_set_up(&gnetif);
+  }
+  else
+  {
+    /* When the netif link is down this function must be called */
+    netif_set_down(&gnetif);
+  }
+
+  /* Set the link callback function, this function is called on change of link status*/
+  netif_set_link_callback(&gnetif, ethernetif_update_config);
+
+  /* create a binary semaphore used for informing ethernetif of frame reception */
+  Netif_LinkSemaphore = osSemaphoreNew(1, 1, NULL);
+
+  link_arg.netif = &gnetif;
+  link_arg.semaphore = Netif_LinkSemaphore;
+  /* Create the Ethernet link handler thread */
+/* USER CODE BEGIN OS_THREAD_NEW_CMSIS_RTOS_V2 */
+  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
+  attributes.name = "LinkThr";
+  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE;
+  attributes.priority = osPriorityBelowNormal;
+  osThreadNew(ethernetif_set_link, &link_arg, &attributes);
+/* USER CODE END OS_THREAD_NEW_CMSIS_RTOS_V2 */
+
+  /* Start DHCP negotiation for a network interface (IPv4) */
+  dhcp_start(&gnetif);
+
+/* USER CODE BEGIN 3 */
+
+/* USER CODE END 3 */
+}
+
+#ifdef USE_OBSOLETE_USER_CODE_SECTION_4
+/* Kept to help code migration. (See new 4_1, 4_2... sections) */
+/* Avoid to use this user section which will become obsolete. */
+/* USER CODE BEGIN 4 */
+/* USER CODE END 4 */
+#endif
+
+#if defined ( __CC_ARM )  /* MDK ARM Compiler */
+/**
+ * Opens a serial device for communication.
+ *
+ * @param devnum device number
+ * @return handle to serial device if successful, NULL otherwise
+ */
+sio_fd_t sio_open(u8_t devnum)
+{
+  sio_fd_t sd;
+
+/* USER CODE BEGIN 7 */
+  sd = 0; // dummy code
+/* USER CODE END 7 */
+
+  return sd;
+}
+
+/**
+ * Sends a single character to the serial device.
+ *
+ * @param c character to send
+ * @param fd serial device handle
+ *
+ * @note This function will block until the character can be sent.
+ */
+void sio_send(u8_t c, sio_fd_t fd)
+{
+/* USER CODE BEGIN 8 */
+/* USER CODE END 8 */
+}
+
+/**
+ * Reads from the serial device.
+ *
+ * @param fd serial device handle
+ * @param data pointer to data buffer for receiving
+ * @param len maximum length (in bytes) of data to receive
+ * @return number of bytes actually received - may be 0 if aborted by sio_read_abort
+ *
+ * @note This function will block until data can be received. The blocking
+ * can be cancelled by calling sio_read_abort().
+ */
+u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len)
+{
+  u32_t recved_bytes;
+
+/* USER CODE BEGIN 9 */
+  recved_bytes = 0; // dummy code
+/* USER CODE END 9 */
+  return recved_bytes;
+}
+
+/**
+ * Tries to read from the serial device. Same as sio_read but returns
+ * immediately if no data is available and never blocks.
+ *
+ * @param fd serial device handle
+ * @param data pointer to data buffer for receiving
+ * @param len maximum length (in bytes) of data to receive
+ * @return number of bytes actually received
+ */
+u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len)
+{
+  u32_t recved_bytes;
+
+/* USER CODE BEGIN 10 */
+  recved_bytes = 0; // dummy code
+/* USER CODE END 10 */
+  return recved_bytes;
+}
+#endif /* MDK ARM Compiler */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/lwip.h

@@ -0,0 +1,77 @@
+/**
+  ******************************************************************************
+  * File Name          : LWIP.h
+  * Description        : This file provides code for the configuration
+  *                      of the LWIP.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  *************************************************************************
+
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __mx_lwip_H
+#define __mx_lwip_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "lwip/opt.h"
+#include "lwip/mem.h"
+#include "lwip/memp.h"
+#include "netif/etharp.h"
+#include "lwip/dhcp.h"
+#include "lwip/netif.h"
+#include "lwip/timeouts.h"
+#include "ethernetif.h"
+
+/* Includes for RTOS ---------------------------------------------------------*/
+#if WITH_RTOS
+#include "lwip/tcpip.h"
+#endif /* WITH_RTOS */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Global Variables ----------------------------------------------------------*/
+extern ETH_HandleTypeDef heth;
+
+/* LWIP init function */
+void MX_LWIP_Init(void);
+
+#if !WITH_RTOS
+/* USER CODE BEGIN 1 */
+/* Function defined in lwip.c to:
+ *   - Read a received packet from the Ethernet buffers
+ *   - Send it to the lwIP stack for handling
+ *   - Handle timeouts if NO_SYS_NO_TIMERS not set
+ */
+void MX_LWIP_Process(void);
+
+/* USER CODE END 1 */
+#endif /* WITH_RTOS */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ mx_lwip_H */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/main.c

@@ -0,0 +1,493 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+#include "fatfs.h"
+#include "lwip.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "semphr.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+SD_HandleTypeDef hsd2;
+DMA_HandleTypeDef hdma_sdmmc2_rx;
+DMA_HandleTypeDef hdma_sdmmc2_tx;
+
+UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_usart1_tx;
+
+/* Definitions for defaultTask */
+osThreadId_t defaultTaskHandle;
+const osThreadAttr_t defaultTask_attributes = {
+  .name = "defaultTask",
+  .stack_size = 2048 * 4,
+  .priority = (osPriority_t) osPriorityNormal,
+};
+/* USER CODE BEGIN PV */
+int SDFatFSMounted = 0;
+static StaticSemaphore_t huart1_sem;
+static SemaphoreHandle_t huart1_sem_handle;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_SDMMC2_SD_Init(void);
+static void MX_DMA_Init(void);
+void StartDefaultTask(void *argument);
+
+/* USER CODE BEGIN PFP */
+#ifdef __GNUC__
+/* With GCC, small printf (option LD Linker->Libraries->Small printf
+   set to 'Yes') calls __io_putchar() */
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#else
+#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
+#endif /* __GNUC__ */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* Enable I-Cache---------------------------------------------------------*/
+  SCB_EnableICache();
+
+  /* Enable D-Cache---------------------------------------------------------*/
+  SCB_EnableDCache();
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_DMA_Init(); // Must come before DMA-enabled peripherals
+  MX_GPIO_Init();
+  MX_USART1_UART_Init();
+  MX_SDMMC2_SD_Init();
+  MX_FATFS_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* Init scheduler */
+  osKernelInitialize();
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+  /* add mutexes, ... */
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+  /* add semaphores, ... */
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+  /* start timers, add new ones, ... */
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+  /* add queues, ... */
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* creation of defaultTask */
+  defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* add threads, ... */
+  /* USER CODE END RTOS_THREADS */
+
+  /* USER CODE BEGIN RTOS_EVENTS */
+  /* add events, ... */
+  /* USER CODE END RTOS_EVENTS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 96;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+  RCC_OscInitStruct.PLL.PLLQ = 2;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_SDMMC2;
+  PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+  PeriphClkInitStruct.Sdmmc2ClockSelection = RCC_SDMMC2CLKSOURCE_SYSCLK;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief SDMMC2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SDMMC2_SD_Init(void)
+{
+
+  /* USER CODE BEGIN SDMMC2_Init 0 */
+
+  /* USER CODE END SDMMC2_Init 0 */
+
+  /* USER CODE BEGIN SDMMC2_Init 1 */
+
+  /* USER CODE END SDMMC2_Init 1 */
+  hsd2.Instance = SDMMC2;
+  hsd2.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
+  hsd2.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
+  hsd2.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
+  hsd2.Init.BusWide = SDMMC_BUS_WIDE_1B;
+  hsd2.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
+  hsd2.Init.ClockDiv = 0;
+  /* USER CODE BEGIN SDMMC2_Init 2 */
+
+  /* USER CODE END SDMMC2_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA2_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA2_Stream0_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
+  /* DMA2_Stream5_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);
+  /* DMA2_Stream7_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOJ_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOI_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOJ, LD_USER2_Pin|LD_USER1_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : LD_USER2_Pin LD_USER1_Pin */
+  GPIO_InitStruct.Pin = LD_USER2_Pin|LD_USER1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOJ, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : SD_DETECT_Pin */
+  GPIO_InitStruct.Pin = SD_DETECT_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(SD_DETECT_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : B_USER_Pin */
+  GPIO_InitStruct.Pin = B_USER_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(B_USER_GPIO_Port, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 4 */
+static char uart_buffer[2][256];
+static size_t uart_buffer_ix = 0;
+static size_t uart_buffer_pos = 0;
+
+/**
+  * @brief  Retargets the C library printf function to the USART.
+  * @param  None
+  * @retval None
+  */
+PUTCHAR_PROTOTYPE
+{
+  uart_buffer[uart_buffer_ix][uart_buffer_pos++] = ch;
+  if (ch == '\n')
+  {
+    uart_buffer[uart_buffer_ix][uart_buffer_pos++] = '\r';
+  }
+
+  if (uart_buffer_pos >= sizeof(uart_buffer[0]) - 1 || ch == '\n')
+  {
+    xSemaphoreTake (huart1_sem_handle, UINT32_MAX);
+    HAL_UART_Transmit_DMA(&huart1, (uint8_t *)uart_buffer[uart_buffer_ix], uart_buffer_pos);
+    uart_buffer_ix = (uart_buffer_ix + 1) & 0x01;
+    uart_buffer_pos = 0;
+  }
+
+  return ch;
+}
+
+void huart1_dma_complete (UART_HandleTypeDef * huart)
+{
+  BaseType_t xHigherPriorityTaskWoken;
+  xSemaphoreGiveFromISR (huart1_sem_handle, &xHigherPriorityTaskWoken);
+  portYIELD_FROM_ISR (xHigherPriorityTaskWoken);
+}
+
+__attribute ((weak)) int _main (int argc, char * argcv[])
+{
+  printf ("Hello, world\n");
+  return 0;
+}
+
+__attribute ((weak)) err_enum_t lwip_hook_unknown_eth_protocol(struct pbuf *pbuf, struct netif *netif)
+{
+  return -1;
+}
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_StartDefaultTask */
+/**
+  * @brief  Function implementing the defaultTask thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_StartDefaultTask */
+void StartDefaultTask(void *argument)
+{
+  /* init code for LWIP */
+  MX_LWIP_Init();
+  /* USER CODE BEGIN 5 */
+
+  huart1_sem_handle = xSemaphoreCreateCountingStatic (1, 1, &huart1_sem);
+  HAL_UART_RegisterCallback(&huart1, HAL_UART_TX_COMPLETE_CB_ID, huart1_dma_complete);
+
+  FRESULT fres = f_mount(&SDFatFS, "", 1);
+  if (fres == FR_OK)
+  {
+    SDFatFSMounted = 1;
+  }
+
+  _main (0, NULL);
+
+  /* Hang here if _main returns */
+  for(;;)
+  {
+    osDelay(1);
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM1 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM1) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/sd_diskio.c

@@ -0,0 +1,687 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    sd_diskio.c
+  * @brief   SD Disk I/O driver
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Note: code generation based on sd_diskio_dma_rtos_template_bspv1.c v2.1.4
+   as FreeRTOS is enabled. */
+
+/* USER CODE BEGIN firstSection */
+/* can be used to modify / undefine following code or add new definitions */
+/* USER CODE END firstSection*/
+
+/* Includes ------------------------------------------------------------------*/
+#include "ff_gen_drv.h"
+#include "sd_diskio.h"
+
+#include <string.h>
+#include <stdio.h>
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+#define QUEUE_SIZE         (uint32_t) 10
+#define READ_CPLT_MSG      (uint32_t) 1
+#define WRITE_CPLT_MSG     (uint32_t) 2
+/*
+==================================================================
+enable the defines below to send custom rtos messages
+when an error or an abort occurs.
+Notice: depending on the HAL/SD driver the HAL_SD_ErrorCallback()
+may not be available.
+See BSP_SD_ErrorCallback() and BSP_SD_AbortCallback() below
+==================================================================
+
+#define RW_ERROR_MSG       (uint32_t) 3
+#define RW_ABORT_MSG       (uint32_t) 4
+*/
+/*
+ * the following Timeout is useful to give the control back to the applications
+ * in case of errors in either BSP_SD_ReadCpltCallback() or BSP_SD_WriteCpltCallback()
+ * the value by default is as defined in the BSP platform driver otherwise 30 secs
+ */
+#define SD_TIMEOUT 30 * 1000
+
+#define SD_DEFAULT_BLOCK_SIZE 512
+
+/*
+ * Depending on the use case, the SD card initialization could be done at the
+ * application level: if it is the case define the flag below to disable
+ * the BSP_SD_Init() call in the SD_Initialize() and add a call to
+ * BSP_SD_Init() elsewhere in the application.
+ */
+/* USER CODE BEGIN disableSDInit */
+/* #define DISABLE_SD_INIT */
+/* USER CODE END disableSDInit */
+
+/*
+ * when using cacheable memory region, it may be needed to maintain the cache
+ * validity. Enable the define below to activate a cache maintenance at each
+ * read and write operation.
+ * Notice: This is applicable only for cortex M7 based platform.
+ */
+/* USER CODE BEGIN enableSDDmaCacheMaintenance */
+#define ENABLE_SD_DMA_CACHE_MAINTENANCE  1
+/* USER CODE END enableSDDmaCacheMaintenance */
+
+/*
+* Some DMA requires 4-Byte aligned address buffer to correctly read/write data,
+* in FatFs some accesses aren't thus we need a 4-byte aligned scratch buffer to correctly
+* transfer data
+*/
+/* USER CODE BEGIN enableScratchBuffer */
+/* #define ENABLE_SCRATCH_BUFFER */
+/* USER CODE END enableScratchBuffer */
+
+/* Private variables ---------------------------------------------------------*/
+#if defined(ENABLE_SCRATCH_BUFFER)
+#if defined (ENABLE_SD_DMA_CACHE_MAINTENANCE)
+ALIGN_32BYTES(static uint8_t scratch[BLOCKSIZE]); // 32-Byte aligned for cache maintenance
+#else
+__ALIGN_BEGIN static uint8_t scratch[BLOCKSIZE] __ALIGN_END;
+#endif
+#endif
+/* Disk status */
+static volatile DSTATUS Stat = STA_NOINIT;
+
+#if (osCMSIS <= 0x20000U)
+static osMessageQId SDQueueID = NULL;
+#else
+static osMessageQueueId_t SDQueueID = NULL;
+#endif
+/* Private function prototypes -----------------------------------------------*/
+static DSTATUS SD_CheckStatus(BYTE lun);
+DSTATUS SD_initialize (BYTE);
+DSTATUS SD_status (BYTE);
+DRESULT SD_read (BYTE, BYTE*, DWORD, UINT);
+#if _USE_WRITE == 1
+DRESULT SD_write (BYTE, const BYTE*, DWORD, UINT);
+#endif /* _USE_WRITE == 1 */
+#if _USE_IOCTL == 1
+DRESULT SD_ioctl (BYTE, BYTE, void*);
+#endif  /* _USE_IOCTL == 1 */
+
+const Diskio_drvTypeDef  SD_Driver =
+{
+  SD_initialize,
+  SD_status,
+  SD_read,
+#if  _USE_WRITE == 1
+  SD_write,
+#endif /* _USE_WRITE == 1 */
+
+#if  _USE_IOCTL == 1
+  SD_ioctl,
+#endif /* _USE_IOCTL == 1 */
+};
+
+/* USER CODE BEGIN beforeFunctionSection */
+/* can be used to modify / undefine following code or add new code */
+/* USER CODE END beforeFunctionSection */
+
+/* Private functions ---------------------------------------------------------*/
+
+static int SD_CheckStatusWithTimeout(uint32_t timeout)
+{
+  uint32_t timer;
+  /* block until SDIO peripheral is ready again or a timeout occur */
+#if (osCMSIS <= 0x20000U)
+  timer = osKernelSysTick();
+  while( osKernelSysTick() - timer < timeout)
+#else
+  timer = osKernelGetTickCount();
+  while( osKernelGetTickCount() - timer < timeout)
+#endif
+  {
+    if (BSP_SD_GetCardState() == SD_TRANSFER_OK)
+    {
+      return 0;
+    }
+  }
+
+  return -1;
+}
+
+static DSTATUS SD_CheckStatus(BYTE lun)
+{
+  Stat = STA_NOINIT;
+
+  if(BSP_SD_GetCardState() == SD_TRANSFER_OK)
+  {
+    Stat &= ~STA_NOINIT;
+  }
+
+  return Stat;
+}
+
+/**
+  * @brief  Initializes a Drive
+  * @param  lun : not used
+  * @retval DSTATUS: Operation status
+  */
+DSTATUS SD_initialize(BYTE lun)
+{
+Stat = STA_NOINIT;
+
+  /*
+   * check that the kernel has been started before continuing
+   * as the osMessage API will fail otherwise
+   */
+#if (osCMSIS <= 0x20000U)
+  if(osKernelRunning())
+#else
+  if(osKernelGetState() == osKernelRunning)
+#endif
+  {
+#if !defined(DISABLE_SD_INIT)
+
+    if(BSP_SD_Init() == MSD_OK)
+    {
+      Stat = SD_CheckStatus(lun);
+    }
+
+#else
+    Stat = SD_CheckStatus(lun);
+#endif
+
+    /*
+    * if the SD is correctly initialized, create the operation queue
+    * if not already created
+    */
+
+    if (Stat != STA_NOINIT)
+    {
+      if (SDQueueID == NULL)
+      {
+ #if (osCMSIS <= 0x20000U)
+      osMessageQDef(SD_Queue, QUEUE_SIZE, uint16_t);
+      SDQueueID = osMessageCreate (osMessageQ(SD_Queue), NULL);
+#else
+      SDQueueID = osMessageQueueNew(QUEUE_SIZE, 2, NULL);
+#endif
+      }
+
+      if (SDQueueID == NULL)
+      {
+        Stat |= STA_NOINIT;
+      }
+    }
+  }
+
+  return Stat;
+}
+
+/**
+  * @brief  Gets Disk Status
+  * @param  lun : not used
+  * @retval DSTATUS: Operation status
+  */
+DSTATUS SD_status(BYTE lun)
+{
+  return SD_CheckStatus(lun);
+}
+
+/* USER CODE BEGIN beforeReadSection */
+/* can be used to modify previous code / undefine following code / add new code */
+/* USER CODE END beforeReadSection */
+/**
+  * @brief  Reads Sector(s)
+  * @param  lun : not used
+  * @param  *buff: Data buffer to store read data
+  * @param  sector: Sector address (LBA)
+  * @param  count: Number of sectors to read (1..128)
+  * @retval DRESULT: Operation result
+  */
+
+DRESULT SD_read(BYTE lun, BYTE *buff, DWORD sector, UINT count)
+{
+  uint8_t ret;
+  DRESULT res = RES_ERROR;
+  uint32_t timer;
+#if (osCMSIS < 0x20000U)
+  osEvent event;
+#else
+  uint16_t event;
+  osStatus_t status;
+#endif
+#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
+  uint32_t alignedAddr;
+#endif
+  /*
+  * ensure the SDCard is ready for a new operation
+  */
+
+  if (SD_CheckStatusWithTimeout(SD_TIMEOUT) < 0)
+  {
+    return res;
+  }
+
+#if defined(ENABLE_SCRATCH_BUFFER)
+  if (!((uint32_t)buff & 0x3))
+  {
+#endif
+    /* Fast path cause destination buffer is correctly aligned */
+    ret = BSP_SD_ReadBlocks_DMA((uint32_t*)buff, (uint32_t)(sector), count);
+
+    if (ret == MSD_OK) {
+#if (osCMSIS < 0x20000U)
+    /* wait for a message from the queue or a timeout */
+    event = osMessageGet(SDQueueID, SD_TIMEOUT);
+
+    if (event.status == osEventMessage)
+    {
+      if (event.value.v == READ_CPLT_MSG)
+      {
+        timer = osKernelSysTick();
+        /* block until SDIO IP is ready or a timeout occur */
+        while(osKernelSysTick() - timer <SD_TIMEOUT)
+#else
+          status = osMessageQueueGet(SDQueueID, (void *)&event, NULL, SD_TIMEOUT);
+          if ((status == osOK) && (event == READ_CPLT_MSG))
+          {
+            timer = osKernelGetTickCount();
+            /* block until SDIO IP is ready or a timeout occur */
+            while(osKernelGetTickCount() - timer <SD_TIMEOUT)
+#endif
+            {
+              if (BSP_SD_GetCardState() == SD_TRANSFER_OK)
+              {
+                res = RES_OK;
+#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
+                /*
+                the SCB_InvalidateDCache_by_Addr() requires a 32-Byte aligned address,
+                adjust the address and the D-Cache size to invalidate accordingly.
+                */
+                alignedAddr = (uint32_t)buff & ~0x1F;
+                SCB_InvalidateDCache_by_Addr((uint32_t*)alignedAddr, count*BLOCKSIZE + ((uint32_t)buff - alignedAddr));
+#endif
+                break;
+              }
+            }
+#if (osCMSIS < 0x20000U)
+          }
+        }
+#else
+      }
+#endif
+    }
+
+#if defined(ENABLE_SCRATCH_BUFFER)
+    }
+    else
+    {
+      /* Slow path, fetch each sector a part and memcpy to destination buffer */
+      int i;
+
+      for (i = 0; i < count; i++)
+      {
+        ret = BSP_SD_ReadBlocks_DMA((uint32_t*)scratch, (uint32_t)sector++, 1);
+        if (ret == MSD_OK )
+        {
+          /* wait until the read is successful or a timeout occurs */
+#if (osCMSIS < 0x20000U)
+          /* wait for a message from the queue or a timeout */
+          event = osMessageGet(SDQueueID, SD_TIMEOUT);
+
+          if (event.status == osEventMessage)
+          {
+            if (event.value.v == READ_CPLT_MSG)
+            {
+              timer = osKernelSysTick();
+              /* block until SDIO IP is ready or a timeout occur */
+              while(osKernelSysTick() - timer <SD_TIMEOUT)
+#else
+                status = osMessageQueueGet(SDQueueID, (void *)&event, NULL, SD_TIMEOUT);
+              if ((status == osOK) && (event == READ_CPLT_MSG))
+              {
+                timer = osKernelGetTickCount();
+                /* block until SDIO IP is ready or a timeout occur */
+                ret = MSD_ERROR;
+                while(osKernelGetTickCount() - timer < SD_TIMEOUT)
+#endif
+                {
+                  ret = BSP_SD_GetCardState();
+
+                  if (ret == MSD_OK)
+                  {
+                    break;
+                  }
+                }
+
+                if (ret != MSD_OK)
+                {
+                  break;
+                }
+#if (osCMSIS < 0x20000U)
+              }
+            }
+#else
+          }
+#endif
+#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
+          /*
+          *
+          * invalidate the scratch buffer before the next read to get the actual data instead of the cached one
+          */
+          SCB_InvalidateDCache_by_Addr((uint32_t*)scratch, BLOCKSIZE);
+#endif
+          memcpy(buff, scratch, BLOCKSIZE);
+          buff += BLOCKSIZE;
+        }
+        else
+        {
+          break;
+        }
+      }
+
+      if ((i == count) && (ret == MSD_OK ))
+        res = RES_OK;
+    }
+#endif
+  return res;
+}
+
+/* USER CODE BEGIN beforeWriteSection */
+/* can be used to modify previous code / undefine following code / add new code */
+/* USER CODE END beforeWriteSection */
+/**
+  * @brief  Writes Sector(s)
+  * @param  lun : not used
+  * @param  *buff: Data to be written
+  * @param  sector: Sector address (LBA)
+  * @param  count: Number of sectors to write (1..128)
+  * @retval DRESULT: Operation result
+  */
+#if _USE_WRITE == 1
+
+DRESULT SD_write(BYTE lun, const BYTE *buff, DWORD sector, UINT count)
+{
+  DRESULT res = RES_ERROR;
+  uint32_t timer;
+
+#if (osCMSIS < 0x20000U)
+  osEvent event;
+#else
+  uint16_t event;
+  osStatus_t status;
+#endif
+
+#if defined(ENABLE_SCRATCH_BUFFER)
+  int32_t ret;
+#endif
+
+  /*
+  * ensure the SDCard is ready for a new operation
+  */
+
+  if (SD_CheckStatusWithTimeout(SD_TIMEOUT) < 0)
+  {
+    return res;
+  }
+
+#if defined(ENABLE_SCRATCH_BUFFER)
+  if (!((uint32_t)buff & 0x3))
+  {
+#endif
+#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
+  uint32_t alignedAddr;
+  /*
+    the SCB_CleanDCache_by_Addr() requires a 32-Byte aligned address
+    adjust the address and the D-Cache size to clean accordingly.
+  */
+  alignedAddr = (uint32_t)buff & ~0x1F;
+  SCB_CleanDCache_by_Addr((uint32_t*)alignedAddr, count*BLOCKSIZE + ((uint32_t)buff - alignedAddr));
+#endif
+
+  if(BSP_SD_WriteBlocks_DMA((uint32_t*)buff,
+                           (uint32_t) (sector),
+                           count) == MSD_OK)
+  {
+#if (osCMSIS < 0x20000U)
+    /* Get the message from the queue */
+    event = osMessageGet(SDQueueID, SD_TIMEOUT);
+
+    if (event.status == osEventMessage)
+    {
+      if (event.value.v == WRITE_CPLT_MSG)
+      {
+#else
+    status = osMessageQueueGet(SDQueueID, (void *)&event, NULL, SD_TIMEOUT);
+    if ((status == osOK) && (event == WRITE_CPLT_MSG))
+    {
+#endif
+ #if (osCMSIS < 0x20000U)
+        timer = osKernelSysTick();
+        /* block until SDIO IP is ready or a timeout occur */
+        while(osKernelSysTick() - timer  < SD_TIMEOUT)
+#else
+        timer = osKernelGetTickCount();
+        /* block until SDIO IP is ready or a timeout occur */
+        while(osKernelGetTickCount() - timer  < SD_TIMEOUT)
+#endif
+        {
+          if (BSP_SD_GetCardState() == SD_TRANSFER_OK)
+          {
+            res = RES_OK;
+            break;
+          }
+        }
+#if (osCMSIS < 0x20000U)
+      }
+    }
+#else
+    }
+#endif
+  }
+#if defined(ENABLE_SCRATCH_BUFFER)
+  else {
+    /* Slow path, fetch each sector a part and memcpy to destination buffer */
+    int i;
+
+#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
+    /*
+     * invalidate the scratch buffer before the next write to get the actual data instead of the cached one
+     */
+     SCB_InvalidateDCache_by_Addr((uint32_t*)scratch, BLOCKSIZE);
+#endif
+      for (i = 0; i < count; i++)
+      {
+        memcpy((void *)scratch, buff, BLOCKSIZE);
+        buff += BLOCKSIZE;
+
+        ret = BSP_SD_WriteBlocks_DMA((uint32_t*)scratch, (uint32_t)sector++, 1);
+        if (ret == MSD_OK )
+        {
+          /* wait until the read is successful or a timeout occurs */
+#if (osCMSIS < 0x20000U)
+          /* wait for a message from the queue or a timeout */
+          event = osMessageGet(SDQueueID, SD_TIMEOUT);
+
+          if (event.status == osEventMessage)
+          {
+            if (event.value.v == READ_CPLT_MSG)
+            {
+              timer = osKernelSysTick();
+              /* block until SDIO IP is ready or a timeout occur */
+              while(osKernelSysTick() - timer <SD_TIMEOUT)
+#else
+                status = osMessageQueueGet(SDQueueID, (void *)&event, NULL, SD_TIMEOUT);
+              if ((status == osOK) && (event == READ_CPLT_MSG))
+              {
+                timer = osKernelGetTickCount();
+                /* block until SDIO IP is ready or a timeout occur */
+                ret = MSD_ERROR;
+                while(osKernelGetTickCount() - timer < SD_TIMEOUT)
+#endif
+                {
+                  ret = BSP_SD_GetCardState();
+
+                  if (ret == MSD_OK)
+                  {
+                    break;
+                  }
+                }
+
+                if (ret != MSD_OK)
+                {
+                  break;
+                }
+#if (osCMSIS < 0x20000U)
+              }
+            }
+#else
+          }
+#endif
+        }
+        else
+        {
+          break;
+        }
+      }
+
+      if ((i == count) && (ret == MSD_OK ))
+        res = RES_OK;
+    }
+
+  }
+#endif
+
+  return res;
+}
+ #endif /* _USE_WRITE == 1 */
+
+/* USER CODE BEGIN beforeIoctlSection */
+/* can be used to modify previous code / undefine following code / add new code */
+/* USER CODE END beforeIoctlSection */
+/**
+  * @brief  I/O control operation
+  * @param  lun : not used
+  * @param  cmd: Control code
+  * @param  *buff: Buffer to send/receive control data
+  * @retval DRESULT: Operation result
+  */
+#if _USE_IOCTL == 1
+DRESULT SD_ioctl(BYTE lun, BYTE cmd, void *buff)
+{
+  DRESULT res = RES_ERROR;
+  BSP_SD_CardInfo CardInfo;
+
+  if (Stat & STA_NOINIT) return RES_NOTRDY;
+
+  switch (cmd)
+  {
+  /* Make sure that no pending write process */
+  case CTRL_SYNC :
+    res = RES_OK;
+    break;
+
+  /* Get number of sectors on the disk (DWORD) */
+  case GET_SECTOR_COUNT :
+    BSP_SD_GetCardInfo(&CardInfo);
+    *(DWORD*)buff = CardInfo.LogBlockNbr;
+    res = RES_OK;
+    break;
+
+  /* Get R/W sector size (WORD) */
+  case GET_SECTOR_SIZE :
+    BSP_SD_GetCardInfo(&CardInfo);
+    *(WORD*)buff = CardInfo.LogBlockSize;
+    res = RES_OK;
+    break;
+
+  /* Get erase block size in unit of sector (DWORD) */
+  case GET_BLOCK_SIZE :
+    BSP_SD_GetCardInfo(&CardInfo);
+    *(DWORD*)buff = CardInfo.LogBlockSize / SD_DEFAULT_BLOCK_SIZE;
+    res = RES_OK;
+    break;
+
+  default:
+    res = RES_PARERR;
+  }
+
+  return res;
+}
+#endif /* _USE_IOCTL == 1 */
+
+/* USER CODE BEGIN afterIoctlSection */
+/* can be used to modify previous code / undefine following code / add new code */
+/* USER CODE END afterIoctlSection */
+
+/* USER CODE BEGIN callbackSection */
+/* can be used to modify / following code or add new code */
+/* USER CODE END callbackSection */
+/**
+  * @brief Tx Transfer completed callbacks
+  * @param hsd: SD handle
+  * @retval None
+  */
+void BSP_SD_WriteCpltCallback(void)
+{
+
+  /*
+   * No need to add an "osKernelRunning()" check here, as the SD_initialize()
+   * is always called before any SD_Read()/SD_Write() call
+   */
+#if (osCMSIS < 0x20000U)
+   osMessagePut(SDQueueID, WRITE_CPLT_MSG, 0);
+#else
+   const uint16_t msg = WRITE_CPLT_MSG;
+   osMessageQueuePut(SDQueueID, (const void *)&msg, NULL, 0);
+#endif
+}
+
+/**
+  * @brief Rx Transfer completed callbacks
+  * @param hsd: SD handle
+  * @retval None
+  */
+void BSP_SD_ReadCpltCallback(void)
+{
+  /*
+   * No need to add an "osKernelRunning()" check here, as the SD_initialize()
+   * is always called before any SD_Read()/SD_Write() call
+   */
+#if (osCMSIS < 0x20000U)
+   osMessagePut(SDQueueID, READ_CPLT_MSG, 0);
+#else
+   const uint16_t msg = READ_CPLT_MSG;
+   osMessageQueuePut(SDQueueID, (const void *)&msg, NULL, 0);
+#endif
+}
+
+/* USER CODE BEGIN ErrorAbortCallbacks */
+/*
+void BSP_SD_AbortCallback(void)
+{
+#if (osCMSIS < 0x20000U)
+   osMessagePut(SDQueueID, RW_ABORT_MSG, 0);
+#else
+   const uint16_t msg = RW_ABORT_MSG;
+   osMessageQueuePut(SDQueueID, (const void *)&msg, NULL, 0);
+#endif
+}
+*/
+/* USER CODE END ErrorAbortCallbacks */
+
+/* USER CODE BEGIN lastSection */
+/* can be used to modify / undefine previous code or add new code */
+/* USER CODE END lastSection */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/startup_stm32f769xx.s

@@ -0,0 +1,624 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32f769xx.s
+  * @author    MCD Application Team
+  * @brief     STM32F769xx Devices vector table for GCC based toolchain. 
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M7 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+    
+  .syntax unified
+  .cpu cortex-m7
+  .fpu softvfp
+  .thumb
+
+.global  g_pfnVectors
+.global  Default_Handler
+
+/* start address for the initialization values of the .data section. 
+defined in linker script */
+.word  _sidata
+/* start address for the .data section. defined in linker script */  
+.word  _sdata
+/* end address for the .data section. defined in linker script */
+.word  _edata
+/* start address for the .bss section. defined in linker script */
+.word  _sbss
+/* end address for the .bss section. defined in linker script */
+.word  _ebss
+/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
+
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called. 
+ * @param  None
+ * @retval : None
+*/
+
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler:  
+  ldr   sp, =_estack      /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */  
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system intitialization function.*/
+  bl  SystemInit   
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+  bl  main
+  bx  lr    
+.size  Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an 
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ * @param  None     
+ * @retval None       
+*/
+    .section  .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+  b  Infinite_Loop
+  .size  Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M7. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+* 
+*******************************************************************************/
+   .section  .isr_vector,"a",%progbits
+  .type  g_pfnVectors, %object
+  .size  g_pfnVectors, .-g_pfnVectors
+   
+   
+g_pfnVectors:
+  .word  _estack
+  .word  Reset_Handler
+
+  .word  NMI_Handler
+  .word  HardFault_Handler
+  .word  MemManage_Handler
+  .word  BusFault_Handler
+  .word  UsageFault_Handler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  SVC_Handler
+  .word  DebugMon_Handler
+  .word  0
+  .word  PendSV_Handler
+  .word  SysTick_Handler
+  
+  /* External Interrupts */
+  .word     WWDG_IRQHandler                   /* Window WatchDog              */
+  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
+  .word     TAMP_STAMP_IRQHandler             /* Tamper and TimeStamps through the EXTI line */
+  .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line */
+  .word     FLASH_IRQHandler                  /* FLASH                        */
+  .word     RCC_IRQHandler                    /* RCC                          */
+  .word     EXTI0_IRQHandler                  /* EXTI Line0                   */
+  .word     EXTI1_IRQHandler                  /* EXTI Line1                   */
+  .word     EXTI2_IRQHandler                  /* EXTI Line2                   */
+  .word     EXTI3_IRQHandler                  /* EXTI Line3                   */
+  .word     EXTI4_IRQHandler                  /* EXTI Line4                   */
+  .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                */
+  .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                */
+  .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                */
+  .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                */
+  .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                */
+  .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                */
+  .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                */
+  .word     ADC_IRQHandler                    /* ADC1, ADC2 and ADC3s         */
+  .word     CAN1_TX_IRQHandler                /* CAN1 TX                      */
+  .word     CAN1_RX0_IRQHandler               /* CAN1 RX0                     */
+  .word     CAN1_RX1_IRQHandler               /* CAN1 RX1                     */
+  .word     CAN1_SCE_IRQHandler               /* CAN1 SCE                     */
+  .word     EXTI9_5_IRQHandler                /* External Line[9:5]s          */
+  .word     TIM1_BRK_TIM9_IRQHandler          /* TIM1 Break and TIM9          */
+  .word     TIM1_UP_TIM10_IRQHandler          /* TIM1 Update and TIM10        */
+  .word     TIM1_TRG_COM_TIM11_IRQHandler     /* TIM1 Trigger and Commutation and TIM11 */
+  .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */
+  .word     TIM2_IRQHandler                   /* TIM2                         */
+  .word     TIM3_IRQHandler                   /* TIM3                         */
+  .word     TIM4_IRQHandler                   /* TIM4                         */
+  .word     I2C1_EV_IRQHandler                /* I2C1 Event                   */
+  .word     I2C1_ER_IRQHandler                /* I2C1 Error                   */
+  .word     I2C2_EV_IRQHandler                /* I2C2 Event                   */
+  .word     I2C2_ER_IRQHandler                /* I2C2 Error                   */
+  .word     SPI1_IRQHandler                   /* SPI1                         */
+  .word     SPI2_IRQHandler                   /* SPI2                         */
+  .word     USART1_IRQHandler                 /* USART1                       */
+  .word     USART2_IRQHandler                 /* USART2                       */
+  .word     USART3_IRQHandler                 /* USART3                       */
+  .word     EXTI15_10_IRQHandler              /* External Line[15:10]s        */
+  .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line */
+  .word     OTG_FS_WKUP_IRQHandler            /* USB OTG FS Wakeup through EXTI line */
+  .word     TIM8_BRK_TIM12_IRQHandler         /* TIM8 Break and TIM12         */
+  .word     TIM8_UP_TIM13_IRQHandler          /* TIM8 Update and TIM13        */
+  .word     TIM8_TRG_COM_TIM14_IRQHandler     /* TIM8 Trigger and Commutation and TIM14 */
+  .word     TIM8_CC_IRQHandler                /* TIM8 Capture Compare         */
+  .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                 */
+  .word     FMC_IRQHandler                    /* FMC                          */
+  .word     SDMMC1_IRQHandler                 /* SDMMC1                       */
+  .word     TIM5_IRQHandler                   /* TIM5                         */
+  .word     SPI3_IRQHandler                   /* SPI3                         */
+  .word     UART4_IRQHandler                  /* UART4                        */
+  .word     UART5_IRQHandler                  /* UART5                        */
+  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC1&2 underrun errors */
+  .word     TIM7_IRQHandler                   /* TIM7                         */
+  .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                */
+  .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                */
+  .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                */
+  .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                */
+  .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                */
+  .word     ETH_IRQHandler                    /* Ethernet                     */
+  .word     ETH_WKUP_IRQHandler               /* Ethernet Wakeup through EXTI line */
+  .word     CAN2_TX_IRQHandler                /* CAN2 TX                      */
+  .word     CAN2_RX0_IRQHandler               /* CAN2 RX0                     */
+  .word     CAN2_RX1_IRQHandler               /* CAN2 RX1                     */
+  .word     CAN2_SCE_IRQHandler               /* CAN2 SCE                     */
+  .word     OTG_FS_IRQHandler                 /* USB OTG FS                   */
+  .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                */
+  .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                */
+  .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                */
+  .word     USART6_IRQHandler                 /* USART6                       */
+  .word     I2C3_EV_IRQHandler                /* I2C3 event                   */
+  .word     I2C3_ER_IRQHandler                /* I2C3 error                   */
+  .word     OTG_HS_EP1_OUT_IRQHandler         /* USB OTG HS End Point 1 Out   */
+  .word     OTG_HS_EP1_IN_IRQHandler          /* USB OTG HS End Point 1 In    */
+  .word     OTG_HS_WKUP_IRQHandler            /* USB OTG HS Wakeup through EXTI */
+  .word     OTG_HS_IRQHandler                 /* USB OTG HS                   */
+  .word     DCMI_IRQHandler                   /* DCMI                         */
+  .word     0                                 /* Reserved                     */
+  .word     RNG_IRQHandler                    /* RNG                          */
+  .word     FPU_IRQHandler                    /* FPU                          */
+  .word     UART7_IRQHandler                  /* UART7                        */
+  .word     UART8_IRQHandler                  /* UART8                        */
+  .word     SPI4_IRQHandler                   /* SPI4                         */
+  .word     SPI5_IRQHandler                   /* SPI5                         */
+  .word     SPI6_IRQHandler                   /* SPI6                         */
+  .word     SAI1_IRQHandler                   /* SAI1                         */
+  .word     LTDC_IRQHandler                   /* LTDC                         */
+  .word     LTDC_ER_IRQHandler                /* LTDC error                   */
+  .word     DMA2D_IRQHandler                  /* DMA2D                        */
+  .word     SAI2_IRQHandler                   /* SAI2                         */
+  .word     QUADSPI_IRQHandler                /* QUADSPI                      */
+  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
+  .word     CEC_IRQHandler                    /* HDMI_CEC                     */
+  .word     I2C4_EV_IRQHandler                /* I2C4 Event                   */
+  .word     I2C4_ER_IRQHandler                /* I2C4 Error                   */
+  .word     SPDIF_RX_IRQHandler               /* SPDIF_RX                     */
+  .word     DSI_IRQHandler                    /* DSI                          */
+  .word     DFSDM1_FLT0_IRQHandler            /* DFSDM1 Filter 0 global Interrupt */
+  .word     DFSDM1_FLT1_IRQHandler            /* DFSDM1 Filter 1 global Interrupt */
+  .word     DFSDM1_FLT2_IRQHandler            /* DFSDM1 Filter 2 global Interrupt */
+  .word     DFSDM1_FLT3_IRQHandler            /* DFSDM1 Filter 3 global Interrupt */
+  .word     SDMMC2_IRQHandler                 /* SDMMC2                       */
+  .word     CAN3_TX_IRQHandler                /* CAN3 TX                      */
+  .word     CAN3_RX0_IRQHandler               /* CAN3 RX0                     */
+  .word     CAN3_RX1_IRQHandler               /* CAN3 RX1                     */
+  .word     CAN3_SCE_IRQHandler               /* CAN3 SCE                     */
+  .word     JPEG_IRQHandler                   /* JPEG                         */
+  .word     MDIOS_IRQHandler                  /* MDIOS                        */
+  
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler. 
+* As they are weak aliases, any function with the same name will override 
+* this definition.
+* 
+*******************************************************************************/
+   .weak      NMI_Handler
+   .thumb_set NMI_Handler,Default_Handler
+  
+   .weak      HardFault_Handler
+   .thumb_set HardFault_Handler,Default_Handler
+  
+   .weak      MemManage_Handler
+   .thumb_set MemManage_Handler,Default_Handler
+  
+   .weak      BusFault_Handler
+   .thumb_set BusFault_Handler,Default_Handler
+
+   .weak      UsageFault_Handler
+   .thumb_set UsageFault_Handler,Default_Handler
+
+   .weak      SVC_Handler
+   .thumb_set SVC_Handler,Default_Handler
+
+   .weak      DebugMon_Handler
+   .thumb_set DebugMon_Handler,Default_Handler
+
+   .weak      PendSV_Handler
+   .thumb_set PendSV_Handler,Default_Handler
+
+   .weak      SysTick_Handler
+   .thumb_set SysTick_Handler,Default_Handler              
+  
+   .weak      WWDG_IRQHandler                   
+   .thumb_set WWDG_IRQHandler,Default_Handler      
+                  
+   .weak      PVD_IRQHandler      
+   .thumb_set PVD_IRQHandler,Default_Handler
+               
+   .weak      TAMP_STAMP_IRQHandler            
+   .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
+            
+   .weak      RTC_WKUP_IRQHandler                  
+   .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+            
+   .weak      FLASH_IRQHandler         
+   .thumb_set FLASH_IRQHandler,Default_Handler
+                  
+   .weak      RCC_IRQHandler      
+   .thumb_set RCC_IRQHandler,Default_Handler
+                  
+   .weak      EXTI0_IRQHandler         
+   .thumb_set EXTI0_IRQHandler,Default_Handler
+                  
+   .weak      EXTI1_IRQHandler         
+   .thumb_set EXTI1_IRQHandler,Default_Handler
+                     
+   .weak      EXTI2_IRQHandler         
+   .thumb_set EXTI2_IRQHandler,Default_Handler 
+                 
+   .weak      EXTI3_IRQHandler         
+   .thumb_set EXTI3_IRQHandler,Default_Handler
+                        
+   .weak      EXTI4_IRQHandler         
+   .thumb_set EXTI4_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream0_IRQHandler               
+   .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
+         
+   .weak      DMA1_Stream1_IRQHandler               
+   .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream2_IRQHandler               
+   .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream3_IRQHandler               
+   .thumb_set DMA1_Stream3_IRQHandler,Default_Handler 
+                 
+   .weak      DMA1_Stream4_IRQHandler              
+   .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream5_IRQHandler               
+   .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream6_IRQHandler               
+   .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
+                  
+   .weak      ADC_IRQHandler      
+   .thumb_set ADC_IRQHandler,Default_Handler
+               
+   .weak      CAN1_TX_IRQHandler   
+   .thumb_set CAN1_TX_IRQHandler,Default_Handler
+            
+   .weak      CAN1_RX0_IRQHandler                  
+   .thumb_set CAN1_RX0_IRQHandler,Default_Handler
+                           
+   .weak      CAN1_RX1_IRQHandler                  
+   .thumb_set CAN1_RX1_IRQHandler,Default_Handler
+            
+   .weak      CAN1_SCE_IRQHandler                  
+   .thumb_set CAN1_SCE_IRQHandler,Default_Handler
+            
+   .weak      EXTI9_5_IRQHandler   
+   .thumb_set EXTI9_5_IRQHandler,Default_Handler
+            
+   .weak      TIM1_BRK_TIM9_IRQHandler            
+   .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
+            
+   .weak      TIM1_UP_TIM10_IRQHandler            
+   .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
+
+   .weak      TIM1_TRG_COM_TIM11_IRQHandler      
+   .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
+      
+   .weak      TIM1_CC_IRQHandler   
+   .thumb_set TIM1_CC_IRQHandler,Default_Handler
+                  
+   .weak      TIM2_IRQHandler            
+   .thumb_set TIM2_IRQHandler,Default_Handler
+                  
+   .weak      TIM3_IRQHandler            
+   .thumb_set TIM3_IRQHandler,Default_Handler
+                  
+   .weak      TIM4_IRQHandler            
+   .thumb_set TIM4_IRQHandler,Default_Handler
+                  
+   .weak      I2C1_EV_IRQHandler   
+   .thumb_set I2C1_EV_IRQHandler,Default_Handler
+                     
+   .weak      I2C1_ER_IRQHandler   
+   .thumb_set I2C1_ER_IRQHandler,Default_Handler
+                     
+   .weak      I2C2_EV_IRQHandler   
+   .thumb_set I2C2_EV_IRQHandler,Default_Handler
+                  
+   .weak      I2C2_ER_IRQHandler   
+   .thumb_set I2C2_ER_IRQHandler,Default_Handler
+                           
+   .weak      SPI1_IRQHandler            
+   .thumb_set SPI1_IRQHandler,Default_Handler
+                        
+   .weak      SPI2_IRQHandler            
+   .thumb_set SPI2_IRQHandler,Default_Handler
+                  
+   .weak      USART1_IRQHandler      
+   .thumb_set USART1_IRQHandler,Default_Handler
+                     
+   .weak      USART2_IRQHandler      
+   .thumb_set USART2_IRQHandler,Default_Handler
+                     
+   .weak      USART3_IRQHandler      
+   .thumb_set USART3_IRQHandler,Default_Handler
+                  
+   .weak      EXTI15_10_IRQHandler               
+   .thumb_set EXTI15_10_IRQHandler,Default_Handler
+               
+   .weak      RTC_Alarm_IRQHandler               
+   .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+            
+   .weak      OTG_FS_WKUP_IRQHandler         
+   .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
+            
+   .weak      TIM8_BRK_TIM12_IRQHandler         
+   .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
+         
+   .weak      TIM8_UP_TIM13_IRQHandler            
+   .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
+         
+   .weak      TIM8_TRG_COM_TIM14_IRQHandler      
+   .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
+      
+   .weak      TIM8_CC_IRQHandler   
+   .thumb_set TIM8_CC_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream7_IRQHandler               
+   .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
+                     
+   .weak      FMC_IRQHandler            
+   .thumb_set FMC_IRQHandler,Default_Handler
+                     
+   .weak      SDMMC1_IRQHandler            
+   .thumb_set SDMMC1_IRQHandler,Default_Handler
+                     
+   .weak      TIM5_IRQHandler            
+   .thumb_set TIM5_IRQHandler,Default_Handler
+                     
+   .weak      SPI3_IRQHandler            
+   .thumb_set SPI3_IRQHandler,Default_Handler
+                     
+   .weak      UART4_IRQHandler         
+   .thumb_set UART4_IRQHandler,Default_Handler
+                  
+   .weak      UART5_IRQHandler         
+   .thumb_set UART5_IRQHandler,Default_Handler
+                  
+   .weak      TIM6_DAC_IRQHandler                  
+   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+               
+   .weak      TIM7_IRQHandler            
+   .thumb_set TIM7_IRQHandler,Default_Handler
+         
+   .weak      DMA2_Stream0_IRQHandler               
+   .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
+               
+   .weak      DMA2_Stream1_IRQHandler               
+   .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
+                  
+   .weak      DMA2_Stream2_IRQHandler               
+   .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
+            
+   .weak      DMA2_Stream3_IRQHandler               
+   .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
+            
+   .weak      DMA2_Stream4_IRQHandler               
+   .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
+   
+   .weak      DMA2_Stream4_IRQHandler               
+   .thumb_set DMA2_Stream4_IRQHandler,Default_Handler   
+
+   .weak      ETH_IRQHandler   
+   .thumb_set ETH_IRQHandler,Default_Handler
+   
+   .weak      ETH_WKUP_IRQHandler   
+   .thumb_set ETH_WKUP_IRQHandler,Default_Handler
+
+   .weak      CAN2_TX_IRQHandler   
+   .thumb_set CAN2_TX_IRQHandler,Default_Handler   
+                           
+   .weak      CAN2_RX0_IRQHandler                  
+   .thumb_set CAN2_RX0_IRQHandler,Default_Handler
+                           
+   .weak      CAN2_RX1_IRQHandler                  
+   .thumb_set CAN2_RX1_IRQHandler,Default_Handler
+                           
+   .weak      CAN2_SCE_IRQHandler                  
+   .thumb_set CAN2_SCE_IRQHandler,Default_Handler
+                           
+   .weak      OTG_FS_IRQHandler      
+   .thumb_set OTG_FS_IRQHandler,Default_Handler
+                     
+   .weak      DMA2_Stream5_IRQHandler               
+   .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
+                  
+   .weak      DMA2_Stream6_IRQHandler               
+   .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
+                  
+   .weak      DMA2_Stream7_IRQHandler               
+   .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
+                  
+   .weak      USART6_IRQHandler      
+   .thumb_set USART6_IRQHandler,Default_Handler
+                        
+   .weak      I2C3_EV_IRQHandler   
+   .thumb_set I2C3_EV_IRQHandler,Default_Handler
+                        
+   .weak      I2C3_ER_IRQHandler   
+   .thumb_set I2C3_ER_IRQHandler,Default_Handler
+                        
+   .weak      OTG_HS_EP1_OUT_IRQHandler         
+   .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
+               
+   .weak      OTG_HS_EP1_IN_IRQHandler            
+   .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
+               
+   .weak      OTG_HS_WKUP_IRQHandler         
+   .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
+            
+   .weak      OTG_HS_IRQHandler      
+   .thumb_set OTG_HS_IRQHandler,Default_Handler
+                  
+   .weak      DCMI_IRQHandler            
+   .thumb_set DCMI_IRQHandler,Default_Handler
+
+   .weak      RNG_IRQHandler            
+   .thumb_set RNG_IRQHandler,Default_Handler   
+
+   .weak      FPU_IRQHandler                  
+   .thumb_set FPU_IRQHandler,Default_Handler
+
+   .weak      UART7_IRQHandler                  
+   .thumb_set UART7_IRQHandler,Default_Handler
+
+   .weak      UART8_IRQHandler                  
+   .thumb_set UART8_IRQHandler,Default_Handler   
+
+   .weak      SPI4_IRQHandler            
+   .thumb_set SPI4_IRQHandler,Default_Handler
+   
+   .weak      SPI5_IRQHandler            
+   .thumb_set SPI5_IRQHandler,Default_Handler
+
+   .weak      SPI6_IRQHandler            
+   .thumb_set SPI6_IRQHandler,Default_Handler   
+
+   .weak      SAI1_IRQHandler            
+   .thumb_set SAI1_IRQHandler,Default_Handler
+   
+   .weak      LTDC_IRQHandler            
+   .thumb_set LTDC_IRQHandler,Default_Handler
+
+   .weak      LTDC_ER_IRQHandler            
+   .thumb_set LTDC_ER_IRQHandler,Default_Handler
+
+   .weak      DMA2D_IRQHandler            
+   .thumb_set DMA2D_IRQHandler,Default_Handler   
+
+   .weak      SAI2_IRQHandler            
+   .thumb_set SAI2_IRQHandler,Default_Handler
+   
+   .weak      QUADSPI_IRQHandler            
+   .thumb_set QUADSPI_IRQHandler,Default_Handler
+ 
+   .weak      LPTIM1_IRQHandler            
+   .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+   .weak      CEC_IRQHandler            
+   .thumb_set CEC_IRQHandler,Default_Handler
+   
+   .weak      I2C4_EV_IRQHandler            
+   .thumb_set I2C4_EV_IRQHandler,Default_Handler 
+ 
+   .weak      I2C4_ER_IRQHandler            
+   .thumb_set I2C4_ER_IRQHandler,Default_Handler
+   
+   .weak      SPDIF_RX_IRQHandler            
+   .thumb_set SPDIF_RX_IRQHandler,Default_Handler
+
+   .weak      DSI_IRQHandler            
+   .thumb_set DSI_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT0_IRQHandler            
+   .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT1_IRQHandler            
+   .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT2_IRQHandler            
+   .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT3_IRQHandler            
+   .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
+
+   .weak      SDMMC2_IRQHandler            
+   .thumb_set SDMMC2_IRQHandler,Default_Handler
+
+   .weak      CAN3_TX_IRQHandler            
+   .thumb_set CAN3_TX_IRQHandler,Default_Handler
+
+   .weak      CAN3_RX0_IRQHandler            
+   .thumb_set CAN3_RX0_IRQHandler,Default_Handler
+
+   .weak      CAN3_RX1_IRQHandler            
+   .thumb_set CAN3_RX1_IRQHandler,Default_Handler
+
+   .weak      CAN3_SCE_IRQHandler            
+   .thumb_set CAN3_SCE_IRQHandler,Default_Handler
+
+   .weak      JPEG_IRQHandler            
+   .thumb_set JPEG_IRQHandler,Default_Handler
+
+   .weak      MDIOS_IRQHandler            
+   .thumb_set MDIOS_IRQHandler,Default_Handler   
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/        
+ 

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/stm32f7xx_hal_msp.c

@@ -0,0 +1,328 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32f7xx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_sdmmc2_rx;
+
+extern DMA_HandleTypeDef hdma_sdmmc2_tx;
+
+extern DMA_HandleTypeDef hdma_usart1_tx;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief SD MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hsd: SD handle pointer
+* @retval None
+*/
+void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hsd->Instance==SDMMC2)
+  {
+  /* USER CODE BEGIN SDMMC2_MspInit 0 */
+
+  /* USER CODE END SDMMC2_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_SDMMC2_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    /**SDMMC2 GPIO Configuration
+    PB4     ------> SDMMC2_D3
+    PB3     ------> SDMMC2_D2
+    PD7     ------> SDMMC2_CMD
+    PD6     ------> SDMMC2_CK
+    PG10     ------> SDMMC2_D1
+    PG9     ------> SDMMC2_D0
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF10_SDMMC2;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC2;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC2;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+    /* SDMMC2 DMA Init */
+    /* SDMMC2_RX Init */
+    hdma_sdmmc2_rx.Instance = DMA2_Stream0;
+    hdma_sdmmc2_rx.Init.Channel = DMA_CHANNEL_11;
+    hdma_sdmmc2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_sdmmc2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_sdmmc2_rx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_sdmmc2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_sdmmc2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_sdmmc2_rx.Init.Mode = DMA_PFCTRL;
+    hdma_sdmmc2_rx.Init.Priority = DMA_PRIORITY_LOW;
+    hdma_sdmmc2_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
+    hdma_sdmmc2_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
+    hdma_sdmmc2_rx.Init.MemBurst = DMA_MBURST_INC4;
+    hdma_sdmmc2_rx.Init.PeriphBurst = DMA_PBURST_INC4;
+    if (HAL_DMA_Init(&hdma_sdmmc2_rx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hsd,hdmarx,hdma_sdmmc2_rx);
+
+    /* SDMMC2_TX Init */
+    hdma_sdmmc2_tx.Instance = DMA2_Stream5;
+    hdma_sdmmc2_tx.Init.Channel = DMA_CHANNEL_11;
+    hdma_sdmmc2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_sdmmc2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_sdmmc2_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_sdmmc2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_sdmmc2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_sdmmc2_tx.Init.Mode = DMA_PFCTRL;
+    hdma_sdmmc2_tx.Init.Priority = DMA_PRIORITY_LOW;
+    hdma_sdmmc2_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
+    hdma_sdmmc2_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
+    hdma_sdmmc2_tx.Init.MemBurst = DMA_MBURST_INC4;
+    hdma_sdmmc2_tx.Init.PeriphBurst = DMA_PBURST_INC4;
+    if (HAL_DMA_Init(&hdma_sdmmc2_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hsd,hdmatx,hdma_sdmmc2_tx);
+
+    /* SDMMC2 interrupt Init */
+    HAL_NVIC_SetPriority(SDMMC2_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(SDMMC2_IRQn);
+  /* USER CODE BEGIN SDMMC2_MspInit 1 */
+
+  /* USER CODE END SDMMC2_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief SD MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hsd: SD handle pointer
+* @retval None
+*/
+void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
+{
+  if(hsd->Instance==SDMMC2)
+  {
+  /* USER CODE BEGIN SDMMC2_MspDeInit 0 */
+
+  /* USER CODE END SDMMC2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SDMMC2_CLK_DISABLE();
+
+    /**SDMMC2 GPIO Configuration
+    PB4     ------> SDMMC2_D3
+    PB3     ------> SDMMC2_D2
+    PD7     ------> SDMMC2_CMD
+    PD6     ------> SDMMC2_CK
+    PG10     ------> SDMMC2_D1
+    PG9     ------> SDMMC2_D0
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_4|GPIO_PIN_3);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_7|GPIO_PIN_6);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_10|GPIO_PIN_9);
+
+    /* SDMMC2 DMA DeInit */
+    HAL_DMA_DeInit(hsd->hdmarx);
+    HAL_DMA_DeInit(hsd->hdmatx);
+
+    /* SDMMC2 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(SDMMC2_IRQn);
+  /* USER CODE BEGIN SDMMC2_MspDeInit 1 */
+
+  /* USER CODE END SDMMC2_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PA10     ------> USART1_RX
+    PA9     ------> USART1_TX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* USART1 DMA Init */
+    /* USART1_TX Init */
+    hdma_usart1_tx.Instance = DMA2_Stream7;
+    hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4;
+    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
+    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+    hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
+
+    /* USART1 interrupt Init */
+    HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA10     ------> USART1_RX
+    PA9     ------> USART1_TX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10|GPIO_PIN_9);
+
+    /* USART1 DMA DeInit */
+    HAL_DMA_DeInit(huart->hdmatx);
+
+    /* USART1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/stm32f7xx_hal_timebase_tim.c

@@ -0,0 +1,113 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f7xx_hal_timebase_TIM.c
+  * @brief   HAL time base based on the hardware TIM.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f7xx_hal.h"
+#include "stm32f7xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim1;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM1 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  /*Configure the TIM1 IRQ priority */
+  HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, TickPriority ,0);
+
+  /* Enable the TIM1 global Interrupt */
+  HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
+
+  /* Enable TIM1 clock */
+  __HAL_RCC_TIM1_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM1 clock */
+  uwTimclock = 2*HAL_RCC_GetPCLK2Freq();
+  /* Compute the prescaler value to have TIM1 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM1 */
+  htim1.Instance = TIM1;
+
+  /* Initialize TIMx peripheral as follow:
+  + Period = [(TIM1CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim1.Init.Period = (1000000U / 1000U) - 1U;
+  htim1.Init.Prescaler = uwPrescalerValue;
+  htim1.Init.ClockDivision = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  if(HAL_TIM_Base_Init(&htim1) == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    return HAL_TIM_Base_Start_IT(&htim1);
+  }
+
+  /* Return function status */
+  return HAL_ERROR;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM1 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM1 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM1 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM1 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE);
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/stm32f7xx_it.c

@@ -0,0 +1,270 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f7xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32f7xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern ETH_HandleTypeDef heth;
+extern DMA_HandleTypeDef hdma_sdmmc2_rx;
+extern DMA_HandleTypeDef hdma_sdmmc2_tx;
+extern SD_HandleTypeDef hsd2;
+extern DMA_HandleTypeDef hdma_usart1_tx;
+extern UART_HandleTypeDef huart1;
+extern TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M7 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F7xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32f7xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM1 update interrupt and TIM10 global interrupt.
+  */
+void TIM1_UP_TIM10_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
+
+  /* USER CODE END TIM1_UP_TIM10_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim1);
+  /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */
+
+  /* USER CODE END TIM1_UP_TIM10_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART1 global interrupt.
+  */
+void USART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART1_IRQn 0 */
+
+  /* USER CODE END USART1_IRQn 0 */
+  HAL_UART_IRQHandler(&huart1);
+  /* USER CODE BEGIN USART1_IRQn 1 */
+
+  /* USER CODE END USART1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA2 stream0 global interrupt.
+  */
+void DMA2_Stream0_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
+
+  /* USER CODE END DMA2_Stream0_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_sdmmc2_rx);
+  /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
+
+  /* USER CODE END DMA2_Stream0_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Ethernet global interrupt.
+  */
+void ETH_IRQHandler(void)
+{
+  /* USER CODE BEGIN ETH_IRQn 0 */
+
+  /* USER CODE END ETH_IRQn 0 */
+  HAL_ETH_IRQHandler(&heth);
+  /* USER CODE BEGIN ETH_IRQn 1 */
+
+  /* USER CODE END ETH_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA2 stream5 global interrupt.
+  */
+void DMA2_Stream5_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA2_Stream5_IRQn 0 */
+
+  /* USER CODE END DMA2_Stream5_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_sdmmc2_tx);
+  /* USER CODE BEGIN DMA2_Stream5_IRQn 1 */
+
+  /* USER CODE END DMA2_Stream5_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA2 stream7 global interrupt.
+  */
+void DMA2_Stream7_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
+
+  /* USER CODE END DMA2_Stream7_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_usart1_tx);
+  /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
+
+  /* USER CODE END DMA2_Stream7_IRQn 1 */
+}
+
+/**
+  * @brief This function handles SDMMC2 global interrupt.
+  */
+void SDMMC2_IRQHandler(void)
+{
+  /* USER CODE BEGIN SDMMC2_IRQn 0 */
+
+  /* USER CODE END SDMMC2_IRQn 0 */
+  HAL_SD_IRQHandler(&hsd2);
+  /* USER CODE BEGIN SDMMC2_IRQn 1 */
+
+  /* USER CODE END SDMMC2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/stubs.c

@@ -0,0 +1,36 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2018 rt-labs AB, Sweden.
+ *
+ * This software is dual-licensed under GPLv3 and a commercial
+ * license. See the file LICENSE.md distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include <stddef.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <sys/time.h>
+
+char *getcwd(char *buf, size_t size)
+{
+   buf[0] = '/';
+   buf[1] = 0;
+   return buf;
+}
+
+int mkdir(const char *pathname, mode_t mode)
+{
+   return -1;
+}
+
+/* int _gettimeofday (struct timeval * ptimeval, void * ptimezone) */
+/* { */
+/*    return -1; */
+/* } */

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/syscalls.c

@@ -0,0 +1,197 @@
+/* Support files for GNU libc.  Files in the system namespace go here.
+   Files in the C namespace (ie those that do not start with an
+   underscore) go in .c.  */
+
+#include <_ansi.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/fcntl.h>
+#include <stdio.h>
+#include <string.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+#include <errno.h>
+#include <reent.h>
+#include <unistd.h>
+#include <sys/wait.h>
+
+
+
+#define FreeRTOS
+#define MAX_STACK_SIZE 0x2000
+
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+#ifndef FreeRTOS
+  register char * stack_ptr asm("sp");
+#endif
+
+
+
+
+caddr_t _sbrk(int incr)
+{
+	extern char end asm("end");
+	static char *heap_end;
+	char *prev_heap_end,*min_stack_ptr;
+
+	if (heap_end == 0)
+		heap_end = &end;
+
+	prev_heap_end = heap_end;
+
+#ifdef FreeRTOS
+	/* Use the NVIC offset register to locate the main stack pointer. */
+	min_stack_ptr = (char*)(*(unsigned int *)*(unsigned int *)0xE000ED08);
+	/* Locate the STACK bottom address */
+	min_stack_ptr -= MAX_STACK_SIZE;
+
+	if (heap_end + incr > min_stack_ptr)
+#else
+	if (heap_end + incr > stack_ptr)
+#endif
+	{
+//		write(1, "Heap and stack collision\n", 25);
+//		abort();
+		errno = ENOMEM;
+		return (caddr_t) -1;
+	}
+
+	heap_end += incr;
+
+	return (caddr_t) prev_heap_end;
+}
+
+/*
+ * _gettimeofday primitive (Stub function)
+ * */
+int _gettimeofday (struct timeval * tp, struct timezone * tzp)
+{
+  /* Return fixed data for the timezone.  */
+  if (tzp)
+    {
+      tzp->tz_minuteswest = 0;
+      tzp->tz_dsttime = 0;
+    }
+   if (tp)
+   {
+      /* Set default value */
+      tp->tv_sec  = 1230768000;    /* 2009-01-01 */
+      tp->tv_usec = 0;
+   }
+
+  return 0;
+}
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+	return 1;
+}
+
+int _kill(int pid, int sig)
+{
+	errno = EINVAL;
+	return -1;
+}
+
+void _exit (int status)
+{
+	_kill(status, -1);
+	while (1) {}
+}
+
+int _write(int file, char *ptr, int len)
+{
+	int DataIdx;
+
+		for (DataIdx = 0; DataIdx < len; DataIdx++)
+		{
+		   __io_putchar( *ptr++ );
+		}
+	return len;
+}
+
+int _close(int file)
+{
+	return -1;
+}
+
+int _fstat(int file, struct stat *st)
+{
+	st->st_mode = S_IFCHR;
+	return 0;
+}
+
+int _isatty(int file)
+{
+	return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+	return 0;
+}
+
+int _read(int file, char *ptr, int len)
+{
+	int DataIdx;
+
+	for (DataIdx = 0; DataIdx < len; DataIdx++)
+	{
+	  *ptr++ = __io_getchar();
+	}
+
+   return len;
+}
+
+int _open(char *path, int flags, ...)
+{
+	/* Pretend like we always fail */
+	return -1;
+}
+
+int _wait(int *status)
+{
+	errno = ECHILD;
+	return -1;
+}
+
+int _unlink(char *name)
+{
+	errno = ENOENT;
+	return -1;
+}
+
+int _times(struct tms *buf)
+{
+	return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+	st->st_mode = S_IFCHR;
+	return 0;
+}
+
+int _link(char *old, char *new)
+{
+	errno = EMLINK;
+	return -1;
+}
+
+int _fork(void)
+{
+	errno = EAGAIN;
+	return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+	errno = ENOMEM;
+	return -1;
+}

profinet_stack/osal/src/freertos/STM32F769I-DISCO/Src/system_stm32f7xx.c

@@ -0,0 +1,260 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f7xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
+  *
+  *   This file provides two functions and one global variable to be called from 
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f7xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f7xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F7xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f7xx.h"
+
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F7xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F7xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+     anywhere in Flash or Sram, else the vector table is kept at the automatic
+     remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+     in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS   RAMDTCM_BASE    /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+/******************************************************************************/
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F7xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F7xx_System_Private_Variables
+  * @{
+  */
+
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = 16000000;
+  const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+  const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F7xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F7xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the Embedded Flash Interface, the PLL and update the 
+  *         SystemFrequency variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+#endif
+
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+
+/**
+   * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
+  *              25 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);      
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */    
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

profinet_stack/osal/src/freertos/osal.c

@@ -0,0 +1,238 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2021 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include "osal.h"
+
+#include <stdlib.h>
+
+#define TMO_TO_TICKS(ms) \
+   ((ms == OS_WAIT_FOREVER) ? portMAX_DELAY : (ms) / portTICK_PERIOD_MS)
+
+void * os_malloc (size_t size)
+{
+   return malloc (size);
+}
+
+void os_free (void * ptr)
+{
+   free (ptr);
+}
+
+os_thread_t * os_thread_create (
+   const char * name,
+   uint32_t priority,
+   size_t stacksize,
+   void (*entry) (void * arg),
+   void * arg)
+{
+   TaskHandle_t xHandle = NULL;
+
+   /* stacksize in freertos is not in bytes but in stack depth, it should be
+    * divided by the stack width */
+   configSTACK_DEPTH_TYPE stackdepth =
+      stacksize / sizeof (configSTACK_DEPTH_TYPE);
+
+   if (xTaskCreate (entry, name, stackdepth, arg, priority, &xHandle) == pdPASS)
+   {
+      return (os_thread_t *)xHandle;
+   }
+   else
+   {
+      return NULL;
+   }
+}
+
+os_mutex_t * os_mutex_create (void)
+{
+   SemaphoreHandle_t handle = xSemaphoreCreateRecursiveMutex();
+   CC_ASSERT (handle != NULL);
+   return (os_mutex_t *)handle;
+}
+
+void os_mutex_lock (os_mutex_t * mutex)
+{
+   xSemaphoreTakeRecursive ((SemaphoreHandle_t)mutex, portMAX_DELAY);
+}
+
+void os_mutex_unlock (os_mutex_t * mutex)
+{
+   xSemaphoreGiveRecursive ((SemaphoreHandle_t)mutex);
+}
+
+void os_mutex_destroy (os_mutex_t * mutex)
+{
+   vSemaphoreDelete ((SemaphoreHandle_t)mutex);
+}
+
+void os_usleep (uint32_t us)
+{
+   vTaskDelay ((us / portTICK_PERIOD_MS) / 1000);
+}
+
+uint32_t os_get_current_time_us (void)
+{
+   return 1000 * (xTaskGetTickCount() / portTICK_PERIOD_MS);
+}
+
+os_sem_t * os_sem_create (size_t count)
+{
+   SemaphoreHandle_t handle = xSemaphoreCreateCounting (UINT32_MAX, count);
+   CC_ASSERT (handle != NULL);
+   return (os_sem_t *)handle;
+}
+
+bool os_sem_wait (os_sem_t * sem, uint32_t time)
+{
+   if (xSemaphoreTake ((SemaphoreHandle_t)sem, TMO_TO_TICKS (time)) == pdTRUE)
+   {
+      /* Did not timeout */
+      return false;
+   }
+
+   /* Timed out */
+   return true;
+}
+
+void os_sem_signal (os_sem_t * sem)
+{
+   xSemaphoreGive ((SemaphoreHandle_t)sem);
+}
+
+void os_sem_destroy (os_sem_t * sem)
+{
+   vSemaphoreDelete ((SemaphoreHandle_t)sem);
+}
+
+os_event_t * os_event_create (void)
+{
+   EventGroupHandle_t handle = xEventGroupCreate();
+   CC_ASSERT (handle);
+   return (os_event_t *)handle;
+}
+
+bool os_event_wait (os_event_t * event, uint32_t mask, uint32_t * value, uint32_t time)
+{
+   *value = xEventGroupWaitBits (
+      (EventGroupHandle_t)event,
+      mask,
+      pdFALSE,
+      pdFALSE,
+      TMO_TO_TICKS (time));
+
+   *value &= mask;
+   return *value == 0;
+}
+
+void os_event_set (os_event_t * event, uint32_t value)
+{
+   xEventGroupSetBits ((EventGroupHandle_t)event, value);
+}
+
+void os_event_clr (os_event_t * event, uint32_t value)
+{
+   xEventGroupClearBits ((EventGroupHandle_t)event, value);
+}
+
+void os_event_destroy (os_event_t * event)
+{
+   vEventGroupDelete ((EventGroupHandle_t)event);
+}
+
+os_mbox_t * os_mbox_create (size_t size)
+{
+   QueueHandle_t handle = xQueueCreate (size, sizeof (void *));
+   CC_ASSERT (handle);
+   return (os_mbox_t *)handle;
+}
+
+bool os_mbox_fetch (os_mbox_t * mbox, void ** msg, uint32_t time)
+{
+   BaseType_t success;
+
+   success = xQueueReceive ((QueueHandle_t)mbox, msg, TMO_TO_TICKS (time));
+   return success != pdTRUE;
+}
+
+bool os_mbox_post (os_mbox_t * mbox, void * msg, uint32_t time)
+{
+   BaseType_t success;
+
+   success = xQueueSendToBack ((QueueHandle_t)mbox, &msg, TMO_TO_TICKS (time));
+   return success != pdTRUE;
+}
+
+void os_mbox_destroy (os_mbox_t * mbox)
+{
+   vQueueDelete ((QueueHandle_t)mbox);
+}
+
+static void os_timer_callback (TimerHandle_t xTimer)
+{
+   os_timer_t * timer = pvTimerGetTimerID (xTimer);
+
+   if (timer->fn)
+      timer->fn (timer, timer->arg);
+}
+
+os_timer_t * os_timer_create (
+   uint32_t us,
+   void (*fn) (os_timer_t *, void * arg),
+   void * arg,
+   bool oneshot)
+{
+   os_timer_t * timer;
+
+   timer = malloc (sizeof (*timer));
+   CC_ASSERT (timer != NULL);
+
+   timer->fn  = fn;
+   timer->arg = arg;
+   timer->us  = us;
+
+   timer->handle = xTimerCreate (
+      "os_timer",
+      (us / portTICK_PERIOD_MS) / 1000,
+      oneshot ? pdFALSE : pdTRUE,
+      timer,
+      os_timer_callback);
+   CC_ASSERT (timer->handle != NULL);
+   return timer;
+}
+
+void os_timer_set (os_timer_t * timer, uint32_t us)
+{
+   timer->us = us;
+}
+
+void os_timer_start (os_timer_t * timer)
+{
+   /* Start timer by updating the period */
+   CC_ASSERT (
+      xTimerChangePeriod (
+         timer->handle,
+         (timer->us / portTICK_PERIOD_MS) / 1000,
+         portMAX_DELAY) == pdPASS);
+}
+
+void os_timer_stop (os_timer_t * timer)
+{
+   CC_ASSERT (xTimerStop (timer->handle, portMAX_DELAY) == pdPASS);
+}
+
+void os_timer_destroy (os_timer_t * timer)
+{
+   CC_ASSERT (xTimerDelete (timer->handle, portMAX_DELAY) == pdPASS);
+   free (timer);
+}

profinet_stack/osal/src/freertos/osal_log.c

@@ -0,0 +1,49 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2021 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include "osal_log.h"
+
+#include <stdarg.h>
+#include <stdio.h>
+
+void os_log (uint8_t type, const char * fmt, ...)
+{
+   va_list list;
+
+   switch (LOG_LEVEL_GET (type))
+   {
+   case LOG_LEVEL_DEBUG:
+      printf ("%10ld [DEBUG] ", xTaskGetTickCount());
+      break;
+   case LOG_LEVEL_INFO:
+      printf ("%10ld [INFO ] ", xTaskGetTickCount());
+      break;
+   case LOG_LEVEL_WARNING:
+      printf ("%10ld [WARN ] ", xTaskGetTickCount());
+      break;
+   case LOG_LEVEL_ERROR:
+      printf ("%10ld [ERROR] ", xTaskGetTickCount());
+      break;
+   case LOG_LEVEL_FATAL:
+      printf ("%10ld [FATAL] ", xTaskGetTickCount());
+      break;
+   default:
+      break;
+   }
+
+   va_start (list, fmt);
+   vprintf (fmt, list);
+   va_end (list);
+}

profinet_stack/osal/src/freertos/sys/osal_cc.h

@@ -0,0 +1,90 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2021 rt-labs AB, Sweden.
+ *
+ * This software is dual-licensed under GPLv3 and a commercial
+ * license. See the file LICENSE.md distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef CC_H
+#define CC_H
+
+#include <assert.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define CC_PACKED_BEGIN
+#define CC_PACKED_END
+#define CC_PACKED             __attribute__((packed))
+
+#define CC_FORMAT(str,arg)    __attribute__((format (printf, str, arg)))
+
+
+#if BYTE_ORDER == LITTLE_ENDIAN
+#define CC_TO_LE16(x)   ((uint16_t)(x))
+#define CC_TO_LE32(x)   ((uint32_t)(x))
+#define CC_TO_LE64(x)   ((uint64_t)(x))
+#define CC_FROM_LE16(x) ((uint16_t)(x))
+#define CC_FROM_LE32(x) ((uint32_t)(x))
+#define CC_FROM_LE64(x) ((uint64_t)(x))
+#define CC_TO_BE16(x)   ((uint16_t)__builtin_bswap16 (x))
+#define CC_TO_BE32(x)   ((uint32_t)__builtin_bswap32 (x))
+#define CC_TO_BE64(x)   ((uint64_t)__builtin_bswap64 (x))
+#define CC_FROM_BE16(x) ((uint16_t)__builtin_bswap16 (x))
+#define CC_FROM_BE32(x) ((uint32_t)__builtin_bswap32 (x))
+#define CC_FROM_BE64(x) ((uint64_t)__builtin_bswap64 (x))
+#else
+#define CC_TO_LE16(x)   ((uint16_t)__builtin_bswap16 (x))
+#define CC_TO_LE32(x)   ((uint32_t)__builtin_bswap32 (x))
+#define CC_TO_LE64(x)   ((uint64_t)__builtin_bswap64 (x))
+#define CC_FROM_LE16(x) ((uint16_t)__builtin_bswap16 (x))
+#define CC_FROM_LE32(x) ((uint32_t)__builtin_bswap32 (x))
+#define CC_FROM_LE64(x) ((uint64_t)__builtin_bswap64 (x))
+#define CC_TO_BE16(x)   ((uint16_t)(x))
+#define CC_TO_BE32(x)   ((uint32_t)(x))
+#define CC_TO_BE64(x)   ((uint64_t)(x))
+#define CC_FROM_BE16(x) ((uint16_t)(x))
+#define CC_FROM_BE32(x) ((uint32_t)(x))
+#define CC_FROM_BE64(x) ((uint64_t)(x))
+#endif
+
+#define CC_ATOMIC_GET8(p)     (*p)
+#define CC_ATOMIC_GET16(p)    (*p)
+#define CC_ATOMIC_GET32(p)    (*p)
+#define CC_ATOMIC_GET64(p)                      \
+({                                              \
+   uint64_t v;                                  \
+   /*int_lock();*/                              \
+   v = *p;                                      \
+   /*int_unlock();*/                            \
+   v;                                           \
+})
+
+#define CC_ATOMIC_SET8(p, v)  ((*p) = (v))
+#define CC_ATOMIC_SET16(p, v) ((*p) = (v))
+#define CC_ATOMIC_SET32(p, v) ((*p) = (v))
+#define CC_ATOMIC_SET64(p, v)                   \
+({                                              \
+   /*int_lock();*/                              \
+   *p = v;                                      \
+   /*int_unlock();*/                            \
+})
+
+#define CC_ASSERT(exp) assert (exp)
+#define CC_STATIC_ASSERT(exp) _Static_assert (exp, "")
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CC_H */

profinet_stack/osal/src/freertos/sys/osal_sys.h

@@ -0,0 +1,55 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2021 rt-labs AB, Sweden.
+ *
+ * This software is dual-licensed under GPLv3 and a commercial
+ * license. See the file LICENSE.md distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef OSAL_SYS_H
+#define OSAL_SYS_H
+
+#include <FreeRTOS.h>
+#include <semphr.h>
+#include <event_groups.h>
+#include <queue.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define OS_MAIN extern "C" int _main
+
+#define OS_THREAD
+#define OS_MUTEX
+#define OS_SEM
+#define OS_EVENT
+#define OS_MBOX
+#define OS_TIMER
+
+typedef SemaphoreHandle_t os_mutex_t;
+typedef TaskHandle_t os_thread_t;
+typedef SemaphoreHandle_t os_sem_t;
+typedef EventGroupHandle_t  os_event_t;
+typedef QueueHandle_t os_mbox_t;
+
+typedef struct os_timer
+{
+   TimerHandle_t handle;
+   void(*fn) (struct os_timer *, void * arg);
+   void * arg;
+   uint32_t us;
+} os_timer_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* OSAL_SYS_H */

profinet_stack/osal/src/linux/osal.c

@@ -0,0 +1,576 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#define _GNU_SOURCE /* For pthread_setname_mp() */
+
+#include "osal.h"
+/* #include "options.h" */
+
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <signal.h>
+#include <limits.h>
+
+#include <pthread.h>
+
+#include <assert.h>
+#include <errno.h>
+#include <unistd.h>
+
+#include <sys/syscall.h>
+
+/* Priority of timer callback thread (if USE_SCHED_FIFO is set) */
+#define TIMER_PRIO 30
+
+#define USECS_PER_SEC (1 * 1000 * 1000)
+#define NSECS_PER_SEC (1 * 1000 * 1000 * 1000)
+
+void * os_malloc (size_t size)
+{
+   return malloc (size);
+}
+
+void os_free (void * ptr)
+{
+   free (ptr);
+}
+
+os_thread_t * os_thread_create (
+   const char * name,
+   uint32_t priority,
+   size_t stacksize,
+   void (*entry) (void * arg),
+   void * arg)
+{
+   int result;
+   pthread_t * thread;
+   pthread_attr_t attr;
+
+   thread = malloc (sizeof (*thread));
+   if (thread == NULL)
+   {
+      return NULL;
+   }
+
+   pthread_attr_init (&attr);
+   pthread_attr_setstacksize (&attr, PTHREAD_STACK_MIN + stacksize);
+
+#if defined(USE_SCHED_FIFO)
+   CC_STATIC_ASSERT (_POSIX_THREAD_PRIORITY_SCHEDULING > 0);
+   struct sched_param param = {.sched_priority = priority};
+   pthread_attr_setinheritsched (&attr, PTHREAD_EXPLICIT_SCHED);
+   pthread_attr_setschedpolicy (&attr, SCHED_FIFO);
+   pthread_attr_setschedparam (&attr, &param);
+#endif
+
+   result = pthread_create (thread, &attr, (void *)entry, arg);
+   if (result != 0)
+   {
+      free (thread);
+      return NULL;
+   }
+
+   pthread_setname_np (*thread, name);
+   return thread;
+}
+
+os_mutex_t * os_mutex_create (void)
+{
+   int result;
+   pthread_mutex_t * mutex;
+   pthread_mutexattr_t mattr;
+
+   mutex = malloc (sizeof (*mutex));
+   if (mutex == NULL)
+   {
+      return NULL;
+   }
+
+   CC_STATIC_ASSERT (_POSIX_THREAD_PRIO_INHERIT > 0);
+   pthread_mutexattr_init (&mattr);
+   pthread_mutexattr_setprotocol (&mattr, PTHREAD_PRIO_INHERIT);
+   pthread_mutexattr_settype (&mattr, PTHREAD_MUTEX_RECURSIVE);
+
+   result = pthread_mutex_init (mutex, &mattr);
+   if (result != 0)
+   {
+      free (mutex);
+      return NULL;
+   }
+
+   return mutex;
+}
+
+void os_mutex_lock (os_mutex_t * _mutex)
+{
+   pthread_mutex_t * mutex = _mutex;
+   pthread_mutex_lock (mutex);
+}
+
+void os_mutex_unlock (os_mutex_t * _mutex)
+{
+   pthread_mutex_t * mutex = _mutex;
+   pthread_mutex_unlock (mutex);
+}
+
+void os_mutex_destroy (os_mutex_t * _mutex)
+{
+   pthread_mutex_t * mutex = _mutex;
+   pthread_mutex_destroy (mutex);
+   free (mutex);
+}
+
+os_sem_t * os_sem_create (size_t count)
+{
+   os_sem_t * sem;
+   pthread_mutexattr_t mattr;
+   pthread_condattr_t cattr;
+
+   sem = malloc (sizeof (*sem));
+   if (sem == NULL)
+   {
+      return NULL;
+   }
+
+   pthread_condattr_init (&cattr);
+   pthread_condattr_setclock (&cattr, CLOCK_MONOTONIC);
+   pthread_cond_init (&sem->cond, &cattr);
+   pthread_mutexattr_init (&mattr);
+   pthread_mutexattr_setprotocol (&mattr, PTHREAD_PRIO_INHERIT);
+   pthread_mutex_init (&sem->mutex, &mattr);
+   sem->count = count;
+
+   return sem;
+}
+
+bool os_sem_wait (os_sem_t * sem, uint32_t time)
+{
+   struct timespec ts;
+   int error     = 0;
+   uint64_t nsec = (uint64_t)time * 1000 * 1000;
+
+   clock_gettime (CLOCK_MONOTONIC, &ts);
+   nsec += ts.tv_nsec;
+   if (nsec > NSECS_PER_SEC)
+   {
+      ts.tv_sec += nsec / NSECS_PER_SEC;
+      nsec %= NSECS_PER_SEC;
+   }
+   ts.tv_nsec = nsec;
+
+   pthread_mutex_lock (&sem->mutex);
+   while (sem->count == 0)
+   {
+      if (time != OS_WAIT_FOREVER)
+      {
+         error = pthread_cond_timedwait (&sem->cond, &sem->mutex, &ts);
+         assert (error != EINVAL);
+         if (error)
+         {
+            goto timeout;
+         }
+      }
+      else
+      {
+         error = pthread_cond_wait (&sem->cond, &sem->mutex);
+         assert (error != EINVAL);
+      }
+   }
+
+   sem->count--;
+
+timeout:
+   pthread_mutex_unlock (&sem->mutex);
+   return (error != 0);
+}
+
+void os_sem_signal (os_sem_t * sem)
+{
+   pthread_mutex_lock (&sem->mutex);
+   sem->count++;
+   pthread_mutex_unlock (&sem->mutex);
+   pthread_cond_signal (&sem->cond);
+}
+
+void os_sem_destroy (os_sem_t * sem)
+{
+   pthread_cond_destroy (&sem->cond);
+   pthread_mutex_destroy (&sem->mutex);
+   free (sem);
+}
+
+void os_usleep (uint32_t usec)
+{
+   struct timespec ts;
+   struct timespec remain;
+
+   ts.tv_sec  = usec / USECS_PER_SEC;
+   ts.tv_nsec = (usec % USECS_PER_SEC) * 1000;
+   while (clock_nanosleep (CLOCK_MONOTONIC, 0, &ts, &remain) != 0)
+   {
+      ts = remain;
+   }
+}
+
+uint32_t os_get_current_time_us (void)
+{
+   struct timespec ts;
+
+   clock_gettime (CLOCK_MONOTONIC, &ts);
+   return ts.tv_sec * 1000 * 1000 + ts.tv_nsec / 1000;
+}
+
+os_event_t * os_event_create (void)
+{
+   os_event_t * event;
+   pthread_mutexattr_t mattr;
+   pthread_condattr_t cattr;
+
+   event = (os_event_t *)malloc (sizeof (*event));
+   if (event == NULL)
+   {
+      return NULL;
+   }
+
+   pthread_condattr_init (&cattr);
+   pthread_condattr_setclock (&cattr, CLOCK_MONOTONIC);
+   pthread_cond_init (&event->cond, &cattr);
+   pthread_mutexattr_init (&mattr);
+   pthread_mutexattr_setprotocol (&mattr, PTHREAD_PRIO_INHERIT);
+   pthread_mutex_init (&event->mutex, &mattr);
+   event->flags = 0;
+
+   return event;
+}
+
+bool os_event_wait (os_event_t * event, uint32_t mask, uint32_t * value, uint32_t time)
+{
+   struct timespec ts;
+   int error     = 0;
+   uint64_t nsec = (uint64_t)time * 1000 * 1000;
+
+   if (time != OS_WAIT_FOREVER)
+   {
+      clock_gettime (CLOCK_MONOTONIC, &ts);
+      nsec += ts.tv_nsec;
+
+      ts.tv_sec += nsec / NSECS_PER_SEC;
+      ts.tv_nsec = nsec % NSECS_PER_SEC;
+   }
+
+   pthread_mutex_lock (&event->mutex);
+
+   while ((event->flags & mask) == 0)
+   {
+      if (time != OS_WAIT_FOREVER)
+      {
+         error = pthread_cond_timedwait (&event->cond, &event->mutex, &ts);
+         assert (error != EINVAL);
+         if (error)
+         {
+            goto timeout;
+         }
+      }
+      else
+      {
+         error = pthread_cond_wait (&event->cond, &event->mutex);
+         assert (error != EINVAL);
+      }
+   }
+
+timeout:
+   *value = event->flags & mask;
+   pthread_mutex_unlock (&event->mutex);
+   return (error != 0);
+}
+
+void os_event_set (os_event_t * event, uint32_t value)
+{
+   pthread_mutex_lock (&event->mutex);
+   event->flags |= value;
+   pthread_mutex_unlock (&event->mutex);
+   pthread_cond_signal (&event->cond);
+}
+
+void os_event_clr (os_event_t * event, uint32_t value)
+{
+   pthread_mutex_lock (&event->mutex);
+   event->flags &= ~value;
+   pthread_mutex_unlock (&event->mutex);
+   pthread_cond_signal (&event->cond);
+}
+
+void os_event_destroy (os_event_t * event)
+{
+   pthread_cond_destroy (&event->cond);
+   pthread_mutex_destroy (&event->mutex);
+   free (event);
+}
+
+os_mbox_t * os_mbox_create (size_t size)
+{
+   os_mbox_t * mbox;
+   pthread_mutexattr_t mattr;
+   pthread_condattr_t cattr;
+
+   mbox = (os_mbox_t *)malloc (sizeof (*mbox) + size * sizeof (void *));
+   if (mbox == NULL)
+   {
+      return NULL;
+   }
+
+   pthread_condattr_init (&cattr);
+   pthread_condattr_setclock (&cattr, CLOCK_MONOTONIC);
+   pthread_cond_init (&mbox->cond, &cattr);
+   pthread_mutexattr_init (&mattr);
+   pthread_mutexattr_setprotocol (&mattr, PTHREAD_PRIO_INHERIT);
+   pthread_mutex_init (&mbox->mutex, &mattr);
+
+   mbox->r     = 0;
+   mbox->w     = 0;
+   mbox->count = 0;
+   mbox->size  = size;
+
+   return mbox;
+}
+
+bool os_mbox_fetch (os_mbox_t * mbox, void ** msg, uint32_t time)
+{
+   struct timespec ts;
+   int error     = 0;
+   uint64_t nsec = (uint64_t)time * 1000 * 1000;
+
+   if (time != OS_WAIT_FOREVER)
+   {
+      clock_gettime (CLOCK_MONOTONIC, &ts);
+      nsec += ts.tv_nsec;
+
+      ts.tv_sec += nsec / NSECS_PER_SEC;
+      ts.tv_nsec = nsec % NSECS_PER_SEC;
+   }
+
+   pthread_mutex_lock (&mbox->mutex);
+
+   while (mbox->count == 0)
+   {
+      if (time != OS_WAIT_FOREVER)
+      {
+         error = pthread_cond_timedwait (&mbox->cond, &mbox->mutex, &ts);
+         assert (error != EINVAL);
+         if (error)
+         {
+            goto timeout;
+         }
+      }
+      else
+      {
+         error = pthread_cond_wait (&mbox->cond, &mbox->mutex);
+         assert (error != EINVAL);
+      }
+   }
+
+   *msg = mbox->msg[mbox->r++];
+   if (mbox->r == mbox->size)
+      mbox->r = 0;
+
+   mbox->count--;
+
+timeout:
+   pthread_mutex_unlock (&mbox->mutex);
+   pthread_cond_signal (&mbox->cond);
+
+   return (error != 0);
+}
+
+bool os_mbox_post (os_mbox_t * mbox, void * msg, uint32_t time)
+{
+   struct timespec ts;
+   int error     = 0;
+   uint64_t nsec = (uint64_t)time * 1000 * 1000;
+
+   if (time != OS_WAIT_FOREVER)
+   {
+      clock_gettime (CLOCK_MONOTONIC, &ts);
+      nsec += ts.tv_nsec;
+
+      ts.tv_sec += nsec / NSECS_PER_SEC;
+      ts.tv_nsec = nsec % NSECS_PER_SEC;
+   }
+
+   pthread_mutex_lock (&mbox->mutex);
+
+   while (mbox->count == mbox->size)
+   {
+      if (time != OS_WAIT_FOREVER)
+      {
+         error = pthread_cond_timedwait (&mbox->cond, &mbox->mutex, &ts);
+         assert (error != EINVAL);
+         if (error)
+         {
+            goto timeout;
+         }
+      }
+      else
+      {
+         error = pthread_cond_wait (&mbox->cond, &mbox->mutex);
+         assert (error != EINVAL);
+      }
+   }
+
+   mbox->msg[mbox->w++] = msg;
+   if (mbox->w == mbox->size)
+      mbox->w = 0;
+
+   mbox->count++;
+
+timeout:
+   pthread_mutex_unlock (&mbox->mutex);
+   pthread_cond_signal (&mbox->cond);
+
+   return (error != 0);
+}
+
+void os_mbox_destroy (os_mbox_t * mbox)
+{
+   pthread_cond_destroy (&mbox->cond);
+   pthread_mutex_destroy (&mbox->mutex);
+   free (mbox);
+}
+
+static void os_timer_thread (void * arg)
+{
+   os_timer_t * timer = arg;
+   sigset_t sigset;
+   siginfo_t si;
+   struct timespec tmo;
+
+   timer->thread_id = (pid_t)syscall (SYS_gettid);
+
+   /* Add SIGALRM */
+   sigemptyset (&sigset);
+   sigprocmask (SIG_BLOCK, &sigset, NULL);
+   sigaddset (&sigset, SIGALRM);
+
+   tmo.tv_sec  = 0;
+   tmo.tv_nsec = 500 * 1000 * 1000;
+
+   while (!timer->exit)
+   {
+      int sig = sigtimedwait (&sigset, &si, &tmo);
+      if (sig == SIGALRM)
+      {
+         if (timer->fn)
+            timer->fn (timer, timer->arg);
+      }
+   }
+}
+
+os_timer_t * os_timer_create (
+   uint32_t us,
+   void (*fn) (os_timer_t *, void * arg),
+   void * arg,
+   bool oneshot)
+{
+   os_timer_t * timer;
+   struct sigevent sev;
+   sigset_t sigset;
+
+   /* Block SIGALRM in calling thread */
+   sigemptyset (&sigset);
+   sigaddset (&sigset, SIGALRM);
+   sigprocmask (SIG_BLOCK, &sigset, NULL);
+
+   timer = (os_timer_t *)malloc (sizeof (*timer));
+   if (timer == NULL)
+   {
+      return NULL;
+   }
+
+   timer->exit      = false;
+   timer->thread_id = 0;
+   timer->fn        = fn;
+   timer->arg       = arg;
+   timer->us        = us;
+   timer->oneshot   = oneshot;
+
+   /* Create timer thread */
+   timer->thread =
+      os_thread_create ("os_timer", TIMER_PRIO, 1024, os_timer_thread, timer);
+   if (timer->thread == NULL)
+   {
+      free (timer);
+      return NULL;
+   }
+
+   /* Wait until timer thread sets its (kernel) thread id */
+   do
+   {
+      sched_yield();
+   } while (timer->thread_id == 0);
+
+   /* Create timer */
+   sev.sigev_notify            = SIGEV_THREAD_ID;
+   sev.sigev_value.sival_ptr   = timer;
+   sev._sigev_un._tid          = timer->thread_id;
+   sev.sigev_signo             = SIGALRM;
+   sev.sigev_notify_attributes = NULL;
+
+   if (timer_create (CLOCK_MONOTONIC, &sev, &timer->timerid) == -1)
+   {
+      free (timer);
+      return NULL;
+   }
+
+   return timer;
+}
+
+void os_timer_set (os_timer_t * timer, uint32_t us)
+{
+   timer->us = us;
+}
+
+void os_timer_start (os_timer_t * timer)
+{
+   struct itimerspec its;
+
+   /* Start timer */
+   its.it_value.tv_sec     = 0;
+   its.it_value.tv_nsec    = 1000 * timer->us;
+   its.it_interval.tv_sec  = (timer->oneshot) ? 0 : its.it_value.tv_sec;
+   its.it_interval.tv_nsec = (timer->oneshot) ? 0 : its.it_value.tv_nsec;
+   timer_settime (timer->timerid, 0, &its, NULL);
+}
+
+void os_timer_stop (os_timer_t * timer)
+{
+   struct itimerspec its;
+
+   /* Stop timer */
+   its.it_value.tv_sec     = 0;
+   its.it_value.tv_nsec    = 0;
+   its.it_interval.tv_sec  = 0;
+   its.it_interval.tv_nsec = 0;
+   timer_settime (timer->timerid, 0, &its, NULL);
+}
+
+void os_timer_destroy (os_timer_t * timer)
+{
+   timer->exit = true;
+   pthread_join (*timer->thread, NULL);
+   timer_delete (timer->timerid);
+   free (timer);
+}

profinet_stack/osal/src/linux/osal_log.c

@@ -0,0 +1,58 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include "osal_log.h"
+
+#include <stdarg.h>
+#include <stdio.h>
+#include <time.h>
+
+void os_log (uint8_t type, const char * fmt, ...)
+{
+   va_list list;
+   time_t rawtime;
+   struct tm timestruct;
+   char timestamp[10];
+
+   time (&rawtime);
+   localtime_r (&rawtime, &timestruct);
+   strftime (timestamp, sizeof (timestamp), "%H:%M:%S", &timestruct);
+
+   switch (LOG_LEVEL_GET (type))
+   {
+   case LOG_LEVEL_DEBUG:
+      printf ("[%s DEBUG] ", timestamp);
+      break;
+   case LOG_LEVEL_INFO:
+      printf ("[%s INFO ] ", timestamp);
+      break;
+   case LOG_LEVEL_WARNING:
+      printf ("[%s WARN ] ", timestamp);
+      break;
+   case LOG_LEVEL_ERROR:
+      printf ("[%s ERROR] ", timestamp);
+      break;
+   case LOG_LEVEL_FATAL:
+      printf ("[%s FATAL] ", timestamp);
+      break;
+   default:
+      break;
+   }
+
+   va_start (list, fmt);
+   vprintf (fmt, list);
+   va_end (list);
+   fflush (stdout);
+}

profinet_stack/osal/src/linux/sys/osal_cc.h

@@ -0,0 +1,98 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef CC_H
+#define CC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <assert.h>
+
+#if defined(__clang__)
+#if !defined(CLANG_ANALYZER_NORETURN)
+#if __has_feature(attribute_analyzer_noreturn)
+#define CLANG_ANALYZER_NORETURN __attribute__ ((analyzer_noreturn))
+#else
+#define CLANG_ANALYZER_NORETURN
+#endif
+#endif
+#else
+#define CLANG_ANALYZER_NORETURN
+#endif
+
+static inline void cc_assert (int exp) CLANG_ANALYZER_NORETURN
+{
+   assert (exp); // LCOV_EXCL_LINE
+}
+
+#define CC_PACKED_BEGIN
+#define CC_PACKED_END
+#define CC_PACKED __attribute__ ((packed))
+
+#define CC_FORMAT(str, arg) __attribute__ ((format (printf, str, arg)))
+
+#if BYTE_ORDER == LITTLE_ENDIAN
+#define CC_TO_LE16(x)   ((uint16_t)(x))
+#define CC_TO_LE32(x)   ((uint32_t)(x))
+#define CC_TO_LE64(x)   ((uint64_t)(x))
+#define CC_FROM_LE16(x) ((uint16_t)(x))
+#define CC_FROM_LE32(x) ((uint32_t)(x))
+#define CC_FROM_LE64(x) ((uint64_t)(x))
+#define CC_TO_BE16(x)   ((uint16_t)__builtin_bswap16 (x))
+#define CC_TO_BE32(x)   ((uint32_t)__builtin_bswap32 (x))
+#define CC_TO_BE64(x)   ((uint64_t)__builtin_bswap64 (x))
+#define CC_FROM_BE16(x) ((uint16_t)__builtin_bswap16 (x))
+#define CC_FROM_BE32(x) ((uint32_t)__builtin_bswap32 (x))
+#define CC_FROM_BE64(x) ((uint64_t)__builtin_bswap64 (x))
+#else
+#define CC_TO_LE16(x)   ((uint16_t)__builtin_bswap16 (x))
+#define CC_TO_LE32(x)   ((uint32_t)__builtin_bswap32 (x))
+#define CC_TO_LE64(x)   ((uint64_t)__builtin_bswap64 (x))
+#define CC_FROM_LE16(x) ((uint16_t)__builtin_bswap16 (x))
+#define CC_FROM_LE32(x) ((uint32_t)__builtin_bswap32 (x))
+#define CC_FROM_LE64(x) ((uint64_t)__builtin_bswap64 (x))
+#define CC_TO_BE16(x)   ((uint16_t)(x))
+#define CC_TO_BE32(x)   ((uint32_t)(x))
+#define CC_TO_BE64(x)   ((uint64_t)(x))
+#define CC_FROM_BE16(x) ((uint16_t)(x))
+#define CC_FROM_BE32(x) ((uint32_t)(x))
+#define CC_FROM_BE64(x) ((uint64_t)(x))
+#endif
+
+#define CC_ATOMIC_GET8(p)  __atomic_load_n ((p), __ATOMIC_SEQ_CST)
+#define CC_ATOMIC_GET16(p) __atomic_load_n ((p), __ATOMIC_SEQ_CST)
+#define CC_ATOMIC_GET32(p) __atomic_load_n ((p), __ATOMIC_SEQ_CST)
+#define CC_ATOMIC_GET64(p) __atomic_load_n ((p), __ATOMIC_SEQ_CST)
+
+#define CC_ATOMIC_SET8(p, v)  __atomic_store_n ((p), (v), __ATOMIC_SEQ_CST)
+#define CC_ATOMIC_SET16(p, v) __atomic_store_n ((p), (v), __ATOMIC_SEQ_CST)
+#define CC_ATOMIC_SET32(p, v) __atomic_store_n ((p), (v), __ATOMIC_SEQ_CST)
+#define CC_ATOMIC_SET64(p, v) __atomic_store_n ((p), (v), __ATOMIC_SEQ_CST)
+
+#define CC_ASSERT(exp) cc_assert (exp)
+
+#ifdef __cplusplus
+#define CC_STATIC_ASSERT(exp) static_assert (exp, "")
+#else
+#define CC_STATIC_ASSERT(exp) _Static_assert(exp, "")
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CC_H */

profinet_stack/osal/src/linux/sys/osal_sys.h

@@ -0,0 +1,77 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef OSAL_SYS_H
+#define OSAL_SYS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <pthread.h>
+#include <time.h>
+
+#define OS_THREAD
+#define OS_MUTEX
+#define OS_SEM
+#define OS_EVENT
+#define OS_MBOX
+#define OS_TIMER
+
+typedef pthread_t os_thread_t;
+typedef pthread_mutex_t os_mutex_t;
+
+typedef struct os_sem
+{
+   pthread_cond_t cond;
+   pthread_mutex_t mutex;
+   size_t count;
+} os_sem_t;
+
+typedef struct os_event
+{
+   pthread_cond_t cond;
+   pthread_mutex_t mutex;
+   uint32_t flags;
+} os_event_t;
+
+typedef struct os_mbox
+{
+   pthread_cond_t cond;
+   pthread_mutex_t mutex;
+   size_t r;
+   size_t w;
+   size_t count;
+   size_t size;
+   void * msg[];
+} os_mbox_t;
+
+typedef struct os_timer
+{
+   timer_t timerid;
+   os_thread_t * thread;
+   pid_t thread_id;
+   bool exit;
+   void (*fn) (struct os_timer *, void * arg);
+   void * arg;
+   uint32_t us;
+   bool oneshot;
+} os_timer_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* OSAL_SYS_H */

profinet_stack/osal/src/rt-kernel/osal.c

@@ -0,0 +1,209 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include "osal.h"
+
+void * os_malloc (size_t size)
+{
+   return malloc (size);
+}
+
+void os_free (void * ptr)
+{
+   free (ptr);
+}
+
+os_thread_t * os_thread_create (
+   const char * name,
+   uint32_t priority,
+   size_t stacksize,
+   void (*entry) (void * arg),
+   void * arg)
+{
+   return task_spawn (name, entry, priority, stacksize, arg);
+}
+
+os_mutex_t * os_mutex_create (void)
+{
+   return mtx_create();
+}
+
+void os_mutex_lock (os_mutex_t * mutex)
+{
+   mtx_lock (mutex);
+}
+
+void os_mutex_unlock (os_mutex_t * mutex)
+{
+   mtx_unlock (mutex);
+}
+
+void os_mutex_destroy (os_mutex_t * mutex)
+{
+   mtx_destroy (mutex);
+}
+
+void os_usleep (uint32_t us)
+{
+   task_delay (tick_from_ms (us / 1000));
+}
+
+uint32_t os_get_current_time_us (void)
+{
+   return 1000 * tick_to_ms (tick_get());
+}
+
+os_sem_t * os_sem_create (size_t count)
+{
+   return sem_create (count);
+}
+
+bool os_sem_wait (os_sem_t * sem, uint32_t time)
+{
+   int tmo = 0;
+
+   if (time != OS_WAIT_FOREVER)
+   {
+      tmo = sem_wait_tmo (sem, tick_from_ms (time));
+   }
+   else
+   {
+      sem_wait (sem);
+   }
+
+   return tmo;
+}
+
+void os_sem_signal (os_sem_t * sem)
+{
+   sem_signal (sem);
+}
+
+void os_sem_destroy (os_sem_t * sem)
+{
+   sem_destroy (sem);
+}
+
+os_event_t * os_event_create (void)
+{
+   return flags_create (0);
+}
+
+bool os_event_wait (os_event_t * event, uint32_t mask, uint32_t * value, uint32_t time)
+{
+   int tmo = 0;
+
+   if (time != OS_WAIT_FOREVER)
+   {
+      tmo = flags_wait_any_tmo (event, mask, tick_from_ms (time), value);
+   }
+   else
+   {
+      flags_wait_any (event, mask, value);
+   }
+
+   *value = *value & mask;
+   return tmo;
+}
+
+void os_event_set (os_event_t * event, uint32_t value)
+{
+   flags_set (event, value);
+}
+
+void os_event_clr (os_event_t * event, uint32_t value)
+{
+   flags_clr (event, value);
+}
+
+void os_event_destroy (os_event_t * event)
+{
+   flags_destroy (event);
+}
+
+os_mbox_t * os_mbox_create (size_t size)
+{
+   return mbox_create (size);
+}
+
+bool os_mbox_fetch (os_mbox_t * mbox, void ** msg, uint32_t time)
+{
+   int tmo = 0;
+
+   if (time != OS_WAIT_FOREVER)
+   {
+      tmo = mbox_fetch_tmo (mbox, msg, tick_from_ms (time));
+   }
+   else
+   {
+      mbox_fetch (mbox, msg);
+   }
+
+   return tmo;
+}
+
+bool os_mbox_post (os_mbox_t * mbox, void * msg, uint32_t time)
+{
+   int tmo = 0;
+
+   if (time != OS_WAIT_FOREVER)
+   {
+      tmo = mbox_post_tmo (mbox, msg, tick_from_ms (time));
+   }
+   else
+   {
+      mbox_post (mbox, msg);
+   }
+
+   return tmo;
+}
+
+void os_mbox_destroy (os_mbox_t * mbox)
+{
+   mbox_destroy (mbox);
+}
+
+os_timer_t * os_timer_create (
+   uint32_t us,
+   void (*fn) (os_timer_t *, void * arg),
+   void * arg,
+   bool oneshot)
+{
+   return tmr_create (
+      tick_from_ms (us / 1000),
+      fn,
+      arg,
+      (oneshot) ? TMR_ONCE : TMR_CYCL);
+}
+
+void os_timer_set (os_timer_t * timer, uint32_t us)
+{
+   tmr_set (timer, tick_from_ms (us / 1000));
+}
+
+void os_timer_start (os_timer_t * timer)
+{
+   tmr_start (timer);
+}
+
+void os_timer_stop (os_timer_t * timer)
+{
+   tmr_stop (timer);
+}
+
+void os_timer_destroy (os_timer_t * timer)
+{
+   tmr_destroy (timer);
+}

profinet_stack/osal/src/rt-kernel/osal_log.c

@@ -0,0 +1,51 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include "osal_log.h"
+
+#include <kern/kern.h>
+
+#include <stdarg.h>
+#include <stdio.h>
+
+void os_log (uint8_t type, const char * fmt, ...)
+{
+   va_list list;
+
+   switch (LOG_LEVEL_GET (type))
+   {
+   case LOG_LEVEL_DEBUG:
+      rprintf ("%10d [DEBUG] ", tick_get());
+      break;
+   case LOG_LEVEL_INFO:
+      rprintf ("%10d [INFO ] ", tick_get());
+      break;
+   case LOG_LEVEL_WARNING:
+      rprintf ("%10d [WARN ] ", tick_get());
+      break;
+   case LOG_LEVEL_ERROR:
+      rprintf ("%10d [ERROR] ", tick_get());
+      break;
+   case LOG_LEVEL_FATAL:
+      rprintf ("%10d [FATAL] ", tick_get());
+      break;
+   default:
+      break;
+   }
+
+   va_start (list, fmt);
+   vprintf (fmt, list);
+   va_end (list);
+}

profinet_stack/osal/src/rt-kernel/sys/osal_cc.h

@@ -0,0 +1,89 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef CC_H
+#define CC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "kern/types.h"
+#include "kern/assert.h"
+
+#define CC_PACKED_BEGIN
+#define CC_PACKED_END
+#define CC_PACKED __attribute__ ((packed))
+
+#define CC_FORMAT(str, arg) __attribute__ ((format (printf, str, arg)))
+
+#if BYTE_ORDER == LITTLE_ENDIAN
+#define CC_TO_LE16(x)   ((uint16_t)(x))
+#define CC_TO_LE32(x)   ((uint32_t)(x))
+#define CC_TO_LE64(x)   ((uint64_t)(x))
+#define CC_FROM_LE16(x) ((uint16_t)(x))
+#define CC_FROM_LE32(x) ((uint32_t)(x))
+#define CC_FROM_LE64(x) ((uint64_t)(x))
+#define CC_TO_BE16(x)   ((uint16_t)__builtin_bswap16 (x))
+#define CC_TO_BE32(x)   ((uint32_t)__builtin_bswap32 (x))
+#define CC_TO_BE64(x)   ((uint64_t)__builtin_bswap64 (x))
+#define CC_FROM_BE16(x) ((uint16_t)__builtin_bswap16 (x))
+#define CC_FROM_BE32(x) ((uint32_t)__builtin_bswap32 (x))
+#define CC_FROM_BE64(x) ((uint64_t)__builtin_bswap64 (x))
+#else
+#define CC_TO_LE16(x)   ((uint16_t)__builtin_bswap16 (x))
+#define CC_TO_LE32(x)   ((uint32_t)__builtin_bswap32 (x))
+#define CC_TO_LE64(x)   ((uint64_t)__builtin_bswap64 (x))
+#define CC_FROM_LE16(x) ((uint16_t)__builtin_bswap16 (x))
+#define CC_FROM_LE32(x) ((uint32_t)__builtin_bswap32 (x))
+#define CC_FROM_LE64(x) ((uint64_t)__builtin_bswap64 (x))
+#define CC_TO_BE16(x)   ((uint16_t)(x))
+#define CC_TO_BE32(x)   ((uint32_t)(x))
+#define CC_TO_BE64(x)   ((uint64_t)(x))
+#define CC_FROM_BE16(x) ((uint16_t)(x))
+#define CC_FROM_BE32(x) ((uint32_t)(x))
+#define CC_FROM_BE64(x) ((uint64_t)(x))
+#endif
+
+#define CC_ATOMIC_GET8(p)  (*p)
+#define CC_ATOMIC_GET16(p) (*p)
+#define CC_ATOMIC_GET32(p) (*p)
+#define CC_ATOMIC_GET64(p)                                                     \
+   ({                                                                          \
+      uint64_t v;                                                              \
+      int_lock();                                                              \
+      v = *p;                                                                  \
+      int_unlock();                                                            \
+      v;                                                                       \
+   })
+
+#define CC_ATOMIC_SET8(p, v)  ((*p) = (v))
+#define CC_ATOMIC_SET16(p, v) ((*p) = (v))
+#define CC_ATOMIC_SET32(p, v) ((*p) = (v))
+#define CC_ATOMIC_SET64(p, v)                                                  \
+   ({                                                                          \
+      int_lock();                                                              \
+      *p = v;                                                                  \
+      int_unlock();                                                            \
+   })
+
+#define CC_ASSERT(exp)        ASSERT (exp)
+#define CC_STATIC_ASSERT(exp) _Static_assert(exp, "")
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CC_H */

profinet_stack/osal/src/rt-kernel/sys/osal_sys.h

@@ -0,0 +1,43 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef OSAL_SYS_H
+#define OSAL_SYS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <kern/kern.h>
+
+#define OS_THREAD
+#define OS_MUTEX
+#define OS_SEM
+#define OS_EVENT
+#define OS_MBOX
+#define OS_TIMER
+
+typedef task_t os_thread_t;
+typedef mtx_t os_mutex_t;
+typedef sem_t os_sem_t;
+typedef flags_t os_event_t;
+typedef mbox_t os_mbox_t;
+typedef tmr_t os_timer_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* OSAL_SYS_H */

profinet_stack/osal/src/windows/osal.c

@@ -0,0 +1,341 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include "osal.h"
+
+#define URESOLUTION  10
+
+void * os_malloc (size_t size)
+{
+   return malloc (size);
+}
+
+void os_free (void * ptr)
+{
+   free (ptr);
+}
+
+os_mutex_t * os_mutex_create (void)
+{
+   return CreateMutex (NULL, FALSE, NULL);
+}
+
+void os_mutex_lock (os_mutex_t * mutex)
+{
+   WaitForSingleObject (mutex, INFINITE);
+}
+
+void os_mutex_unlock (os_mutex_t * mutex)
+{
+   ReleaseMutex (mutex);
+}
+
+void os_mutex_destroy (os_mutex_t * mutex)
+{
+   CloseHandle (mutex);
+}
+
+void os_usleep (uint32_t usec)
+{
+   Sleep (usec / 1000);
+}
+
+os_thread_t * os_thread_create (
+   const char * name,
+   uint32_t priority,
+   size_t stacksize,
+   void (*entry) (void * arg),
+   void * arg)
+{
+   HANDLE handle;
+   handle =
+      CreateThread (NULL, 0, (LPTHREAD_START_ROUTINE)entry, (LPVOID)arg, 0, NULL);
+
+   if (priority < 5)
+   {
+      SetThreadPriority (handle, THREAD_PRIORITY_BELOW_NORMAL);
+   }
+   else if (priority >= 15)
+   {
+      SetThreadPriority (handle, THREAD_PRIORITY_TIME_CRITICAL);
+   }
+   return handle;
+}
+
+uint32_t os_get_current_time_us (void)
+{
+   static LARGE_INTEGER performanceFrequency = {0};
+   LARGE_INTEGER currentCount;
+   uint64_t currentTime;
+
+   if (performanceFrequency.QuadPart == 0)
+   {
+      timeBeginPeriod (URESOLUTION);
+      QueryPerformanceFrequency (&performanceFrequency);
+      performanceFrequency.QuadPart = performanceFrequency.QuadPart / (1000 * 1000);
+   }
+
+   QueryPerformanceCounter (&currentCount);
+   currentTime = currentCount.QuadPart / performanceFrequency.QuadPart;
+   return (uint32_t)(currentTime & UINT32_MAX);
+}
+
+os_sem_t * os_sem_create (size_t count)
+{
+   os_sem_t * sem;
+
+   sem = (os_sem_t *)malloc (sizeof (*sem));
+
+   InitializeConditionVariable (&sem->condition);
+   InitializeCriticalSection (&sem->lock);
+   sem->count = count;
+
+   return sem;
+}
+
+bool os_sem_wait (os_sem_t * sem, uint32_t time)
+{
+   BOOL success = TRUE;
+
+   EnterCriticalSection (&sem->lock);
+   while (sem->count == 0)
+   {
+      /* FIXME - decrease timeout if woken early */
+      success = SleepConditionVariableCS (&sem->condition, &sem->lock, time);
+      if (!success && GetLastError() == ERROR_TIMEOUT)
+      {
+         goto timeout;
+      }
+      assert (success);
+   }
+
+   sem->count--;
+
+timeout:
+   LeaveCriticalSection (&sem->lock);
+   return !success;
+}
+
+void os_sem_signal (os_sem_t * sem)
+{
+   EnterCriticalSection (&sem->lock);
+   sem->count++;
+   LeaveCriticalSection (&sem->lock);
+   WakeAllConditionVariable (&sem->condition);
+}
+
+void os_sem_destroy (os_sem_t * sem)
+{
+   EnterCriticalSection (&sem->lock);
+   free (sem);
+}
+
+os_event_t * os_event_create (void)
+{
+   os_event_t * event;
+
+   event = (os_event_t *)malloc (sizeof (*event));
+
+   InitializeConditionVariable (&event->condition);
+   InitializeCriticalSection (&event->lock);
+   event->flags = 0;
+
+   return event;
+}
+
+bool os_event_wait (os_event_t * event, uint32_t mask, uint32_t * value, uint32_t time)
+{
+   BOOL success = TRUE;
+
+   EnterCriticalSection (&event->lock);
+   while ((event->flags & mask) == 0)
+   {
+      /* FIXME - decrease timeout if woken early */
+      success = SleepConditionVariableCS (&event->condition, &event->lock, time);
+      if (!success && GetLastError() == ERROR_TIMEOUT)
+      {
+         break;
+      }
+   }
+   *value = event->flags & mask;
+   LeaveCriticalSection (&event->lock);
+   return !success;
+}
+
+void os_event_set (os_event_t * event, uint32_t value)
+{
+   EnterCriticalSection (&event->lock);
+   event->flags |= value;
+   LeaveCriticalSection (&event->lock);
+   WakeAllConditionVariable (&event->condition);
+}
+
+void os_event_clr (os_event_t * event, uint32_t value)
+{
+   EnterCriticalSection (&event->lock);
+   event->flags &= ~value;
+   LeaveCriticalSection (&event->lock);
+}
+
+void os_event_destroy (os_event_t * event)
+{
+   EnterCriticalSection (&event->lock);
+   free (event);
+}
+
+os_mbox_t * os_mbox_create (size_t size)
+{
+   os_mbox_t * mbox;
+
+   mbox = (os_mbox_t *)malloc (sizeof (*mbox) + size * sizeof (void *));
+
+   InitializeConditionVariable (&mbox->condition);
+   InitializeCriticalSection (&mbox->lock);
+
+   mbox->r     = 0;
+   mbox->w     = 0;
+   mbox->count = 0;
+   mbox->size  = size;
+
+   return mbox;
+}
+
+bool os_mbox_fetch (os_mbox_t * mbox, void ** msg, uint32_t time)
+{
+   BOOL success = TRUE;
+
+   EnterCriticalSection (&mbox->lock);
+   while (mbox->count == 0)
+   {
+      /* FIXME - decrease timeout if woken early */
+      success = SleepConditionVariableCS (&mbox->condition, &mbox->lock, time);
+      if (!success && GetLastError() == ERROR_TIMEOUT)
+      {
+         goto timeout;
+      }
+      assert (success);
+   }
+
+   *msg = mbox->msg[mbox->r++];
+   if (mbox->r == mbox->size)
+      mbox->r = 0;
+
+   mbox->count--;
+
+timeout:
+   LeaveCriticalSection (&mbox->lock);
+   WakeAllConditionVariable (&mbox->condition);
+
+   return !success;
+}
+
+bool os_mbox_post (os_mbox_t * mbox, void * msg, uint32_t time)
+{
+   BOOL success = TRUE;
+
+   EnterCriticalSection (&mbox->lock);
+   while (mbox->count == mbox->size)
+   {
+      /* FIXME - decrease timeout if woken early */
+      success = SleepConditionVariableCS (&mbox->condition, &mbox->lock, time);
+      if (!success && GetLastError() == ERROR_TIMEOUT)
+      {
+         goto timeout;
+      }
+      assert (success);
+   }
+
+   mbox->msg[mbox->w++] = msg;
+   if (mbox->w == mbox->size)
+      mbox->w = 0;
+
+   mbox->count++;
+
+timeout:
+   LeaveCriticalSection (&mbox->lock);
+   WakeAllConditionVariable (&mbox->condition);
+
+   return !success;
+}
+
+void os_mbox_destroy (os_mbox_t * mbox)
+{
+   EnterCriticalSection (&mbox->lock);
+   free (mbox);
+}
+
+static VOID CALLBACK
+timer_callback (UINT uTimerID, UINT uMsg, DWORD_PTR dwUser, DWORD_PTR dw1, DWORD_PTR dw2)
+{
+   os_timer_t * timer = (os_timer_t *)dwUser;
+
+   if (timer->fn)
+   {
+      timer->fn (timer, timer->arg);
+   }
+}
+
+os_timer_t * os_timer_create (
+   uint32_t us,
+   void (*fn) (os_timer_t *, void * arg),
+   void * arg,
+   bool oneshot)
+{
+   os_timer_t * timer;
+
+   timer = (os_timer_t *)malloc (sizeof (*timer));
+
+   timer->fn      = fn;
+   timer->arg     = arg;
+   timer->us      = us;
+   timer->oneshot = oneshot;
+
+   return timer;
+}
+
+void os_timer_set (os_timer_t * timer, uint32_t us)
+{
+   timer->us = us;
+}
+
+void os_timer_start (os_timer_t * timer)
+{
+   timeBeginPeriod (URESOLUTION);
+
+   /****************************************************************
+    * N.B. The function timeSetEvent is obsolete.                  *
+    *      The reason for still using it here is that it gives     *
+    *      much better resolution (15 ms -> 1 ms) than when        *
+    *      using the recommended function CreateTimerQueueTimer.   *
+    ****************************************************************/
+   timer->timerID = timeSetEvent (
+      timer->us / 1000,
+      URESOLUTION,
+      timer_callback,
+      (DWORD_PTR)timer,
+      (timer->oneshot) ? TIME_ONESHOT : TIME_PERIODIC);
+}
+
+void os_timer_stop (os_timer_t * timer)
+{
+   timeKillEvent (timer->timerID);
+
+   timeEndPeriod (URESOLUTION);
+}
+
+void os_timer_destroy (os_timer_t * timer)
+{
+   free (timer);
+}

profinet_stack/osal/src/windows/osal_log.c

@@ -0,0 +1,51 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include "osal_log.h"
+
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+void os_log (uint8_t type, const char * fmt, ...)
+{
+   va_list list;
+
+   switch (LOG_LEVEL_GET (type))
+   {
+   case LOG_LEVEL_DEBUG:
+      printf ("[DEBUG] ");
+      break;
+   case LOG_LEVEL_INFO:
+      printf ("[INFO ] ");
+      break;
+   case LOG_LEVEL_WARNING:
+      printf ("[WARN ] ");
+      break;
+   case LOG_LEVEL_ERROR:
+      printf ("[ERROR] ");
+      break;
+   case LOG_LEVEL_FATAL:
+      printf ("[FATAL] ");
+      break;
+   default:
+      break;
+   }
+
+   va_start (list, fmt);
+   vprintf (fmt, list);
+   va_end (list);
+   fflush (stdout);
+}

profinet_stack/osal/src/windows/sys/osal_cc.h

@@ -0,0 +1,72 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef CC_H
+#define CC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <assert.h>
+
+#define CC_PACKED_BEGIN __pragma (pack (push, 1))
+#define CC_PACKED_END   __pragma (pack (pop))
+#define CC_PACKED
+
+#define CC_FORMAT(str, arg)
+
+#define CC_TO_LE16(x)   ((uint16_t)(x))
+#define CC_TO_LE32(x)   ((uint32_t)(x))
+#define CC_TO_LE64(x)   ((uint64_t)(x))
+#define CC_FROM_LE16(x) ((uint16_t)(x))
+#define CC_FROM_LE32(x) ((uint32_t)(x))
+#define CC_FROM_LE64(x) ((uint64_t)(x))
+#define CC_TO_BE16(x)   ((uint16_t)_byteswap_ushort (x))
+#define CC_TO_BE32(x)   ((uint32_t)_byteswap_ulong (x))
+#define CC_TO_BE64(x)   ((uint64_t)_byteswap_uint64 (x))
+#define CC_FROM_BE16(x) ((uint16_t)_byteswap_ushort (x))
+#define CC_FROM_BE32(x) ((uint32_t)_byteswap_ulong (x))
+#define CC_FROM_BE64(x) ((uint64_t)_byteswap_uint64 (x))
+
+/* TODO */
+#define CC_ATOMIC_GET8(p)  (*p)
+#define CC_ATOMIC_GET16(p) (*p)
+#define CC_ATOMIC_GET32(p) (*p)
+#define CC_ATOMIC_GET64(p) (*p)
+
+/* TODO */
+#define CC_ATOMIC_SET8(p, v)  ((*p) = (v))
+#define CC_ATOMIC_SET16(p, v) ((*p) = (v))
+#define CC_ATOMIC_SET32(p, v) ((*p) = (v))
+#define CC_ATOMIC_SET64(p, v) ((*p) = (v))
+
+static uint8_t __inline cc_ctz (uint32_t x)
+{
+   DWORD n = 0;
+   _BitScanForward (&n, x);
+   return (uint8_t)n;
+}
+
+#define __builtin_ctz(x) cc_ctz (x)
+
+#define CC_ASSERT(exp)        assert (exp)
+#define CC_STATIC_ASSERT(exp) static_assert ((exp), "")
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CC_H */

profinet_stack/osal/src/windows/sys/osal_sys.h

@@ -0,0 +1,75 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef OSAL_SYS_H
+#define OSAL_SYS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <windows.h>
+
+#define OS_WAIT_FOREVER INFINITE
+
+#define OS_THREAD
+#define OS_MUTEX
+#define OS_SEM
+#define OS_EVENT
+#define OS_MBOX
+#define OS_TIMER
+
+typedef HANDLE os_thread_t;
+typedef CRITICAL_SECTION os_mutex_t;
+
+typedef struct os_sem
+{
+   CONDITION_VARIABLE condition;
+   CRITICAL_SECTION lock;
+   size_t count;
+} os_sem_t;
+
+typedef struct os_event
+{
+   CONDITION_VARIABLE condition;
+   CRITICAL_SECTION lock;
+   uint32_t flags;
+} os_event_t;
+
+typedef struct os_mbox
+{
+   CONDITION_VARIABLE condition;
+   CRITICAL_SECTION lock;
+   size_t r;
+   size_t w;
+   size_t count;
+   size_t size;
+   void * msg[];
+} os_mbox_t;
+
+typedef struct os_timer
+{
+   UINT timerID;
+   void (*fn) (struct os_timer *, void * arg);
+   void * arg;
+   uint32_t us;
+   bool oneshot;
+} os_timer_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* OSAL_SYS_H */

profinet_stack/osal/test/CMakeLists.txt

@@ -0,0 +1,64 @@
+#********************************************************************
+#        _       _         _
+#  _ __ | |_  _ | |  __ _ | |__   ___
+# | '__|| __|(_)| | / _` || '_ \ / __|
+# | |   | |_  _ | || (_| || |_) |\__ \
+# |_|    \__|(_)|_| \__,_||_.__/ |___/
+#
+# www.rt-labs.com
+# Copyright 2017 rt-labs AB, Sweden.
+#
+# This software is licensed under the terms of the BSD 3-clause
+# license. See the file LICENSE distributed with this software for
+# full license information.
+#*******************************************************************/
+
+# Get osal properties
+get_target_property(OSAL_SOURCES osal SOURCES)
+get_target_property(OSAL_OPTIONS osal COMPILE_OPTIONS)
+get_target_property(OSAL_INCLUDES osal INCLUDE_DIRECTORIES)
+get_target_property(OSAL_LIBS osal LINK_LIBRARIES)
+
+if (OSAL_LIBS STREQUAL "OSAL_LIBS-NOTFOUND")
+  set(OSAL_LIBS "")
+endif()
+
+# Make source paths absolute
+list(TRANSFORM OSAL_SOURCES PREPEND ${OSAL_SOURCE_DIR}/)
+
+set_target_properties (osal_test
+  PROPERTIES
+  C_STANDARD 99
+  CXX_STANDARD 11
+  )
+
+target_sources(osal_test PRIVATE
+  # Units to be tested
+  ${OSAL_SOURCES}
+
+  # Unit tests
+  test_osal.cpp
+
+  # Testrunner
+  osal_test.cpp
+  )
+
+target_compile_options(osal_test
+  PRIVATE
+  -DUNIT_TEST
+  ${OSAL_OPTIONS}
+  )
+
+target_include_directories(osal_test
+  PRIVATE
+  ${OSAL_SOURCE_DIR}/include
+  ${OSAL_INCLUDES}
+  )
+
+target_link_libraries(osal_test
+  PRIVATE
+  ${OSAL_LIBS}
+  )
+
+# No need for gmock
+set(BUILD_GMOCK OFF CACHE BOOL "")

profinet_stack/osal/test/osal_test.cpp

@@ -0,0 +1,24 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include <gtest/gtest.h>
+#include "osal.h"
+
+OS_MAIN (int argc, char * argv[])
+{
+   ::testing::InitGoogleTest (&argc, argv);
+   int result = RUN_ALL_TESTS();
+   return result;
+}

profinet_stack/osal/test/test_osal.cpp

@@ -0,0 +1,211 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#include "osal.h"
+#include <gtest/gtest.h>
+
+static int expired_calls;
+static void * expired_arg;
+static void expired (os_timer_t * timer, void * arg)
+{
+   expired_calls++;
+   expired_arg = arg;
+}
+
+class Osal : public ::testing::Test
+{
+ protected:
+   virtual void SetUp()
+   {
+      expired_calls = 0;
+   }
+};
+
+TEST_F (Osal, SemShouldTimeoutWhenCountIsZero)
+{
+   os_sem_t * sem = os_sem_create (2);
+   bool tmo;
+
+   // Count 2
+   tmo = os_sem_wait (sem, 100);
+   EXPECT_FALSE (tmo);
+
+   // Count 1
+   tmo = os_sem_wait (sem, 100);
+   EXPECT_FALSE (tmo);
+
+   // Count 0 - timeout
+   tmo = os_sem_wait (sem, 100);
+   EXPECT_TRUE (tmo);
+
+   // Count 0 - timeout
+   tmo = os_sem_wait (sem, 100);
+   EXPECT_TRUE (tmo);
+
+   // Increase count
+   os_sem_signal (sem);
+
+   // Count 1
+   tmo = os_sem_wait (sem, 100);
+   EXPECT_FALSE (tmo);
+
+   // Count 0 - timeout
+   tmo = os_sem_wait (sem, 100);
+   EXPECT_TRUE (tmo);
+
+   os_sem_destroy (sem);
+}
+
+TEST_F (Osal, EventShouldNotTimeout)
+{
+   os_event_t * event = os_event_create();
+   uint32_t value     = 99;
+   bool tmo;
+
+   os_event_set (event, 1);
+   tmo = os_event_wait (event, 1, &value, OS_WAIT_FOREVER);
+   EXPECT_FALSE (tmo);
+   EXPECT_EQ (1u, value);
+
+   os_event_destroy (event);
+}
+
+TEST_F (Osal, EventShouldTimeout)
+{
+   os_event_t * event = os_event_create();
+   uint32_t value     = 99;
+   bool tmo;
+
+   os_event_set (event, 2);
+   tmo = os_event_wait (event, 1, &value, 100);
+   EXPECT_TRUE (tmo);
+   EXPECT_EQ (0u, value);
+
+   os_event_destroy (event);
+}
+
+TEST_F (Osal, MboxShouldNotTimeout)
+{
+   os_mbox_t * mbox = os_mbox_create (2);
+   void * msg;
+   bool tmo;
+
+   os_mbox_post (mbox, (void *)1, OS_WAIT_FOREVER);
+   tmo = os_mbox_fetch (mbox, &msg, OS_WAIT_FOREVER);
+
+   EXPECT_FALSE (tmo);
+   EXPECT_EQ (1, (intptr_t)msg);
+
+   os_mbox_destroy (mbox);
+}
+
+TEST_F (Osal, FetchFromEmptyMboxShouldTimeout)
+{
+   os_mbox_t * mbox = os_mbox_create (2);
+   void * msg;
+   bool tmo;
+
+   tmo = os_mbox_fetch (mbox, &msg, 100);
+   EXPECT_TRUE (tmo);
+
+   os_mbox_destroy (mbox);
+}
+
+TEST_F (Osal, PostToFullMBoxShouldTimeout)
+{
+   os_mbox_t * mbox = os_mbox_create (2);
+   bool tmo;
+
+   os_mbox_post (mbox, (void *)1, 100);
+   os_mbox_post (mbox, (void *)2, 100);
+   tmo = os_mbox_post (mbox, (void *)3, 100);
+   EXPECT_TRUE (tmo);
+
+   os_mbox_destroy (mbox);
+}
+
+#define TEN_MS (10 * 1000)
+#define CALLS   39
+
+TEST_F (Osal, CyclicTimer)
+{
+   int t0, t1;
+   os_timer_t * timer;
+
+   timer = os_timer_create (TEN_MS, expired, (void *)0x42, false);
+   os_timer_start (timer);
+
+   t0 = os_get_current_time_us();
+   os_usleep (CALLS * TEN_MS);
+   t1 = os_get_current_time_us();
+   os_timer_stop (timer);
+
+   EXPECT_NEAR (CALLS * TEN_MS, t1 - t0, 1000);
+   EXPECT_NEAR (CALLS, expired_calls, 2);
+
+   EXPECT_EQ ((void *)0x42, expired_arg);
+
+   // Check that timer is stopped
+   expired_calls = 0;
+   os_usleep (10 * TEN_MS);
+   EXPECT_NEAR (0, expired_calls, 1);
+
+   os_timer_destroy (timer);
+}
+
+TEST_F (Osal, OneshotTimer)
+{
+   os_timer_t * timer;
+
+   timer = os_timer_create (TEN_MS, expired, (void *)0x42, true);
+
+   os_timer_start (timer);
+   os_usleep (10 * TEN_MS);
+
+   EXPECT_EQ (1, expired_calls);
+   EXPECT_EQ ((void *)0x42, expired_arg);
+
+   os_timer_destroy (timer);
+}
+
+TEST_F (Osal, MultipleTimers)
+{
+   os_timer_t * timer1;
+   os_timer_t * timer2;
+
+   timer1 = os_timer_create (10 * 1000, expired, (void *)1, true);
+   timer2 = os_timer_create (20 * 1000, expired, (void *)2, true);
+
+   os_timer_start (timer1);
+   os_timer_start (timer2);
+   os_usleep (100 * 1000);
+
+   EXPECT_EQ (2, expired_calls);
+   EXPECT_EQ ((void *)2, expired_arg);
+
+   os_timer_destroy (timer1);
+   os_timer_destroy (timer2);
+}
+
+TEST_F (Osal, CurrentTime)
+{
+   uint32_t t0, t1;
+
+   t0 = os_get_current_time_us();
+   os_usleep (100 * 1000);
+   t1 = os_get_current_time_us();
+
+   EXPECT_NEAR (100 * 1000, t1 - t0, 1000);
+}

profinet_stack/osal/version.h.in

@@ -0,0 +1,41 @@
+/*********************************************************************
+ *        _       _         _
+ *  _ __ | |_  _ | |  __ _ | |__   ___
+ * | '__|| __|(_)| | / _` || '_ \ / __|
+ * | |   | |_  _ | || (_| || |_) |\__ \
+ * |_|    \__|(_)|_| \__,_||_.__/ |___/
+ *
+ * www.rt-labs.com
+ * Copyright 2017 rt-labs AB, Sweden.
+ *
+ * This software is licensed under the terms of the BSD 3-clause
+ * license. See the file LICENSE distributed with this software for
+ * full license information.
+ ********************************************************************/
+
+#ifndef VERSION_H
+#define VERSION_H
+
+#cmakedefine OSAL_GIT_REVISION "@OSAL_GIT_REVISION@"xx
+
+#if !defined(OSAL_VERSION_BUILD) && defined(OSAL_VERSION_GIT)
+#define OSAL_VERSION_BUILD OSAL_VERSION_GIT
+#endif
+
+/* clang-format-off */
+
+#define OSAL_VERSION_MAJOR @OSAL_VERSION_MAJOR@
+#define OSAL_VERSION_MINOR @OSAL_VERSION_MINOR@
+#define OSAL_VERSION_PATCH @OSAL_VERSION_PATCH@
+
+#if defined(OSAL_VERSION_BUILD)
+#define OSAL_VERSION \
+   "@OSAL_VERSION_MAJOR@.@OSAL_VERSION_MINOR@.@OSAL_VERSION_PATCH@+"OSAL_VERSION_BUILD
+#else
+#define OSAL_VERSION \
+   "@OSAL_VERSION_MAJOR@.@OSAL_VERSION_MINOR@.@OSAL_VERSION_PATCH@"
+#endif
+
+/* clang-format-on */
+
+#endif  /* VERSION_H */