am64x/am243x: SDFM: Enable zero cross detection
-Enable GPIO based zero cross detection Fixes: PINDSW-5523 Signed-off-by: Achala Ram <a-ram@ti.com>
This commit is contained in:
Achala Ram
parent
48c3485bfe
commit
0ea609e6b4
@ -1,7 +1,7 @@
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/**
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* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
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* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
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* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00"
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* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00"
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* @versions {"tool":"1.18.0+3266"}
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*/
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@ -15,9 +15,6 @@ const gpio1 = gpio.addInstance();
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const gpio2 = gpio.addInstance();
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const gpio3 = gpio.addInstance();
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const gpio4 = gpio.addInstance();
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const gpio5 = gpio.addInstance();
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const gpio6 = gpio.addInstance();
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const gpio7 = gpio.addInstance();
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const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
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const pruicss1 = pruicss.addInstance();
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const debug_log = scripting.addModule("/kernel/dpl/debug_log");
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@ -34,52 +31,34 @@ const mpu_armv76 = mpu_armv7.addInstance();
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*/
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epwm1.$name = "CONFIG_EPWM0";
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epwm1.EPWM.$assign = "EHRPWM0";
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epwm1.EPWM.A.$assign = "ball.U20";
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epwm1.EPWM.B.$assign = "ball.U18";
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epwm1.EPWM.SYNCO.$assign = "ball.U21";
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epwm1.EPWM.A.$assign = "GPMC0_AD3";
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epwm1.EPWM.B.$assign = "GPMC0_AD4";
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epwm1.EPWM.SYNCO.$assign = "GPMC0_AD1";
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epwm1.EPWM.SYNCI.$used = false;
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gpio1.$name = "GPIO_MTR_1_PWM_EN";
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gpio1.pinDir = "OUTPUT";
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gpio1.GPIO.$assign = "GPIO0";
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gpio1.GPIO.gpioPin.rx = false;
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gpio1.GPIO.gpioPin.$assign = "ball.Y20";
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gpio1.GPIO.gpioPin.$assign = "GPMC0_AD15";
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gpio2.$name = "GPIO_HIGH_TH_CH0";
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gpio2.pinDir = "OUTPUT";
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gpio2.useMcuDomainPeripherals = true;
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gpio2.$name = "GPIO_ZC_TH_CH0";
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gpio2.MCU_GPIO.$assign = "MCU_GPIO0";
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gpio2.MCU_GPIO.gpioPin.rx = false;
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gpio2.MCU_GPIO.gpioPin.$assign = "ball.B6";
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gpio2.MCU_GPIO.gpioPin.$assign = "MCU_SPI0_D1";
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gpio3.$name = "GPIO_LOW_TH_CH0";
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gpio3.pinDir = "OUTPUT";
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gpio3.useMcuDomainPeripherals = true;
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gpio3.$name = "GPIO_ZC_TH_CH1";
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gpio3.MCU_GPIO.gpioPin.rx = false;
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gpio3.MCU_GPIO.gpioPin.$assign = "ball.C7";
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gpio3.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_CS0";
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gpio4.$name = "GPIO_HIGH_TH_CH1";
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gpio4.pinDir = "OUTPUT";
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gpio4.useMcuDomainPeripherals = true;
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gpio4.MCU_GPIO.gpioPin.rx = false;
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gpio4.MCU_GPIO.gpioPin.$assign = "ball.A7";
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gpio5.$name = "GPIO_LOW_TH_CH1";
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gpio5.pinDir = "OUTPUT";
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gpio5.useMcuDomainPeripherals = true;
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gpio5.MCU_GPIO.gpioPin.rx = false;
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gpio5.MCU_GPIO.gpioPin.$assign = "ball.D7";
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gpio6.$name = "GPIO_HIGH_TH_CH2";
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gpio6.pinDir = "OUTPUT";
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gpio6.useMcuDomainPeripherals = true;
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gpio6.MCU_GPIO.gpioPin.$assign = "ball.C8";
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gpio7.$name = "GPIO_LOW_TH_CH2";
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gpio7.pinDir = "OUTPUT";
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gpio7.useMcuDomainPeripherals = true;
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gpio7.MCU_GPIO.gpioPin.rx = false;
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gpio7.MCU_GPIO.gpioPin.$assign = "ball.E6";
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gpio4.$name = "GPIO_ZC_TH_CH2";
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gpio4.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_D1";
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pruicss1.$name = "CONFIG_PRU_ICSS0";
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pruicss1.coreClk = 300000000;
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@ -126,8 +105,5 @@ mpu_armv76.size = 31;
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*/
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gpio3.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
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gpio4.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
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gpio5.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
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gpio6.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
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gpio7.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
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debug_log.uartLog.UART.RXD.$suggestSolution = "ball.D15";
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debug_log.uartLog.UART.TXD.$suggestSolution = "ball.C16";
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debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
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debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
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@ -1,7 +1,7 @@
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/**
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* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
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* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
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* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00"
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* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00"
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* @versions {"tool":"1.18.0+3266"}
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*/
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@ -16,9 +16,6 @@ const gpio1 = gpio.addInstance();
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const gpio2 = gpio.addInstance();
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const gpio3 = gpio.addInstance();
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const gpio4 = gpio.addInstance();
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const gpio5 = gpio.addInstance();
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const gpio6 = gpio.addInstance();
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const gpio7 = gpio.addInstance();
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const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
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const pruicss1 = pruicss.addInstance();
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const debug_log = scripting.addModule("/kernel/dpl/debug_log");
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@ -47,37 +44,21 @@ gpio1.useMcuDomainPeripherals = true;
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gpio1.MCU_GPIO.gpioPin.$assign = "MCU_UART0_RXD";
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gpio2.pinDir = "OUTPUT";
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gpio2.$name = "GPIO_HIGH_TH_CH0";
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gpio2.$name = "GPIO_ZC_TH_CH0";
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gpio2.GPIO.$assign = "GPIO0";
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gpio2.GPIO.gpioPin.rx = false;
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gpio2.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO18";
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gpio3.$name = "GPIO_LOW_TH_CH0";
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gpio3.pinDir = "OUTPUT";
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gpio3.$name = "GPIO_ZC_TH_CH1";
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gpio3.GPIO.$assign = "GPIO0";
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gpio3.GPIO.gpioPin.rx = false;
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gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO11";
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gpio3.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17";
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gpio4.pinDir = "OUTPUT";
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gpio4.$name = "GPIO_HIGH_TH_CH1";
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gpio4.GPIO.$assign = "GPIO0";
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gpio4.$name = "GPIO_ZC_TH_CH2";
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gpio4.GPIO.gpioPin.rx = false;
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gpio4.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17";
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gpio5.$name = "GPIO_LOW_TH_CH1";
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gpio5.pinDir = "OUTPUT";
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gpio5.GPIO.$assign = "GPIO0";
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gpio5.GPIO.gpioPin.rx = false;
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gpio5.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO7";
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gpio6.pinDir = "OUTPUT";
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gpio6.$name = "GPIO_HIGH_TH_CH2";
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gpio6.GPIO.gpioPin.rx = false;
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gpio6.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1";
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gpio7.$name = "GPIO_LOW_TH_CH2";
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gpio7.pinDir = "OUTPUT";
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gpio7.GPIO.gpioPin.rx = false;
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gpio7.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2";
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gpio4.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1";
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pruicss1.$name = "CONFIG_PRU_ICSS0";
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pruicss1.coreClk = 300000000;
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@ -125,8 +106,6 @@ epwm2.EPWM.$suggestSolution = "EHRPWM1";
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epwm2.EPWM.A.$suggestSolution = "GPMC0_AD5";
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epwm2.EPWM.B.$suggestSolution = "GPMC0_AD6";
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gpio1.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
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gpio3.GPIO.$suggestSolution = "GPIO1";
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gpio6.GPIO.$suggestSolution = "GPIO1";
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gpio7.GPIO.$suggestSolution = "GPIO1";
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gpio4.GPIO.$suggestSolution = "GPIO1";
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debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
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debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
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@ -175,7 +175,9 @@ SdfmPrms gTestSdfmPrms = {
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{{4, 18, 2},
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{4, 18, 2},
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{4, 18, 2}
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} /*Fast detect fields {Window size, zero count max, zero count min}*/
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}, /*Fast detect fields {Window size, zero count max, zero count min}*/
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0, /*Enable zero cross*/
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{1700, 1700, 1700}, /*Zero cross threshold*/
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};
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#define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */
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@ -184,47 +184,65 @@ int32_t initIcss(
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return SDFM_ERR_NERR;
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}
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void sdfm_configure_gpio_pin(sdfm_handle h_sdfm)
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void SDFM_configGpioPins(sdfm_handle h_sdfm, uint8_t loadShare, uint8_t pruInsId)
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{
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/*ch0 GPIO configuration*/
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uint32_t gpioBaseAddrCh0Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH0_BASE_ADDR);
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uint32_t pinNumCh0Hi = GPIO_HIGH_TH_CH0_PIN;
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GPIO_setDirMode(gpioBaseAddrCh0Hi, pinNumCh0Hi, GPIO_HIGH_TH_CH0_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Hi, pinNumCh0Hi, 0);
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uint32_t gpioBaseAddrCh0Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH0_BASE_ADDR);
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uint32_t pinNumCh0Lo = GPIO_LOW_TH_CH0_PIN;
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GPIO_setDirMode(gpioBaseAddrCh0Lo, pinNumCh0Lo, GPIO_LOW_TH_CH0_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Lo, pinNumCh0Lo, 1);
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/*ch1 GPIO configuration*/
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uint32_t gpioBaseAddrCh1Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH1_BASE_ADDR);
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uint32_t pinNumCh1Hi = GPIO_HIGH_TH_CH1_PIN;
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GPIO_setDirMode(gpioBaseAddrCh1Hi, pinNumCh1Hi, GPIO_HIGH_TH_CH1_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Hi, pinNumCh1Hi, 0);
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uint32_t gpioBaseAddrCh1Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH1_BASE_ADDR);
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uint32_t pinNumCh1Lo = GPIO_LOW_TH_CH1_PIN;
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GPIO_setDirMode(gpioBaseAddrCh1Lo, pinNumCh1Lo, GPIO_LOW_TH_CH1_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Lo, pinNumCh1Lo, 1);
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/*ch2 GPIO configuration*/
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uint32_t gpioBaseAddrCh2Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH2_BASE_ADDR);
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uint32_t pinNumCh2Hi = GPIO_HIGH_TH_CH2_PIN;
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GPIO_setDirMode(gpioBaseAddrCh2Hi, pinNumCh2Hi, GPIO_HIGH_TH_CH2_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Hi, pinNumCh2Hi, 0);
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uint32_t gpioBaseAddrCh2Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH2_BASE_ADDR);
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uint32_t pinNumCh2Lo = GPIO_LOW_TH_CH2_PIN;
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GPIO_setDirMode(gpioBaseAddrCh2Lo, pinNumCh2Lo, GPIO_LOW_TH_CH2_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Lo, pinNumCh2Lo, 1);
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if(loadShare)
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{
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uint32_t gpioBaseAddrCh;
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uint32_t pinNumCh;
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switch (pruInsId)
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{
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case PRUICSS_PRU0:
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case PRUICSS_PRU1:
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/*ch3 GPIO configuration*/
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gpioBaseAddrCh = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH1_BASE_ADDR);
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pinNumCh = GPIO_ZC_TH_CH1_PIN;
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GPIO_setDirMode(gpioBaseAddrCh, pinNumCh, GPIO_ZC_TH_CH1_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh, pinNumCh);
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break;
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case PRUICSS_RTU_PRU0:
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case PRUICSS_RTU_PRU1:
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/*ch0 GPIO configuration*/
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gpioBaseAddrCh = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH0_BASE_ADDR);
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pinNumCh = GPIO_ZC_TH_CH0_PIN;
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GPIO_setDirMode(gpioBaseAddrCh, pinNumCh, GPIO_ZC_TH_CH0_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh, pinNumCh);
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break;
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case PRUICSS_TX_PRU0:
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case PRUICSS_TX_PRU1:
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/*ch6 GPIO configuration*/
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gpioBaseAddrCh = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH2_BASE_ADDR);
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pinNumCh = GPIO_ZC_TH_CH2_PIN;
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GPIO_setDirMode(gpioBaseAddrCh, pinNumCh, GPIO_ZC_TH_CH2_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh, pinNumCh);
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break;
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default:
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break;
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}
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}
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else
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{
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/*ch0 GPIO configuration*/
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uint32_t gpioBaseAddrCh0 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH0_BASE_ADDR);
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uint32_t pinNumCh0 = GPIO_ZC_TH_CH0_PIN;
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GPIO_setDirMode(gpioBaseAddrCh0, pinNumCh0, GPIO_ZC_TH_CH0_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0, pinNumCh0);
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/*ch1 GPIO configuration*/
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uint32_t gpioBaseAddrCh1 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH1_BASE_ADDR);
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uint32_t pinNumCh1 = GPIO_ZC_TH_CH1_PIN;
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GPIO_setDirMode(gpioBaseAddrCh1, pinNumCh1, GPIO_ZC_TH_CH1_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1, pinNumCh1);
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/*ch2 GPIO configuration*/
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uint32_t gpioBaseAddrCh2 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH2_BASE_ADDR);
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uint32_t pinNumCh2 = GPIO_ZC_TH_CH2_PIN;
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GPIO_setDirMode(gpioBaseAddrCh2, pinNumCh2, GPIO_ZC_TH_CH2_DIR);
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SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2, pinNumCh2);
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}
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}
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/* Initialize SDFM PRU FW */
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int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle)
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int32_t initSdfmFw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle)
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{
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sdfm_handle hSdfm;
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uint8_t SDFM_CH = 0;
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@ -326,11 +344,17 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm
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{
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SDFM_disableComparator(hSdfm, SDFM_CH);
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}
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/*enabling Zero cross only for first channel of axis*/
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if(pSdfmPrms->en_zc && SDFM_CH == 0)
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{
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SDFM_enableZeroCrossDetection(hSdfm, SDFM_CH, pSdfmPrms->zcThr[SDFM_CH]);
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}
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}
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/*GPIO pin configuration for threshold measurment*/
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sdfm_configure_gpio_pin(hSdfm);
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SDFM_configGpioPins(hSdfm, pSdfmPrms->loadShare, pSdfmPrms->pruInsId);
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SDFM_setSampleTriggerTime(hSdfm, pSdfmPrms->firstSampTrigTime);
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if(pSdfmPrms->en_second_update)
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@ -458,7 +482,7 @@ int32_t initPruSdfm(
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}
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/* Initialize SDFM PRU FW */
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status = init_sdfm_pru_fw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle);
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status = initSdfmFw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle);
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if (status != SDFM_ERR_NERR)
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{
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return SDFM_ERR_INIT_PRU_SDFM;
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@ -170,6 +170,10 @@ typedef struct SdfmPrms_s
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uint8_t en_fd;
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/**<Fast detect configuration field*/
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uint8_t fastDetect[NUM_SD_CH][NUM_FD_FIELD];
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/**<Zero Cross enable field*/
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uint8_t en_zc;
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/**<Zero cross threshold*/
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uint32_t zcThr[NUM_CH_SUPPORTED_PER_AXIS];
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} SdfmPrms;
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@ -1,7 +1,7 @@
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/**
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* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
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* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
|
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* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00"
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* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00"
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* @versions {"tool":"1.18.0+3266"}
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*/
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@ -15,9 +15,6 @@ const gpio1 = gpio.addInstance();
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const gpio2 = gpio.addInstance();
|
||||
const gpio3 = gpio.addInstance();
|
||||
const gpio4 = gpio.addInstance();
|
||||
const gpio5 = gpio.addInstance();
|
||||
const gpio6 = gpio.addInstance();
|
||||
const gpio7 = gpio.addInstance();
|
||||
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
|
||||
const pruicss1 = pruicss.addInstance();
|
||||
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
|
||||
@ -34,52 +31,34 @@ const mpu_armv76 = mpu_armv7.addInstance();
|
||||
*/
|
||||
epwm1.$name = "CONFIG_EPWM0";
|
||||
epwm1.EPWM.$assign = "EHRPWM0";
|
||||
epwm1.EPWM.A.$assign = "ball.U20";
|
||||
epwm1.EPWM.B.$assign = "ball.U18";
|
||||
epwm1.EPWM.SYNCO.$assign = "ball.U21";
|
||||
epwm1.EPWM.A.$assign = "GPMC0_AD3";
|
||||
epwm1.EPWM.B.$assign = "GPMC0_AD4";
|
||||
epwm1.EPWM.SYNCO.$assign = "GPMC0_AD1";
|
||||
epwm1.EPWM.SYNCI.$used = false;
|
||||
|
||||
gpio1.$name = "GPIO_MTR_1_PWM_EN";
|
||||
gpio1.pinDir = "OUTPUT";
|
||||
gpio1.GPIO.$assign = "GPIO0";
|
||||
gpio1.GPIO.gpioPin.rx = false;
|
||||
gpio1.GPIO.gpioPin.$assign = "ball.Y20";
|
||||
gpio1.GPIO.gpioPin.$assign = "GPMC0_AD15";
|
||||
|
||||
gpio2.$name = "GPIO_HIGH_TH_CH0";
|
||||
gpio2.pinDir = "OUTPUT";
|
||||
gpio2.useMcuDomainPeripherals = true;
|
||||
gpio2.$name = "GPIO_ZC_TH_CH0";
|
||||
gpio2.MCU_GPIO.$assign = "MCU_GPIO0";
|
||||
gpio2.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio2.MCU_GPIO.gpioPin.$assign = "ball.B6";
|
||||
gpio2.MCU_GPIO.gpioPin.$assign = "MCU_SPI0_D1";
|
||||
|
||||
gpio3.$name = "GPIO_LOW_TH_CH0";
|
||||
gpio3.pinDir = "OUTPUT";
|
||||
gpio3.useMcuDomainPeripherals = true;
|
||||
gpio3.$name = "GPIO_ZC_TH_CH1";
|
||||
gpio3.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio3.MCU_GPIO.gpioPin.$assign = "ball.C7";
|
||||
gpio3.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_CS0";
|
||||
|
||||
gpio4.$name = "GPIO_HIGH_TH_CH1";
|
||||
gpio4.pinDir = "OUTPUT";
|
||||
gpio4.useMcuDomainPeripherals = true;
|
||||
gpio4.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio4.MCU_GPIO.gpioPin.$assign = "ball.A7";
|
||||
|
||||
gpio5.$name = "GPIO_LOW_TH_CH1";
|
||||
gpio5.pinDir = "OUTPUT";
|
||||
gpio5.useMcuDomainPeripherals = true;
|
||||
gpio5.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio5.MCU_GPIO.gpioPin.$assign = "ball.D7";
|
||||
|
||||
gpio6.$name = "GPIO_HIGH_TH_CH2";
|
||||
gpio6.pinDir = "OUTPUT";
|
||||
gpio6.useMcuDomainPeripherals = true;
|
||||
gpio6.MCU_GPIO.gpioPin.$assign = "ball.C8";
|
||||
|
||||
gpio7.$name = "GPIO_LOW_TH_CH2";
|
||||
gpio7.pinDir = "OUTPUT";
|
||||
gpio7.useMcuDomainPeripherals = true;
|
||||
gpio7.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio7.MCU_GPIO.gpioPin.$assign = "ball.E6";
|
||||
gpio4.$name = "GPIO_ZC_TH_CH2";
|
||||
gpio4.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_D1";
|
||||
|
||||
pruicss1.$name = "CONFIG_PRU_ICSS0";
|
||||
pruicss1.coreClk = 300000000;
|
||||
@ -126,8 +105,5 @@ mpu_armv76.size = 31;
|
||||
*/
|
||||
gpio3.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio4.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio5.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio6.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio7.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
debug_log.uartLog.UART.RXD.$suggestSolution = "ball.D15";
|
||||
debug_log.uartLog.UART.TXD.$suggestSolution = "ball.C16";
|
||||
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
|
||||
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/**
|
||||
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
|
||||
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
|
||||
* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00"
|
||||
* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00"
|
||||
* @versions {"tool":"1.18.0+3266"}
|
||||
*/
|
||||
|
||||
@ -16,9 +16,6 @@ const gpio1 = gpio.addInstance();
|
||||
const gpio2 = gpio.addInstance();
|
||||
const gpio3 = gpio.addInstance();
|
||||
const gpio4 = gpio.addInstance();
|
||||
const gpio5 = gpio.addInstance();
|
||||
const gpio6 = gpio.addInstance();
|
||||
const gpio7 = gpio.addInstance();
|
||||
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
|
||||
const pruicss1 = pruicss.addInstance();
|
||||
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
|
||||
@ -47,37 +44,21 @@ gpio1.useMcuDomainPeripherals = true;
|
||||
gpio1.MCU_GPIO.gpioPin.$assign = "MCU_UART0_RXD";
|
||||
|
||||
gpio2.pinDir = "OUTPUT";
|
||||
gpio2.$name = "GPIO_HIGH_TH_CH0";
|
||||
gpio2.$name = "GPIO_ZC_TH_CH0";
|
||||
gpio2.GPIO.$assign = "GPIO0";
|
||||
gpio2.GPIO.gpioPin.rx = false;
|
||||
gpio2.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO18";
|
||||
|
||||
gpio3.$name = "GPIO_LOW_TH_CH0";
|
||||
gpio3.pinDir = "OUTPUT";
|
||||
gpio3.$name = "GPIO_ZC_TH_CH1";
|
||||
gpio3.GPIO.$assign = "GPIO0";
|
||||
gpio3.GPIO.gpioPin.rx = false;
|
||||
gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO11";
|
||||
gpio3.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17";
|
||||
|
||||
gpio4.pinDir = "OUTPUT";
|
||||
gpio4.$name = "GPIO_HIGH_TH_CH1";
|
||||
gpio4.GPIO.$assign = "GPIO0";
|
||||
gpio4.$name = "GPIO_ZC_TH_CH2";
|
||||
gpio4.GPIO.gpioPin.rx = false;
|
||||
gpio4.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17";
|
||||
|
||||
gpio5.$name = "GPIO_LOW_TH_CH1";
|
||||
gpio5.pinDir = "OUTPUT";
|
||||
gpio5.GPIO.$assign = "GPIO0";
|
||||
gpio5.GPIO.gpioPin.rx = false;
|
||||
gpio5.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO7";
|
||||
|
||||
gpio6.pinDir = "OUTPUT";
|
||||
gpio6.$name = "GPIO_HIGH_TH_CH2";
|
||||
gpio6.GPIO.gpioPin.rx = false;
|
||||
gpio6.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1";
|
||||
|
||||
gpio7.$name = "GPIO_LOW_TH_CH2";
|
||||
gpio7.pinDir = "OUTPUT";
|
||||
gpio7.GPIO.gpioPin.rx = false;
|
||||
gpio7.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2";
|
||||
gpio4.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1";
|
||||
|
||||
pruicss1.$name = "CONFIG_PRU_ICSS0";
|
||||
pruicss1.coreClk = 300000000;
|
||||
@ -125,8 +106,6 @@ epwm2.EPWM.$suggestSolution = "EHRPWM1";
|
||||
epwm2.EPWM.A.$suggestSolution = "GPMC0_AD5";
|
||||
epwm2.EPWM.B.$suggestSolution = "GPMC0_AD6";
|
||||
gpio1.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio3.GPIO.$suggestSolution = "GPIO1";
|
||||
gpio6.GPIO.$suggestSolution = "GPIO1";
|
||||
gpio7.GPIO.$suggestSolution = "GPIO1";
|
||||
gpio4.GPIO.$suggestSolution = "GPIO1";
|
||||
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
|
||||
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
|
||||
|
||||
@ -162,7 +162,9 @@ SdfmPrms gTestSdfmPrms = {
|
||||
{{4, 18, 2},
|
||||
{4, 18, 2},
|
||||
{4, 18, 2}
|
||||
} /*Fast detect fields {Window size, zero count max, zero count min}*/
|
||||
}, /*Fast detect fields {Window size, zero count max, zero count min}*/
|
||||
0, /*Enable zero cross*/
|
||||
{1700, 1700, 1700}, /*Zero cross threshold*/
|
||||
};
|
||||
|
||||
#define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */
|
||||
|
||||
@ -136,47 +136,29 @@ int32_t initIcss(
|
||||
|
||||
return SDFM_ERR_NERR;
|
||||
}
|
||||
void sdfm_configure_gpio_pin(sdfm_handle h_sdfm)
|
||||
void SDFM_configGpioPins(sdfm_handle h_sdfm)
|
||||
{
|
||||
/*ch0 GPIO configuration*/
|
||||
uint32_t gpioBaseAddrCh0Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH0_BASE_ADDR);
|
||||
uint32_t pinNumCh0Hi = GPIO_HIGH_TH_CH0_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh0Hi, pinNumCh0Hi, GPIO_HIGH_TH_CH0_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Hi, pinNumCh0Hi, 0);
|
||||
|
||||
uint32_t gpioBaseAddrCh0Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH0_BASE_ADDR);
|
||||
uint32_t pinNumCh0Lo = GPIO_LOW_TH_CH0_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh0Lo, pinNumCh0Lo, GPIO_LOW_TH_CH0_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Lo, pinNumCh0Lo, 1);
|
||||
|
||||
uint32_t gpioBaseAddrCh0 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH0_BASE_ADDR);
|
||||
uint32_t pinNumCh0 = GPIO_ZC_TH_CH0_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh0, pinNumCh0, GPIO_ZC_TH_CH0_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0, pinNumCh0);
|
||||
|
||||
/*ch1 GPIO configuration*/
|
||||
uint32_t gpioBaseAddrCh1Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH1_BASE_ADDR);
|
||||
uint32_t pinNumCh1Hi = GPIO_HIGH_TH_CH1_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh1Hi, pinNumCh1Hi, GPIO_HIGH_TH_CH1_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Hi, pinNumCh1Hi, 0);
|
||||
|
||||
uint32_t gpioBaseAddrCh1Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH1_BASE_ADDR);
|
||||
uint32_t pinNumCh1Lo = GPIO_LOW_TH_CH1_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh1Lo, pinNumCh1Lo, GPIO_LOW_TH_CH1_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Lo, pinNumCh1Lo, 1);
|
||||
|
||||
uint32_t gpioBaseAddrCh1 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH1_BASE_ADDR);
|
||||
uint32_t pinNumCh1 = GPIO_ZC_TH_CH1_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh1, pinNumCh1, GPIO_ZC_TH_CH1_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1, pinNumCh1);
|
||||
|
||||
/*ch2 GPIO configuration*/
|
||||
uint32_t gpioBaseAddrCh2Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH2_BASE_ADDR);
|
||||
uint32_t pinNumCh2Hi = GPIO_HIGH_TH_CH2_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh2Hi, pinNumCh2Hi, GPIO_HIGH_TH_CH2_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Hi, pinNumCh2Hi, 0);
|
||||
|
||||
uint32_t gpioBaseAddrCh2Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH2_BASE_ADDR);
|
||||
uint32_t pinNumCh2Lo = GPIO_LOW_TH_CH2_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh2Lo, pinNumCh2Lo, GPIO_LOW_TH_CH2_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Lo, pinNumCh2Lo, 1);
|
||||
|
||||
uint32_t gpioBaseAddrCh2 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH2_BASE_ADDR);
|
||||
uint32_t pinNumCh2 = GPIO_ZC_TH_CH2_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh2, pinNumCh2, GPIO_ZC_TH_CH2_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2, pinNumCh2);
|
||||
|
||||
}
|
||||
/* Initialize SDFM PRU FW */
|
||||
int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle)
|
||||
int32_t initSdfmFw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle)
|
||||
{
|
||||
sdfm_handle hSdfm;
|
||||
uint8_t SDFM_CH = 0;
|
||||
@ -245,10 +227,15 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm
|
||||
SDFM_disableComparator(hSdfm, SDFM_CH);
|
||||
}
|
||||
|
||||
if(pSdfmPrms->en_zc)
|
||||
{
|
||||
SDFM_enableZeroCrossDetection(hSdfm, SDFM_CH, pSdfmPrms->zcThr[SDFM_CH]);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*GPIO pin configuration for threshold measurment*/
|
||||
sdfm_configure_gpio_pin(hSdfm);
|
||||
SDFM_configGpioPins(hSdfm);
|
||||
|
||||
SDFM_setSampleTriggerTime(hSdfm, pSdfmPrms->firstSampTrigTime);
|
||||
if(pSdfmPrms->en_second_update)
|
||||
@ -347,7 +334,7 @@ int32_t initPruSdfm(
|
||||
}
|
||||
|
||||
/* Initialize SDFM PRU FW */
|
||||
status = init_sdfm_pru_fw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle);
|
||||
status = initSdfmFw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle);
|
||||
if (status != SDFM_ERR_NERR) {
|
||||
return SDFM_ERR_INIT_PRU_SDFM;
|
||||
}
|
||||
|
||||
@ -169,6 +169,10 @@ typedef struct SdfmPrms_s
|
||||
uint8_t en_fd;
|
||||
/**<Fast detect configuration field*/
|
||||
uint8_t fastDetect[NUM_SD_CH][NUM_FD_FIELD];
|
||||
/**<Zero Cross enable field*/
|
||||
uint8_t en_zc;
|
||||
/**<Zero cross threshold*/
|
||||
uint32_t zcThr[NUM_CH_SUPPORTED];
|
||||
} SdfmPrms;
|
||||
|
||||
|
||||
|
||||
@ -15,9 +15,6 @@ const gpio1 = gpio.addInstance();
|
||||
const gpio2 = gpio.addInstance();
|
||||
const gpio3 = gpio.addInstance();
|
||||
const gpio4 = gpio.addInstance();
|
||||
const gpio5 = gpio.addInstance();
|
||||
const gpio6 = gpio.addInstance();
|
||||
const gpio7 = gpio.addInstance();
|
||||
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
|
||||
const pruicss1 = pruicss.addInstance();
|
||||
const pruicss2 = pruicss.addInstance();
|
||||
@ -46,41 +43,23 @@ gpio1.GPIO.$assign = "GPIO0";
|
||||
gpio1.GPIO.gpioPin.rx = false;
|
||||
gpio1.GPIO.gpioPin.$assign = "GPMC0_AD15";
|
||||
|
||||
gpio2.$name = "GPIO_HIGH_TH_CH0";
|
||||
gpio2.pinDir = "OUTPUT";
|
||||
gpio2.useMcuDomainPeripherals = true;
|
||||
gpio2.$name = "GPIO_ZC_TH_CH0";
|
||||
gpio2.MCU_GPIO.$assign = "MCU_GPIO0";
|
||||
gpio2.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio2.MCU_GPIO.gpioPin.$assign = "MCU_SPI0_D1";
|
||||
|
||||
gpio3.$name = "GPIO_LOW_TH_CH0";
|
||||
gpio3.pinDir = "OUTPUT";
|
||||
gpio3.useMcuDomainPeripherals = true;
|
||||
gpio3.$name = "GPIO_ZC_TH_CH1";
|
||||
gpio3.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio3.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_D0";
|
||||
gpio3.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_CS0";
|
||||
|
||||
gpio4.$name = "GPIO_HIGH_TH_CH1";
|
||||
gpio4.pinDir = "OUTPUT";
|
||||
gpio4.useMcuDomainPeripherals = true;
|
||||
gpio4.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio4.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_CS0";
|
||||
|
||||
gpio5.$name = "GPIO_LOW_TH_CH1";
|
||||
gpio5.pinDir = "OUTPUT";
|
||||
gpio5.useMcuDomainPeripherals = true;
|
||||
gpio5.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio5.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_CLK";
|
||||
|
||||
gpio6.$name = "GPIO_HIGH_TH_CH2";
|
||||
gpio6.pinDir = "OUTPUT";
|
||||
gpio6.useMcuDomainPeripherals = true;
|
||||
gpio6.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_D1";
|
||||
|
||||
gpio7.$name = "GPIO_LOW_TH_CH2";
|
||||
gpio7.pinDir = "OUTPUT";
|
||||
gpio7.useMcuDomainPeripherals = true;
|
||||
gpio7.MCU_GPIO.gpioPin.rx = false;
|
||||
gpio7.MCU_GPIO.gpioPin.$assign = "MCU_SPI0_CLK";
|
||||
gpio4.$name = "GPIO_ZC_TH_CH2";
|
||||
gpio4.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_D1";
|
||||
|
||||
pruicss1.$name = "CONFIG_PRU_ICSS0";
|
||||
pruicss1.coreClk = 300000000;
|
||||
@ -133,8 +112,5 @@ mpu_armv76.size = 31;
|
||||
*/
|
||||
gpio3.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio4.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio5.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio6.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio7.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
|
||||
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
|
||||
|
||||
@ -16,9 +16,6 @@ const gpio1 = gpio.addInstance();
|
||||
const gpio2 = gpio.addInstance();
|
||||
const gpio3 = gpio.addInstance();
|
||||
const gpio4 = gpio.addInstance();
|
||||
const gpio5 = gpio.addInstance();
|
||||
const gpio6 = gpio.addInstance();
|
||||
const gpio7 = gpio.addInstance();
|
||||
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
|
||||
const pruicss1 = pruicss.addInstance();
|
||||
const pruicss2 = pruicss.addInstance();
|
||||
@ -48,37 +45,21 @@ gpio1.useMcuDomainPeripherals = true;
|
||||
gpio1.MCU_GPIO.gpioPin.$assign = "MCU_UART0_RXD";
|
||||
|
||||
gpio2.pinDir = "OUTPUT";
|
||||
gpio2.$name = "GPIO_HIGH_TH_CH0";
|
||||
gpio2.$name = "GPIO_ZC_TH_CH0";
|
||||
gpio2.GPIO.$assign = "GPIO0";
|
||||
gpio2.GPIO.gpioPin.rx = false;
|
||||
gpio2.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO18";
|
||||
|
||||
gpio3.$name = "GPIO_LOW_TH_CH0";
|
||||
gpio3.pinDir = "OUTPUT";
|
||||
gpio3.$name = "GPIO_ZC_TH_CH1";
|
||||
gpio3.GPIO.$assign = "GPIO0";
|
||||
gpio3.GPIO.gpioPin.rx = false;
|
||||
gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO11";
|
||||
gpio3.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17";
|
||||
|
||||
gpio4.pinDir = "OUTPUT";
|
||||
gpio4.$name = "GPIO_HIGH_TH_CH1";
|
||||
gpio4.GPIO.$assign = "GPIO0";
|
||||
gpio4.$name = "GPIO_ZC_TH_CH2";
|
||||
gpio4.GPIO.gpioPin.rx = false;
|
||||
gpio4.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17";
|
||||
|
||||
gpio5.$name = "GPIO_LOW_TH_CH1";
|
||||
gpio5.pinDir = "OUTPUT";
|
||||
gpio5.GPIO.$assign = "GPIO0";
|
||||
gpio5.GPIO.gpioPin.rx = false;
|
||||
gpio5.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO7";
|
||||
|
||||
gpio6.pinDir = "OUTPUT";
|
||||
gpio6.$name = "GPIO_HIGH_TH_CH2";
|
||||
gpio6.GPIO.gpioPin.rx = false;
|
||||
gpio6.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1";
|
||||
|
||||
gpio7.$name = "GPIO_LOW_TH_CH2";
|
||||
gpio7.pinDir = "OUTPUT";
|
||||
gpio7.GPIO.gpioPin.rx = false;
|
||||
gpio7.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2";
|
||||
gpio4.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1";
|
||||
|
||||
pruicss1.$name = "CONFIG_PRU_ICSS0";
|
||||
pruicss1.coreClk = 300000000;
|
||||
@ -132,8 +113,6 @@ epwm2.EPWM.$suggestSolution = "EHRPWM1";
|
||||
epwm2.EPWM.A.$suggestSolution = "GPMC0_AD5";
|
||||
epwm2.EPWM.B.$suggestSolution = "GPMC0_AD6";
|
||||
gpio1.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
|
||||
gpio3.GPIO.$suggestSolution = "GPIO1";
|
||||
gpio6.GPIO.$suggestSolution = "GPIO1";
|
||||
gpio7.GPIO.$suggestSolution = "GPIO1";
|
||||
gpio4.GPIO.$suggestSolution = "GPIO1";
|
||||
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
|
||||
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
|
||||
|
||||
@ -87,13 +87,9 @@
|
||||
#define TEST_ICSSG_INST_ID ( CONFIG_PRU_ICSS0 )
|
||||
/* Test ICSSG slice ID */
|
||||
#define TEST_ICSSG_SLICE_ID ( ICSSG_SLICE_ID_0 )
|
||||
/* Test PRU core instance IDs */
|
||||
#define TEST_PRU_INST_ID ( PRUICSS_PRU0 )
|
||||
#define TEST_RTU_INST_ID ( PRUICSS_RTU_PRU0 )
|
||||
|
||||
/* R5F interrupt settings for ICSSG */
|
||||
#define ICSSG_PRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_0 ) /* VIM interrupt number */
|
||||
#define ICSSG_RTU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_1 ) /* VIM interrupt number */
|
||||
#define ICSSG_PRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_3 ) /* VIM interrupt number */
|
||||
|
||||
/* EPWM0 IRQ handler */
|
||||
static void epwmIrqHandler(void *handle);
|
||||
@ -145,6 +141,8 @@ __attribute__((section(".gSdfmSampleOutput"))) uint32_t gSdfm_sampleOutput[NUM_C
|
||||
|
||||
/* Test Sdfm parameters */
|
||||
SdfmPrms gTestSdfmPrms = {
|
||||
PRUICSS_PRU0, /*PRU core ID*/
|
||||
TEST_ICSSG_SLICE_ID, /*SLICE IDs*/
|
||||
300000000, /*PRU Core clock*/
|
||||
300000000, /*Value of ICSSG0_IEP clock*/
|
||||
300000000, /*ICSSG1_IEP_CLOCK*/
|
||||
@ -168,6 +166,8 @@ SdfmPrms gTestSdfmPrms = {
|
||||
{4, 18, 2},
|
||||
{4, 18, 2}}, /*Fast detect fields {Window size, zero count max, zero count min}*/
|
||||
1, /*Phase delay enable*/
|
||||
0, /*Enable zero cross*/
|
||||
{1700, 1700, 1700}, /*Zero cross threshold*/
|
||||
};
|
||||
|
||||
#define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */
|
||||
@ -184,15 +184,10 @@ volatile Bool gRunFlag = TRUE;
|
||||
/* SDFM Output sample for Channel 0 */
|
||||
/*Sample size*/
|
||||
#define MAX_SAMPLES (128)
|
||||
uint32_t sdfm_ch0_samples[MAX_SAMPLES] = {0};
|
||||
uint32_t sdfm_ch0_idx = 0;
|
||||
/* SDFM Output sample for Channel 1 */
|
||||
uint32_t sdfm_ch1_samples[MAX_SAMPLES] = {0};
|
||||
uint32_t sdfm_ch1_idx = 0;
|
||||
/* SDFM Output sample for Channel 2 */
|
||||
uint32_t sdfm_ch2_samples[MAX_SAMPLES] = {0};
|
||||
uint32_t sdfm_ch2_idx = 0;
|
||||
|
||||
/* ICSS SDFM Output samples */
|
||||
uint32_t sdfm_ch_samples[NUM_CH_SUPPORTED][MAX_SAMPLES] = {0};
|
||||
uint32_t sdfmPruIdxCnt = 0;
|
||||
|
||||
/* IRQ counters */
|
||||
volatile uint32_t gPruSdfmIrqCnt=0; /* PRU Sdfm FW IRQ count */
|
||||
@ -311,7 +306,7 @@ void init_sdfm()
|
||||
DebugP_assert(status == SystemP_SUCCESS);
|
||||
|
||||
/* Initialize PRU core for SDFM */
|
||||
status = initPruSdfm(gPruIcssHandle, TEST_PRU_INST_ID, &gTestSdfmPrms, &gHPruSdfm);
|
||||
status = initPruSdfm(gPruIcssHandle, PRUICSS_PRU0, &gTestSdfmPrms, &gHPruSdfm);
|
||||
if (status != SDFM_ERR_NERR)
|
||||
{
|
||||
DebugP_log("Error: initPruSdfm() fail.\r\n");
|
||||
@ -404,21 +399,19 @@ void pruSdfmIrqHandler(void *args)
|
||||
*/
|
||||
PRUICSS_clearEvent(gPruIcssHandle, PRU_TRIGGER_HOST_SDFM_EVT);
|
||||
|
||||
/* SDFM Output sample for Channel 0 */
|
||||
sdfm_ch0_samples[sdfm_ch0_idx++] = SDFM_getFilterData(gHPruSdfm, 0);
|
||||
/* SDFM Output sample for Channel 1 */
|
||||
sdfm_ch1_samples[sdfm_ch1_idx++] = SDFM_getFilterData(gHPruSdfm, 1);
|
||||
/* SDFM Output sample for Channel 2 */
|
||||
sdfm_ch2_samples[sdfm_ch2_idx++] = SDFM_getFilterData(gHPruSdfm, 2);
|
||||
|
||||
if(sdfm_ch0_idx >= MAX_SAMPLES)
|
||||
if(sdfmPruIdxCnt >= MAX_SAMPLES)
|
||||
{
|
||||
sdfm_ch0_idx = 0;
|
||||
sdfm_ch1_idx = 0;
|
||||
sdfm_ch2_idx = 0;
|
||||
sdfmPruIdxCnt = 0;
|
||||
}
|
||||
}
|
||||
/* SDFM Output sample for Channel 0 */
|
||||
sdfm_ch_samples[SDFM_CH0][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0);
|
||||
/* SDFM Output sample for Channel 1 */
|
||||
sdfm_ch_samples[SDFM_CH1][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1);
|
||||
/* SDFM Output sample for Channel 2 */
|
||||
sdfm_ch_samples[SDFM_CH2][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2);
|
||||
|
||||
sdfmPruIdxCnt++;
|
||||
}
|
||||
|
||||
/* EPWM0 IRQ handler */
|
||||
static void epwmIrqHandler(void *args)
|
||||
|
||||
@ -48,19 +48,19 @@
|
||||
#include "mclk_iep0_sync.h"
|
||||
|
||||
/* PRU SDFM FW image info */
|
||||
typedef struct PRUSDFM_PruFwImageInfo_s {
|
||||
typedef struct PRUSDFM_PruFwImageInfo_s
|
||||
{
|
||||
const uint32_t *pPruImemImg;
|
||||
const uint32_t pruImemImgSz;
|
||||
} PRUSDFM_PruFwImageInfo;
|
||||
|
||||
/* Number of PRU images */
|
||||
#define PRU_SDFM_NUM_PRU_IMAGE ( 3 )
|
||||
#define PRU_SDFM_NUM_PRU_IMAGE ( 1 )
|
||||
|
||||
/* PRU SDFM image info */
|
||||
static PRUSDFM_PruFwImageInfo gPruFwImageInfo[PRU_SDFM_NUM_PRU_IMAGE] =
|
||||
{
|
||||
{pru_SDFM_PRU0_image_0, sizeof(pru_SDFM_PRU0_image_0)}, /* PRU FW */
|
||||
{NULL, 0}
|
||||
{SDFM_PRU0_image_0, sizeof(SDFM_PRU0_image_0)} /* single PRU FW binary */
|
||||
};
|
||||
|
||||
/* ICSS INTC configuration */
|
||||
@ -91,14 +91,16 @@ int32_t initIcss(
|
||||
if (sliceId == ICSSG_SLICE_ID_0)
|
||||
{
|
||||
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_PRU0);
|
||||
if (status != SystemP_SUCCESS) {
|
||||
if (status != SystemP_SUCCESS)
|
||||
{
|
||||
return SDFM_ERR_INIT_ICSSG;
|
||||
}
|
||||
}
|
||||
else if (sliceId == ICSSG_SLICE_ID_1)
|
||||
{
|
||||
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_PRU1);
|
||||
if (status != SystemP_SUCCESS) {
|
||||
if (status != SystemP_SUCCESS)
|
||||
{
|
||||
return SDFM_ERR_INIT_ICSSG;
|
||||
}
|
||||
}
|
||||
@ -132,43 +134,25 @@ int32_t initIcss(
|
||||
|
||||
return SDFM_ERR_NERR;
|
||||
}
|
||||
void sdfm_configure_gpio_pin(sdfm_handle h_sdfm)
|
||||
void SDFM_configGpioPins(sdfm_handle h_sdfm)
|
||||
{
|
||||
/*ch0 GPIO configuration*/
|
||||
uint32_t gpioBaseAddrCh0Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH0_BASE_ADDR);
|
||||
uint32_t pinNumCh0Hi = GPIO_HIGH_TH_CH0_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh0Hi, pinNumCh0Hi, GPIO_HIGH_TH_CH0_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Hi, pinNumCh0Hi, 0);
|
||||
|
||||
uint32_t gpioBaseAddrCh0Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH0_BASE_ADDR);
|
||||
uint32_t pinNumCh0Lo = GPIO_LOW_TH_CH0_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh0Lo, pinNumCh0Lo, GPIO_LOW_TH_CH0_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Lo, pinNumCh0Lo, 1);
|
||||
|
||||
uint32_t gpioBaseAddrCh0 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH0_BASE_ADDR);
|
||||
uint32_t pinNumCh0 = GPIO_ZC_TH_CH0_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh0, pinNumCh0, GPIO_ZC_TH_CH0_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0, pinNumCh0);
|
||||
|
||||
/*ch1 GPIO configuration*/
|
||||
uint32_t gpioBaseAddrCh1Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH1_BASE_ADDR);
|
||||
uint32_t pinNumCh1Hi = GPIO_HIGH_TH_CH1_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh1Hi, pinNumCh1Hi, GPIO_HIGH_TH_CH1_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Hi, pinNumCh1Hi, 0);
|
||||
|
||||
uint32_t gpioBaseAddrCh1Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH1_BASE_ADDR);
|
||||
uint32_t pinNumCh1Lo = GPIO_LOW_TH_CH1_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh1Lo, pinNumCh1Lo, GPIO_LOW_TH_CH1_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Lo, pinNumCh1Lo, 1);
|
||||
|
||||
uint32_t gpioBaseAddrCh1 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH1_BASE_ADDR);
|
||||
uint32_t pinNumCh1 = GPIO_ZC_TH_CH1_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh1, pinNumCh1, GPIO_ZC_TH_CH1_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1, pinNumCh1);
|
||||
|
||||
/*ch2 GPIO configuration*/
|
||||
uint32_t gpioBaseAddrCh2Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH2_BASE_ADDR);
|
||||
uint32_t pinNumCh2Hi = GPIO_HIGH_TH_CH2_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh2Hi, pinNumCh2Hi, GPIO_HIGH_TH_CH2_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Hi, pinNumCh2Hi, 0);
|
||||
|
||||
uint32_t gpioBaseAddrCh2Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH2_BASE_ADDR);
|
||||
uint32_t pinNumCh2Lo = GPIO_LOW_TH_CH2_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh2Lo, pinNumCh2Lo, GPIO_LOW_TH_CH2_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Lo, pinNumCh2Lo, 1);
|
||||
|
||||
uint32_t gpioBaseAddrCh2 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH2_BASE_ADDR);
|
||||
uint32_t pinNumCh2 = GPIO_ZC_TH_CH2_PIN;
|
||||
GPIO_setDirMode(gpioBaseAddrCh2, pinNumCh2, GPIO_ZC_TH_CH2_DIR);
|
||||
SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2, pinNumCh2);
|
||||
|
||||
}
|
||||
void SDFM_measurePhaseCompensation(sdfm_handle h_sdfm, uint32_t iep_clk)
|
||||
@ -185,12 +169,12 @@ void SDFM_measurePhaseCompensation(sdfm_handle h_sdfm, uint32_t iep_clk)
|
||||
|
||||
}
|
||||
/* Initialize SDFM PRU FW */
|
||||
int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle)
|
||||
int32_t initSdfmFw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle)
|
||||
{
|
||||
sdfm_handle hSdfm;
|
||||
|
||||
uint8_t SDFM_CH = 0;
|
||||
/* Initialize SDFM instance */
|
||||
hSdfm = SDFM_init(pruId);
|
||||
hSdfm = SDFM_init(pruId, pSdfmPrms->pruInsId);
|
||||
|
||||
hSdfm->gPruIcssHandle = pruIcssHandle;
|
||||
hSdfm->pruss_cfg = (void *)(((PRUICSS_HwAttrs *)(pruIcssHandle->hwAttrs))->cfgRegBase);
|
||||
@ -205,7 +189,6 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm
|
||||
return SDFM_ERR_INIT_SDFM;
|
||||
}
|
||||
|
||||
uint8_t SDFM_CH;
|
||||
hSdfm->pru_core_clk = pSdfmPrms->pru_clock;
|
||||
hSdfm->iep_clock = pSdfmPrms->G0iep_clock;
|
||||
hSdfm->sdfm_clock = pSdfmPrms->sd_clock;
|
||||
@ -263,10 +246,15 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm
|
||||
SDFM_disableComparator(hSdfm, SDFM_CH);
|
||||
}
|
||||
|
||||
if(pSdfmPrms->en_zc)
|
||||
{
|
||||
SDFM_enableZeroCrossDetection(hSdfm, SDFM_CH, pSdfmPrms->zcThr[SDFM_CH]);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*GPIO pin configuration for threshold measurment*/
|
||||
sdfm_configure_gpio_pin(hSdfm);
|
||||
SDFM_configGpioPins(hSdfm);
|
||||
|
||||
SDFM_setSampleTriggerTime(hSdfm, pSdfmPrms->firstSampTrigTime);
|
||||
if(pSdfmPrms->en_second_update)
|
||||
@ -305,7 +293,6 @@ int32_t initPruSdfm(
|
||||
uint32_t byteLen; /* Total number of bytes to be written */
|
||||
uint8_t pruId;
|
||||
int32_t status;
|
||||
void *pruss_cfg;
|
||||
|
||||
/* Reset PRU */
|
||||
status = PRUICSS_resetCore(pruIcssHandle, pruInstId);
|
||||
@ -325,15 +312,6 @@ int32_t initPruSdfm(
|
||||
pPruFwImageInfo = &gPruFwImageInfo[0];
|
||||
pruIMem = PRUICSS_IRAM_PRU(sliceId);
|
||||
break;
|
||||
case PRUICSS_RTU_PRU0:
|
||||
case PRUICSS_RTU_PRU1:
|
||||
pPruFwImageInfo = &gPruFwImageInfo[1];
|
||||
pruIMem = PRUICSS_IRAM_RTU_PRU(sliceId);
|
||||
break;
|
||||
case PRUICSS_TX_PRU0:
|
||||
case PRUICSS_TX_PRU1:
|
||||
pPruFwImageInfo = NULL;
|
||||
break;
|
||||
default:
|
||||
pPruFwImageInfo = NULL;
|
||||
break;
|
||||
@ -361,10 +339,12 @@ int32_t initPruSdfm(
|
||||
return SDFM_ERR_INIT_PRU_SDFM;
|
||||
}
|
||||
/* Translate PRU ID to SDFM API */
|
||||
if (pruInstId == PRUICSS_PRU0) {
|
||||
if (pruInstId == PRUICSS_PRU0)
|
||||
{
|
||||
pruId = PRU_ID_0;
|
||||
}
|
||||
else if (pruInstId == PRUICSS_PRU1) {
|
||||
else if (pruInstId == PRUICSS_PRU1)
|
||||
{
|
||||
pruId = PRU_ID_1;
|
||||
}
|
||||
else {
|
||||
@ -372,7 +352,7 @@ int32_t initPruSdfm(
|
||||
}
|
||||
|
||||
/* Initialize SDFM PRU FW */
|
||||
status = init_sdfm_pru_fw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle);
|
||||
status = initSdfmFw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle);
|
||||
if (status != SDFM_ERR_NERR) {
|
||||
return SDFM_ERR_INIT_PRU_SDFM;
|
||||
}
|
||||
|
||||
@ -111,6 +111,18 @@
|
||||
#define ICSSG_SLICE_ID_1 ( 1 ) /* ICSSG slide ID 1 */
|
||||
#define ICSSG_NUM_SLICE ( 2 ) /* ICSSG number of slices */
|
||||
#define NUM_FD_FIELD ( 3 )
|
||||
|
||||
#define NUM_CH_SUPPORTED ( 3 )
|
||||
/* SDFM Channel IDs*/
|
||||
#define SDFM_CH0 (0)
|
||||
#define SDFM_CH1 (1)
|
||||
#define SDFM_CH2 (2)
|
||||
#define SDFM_CH3 (3)
|
||||
#define SDFM_CH4 (4)
|
||||
#define SDFM_CH5 (5)
|
||||
#define SDFM_CH6 (6)
|
||||
#define SDFM_CH7 (7)
|
||||
#define SDFM_CH8 (8)
|
||||
/*!
|
||||
* @brief PRUICSS Instance IDs
|
||||
*/
|
||||
@ -124,6 +136,10 @@ typedef enum PRUICSS_MaxInstances_s
|
||||
/* SDFM configuration parameters */
|
||||
typedef struct SdfmPrms_s
|
||||
{
|
||||
/**<PRU core instance ID*/
|
||||
uint8_t pruInsId;
|
||||
/**<ICSSG pru Slice ID*/
|
||||
uint8_t icssgSliceId;
|
||||
/**< PRU_CORE_CLOCK*/
|
||||
uint32_t pru_clock;
|
||||
/**< IEP clock value */
|
||||
@ -158,6 +174,10 @@ typedef struct SdfmPrms_s
|
||||
uint8_t fastDetect[NUM_SD_CH][NUM_FD_FIELD];
|
||||
/**<Phase delay enbale */
|
||||
uint8_t phase_delay;
|
||||
/**<Zero Cross enable field*/
|
||||
uint8_t en_zc;
|
||||
/**<Zero cross threshold*/
|
||||
uint32_t zcThr[NUM_CH_SUPPORTED];
|
||||
} SdfmPrms;
|
||||
|
||||
|
||||
|
||||
@ -118,16 +118,17 @@ extern "C" {
|
||||
#define SYS_EVT_TYPE_EDGE 1
|
||||
|
||||
#define PRUICSS_INTC_INITDATA { \
|
||||
{ IEP_TIM_CAP_CMP_EVENT, PRU_ARM_EVENT02, PRU_ARM_EVENT03, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [0-15] for Misra C standards */ \
|
||||
{ IEP_TIM_CAP_CMP_EVENT, PRU_ARM_EVENT02, PRU_ARM_EVENT03, PRU_ARM_EVENT04, PRU_ARM_EVENT05, PRU_ARM_EVENT06, \
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [6-15] for Misra C standards */ \
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [16-31] for Misra C standards */ \
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [32-47] for Misra C standards */ \
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}, /* initializing member [48-63] for Misra C standards */ \
|
||||
{ {IEP_TIM_CAP_CMP_EVENT, CHANNEL1, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT02, CHANNEL2, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT03, CHANNEL3, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [3] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [4] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [5] for Misra C standards */ \
|
||||
{PRU_ARM_EVENT04, CHANNEL4, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT05, CHANNEL5, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT06, CHANNEL6, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [6] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [7] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [8] for Misra C standards */ \
|
||||
@ -187,9 +188,9 @@ extern "C" {
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [62] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}}, /* initializing member [63] for Misra C standards */ \
|
||||
{ {CHANNEL1, PRU1}, {CHANNEL2, PRU_EVTOUT0}, {CHANNEL3, PRU_EVTOUT1},\
|
||||
{0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF}, /* Initializing members [3,4,5] of array for Misra C standards */ \
|
||||
{CHANNEL4, PRU_EVTOUT2}, {CHANNEL5, PRU_EVTOUT3}, {CHANNEL6, PRU_EVTOUT4}, \
|
||||
{0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF} }, /* Initializing members [6,7,8,9] of array for Misra C standards */ \
|
||||
(PRU1_HOSTEN_MASK | PRU_EVTOUT0_HOSTEN_MASK | PRU_EVTOUT1_HOSTEN_MASK) \
|
||||
(PRU1_HOSTEN_MASK | PRU_EVTOUT0_HOSTEN_MASK | PRU_EVTOUT1_HOSTEN_MASK | PRU_EVTOUT2_HOSTEN_MASK | PRU_EVTOUT3_HOSTEN_MASK | PRU_EVTOUT4_HOSTEN_MASK) /* PRU_EVTOUT0 */ \
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -32,7 +32,6 @@ help:
|
||||
@echo .
|
||||
@echo Library build targets,
|
||||
@echo ======================
|
||||
@echo $(MAKE) -s -f makefile.am64x motorcontrol_sdfm_r5f.ti-arm-clang
|
||||
@echo $(MAKE) -s -f makefile.am64x motorcontrol_endat_r5f.ti-arm-clang
|
||||
@echo $(MAKE) -s -f makefile.am64x motorcontrol_hdsl_r5f.ti-arm-clang
|
||||
@echo $(MAKE) -s -f makefile.am64x motorcontrol_tamagawa_r5f.ti-arm-clang
|
||||
@ -40,7 +39,6 @@ help:
|
||||
@echo .
|
||||
@echo Library clean targets,
|
||||
@echo ======================
|
||||
@echo $(MAKE) -s -f makefile.am64x motorcontrol_sdfm_r5f.ti-arm-clang_clean
|
||||
@echo $(MAKE) -s -f makefile.am64x motorcontrol_endat_r5f.ti-arm-clang_clean
|
||||
@echo $(MAKE) -s -f makefile.am64x motorcontrol_hdsl_r5f.ti-arm-clang_clean
|
||||
@echo $(MAKE) -s -f makefile.am64x motorcontrol_tamagawa_r5f.ti-arm-clang_clean
|
||||
@ -56,10 +54,6 @@ help:
|
||||
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-rtupru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
|
||||
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-txpru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
|
||||
@ -79,14 +73,13 @@ help:
|
||||
@echo .
|
||||
|
||||
# Various Component Targets
|
||||
BUILD_COMBO_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang
|
||||
BUILD_COMBO_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang
|
||||
BUILD_COMBO_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang
|
||||
BUILD_COMBO_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang
|
||||
BUILD_COMBO_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang
|
||||
|
||||
# Combine all Components
|
||||
BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) $(BUILD_COMBO_pruicss_pwm)
|
||||
BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) $(BUILD_COMBO_pruicss_pwm)
|
||||
|
||||
# Combine all Pre-built Components
|
||||
BUILD_COMBO_PREBUILT_ALL =
|
||||
@ -100,9 +93,6 @@ libs-prebuilt: $(BUILD_COMBO_PREBUILT_ALL)
|
||||
|
||||
libs-private: $(BUILD_COMBO_PRIVATE_ALL)
|
||||
|
||||
$(BUILD_COMBO_motorcontrol_sdfm):
|
||||
$(MAKE) -C source/current_sense/sdfm -f makefile.am64x.$(subst motorcontrol_sdfm_,,$@) all
|
||||
|
||||
$(BUILD_COMBO_motorcontrol_endat):
|
||||
$(MAKE) -C source/position_sense/endat -f makefile.am64x.$(subst motorcontrol_endat_,,$@) all
|
||||
|
||||
@ -117,14 +107,13 @@ $(BUILD_COMBO_pruicss_pwm):
|
||||
|
||||
|
||||
# Various Component Clean Targets
|
||||
BUILD_COMBO_CLEAN_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_clean
|
||||
BUILD_COMBO_CLEAN_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_clean
|
||||
BUILD_COMBO_CLEAN_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_clean
|
||||
BUILD_COMBO_CLEAN_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_clean
|
||||
BUILD_COMBO_CLEAN_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_clean
|
||||
|
||||
# Combine all Components Clean
|
||||
BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) $(BUILD_COMBO_CLEAN_pruicss_pwm)
|
||||
BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) $(BUILD_COMBO_CLEAN_pruicss_pwm)
|
||||
|
||||
# Combine all Pre-built Components Clean
|
||||
BUILD_COMBO_PREBUILT_CLEAN_ALL =
|
||||
@ -133,9 +122,6 @@ libs-clean: $(BUILD_COMBO_CLEAN_ALL)
|
||||
|
||||
libs-prebuilt-clean: $(BUILD_COMBO_PREBUILT_CLEAN_ALL)
|
||||
|
||||
$(BUILD_COMBO_CLEAN_motorcontrol_sdfm):
|
||||
$(MAKE) -C source/current_sense/sdfm -f makefile.am64x.$(subst motorcontrol_sdfm_,,$(subst _clean,,$@)) clean
|
||||
|
||||
$(BUILD_COMBO_CLEAN_motorcontrol_endat):
|
||||
$(MAKE) -C source/position_sense/endat -f makefile.am64x.$(subst motorcontrol_endat_,,$(subst _clean,,$@)) clean
|
||||
|
||||
@ -150,14 +136,13 @@ $(BUILD_COMBO_CLEAN_pruicss_pwm):
|
||||
|
||||
|
||||
# Various Component Scrub Targets
|
||||
BUILD_COMBO_SCRUB_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_scrub_scrub
|
||||
BUILD_COMBO_SCRUB_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_scrub_scrub
|
||||
BUILD_COMBO_SCRUB_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_scrub_scrub
|
||||
BUILD_COMBO_SCRUB_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_scrub_scrub
|
||||
BUILD_COMBO_SCRUB_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_scrub_scrub
|
||||
|
||||
# Combine all Components Scrub Targets
|
||||
BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) $(BUILD_COMBO_SCRUB_pruicss_pwm)
|
||||
BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) $(BUILD_COMBO_SCRUB_pruicss_pwm)
|
||||
|
||||
# Combine all Pre-built Components Scrub Targets
|
||||
BUILD_COMBO_PREBUILT_SCRUB_ALL =
|
||||
@ -166,9 +151,6 @@ libs-scrub: $(BUILD_COMBO_SCRUB_ALL)
|
||||
|
||||
libs-prebuilt-scrub: $(BUILD_COMBO_PREBUILT_SCRUB_ALL)
|
||||
|
||||
$(BUILD_COMBO_SCRUB_motorcontrol_sdfm):
|
||||
$(MAKE) -C source/current_sense/sdfm -f makefile.am64x.$(subst motorcontrol_sdfm_,,$(subst _scrub,,$@)) scrub
|
||||
|
||||
$(BUILD_COMBO_SCRUB_motorcontrol_endat):
|
||||
$(MAKE) -C source/position_sense/endat -f makefile.am64x.$(subst motorcontrol_endat_,,$(subst _scrub,,$@)) scrub
|
||||
|
||||
@ -196,10 +178,6 @@ BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti
|
||||
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_ALL =
|
||||
# Various Private Example Targets
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt
|
||||
@ -243,18 +221,6 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL)
|
||||
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang:
|
||||
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile all
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile all
|
||||
|
||||
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
|
||||
|
||||
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt:
|
||||
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile all
|
||||
|
||||
@ -309,10 +275,6 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freer
|
||||
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL =
|
||||
# Various Private Example Targets
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt_clean
|
||||
@ -356,18 +318,6 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL)
|
||||
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
|
||||
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile clean
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile clean
|
||||
|
||||
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
|
||||
|
||||
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile clean
|
||||
|
||||
@ -422,10 +372,6 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freer
|
||||
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL =
|
||||
# Various Private Example Targets
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_scrub
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_scrub
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_scrub
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_scrub
|
||||
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt_scrub
|
||||
@ -469,18 +415,6 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL)
|
||||
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
|
||||
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_scrub:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile scrub
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_scrub:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile scrub
|
||||
|
||||
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub
|
||||
|
||||
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_scrub:
|
||||
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile scrub
|
||||
|
||||
|
||||
@ -19,10 +19,6 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5
|
||||
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL =
|
||||
# Various Private Example Projectspec Build Targets
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_build
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_build
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_build
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_build
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt_build
|
||||
@ -66,18 +62,6 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL)
|
||||
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build:
|
||||
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_build:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec all
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_build:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec all
|
||||
|
||||
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
|
||||
|
||||
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_build:
|
||||
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec all
|
||||
|
||||
@ -133,10 +117,6 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5
|
||||
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL =
|
||||
# Various Private Example Projectspec Clean Targets
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_clean
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt_clean
|
||||
@ -180,18 +160,6 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL)
|
||||
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
|
||||
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec clean
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec clean
|
||||
|
||||
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
|
||||
|
||||
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean:
|
||||
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec clean
|
||||
|
||||
@ -247,10 +215,6 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am64x-evm_r
|
||||
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL =
|
||||
# Various Private Example Projectspec Export Targets
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_export
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_export
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_export
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_export
|
||||
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt_export
|
||||
@ -294,18 +258,6 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL)
|
||||
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export:
|
||||
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_export:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec export
|
||||
|
||||
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_export:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec export
|
||||
|
||||
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export:
|
||||
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
|
||||
|
||||
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_export:
|
||||
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec export
|
||||
|
||||
@ -382,10 +334,6 @@ help:
|
||||
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-rtupru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
|
||||
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-txpru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
|
||||
|
||||
@ -44,8 +44,8 @@
|
||||
|
||||
/* Internal structure for managing each PRU SD */
|
||||
SDFM g_sdfm[NUM_PRU] = {
|
||||
{NULL,PRU_ID_0,0,0,0,0, NULL},
|
||||
{NULL,PRU_ID_1,0,0,0,0, NULL},
|
||||
{NULL, PRU_ID_0, 0, 0, 0, 0, NULL},
|
||||
{NULL, PRU_ID_1, 0, 0, 0, 0, NULL},
|
||||
};
|
||||
|
||||
/* Initialize SDFM instance */
|
||||
@ -227,7 +227,7 @@ void SDFM_disableComparator(sdfm_handle h_sdfm, uint8_t ch)
|
||||
h_sdfm->p_sdfm_interface->sdfm_ch_ctrl.enable_comparator &= (0xFFFF ^ (1<<ch));
|
||||
}
|
||||
/*GPIO configuration*/
|
||||
void SDFM_configComparatorGpioPins(sdfm_handle h_sdfm, uint8_t ch,uint32_t gpio_base_addr, uint32_t pin_number, uint32_t threshold_type)
|
||||
void SDFM_configComparatorGpioPins(sdfm_handle h_sdfm, uint8_t ch,uint32_t gpio_base_addr, uint32_t pin_number)
|
||||
{
|
||||
|
||||
volatile CSL_GpioRegs* hGpio = (volatile CSL_GpioRegs*)((uintptr_t) gpio_base_addr);
|
||||
@ -236,9 +236,9 @@ void SDFM_configComparatorGpioPins(sdfm_handle h_sdfm, uint8_t ch,uint32_t gpio_
|
||||
uint32_t clr_data_addr = (uint32_t)&hGpio->BANK_REGISTERS[reg_index].CLR_DATA;
|
||||
uint32_t set_data_addr = (uint32_t)&hGpio->BANK_REGISTERS[reg_index].SET_DATA;
|
||||
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params[threshold_type].write_val = reg_val;
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params[threshold_type].set_val_addr = set_data_addr;
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params[threshold_type].clr_val_addr = clr_data_addr;
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params.write_val = reg_val;
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params.set_val_addr = set_data_addr;
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params.clr_val_addr = clr_data_addr;
|
||||
}
|
||||
|
||||
/* Get current (or latest) sample for the specified channel */
|
||||
@ -259,9 +259,9 @@ void SDFM_setFilterOverSamplingRatio(sdfm_handle h_sdfm, uint16_t nc_osr)
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_trigger.nc_prd_iep_cnt = count;
|
||||
}
|
||||
/*return firmware version */
|
||||
uint64_t SDFM_getFirmwareVersion(sdfm_handle h_sdfm)
|
||||
uint32_t SDFM_getFirmwareVersion(sdfm_handle h_sdfm)
|
||||
{
|
||||
return h_sdfm->p_sdfm_interface->firmwareVersion;
|
||||
return h_sdfm->p_sdfm_interface->firmwareVersion >> SDFM_FW_VERSION_BIT_SHIFT;
|
||||
}
|
||||
/*Enable free run NC */
|
||||
void SDFM_enableContinuousNormalCurrent(sdfm_handle h_sdfm)
|
||||
@ -509,6 +509,63 @@ int32_t SDFM_clearOverCurrentError(sdfm_handle h_sdfm, uint8_t chNum)
|
||||
retVal = SDFM_clearPwmTripStatus(h_sdfm, chNum);
|
||||
return retVal;
|
||||
}
|
||||
void SDFM_enableZeroCrossDetection(sdfm_handle h_sdfm, uint8_t chNum, uint32_t zcThr)
|
||||
{
|
||||
uint32_t temp;
|
||||
temp = 1 << chNum;
|
||||
if(temp & SDFM_CH_MASK_FOR_CH0_CH3_CH6)
|
||||
{
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].sdfm_threshold_parms.zeroCrossEn = 1;
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].sdfm_threshold_parms.zeroCrossTh = zcThr;
|
||||
}
|
||||
else if(temp & SDFM_CH_MASK_FOR_CH1_CH4_CH7)
|
||||
{
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].sdfm_threshold_parms.zeroCrossEn = 1;
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].sdfm_threshold_parms.zeroCrossTh = zcThr;
|
||||
}
|
||||
else
|
||||
{
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].sdfm_threshold_parms.zeroCrossEn = 1;
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].sdfm_threshold_parms.zeroCrossTh = zcThr;
|
||||
}
|
||||
|
||||
}
|
||||
uint8_t SDFM_getZeroCrossThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum)
|
||||
{
|
||||
uint32_t temp;
|
||||
temp = 1 << chNum;
|
||||
if(temp & SDFM_CH_MASK_FOR_CH0_CH3_CH6)
|
||||
{
|
||||
return h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].sdfm_threshold_parms.zeroCrossThstatus;
|
||||
}
|
||||
else if(temp & SDFM_CH_MASK_FOR_CH1_CH4_CH7)
|
||||
{
|
||||
return h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].sdfm_threshold_parms.zeroCrossThstatus;
|
||||
}
|
||||
else
|
||||
{
|
||||
return h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].sdfm_threshold_parms.zeroCrossThstatus;
|
||||
}
|
||||
|
||||
}
|
||||
void SDFM_disableZeroCrossDetection(sdfm_handle h_sdfm, uint8_t chNum)
|
||||
{
|
||||
uint32_t temp;
|
||||
temp = 1 << chNum;
|
||||
if(temp & SDFM_CH_MASK_FOR_CH0_CH3_CH6)
|
||||
{
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].sdfm_threshold_parms.zeroCrossEn = 0;
|
||||
}
|
||||
else if(temp & SDFM_CH_MASK_FOR_CH1_CH4_CH7)
|
||||
{
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].sdfm_threshold_parms.zeroCrossEn = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].sdfm_threshold_parms.zeroCrossEn = 0;
|
||||
}
|
||||
|
||||
}
|
||||
/* SDFM global enable */
|
||||
void SDFM_enable(sdfm_handle h_sdfm)
|
||||
{
|
||||
|
||||
@ -60,7 +60,7 @@ FIRMWARE_VERSION_INTERNAL .set 1
|
||||
; bit30..24 version number
|
||||
FIRMWARE_VERSION_REVISION .set 0x01
|
||||
; bit23..16 major number
|
||||
FIRMWARE_VERSION_MAJOR .set 0x00
|
||||
FIRMWARE_VERSION_MAJOR .set 0x01
|
||||
; bit15..0 minor number
|
||||
FIRMWARE_VERSION_MINOR .set 0x0000
|
||||
|
||||
|
||||
@ -100,6 +100,11 @@
|
||||
#define SDFM_CFG_GPIO_CLR_ADDR_SZ ( 4 )
|
||||
#define SDFM_CFG_CURR_VAL_SZ ( 4 )
|
||||
|
||||
/*Zero cross fields*/
|
||||
#define SDFM_CFG_BF_SD_CH0_ZC_EN_BIT ( 0 )
|
||||
#define SDFM_CFG_BF_SD_CH1_ZC_EN_BIT ( 1 )
|
||||
#define SDFM_CFG_BF_SD_CH2_ZC_EN_BIT ( 2 )
|
||||
|
||||
/* FW register offsets from base (in bytes) */
|
||||
/* SDFM Control */
|
||||
#define SDFM_EN_OFFSET ( 0x00 )
|
||||
@ -123,7 +128,6 @@
|
||||
#define SDFM_CFG_SD_CLOCK_PHASE_DELAY ( 0x18 )
|
||||
|
||||
|
||||
|
||||
/*SDFM channel offsets*/
|
||||
/*Ch0 offset*/
|
||||
#define SDFM_CFG_CH0_CH_ID_OFFSET ( 0x1C )
|
||||
@ -134,102 +138,106 @@
|
||||
#define SDFM_CFG_OC_LOW_THR_CH0_OFFSET ( 0x24 )
|
||||
#define SDFM_CFG_OC_HIGH_THR_STATUS_CH0_OFFSET ( 0x28 )
|
||||
#define SDFM_CFG_OC_LOW_THR_STATUS_CH0_OFFSET ( 0x29 )
|
||||
#define SDFM_CFG_ZC_THR_EN_CH0_OFFSET ( 0x2A )
|
||||
#define SDFM_CFG_ZC_THR_STATUS_CH0_OFFSET ( 0x2B )
|
||||
#define SDFM_CFG_ZC_THR_CH0_OFFSET ( 0x2C )
|
||||
|
||||
#define SDFM_CFG_CH0_FD_WD_REG_OFFSET ( 0x2C)
|
||||
#define SDFM_CFG_CH0_FD_ZERO_MAX_REG_OFFSET ( 0x2D)
|
||||
#define SDFM_CFG_CH0_FD_ZERO_MIN_REG_OFFSET ( 0x2E)
|
||||
#define SDFM_CFG_CH0_FD_ONE_MAX_REG_OFFSET ( 0x2F)
|
||||
#define SDFM_CFG_CH0_FD_ONE_MIN_REG_OFFSET ( 0x30)
|
||||
|
||||
#define SDFM_CFG_CH0_CLOCK_SOURCE_OFFSET ( 0x34 )
|
||||
#define SDFM_CFG_CH0_CLOCK_INVERSION_OFFSET ( 0x38 )
|
||||
#define SDFM_CFG_CH0_FD_WD_REG_OFFSET ( 0x30)
|
||||
#define SDFM_CFG_CH0_FD_ZERO_MAX_REG_OFFSET ( 0x31)
|
||||
#define SDFM_CFG_CH0_FD_ZERO_MIN_REG_OFFSET ( 0x32)
|
||||
#define SDFM_CFG_CH0_FD_ONE_MAX_REG_OFFSET ( 0x33)
|
||||
#define SDFM_CFG_CH0_FD_ONE_MIN_REG_OFFSET ( 0x34)
|
||||
|
||||
#define SDFM_CFG_HIGH_THR_CH0_WRITE_VAL_OFFSET ( 0x3C )
|
||||
#define SDFM_CFG_HIGH_THR_CH0_SET_VAL_ADDR_OFFSET ( 0x40 )
|
||||
#define SDFM_CFG_HIGH_THR_CH0_CLR_VAL_ADDR_OFFSET ( 0x44 )
|
||||
#define SDFM_CFG_LOW_THR_CH0_WRITE_VAL_OFFSET ( 0x48 )
|
||||
#define SDFM_CFG_LOW_THR_CH0_SET_VAL_ADDR_OFFSET ( 0x4C )
|
||||
#define SDFM_CFG_LOW_THR_CH0_CLR_VAL_ADDR_OFFSET ( 0x50 )
|
||||
#define SDFM_CFG_CH0_CLOCK_SOURCE_OFFSET ( 0x38 )
|
||||
#define SDFM_CFG_CH0_CLOCK_INVERSION_OFFSET ( 0x3C )
|
||||
|
||||
#define SDFM_CFG_ZC_THR_CH0_WRITE_VAL_OFFSET ( 0x40 )
|
||||
#define SDFM_CFG_ZC_THR_CH0_SET_VAL_ADDR_OFFSET ( 0x44 )
|
||||
#define SDFM_CFG_ZC_THR_CH0_CLR_VAL_ADDR_OFFSET ( 0x48 )
|
||||
|
||||
/*Ch1 offsets*/
|
||||
#define SDFM_CFG_CH1_CH_ID_OFFSET ( 0x60 )
|
||||
#define SDFM_CFG_CH1_FILTER_TYPE_OFFSET ( 0x61 )
|
||||
#define SDFM_CFG_CH1_OSR_OFFSET ( 0x62 )
|
||||
#define SDFM_CFG_CH1_CH_ID_OFFSET ( 0x4C )
|
||||
#define SDFM_CFG_CH1_FILTER_TYPE_OFFSET ( 0x4D )
|
||||
#define SDFM_CFG_CH1_OSR_OFFSET ( 0x4E )
|
||||
|
||||
#define SDFM_CFG_OC_HIGH_THR_CH1_OFFSET ( 0x64 )
|
||||
#define SDFM_CFG_OC_LOW_THR_CH1_OFFSET ( 0x68 )
|
||||
#define SDFM_CFG_OC_HIGH_THR_STATUS_CH1_OFFSET ( 0x6C )
|
||||
#define SDFM_CFG_OC_LOW_THR_STATUS_CH1_OFFSET ( 0x6D )
|
||||
#define SDFM_CFG_OC_HIGH_THR_CH1_OFFSET ( 0x50 )
|
||||
#define SDFM_CFG_OC_LOW_THR_CH1_OFFSET ( 0x54 )
|
||||
#define SDFM_CFG_OC_HIGH_THR_STATUS_CH1_OFFSET ( 0x58 )
|
||||
#define SDFM_CFG_OC_LOW_THR_STATUS_CH1_OFFSET ( 0x59 )
|
||||
#define SDFM_CFG_ZC_THR_EN_CH1_OFFSET ( 0x5A )
|
||||
#define SDFM_CFG_ZC_THR_STATUS_CH1_OFFSET ( 0x5B )
|
||||
#define SDFM_CFG_ZC_THR_CH1_OFFSET ( 0x5C )
|
||||
|
||||
#define SDFM_CFG_CH1_FD_WD_REG_OFFSET ( 0x70 )
|
||||
#define SDFM_CFG_CH1_FD_ZERO_MAX_REG_OFFSET ( 0x71 )
|
||||
#define SDFM_CFG_CH1_FD_ZERO_MIN_REG_OFFSET ( 0x72 )
|
||||
#define SDFM_CFG_CH1_FD_ONE_MAX_REG_OFFSET ( 0x73 )
|
||||
#define SDFM_CFG_CH1_FD_ONE_MIN_REG_OFFSET ( 0x74 )
|
||||
#define SDFM_CFG_CH1_FD_WD_REG_OFFSET ( 0x60 )
|
||||
#define SDFM_CFG_CH1_FD_ZERO_MAX_REG_OFFSET ( 0x61 )
|
||||
#define SDFM_CFG_CH1_FD_ZERO_MIN_REG_OFFSET ( 0x62 )
|
||||
#define SDFM_CFG_CH1_FD_ONE_MAX_REG_OFFSET ( 0x63 )
|
||||
#define SDFM_CFG_CH1_FD_ONE_MIN_REG_OFFSET ( 0x64 )
|
||||
|
||||
#define SDFM_CFG_CH1_CLOCK_SOURCE_OFFSET ( 0x78 )
|
||||
#define SDFM_CFG_CH1_CLOCK_INVERSION_OFFSET ( 0x7C )
|
||||
|
||||
#define SDFM_CFG_HIGH_THR_CH1_WRITE_VAL_OFFSET ( 0x80 )
|
||||
#define SDFM_CFG_HIGH_THR_CH1_SET_VAL_ADDR_OFFSET ( 0x84 )
|
||||
#define SDFM_CFG_HIGH_THR_CH1_CLR_VAL_ADDR_OFFSET ( 0x88 )
|
||||
#define SDFM_CFG_LOW_THR_CH1_WRITE_VAL_OFFSET ( 0x8C )
|
||||
#define SDFM_CFG_LOW_THR_CH1_SET_VAL_ADDR_OFFSET ( 0x90 )
|
||||
#define SDFM_CFG_LOW_THR_CH1_CLR_VAL_ADDR_OFFSET ( 0x94 )
|
||||
#define SDFM_CFG_CH1_CLOCK_SOURCE_OFFSET ( 0x68 )
|
||||
#define SDFM_CFG_CH1_CLOCK_INVERSION_OFFSET ( 0x6C )
|
||||
|
||||
#define SDFM_CFG_ZC_THR_CH1_WRITE_VAL_OFFSET ( 0x70 )
|
||||
#define SDFM_CFG_ZC_THR_CH1_SET_VAL_ADDR_OFFSET ( 0x74 )
|
||||
#define SDFM_CFG_ZC_THR_CH1_CLR_VAL_ADDR_OFFSET ( 0x78 )
|
||||
|
||||
|
||||
/*Ch2 offsets*/
|
||||
#define SDFM_CFG_CH2_CH_ID_OFFSET ( 0xA4 )
|
||||
#define SDFM_CFG_CH2_FILTER_TYPE_OFFSET ( 0xA5 )
|
||||
#define SDFM_CFG_CH2_OSR_OFFSET ( 0xA6 )
|
||||
#define SDFM_CFG_CH2_CH_ID_OFFSET ( 0x7C )
|
||||
#define SDFM_CFG_CH2_FILTER_TYPE_OFFSET ( 0x7D )
|
||||
#define SDFM_CFG_CH2_OSR_OFFSET ( 0x7E )
|
||||
|
||||
#define SDFM_CFG_OC_HIGH_THR_CH2_OFFSET ( 0xA8 )
|
||||
#define SDFM_CFG_OC_LOW_THR_CH2_OFFSET ( 0xAC )
|
||||
#define SDFM_CFG_OC_HIGH_THR_STATUS_CH2_OFFSET ( 0xB0 )
|
||||
#define SDFM_CFG_OC_LOW_THR_STATUS_CH2_OFFSET ( 0xB1 )
|
||||
|
||||
#define SDFM_CFG_CH2_FD_WD_REG_OFFSET ( 0xB4 )
|
||||
#define SDFM_CFG_CH2_FD_ZERO_MAX_REG_OFFSET ( 0xB5 )
|
||||
#define SDFM_CFG_CH2_FD_ZERO_MIN_REG_OFFSET ( 0xB6 )
|
||||
#define SDFM_CFG_CH2_FD_ONE_MAX_REG_OFFSET ( 0xB7 )
|
||||
#define SDFM_CFG_CH2_FD_ONE_MIN_REG_OFFSET ( 0xB8 )
|
||||
#define SDFM_CFG_OC_HIGH_THR_CH2_OFFSET ( 0x80 )
|
||||
#define SDFM_CFG_OC_LOW_THR_CH2_OFFSET ( 0x84 )
|
||||
#define SDFM_CFG_OC_HIGH_THR_STATUS_CH2_OFFSET ( 0x88 )
|
||||
#define SDFM_CFG_OC_LOW_THR_STATUS_CH2_OFFSET ( 0x89 )
|
||||
#define SDFM_CFG_ZC_THR_EN_CH2_OFFSET ( 0x8A )
|
||||
#define SDFM_CFG_ZC_THR_STATUS_CH2_OFFSET ( 0x8B )
|
||||
#define SDFM_CFG_ZC_THR_CH2_OFFSET ( 0x8C )
|
||||
|
||||
|
||||
#define SDFM_CFG_CH2_CLOCK_SOURCE_OFFSET ( 0xBC )
|
||||
#define SDFM_CFG_CH2_CLOCK_INVERSION_OFFSET ( 0xC0 )
|
||||
#define SDFM_CFG_CH2_FD_WD_REG_OFFSET ( 0x90 )
|
||||
#define SDFM_CFG_CH2_FD_ZERO_MAX_REG_OFFSET ( 0x91 )
|
||||
#define SDFM_CFG_CH2_FD_ZERO_MIN_REG_OFFSET ( 0x92 )
|
||||
#define SDFM_CFG_CH2_FD_ONE_MAX_REG_OFFSET ( 0x93 )
|
||||
#define SDFM_CFG_CH2_FD_ONE_MIN_REG_OFFSET ( 0x94 )
|
||||
|
||||
#define SDFM_CFG_HIGH_THR_CH2_WRITE_VAL_OFFSET ( 0xC4 )
|
||||
#define SDFM_CFG_HIGH_THR_CH2_SET_VAL_ADDR_OFFSET ( 0xC8 )
|
||||
#define SDFM_CFG_HIGH_THR_CH2_CLR_VAL_ADDR_OFFSET ( 0xCC )
|
||||
#define SDFM_CFG_LOW_THR_CH2_WRITE_VAL_OFFSET ( 0xD0 )
|
||||
#define SDFM_CFG_LOW_THR_CH2_SET_VAL_ADDR_OFFSET ( 0xD4 )
|
||||
#define SDFM_CFG_LOW_THR_CH2_CLR_VAL_ADDR_OFFSET ( 0xD8 )
|
||||
|
||||
#define SDFM_CFG_CH2_CLOCK_SOURCE_OFFSET ( 0x98 )
|
||||
#define SDFM_CFG_CH2_CLOCK_INVERSION_OFFSET ( 0x9C )
|
||||
|
||||
#define SDFM_CFG_ZC_THR_CH2_WRITE_VAL_OFFSET ( 0xA0 )
|
||||
#define SDFM_CFG_ZC_THR_CH2_SET_VAL_ADDR_OFFSET ( 0xA4 )
|
||||
#define SDFM_CFG_ZC_THR_CH2_CLR_VAL_ADDR_OFFSET ( 0xA8 )
|
||||
|
||||
|
||||
/*Sample timing offset*/
|
||||
#define SDFM_CFG_EN_CONT_NC_MODE ( 0xE8 )
|
||||
#define SDFM_CFG_EN_DOUBLE_UPDATE ( 0xEA )
|
||||
#define FW_REG_SDFM_CFG_FIRST_TRIG_SAMPLE_TIME ( 0xEC )
|
||||
#define FW_REG_SDFM_CFG_SECOND_TRIG_SAMPLE_TIME ( 0xF0 )
|
||||
#define SDFM_CFG_NC_PRD_IEP_CNT_OFFSET ( 0xF4)
|
||||
#define SDFM_CFG_EN_CONT_NC_MODE ( 0xAC )
|
||||
#define SDFM_CFG_EN_DOUBLE_UPDATE ( 0xAD )
|
||||
#define FW_REG_SDFM_CFG_FIRST_TRIG_SAMPLE_TIME ( 0xB0 )
|
||||
#define FW_REG_SDFM_CFG_SECOND_TRIG_SAMPLE_TIME ( 0xB4 )
|
||||
#define SDFM_CFG_NC_PRD_IEP_CNT_OFFSET ( 0xB8)
|
||||
|
||||
/* Output sample buffer base address offset*/
|
||||
#define SDFM_CFG_OUT_SAMP_BUF_BASE_ADD_OFFSET ( 0xF8 )
|
||||
#define SDFM_CFG_OUT_SAMP_BUF_BASE_ADD_OFFSET ( 0xBC )
|
||||
|
||||
/*Firmware version offset*/
|
||||
#define SDFM_FIRMWARE_VERSION_OFFSET (0xFC)
|
||||
#define SDFM_FIRMWARE_VERSION_OFFSET (0xC0)
|
||||
|
||||
/*Local store offset for Phase delay: 2 byte */
|
||||
#define SDFM_CFG_DELAY_STORE_OFFSET ( 0x110 )
|
||||
/*Zero cross local storage*/
|
||||
#define SDFM_CFG_BF_SD_CH0_ZC_START_OFFSET (0xC8)
|
||||
#define SDFM_CFG_BF_SD_CH1_ZC_START_OFFSET (0xC9)
|
||||
#define SDFM_CFG_BF_SD_CH2_ZC_START_OFFSET (0xCA)
|
||||
|
||||
#define SDFM_CFG_ZC_CH0_PREV_VAL_OFFSET ( 0xCC)
|
||||
#define SDFM_CFG_ZC_CH1_PREV_VAL_OFFSET ( 0xD0)
|
||||
#define SDFM_CFG_ZC_CH2_PREV_VAL_OFFSET ( 0xD4)
|
||||
|
||||
/*Phase delay offset */
|
||||
/*Local output sample buffer offset */
|
||||
#define SDFM_LOCAL_OUTPUT_SAMPLE_BUFFER_OFFSET (0x104)
|
||||
#define SDFM_LOCAL_OUTPUT_SAMPLE_BUFFER_OFFSET (0x118)
|
||||
/*Debug */
|
||||
#define SDFM_DUBUG_OFFSET ( 0x10F )
|
||||
#define SDFM_DUBUG_OFFSET ( 0x124 )
|
||||
|
||||
/*Output sample offset*/
|
||||
#define SDFM_CFG_OUT_SAMP_BUF_OFFSET (0x00)
|
||||
|
||||
@ -123,13 +123,13 @@ SDFM_ENTRY:
|
||||
|
||||
|
||||
PHASE_DELAY_CAL:
|
||||
;check phase delay measurment active
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1
|
||||
QBBC SKIP_PHASE_DELAY_CAL, TEMP_REG0.b0, 0
|
||||
JAL RET_ADDR_REG, SDFM_CLOCK_PHASE_COMPENSATION
|
||||
;acknowledge
|
||||
CLR TEMP_REG0, TEMP_REG0, 0
|
||||
SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1
|
||||
;check phase delay measurment active
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1
|
||||
QBBC SKIP_PHASE_DELAY_CAL, TEMP_REG0.b0, 0
|
||||
JAL RET_ADDR_REG, SDFM_CLOCK_PHASE_COMPENSATION
|
||||
;acknowledge
|
||||
CLR TEMP_REG0, TEMP_REG0, 0
|
||||
SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1
|
||||
SKIP_PHASE_DELAY_CAL:
|
||||
|
||||
|
||||
@ -138,6 +138,9 @@ SKIP_PHASE_DELAY_CAL:
|
||||
; If SDFM global enable not set, wait for SDFM global enable from R5.
|
||||
;
|
||||
CHECK_SDFM_EN:
|
||||
;check phase delay measurment active
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1
|
||||
QBBS PHASE_DELAY_CAL, TEMP_REG0.b0, 0
|
||||
; Check SDFM global enable
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_EN_OFFSET, SDFM_EN_SZ
|
||||
QBBC CHECK_SDFM_EN, TEMP_REG0.b0, 0 ; If SDFM_EN not set, wait to set sdfm enable
|
||||
@ -232,7 +235,19 @@ INIT_SDFM_CONT:
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_EN_CONT_NC_MODE,1
|
||||
LSL TEMP_REG0.b0, TEMP_REG0.b0,1
|
||||
OR EN_DOUBLE_UPDATE, EN_DOUBLE_UPDATE, TEMP_REG0.b0
|
||||
LDI SAMP_NAME, 0
|
||||
LDI SAMP_NAME, 0
|
||||
|
||||
;Zero cross resgiter
|
||||
LDI TEMP_REG0, 0
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_EN_CH0_OFFSET, 1
|
||||
OR TEMP_REG0.w2, TEMP_REG0.w2, TEMP_REG0.w0
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_EN_CH1_OFFSET, 1
|
||||
LSL TEMP_REG0.b0, TEMP_REG0.b0, 1
|
||||
OR TEMP_REG0.w2, TEMP_REG0.w2, TEMP_REG0.w0
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_EN_CH2_OFFSET, 1
|
||||
LSL TEMP_REG0.b0, TEMP_REG0.b0, 2
|
||||
OR TEMP_REG0.w2, TEMP_REG0.w2, TEMP_REG0.w0
|
||||
MOV ZERO_CROSS_EN, TEMP_REG0.w2
|
||||
|
||||
.if $isdefed("SDFM_PRU_CORE")
|
||||
; Start IEP
|
||||
@ -322,7 +337,53 @@ OVER_CURRENT_LOW_THRESHOLD_CH0:
|
||||
LDI TEMP_REG0.b0, 1
|
||||
SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_OC_LOW_THR_STATUS_CH0_OFFSET, 1
|
||||
END_OVER_CURRENT_DETECTION_CH0:
|
||||
|
||||
|
||||
;zero cross for ch0
|
||||
QBBC SKIP_ZERO_CROSS_CH0, ZERO_CROSS_EN, SDFM_CFG_BF_SD_CH0_ZC_EN_BIT
|
||||
;Load the zero cross threshold value for current channel & store in OC_HIGH_THR register
|
||||
LBBO &OC_HIGH_THR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_OFFSET, 4
|
||||
;Check if this is the first time after zero crossing is enabled
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH0_ZC_START_OFFSET, 1
|
||||
;If this is the first time, simply store the current value in DMEM and skip the comparison
|
||||
QBBS ZERO_CROSS_STARTED_CH0, TEMP_REG0.b0, 0
|
||||
SET TEMP_REG0.t0
|
||||
SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH0_ZC_START_OFFSET, 1
|
||||
SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH0_PREV_VAL_OFFSET, 4
|
||||
QBA SKIP_ZERO_CROSS_CH0
|
||||
ZERO_CROSS_STARTED_CH0:
|
||||
;Load the previous value for zero cross comparison
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH0_PREV_VAL_OFFSET, 4
|
||||
;Store the current value in DMEM for the next zero cross comparison
|
||||
SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH0_PREV_VAL_OFFSET, 4
|
||||
;Check if the previous sample value is greater than zero crossing threshold
|
||||
;If that is the case, check if the current sample value is smaller than the zero cross threshold
|
||||
QBGE CHECK_FOR_BELOW_THRESHOLD_CH0, OC_HIGH_THR, TEMP_REG0
|
||||
;Check if the sample value is greater than the zero crossing threshold
|
||||
QBGE OVER_ZC_THRESHOLD_CH0, OC_HIGH_THR, TEMP_REG2
|
||||
QBA SKIP_ZERO_CROSS_CH0
|
||||
CHECK_FOR_BELOW_THRESHOLD_CH0:
|
||||
;Check if the sample value is lower than the zero crossing threshold
|
||||
QBLE BELOW_ZC_THRESHOLD_CH0, OC_HIGH_THR, TEMP_REG2
|
||||
QBA SKIP_ZERO_CROSS_CH0
|
||||
OVER_ZC_THRESHOLD_CH0:
|
||||
;Set the ZC trip status as high
|
||||
LDI TEMP_REG0, 1
|
||||
SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH0_OFFSET, 1
|
||||
;Set the associated GPIO pin as high
|
||||
LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_SET_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ
|
||||
QBA SKIP_ZERO_CROSS_CH0
|
||||
BELOW_ZC_THRESHOLD_CH0:
|
||||
;Set the ZC trip status as low
|
||||
LDI TEMP_REG0.b0, 0
|
||||
SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH0_OFFSET, 1
|
||||
;Set the associated GPIO pin as low
|
||||
LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SKIP_ZERO_CROSS_CH0:
|
||||
|
||||
.if $isdefed("DEBUG_CODE")
|
||||
;For the current channel, compare against the High threshold, Low threshold and ZC thresholds (if enabled)
|
||||
;Load the positive threshold value for current channel
|
||||
@ -442,6 +503,52 @@ OVER_CURRENT_LOW_THRESHOLD_CH1:
|
||||
END_OVER_CURRENT_DETECTION_CH1:
|
||||
|
||||
|
||||
;zero cross for ch0
|
||||
QBBC SKIP_ZERO_CROSS_CH1, ZERO_CROSS_EN, SDFM_CFG_BF_SD_CH1_ZC_EN_BIT
|
||||
;Load the zero cross threshold value for current channel & store in OC_HIGH_THR register
|
||||
LBBO &OC_HIGH_THR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_OFFSET, 4
|
||||
;Check if this is the first time after zero crossing is enabled
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH1_ZC_START_OFFSET, 1
|
||||
;If this is the first time, simply store the current value in DMEM and skip the comparison
|
||||
QBBS ZERO_CROSS_STARTED_CH1, TEMP_REG0.b0, 0
|
||||
SET TEMP_REG0.t0
|
||||
SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH1_ZC_START_OFFSET, 1
|
||||
SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH1_PREV_VAL_OFFSET, 4
|
||||
QBA SKIP_ZERO_CROSS_CH1
|
||||
ZERO_CROSS_STARTED_CH1:
|
||||
;Load the previous value for zero cross comparison
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH1_PREV_VAL_OFFSET, 4
|
||||
;Store the current value in DMEM for the next zero cross comparison
|
||||
SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH1_PREV_VAL_OFFSET, 4
|
||||
;Check if the previous sample value is greater than zero crossing threshold
|
||||
;If that is the case, check if the current sample value is smaller than the zero cross threshold
|
||||
QBGE CHECK_FOR_BELOW_THRESHOLD_CH1, OC_HIGH_THR, TEMP_REG0
|
||||
;Check if the sample value is greater than the zero crossing threshold
|
||||
QBGE OVER_ZC_THRESHOLD_CH1, OC_HIGH_THR, TEMP_REG2
|
||||
QBA SKIP_ZERO_CROSS_CH1
|
||||
CHECK_FOR_BELOW_THRESHOLD_CH1:
|
||||
;Check if the sample value is lower than the zero crossing threshold
|
||||
QBLE BELOW_ZC_THRESHOLD_CH1, OC_HIGH_THR, TEMP_REG2
|
||||
QBA SKIP_ZERO_CROSS_CH1
|
||||
OVER_ZC_THRESHOLD_CH1:
|
||||
;Set the ZC trip status as high
|
||||
LDI TEMP_REG0, 1
|
||||
SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH1_OFFSET, 1
|
||||
;Set the associated GPIO pin as high
|
||||
LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_SET_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ
|
||||
QBA SKIP_ZERO_CROSS_CH1
|
||||
BELOW_ZC_THRESHOLD_CH1:
|
||||
;Set the ZC trip status as low
|
||||
LDI TEMP_REG0.b0, 0
|
||||
SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH1_OFFSET, 1
|
||||
;Set the associated GPIO pin as low
|
||||
LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SKIP_ZERO_CROSS_CH1:
|
||||
|
||||
.if $isdefed("DEBUG_CODE")
|
||||
;For the current channel, compare against the High threshold, Low threshold and ZC thresholds (if enabled)
|
||||
;Load the positive threshold value for current channel
|
||||
@ -483,6 +590,7 @@ BELOW_THRESHOLD_START_CH1:
|
||||
|
||||
COMP_CH1_END:
|
||||
|
||||
|
||||
.if $isdefed("DEBUG_CODE")
|
||||
;GPIO LOW
|
||||
LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_HIGH_THR_CH1_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_CLR_ADDR_SZ
|
||||
@ -601,6 +709,52 @@ BELOW_THRESHOLD_START_CH2:
|
||||
|
||||
COMP_CH2_END:
|
||||
|
||||
;zero cross for ch0
|
||||
QBBC SKIP_ZERO_CROSS_CH2, ZERO_CROSS_EN, SDFM_CFG_BF_SD_CH2_ZC_EN_BIT
|
||||
;Load the zero cross threshold value for current channel & store in OC_HIGH_THR register
|
||||
LBBO &OC_HIGH_THR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_OFFSET, 4
|
||||
;Check if this is the first time after zero crossing is enabled
|
||||
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH2_ZC_START_OFFSET, 1
|
||||
;If this is the first time, simply store the current value in DMEM and skip the comparison
|
||||
QBBS ZERO_CROSS_STARTED_CH2, TEMP_REG0.b0, 0
|
||||
SET TEMP_REG0.t0
|
||||
SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH2_ZC_START_OFFSET, 1
|
||||
SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH2_PREV_VAL_OFFSET, 4
|
||||
QBA SKIP_ZERO_CROSS_CH2
|
||||
ZERO_CROSS_STARTED_CH2:
|
||||
;Load the previous value for zero cross comparison
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH2_PREV_VAL_OFFSET, 4
|
||||
;Store the current value in DMEM for the next zero cross comparison
|
||||
SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH2_PREV_VAL_OFFSET, 4
|
||||
;Check if the previous sample value is greater than zero crossing threshold
|
||||
;If that is the case, check if the current sample value is smaller than the zero cross threshold
|
||||
QBGE CHECK_FOR_BELOW_THRESHOLD_CH2, OC_HIGH_THR, TEMP_REG0
|
||||
;Check if the sample value is greater than the zero crossing threshold
|
||||
QBGE OVER_ZC_THRESHOLD_CH2, OC_HIGH_THR, TEMP_REG2
|
||||
QBA SKIP_ZERO_CROSS_CH2
|
||||
CHECK_FOR_BELOW_THRESHOLD_CH2:
|
||||
;Check if the sample value is lower than the zero crossing threshold
|
||||
QBLE BELOW_ZC_THRESHOLD_CH2, OC_HIGH_THR, TEMP_REG2
|
||||
QBA SKIP_ZERO_CROSS_CH2
|
||||
OVER_ZC_THRESHOLD_CH2:
|
||||
;Set the ZC trip status as high
|
||||
LDI TEMP_REG0, 1
|
||||
SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH2_OFFSET, 1
|
||||
;Set the associated GPIO pin as high
|
||||
LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_SET_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ
|
||||
QBA SKIP_ZERO_CROSS_CH2
|
||||
BELOW_ZC_THRESHOLD_CH2:
|
||||
;Set the ZC trip status as low
|
||||
LDI TEMP_REG0.b0, 0
|
||||
SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH2_OFFSET, 1
|
||||
;Set the associated GPIO pin as low
|
||||
LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ
|
||||
LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ
|
||||
SKIP_ZERO_CROSS_CH2:
|
||||
|
||||
.if $isdefed("DEBUG_CODE")
|
||||
; GPIO LOW
|
||||
LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_HIGH_THR_CH2_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_CLR_ADDR_SZ
|
||||
|
||||
@ -1,11 +1,64 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (c) 2023, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x2effbd80,
|
||||
0x240000f7,
|
||||
0x240000c1,
|
||||
0x24020981,
|
||||
0x240100c2,
|
||||
0x240101c2,
|
||||
0x24000082,
|
||||
0xe1fc7781,
|
||||
0xe1c07781,
|
||||
0x32000000,
|
||||
0x240fff81,
|
||||
0x81000a81,
|
||||
@ -17,19 +70,21 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x10000000,
|
||||
0xf1171701,
|
||||
0xc9000104,
|
||||
0x2301d299,
|
||||
0x23022c99,
|
||||
0x1d00e1e1,
|
||||
0xe1171701,
|
||||
0xf1171701,
|
||||
0xd70001fa,
|
||||
0xf1001701,
|
||||
0xcf0001ff,
|
||||
0xcf0001fd,
|
||||
0x1f00e1e1,
|
||||
0xe1011701,
|
||||
0x91340401,
|
||||
0x1f01e1e1,
|
||||
0x81340401,
|
||||
0x23011999,
|
||||
0x23017399,
|
||||
0x32800000,
|
||||
0x23012099,
|
||||
0x23017a99,
|
||||
0x240c00c2,
|
||||
0x24000082,
|
||||
0xf1021701,
|
||||
@ -53,36 +108,46 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x0b04e1e1,
|
||||
0x110fe1e2,
|
||||
0x10020256,
|
||||
0x23013a99,
|
||||
0x23026799,
|
||||
0x23013e99,
|
||||
0x23016e99,
|
||||
0x2301b399,
|
||||
0x23019499,
|
||||
0x2302c199,
|
||||
0x23019899,
|
||||
0x2301c899,
|
||||
0x23020d99,
|
||||
0x1f19fefe,
|
||||
0x2301bc99,
|
||||
0x23021699,
|
||||
0x240fffd5,
|
||||
0x24ffff95,
|
||||
0x240000d4,
|
||||
0x24010494,
|
||||
0x24011894,
|
||||
0x2400001c,
|
||||
0xf1ea177c,
|
||||
0xf1e81701,
|
||||
0xf1ad177c,
|
||||
0xf1ac1701,
|
||||
0x09010101,
|
||||
0x12017c7c,
|
||||
0x2400003c,
|
||||
0x240000e1,
|
||||
0xf12a1701,
|
||||
0x1281c1c1,
|
||||
0xf15a1701,
|
||||
0x09010101,
|
||||
0x1281c1c1,
|
||||
0xf18a1701,
|
||||
0x09020101,
|
||||
0x1281c1c1,
|
||||
0x10c1c1da,
|
||||
0x91001a01,
|
||||
0x1f00e1e1,
|
||||
0x81001a01,
|
||||
0xf114179a,
|
||||
0xd1009a02,
|
||||
0x21004c00,
|
||||
0xc9019a25,
|
||||
0x21005800,
|
||||
0xc9019a3f,
|
||||
0x10161602,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xc91cff1f,
|
||||
0xc91cff39,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5e9e6,
|
||||
@ -103,23 +168,49 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe1291701,
|
||||
0x21007200,
|
||||
0x21007e00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1281701,
|
||||
0x21007200,
|
||||
0x21007e00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1291701,
|
||||
0xc9029a25,
|
||||
0xc900da1a,
|
||||
0xf12c3793,
|
||||
0xf1c81701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1c81701,
|
||||
0xe1cc3783,
|
||||
0x79000013,
|
||||
0xf1cc3781,
|
||||
0xe1cc3783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe12b1701,
|
||||
0xf144379d,
|
||||
0xf1403781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe12b1701,
|
||||
0xf148379d,
|
||||
0xf1403781,
|
||||
0xe1003d81,
|
||||
0xc9029a3f,
|
||||
0x10363602,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xc91cff1f,
|
||||
0xc91cff39,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5ece6,
|
||||
@ -130,33 +221,59 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x10e7e7ee,
|
||||
0x10f5e8e8,
|
||||
0x10e8e8e3,
|
||||
0xf1643793,
|
||||
0xf168379b,
|
||||
0xf1503793,
|
||||
0xf154379b,
|
||||
0x240130e2,
|
||||
0x90e22481,
|
||||
0x70e3f307,
|
||||
0x24000001,
|
||||
0xe16c1701,
|
||||
0xe1581701,
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe16d1701,
|
||||
0x21009700,
|
||||
0xe1591701,
|
||||
0x2100bd00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe16c1701,
|
||||
0x21009700,
|
||||
0xe1581701,
|
||||
0x2100bd00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe16d1701,
|
||||
0xe1591701,
|
||||
0xc901da1a,
|
||||
0xf15c3793,
|
||||
0xf1c91701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1c91701,
|
||||
0xe1d03783,
|
||||
0x79000013,
|
||||
0xf1d03781,
|
||||
0xe1d03783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe15b1701,
|
||||
0xf174379d,
|
||||
0xf1703781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe15b1701,
|
||||
0xf178379d,
|
||||
0xf1703781,
|
||||
0xe1003d81,
|
||||
0xc9039a25,
|
||||
0x10565682,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xcf1cffb0,
|
||||
0xcf1cff7c,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5efe6,
|
||||
@ -167,27 +284,53 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x10e7e7f1,
|
||||
0x10f5e8e8,
|
||||
0x10e8e8e3,
|
||||
0xf1a83793,
|
||||
0xf1ac379b,
|
||||
0xf1803793,
|
||||
0xf184379b,
|
||||
0x240130e2,
|
||||
0x90e22481,
|
||||
0x70e3f307,
|
||||
0x24000001,
|
||||
0xe1b01701,
|
||||
0xe1881701,
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe1b11701,
|
||||
0x2100bc00,
|
||||
0xe1891701,
|
||||
0x2100fc00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1b01701,
|
||||
0x2100bc00,
|
||||
0xe1881701,
|
||||
0x2100fc00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1b11701,
|
||||
0x7f000091,
|
||||
0xe1891701,
|
||||
0xc902da1a,
|
||||
0xf18c3793,
|
||||
0xf1ca1701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1ca1701,
|
||||
0xe1d43783,
|
||||
0x79000013,
|
||||
0xf1d43781,
|
||||
0xe1d43783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe18b1701,
|
||||
0xf1a4379d,
|
||||
0xf1a03781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe18b1701,
|
||||
0xf1a8379d,
|
||||
0xf1a03781,
|
||||
0xe1003d81,
|
||||
0x7f000043,
|
||||
0x24000000,
|
||||
0x107e7e12,
|
||||
0x2f852381,
|
||||
@ -240,19 +383,19 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x0108f4e1,
|
||||
0xe0e13788,
|
||||
0xc9017c0c,
|
||||
0xf1f43781,
|
||||
0xf1b83781,
|
||||
0x91983a82,
|
||||
0x00e1e2e1,
|
||||
0x240000e2,
|
||||
0xf1083782,
|
||||
0x58e2e103,
|
||||
0x81983a81,
|
||||
0x2100fb00,
|
||||
0x21015500,
|
||||
0x04e2e1e1,
|
||||
0x81983a81,
|
||||
0x21010e00,
|
||||
0x21016800,
|
||||
0x59031c07,
|
||||
0xf1f43781,
|
||||
0xf1b83781,
|
||||
0x91983a82,
|
||||
0x00e1e2e1,
|
||||
0x81983a81,
|
||||
@ -260,18 +403,18 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x79000011,
|
||||
0xd1003c07,
|
||||
0xc9007c06,
|
||||
0xf1f03781,
|
||||
0xf1b43781,
|
||||
0x0501e1e1,
|
||||
0x81983a81,
|
||||
0x2400013c,
|
||||
0x79000005,
|
||||
0xf1ec3781,
|
||||
0xf1b03781,
|
||||
0x0501e1e1,
|
||||
0x81983a81,
|
||||
0x2400003c,
|
||||
0x2400001c,
|
||||
0xf0f4b784,
|
||||
0xf1f83781,
|
||||
0xf1bc3781,
|
||||
0xe100a184,
|
||||
0x2400259f,
|
||||
0x24000000,
|
||||
@ -282,7 +425,7 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x10000000,
|
||||
0x24000b01,
|
||||
0x81000a01,
|
||||
0x2400bd81,
|
||||
0x24011781,
|
||||
0x810c0a81,
|
||||
0x24140081,
|
||||
0x81380a81,
|
||||
@ -304,7 +447,7 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x81080801,
|
||||
0x240000e1,
|
||||
0x819c3a81,
|
||||
0xf1ec3781,
|
||||
0xf1b03781,
|
||||
0x24ffffe2,
|
||||
0x10e1e2e1,
|
||||
0x0501e1e1,
|
||||
@ -325,35 +468,35 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x6816030d,
|
||||
0xf11e1701,
|
||||
0xc9000424,
|
||||
0xf12c1733,
|
||||
0xf1301773,
|
||||
0xf12f1753,
|
||||
0xf1301733,
|
||||
0xf1341773,
|
||||
0xf1331753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
0x09015341,
|
||||
0x13414141,
|
||||
0x13804141,
|
||||
0x21016900,
|
||||
0x2101c300,
|
||||
0x6836030d,
|
||||
0xf1621701,
|
||||
0xf14e1701,
|
||||
0xc9010417,
|
||||
0xf1701733,
|
||||
0xf1741773,
|
||||
0xf1731753,
|
||||
0xf1601733,
|
||||
0xf1641773,
|
||||
0xf1631753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
0x09015341,
|
||||
0x13414141,
|
||||
0x13804141,
|
||||
0x21016900,
|
||||
0x2101c300,
|
||||
0x6856030c,
|
||||
0xf1a61701,
|
||||
0xf17e1701,
|
||||
0xc902040a,
|
||||
0xf1b41733,
|
||||
0xf1b81773,
|
||||
0xf1b71753,
|
||||
0xf1901733,
|
||||
0xf1941773,
|
||||
0xf1931753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
@ -372,10 +515,10 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x110f0203,
|
||||
0x68160314,
|
||||
0x24000081,
|
||||
0xf1381741,
|
||||
0xf13c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1341741,
|
||||
0xf1381741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
@ -384,48 +527,48 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc900042e,
|
||||
0xf12e173b,
|
||||
0xf12d171b,
|
||||
0xf132173b,
|
||||
0xf131171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
0x2101ae00,
|
||||
0x21020800,
|
||||
0x68360314,
|
||||
0x24000081,
|
||||
0xf17c1741,
|
||||
0xf16c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1781741,
|
||||
0xf1681741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
0xf1611741,
|
||||
0xf14d1741,
|
||||
0x09044141,
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc901041a,
|
||||
0xf172173b,
|
||||
0xf171171b,
|
||||
0xf162173b,
|
||||
0xf161171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
0x2101ae00,
|
||||
0x21020800,
|
||||
0x68560313,
|
||||
0x24000081,
|
||||
0xf1c01741,
|
||||
0xf19c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1bc1741,
|
||||
0xf1981741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
0xf1a51741,
|
||||
0xf17d1741,
|
||||
0x09044141,
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc9020406,
|
||||
0xf1b6173b,
|
||||
0xf1b5171b,
|
||||
0xf192173b,
|
||||
0xf191171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
@ -494,53 +637,53 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0xd1005f2e,
|
||||
0x01018282,
|
||||
0x1b01e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01028282,
|
||||
0x1b02e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01038282,
|
||||
0x1b03e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01048282,
|
||||
0x1b04e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01058282,
|
||||
0x1b05e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01068282,
|
||||
0x1b06e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01078282,
|
||||
0x1b07e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01088282,
|
||||
0x1b08e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01098282,
|
||||
0x1b09e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010a8282,
|
||||
0x1b0ae3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010b8282,
|
||||
0x1b0be3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010c8282,
|
||||
0x1b0ce3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010d8282,
|
||||
0x1b0de3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010e8282,
|
||||
0x1b0ee3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010f8282,
|
||||
0x1b0fe3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01108282,
|
||||
0x1b10e3e3,
|
||||
0x24000042,
|
||||
0x21026200,
|
||||
0x2102bc00,
|
||||
0x240000e2,
|
||||
0x31070043,
|
||||
0xd1011f00,
|
||||
@ -563,49 +706,49 @@ const uint32_t SDFM_PRU0_image_0[] = {
|
||||
0xc9005f2e,
|
||||
0x01018282,
|
||||
0x1b01e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01028282,
|
||||
0x1b02e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01038282,
|
||||
0x1b03e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01048282,
|
||||
0x1b04e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01058282,
|
||||
0x1b05e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01068282,
|
||||
0x1b06e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01078282,
|
||||
0x1b07e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01088282,
|
||||
0x1b08e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01098282,
|
||||
0x1b09e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010a8282,
|
||||
0x1b0ae3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010b8282,
|
||||
0x1b0be3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010c8282,
|
||||
0x1b0ce3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010d8282,
|
||||
0x1b0de3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010e8282,
|
||||
0x1b0ee3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010f8282,
|
||||
0x1b0fe3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01108282,
|
||||
0x1b10e3e3,
|
||||
0x24000142,
|
||||
|
||||
@ -1,11 +1,64 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (c) 2023, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x2effbd80,
|
||||
0x240000f7,
|
||||
0x240000c1,
|
||||
0x24020981,
|
||||
0x240100c2,
|
||||
0x240101c2,
|
||||
0x24000082,
|
||||
0xe1fc7781,
|
||||
0xe1c07781,
|
||||
0x32000000,
|
||||
0x240fff81,
|
||||
0x81000a81,
|
||||
@ -17,19 +70,21 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x10000000,
|
||||
0xf1171701,
|
||||
0xc9000104,
|
||||
0x2301d299,
|
||||
0x23022c99,
|
||||
0x1d00e1e1,
|
||||
0xe1171701,
|
||||
0xf1171701,
|
||||
0xd70001fa,
|
||||
0xf1001701,
|
||||
0xcf0001ff,
|
||||
0xcf0001fd,
|
||||
0x1f00e1e1,
|
||||
0xe1011701,
|
||||
0x91340401,
|
||||
0x1f01e1e1,
|
||||
0x81340401,
|
||||
0x23011999,
|
||||
0x23017399,
|
||||
0x32800000,
|
||||
0x23012099,
|
||||
0x23017a99,
|
||||
0x240c00c2,
|
||||
0x24000082,
|
||||
0xf1021701,
|
||||
@ -53,36 +108,46 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x0b04e1e1,
|
||||
0x110fe1e2,
|
||||
0x10020256,
|
||||
0x23013a99,
|
||||
0x23026799,
|
||||
0x23013e99,
|
||||
0x23016e99,
|
||||
0x2301b399,
|
||||
0x23019499,
|
||||
0x2302c199,
|
||||
0x23019899,
|
||||
0x2301c899,
|
||||
0x23020d99,
|
||||
0x1f19fefe,
|
||||
0x2301bc99,
|
||||
0x23021699,
|
||||
0x240fffd5,
|
||||
0x24ffff95,
|
||||
0x240000d4,
|
||||
0x24010494,
|
||||
0x24011894,
|
||||
0x2400001c,
|
||||
0xf1ea177c,
|
||||
0xf1e81701,
|
||||
0xf1ad177c,
|
||||
0xf1ac1701,
|
||||
0x09010101,
|
||||
0x12017c7c,
|
||||
0x2400003c,
|
||||
0x240000e1,
|
||||
0xf12a1701,
|
||||
0x1281c1c1,
|
||||
0xf15a1701,
|
||||
0x09010101,
|
||||
0x1281c1c1,
|
||||
0xf18a1701,
|
||||
0x09020101,
|
||||
0x1281c1c1,
|
||||
0x10c1c1da,
|
||||
0x91001a01,
|
||||
0x1f00e1e1,
|
||||
0x81001a01,
|
||||
0xf114179a,
|
||||
0xd1009a02,
|
||||
0x21004c00,
|
||||
0xc9019a25,
|
||||
0x21005800,
|
||||
0xc9019a3f,
|
||||
0x10161602,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xc91cff1f,
|
||||
0xc91cff39,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5e9e6,
|
||||
@ -103,23 +168,49 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe1291701,
|
||||
0x21007200,
|
||||
0x21007e00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1281701,
|
||||
0x21007200,
|
||||
0x21007e00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1291701,
|
||||
0xc9029a25,
|
||||
0xc900da1a,
|
||||
0xf12c3793,
|
||||
0xf1c81701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1c81701,
|
||||
0xe1cc3783,
|
||||
0x79000013,
|
||||
0xf1cc3781,
|
||||
0xe1cc3783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe12b1701,
|
||||
0xf144379d,
|
||||
0xf1403781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe12b1701,
|
||||
0xf148379d,
|
||||
0xf1403781,
|
||||
0xe1003d81,
|
||||
0xc9029a3f,
|
||||
0x10363602,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xc91cff1f,
|
||||
0xc91cff39,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5ece6,
|
||||
@ -130,33 +221,59 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x10e7e7ee,
|
||||
0x10f5e8e8,
|
||||
0x10e8e8e3,
|
||||
0xf1643793,
|
||||
0xf168379b,
|
||||
0xf1503793,
|
||||
0xf154379b,
|
||||
0x240134e2,
|
||||
0x90e22481,
|
||||
0x70e3f307,
|
||||
0x24000001,
|
||||
0xe16c1701,
|
||||
0xe1581701,
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe16d1701,
|
||||
0x21009700,
|
||||
0xe1591701,
|
||||
0x2100bd00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe16c1701,
|
||||
0x21009700,
|
||||
0xe1581701,
|
||||
0x2100bd00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe16d1701,
|
||||
0xe1591701,
|
||||
0xc901da1a,
|
||||
0xf15c3793,
|
||||
0xf1c91701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1c91701,
|
||||
0xe1d03783,
|
||||
0x79000013,
|
||||
0xf1d03781,
|
||||
0xe1d03783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe15b1701,
|
||||
0xf174379d,
|
||||
0xf1703781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe15b1701,
|
||||
0xf178379d,
|
||||
0xf1703781,
|
||||
0xe1003d81,
|
||||
0xc9039a25,
|
||||
0x10565682,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xcf1cffb0,
|
||||
0xcf1cff7c,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5efe6,
|
||||
@ -167,27 +284,53 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x10e7e7f1,
|
||||
0x10f5e8e8,
|
||||
0x10e8e8e3,
|
||||
0xf1a83793,
|
||||
0xf1ac379b,
|
||||
0xf1803793,
|
||||
0xf184379b,
|
||||
0x240134e2,
|
||||
0x90e22481,
|
||||
0x70e3f307,
|
||||
0x24000001,
|
||||
0xe1b01701,
|
||||
0xe1881701,
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe1b11701,
|
||||
0x2100bc00,
|
||||
0xe1891701,
|
||||
0x2100fc00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1b01701,
|
||||
0x2100bc00,
|
||||
0xe1881701,
|
||||
0x2100fc00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1b11701,
|
||||
0x7f000091,
|
||||
0xe1891701,
|
||||
0xc902da1a,
|
||||
0xf18c3793,
|
||||
0xf1ca1701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1ca1701,
|
||||
0xe1d43783,
|
||||
0x79000013,
|
||||
0xf1d43781,
|
||||
0xe1d43783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe18b1701,
|
||||
0xf1a4379d,
|
||||
0xf1a03781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe18b1701,
|
||||
0xf1a8379d,
|
||||
0xf1a03781,
|
||||
0xe1003d81,
|
||||
0x7f000043,
|
||||
0x24000000,
|
||||
0x107e7e12,
|
||||
0x2f852381,
|
||||
@ -240,19 +383,19 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x0108f4e1,
|
||||
0xe0e13788,
|
||||
0xc9017c0c,
|
||||
0xf1f43781,
|
||||
0xf1b83781,
|
||||
0x91983a82,
|
||||
0x00e1e2e1,
|
||||
0x240000e2,
|
||||
0xf1083782,
|
||||
0x58e2e103,
|
||||
0x81983a81,
|
||||
0x2100fb00,
|
||||
0x21015500,
|
||||
0x04e2e1e1,
|
||||
0x81983a81,
|
||||
0x21010e00,
|
||||
0x21016800,
|
||||
0x59031c07,
|
||||
0xf1f43781,
|
||||
0xf1b83781,
|
||||
0x91983a82,
|
||||
0x00e1e2e1,
|
||||
0x81983a81,
|
||||
@ -260,18 +403,18 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x79000011,
|
||||
0xd1003c07,
|
||||
0xc9007c06,
|
||||
0xf1f03781,
|
||||
0xf1b43781,
|
||||
0x0501e1e1,
|
||||
0x81983a81,
|
||||
0x2400013c,
|
||||
0x79000005,
|
||||
0xf1ec3781,
|
||||
0xf1b03781,
|
||||
0x0501e1e1,
|
||||
0x81983a81,
|
||||
0x2400003c,
|
||||
0x2400001c,
|
||||
0xf0f4b784,
|
||||
0xf1f83781,
|
||||
0xf1bc3781,
|
||||
0xe100a184,
|
||||
0x2400259f,
|
||||
0x24000000,
|
||||
@ -282,7 +425,7 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x10000000,
|
||||
0x24000b01,
|
||||
0x81000a01,
|
||||
0x2400bd81,
|
||||
0x24011781,
|
||||
0x810c0a81,
|
||||
0x24140081,
|
||||
0x81380a81,
|
||||
@ -304,7 +447,7 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x81080801,
|
||||
0x240000e1,
|
||||
0x819c3a81,
|
||||
0xf1ec3781,
|
||||
0xf1b03781,
|
||||
0x24ffffe2,
|
||||
0x10e1e2e1,
|
||||
0x0501e1e1,
|
||||
@ -325,35 +468,35 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x6816030d,
|
||||
0xf11e1701,
|
||||
0xc9000424,
|
||||
0xf12c1733,
|
||||
0xf1301773,
|
||||
0xf12f1753,
|
||||
0xf1301733,
|
||||
0xf1341773,
|
||||
0xf1331753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
0x09015341,
|
||||
0x13414141,
|
||||
0x13804141,
|
||||
0x21016900,
|
||||
0x2101c300,
|
||||
0x6836030d,
|
||||
0xf1621701,
|
||||
0xf14e1701,
|
||||
0xc9010417,
|
||||
0xf1701733,
|
||||
0xf1741773,
|
||||
0xf1731753,
|
||||
0xf1601733,
|
||||
0xf1641773,
|
||||
0xf1631753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
0x09015341,
|
||||
0x13414141,
|
||||
0x13804141,
|
||||
0x21016900,
|
||||
0x2101c300,
|
||||
0x6856030c,
|
||||
0xf1a61701,
|
||||
0xf17e1701,
|
||||
0xc902040a,
|
||||
0xf1b41733,
|
||||
0xf1b81773,
|
||||
0xf1b71753,
|
||||
0xf1901733,
|
||||
0xf1941773,
|
||||
0xf1931753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
@ -372,10 +515,10 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x110f0203,
|
||||
0x68160314,
|
||||
0x24000081,
|
||||
0xf1381741,
|
||||
0xf13c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1341741,
|
||||
0xf1381741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
@ -384,48 +527,48 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc900042e,
|
||||
0xf12e173b,
|
||||
0xf12d171b,
|
||||
0xf132173b,
|
||||
0xf131171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
0x2101ae00,
|
||||
0x21020800,
|
||||
0x68360314,
|
||||
0x24000081,
|
||||
0xf17c1741,
|
||||
0xf16c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1781741,
|
||||
0xf1681741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
0xf1611741,
|
||||
0xf14d1741,
|
||||
0x09044141,
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc901041a,
|
||||
0xf172173b,
|
||||
0xf171171b,
|
||||
0xf162173b,
|
||||
0xf161171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
0x2101ae00,
|
||||
0x21020800,
|
||||
0x68560313,
|
||||
0x24000081,
|
||||
0xf1c01741,
|
||||
0xf19c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1bc1741,
|
||||
0xf1981741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
0xf1a51741,
|
||||
0xf17d1741,
|
||||
0x09044141,
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc9020406,
|
||||
0xf1b6173b,
|
||||
0xf1b5171b,
|
||||
0xf192173b,
|
||||
0xf191171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
@ -494,53 +637,53 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0xd1005f2e,
|
||||
0x01018282,
|
||||
0x1b01e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01028282,
|
||||
0x1b02e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01038282,
|
||||
0x1b03e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01048282,
|
||||
0x1b04e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01058282,
|
||||
0x1b05e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01068282,
|
||||
0x1b06e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01078282,
|
||||
0x1b07e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01088282,
|
||||
0x1b08e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01098282,
|
||||
0x1b09e3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010a8282,
|
||||
0x1b0ae3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010b8282,
|
||||
0x1b0be3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010c8282,
|
||||
0x1b0ce3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010d8282,
|
||||
0x1b0de3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010e8282,
|
||||
0x1b0ee3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x010f8282,
|
||||
0x1b0fe3e3,
|
||||
0x21021c00,
|
||||
0x21027600,
|
||||
0x01108282,
|
||||
0x1b10e3e3,
|
||||
0x24000042,
|
||||
0x21026200,
|
||||
0x2102bc00,
|
||||
0x240000e2,
|
||||
0x31070043,
|
||||
0xd1011f00,
|
||||
@ -563,49 +706,49 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
|
||||
0xc9005f2e,
|
||||
0x01018282,
|
||||
0x1b01e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01028282,
|
||||
0x1b02e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01038282,
|
||||
0x1b03e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01048282,
|
||||
0x1b04e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01058282,
|
||||
0x1b05e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01068282,
|
||||
0x1b06e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01078282,
|
||||
0x1b07e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01088282,
|
||||
0x1b08e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01098282,
|
||||
0x1b09e3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010a8282,
|
||||
0x1b0ae3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010b8282,
|
||||
0x1b0be3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010c8282,
|
||||
0x1b0ce3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010d8282,
|
||||
0x1b0de3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010e8282,
|
||||
0x1b0ee3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x010f8282,
|
||||
0x1b0fe3e3,
|
||||
0x21026100,
|
||||
0x2102bb00,
|
||||
0x01108282,
|
||||
0x1b10e3e3,
|
||||
0x24000142,
|
||||
|
||||
@ -1,11 +1,64 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (c) 2023, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x2effbd80,
|
||||
0x240200f7,
|
||||
0x240000c1,
|
||||
0x24020981,
|
||||
0x240100c2,
|
||||
0x240101c2,
|
||||
0x24000082,
|
||||
0xe1fc7781,
|
||||
0xe1c07781,
|
||||
0x32000000,
|
||||
0x240fff81,
|
||||
0x81000a81,
|
||||
@ -17,17 +70,19 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x10000000,
|
||||
0xf1171701,
|
||||
0xc9000104,
|
||||
0x2301b099,
|
||||
0x23020a99,
|
||||
0x1d00e1e1,
|
||||
0xe1171701,
|
||||
0xf1171701,
|
||||
0xd70001fa,
|
||||
0xf1001701,
|
||||
0xcf0001ff,
|
||||
0xcf0001fd,
|
||||
0x1f00e1e1,
|
||||
0xe1011701,
|
||||
0x91340401,
|
||||
0x1f03e1e1,
|
||||
0x81340401,
|
||||
0x2300f799,
|
||||
0x23015199,
|
||||
0x32800000,
|
||||
0xf1021701,
|
||||
0x51010104,
|
||||
@ -45,32 +100,42 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x0b04e1e1,
|
||||
0x110fe1e2,
|
||||
0x10020256,
|
||||
0x23011899,
|
||||
0x23011c99,
|
||||
0x23014c99,
|
||||
0x23019199,
|
||||
0x23017299,
|
||||
0x23017699,
|
||||
0x2301a699,
|
||||
0x2301eb99,
|
||||
0x1f19fefe,
|
||||
0x23019a99,
|
||||
0x2301f499,
|
||||
0x240fffd5,
|
||||
0x24ffff95,
|
||||
0x240000d4,
|
||||
0x24010494,
|
||||
0x24011894,
|
||||
0x2400001c,
|
||||
0xf1ea177c,
|
||||
0xf1e81701,
|
||||
0xf1ad177c,
|
||||
0xf1ac1701,
|
||||
0x09010101,
|
||||
0x12017c7c,
|
||||
0x2400003c,
|
||||
0x240000e1,
|
||||
0xf12a1701,
|
||||
0x1281c1c1,
|
||||
0xf15a1701,
|
||||
0x09010101,
|
||||
0x1281c1c1,
|
||||
0xf18a1701,
|
||||
0x09020101,
|
||||
0x1281c1c1,
|
||||
0x10c1c1da,
|
||||
0xf114179a,
|
||||
0xd1009a02,
|
||||
0x21004000,
|
||||
0xc9019a25,
|
||||
0x21004c00,
|
||||
0xc9019a3f,
|
||||
0x10161602,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xc91cff1f,
|
||||
0xc91cff39,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5e9e6,
|
||||
@ -91,23 +156,49 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe1291701,
|
||||
0x21006600,
|
||||
0x21007200,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1281701,
|
||||
0x21006600,
|
||||
0x21007200,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1291701,
|
||||
0xc9029a25,
|
||||
0xc900da1a,
|
||||
0xf12c3793,
|
||||
0xf1c81701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1c81701,
|
||||
0xe1cc3783,
|
||||
0x79000013,
|
||||
0xf1cc3781,
|
||||
0xe1cc3783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe12b1701,
|
||||
0xf144379d,
|
||||
0xf1403781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe12b1701,
|
||||
0xf148379d,
|
||||
0xf1403781,
|
||||
0xe1003d81,
|
||||
0xc9029a3f,
|
||||
0x10363602,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xc91cff1f,
|
||||
0xc91cff39,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5ece6,
|
||||
@ -118,33 +209,59 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x10e7e7ee,
|
||||
0x10f5e8e8,
|
||||
0x10e8e8e3,
|
||||
0xf1643793,
|
||||
0xf168379b,
|
||||
0xf1503793,
|
||||
0xf154379b,
|
||||
0x240130e2,
|
||||
0x90e22481,
|
||||
0x70e3f307,
|
||||
0x24000001,
|
||||
0xe16c1701,
|
||||
0xe1581701,
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe16d1701,
|
||||
0x21008b00,
|
||||
0xe1591701,
|
||||
0x2100b100,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe16c1701,
|
||||
0x21008b00,
|
||||
0xe1581701,
|
||||
0x2100b100,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe16d1701,
|
||||
0xe1591701,
|
||||
0xc901da1a,
|
||||
0xf15c3793,
|
||||
0xf1c91701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1c91701,
|
||||
0xe1d03783,
|
||||
0x79000013,
|
||||
0xf1d03781,
|
||||
0xe1d03783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe15b1701,
|
||||
0xf174379d,
|
||||
0xf1703781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe15b1701,
|
||||
0xf178379d,
|
||||
0xf1703781,
|
||||
0xe1003d81,
|
||||
0xc9039a25,
|
||||
0x10565682,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xcf1cffb0,
|
||||
0xcf1cff7c,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5efe6,
|
||||
@ -155,27 +272,53 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x10e7e7f1,
|
||||
0x10f5e8e8,
|
||||
0x10e8e8e3,
|
||||
0xf1a83793,
|
||||
0xf1ac379b,
|
||||
0xf1803793,
|
||||
0xf184379b,
|
||||
0x240130e2,
|
||||
0x90e22481,
|
||||
0x70e3f307,
|
||||
0x24000001,
|
||||
0xe1b01701,
|
||||
0xe1881701,
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe1b11701,
|
||||
0x2100b000,
|
||||
0xe1891701,
|
||||
0x2100f000,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1b01701,
|
||||
0x2100b000,
|
||||
0xe1881701,
|
||||
0x2100f000,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1b11701,
|
||||
0x7f000091,
|
||||
0xe1891701,
|
||||
0xc902da1a,
|
||||
0xf18c3793,
|
||||
0xf1ca1701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1ca1701,
|
||||
0xe1d43783,
|
||||
0x79000013,
|
||||
0xf1d43781,
|
||||
0xe1d43783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe18b1701,
|
||||
0xf1a4379d,
|
||||
0xf1a03781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe18b1701,
|
||||
0xf1a8379d,
|
||||
0xf1a03781,
|
||||
0xe1003d81,
|
||||
0x7f000043,
|
||||
0x24000000,
|
||||
0x107e7e12,
|
||||
0x2f852381,
|
||||
@ -226,7 +369,7 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x0108f4e1,
|
||||
0xe0e13788,
|
||||
0xc9017c02,
|
||||
0x2100ec00,
|
||||
0x21014600,
|
||||
0x59031c03,
|
||||
0x01011c1c,
|
||||
0x7900000b,
|
||||
@ -237,7 +380,7 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x2400003c,
|
||||
0x2400001c,
|
||||
0xf0f4b784,
|
||||
0xf1f83781,
|
||||
0xf1bc3781,
|
||||
0xe100a184,
|
||||
0x2400269f,
|
||||
0x24000000,
|
||||
@ -248,7 +391,7 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x10000000,
|
||||
0x24000b01,
|
||||
0x81000a01,
|
||||
0x2400b181,
|
||||
0x24010b81,
|
||||
0x810c0a81,
|
||||
0x24140081,
|
||||
0x81380a81,
|
||||
@ -270,7 +413,7 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x81080801,
|
||||
0x240000e1,
|
||||
0x819c3a81,
|
||||
0xf1ec3781,
|
||||
0xf1b03781,
|
||||
0x24ffffe2,
|
||||
0x10e1e2e1,
|
||||
0x0501e1e1,
|
||||
@ -291,35 +434,35 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x6816030d,
|
||||
0xf11e1701,
|
||||
0xc9000424,
|
||||
0xf12c1733,
|
||||
0xf1301773,
|
||||
0xf12f1753,
|
||||
0xf1301733,
|
||||
0xf1341773,
|
||||
0xf1331753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
0x09015341,
|
||||
0x13414141,
|
||||
0x13804141,
|
||||
0x21014700,
|
||||
0x2101a100,
|
||||
0x6836030d,
|
||||
0xf1621701,
|
||||
0xf14e1701,
|
||||
0xc9010417,
|
||||
0xf1701733,
|
||||
0xf1741773,
|
||||
0xf1731753,
|
||||
0xf1601733,
|
||||
0xf1641773,
|
||||
0xf1631753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
0x09015341,
|
||||
0x13414141,
|
||||
0x13804141,
|
||||
0x21014700,
|
||||
0x2101a100,
|
||||
0x6856030c,
|
||||
0xf1a61701,
|
||||
0xf17e1701,
|
||||
0xc902040a,
|
||||
0xf1b41733,
|
||||
0xf1b81773,
|
||||
0xf1b71753,
|
||||
0xf1901733,
|
||||
0xf1941773,
|
||||
0xf1931753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
@ -338,10 +481,10 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x110f0203,
|
||||
0x68160314,
|
||||
0x24000081,
|
||||
0xf1381741,
|
||||
0xf13c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1341741,
|
||||
0xf1381741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
@ -350,48 +493,48 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc900042e,
|
||||
0xf12e173b,
|
||||
0xf12d171b,
|
||||
0xf132173b,
|
||||
0xf131171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
0x21018c00,
|
||||
0x2101e600,
|
||||
0x68360314,
|
||||
0x24000081,
|
||||
0xf17c1741,
|
||||
0xf16c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1781741,
|
||||
0xf1681741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
0xf1611741,
|
||||
0xf14d1741,
|
||||
0x09044141,
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc901041a,
|
||||
0xf172173b,
|
||||
0xf171171b,
|
||||
0xf162173b,
|
||||
0xf161171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
0x21018c00,
|
||||
0x2101e600,
|
||||
0x68560313,
|
||||
0x24000081,
|
||||
0xf1c01741,
|
||||
0xf19c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1bc1741,
|
||||
0xf1981741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
0xf1a51741,
|
||||
0xf17d1741,
|
||||
0x09044141,
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc9020406,
|
||||
0xf1b6173b,
|
||||
0xf1b5171b,
|
||||
0xf192173b,
|
||||
0xf191171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
@ -460,53 +603,53 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0xd1005f2e,
|
||||
0x01018282,
|
||||
0x1b01e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01028282,
|
||||
0x1b02e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01038282,
|
||||
0x1b03e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01048282,
|
||||
0x1b04e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01058282,
|
||||
0x1b05e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01068282,
|
||||
0x1b06e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01078282,
|
||||
0x1b07e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01088282,
|
||||
0x1b08e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01098282,
|
||||
0x1b09e3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x010a8282,
|
||||
0x1b0ae3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x010b8282,
|
||||
0x1b0be3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x010c8282,
|
||||
0x1b0ce3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x010d8282,
|
||||
0x1b0de3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x010e8282,
|
||||
0x1b0ee3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x010f8282,
|
||||
0x1b0fe3e3,
|
||||
0x2101fa00,
|
||||
0x21025400,
|
||||
0x01108282,
|
||||
0x1b10e3e3,
|
||||
0x24000042,
|
||||
0x21024000,
|
||||
0x21029a00,
|
||||
0x240000e2,
|
||||
0x31070043,
|
||||
0xd1011f00,
|
||||
@ -529,49 +672,49 @@ const uint32_t pru_SDFM_RTU0_image_0[] = {
|
||||
0xc9005f2e,
|
||||
0x01018282,
|
||||
0x1b01e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01028282,
|
||||
0x1b02e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01038282,
|
||||
0x1b03e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01048282,
|
||||
0x1b04e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01058282,
|
||||
0x1b05e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01068282,
|
||||
0x1b06e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01078282,
|
||||
0x1b07e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01088282,
|
||||
0x1b08e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01098282,
|
||||
0x1b09e3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x010a8282,
|
||||
0x1b0ae3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x010b8282,
|
||||
0x1b0be3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x010c8282,
|
||||
0x1b0ce3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x010d8282,
|
||||
0x1b0de3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x010e8282,
|
||||
0x1b0ee3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x010f8282,
|
||||
0x1b0fe3e3,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x01108282,
|
||||
0x1b10e3e3,
|
||||
0x24000142,
|
||||
|
||||
@ -1,11 +1,64 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (c) 2023, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x2effbd80,
|
||||
0x240400f7,
|
||||
0x240000c1,
|
||||
0x24020981,
|
||||
0x240100c2,
|
||||
0x240101c2,
|
||||
0x24000082,
|
||||
0xe1fc7781,
|
||||
0xe1c07781,
|
||||
0x32000000,
|
||||
0x240fff81,
|
||||
0x81001c81,
|
||||
@ -17,16 +70,18 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x10000000,
|
||||
0xf1171701,
|
||||
0xc9000104,
|
||||
0x2301af99,
|
||||
0x23020999,
|
||||
0x1d00e1e1,
|
||||
0xe1171701,
|
||||
0xf1171701,
|
||||
0xd70001fa,
|
||||
0xf1001701,
|
||||
0xcf0001ff,
|
||||
0xcf0001fd,
|
||||
0x1f00e1e1,
|
||||
0xe1011701,
|
||||
0x91340401,
|
||||
0x81340401,
|
||||
0x2300f699,
|
||||
0x23015099,
|
||||
0x32800000,
|
||||
0xf1021701,
|
||||
0x51010104,
|
||||
@ -44,32 +99,42 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x0b04e1e1,
|
||||
0x110fe1e2,
|
||||
0x10020256,
|
||||
0x23011799,
|
||||
0x23011b99,
|
||||
0x23014b99,
|
||||
0x23019099,
|
||||
0x23017199,
|
||||
0x23017599,
|
||||
0x2301a599,
|
||||
0x2301ea99,
|
||||
0x1f19fefe,
|
||||
0x23019999,
|
||||
0x2301f399,
|
||||
0x240fffd5,
|
||||
0x24ffff95,
|
||||
0x240000d4,
|
||||
0x24010494,
|
||||
0x24011894,
|
||||
0x2400001c,
|
||||
0xf1ea177c,
|
||||
0xf1e81701,
|
||||
0xf1ad177c,
|
||||
0xf1ac1701,
|
||||
0x09010101,
|
||||
0x12017c7c,
|
||||
0x2400003c,
|
||||
0x240000e1,
|
||||
0xf12a1701,
|
||||
0x1281c1c1,
|
||||
0xf15a1701,
|
||||
0x09010101,
|
||||
0x1281c1c1,
|
||||
0xf18a1701,
|
||||
0x09020101,
|
||||
0x1281c1c1,
|
||||
0x10c1c1da,
|
||||
0xf114179a,
|
||||
0xd1009a02,
|
||||
0x21003f00,
|
||||
0xc9019a25,
|
||||
0x21004b00,
|
||||
0xc9019a3f,
|
||||
0x10161602,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xc91cff1f,
|
||||
0xc91cff39,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5e9e6,
|
||||
@ -90,23 +155,49 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe1291701,
|
||||
0x21006500,
|
||||
0x21007100,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1281701,
|
||||
0x21006500,
|
||||
0x21007100,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1291701,
|
||||
0xc9029a25,
|
||||
0xc900da1a,
|
||||
0xf12c3793,
|
||||
0xf1c81701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1c81701,
|
||||
0xe1cc3783,
|
||||
0x79000013,
|
||||
0xf1cc3781,
|
||||
0xe1cc3783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe12b1701,
|
||||
0xf144379d,
|
||||
0xf1403781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe12b1701,
|
||||
0xf148379d,
|
||||
0xf1403781,
|
||||
0xe1003d81,
|
||||
0xc9029a3f,
|
||||
0x10363602,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xc91cff1f,
|
||||
0xc91cff39,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5ece6,
|
||||
@ -117,33 +208,59 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x10e7e7ee,
|
||||
0x10f5e8e8,
|
||||
0x10e8e8e3,
|
||||
0xf1643793,
|
||||
0xf168379b,
|
||||
0xf1503793,
|
||||
0xf154379b,
|
||||
0x240138e2,
|
||||
0x90e22481,
|
||||
0x70e3f307,
|
||||
0x24000001,
|
||||
0xe16c1701,
|
||||
0xe1581701,
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe16d1701,
|
||||
0x21008a00,
|
||||
0xe1591701,
|
||||
0x2100b000,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe16c1701,
|
||||
0x21008a00,
|
||||
0xe1581701,
|
||||
0x2100b000,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe16d1701,
|
||||
0xe1591701,
|
||||
0xc901da1a,
|
||||
0xf15c3793,
|
||||
0xf1c91701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1c91701,
|
||||
0xe1d03783,
|
||||
0x79000013,
|
||||
0xf1d03781,
|
||||
0xe1d03783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe15b1701,
|
||||
0xf174379d,
|
||||
0xf1703781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe15b1701,
|
||||
0xf178379d,
|
||||
0xf1703781,
|
||||
0xe1003d81,
|
||||
0xc9039a25,
|
||||
0x10565682,
|
||||
0x09020202,
|
||||
0x1f010202,
|
||||
0x1002027e,
|
||||
0x10000000,
|
||||
0xcf1cffb0,
|
||||
0xcf1cff7c,
|
||||
0x1f18ffff,
|
||||
0x10f5ffe5,
|
||||
0x0ce5efe6,
|
||||
@ -154,27 +271,53 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x10e7e7f1,
|
||||
0x10f5e8e8,
|
||||
0x10e8e8e3,
|
||||
0xf1a83793,
|
||||
0xf1ac379b,
|
||||
0xf1803793,
|
||||
0xf184379b,
|
||||
0x240138e2,
|
||||
0x90e22481,
|
||||
0x70e3f307,
|
||||
0x24000001,
|
||||
0xe1b01701,
|
||||
0xe1881701,
|
||||
0x58e3fb09,
|
||||
0x24000001,
|
||||
0xe1b11701,
|
||||
0x2100af00,
|
||||
0xe1891701,
|
||||
0x2100ef00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1b01701,
|
||||
0x2100af00,
|
||||
0xe1881701,
|
||||
0x2100ef00,
|
||||
0x1f034141,
|
||||
0x80e22481,
|
||||
0x24000101,
|
||||
0xe1b11701,
|
||||
0x7f000091,
|
||||
0xe1891701,
|
||||
0xc902da1a,
|
||||
0xf18c3793,
|
||||
0xf1ca1701,
|
||||
0xd1000105,
|
||||
0x1f00e1e1,
|
||||
0xe1ca1701,
|
||||
0xe1d43783,
|
||||
0x79000013,
|
||||
0xf1d43781,
|
||||
0xe1d43783,
|
||||
0x70e1f303,
|
||||
0x70e3f304,
|
||||
0x7900000e,
|
||||
0x58e3f308,
|
||||
0x7900000c,
|
||||
0x240001e1,
|
||||
0xe18b1701,
|
||||
0xf1a4379d,
|
||||
0xf1a03781,
|
||||
0xe1003d81,
|
||||
0x79000006,
|
||||
0x24000001,
|
||||
0xe18b1701,
|
||||
0xf1a8379d,
|
||||
0xf1a03781,
|
||||
0xe1003d81,
|
||||
0x7f000043,
|
||||
0x24000000,
|
||||
0x107e7e12,
|
||||
0x2f852381,
|
||||
@ -225,7 +368,7 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x0108f4e1,
|
||||
0xe0e13788,
|
||||
0xc9017c02,
|
||||
0x2100eb00,
|
||||
0x21014500,
|
||||
0x59031c03,
|
||||
0x01011c1c,
|
||||
0x7900000b,
|
||||
@ -236,7 +379,7 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x2400003c,
|
||||
0x2400001c,
|
||||
0xf0f4b784,
|
||||
0xf1f83781,
|
||||
0xf1bc3781,
|
||||
0xe100a184,
|
||||
0x2400279f,
|
||||
0x24000000,
|
||||
@ -247,7 +390,7 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x10000000,
|
||||
0x24000b01,
|
||||
0x81001c01,
|
||||
0x2400b081,
|
||||
0x24010a81,
|
||||
0x810c1c81,
|
||||
0x24140081,
|
||||
0x81381c81,
|
||||
@ -269,7 +412,7 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x81080801,
|
||||
0x240000e1,
|
||||
0x819c3a81,
|
||||
0xf1ec3781,
|
||||
0xf1b03781,
|
||||
0x24ffffe2,
|
||||
0x10e1e2e1,
|
||||
0x0501e1e1,
|
||||
@ -290,35 +433,35 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x6816030d,
|
||||
0xf11e1701,
|
||||
0xc9000424,
|
||||
0xf12c1733,
|
||||
0xf1301773,
|
||||
0xf12f1753,
|
||||
0xf1301733,
|
||||
0xf1341773,
|
||||
0xf1331753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
0x09015341,
|
||||
0x13414141,
|
||||
0x13804141,
|
||||
0x21014600,
|
||||
0x2101a000,
|
||||
0x6836030d,
|
||||
0xf1621701,
|
||||
0xf14e1701,
|
||||
0xc9010417,
|
||||
0xf1701733,
|
||||
0xf1741773,
|
||||
0xf1731753,
|
||||
0xf1601733,
|
||||
0xf1641773,
|
||||
0xf1631753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
0x09015341,
|
||||
0x13414141,
|
||||
0x13804141,
|
||||
0x21014600,
|
||||
0x2101a000,
|
||||
0x6856030c,
|
||||
0xf1a61701,
|
||||
0xf17e1701,
|
||||
0xc902040a,
|
||||
0xf1b41733,
|
||||
0xf1b81773,
|
||||
0xf1b71753,
|
||||
0xf1901733,
|
||||
0xf1941773,
|
||||
0xf1931753,
|
||||
0x10333321,
|
||||
0x09037341,
|
||||
0x12214121,
|
||||
@ -337,10 +480,10 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x110f0203,
|
||||
0x68160314,
|
||||
0x24000081,
|
||||
0xf1381741,
|
||||
0xf13c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1341741,
|
||||
0xf1381741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
@ -349,48 +492,48 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc900042e,
|
||||
0xf12e173b,
|
||||
0xf12d171b,
|
||||
0xf132173b,
|
||||
0xf131171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
0x21018b00,
|
||||
0x2101e500,
|
||||
0x68360314,
|
||||
0x24000081,
|
||||
0xf17c1741,
|
||||
0xf16c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1781741,
|
||||
0xf1681741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
0xf1611741,
|
||||
0xf14d1741,
|
||||
0x09044141,
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc901041a,
|
||||
0xf172173b,
|
||||
0xf171171b,
|
||||
0xf162173b,
|
||||
0xf161171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
0x21018b00,
|
||||
0x2101e500,
|
||||
0x68560313,
|
||||
0x24000081,
|
||||
0xf1c01741,
|
||||
0xf19c1741,
|
||||
0x09024141,
|
||||
0x11044101,
|
||||
0xf1bc1741,
|
||||
0xf1981741,
|
||||
0x09004141,
|
||||
0x11034141,
|
||||
0x12410101,
|
||||
0xf1a51741,
|
||||
0xf17d1741,
|
||||
0x09044141,
|
||||
0x11304141,
|
||||
0x12410101,
|
||||
0xc9020406,
|
||||
0xf1b6173b,
|
||||
0xf1b5171b,
|
||||
0xf192173b,
|
||||
0xf191171b,
|
||||
0x09033b21,
|
||||
0x09011b41,
|
||||
0x13414141,
|
||||
@ -459,53 +602,53 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0xd1005f2e,
|
||||
0x01018282,
|
||||
0x1b01e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01028282,
|
||||
0x1b02e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01038282,
|
||||
0x1b03e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01048282,
|
||||
0x1b04e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01058282,
|
||||
0x1b05e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01068282,
|
||||
0x1b06e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01078282,
|
||||
0x1b07e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01088282,
|
||||
0x1b08e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01098282,
|
||||
0x1b09e3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x010a8282,
|
||||
0x1b0ae3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x010b8282,
|
||||
0x1b0be3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x010c8282,
|
||||
0x1b0ce3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x010d8282,
|
||||
0x1b0de3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x010e8282,
|
||||
0x1b0ee3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x010f8282,
|
||||
0x1b0fe3e3,
|
||||
0x2101f900,
|
||||
0x21025300,
|
||||
0x01108282,
|
||||
0x1b10e3e3,
|
||||
0x24000042,
|
||||
0x21023f00,
|
||||
0x21029900,
|
||||
0x240000e2,
|
||||
0x31070043,
|
||||
0xd1011f00,
|
||||
@ -528,49 +671,49 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = {
|
||||
0xc9005f2e,
|
||||
0x01018282,
|
||||
0x1b01e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01028282,
|
||||
0x1b02e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01038282,
|
||||
0x1b03e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01048282,
|
||||
0x1b04e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01058282,
|
||||
0x1b05e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01068282,
|
||||
0x1b06e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01078282,
|
||||
0x1b07e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01088282,
|
||||
0x1b08e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01098282,
|
||||
0x1b09e3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x010a8282,
|
||||
0x1b0ae3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x010b8282,
|
||||
0x1b0be3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x010c8282,
|
||||
0x1b0ce3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x010d8282,
|
||||
0x1b0de3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x010e8282,
|
||||
0x1b0ee3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x010f8282,
|
||||
0x1b0fe3e3,
|
||||
0x21023e00,
|
||||
0x21029800,
|
||||
0x01108282,
|
||||
0x1b10e3e3,
|
||||
0x24000142,
|
||||
|
||||
@ -82,8 +82,9 @@ typedef SDFM *sdfm_handle;
|
||||
*
|
||||
* \brief Initialize SDFM instance
|
||||
*
|
||||
* \param[in] pru_id PRU (SD) ID
|
||||
*
|
||||
* \param[in] pru_id Pru slice id
|
||||
* \param[in] coreId Pru core id
|
||||
*
|
||||
* \retval sdfm SDFM instance handle
|
||||
*
|
||||
*/
|
||||
@ -262,12 +263,11 @@ void SDFM_disableComparator(sdfm_handle h_sdfm, uint8_t ch);
|
||||
* \param[in] ch current ch number
|
||||
* \param[in] gpio_base_addr GPIO bas address
|
||||
* \param[in] pin_number GPIO PIN number
|
||||
* \param[in] threshold_type Threshold type: High(0), Low(1)
|
||||
*
|
||||
*
|
||||
*
|
||||
*/
|
||||
void SDFM_configComparatorGpioPins(sdfm_handle h_sdfm, uint8_t ch,uint32_t gpio_base_addr, uint32_t pin_number, uint32_t threshold_type);
|
||||
void SDFM_configComparatorGpioPins(sdfm_handle h_sdfm, uint8_t ch,uint32_t gpio_base_addr, uint32_t pin_number);
|
||||
|
||||
/**
|
||||
*
|
||||
@ -299,7 +299,7 @@ void SDFM_setFilterOverSamplingRatio(sdfm_handle h_sdfm, uint16_t nc_osr);
|
||||
* \retval firmwareVersion release vesrion of firmware
|
||||
*
|
||||
*/
|
||||
uint64_t SDFM_getFirmwareVersion(sdfm_handle h_sdfm);
|
||||
uint32_t SDFM_getFirmwareVersion(sdfm_handle h_sdfm);
|
||||
/*
|
||||
* \brief This API Configure Fast detect block fields.
|
||||
*
|
||||
@ -316,9 +316,9 @@ void SDFM_configFastDetect(sdfm_handle h_sdfm, uint8_t ch, uint8_t *fdParms);
|
||||
* \brief This API returns the fast detect error status for specified SDFM channel number.
|
||||
*
|
||||
* \param[in] h_sdfm SDFM handle
|
||||
* \param[in] \param[in] chNum SDFM channel number : Channel0-Channel9
|
||||
* \param[in] \param[in] chNum SDFM channel number : Channel0-Channel8
|
||||
*
|
||||
* \retval stauts of fd error: 1 means error available & 0 menas no error, SystemP_FAILURE on not expected API parameters
|
||||
* \retval stauts of fd error: 1 means error available & 0 means no error, SystemP_FAILURE on not expected API parameters
|
||||
*
|
||||
*/
|
||||
int32_t SDFM_getFastDetectErrorStatus(sdfm_handle h_sdfm, uint8_t chNum);
|
||||
@ -327,7 +327,7 @@ int32_t SDFM_getFastDetectErrorStatus(sdfm_handle h_sdfm, uint8_t chNum);
|
||||
* \brief Clear PWM trip status of the corresponding PWM trip zone block for specified SDFM channel number.
|
||||
*
|
||||
* \param[in] h_sdfm SDFM handle
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel9
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel8
|
||||
*
|
||||
* \retval SystemP_SUCCESS on success, SystemP_FAILURE on error or not expected API parameters
|
||||
*/
|
||||
@ -366,7 +366,7 @@ float SDFM_measureClockPhaseDelay(sdfm_handle h_sdfm, uint16_t clEdg);
|
||||
* \brief This API returns high threshold Status for specified SDFM channel number
|
||||
*
|
||||
* \param[in] h_sdfm SDFM handle
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel9
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel8
|
||||
*
|
||||
* \retval Status of Over current error for High threshold
|
||||
*/
|
||||
@ -376,7 +376,7 @@ uint8_t SDFM_getLowThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum);
|
||||
*
|
||||
* \brief This API returns high threshold Status for specified SDFM channel number
|
||||
* \param[in] h_sdfm SDFM handle
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel9
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel8
|
||||
*
|
||||
* \retval Status of over current error for Low Threshold
|
||||
*/
|
||||
@ -386,11 +386,41 @@ uint8_t SDFM_getHighThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum);
|
||||
*
|
||||
* \brief This API clears Overcurrent error bit of corresponding PWM register for specified SDFM channel number
|
||||
* \param[in] h_sdfm SDFM handle
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel9
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel8
|
||||
*
|
||||
* \retval SystemP_SUCCESS on success, SystemP_FAILURE on not expected API parameters
|
||||
*/
|
||||
int32_t SDFM_clearOverCurrentError(sdfm_handle h_sdfm, uint8_t chNum);
|
||||
|
||||
/**
|
||||
*
|
||||
* \brief This API enables zero cross detection for specified SDFM channel number
|
||||
* \param[in] h_sdfm SDFM handle
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel8
|
||||
* \param[in] zcThr zero cross threshold
|
||||
*
|
||||
*/
|
||||
void SDFM_enableZeroCrossDetection(sdfm_handle h_sdfm, uint8_t chNum, uint32_t zcThr);
|
||||
|
||||
/**
|
||||
*
|
||||
* \brief This API returns Zero cross Status for specified SDFM channel number
|
||||
* \param[in] h_sdfm SDFM handle
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel8
|
||||
*
|
||||
* \retval Status of zero cross
|
||||
*/
|
||||
uint8_t SDFM_getZeroCrossThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum);
|
||||
|
||||
/**
|
||||
*
|
||||
* \brief This API disbales zero cross detection for specified SDFM channel number
|
||||
* \param[in] h_sdfm SDFM handle
|
||||
* \param[in] chNum SDFM channel number : Channel0-Channel8
|
||||
*
|
||||
*
|
||||
*/
|
||||
void SDFM_disableZeroCrossDetection(sdfm_handle h_sdfm, uint8_t chNum);
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -134,6 +134,9 @@ extern "C" {
|
||||
#define SDFM_CHANNEL7 (7)
|
||||
#define SDFM_CHANNEL8 (8)
|
||||
|
||||
/*SDFM firmware version mask*/
|
||||
#define SDFM_FW_VERSION_BIT_SHIFT (32)
|
||||
|
||||
/*Fast detect ERROR mask*/
|
||||
#define SDFM_FD_ERROR_MASK_FOR_TRIP_VEC ( 0x3800000 )
|
||||
|
||||
@ -262,8 +265,12 @@ typedef struct SDFM_ThresholdParms_s
|
||||
volatile uint8_t highThStatus;
|
||||
/**< High Threshold status*/
|
||||
volatile uint8_t lowThStatus;
|
||||
/**< reserved */
|
||||
volatile uint16_t reserved3;
|
||||
/**< Zero cross enable bit*/
|
||||
volatile uint8_t zeroCrossEn;
|
||||
/**< Zero cross Threshold status */
|
||||
volatile uint8_t zeroCrossThstatus;
|
||||
/**< Zero Cross Threshold*/
|
||||
volatile uint32_t zeroCrossTh;
|
||||
}SDFM_ThresholdParms;
|
||||
|
||||
/**
|
||||
@ -294,8 +301,8 @@ typedef struct SDFM_Cfg_s
|
||||
volatile uint8_t fd_one_min;
|
||||
/**< sdfm ch clock parms*/
|
||||
SDFM_ClkSourceParms sdfm_clk_parms;
|
||||
/**< array to store the params for gpio toggle for different channels*/
|
||||
SDFM_GpioParams sdfm_gpio_params[3];
|
||||
/**< array to store the params of gpios for zero cross threshold*/
|
||||
SDFM_GpioParams sdfm_gpio_params;
|
||||
} SDFM_Cfg;
|
||||
|
||||
/**
|
||||
|
||||
@ -1,3 +1,56 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (c) 2021-2023, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x21000300,
|
||||
0x00000207,
|
||||
|
||||
@ -1,3 +1,56 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (c) 2021-2023, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x21000300,
|
||||
0x00000207,
|
||||
|
||||
@ -1,3 +1,56 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (c) 2021-2023, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x21000300,
|
||||
0x00000207,
|
||||
|
||||
@ -1,3 +1,57 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (c) 2021-2023, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
const uint32_t EnDatFirmwareMulti_0[] = {
|
||||
0x21000300,
|
||||
0x00000207,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user