diff --git a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/example.syscfg index 76b4df2..9596e0a 100644 --- a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/example.syscfg +++ b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/example.syscfg @@ -1,7 +1,7 @@ /** * These arguments were used when this file was generated. They will be automatically applied on subsequent loads * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. - * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00" + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" * @versions {"tool":"1.18.0+3266"} */ @@ -15,9 +15,6 @@ const gpio1 = gpio.addInstance(); const gpio2 = gpio.addInstance(); const gpio3 = gpio.addInstance(); const gpio4 = gpio.addInstance(); -const gpio5 = gpio.addInstance(); -const gpio6 = gpio.addInstance(); -const gpio7 = gpio.addInstance(); const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); const pruicss1 = pruicss.addInstance(); const debug_log = scripting.addModule("/kernel/dpl/debug_log"); @@ -34,52 +31,34 @@ const mpu_armv76 = mpu_armv7.addInstance(); */ epwm1.$name = "CONFIG_EPWM0"; epwm1.EPWM.$assign = "EHRPWM0"; -epwm1.EPWM.A.$assign = "ball.U20"; -epwm1.EPWM.B.$assign = "ball.U18"; -epwm1.EPWM.SYNCO.$assign = "ball.U21"; +epwm1.EPWM.A.$assign = "GPMC0_AD3"; +epwm1.EPWM.B.$assign = "GPMC0_AD4"; +epwm1.EPWM.SYNCO.$assign = "GPMC0_AD1"; epwm1.EPWM.SYNCI.$used = false; gpio1.$name = "GPIO_MTR_1_PWM_EN"; gpio1.pinDir = "OUTPUT"; gpio1.GPIO.$assign = "GPIO0"; gpio1.GPIO.gpioPin.rx = false; -gpio1.GPIO.gpioPin.$assign = "ball.Y20"; +gpio1.GPIO.gpioPin.$assign = "GPMC0_AD15"; -gpio2.$name = "GPIO_HIGH_TH_CH0"; gpio2.pinDir = "OUTPUT"; gpio2.useMcuDomainPeripherals = true; +gpio2.$name = "GPIO_ZC_TH_CH0"; gpio2.MCU_GPIO.$assign = "MCU_GPIO0"; gpio2.MCU_GPIO.gpioPin.rx = false; -gpio2.MCU_GPIO.gpioPin.$assign = "ball.B6"; +gpio2.MCU_GPIO.gpioPin.$assign = "MCU_SPI0_D1"; -gpio3.$name = "GPIO_LOW_TH_CH0"; gpio3.pinDir = "OUTPUT"; gpio3.useMcuDomainPeripherals = true; +gpio3.$name = "GPIO_ZC_TH_CH1"; gpio3.MCU_GPIO.gpioPin.rx = false; -gpio3.MCU_GPIO.gpioPin.$assign = "ball.C7"; +gpio3.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_CS0"; -gpio4.$name = "GPIO_HIGH_TH_CH1"; gpio4.pinDir = "OUTPUT"; gpio4.useMcuDomainPeripherals = true; -gpio4.MCU_GPIO.gpioPin.rx = false; -gpio4.MCU_GPIO.gpioPin.$assign = "ball.A7"; - -gpio5.$name = "GPIO_LOW_TH_CH1"; -gpio5.pinDir = "OUTPUT"; -gpio5.useMcuDomainPeripherals = true; -gpio5.MCU_GPIO.gpioPin.rx = false; -gpio5.MCU_GPIO.gpioPin.$assign = "ball.D7"; - -gpio6.$name = "GPIO_HIGH_TH_CH2"; -gpio6.pinDir = "OUTPUT"; -gpio6.useMcuDomainPeripherals = true; -gpio6.MCU_GPIO.gpioPin.$assign = "ball.C8"; - -gpio7.$name = "GPIO_LOW_TH_CH2"; -gpio7.pinDir = "OUTPUT"; -gpio7.useMcuDomainPeripherals = true; -gpio7.MCU_GPIO.gpioPin.rx = false; -gpio7.MCU_GPIO.gpioPin.$assign = "ball.E6"; +gpio4.$name = "GPIO_ZC_TH_CH2"; +gpio4.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_D1"; pruicss1.$name = "CONFIG_PRU_ICSS0"; pruicss1.coreClk = 300000000; @@ -126,8 +105,5 @@ mpu_armv76.size = 31; */ gpio3.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; gpio4.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; -gpio5.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; -gpio6.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; -gpio7.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; -debug_log.uartLog.UART.RXD.$suggestSolution = "ball.D15"; -debug_log.uartLog.UART.TXD.$suggestSolution = "ball.C16"; +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/example.syscfg index bede34b..20a22f7 100644 --- a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/example.syscfg +++ b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -1,7 +1,7 @@ /** * These arguments were used when this file was generated. They will be automatically applied on subsequent loads * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. - * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00" + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" * @versions {"tool":"1.18.0+3266"} */ @@ -16,9 +16,6 @@ const gpio1 = gpio.addInstance(); const gpio2 = gpio.addInstance(); const gpio3 = gpio.addInstance(); const gpio4 = gpio.addInstance(); -const gpio5 = gpio.addInstance(); -const gpio6 = gpio.addInstance(); -const gpio7 = gpio.addInstance(); const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); const pruicss1 = pruicss.addInstance(); const debug_log = scripting.addModule("/kernel/dpl/debug_log"); @@ -47,37 +44,21 @@ gpio1.useMcuDomainPeripherals = true; gpio1.MCU_GPIO.gpioPin.$assign = "MCU_UART0_RXD"; gpio2.pinDir = "OUTPUT"; -gpio2.$name = "GPIO_HIGH_TH_CH0"; +gpio2.$name = "GPIO_ZC_TH_CH0"; gpio2.GPIO.$assign = "GPIO0"; gpio2.GPIO.gpioPin.rx = false; gpio2.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO18"; -gpio3.$name = "GPIO_LOW_TH_CH0"; gpio3.pinDir = "OUTPUT"; +gpio3.$name = "GPIO_ZC_TH_CH1"; +gpio3.GPIO.$assign = "GPIO0"; gpio3.GPIO.gpioPin.rx = false; -gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO11"; +gpio3.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17"; gpio4.pinDir = "OUTPUT"; -gpio4.$name = "GPIO_HIGH_TH_CH1"; -gpio4.GPIO.$assign = "GPIO0"; +gpio4.$name = "GPIO_ZC_TH_CH2"; gpio4.GPIO.gpioPin.rx = false; -gpio4.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17"; - -gpio5.$name = "GPIO_LOW_TH_CH1"; -gpio5.pinDir = "OUTPUT"; -gpio5.GPIO.$assign = "GPIO0"; -gpio5.GPIO.gpioPin.rx = false; -gpio5.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO7"; - -gpio6.pinDir = "OUTPUT"; -gpio6.$name = "GPIO_HIGH_TH_CH2"; -gpio6.GPIO.gpioPin.rx = false; -gpio6.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1"; - -gpio7.$name = "GPIO_LOW_TH_CH2"; -gpio7.pinDir = "OUTPUT"; -gpio7.GPIO.gpioPin.rx = false; -gpio7.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; +gpio4.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1"; pruicss1.$name = "CONFIG_PRU_ICSS0"; pruicss1.coreClk = 300000000; @@ -125,8 +106,6 @@ epwm2.EPWM.$suggestSolution = "EHRPWM1"; epwm2.EPWM.A.$suggestSolution = "GPMC0_AD5"; epwm2.EPWM.B.$suggestSolution = "GPMC0_AD6"; gpio1.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; -gpio3.GPIO.$suggestSolution = "GPIO1"; -gpio6.GPIO.$suggestSolution = "GPIO1"; -gpio7.GPIO.$suggestSolution = "GPIO1"; +gpio4.GPIO.$suggestSolution = "GPIO1"; debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/app_sdfm.c b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/app_sdfm.c index 2b09167..4068773 100644 --- a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/app_sdfm.c +++ b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/app_sdfm.c @@ -175,7 +175,9 @@ SdfmPrms gTestSdfmPrms = { {{4, 18, 2}, {4, 18, 2}, {4, 18, 2} - } /*Fast detect fields {Window size, zero count max, zero count min}*/ + }, /*Fast detect fields {Window size, zero count max, zero count min}*/ + 0, /*Enable zero cross*/ + {1700, 1700, 1700}, /*Zero cross threshold*/ }; #define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */ diff --git a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/sdfm.c b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/sdfm.c index 1b77023..cdd2956 100644 --- a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/sdfm.c +++ b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/sdfm.c @@ -184,47 +184,65 @@ int32_t initIcss( return SDFM_ERR_NERR; } -void sdfm_configure_gpio_pin(sdfm_handle h_sdfm) +void SDFM_configGpioPins(sdfm_handle h_sdfm, uint8_t loadShare, uint8_t pruInsId) { - /*ch0 GPIO configuration*/ - uint32_t gpioBaseAddrCh0Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH0_BASE_ADDR); - uint32_t pinNumCh0Hi = GPIO_HIGH_TH_CH0_PIN; - GPIO_setDirMode(gpioBaseAddrCh0Hi, pinNumCh0Hi, GPIO_HIGH_TH_CH0_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Hi, pinNumCh0Hi, 0); - - uint32_t gpioBaseAddrCh0Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH0_BASE_ADDR); - uint32_t pinNumCh0Lo = GPIO_LOW_TH_CH0_PIN; - GPIO_setDirMode(gpioBaseAddrCh0Lo, pinNumCh0Lo, GPIO_LOW_TH_CH0_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Lo, pinNumCh0Lo, 1); - - - /*ch1 GPIO configuration*/ - uint32_t gpioBaseAddrCh1Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH1_BASE_ADDR); - uint32_t pinNumCh1Hi = GPIO_HIGH_TH_CH1_PIN; - GPIO_setDirMode(gpioBaseAddrCh1Hi, pinNumCh1Hi, GPIO_HIGH_TH_CH1_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Hi, pinNumCh1Hi, 0); - - uint32_t gpioBaseAddrCh1Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH1_BASE_ADDR); - uint32_t pinNumCh1Lo = GPIO_LOW_TH_CH1_PIN; - GPIO_setDirMode(gpioBaseAddrCh1Lo, pinNumCh1Lo, GPIO_LOW_TH_CH1_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Lo, pinNumCh1Lo, 1); - - - /*ch2 GPIO configuration*/ - uint32_t gpioBaseAddrCh2Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH2_BASE_ADDR); - uint32_t pinNumCh2Hi = GPIO_HIGH_TH_CH2_PIN; - GPIO_setDirMode(gpioBaseAddrCh2Hi, pinNumCh2Hi, GPIO_HIGH_TH_CH2_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Hi, pinNumCh2Hi, 0); - - uint32_t gpioBaseAddrCh2Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH2_BASE_ADDR); - uint32_t pinNumCh2Lo = GPIO_LOW_TH_CH2_PIN; - GPIO_setDirMode(gpioBaseAddrCh2Lo, pinNumCh2Lo, GPIO_LOW_TH_CH2_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Lo, pinNumCh2Lo, 1); + if(loadShare) + { + uint32_t gpioBaseAddrCh; + uint32_t pinNumCh; + switch (pruInsId) + { + case PRUICSS_PRU0: + case PRUICSS_PRU1: + /*ch3 GPIO configuration*/ + gpioBaseAddrCh = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH1_BASE_ADDR); + pinNumCh = GPIO_ZC_TH_CH1_PIN; + GPIO_setDirMode(gpioBaseAddrCh, pinNumCh, GPIO_ZC_TH_CH1_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh, pinNumCh); + break; + case PRUICSS_RTU_PRU0: + case PRUICSS_RTU_PRU1: + /*ch0 GPIO configuration*/ + gpioBaseAddrCh = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH0_BASE_ADDR); + pinNumCh = GPIO_ZC_TH_CH0_PIN; + GPIO_setDirMode(gpioBaseAddrCh, pinNumCh, GPIO_ZC_TH_CH0_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh, pinNumCh); + break; + case PRUICSS_TX_PRU0: + case PRUICSS_TX_PRU1: + /*ch6 GPIO configuration*/ + gpioBaseAddrCh = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH2_BASE_ADDR); + pinNumCh = GPIO_ZC_TH_CH2_PIN; + GPIO_setDirMode(gpioBaseAddrCh, pinNumCh, GPIO_ZC_TH_CH2_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh, pinNumCh); + break; + default: + break; + } + } + else + { + /*ch0 GPIO configuration*/ + uint32_t gpioBaseAddrCh0 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH0_BASE_ADDR); + uint32_t pinNumCh0 = GPIO_ZC_TH_CH0_PIN; + GPIO_setDirMode(gpioBaseAddrCh0, pinNumCh0, GPIO_ZC_TH_CH0_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0, pinNumCh0); + /*ch1 GPIO configuration*/ + uint32_t gpioBaseAddrCh1 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH1_BASE_ADDR); + uint32_t pinNumCh1 = GPIO_ZC_TH_CH1_PIN; + GPIO_setDirMode(gpioBaseAddrCh1, pinNumCh1, GPIO_ZC_TH_CH1_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1, pinNumCh1); + /*ch2 GPIO configuration*/ + uint32_t gpioBaseAddrCh2 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH2_BASE_ADDR); + uint32_t pinNumCh2 = GPIO_ZC_TH_CH2_PIN; + GPIO_setDirMode(gpioBaseAddrCh2, pinNumCh2, GPIO_ZC_TH_CH2_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2, pinNumCh2); + } } /* Initialize SDFM PRU FW */ -int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle) +int32_t initSdfmFw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle) { sdfm_handle hSdfm; uint8_t SDFM_CH = 0; @@ -326,11 +344,17 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm { SDFM_disableComparator(hSdfm, SDFM_CH); } + + /*enabling Zero cross only for first channel of axis*/ + if(pSdfmPrms->en_zc && SDFM_CH == 0) + { + SDFM_enableZeroCrossDetection(hSdfm, SDFM_CH, pSdfmPrms->zcThr[SDFM_CH]); + } } /*GPIO pin configuration for threshold measurment*/ - sdfm_configure_gpio_pin(hSdfm); + SDFM_configGpioPins(hSdfm, pSdfmPrms->loadShare, pSdfmPrms->pruInsId); SDFM_setSampleTriggerTime(hSdfm, pSdfmPrms->firstSampTrigTime); if(pSdfmPrms->en_second_update) @@ -458,7 +482,7 @@ int32_t initPruSdfm( } /* Initialize SDFM PRU FW */ - status = init_sdfm_pru_fw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle); + status = initSdfmFw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle); if (status != SDFM_ERR_NERR) { return SDFM_ERR_INIT_PRU_SDFM; diff --git a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/sdfm.h b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/sdfm.h index 835c2bf..92da62e 100644 --- a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/sdfm.h +++ b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/sdfm.h @@ -170,6 +170,10 @@ typedef struct SdfmPrms_s uint8_t en_fd; /**en_zc) + { + SDFM_enableZeroCrossDetection(hSdfm, SDFM_CH, pSdfmPrms->zcThr[SDFM_CH]); + } + } /*GPIO pin configuration for threshold measurment*/ - sdfm_configure_gpio_pin(hSdfm); + SDFM_configGpioPins(hSdfm); SDFM_setSampleTriggerTime(hSdfm, pSdfmPrms->firstSampTrigTime); if(pSdfmPrms->en_second_update) @@ -347,7 +334,7 @@ int32_t initPruSdfm( } /* Initialize SDFM PRU FW */ - status = init_sdfm_pru_fw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle); + status = initSdfmFw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle); if (status != SDFM_ERR_NERR) { return SDFM_ERR_INIT_PRU_SDFM; } diff --git a/examples/current_sense/icss_sdfm_three_channel_single_pru_mode/sdfm.h b/examples/current_sense/icss_sdfm_three_channel_single_pru_mode/sdfm.h index bd30761..df67f55 100644 --- a/examples/current_sense/icss_sdfm_three_channel_single_pru_mode/sdfm.h +++ b/examples/current_sense/icss_sdfm_three_channel_single_pru_mode/sdfm.h @@ -169,6 +169,10 @@ typedef struct SdfmPrms_s uint8_t en_fd; /**= MAX_SAMPLES) + if(sdfmPruIdxCnt >= MAX_SAMPLES) { - sdfm_ch0_idx = 0; - sdfm_ch1_idx = 0; - sdfm_ch2_idx = 0; + sdfmPruIdxCnt = 0; } -} + /* SDFM Output sample for Channel 0 */ + sdfm_ch_samples[SDFM_CH0][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0); + /* SDFM Output sample for Channel 1 */ + sdfm_ch_samples[SDFM_CH1][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1); + /* SDFM Output sample for Channel 2 */ + sdfm_ch_samples[SDFM_CH2][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2); + sdfmPruIdxCnt++; +} /* EPWM0 IRQ handler */ static void epwmIrqHandler(void *args) diff --git a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/sdfm.c b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/sdfm.c index 6f2407a..21785c6 100644 --- a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/sdfm.c +++ b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/sdfm.c @@ -48,19 +48,19 @@ #include "mclk_iep0_sync.h" /* PRU SDFM FW image info */ -typedef struct PRUSDFM_PruFwImageInfo_s { +typedef struct PRUSDFM_PruFwImageInfo_s +{ const uint32_t *pPruImemImg; const uint32_t pruImemImgSz; } PRUSDFM_PruFwImageInfo; /* Number of PRU images */ -#define PRU_SDFM_NUM_PRU_IMAGE ( 3 ) +#define PRU_SDFM_NUM_PRU_IMAGE ( 1 ) /* PRU SDFM image info */ static PRUSDFM_PruFwImageInfo gPruFwImageInfo[PRU_SDFM_NUM_PRU_IMAGE] = { - {pru_SDFM_PRU0_image_0, sizeof(pru_SDFM_PRU0_image_0)}, /* PRU FW */ - {NULL, 0} + {SDFM_PRU0_image_0, sizeof(SDFM_PRU0_image_0)} /* single PRU FW binary */ }; /* ICSS INTC configuration */ @@ -91,14 +91,16 @@ int32_t initIcss( if (sliceId == ICSSG_SLICE_ID_0) { status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_PRU0); - if (status != SystemP_SUCCESS) { + if (status != SystemP_SUCCESS) + { return SDFM_ERR_INIT_ICSSG; } } else if (sliceId == ICSSG_SLICE_ID_1) { status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_PRU1); - if (status != SystemP_SUCCESS) { + if (status != SystemP_SUCCESS) + { return SDFM_ERR_INIT_ICSSG; } } @@ -132,43 +134,25 @@ int32_t initIcss( return SDFM_ERR_NERR; } -void sdfm_configure_gpio_pin(sdfm_handle h_sdfm) +void SDFM_configGpioPins(sdfm_handle h_sdfm) { /*ch0 GPIO configuration*/ - uint32_t gpioBaseAddrCh0Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH0_BASE_ADDR); - uint32_t pinNumCh0Hi = GPIO_HIGH_TH_CH0_PIN; - GPIO_setDirMode(gpioBaseAddrCh0Hi, pinNumCh0Hi, GPIO_HIGH_TH_CH0_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Hi, pinNumCh0Hi, 0); - - uint32_t gpioBaseAddrCh0Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH0_BASE_ADDR); - uint32_t pinNumCh0Lo = GPIO_LOW_TH_CH0_PIN; - GPIO_setDirMode(gpioBaseAddrCh0Lo, pinNumCh0Lo, GPIO_LOW_TH_CH0_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Lo, pinNumCh0Lo, 1); - + uint32_t gpioBaseAddrCh0 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH0_BASE_ADDR); + uint32_t pinNumCh0 = GPIO_ZC_TH_CH0_PIN; + GPIO_setDirMode(gpioBaseAddrCh0, pinNumCh0, GPIO_ZC_TH_CH0_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0, pinNumCh0); /*ch1 GPIO configuration*/ - uint32_t gpioBaseAddrCh1Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH1_BASE_ADDR); - uint32_t pinNumCh1Hi = GPIO_HIGH_TH_CH1_PIN; - GPIO_setDirMode(gpioBaseAddrCh1Hi, pinNumCh1Hi, GPIO_HIGH_TH_CH1_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Hi, pinNumCh1Hi, 0); - - uint32_t gpioBaseAddrCh1Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH1_BASE_ADDR); - uint32_t pinNumCh1Lo = GPIO_LOW_TH_CH1_PIN; - GPIO_setDirMode(gpioBaseAddrCh1Lo, pinNumCh1Lo, GPIO_LOW_TH_CH1_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Lo, pinNumCh1Lo, 1); - + uint32_t gpioBaseAddrCh1 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH1_BASE_ADDR); + uint32_t pinNumCh1 = GPIO_ZC_TH_CH1_PIN; + GPIO_setDirMode(gpioBaseAddrCh1, pinNumCh1, GPIO_ZC_TH_CH1_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1, pinNumCh1); /*ch2 GPIO configuration*/ - uint32_t gpioBaseAddrCh2Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH2_BASE_ADDR); - uint32_t pinNumCh2Hi = GPIO_HIGH_TH_CH2_PIN; - GPIO_setDirMode(gpioBaseAddrCh2Hi, pinNumCh2Hi, GPIO_HIGH_TH_CH2_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Hi, pinNumCh2Hi, 0); - - uint32_t gpioBaseAddrCh2Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH2_BASE_ADDR); - uint32_t pinNumCh2Lo = GPIO_LOW_TH_CH2_PIN; - GPIO_setDirMode(gpioBaseAddrCh2Lo, pinNumCh2Lo, GPIO_LOW_TH_CH2_DIR); - SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Lo, pinNumCh2Lo, 1); - + uint32_t gpioBaseAddrCh2 = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_ZC_TH_CH2_BASE_ADDR); + uint32_t pinNumCh2 = GPIO_ZC_TH_CH2_PIN; + GPIO_setDirMode(gpioBaseAddrCh2, pinNumCh2, GPIO_ZC_TH_CH2_DIR); + SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2, pinNumCh2); } void SDFM_measurePhaseCompensation(sdfm_handle h_sdfm, uint32_t iep_clk) @@ -185,12 +169,12 @@ void SDFM_measurePhaseCompensation(sdfm_handle h_sdfm, uint32_t iep_clk) } /* Initialize SDFM PRU FW */ -int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle) +int32_t initSdfmFw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRUICSS_Handle pruIcssHandle) { sdfm_handle hSdfm; - + uint8_t SDFM_CH = 0; /* Initialize SDFM instance */ - hSdfm = SDFM_init(pruId); + hSdfm = SDFM_init(pruId, pSdfmPrms->pruInsId); hSdfm->gPruIcssHandle = pruIcssHandle; hSdfm->pruss_cfg = (void *)(((PRUICSS_HwAttrs *)(pruIcssHandle->hwAttrs))->cfgRegBase); @@ -205,7 +189,6 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm return SDFM_ERR_INIT_SDFM; } - uint8_t SDFM_CH; hSdfm->pru_core_clk = pSdfmPrms->pru_clock; hSdfm->iep_clock = pSdfmPrms->G0iep_clock; hSdfm->sdfm_clock = pSdfmPrms->sd_clock; @@ -263,10 +246,15 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm SDFM_disableComparator(hSdfm, SDFM_CH); } + if(pSdfmPrms->en_zc) + { + SDFM_enableZeroCrossDetection(hSdfm, SDFM_CH, pSdfmPrms->zcThr[SDFM_CH]); + } + } /*GPIO pin configuration for threshold measurment*/ - sdfm_configure_gpio_pin(hSdfm); + SDFM_configGpioPins(hSdfm); SDFM_setSampleTriggerTime(hSdfm, pSdfmPrms->firstSampTrigTime); if(pSdfmPrms->en_second_update) @@ -305,7 +293,6 @@ int32_t initPruSdfm( uint32_t byteLen; /* Total number of bytes to be written */ uint8_t pruId; int32_t status; - void *pruss_cfg; /* Reset PRU */ status = PRUICSS_resetCore(pruIcssHandle, pruInstId); @@ -325,15 +312,6 @@ int32_t initPruSdfm( pPruFwImageInfo = &gPruFwImageInfo[0]; pruIMem = PRUICSS_IRAM_PRU(sliceId); break; - case PRUICSS_RTU_PRU0: - case PRUICSS_RTU_PRU1: - pPruFwImageInfo = &gPruFwImageInfo[1]; - pruIMem = PRUICSS_IRAM_RTU_PRU(sliceId); - break; - case PRUICSS_TX_PRU0: - case PRUICSS_TX_PRU1: - pPruFwImageInfo = NULL; - break; default: pPruFwImageInfo = NULL; break; @@ -361,10 +339,12 @@ int32_t initPruSdfm( return SDFM_ERR_INIT_PRU_SDFM; } /* Translate PRU ID to SDFM API */ - if (pruInstId == PRUICSS_PRU0) { + if (pruInstId == PRUICSS_PRU0) + { pruId = PRU_ID_0; } - else if (pruInstId == PRUICSS_PRU1) { + else if (pruInstId == PRUICSS_PRU1) + { pruId = PRU_ID_1; } else { @@ -372,7 +352,7 @@ int32_t initPruSdfm( } /* Initialize SDFM PRU FW */ - status = init_sdfm_pru_fw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle); + status = initSdfmFw(pruId, pSdfmPrms, pHSdfm, pruIcssHandle); if (status != SDFM_ERR_NERR) { return SDFM_ERR_INIT_PRU_SDFM; } diff --git a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/sdfm.h b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/sdfm.h index 8ff2b49..2f6c3d9 100644 --- a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/sdfm.h +++ b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/sdfm.h @@ -111,6 +111,18 @@ #define ICSSG_SLICE_ID_1 ( 1 ) /* ICSSG slide ID 1 */ #define ICSSG_NUM_SLICE ( 2 ) /* ICSSG number of slices */ #define NUM_FD_FIELD ( 3 ) + +#define NUM_CH_SUPPORTED ( 3 ) +/* SDFM Channel IDs*/ +#define SDFM_CH0 (0) +#define SDFM_CH1 (1) +#define SDFM_CH2 (2) +#define SDFM_CH3 (3) +#define SDFM_CH4 (4) +#define SDFM_CH5 (5) +#define SDFM_CH6 (6) +#define SDFM_CH7 (7) +#define SDFM_CH8 (8) /*! * @brief PRUICSS Instance IDs */ @@ -124,6 +136,10 @@ typedef enum PRUICSS_MaxInstances_s /* SDFM configuration parameters */ typedef struct SdfmPrms_s { + /**p_sdfm_interface->sdfm_ch_ctrl.enable_comparator &= (0xFFFF ^ (1<BANK_REGISTERS[reg_index].CLR_DATA; uint32_t set_data_addr = (uint32_t)&hGpio->BANK_REGISTERS[reg_index].SET_DATA; - h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params[threshold_type].write_val = reg_val; - h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params[threshold_type].set_val_addr = set_data_addr; - h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params[threshold_type].clr_val_addr = clr_data_addr; + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params.write_val = reg_val; + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params.set_val_addr = set_data_addr; + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[ch].sdfm_gpio_params.clr_val_addr = clr_data_addr; } /* Get current (or latest) sample for the specified channel */ @@ -259,9 +259,9 @@ void SDFM_setFilterOverSamplingRatio(sdfm_handle h_sdfm, uint16_t nc_osr) h_sdfm->p_sdfm_interface->sdfm_cfg_trigger.nc_prd_iep_cnt = count; } /*return firmware version */ -uint64_t SDFM_getFirmwareVersion(sdfm_handle h_sdfm) +uint32_t SDFM_getFirmwareVersion(sdfm_handle h_sdfm) { - return h_sdfm->p_sdfm_interface->firmwareVersion; + return h_sdfm->p_sdfm_interface->firmwareVersion >> SDFM_FW_VERSION_BIT_SHIFT; } /*Enable free run NC */ void SDFM_enableContinuousNormalCurrent(sdfm_handle h_sdfm) @@ -509,6 +509,63 @@ int32_t SDFM_clearOverCurrentError(sdfm_handle h_sdfm, uint8_t chNum) retVal = SDFM_clearPwmTripStatus(h_sdfm, chNum); return retVal; } +void SDFM_enableZeroCrossDetection(sdfm_handle h_sdfm, uint8_t chNum, uint32_t zcThr) +{ + uint32_t temp; + temp = 1 << chNum; + if(temp & SDFM_CH_MASK_FOR_CH0_CH3_CH6) + { + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].sdfm_threshold_parms.zeroCrossEn = 1; + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].sdfm_threshold_parms.zeroCrossTh = zcThr; + } + else if(temp & SDFM_CH_MASK_FOR_CH1_CH4_CH7) + { + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].sdfm_threshold_parms.zeroCrossEn = 1; + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].sdfm_threshold_parms.zeroCrossTh = zcThr; + } + else + { + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].sdfm_threshold_parms.zeroCrossEn = 1; + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].sdfm_threshold_parms.zeroCrossTh = zcThr; + } + +} +uint8_t SDFM_getZeroCrossThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum) +{ + uint32_t temp; + temp = 1 << chNum; + if(temp & SDFM_CH_MASK_FOR_CH0_CH3_CH6) + { + return h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].sdfm_threshold_parms.zeroCrossThstatus; + } + else if(temp & SDFM_CH_MASK_FOR_CH1_CH4_CH7) + { + return h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].sdfm_threshold_parms.zeroCrossThstatus; + } + else + { + return h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].sdfm_threshold_parms.zeroCrossThstatus; + } + +} +void SDFM_disableZeroCrossDetection(sdfm_handle h_sdfm, uint8_t chNum) +{ + uint32_t temp; + temp = 1 << chNum; + if(temp & SDFM_CH_MASK_FOR_CH0_CH3_CH6) + { + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].sdfm_threshold_parms.zeroCrossEn = 0; + } + else if(temp & SDFM_CH_MASK_FOR_CH1_CH4_CH7) + { + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].sdfm_threshold_parms.zeroCrossEn = 0; + } + else + { + h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].sdfm_threshold_parms.zeroCrossEn = 0; + } + +} /* SDFM global enable */ void SDFM_enable(sdfm_handle h_sdfm) { diff --git a/source/current_sense/sdfm/firmware/firmware_version.h b/source/current_sense/sdfm/firmware/firmware_version.h index c53026f..6ceb698 100644 --- a/source/current_sense/sdfm/firmware/firmware_version.h +++ b/source/current_sense/sdfm/firmware/firmware_version.h @@ -60,7 +60,7 @@ FIRMWARE_VERSION_INTERNAL .set 1 ; bit30..24 version number FIRMWARE_VERSION_REVISION .set 0x01 ; bit23..16 major number -FIRMWARE_VERSION_MAJOR .set 0x00 +FIRMWARE_VERSION_MAJOR .set 0x01 ; bit15..0 minor number FIRMWARE_VERSION_MINOR .set 0x0000 diff --git a/source/current_sense/sdfm/firmware/icssg_sdfm.h b/source/current_sense/sdfm/firmware/icssg_sdfm.h index 389a802..208afaf 100644 --- a/source/current_sense/sdfm/firmware/icssg_sdfm.h +++ b/source/current_sense/sdfm/firmware/icssg_sdfm.h @@ -100,6 +100,11 @@ #define SDFM_CFG_GPIO_CLR_ADDR_SZ ( 4 ) #define SDFM_CFG_CURR_VAL_SZ ( 4 ) +/*Zero cross fields*/ +#define SDFM_CFG_BF_SD_CH0_ZC_EN_BIT ( 0 ) +#define SDFM_CFG_BF_SD_CH1_ZC_EN_BIT ( 1 ) +#define SDFM_CFG_BF_SD_CH2_ZC_EN_BIT ( 2 ) + /* FW register offsets from base (in bytes) */ /* SDFM Control */ #define SDFM_EN_OFFSET ( 0x00 ) @@ -123,7 +128,6 @@ #define SDFM_CFG_SD_CLOCK_PHASE_DELAY ( 0x18 ) - /*SDFM channel offsets*/ /*Ch0 offset*/ #define SDFM_CFG_CH0_CH_ID_OFFSET ( 0x1C ) @@ -134,102 +138,106 @@ #define SDFM_CFG_OC_LOW_THR_CH0_OFFSET ( 0x24 ) #define SDFM_CFG_OC_HIGH_THR_STATUS_CH0_OFFSET ( 0x28 ) #define SDFM_CFG_OC_LOW_THR_STATUS_CH0_OFFSET ( 0x29 ) +#define SDFM_CFG_ZC_THR_EN_CH0_OFFSET ( 0x2A ) +#define SDFM_CFG_ZC_THR_STATUS_CH0_OFFSET ( 0x2B ) +#define SDFM_CFG_ZC_THR_CH0_OFFSET ( 0x2C ) -#define SDFM_CFG_CH0_FD_WD_REG_OFFSET ( 0x2C) -#define SDFM_CFG_CH0_FD_ZERO_MAX_REG_OFFSET ( 0x2D) -#define SDFM_CFG_CH0_FD_ZERO_MIN_REG_OFFSET ( 0x2E) -#define SDFM_CFG_CH0_FD_ONE_MAX_REG_OFFSET ( 0x2F) -#define SDFM_CFG_CH0_FD_ONE_MIN_REG_OFFSET ( 0x30) -#define SDFM_CFG_CH0_CLOCK_SOURCE_OFFSET ( 0x34 ) -#define SDFM_CFG_CH0_CLOCK_INVERSION_OFFSET ( 0x38 ) +#define SDFM_CFG_CH0_FD_WD_REG_OFFSET ( 0x30) +#define SDFM_CFG_CH0_FD_ZERO_MAX_REG_OFFSET ( 0x31) +#define SDFM_CFG_CH0_FD_ZERO_MIN_REG_OFFSET ( 0x32) +#define SDFM_CFG_CH0_FD_ONE_MAX_REG_OFFSET ( 0x33) +#define SDFM_CFG_CH0_FD_ONE_MIN_REG_OFFSET ( 0x34) -#define SDFM_CFG_HIGH_THR_CH0_WRITE_VAL_OFFSET ( 0x3C ) -#define SDFM_CFG_HIGH_THR_CH0_SET_VAL_ADDR_OFFSET ( 0x40 ) -#define SDFM_CFG_HIGH_THR_CH0_CLR_VAL_ADDR_OFFSET ( 0x44 ) -#define SDFM_CFG_LOW_THR_CH0_WRITE_VAL_OFFSET ( 0x48 ) -#define SDFM_CFG_LOW_THR_CH0_SET_VAL_ADDR_OFFSET ( 0x4C ) -#define SDFM_CFG_LOW_THR_CH0_CLR_VAL_ADDR_OFFSET ( 0x50 ) +#define SDFM_CFG_CH0_CLOCK_SOURCE_OFFSET ( 0x38 ) +#define SDFM_CFG_CH0_CLOCK_INVERSION_OFFSET ( 0x3C ) +#define SDFM_CFG_ZC_THR_CH0_WRITE_VAL_OFFSET ( 0x40 ) +#define SDFM_CFG_ZC_THR_CH0_SET_VAL_ADDR_OFFSET ( 0x44 ) +#define SDFM_CFG_ZC_THR_CH0_CLR_VAL_ADDR_OFFSET ( 0x48 ) /*Ch1 offsets*/ -#define SDFM_CFG_CH1_CH_ID_OFFSET ( 0x60 ) -#define SDFM_CFG_CH1_FILTER_TYPE_OFFSET ( 0x61 ) -#define SDFM_CFG_CH1_OSR_OFFSET ( 0x62 ) +#define SDFM_CFG_CH1_CH_ID_OFFSET ( 0x4C ) +#define SDFM_CFG_CH1_FILTER_TYPE_OFFSET ( 0x4D ) +#define SDFM_CFG_CH1_OSR_OFFSET ( 0x4E ) -#define SDFM_CFG_OC_HIGH_THR_CH1_OFFSET ( 0x64 ) -#define SDFM_CFG_OC_LOW_THR_CH1_OFFSET ( 0x68 ) -#define SDFM_CFG_OC_HIGH_THR_STATUS_CH1_OFFSET ( 0x6C ) -#define SDFM_CFG_OC_LOW_THR_STATUS_CH1_OFFSET ( 0x6D ) +#define SDFM_CFG_OC_HIGH_THR_CH1_OFFSET ( 0x50 ) +#define SDFM_CFG_OC_LOW_THR_CH1_OFFSET ( 0x54 ) +#define SDFM_CFG_OC_HIGH_THR_STATUS_CH1_OFFSET ( 0x58 ) +#define SDFM_CFG_OC_LOW_THR_STATUS_CH1_OFFSET ( 0x59 ) +#define SDFM_CFG_ZC_THR_EN_CH1_OFFSET ( 0x5A ) +#define SDFM_CFG_ZC_THR_STATUS_CH1_OFFSET ( 0x5B ) +#define SDFM_CFG_ZC_THR_CH1_OFFSET ( 0x5C ) -#define SDFM_CFG_CH1_FD_WD_REG_OFFSET ( 0x70 ) -#define SDFM_CFG_CH1_FD_ZERO_MAX_REG_OFFSET ( 0x71 ) -#define SDFM_CFG_CH1_FD_ZERO_MIN_REG_OFFSET ( 0x72 ) -#define SDFM_CFG_CH1_FD_ONE_MAX_REG_OFFSET ( 0x73 ) -#define SDFM_CFG_CH1_FD_ONE_MIN_REG_OFFSET ( 0x74 ) +#define SDFM_CFG_CH1_FD_WD_REG_OFFSET ( 0x60 ) +#define SDFM_CFG_CH1_FD_ZERO_MAX_REG_OFFSET ( 0x61 ) +#define SDFM_CFG_CH1_FD_ZERO_MIN_REG_OFFSET ( 0x62 ) +#define SDFM_CFG_CH1_FD_ONE_MAX_REG_OFFSET ( 0x63 ) +#define SDFM_CFG_CH1_FD_ONE_MIN_REG_OFFSET ( 0x64 ) -#define SDFM_CFG_CH1_CLOCK_SOURCE_OFFSET ( 0x78 ) -#define SDFM_CFG_CH1_CLOCK_INVERSION_OFFSET ( 0x7C ) - -#define SDFM_CFG_HIGH_THR_CH1_WRITE_VAL_OFFSET ( 0x80 ) -#define SDFM_CFG_HIGH_THR_CH1_SET_VAL_ADDR_OFFSET ( 0x84 ) -#define SDFM_CFG_HIGH_THR_CH1_CLR_VAL_ADDR_OFFSET ( 0x88 ) -#define SDFM_CFG_LOW_THR_CH1_WRITE_VAL_OFFSET ( 0x8C ) -#define SDFM_CFG_LOW_THR_CH1_SET_VAL_ADDR_OFFSET ( 0x90 ) -#define SDFM_CFG_LOW_THR_CH1_CLR_VAL_ADDR_OFFSET ( 0x94 ) +#define SDFM_CFG_CH1_CLOCK_SOURCE_OFFSET ( 0x68 ) +#define SDFM_CFG_CH1_CLOCK_INVERSION_OFFSET ( 0x6C ) +#define SDFM_CFG_ZC_THR_CH1_WRITE_VAL_OFFSET ( 0x70 ) +#define SDFM_CFG_ZC_THR_CH1_SET_VAL_ADDR_OFFSET ( 0x74 ) +#define SDFM_CFG_ZC_THR_CH1_CLR_VAL_ADDR_OFFSET ( 0x78 ) /*Ch2 offsets*/ -#define SDFM_CFG_CH2_CH_ID_OFFSET ( 0xA4 ) -#define SDFM_CFG_CH2_FILTER_TYPE_OFFSET ( 0xA5 ) -#define SDFM_CFG_CH2_OSR_OFFSET ( 0xA6 ) +#define SDFM_CFG_CH2_CH_ID_OFFSET ( 0x7C ) +#define SDFM_CFG_CH2_FILTER_TYPE_OFFSET ( 0x7D ) +#define SDFM_CFG_CH2_OSR_OFFSET ( 0x7E ) -#define SDFM_CFG_OC_HIGH_THR_CH2_OFFSET ( 0xA8 ) -#define SDFM_CFG_OC_LOW_THR_CH2_OFFSET ( 0xAC ) -#define SDFM_CFG_OC_HIGH_THR_STATUS_CH2_OFFSET ( 0xB0 ) -#define SDFM_CFG_OC_LOW_THR_STATUS_CH2_OFFSET ( 0xB1 ) - -#define SDFM_CFG_CH2_FD_WD_REG_OFFSET ( 0xB4 ) -#define SDFM_CFG_CH2_FD_ZERO_MAX_REG_OFFSET ( 0xB5 ) -#define SDFM_CFG_CH2_FD_ZERO_MIN_REG_OFFSET ( 0xB6 ) -#define SDFM_CFG_CH2_FD_ONE_MAX_REG_OFFSET ( 0xB7 ) -#define SDFM_CFG_CH2_FD_ONE_MIN_REG_OFFSET ( 0xB8 ) +#define SDFM_CFG_OC_HIGH_THR_CH2_OFFSET ( 0x80 ) +#define SDFM_CFG_OC_LOW_THR_CH2_OFFSET ( 0x84 ) +#define SDFM_CFG_OC_HIGH_THR_STATUS_CH2_OFFSET ( 0x88 ) +#define SDFM_CFG_OC_LOW_THR_STATUS_CH2_OFFSET ( 0x89 ) +#define SDFM_CFG_ZC_THR_EN_CH2_OFFSET ( 0x8A ) +#define SDFM_CFG_ZC_THR_STATUS_CH2_OFFSET ( 0x8B ) +#define SDFM_CFG_ZC_THR_CH2_OFFSET ( 0x8C ) -#define SDFM_CFG_CH2_CLOCK_SOURCE_OFFSET ( 0xBC ) -#define SDFM_CFG_CH2_CLOCK_INVERSION_OFFSET ( 0xC0 ) +#define SDFM_CFG_CH2_FD_WD_REG_OFFSET ( 0x90 ) +#define SDFM_CFG_CH2_FD_ZERO_MAX_REG_OFFSET ( 0x91 ) +#define SDFM_CFG_CH2_FD_ZERO_MIN_REG_OFFSET ( 0x92 ) +#define SDFM_CFG_CH2_FD_ONE_MAX_REG_OFFSET ( 0x93 ) +#define SDFM_CFG_CH2_FD_ONE_MIN_REG_OFFSET ( 0x94 ) -#define SDFM_CFG_HIGH_THR_CH2_WRITE_VAL_OFFSET ( 0xC4 ) -#define SDFM_CFG_HIGH_THR_CH2_SET_VAL_ADDR_OFFSET ( 0xC8 ) -#define SDFM_CFG_HIGH_THR_CH2_CLR_VAL_ADDR_OFFSET ( 0xCC ) -#define SDFM_CFG_LOW_THR_CH2_WRITE_VAL_OFFSET ( 0xD0 ) -#define SDFM_CFG_LOW_THR_CH2_SET_VAL_ADDR_OFFSET ( 0xD4 ) -#define SDFM_CFG_LOW_THR_CH2_CLR_VAL_ADDR_OFFSET ( 0xD8 ) + +#define SDFM_CFG_CH2_CLOCK_SOURCE_OFFSET ( 0x98 ) +#define SDFM_CFG_CH2_CLOCK_INVERSION_OFFSET ( 0x9C ) + +#define SDFM_CFG_ZC_THR_CH2_WRITE_VAL_OFFSET ( 0xA0 ) +#define SDFM_CFG_ZC_THR_CH2_SET_VAL_ADDR_OFFSET ( 0xA4 ) +#define SDFM_CFG_ZC_THR_CH2_CLR_VAL_ADDR_OFFSET ( 0xA8 ) /*Sample timing offset*/ -#define SDFM_CFG_EN_CONT_NC_MODE ( 0xE8 ) -#define SDFM_CFG_EN_DOUBLE_UPDATE ( 0xEA ) -#define FW_REG_SDFM_CFG_FIRST_TRIG_SAMPLE_TIME ( 0xEC ) -#define FW_REG_SDFM_CFG_SECOND_TRIG_SAMPLE_TIME ( 0xF0 ) -#define SDFM_CFG_NC_PRD_IEP_CNT_OFFSET ( 0xF4) +#define SDFM_CFG_EN_CONT_NC_MODE ( 0xAC ) +#define SDFM_CFG_EN_DOUBLE_UPDATE ( 0xAD ) +#define FW_REG_SDFM_CFG_FIRST_TRIG_SAMPLE_TIME ( 0xB0 ) +#define FW_REG_SDFM_CFG_SECOND_TRIG_SAMPLE_TIME ( 0xB4 ) +#define SDFM_CFG_NC_PRD_IEP_CNT_OFFSET ( 0xB8) /* Output sample buffer base address offset*/ -#define SDFM_CFG_OUT_SAMP_BUF_BASE_ADD_OFFSET ( 0xF8 ) +#define SDFM_CFG_OUT_SAMP_BUF_BASE_ADD_OFFSET ( 0xBC ) /*Firmware version offset*/ -#define SDFM_FIRMWARE_VERSION_OFFSET (0xFC) +#define SDFM_FIRMWARE_VERSION_OFFSET (0xC0) -/*Local store offset for Phase delay: 2 byte */ -#define SDFM_CFG_DELAY_STORE_OFFSET ( 0x110 ) +/*Zero cross local storage*/ +#define SDFM_CFG_BF_SD_CH0_ZC_START_OFFSET (0xC8) +#define SDFM_CFG_BF_SD_CH1_ZC_START_OFFSET (0xC9) +#define SDFM_CFG_BF_SD_CH2_ZC_START_OFFSET (0xCA) +#define SDFM_CFG_ZC_CH0_PREV_VAL_OFFSET ( 0xCC) +#define SDFM_CFG_ZC_CH1_PREV_VAL_OFFSET ( 0xD0) +#define SDFM_CFG_ZC_CH2_PREV_VAL_OFFSET ( 0xD4) -/*Phase delay offset */ /*Local output sample buffer offset */ -#define SDFM_LOCAL_OUTPUT_SAMPLE_BUFFER_OFFSET (0x104) +#define SDFM_LOCAL_OUTPUT_SAMPLE_BUFFER_OFFSET (0x118) /*Debug */ -#define SDFM_DUBUG_OFFSET ( 0x10F ) +#define SDFM_DUBUG_OFFSET ( 0x124 ) /*Output sample offset*/ #define SDFM_CFG_OUT_SAMP_BUF_OFFSET (0x00) diff --git a/source/current_sense/sdfm/firmware/sdfm.asm b/source/current_sense/sdfm/firmware/sdfm.asm index 5d4271d..aaa24bf 100644 --- a/source/current_sense/sdfm/firmware/sdfm.asm +++ b/source/current_sense/sdfm/firmware/sdfm.asm @@ -123,13 +123,13 @@ SDFM_ENTRY: PHASE_DELAY_CAL: - ;check phase delay measurment active - LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1 - QBBC SKIP_PHASE_DELAY_CAL, TEMP_REG0.b0, 0 - JAL RET_ADDR_REG, SDFM_CLOCK_PHASE_COMPENSATION - ;acknowledge - CLR TEMP_REG0, TEMP_REG0, 0 - SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1 + ;check phase delay measurment active + LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1 + QBBC SKIP_PHASE_DELAY_CAL, TEMP_REG0.b0, 0 + JAL RET_ADDR_REG, SDFM_CLOCK_PHASE_COMPENSATION + ;acknowledge + CLR TEMP_REG0, TEMP_REG0, 0 + SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1 SKIP_PHASE_DELAY_CAL: @@ -138,6 +138,9 @@ SKIP_PHASE_DELAY_CAL: ; If SDFM global enable not set, wait for SDFM global enable from R5. ; CHECK_SDFM_EN: + ;check phase delay measurment active + LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_SD_EN_PHASE_DELAY, 1 + QBBS PHASE_DELAY_CAL, TEMP_REG0.b0, 0 ; Check SDFM global enable LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_EN_OFFSET, SDFM_EN_SZ QBBC CHECK_SDFM_EN, TEMP_REG0.b0, 0 ; If SDFM_EN not set, wait to set sdfm enable @@ -232,7 +235,19 @@ INIT_SDFM_CONT: LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_EN_CONT_NC_MODE,1 LSL TEMP_REG0.b0, TEMP_REG0.b0,1 OR EN_DOUBLE_UPDATE, EN_DOUBLE_UPDATE, TEMP_REG0.b0 - LDI SAMP_NAME, 0 + LDI SAMP_NAME, 0 + + ;Zero cross resgiter + LDI TEMP_REG0, 0 + LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_EN_CH0_OFFSET, 1 + OR TEMP_REG0.w2, TEMP_REG0.w2, TEMP_REG0.w0 + LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_EN_CH1_OFFSET, 1 + LSL TEMP_REG0.b0, TEMP_REG0.b0, 1 + OR TEMP_REG0.w2, TEMP_REG0.w2, TEMP_REG0.w0 + LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_EN_CH2_OFFSET, 1 + LSL TEMP_REG0.b0, TEMP_REG0.b0, 2 + OR TEMP_REG0.w2, TEMP_REG0.w2, TEMP_REG0.w0 + MOV ZERO_CROSS_EN, TEMP_REG0.w2 .if $isdefed("SDFM_PRU_CORE") ; Start IEP @@ -322,7 +337,53 @@ OVER_CURRENT_LOW_THRESHOLD_CH0: LDI TEMP_REG0.b0, 1 SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_OC_LOW_THR_STATUS_CH0_OFFSET, 1 END_OVER_CURRENT_DETECTION_CH0: - + + ;zero cross for ch0 + QBBC SKIP_ZERO_CROSS_CH0, ZERO_CROSS_EN, SDFM_CFG_BF_SD_CH0_ZC_EN_BIT + ;Load the zero cross threshold value for current channel & store in OC_HIGH_THR register + LBBO &OC_HIGH_THR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_OFFSET, 4 + ;Check if this is the first time after zero crossing is enabled + LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH0_ZC_START_OFFSET, 1 + ;If this is the first time, simply store the current value in DMEM and skip the comparison + QBBS ZERO_CROSS_STARTED_CH0, TEMP_REG0.b0, 0 + SET TEMP_REG0.t0 + SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH0_ZC_START_OFFSET, 1 + SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH0_PREV_VAL_OFFSET, 4 + QBA SKIP_ZERO_CROSS_CH0 +ZERO_CROSS_STARTED_CH0: + ;Load the previous value for zero cross comparison + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH0_PREV_VAL_OFFSET, 4 + ;Store the current value in DMEM for the next zero cross comparison + SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH0_PREV_VAL_OFFSET, 4 + ;Check if the previous sample value is greater than zero crossing threshold + ;If that is the case, check if the current sample value is smaller than the zero cross threshold + QBGE CHECK_FOR_BELOW_THRESHOLD_CH0, OC_HIGH_THR, TEMP_REG0 + ;Check if the sample value is greater than the zero crossing threshold + QBGE OVER_ZC_THRESHOLD_CH0, OC_HIGH_THR, TEMP_REG2 + QBA SKIP_ZERO_CROSS_CH0 +CHECK_FOR_BELOW_THRESHOLD_CH0: + ;Check if the sample value is lower than the zero crossing threshold + QBLE BELOW_ZC_THRESHOLD_CH0, OC_HIGH_THR, TEMP_REG2 + QBA SKIP_ZERO_CROSS_CH0 +OVER_ZC_THRESHOLD_CH0: + ;Set the ZC trip status as high + LDI TEMP_REG0, 1 + SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH0_OFFSET, 1 + ;Set the associated GPIO pin as high + LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_SET_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ + SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ + QBA SKIP_ZERO_CROSS_CH0 +BELOW_ZC_THRESHOLD_CH0: + ;Set the ZC trip status as low + LDI TEMP_REG0.b0, 0 + SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH0_OFFSET, 1 + ;Set the associated GPIO pin as low + LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH0_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ + SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ +SKIP_ZERO_CROSS_CH0: + .if $isdefed("DEBUG_CODE") ;For the current channel, compare against the High threshold, Low threshold and ZC thresholds (if enabled) ;Load the positive threshold value for current channel @@ -442,6 +503,52 @@ OVER_CURRENT_LOW_THRESHOLD_CH1: END_OVER_CURRENT_DETECTION_CH1: + ;zero cross for ch0 + QBBC SKIP_ZERO_CROSS_CH1, ZERO_CROSS_EN, SDFM_CFG_BF_SD_CH1_ZC_EN_BIT + ;Load the zero cross threshold value for current channel & store in OC_HIGH_THR register + LBBO &OC_HIGH_THR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_OFFSET, 4 + ;Check if this is the first time after zero crossing is enabled + LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH1_ZC_START_OFFSET, 1 + ;If this is the first time, simply store the current value in DMEM and skip the comparison + QBBS ZERO_CROSS_STARTED_CH1, TEMP_REG0.b0, 0 + SET TEMP_REG0.t0 + SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH1_ZC_START_OFFSET, 1 + SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH1_PREV_VAL_OFFSET, 4 + QBA SKIP_ZERO_CROSS_CH1 +ZERO_CROSS_STARTED_CH1: + ;Load the previous value for zero cross comparison + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH1_PREV_VAL_OFFSET, 4 + ;Store the current value in DMEM for the next zero cross comparison + SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH1_PREV_VAL_OFFSET, 4 + ;Check if the previous sample value is greater than zero crossing threshold + ;If that is the case, check if the current sample value is smaller than the zero cross threshold + QBGE CHECK_FOR_BELOW_THRESHOLD_CH1, OC_HIGH_THR, TEMP_REG0 + ;Check if the sample value is greater than the zero crossing threshold + QBGE OVER_ZC_THRESHOLD_CH1, OC_HIGH_THR, TEMP_REG2 + QBA SKIP_ZERO_CROSS_CH1 +CHECK_FOR_BELOW_THRESHOLD_CH1: + ;Check if the sample value is lower than the zero crossing threshold + QBLE BELOW_ZC_THRESHOLD_CH1, OC_HIGH_THR, TEMP_REG2 + QBA SKIP_ZERO_CROSS_CH1 +OVER_ZC_THRESHOLD_CH1: + ;Set the ZC trip status as high + LDI TEMP_REG0, 1 + SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH1_OFFSET, 1 + ;Set the associated GPIO pin as high + LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_SET_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ + SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ + QBA SKIP_ZERO_CROSS_CH1 +BELOW_ZC_THRESHOLD_CH1: + ;Set the ZC trip status as low + LDI TEMP_REG0.b0, 0 + SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH1_OFFSET, 1 + ;Set the associated GPIO pin as low + LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH1_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ + SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ +SKIP_ZERO_CROSS_CH1: + .if $isdefed("DEBUG_CODE") ;For the current channel, compare against the High threshold, Low threshold and ZC thresholds (if enabled) ;Load the positive threshold value for current channel @@ -483,6 +590,7 @@ BELOW_THRESHOLD_START_CH1: COMP_CH1_END: + .if $isdefed("DEBUG_CODE") ;GPIO LOW LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_HIGH_THR_CH1_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_CLR_ADDR_SZ @@ -601,6 +709,52 @@ BELOW_THRESHOLD_START_CH2: COMP_CH2_END: +;zero cross for ch0 + QBBC SKIP_ZERO_CROSS_CH2, ZERO_CROSS_EN, SDFM_CFG_BF_SD_CH2_ZC_EN_BIT + ;Load the zero cross threshold value for current channel & store in OC_HIGH_THR register + LBBO &OC_HIGH_THR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_OFFSET, 4 + ;Check if this is the first time after zero crossing is enabled + LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH2_ZC_START_OFFSET, 1 + ;If this is the first time, simply store the current value in DMEM and skip the comparison + QBBS ZERO_CROSS_STARTED_CH2, TEMP_REG0.b0, 0 + SET TEMP_REG0.t0 + SBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_BF_SD_CH2_ZC_START_OFFSET, 1 + SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH2_PREV_VAL_OFFSET, 4 + QBA SKIP_ZERO_CROSS_CH2 +ZERO_CROSS_STARTED_CH2: + ;Load the previous value for zero cross comparison + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH2_PREV_VAL_OFFSET, 4 + ;Store the current value in DMEM for the next zero cross comparison + SBBO &TEMP_REG2, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_CH2_PREV_VAL_OFFSET, 4 + ;Check if the previous sample value is greater than zero crossing threshold + ;If that is the case, check if the current sample value is smaller than the zero cross threshold + QBGE CHECK_FOR_BELOW_THRESHOLD_CH2, OC_HIGH_THR, TEMP_REG0 + ;Check if the sample value is greater than the zero crossing threshold + QBGE OVER_ZC_THRESHOLD_CH2, OC_HIGH_THR, TEMP_REG2 + QBA SKIP_ZERO_CROSS_CH2 +CHECK_FOR_BELOW_THRESHOLD_CH2: + ;Check if the sample value is lower than the zero crossing threshold + QBLE BELOW_ZC_THRESHOLD_CH2, OC_HIGH_THR, TEMP_REG2 + QBA SKIP_ZERO_CROSS_CH2 +OVER_ZC_THRESHOLD_CH2: + ;Set the ZC trip status as high + LDI TEMP_REG0, 1 + SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH2_OFFSET, 1 + ;Set the associated GPIO pin as high + LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_SET_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ + SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ + QBA SKIP_ZERO_CROSS_CH2 +BELOW_ZC_THRESHOLD_CH2: + ;Set the ZC trip status as low + LDI TEMP_REG0.b0, 0 + SBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_STATUS_CH2_OFFSET, 1 + ;Set the associated GPIO pin as low + LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_SET_ADDR_SZ + LBBO &TEMP_REG0, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_ZC_THR_CH2_WRITE_VAL_OFFSET, SDFM_CFG_GPIO_VALUE_SZ + SBBO &TEMP_REG0, GPIO_TGL_ADDR, 0, SDFM_CFG_GPIO_VALUE_SZ +SKIP_ZERO_CROSS_CH2: + .if $isdefed("DEBUG_CODE") ; GPIO LOW LBBO &GPIO_TGL_ADDR, SDFM_CFG_BASE_PTR_REG, SDFM_CFG_HIGH_THR_CH2_CLR_VAL_ADDR_OFFSET, SDFM_CFG_GPIO_CLR_ADDR_SZ diff --git a/source/current_sense/sdfm/firmware/sdfm_bin.h b/source/current_sense/sdfm/firmware/sdfm_bin.h index b6c70c3..346bba7 100644 --- a/source/current_sense/sdfm/firmware/sdfm_bin.h +++ b/source/current_sense/sdfm/firmware/sdfm_bin.h @@ -1,11 +1,64 @@ +/* + * + * Copyright (c) 2023, Texas Instruments Incorporated + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, + * non-exclusive license under copyrights and patents it now or hereafter + * owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") + * this software subject to the terms herein. With respect to the foregoing patent + * license, such license is granted solely to the extent that any such patent + * is necessary to Utilize the software alone. The patent license shall not apply to any + * combinations which include this software, other than combinations with devices + * manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * Any redistribution and use are licensed by TI for use only with TI Devices. + * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * Any redistribution and use of the source code, including any resulting derivative works, + * are licensed by TI for use only with TI Devices. + * Any redistribution and use of any object code compiled from the source code and + * any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND + * TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ const uint32_t SDFM_PRU0_image_0[] = { 0x2effbd80, 0x240000f7, 0x240000c1, 0x24020981, -0x240100c2, +0x240101c2, 0x24000082, -0xe1fc7781, +0xe1c07781, 0x32000000, 0x240fff81, 0x81000a81, @@ -17,19 +70,21 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x10000000, 0xf1171701, 0xc9000104, -0x2301d299, +0x23022c99, 0x1d00e1e1, 0xe1171701, +0xf1171701, +0xd70001fa, 0xf1001701, -0xcf0001ff, +0xcf0001fd, 0x1f00e1e1, 0xe1011701, 0x91340401, 0x1f01e1e1, 0x81340401, -0x23011999, +0x23017399, 0x32800000, -0x23012099, +0x23017a99, 0x240c00c2, 0x24000082, 0xf1021701, @@ -53,36 +108,46 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x0b04e1e1, 0x110fe1e2, 0x10020256, -0x23013a99, -0x23026799, -0x23013e99, -0x23016e99, -0x2301b399, +0x23019499, +0x2302c199, +0x23019899, +0x2301c899, +0x23020d99, 0x1f19fefe, -0x2301bc99, +0x23021699, 0x240fffd5, 0x24ffff95, 0x240000d4, -0x24010494, +0x24011894, 0x2400001c, -0xf1ea177c, -0xf1e81701, +0xf1ad177c, +0xf1ac1701, 0x09010101, 0x12017c7c, 0x2400003c, +0x240000e1, +0xf12a1701, +0x1281c1c1, +0xf15a1701, +0x09010101, +0x1281c1c1, +0xf18a1701, +0x09020101, +0x1281c1c1, +0x10c1c1da, 0x91001a01, 0x1f00e1e1, 0x81001a01, 0xf114179a, 0xd1009a02, -0x21004c00, -0xc9019a25, +0x21005800, +0xc9019a3f, 0x10161602, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xc91cff1f, +0xc91cff39, 0x1f18ffff, 0x10f5ffe5, 0x0ce5e9e6, @@ -103,23 +168,49 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x58e3fb09, 0x24000001, 0xe1291701, -0x21007200, +0x21007e00, 0x1f034141, 0x80e22481, 0x24000101, 0xe1281701, -0x21007200, +0x21007e00, 0x1f034141, 0x80e22481, 0x24000101, 0xe1291701, -0xc9029a25, +0xc900da1a, +0xf12c3793, +0xf1c81701, +0xd1000105, +0x1f00e1e1, +0xe1c81701, +0xe1cc3783, +0x79000013, +0xf1cc3781, +0xe1cc3783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe12b1701, +0xf144379d, +0xf1403781, +0xe1003d81, +0x79000006, +0x24000001, +0xe12b1701, +0xf148379d, +0xf1403781, +0xe1003d81, +0xc9029a3f, 0x10363602, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xc91cff1f, +0xc91cff39, 0x1f18ffff, 0x10f5ffe5, 0x0ce5ece6, @@ -130,33 +221,59 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x10e7e7ee, 0x10f5e8e8, 0x10e8e8e3, -0xf1643793, -0xf168379b, +0xf1503793, +0xf154379b, 0x240130e2, 0x90e22481, 0x70e3f307, 0x24000001, -0xe16c1701, +0xe1581701, 0x58e3fb09, 0x24000001, -0xe16d1701, -0x21009700, +0xe1591701, +0x2100bd00, 0x1f034141, 0x80e22481, 0x24000101, -0xe16c1701, -0x21009700, +0xe1581701, +0x2100bd00, 0x1f034141, 0x80e22481, 0x24000101, -0xe16d1701, +0xe1591701, +0xc901da1a, +0xf15c3793, +0xf1c91701, +0xd1000105, +0x1f00e1e1, +0xe1c91701, +0xe1d03783, +0x79000013, +0xf1d03781, +0xe1d03783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe15b1701, +0xf174379d, +0xf1703781, +0xe1003d81, +0x79000006, +0x24000001, +0xe15b1701, +0xf178379d, +0xf1703781, +0xe1003d81, 0xc9039a25, 0x10565682, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xcf1cffb0, +0xcf1cff7c, 0x1f18ffff, 0x10f5ffe5, 0x0ce5efe6, @@ -167,27 +284,53 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x10e7e7f1, 0x10f5e8e8, 0x10e8e8e3, -0xf1a83793, -0xf1ac379b, +0xf1803793, +0xf184379b, 0x240130e2, 0x90e22481, 0x70e3f307, 0x24000001, -0xe1b01701, +0xe1881701, 0x58e3fb09, 0x24000001, -0xe1b11701, -0x2100bc00, +0xe1891701, +0x2100fc00, 0x1f034141, 0x80e22481, 0x24000101, -0xe1b01701, -0x2100bc00, +0xe1881701, +0x2100fc00, 0x1f034141, 0x80e22481, 0x24000101, -0xe1b11701, -0x7f000091, +0xe1891701, +0xc902da1a, +0xf18c3793, +0xf1ca1701, +0xd1000105, +0x1f00e1e1, +0xe1ca1701, +0xe1d43783, +0x79000013, +0xf1d43781, +0xe1d43783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe18b1701, +0xf1a4379d, +0xf1a03781, +0xe1003d81, +0x79000006, +0x24000001, +0xe18b1701, +0xf1a8379d, +0xf1a03781, +0xe1003d81, +0x7f000043, 0x24000000, 0x107e7e12, 0x2f852381, @@ -240,19 +383,19 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x0108f4e1, 0xe0e13788, 0xc9017c0c, -0xf1f43781, +0xf1b83781, 0x91983a82, 0x00e1e2e1, 0x240000e2, 0xf1083782, 0x58e2e103, 0x81983a81, -0x2100fb00, +0x21015500, 0x04e2e1e1, 0x81983a81, -0x21010e00, +0x21016800, 0x59031c07, -0xf1f43781, +0xf1b83781, 0x91983a82, 0x00e1e2e1, 0x81983a81, @@ -260,18 +403,18 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x79000011, 0xd1003c07, 0xc9007c06, -0xf1f03781, +0xf1b43781, 0x0501e1e1, 0x81983a81, 0x2400013c, 0x79000005, -0xf1ec3781, +0xf1b03781, 0x0501e1e1, 0x81983a81, 0x2400003c, 0x2400001c, 0xf0f4b784, -0xf1f83781, +0xf1bc3781, 0xe100a184, 0x2400259f, 0x24000000, @@ -282,7 +425,7 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x10000000, 0x24000b01, 0x81000a01, -0x2400bd81, +0x24011781, 0x810c0a81, 0x24140081, 0x81380a81, @@ -304,7 +447,7 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x81080801, 0x240000e1, 0x819c3a81, -0xf1ec3781, +0xf1b03781, 0x24ffffe2, 0x10e1e2e1, 0x0501e1e1, @@ -325,35 +468,35 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x6816030d, 0xf11e1701, 0xc9000424, -0xf12c1733, -0xf1301773, -0xf12f1753, +0xf1301733, +0xf1341773, +0xf1331753, 0x10333321, 0x09037341, 0x12214121, 0x09015341, 0x13414141, 0x13804141, -0x21016900, +0x2101c300, 0x6836030d, -0xf1621701, +0xf14e1701, 0xc9010417, -0xf1701733, -0xf1741773, -0xf1731753, +0xf1601733, +0xf1641773, +0xf1631753, 0x10333321, 0x09037341, 0x12214121, 0x09015341, 0x13414141, 0x13804141, -0x21016900, +0x2101c300, 0x6856030c, -0xf1a61701, +0xf17e1701, 0xc902040a, -0xf1b41733, -0xf1b81773, -0xf1b71753, +0xf1901733, +0xf1941773, +0xf1931753, 0x10333321, 0x09037341, 0x12214121, @@ -372,10 +515,10 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x110f0203, 0x68160314, 0x24000081, -0xf1381741, +0xf13c1741, 0x09024141, 0x11044101, -0xf1341741, +0xf1381741, 0x09004141, 0x11034141, 0x12410101, @@ -384,48 +527,48 @@ const uint32_t SDFM_PRU0_image_0[] = { 0x11304141, 0x12410101, 0xc900042e, -0xf12e173b, -0xf12d171b, +0xf132173b, +0xf131171b, 0x09033b21, 0x09011b41, 0x13414141, -0x2101ae00, +0x21020800, 0x68360314, 0x24000081, -0xf17c1741, +0xf16c1741, 0x09024141, 0x11044101, -0xf1781741, +0xf1681741, 0x09004141, 0x11034141, 0x12410101, -0xf1611741, +0xf14d1741, 0x09044141, 0x11304141, 0x12410101, 0xc901041a, -0xf172173b, -0xf171171b, +0xf162173b, +0xf161171b, 0x09033b21, 0x09011b41, 0x13414141, -0x2101ae00, +0x21020800, 0x68560313, 0x24000081, -0xf1c01741, +0xf19c1741, 0x09024141, 0x11044101, -0xf1bc1741, +0xf1981741, 0x09004141, 0x11034141, 0x12410101, -0xf1a51741, +0xf17d1741, 0x09044141, 0x11304141, 0x12410101, 0xc9020406, -0xf1b6173b, -0xf1b5171b, +0xf192173b, +0xf191171b, 0x09033b21, 0x09011b41, 0x13414141, @@ -494,53 +637,53 @@ const uint32_t SDFM_PRU0_image_0[] = { 0xd1005f2e, 0x01018282, 0x1b01e3e3, -0x21021c00, +0x21027600, 0x01028282, 0x1b02e3e3, -0x21021c00, +0x21027600, 0x01038282, 0x1b03e3e3, -0x21021c00, +0x21027600, 0x01048282, 0x1b04e3e3, -0x21021c00, +0x21027600, 0x01058282, 0x1b05e3e3, -0x21021c00, +0x21027600, 0x01068282, 0x1b06e3e3, -0x21021c00, +0x21027600, 0x01078282, 0x1b07e3e3, -0x21021c00, +0x21027600, 0x01088282, 0x1b08e3e3, -0x21021c00, +0x21027600, 0x01098282, 0x1b09e3e3, -0x21021c00, +0x21027600, 0x010a8282, 0x1b0ae3e3, -0x21021c00, +0x21027600, 0x010b8282, 0x1b0be3e3, -0x21021c00, +0x21027600, 0x010c8282, 0x1b0ce3e3, -0x21021c00, +0x21027600, 0x010d8282, 0x1b0de3e3, -0x21021c00, +0x21027600, 0x010e8282, 0x1b0ee3e3, -0x21021c00, +0x21027600, 0x010f8282, 0x1b0fe3e3, -0x21021c00, +0x21027600, 0x01108282, 0x1b10e3e3, 0x24000042, -0x21026200, +0x2102bc00, 0x240000e2, 0x31070043, 0xd1011f00, @@ -563,49 +706,49 @@ const uint32_t SDFM_PRU0_image_0[] = { 0xc9005f2e, 0x01018282, 0x1b01e3e3, -0x21026100, +0x2102bb00, 0x01028282, 0x1b02e3e3, -0x21026100, +0x2102bb00, 0x01038282, 0x1b03e3e3, -0x21026100, +0x2102bb00, 0x01048282, 0x1b04e3e3, -0x21026100, +0x2102bb00, 0x01058282, 0x1b05e3e3, -0x21026100, +0x2102bb00, 0x01068282, 0x1b06e3e3, -0x21026100, +0x2102bb00, 0x01078282, 0x1b07e3e3, -0x21026100, +0x2102bb00, 0x01088282, 0x1b08e3e3, -0x21026100, +0x2102bb00, 0x01098282, 0x1b09e3e3, -0x21026100, +0x2102bb00, 0x010a8282, 0x1b0ae3e3, -0x21026100, +0x2102bb00, 0x010b8282, 0x1b0be3e3, -0x21026100, +0x2102bb00, 0x010c8282, 0x1b0ce3e3, -0x21026100, +0x2102bb00, 0x010d8282, 0x1b0de3e3, -0x21026100, +0x2102bb00, 0x010e8282, 0x1b0ee3e3, -0x21026100, +0x2102bb00, 0x010f8282, 0x1b0fe3e3, -0x21026100, +0x2102bb00, 0x01108282, 0x1b10e3e3, 0x24000142, diff --git a/source/current_sense/sdfm/firmware/sdfm_pru_bin.h b/source/current_sense/sdfm/firmware/sdfm_pru_bin.h index 62b07d8..ecd55b8 100644 --- a/source/current_sense/sdfm/firmware/sdfm_pru_bin.h +++ b/source/current_sense/sdfm/firmware/sdfm_pru_bin.h @@ -1,11 +1,64 @@ +/* + * + * Copyright (c) 2023, Texas Instruments Incorporated + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, + * non-exclusive license under copyrights and patents it now or hereafter + * owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") + * this software subject to the terms herein. With respect to the foregoing patent + * license, such license is granted solely to the extent that any such patent + * is necessary to Utilize the software alone. The patent license shall not apply to any + * combinations which include this software, other than combinations with devices + * manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * Any redistribution and use are licensed by TI for use only with TI Devices. + * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * Any redistribution and use of the source code, including any resulting derivative works, + * are licensed by TI for use only with TI Devices. + * Any redistribution and use of any object code compiled from the source code and + * any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND + * TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x2effbd80, 0x240000f7, 0x240000c1, 0x24020981, -0x240100c2, +0x240101c2, 0x24000082, -0xe1fc7781, +0xe1c07781, 0x32000000, 0x240fff81, 0x81000a81, @@ -17,19 +70,21 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x10000000, 0xf1171701, 0xc9000104, -0x2301d299, +0x23022c99, 0x1d00e1e1, 0xe1171701, +0xf1171701, +0xd70001fa, 0xf1001701, -0xcf0001ff, +0xcf0001fd, 0x1f00e1e1, 0xe1011701, 0x91340401, 0x1f01e1e1, 0x81340401, -0x23011999, +0x23017399, 0x32800000, -0x23012099, +0x23017a99, 0x240c00c2, 0x24000082, 0xf1021701, @@ -53,36 +108,46 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x0b04e1e1, 0x110fe1e2, 0x10020256, -0x23013a99, -0x23026799, -0x23013e99, -0x23016e99, -0x2301b399, +0x23019499, +0x2302c199, +0x23019899, +0x2301c899, +0x23020d99, 0x1f19fefe, -0x2301bc99, +0x23021699, 0x240fffd5, 0x24ffff95, 0x240000d4, -0x24010494, +0x24011894, 0x2400001c, -0xf1ea177c, -0xf1e81701, +0xf1ad177c, +0xf1ac1701, 0x09010101, 0x12017c7c, 0x2400003c, +0x240000e1, +0xf12a1701, +0x1281c1c1, +0xf15a1701, +0x09010101, +0x1281c1c1, +0xf18a1701, +0x09020101, +0x1281c1c1, +0x10c1c1da, 0x91001a01, 0x1f00e1e1, 0x81001a01, 0xf114179a, 0xd1009a02, -0x21004c00, -0xc9019a25, +0x21005800, +0xc9019a3f, 0x10161602, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xc91cff1f, +0xc91cff39, 0x1f18ffff, 0x10f5ffe5, 0x0ce5e9e6, @@ -103,23 +168,49 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x58e3fb09, 0x24000001, 0xe1291701, -0x21007200, +0x21007e00, 0x1f034141, 0x80e22481, 0x24000101, 0xe1281701, -0x21007200, +0x21007e00, 0x1f034141, 0x80e22481, 0x24000101, 0xe1291701, -0xc9029a25, +0xc900da1a, +0xf12c3793, +0xf1c81701, +0xd1000105, +0x1f00e1e1, +0xe1c81701, +0xe1cc3783, +0x79000013, +0xf1cc3781, +0xe1cc3783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe12b1701, +0xf144379d, +0xf1403781, +0xe1003d81, +0x79000006, +0x24000001, +0xe12b1701, +0xf148379d, +0xf1403781, +0xe1003d81, +0xc9029a3f, 0x10363602, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xc91cff1f, +0xc91cff39, 0x1f18ffff, 0x10f5ffe5, 0x0ce5ece6, @@ -130,33 +221,59 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x10e7e7ee, 0x10f5e8e8, 0x10e8e8e3, -0xf1643793, -0xf168379b, +0xf1503793, +0xf154379b, 0x240134e2, 0x90e22481, 0x70e3f307, 0x24000001, -0xe16c1701, +0xe1581701, 0x58e3fb09, 0x24000001, -0xe16d1701, -0x21009700, +0xe1591701, +0x2100bd00, 0x1f034141, 0x80e22481, 0x24000101, -0xe16c1701, -0x21009700, +0xe1581701, +0x2100bd00, 0x1f034141, 0x80e22481, 0x24000101, -0xe16d1701, +0xe1591701, +0xc901da1a, +0xf15c3793, +0xf1c91701, +0xd1000105, +0x1f00e1e1, +0xe1c91701, +0xe1d03783, +0x79000013, +0xf1d03781, +0xe1d03783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe15b1701, +0xf174379d, +0xf1703781, +0xe1003d81, +0x79000006, +0x24000001, +0xe15b1701, +0xf178379d, +0xf1703781, +0xe1003d81, 0xc9039a25, 0x10565682, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xcf1cffb0, +0xcf1cff7c, 0x1f18ffff, 0x10f5ffe5, 0x0ce5efe6, @@ -167,27 +284,53 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x10e7e7f1, 0x10f5e8e8, 0x10e8e8e3, -0xf1a83793, -0xf1ac379b, +0xf1803793, +0xf184379b, 0x240134e2, 0x90e22481, 0x70e3f307, 0x24000001, -0xe1b01701, +0xe1881701, 0x58e3fb09, 0x24000001, -0xe1b11701, -0x2100bc00, +0xe1891701, +0x2100fc00, 0x1f034141, 0x80e22481, 0x24000101, -0xe1b01701, -0x2100bc00, +0xe1881701, +0x2100fc00, 0x1f034141, 0x80e22481, 0x24000101, -0xe1b11701, -0x7f000091, +0xe1891701, +0xc902da1a, +0xf18c3793, +0xf1ca1701, +0xd1000105, +0x1f00e1e1, +0xe1ca1701, +0xe1d43783, +0x79000013, +0xf1d43781, +0xe1d43783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe18b1701, +0xf1a4379d, +0xf1a03781, +0xe1003d81, +0x79000006, +0x24000001, +0xe18b1701, +0xf1a8379d, +0xf1a03781, +0xe1003d81, +0x7f000043, 0x24000000, 0x107e7e12, 0x2f852381, @@ -240,19 +383,19 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x0108f4e1, 0xe0e13788, 0xc9017c0c, -0xf1f43781, +0xf1b83781, 0x91983a82, 0x00e1e2e1, 0x240000e2, 0xf1083782, 0x58e2e103, 0x81983a81, -0x2100fb00, +0x21015500, 0x04e2e1e1, 0x81983a81, -0x21010e00, +0x21016800, 0x59031c07, -0xf1f43781, +0xf1b83781, 0x91983a82, 0x00e1e2e1, 0x81983a81, @@ -260,18 +403,18 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x79000011, 0xd1003c07, 0xc9007c06, -0xf1f03781, +0xf1b43781, 0x0501e1e1, 0x81983a81, 0x2400013c, 0x79000005, -0xf1ec3781, +0xf1b03781, 0x0501e1e1, 0x81983a81, 0x2400003c, 0x2400001c, 0xf0f4b784, -0xf1f83781, +0xf1bc3781, 0xe100a184, 0x2400259f, 0x24000000, @@ -282,7 +425,7 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x10000000, 0x24000b01, 0x81000a01, -0x2400bd81, +0x24011781, 0x810c0a81, 0x24140081, 0x81380a81, @@ -304,7 +447,7 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x81080801, 0x240000e1, 0x819c3a81, -0xf1ec3781, +0xf1b03781, 0x24ffffe2, 0x10e1e2e1, 0x0501e1e1, @@ -325,35 +468,35 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x6816030d, 0xf11e1701, 0xc9000424, -0xf12c1733, -0xf1301773, -0xf12f1753, +0xf1301733, +0xf1341773, +0xf1331753, 0x10333321, 0x09037341, 0x12214121, 0x09015341, 0x13414141, 0x13804141, -0x21016900, +0x2101c300, 0x6836030d, -0xf1621701, +0xf14e1701, 0xc9010417, -0xf1701733, -0xf1741773, -0xf1731753, +0xf1601733, +0xf1641773, +0xf1631753, 0x10333321, 0x09037341, 0x12214121, 0x09015341, 0x13414141, 0x13804141, -0x21016900, +0x2101c300, 0x6856030c, -0xf1a61701, +0xf17e1701, 0xc902040a, -0xf1b41733, -0xf1b81773, -0xf1b71753, +0xf1901733, +0xf1941773, +0xf1931753, 0x10333321, 0x09037341, 0x12214121, @@ -372,10 +515,10 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x110f0203, 0x68160314, 0x24000081, -0xf1381741, +0xf13c1741, 0x09024141, 0x11044101, -0xf1341741, +0xf1381741, 0x09004141, 0x11034141, 0x12410101, @@ -384,48 +527,48 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0x11304141, 0x12410101, 0xc900042e, -0xf12e173b, -0xf12d171b, +0xf132173b, +0xf131171b, 0x09033b21, 0x09011b41, 0x13414141, -0x2101ae00, +0x21020800, 0x68360314, 0x24000081, -0xf17c1741, +0xf16c1741, 0x09024141, 0x11044101, -0xf1781741, +0xf1681741, 0x09004141, 0x11034141, 0x12410101, -0xf1611741, +0xf14d1741, 0x09044141, 0x11304141, 0x12410101, 0xc901041a, -0xf172173b, -0xf171171b, +0xf162173b, +0xf161171b, 0x09033b21, 0x09011b41, 0x13414141, -0x2101ae00, +0x21020800, 0x68560313, 0x24000081, -0xf1c01741, +0xf19c1741, 0x09024141, 0x11044101, -0xf1bc1741, +0xf1981741, 0x09004141, 0x11034141, 0x12410101, -0xf1a51741, +0xf17d1741, 0x09044141, 0x11304141, 0x12410101, 0xc9020406, -0xf1b6173b, -0xf1b5171b, +0xf192173b, +0xf191171b, 0x09033b21, 0x09011b41, 0x13414141, @@ -494,53 +637,53 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0xd1005f2e, 0x01018282, 0x1b01e3e3, -0x21021c00, +0x21027600, 0x01028282, 0x1b02e3e3, -0x21021c00, +0x21027600, 0x01038282, 0x1b03e3e3, -0x21021c00, +0x21027600, 0x01048282, 0x1b04e3e3, -0x21021c00, +0x21027600, 0x01058282, 0x1b05e3e3, -0x21021c00, +0x21027600, 0x01068282, 0x1b06e3e3, -0x21021c00, +0x21027600, 0x01078282, 0x1b07e3e3, -0x21021c00, +0x21027600, 0x01088282, 0x1b08e3e3, -0x21021c00, +0x21027600, 0x01098282, 0x1b09e3e3, -0x21021c00, +0x21027600, 0x010a8282, 0x1b0ae3e3, -0x21021c00, +0x21027600, 0x010b8282, 0x1b0be3e3, -0x21021c00, +0x21027600, 0x010c8282, 0x1b0ce3e3, -0x21021c00, +0x21027600, 0x010d8282, 0x1b0de3e3, -0x21021c00, +0x21027600, 0x010e8282, 0x1b0ee3e3, -0x21021c00, +0x21027600, 0x010f8282, 0x1b0fe3e3, -0x21021c00, +0x21027600, 0x01108282, 0x1b10e3e3, 0x24000042, -0x21026200, +0x2102bc00, 0x240000e2, 0x31070043, 0xd1011f00, @@ -563,49 +706,49 @@ const uint32_t pru_SDFM_PRU0_image_0[] = { 0xc9005f2e, 0x01018282, 0x1b01e3e3, -0x21026100, +0x2102bb00, 0x01028282, 0x1b02e3e3, -0x21026100, +0x2102bb00, 0x01038282, 0x1b03e3e3, -0x21026100, +0x2102bb00, 0x01048282, 0x1b04e3e3, -0x21026100, +0x2102bb00, 0x01058282, 0x1b05e3e3, -0x21026100, +0x2102bb00, 0x01068282, 0x1b06e3e3, -0x21026100, +0x2102bb00, 0x01078282, 0x1b07e3e3, -0x21026100, +0x2102bb00, 0x01088282, 0x1b08e3e3, -0x21026100, +0x2102bb00, 0x01098282, 0x1b09e3e3, -0x21026100, +0x2102bb00, 0x010a8282, 0x1b0ae3e3, -0x21026100, +0x2102bb00, 0x010b8282, 0x1b0be3e3, -0x21026100, +0x2102bb00, 0x010c8282, 0x1b0ce3e3, -0x21026100, +0x2102bb00, 0x010d8282, 0x1b0de3e3, -0x21026100, +0x2102bb00, 0x010e8282, 0x1b0ee3e3, -0x21026100, +0x2102bb00, 0x010f8282, 0x1b0fe3e3, -0x21026100, +0x2102bb00, 0x01108282, 0x1b10e3e3, 0x24000142, diff --git a/source/current_sense/sdfm/firmware/sdfm_rtu_bin.h b/source/current_sense/sdfm/firmware/sdfm_rtu_bin.h index e6fa638..28ea685 100644 --- a/source/current_sense/sdfm/firmware/sdfm_rtu_bin.h +++ b/source/current_sense/sdfm/firmware/sdfm_rtu_bin.h @@ -1,11 +1,64 @@ +/* + * + * Copyright (c) 2023, Texas Instruments Incorporated + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, + * non-exclusive license under copyrights and patents it now or hereafter + * owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") + * this software subject to the terms herein. With respect to the foregoing patent + * license, such license is granted solely to the extent that any such patent + * is necessary to Utilize the software alone. The patent license shall not apply to any + * combinations which include this software, other than combinations with devices + * manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * Any redistribution and use are licensed by TI for use only with TI Devices. + * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * Any redistribution and use of the source code, including any resulting derivative works, + * are licensed by TI for use only with TI Devices. + * Any redistribution and use of any object code compiled from the source code and + * any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND + * TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x2effbd80, 0x240200f7, 0x240000c1, 0x24020981, -0x240100c2, +0x240101c2, 0x24000082, -0xe1fc7781, +0xe1c07781, 0x32000000, 0x240fff81, 0x81000a81, @@ -17,17 +70,19 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x10000000, 0xf1171701, 0xc9000104, -0x2301b099, +0x23020a99, 0x1d00e1e1, 0xe1171701, +0xf1171701, +0xd70001fa, 0xf1001701, -0xcf0001ff, +0xcf0001fd, 0x1f00e1e1, 0xe1011701, 0x91340401, 0x1f03e1e1, 0x81340401, -0x2300f799, +0x23015199, 0x32800000, 0xf1021701, 0x51010104, @@ -45,32 +100,42 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x0b04e1e1, 0x110fe1e2, 0x10020256, -0x23011899, -0x23011c99, -0x23014c99, -0x23019199, +0x23017299, +0x23017699, +0x2301a699, +0x2301eb99, 0x1f19fefe, -0x23019a99, +0x2301f499, 0x240fffd5, 0x24ffff95, 0x240000d4, -0x24010494, +0x24011894, 0x2400001c, -0xf1ea177c, -0xf1e81701, +0xf1ad177c, +0xf1ac1701, 0x09010101, 0x12017c7c, 0x2400003c, +0x240000e1, +0xf12a1701, +0x1281c1c1, +0xf15a1701, +0x09010101, +0x1281c1c1, +0xf18a1701, +0x09020101, +0x1281c1c1, +0x10c1c1da, 0xf114179a, 0xd1009a02, -0x21004000, -0xc9019a25, +0x21004c00, +0xc9019a3f, 0x10161602, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xc91cff1f, +0xc91cff39, 0x1f18ffff, 0x10f5ffe5, 0x0ce5e9e6, @@ -91,23 +156,49 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x58e3fb09, 0x24000001, 0xe1291701, -0x21006600, +0x21007200, 0x1f034141, 0x80e22481, 0x24000101, 0xe1281701, -0x21006600, +0x21007200, 0x1f034141, 0x80e22481, 0x24000101, 0xe1291701, -0xc9029a25, +0xc900da1a, +0xf12c3793, +0xf1c81701, +0xd1000105, +0x1f00e1e1, +0xe1c81701, +0xe1cc3783, +0x79000013, +0xf1cc3781, +0xe1cc3783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe12b1701, +0xf144379d, +0xf1403781, +0xe1003d81, +0x79000006, +0x24000001, +0xe12b1701, +0xf148379d, +0xf1403781, +0xe1003d81, +0xc9029a3f, 0x10363602, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xc91cff1f, +0xc91cff39, 0x1f18ffff, 0x10f5ffe5, 0x0ce5ece6, @@ -118,33 +209,59 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x10e7e7ee, 0x10f5e8e8, 0x10e8e8e3, -0xf1643793, -0xf168379b, +0xf1503793, +0xf154379b, 0x240130e2, 0x90e22481, 0x70e3f307, 0x24000001, -0xe16c1701, +0xe1581701, 0x58e3fb09, 0x24000001, -0xe16d1701, -0x21008b00, +0xe1591701, +0x2100b100, 0x1f034141, 0x80e22481, 0x24000101, -0xe16c1701, -0x21008b00, +0xe1581701, +0x2100b100, 0x1f034141, 0x80e22481, 0x24000101, -0xe16d1701, +0xe1591701, +0xc901da1a, +0xf15c3793, +0xf1c91701, +0xd1000105, +0x1f00e1e1, +0xe1c91701, +0xe1d03783, +0x79000013, +0xf1d03781, +0xe1d03783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe15b1701, +0xf174379d, +0xf1703781, +0xe1003d81, +0x79000006, +0x24000001, +0xe15b1701, +0xf178379d, +0xf1703781, +0xe1003d81, 0xc9039a25, 0x10565682, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xcf1cffb0, +0xcf1cff7c, 0x1f18ffff, 0x10f5ffe5, 0x0ce5efe6, @@ -155,27 +272,53 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x10e7e7f1, 0x10f5e8e8, 0x10e8e8e3, -0xf1a83793, -0xf1ac379b, +0xf1803793, +0xf184379b, 0x240130e2, 0x90e22481, 0x70e3f307, 0x24000001, -0xe1b01701, +0xe1881701, 0x58e3fb09, 0x24000001, -0xe1b11701, -0x2100b000, +0xe1891701, +0x2100f000, 0x1f034141, 0x80e22481, 0x24000101, -0xe1b01701, -0x2100b000, +0xe1881701, +0x2100f000, 0x1f034141, 0x80e22481, 0x24000101, -0xe1b11701, -0x7f000091, +0xe1891701, +0xc902da1a, +0xf18c3793, +0xf1ca1701, +0xd1000105, +0x1f00e1e1, +0xe1ca1701, +0xe1d43783, +0x79000013, +0xf1d43781, +0xe1d43783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe18b1701, +0xf1a4379d, +0xf1a03781, +0xe1003d81, +0x79000006, +0x24000001, +0xe18b1701, +0xf1a8379d, +0xf1a03781, +0xe1003d81, +0x7f000043, 0x24000000, 0x107e7e12, 0x2f852381, @@ -226,7 +369,7 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x0108f4e1, 0xe0e13788, 0xc9017c02, -0x2100ec00, +0x21014600, 0x59031c03, 0x01011c1c, 0x7900000b, @@ -237,7 +380,7 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x2400003c, 0x2400001c, 0xf0f4b784, -0xf1f83781, +0xf1bc3781, 0xe100a184, 0x2400269f, 0x24000000, @@ -248,7 +391,7 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x10000000, 0x24000b01, 0x81000a01, -0x2400b181, +0x24010b81, 0x810c0a81, 0x24140081, 0x81380a81, @@ -270,7 +413,7 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x81080801, 0x240000e1, 0x819c3a81, -0xf1ec3781, +0xf1b03781, 0x24ffffe2, 0x10e1e2e1, 0x0501e1e1, @@ -291,35 +434,35 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x6816030d, 0xf11e1701, 0xc9000424, -0xf12c1733, -0xf1301773, -0xf12f1753, +0xf1301733, +0xf1341773, +0xf1331753, 0x10333321, 0x09037341, 0x12214121, 0x09015341, 0x13414141, 0x13804141, -0x21014700, +0x2101a100, 0x6836030d, -0xf1621701, +0xf14e1701, 0xc9010417, -0xf1701733, -0xf1741773, -0xf1731753, +0xf1601733, +0xf1641773, +0xf1631753, 0x10333321, 0x09037341, 0x12214121, 0x09015341, 0x13414141, 0x13804141, -0x21014700, +0x2101a100, 0x6856030c, -0xf1a61701, +0xf17e1701, 0xc902040a, -0xf1b41733, -0xf1b81773, -0xf1b71753, +0xf1901733, +0xf1941773, +0xf1931753, 0x10333321, 0x09037341, 0x12214121, @@ -338,10 +481,10 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x110f0203, 0x68160314, 0x24000081, -0xf1381741, +0xf13c1741, 0x09024141, 0x11044101, -0xf1341741, +0xf1381741, 0x09004141, 0x11034141, 0x12410101, @@ -350,48 +493,48 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0x11304141, 0x12410101, 0xc900042e, -0xf12e173b, -0xf12d171b, +0xf132173b, +0xf131171b, 0x09033b21, 0x09011b41, 0x13414141, -0x21018c00, +0x2101e600, 0x68360314, 0x24000081, -0xf17c1741, +0xf16c1741, 0x09024141, 0x11044101, -0xf1781741, +0xf1681741, 0x09004141, 0x11034141, 0x12410101, -0xf1611741, +0xf14d1741, 0x09044141, 0x11304141, 0x12410101, 0xc901041a, -0xf172173b, -0xf171171b, +0xf162173b, +0xf161171b, 0x09033b21, 0x09011b41, 0x13414141, -0x21018c00, +0x2101e600, 0x68560313, 0x24000081, -0xf1c01741, +0xf19c1741, 0x09024141, 0x11044101, -0xf1bc1741, +0xf1981741, 0x09004141, 0x11034141, 0x12410101, -0xf1a51741, +0xf17d1741, 0x09044141, 0x11304141, 0x12410101, 0xc9020406, -0xf1b6173b, -0xf1b5171b, +0xf192173b, +0xf191171b, 0x09033b21, 0x09011b41, 0x13414141, @@ -460,53 +603,53 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0xd1005f2e, 0x01018282, 0x1b01e3e3, -0x2101fa00, +0x21025400, 0x01028282, 0x1b02e3e3, -0x2101fa00, +0x21025400, 0x01038282, 0x1b03e3e3, -0x2101fa00, +0x21025400, 0x01048282, 0x1b04e3e3, -0x2101fa00, +0x21025400, 0x01058282, 0x1b05e3e3, -0x2101fa00, +0x21025400, 0x01068282, 0x1b06e3e3, -0x2101fa00, +0x21025400, 0x01078282, 0x1b07e3e3, -0x2101fa00, +0x21025400, 0x01088282, 0x1b08e3e3, -0x2101fa00, +0x21025400, 0x01098282, 0x1b09e3e3, -0x2101fa00, +0x21025400, 0x010a8282, 0x1b0ae3e3, -0x2101fa00, +0x21025400, 0x010b8282, 0x1b0be3e3, -0x2101fa00, +0x21025400, 0x010c8282, 0x1b0ce3e3, -0x2101fa00, +0x21025400, 0x010d8282, 0x1b0de3e3, -0x2101fa00, +0x21025400, 0x010e8282, 0x1b0ee3e3, -0x2101fa00, +0x21025400, 0x010f8282, 0x1b0fe3e3, -0x2101fa00, +0x21025400, 0x01108282, 0x1b10e3e3, 0x24000042, -0x21024000, +0x21029a00, 0x240000e2, 0x31070043, 0xd1011f00, @@ -529,49 +672,49 @@ const uint32_t pru_SDFM_RTU0_image_0[] = { 0xc9005f2e, 0x01018282, 0x1b01e3e3, -0x21023f00, +0x21029900, 0x01028282, 0x1b02e3e3, -0x21023f00, +0x21029900, 0x01038282, 0x1b03e3e3, -0x21023f00, +0x21029900, 0x01048282, 0x1b04e3e3, -0x21023f00, +0x21029900, 0x01058282, 0x1b05e3e3, -0x21023f00, +0x21029900, 0x01068282, 0x1b06e3e3, -0x21023f00, +0x21029900, 0x01078282, 0x1b07e3e3, -0x21023f00, +0x21029900, 0x01088282, 0x1b08e3e3, -0x21023f00, +0x21029900, 0x01098282, 0x1b09e3e3, -0x21023f00, +0x21029900, 0x010a8282, 0x1b0ae3e3, -0x21023f00, +0x21029900, 0x010b8282, 0x1b0be3e3, -0x21023f00, +0x21029900, 0x010c8282, 0x1b0ce3e3, -0x21023f00, +0x21029900, 0x010d8282, 0x1b0de3e3, -0x21023f00, +0x21029900, 0x010e8282, 0x1b0ee3e3, -0x21023f00, +0x21029900, 0x010f8282, 0x1b0fe3e3, -0x21023f00, +0x21029900, 0x01108282, 0x1b10e3e3, 0x24000142, diff --git a/source/current_sense/sdfm/firmware/sdfm_txpru_bin.h b/source/current_sense/sdfm/firmware/sdfm_txpru_bin.h index 196a898..4e38841 100644 --- a/source/current_sense/sdfm/firmware/sdfm_txpru_bin.h +++ b/source/current_sense/sdfm/firmware/sdfm_txpru_bin.h @@ -1,11 +1,64 @@ +/* + * + * Copyright (c) 2023, Texas Instruments Incorporated + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, + * non-exclusive license under copyrights and patents it now or hereafter + * owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") + * this software subject to the terms herein. With respect to the foregoing patent + * license, such license is granted solely to the extent that any such patent + * is necessary to Utilize the software alone. The patent license shall not apply to any + * combinations which include this software, other than combinations with devices + * manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * Any redistribution and use are licensed by TI for use only with TI Devices. + * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * Any redistribution and use of the source code, including any resulting derivative works, + * are licensed by TI for use only with TI Devices. + * Any redistribution and use of any object code compiled from the source code and + * any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND + * TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x2effbd80, 0x240400f7, 0x240000c1, 0x24020981, -0x240100c2, +0x240101c2, 0x24000082, -0xe1fc7781, +0xe1c07781, 0x32000000, 0x240fff81, 0x81001c81, @@ -17,16 +70,18 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x10000000, 0xf1171701, 0xc9000104, -0x2301af99, +0x23020999, 0x1d00e1e1, 0xe1171701, +0xf1171701, +0xd70001fa, 0xf1001701, -0xcf0001ff, +0xcf0001fd, 0x1f00e1e1, 0xe1011701, 0x91340401, 0x81340401, -0x2300f699, +0x23015099, 0x32800000, 0xf1021701, 0x51010104, @@ -44,32 +99,42 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x0b04e1e1, 0x110fe1e2, 0x10020256, -0x23011799, -0x23011b99, -0x23014b99, -0x23019099, +0x23017199, +0x23017599, +0x2301a599, +0x2301ea99, 0x1f19fefe, -0x23019999, +0x2301f399, 0x240fffd5, 0x24ffff95, 0x240000d4, -0x24010494, +0x24011894, 0x2400001c, -0xf1ea177c, -0xf1e81701, +0xf1ad177c, +0xf1ac1701, 0x09010101, 0x12017c7c, 0x2400003c, +0x240000e1, +0xf12a1701, +0x1281c1c1, +0xf15a1701, +0x09010101, +0x1281c1c1, +0xf18a1701, +0x09020101, +0x1281c1c1, +0x10c1c1da, 0xf114179a, 0xd1009a02, -0x21003f00, -0xc9019a25, +0x21004b00, +0xc9019a3f, 0x10161602, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xc91cff1f, +0xc91cff39, 0x1f18ffff, 0x10f5ffe5, 0x0ce5e9e6, @@ -90,23 +155,49 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x58e3fb09, 0x24000001, 0xe1291701, -0x21006500, +0x21007100, 0x1f034141, 0x80e22481, 0x24000101, 0xe1281701, -0x21006500, +0x21007100, 0x1f034141, 0x80e22481, 0x24000101, 0xe1291701, -0xc9029a25, +0xc900da1a, +0xf12c3793, +0xf1c81701, +0xd1000105, +0x1f00e1e1, +0xe1c81701, +0xe1cc3783, +0x79000013, +0xf1cc3781, +0xe1cc3783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe12b1701, +0xf144379d, +0xf1403781, +0xe1003d81, +0x79000006, +0x24000001, +0xe12b1701, +0xf148379d, +0xf1403781, +0xe1003d81, +0xc9029a3f, 0x10363602, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xc91cff1f, +0xc91cff39, 0x1f18ffff, 0x10f5ffe5, 0x0ce5ece6, @@ -117,33 +208,59 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x10e7e7ee, 0x10f5e8e8, 0x10e8e8e3, -0xf1643793, -0xf168379b, +0xf1503793, +0xf154379b, 0x240138e2, 0x90e22481, 0x70e3f307, 0x24000001, -0xe16c1701, +0xe1581701, 0x58e3fb09, 0x24000001, -0xe16d1701, -0x21008a00, +0xe1591701, +0x2100b000, 0x1f034141, 0x80e22481, 0x24000101, -0xe16c1701, -0x21008a00, +0xe1581701, +0x2100b000, 0x1f034141, 0x80e22481, 0x24000101, -0xe16d1701, +0xe1591701, +0xc901da1a, +0xf15c3793, +0xf1c91701, +0xd1000105, +0x1f00e1e1, +0xe1c91701, +0xe1d03783, +0x79000013, +0xf1d03781, +0xe1d03783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe15b1701, +0xf174379d, +0xf1703781, +0xe1003d81, +0x79000006, +0x24000001, +0xe15b1701, +0xf178379d, +0xf1703781, +0xe1003d81, 0xc9039a25, 0x10565682, 0x09020202, 0x1f010202, 0x1002027e, 0x10000000, -0xcf1cffb0, +0xcf1cff7c, 0x1f18ffff, 0x10f5ffe5, 0x0ce5efe6, @@ -154,27 +271,53 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x10e7e7f1, 0x10f5e8e8, 0x10e8e8e3, -0xf1a83793, -0xf1ac379b, +0xf1803793, +0xf184379b, 0x240138e2, 0x90e22481, 0x70e3f307, 0x24000001, -0xe1b01701, +0xe1881701, 0x58e3fb09, 0x24000001, -0xe1b11701, -0x2100af00, +0xe1891701, +0x2100ef00, 0x1f034141, 0x80e22481, 0x24000101, -0xe1b01701, -0x2100af00, +0xe1881701, +0x2100ef00, 0x1f034141, 0x80e22481, 0x24000101, -0xe1b11701, -0x7f000091, +0xe1891701, +0xc902da1a, +0xf18c3793, +0xf1ca1701, +0xd1000105, +0x1f00e1e1, +0xe1ca1701, +0xe1d43783, +0x79000013, +0xf1d43781, +0xe1d43783, +0x70e1f303, +0x70e3f304, +0x7900000e, +0x58e3f308, +0x7900000c, +0x240001e1, +0xe18b1701, +0xf1a4379d, +0xf1a03781, +0xe1003d81, +0x79000006, +0x24000001, +0xe18b1701, +0xf1a8379d, +0xf1a03781, +0xe1003d81, +0x7f000043, 0x24000000, 0x107e7e12, 0x2f852381, @@ -225,7 +368,7 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x0108f4e1, 0xe0e13788, 0xc9017c02, -0x2100eb00, +0x21014500, 0x59031c03, 0x01011c1c, 0x7900000b, @@ -236,7 +379,7 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x2400003c, 0x2400001c, 0xf0f4b784, -0xf1f83781, +0xf1bc3781, 0xe100a184, 0x2400279f, 0x24000000, @@ -247,7 +390,7 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x10000000, 0x24000b01, 0x81001c01, -0x2400b081, +0x24010a81, 0x810c1c81, 0x24140081, 0x81381c81, @@ -269,7 +412,7 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x81080801, 0x240000e1, 0x819c3a81, -0xf1ec3781, +0xf1b03781, 0x24ffffe2, 0x10e1e2e1, 0x0501e1e1, @@ -290,35 +433,35 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x6816030d, 0xf11e1701, 0xc9000424, -0xf12c1733, -0xf1301773, -0xf12f1753, +0xf1301733, +0xf1341773, +0xf1331753, 0x10333321, 0x09037341, 0x12214121, 0x09015341, 0x13414141, 0x13804141, -0x21014600, +0x2101a000, 0x6836030d, -0xf1621701, +0xf14e1701, 0xc9010417, -0xf1701733, -0xf1741773, -0xf1731753, +0xf1601733, +0xf1641773, +0xf1631753, 0x10333321, 0x09037341, 0x12214121, 0x09015341, 0x13414141, 0x13804141, -0x21014600, +0x2101a000, 0x6856030c, -0xf1a61701, +0xf17e1701, 0xc902040a, -0xf1b41733, -0xf1b81773, -0xf1b71753, +0xf1901733, +0xf1941773, +0xf1931753, 0x10333321, 0x09037341, 0x12214121, @@ -337,10 +480,10 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x110f0203, 0x68160314, 0x24000081, -0xf1381741, +0xf13c1741, 0x09024141, 0x11044101, -0xf1341741, +0xf1381741, 0x09004141, 0x11034141, 0x12410101, @@ -349,48 +492,48 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0x11304141, 0x12410101, 0xc900042e, -0xf12e173b, -0xf12d171b, +0xf132173b, +0xf131171b, 0x09033b21, 0x09011b41, 0x13414141, -0x21018b00, +0x2101e500, 0x68360314, 0x24000081, -0xf17c1741, +0xf16c1741, 0x09024141, 0x11044101, -0xf1781741, +0xf1681741, 0x09004141, 0x11034141, 0x12410101, -0xf1611741, +0xf14d1741, 0x09044141, 0x11304141, 0x12410101, 0xc901041a, -0xf172173b, -0xf171171b, +0xf162173b, +0xf161171b, 0x09033b21, 0x09011b41, 0x13414141, -0x21018b00, +0x2101e500, 0x68560313, 0x24000081, -0xf1c01741, +0xf19c1741, 0x09024141, 0x11044101, -0xf1bc1741, +0xf1981741, 0x09004141, 0x11034141, 0x12410101, -0xf1a51741, +0xf17d1741, 0x09044141, 0x11304141, 0x12410101, 0xc9020406, -0xf1b6173b, -0xf1b5171b, +0xf192173b, +0xf191171b, 0x09033b21, 0x09011b41, 0x13414141, @@ -459,53 +602,53 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0xd1005f2e, 0x01018282, 0x1b01e3e3, -0x2101f900, +0x21025300, 0x01028282, 0x1b02e3e3, -0x2101f900, +0x21025300, 0x01038282, 0x1b03e3e3, -0x2101f900, +0x21025300, 0x01048282, 0x1b04e3e3, -0x2101f900, +0x21025300, 0x01058282, 0x1b05e3e3, -0x2101f900, +0x21025300, 0x01068282, 0x1b06e3e3, -0x2101f900, +0x21025300, 0x01078282, 0x1b07e3e3, -0x2101f900, +0x21025300, 0x01088282, 0x1b08e3e3, -0x2101f900, +0x21025300, 0x01098282, 0x1b09e3e3, -0x2101f900, +0x21025300, 0x010a8282, 0x1b0ae3e3, -0x2101f900, +0x21025300, 0x010b8282, 0x1b0be3e3, -0x2101f900, +0x21025300, 0x010c8282, 0x1b0ce3e3, -0x2101f900, +0x21025300, 0x010d8282, 0x1b0de3e3, -0x2101f900, +0x21025300, 0x010e8282, 0x1b0ee3e3, -0x2101f900, +0x21025300, 0x010f8282, 0x1b0fe3e3, -0x2101f900, +0x21025300, 0x01108282, 0x1b10e3e3, 0x24000042, -0x21023f00, +0x21029900, 0x240000e2, 0x31070043, 0xd1011f00, @@ -528,49 +671,49 @@ const uint32_t pru_SDFM_TXPRU0_image_0[] = { 0xc9005f2e, 0x01018282, 0x1b01e3e3, -0x21023e00, +0x21029800, 0x01028282, 0x1b02e3e3, -0x21023e00, +0x21029800, 0x01038282, 0x1b03e3e3, -0x21023e00, +0x21029800, 0x01048282, 0x1b04e3e3, -0x21023e00, +0x21029800, 0x01058282, 0x1b05e3e3, -0x21023e00, +0x21029800, 0x01068282, 0x1b06e3e3, -0x21023e00, +0x21029800, 0x01078282, 0x1b07e3e3, -0x21023e00, +0x21029800, 0x01088282, 0x1b08e3e3, -0x21023e00, +0x21029800, 0x01098282, 0x1b09e3e3, -0x21023e00, +0x21029800, 0x010a8282, 0x1b0ae3e3, -0x21023e00, +0x21029800, 0x010b8282, 0x1b0be3e3, -0x21023e00, +0x21029800, 0x010c8282, 0x1b0ce3e3, -0x21023e00, +0x21029800, 0x010d8282, 0x1b0de3e3, -0x21023e00, +0x21029800, 0x010e8282, 0x1b0ee3e3, -0x21023e00, +0x21029800, 0x010f8282, 0x1b0fe3e3, -0x21023e00, +0x21029800, 0x01108282, 0x1b10e3e3, 0x24000142, diff --git a/source/current_sense/sdfm/include/sdfm_api.h b/source/current_sense/sdfm/include/sdfm_api.h index b4e7f25..c142779 100644 --- a/source/current_sense/sdfm/include/sdfm_api.h +++ b/source/current_sense/sdfm/include/sdfm_api.h @@ -82,8 +82,9 @@ typedef SDFM *sdfm_handle; * * \brief Initialize SDFM instance * - * \param[in] pru_id PRU (SD) ID - * + * \param[in] pru_id Pru slice id + * \param[in] coreId Pru core id + * * \retval sdfm SDFM instance handle * */ @@ -262,12 +263,11 @@ void SDFM_disableComparator(sdfm_handle h_sdfm, uint8_t ch); * \param[in] ch current ch number * \param[in] gpio_base_addr GPIO bas address * \param[in] pin_number GPIO PIN number - * \param[in] threshold_type Threshold type: High(0), Low(1) * * * */ -void SDFM_configComparatorGpioPins(sdfm_handle h_sdfm, uint8_t ch,uint32_t gpio_base_addr, uint32_t pin_number, uint32_t threshold_type); +void SDFM_configComparatorGpioPins(sdfm_handle h_sdfm, uint8_t ch,uint32_t gpio_base_addr, uint32_t pin_number); /** * @@ -299,7 +299,7 @@ void SDFM_setFilterOverSamplingRatio(sdfm_handle h_sdfm, uint16_t nc_osr); * \retval firmwareVersion release vesrion of firmware * */ -uint64_t SDFM_getFirmwareVersion(sdfm_handle h_sdfm); +uint32_t SDFM_getFirmwareVersion(sdfm_handle h_sdfm); /* * \brief This API Configure Fast detect block fields. * @@ -316,9 +316,9 @@ void SDFM_configFastDetect(sdfm_handle h_sdfm, uint8_t ch, uint8_t *fdParms); * \brief This API returns the fast detect error status for specified SDFM channel number. * * \param[in] h_sdfm SDFM handle - * \param[in] \param[in] chNum SDFM channel number : Channel0-Channel9 + * \param[in] \param[in] chNum SDFM channel number : Channel0-Channel8 * - * \retval stauts of fd error: 1 means error available & 0 menas no error, SystemP_FAILURE on not expected API parameters + * \retval stauts of fd error: 1 means error available & 0 means no error, SystemP_FAILURE on not expected API parameters * */ int32_t SDFM_getFastDetectErrorStatus(sdfm_handle h_sdfm, uint8_t chNum); @@ -327,7 +327,7 @@ int32_t SDFM_getFastDetectErrorStatus(sdfm_handle h_sdfm, uint8_t chNum); * \brief Clear PWM trip status of the corresponding PWM trip zone block for specified SDFM channel number. * * \param[in] h_sdfm SDFM handle - * \param[in] chNum SDFM channel number : Channel0-Channel9 + * \param[in] chNum SDFM channel number : Channel0-Channel8 * * \retval SystemP_SUCCESS on success, SystemP_FAILURE on error or not expected API parameters */ @@ -366,7 +366,7 @@ float SDFM_measureClockPhaseDelay(sdfm_handle h_sdfm, uint16_t clEdg); * \brief This API returns high threshold Status for specified SDFM channel number * * \param[in] h_sdfm SDFM handle - * \param[in] chNum SDFM channel number : Channel0-Channel9 + * \param[in] chNum SDFM channel number : Channel0-Channel8 * * \retval Status of Over current error for High threshold */ @@ -376,7 +376,7 @@ uint8_t SDFM_getLowThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum); * * \brief This API returns high threshold Status for specified SDFM channel number * \param[in] h_sdfm SDFM handle - * \param[in] chNum SDFM channel number : Channel0-Channel9 + * \param[in] chNum SDFM channel number : Channel0-Channel8 * * \retval Status of over current error for Low Threshold */ @@ -386,11 +386,41 @@ uint8_t SDFM_getHighThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum); * * \brief This API clears Overcurrent error bit of corresponding PWM register for specified SDFM channel number * \param[in] h_sdfm SDFM handle - * \param[in] chNum SDFM channel number : Channel0-Channel9 + * \param[in] chNum SDFM channel number : Channel0-Channel8 * * \retval SystemP_SUCCESS on success, SystemP_FAILURE on not expected API parameters */ int32_t SDFM_clearOverCurrentError(sdfm_handle h_sdfm, uint8_t chNum); + +/** + * + * \brief This API enables zero cross detection for specified SDFM channel number + * \param[in] h_sdfm SDFM handle + * \param[in] chNum SDFM channel number : Channel0-Channel8 + * \param[in] zcThr zero cross threshold + * + */ +void SDFM_enableZeroCrossDetection(sdfm_handle h_sdfm, uint8_t chNum, uint32_t zcThr); + +/** + * + * \brief This API returns Zero cross Status for specified SDFM channel number + * \param[in] h_sdfm SDFM handle + * \param[in] chNum SDFM channel number : Channel0-Channel8 + * + * \retval Status of zero cross + */ +uint8_t SDFM_getZeroCrossThresholdStatus(sdfm_handle h_sdfm, uint8_t chNum); + +/** + * + * \brief This API disbales zero cross detection for specified SDFM channel number + * \param[in] h_sdfm SDFM handle + * \param[in] chNum SDFM channel number : Channel0-Channel8 + * + * + */ +void SDFM_disableZeroCrossDetection(sdfm_handle h_sdfm, uint8_t chNum); /** @} */ #ifdef __cplusplus diff --git a/source/current_sense/sdfm/include/sdfm_drv.h b/source/current_sense/sdfm/include/sdfm_drv.h index 4bd5336..355f4f6 100644 --- a/source/current_sense/sdfm/include/sdfm_drv.h +++ b/source/current_sense/sdfm/include/sdfm_drv.h @@ -134,6 +134,9 @@ extern "C" { #define SDFM_CHANNEL7 (7) #define SDFM_CHANNEL8 (8) +/*SDFM firmware version mask*/ +#define SDFM_FW_VERSION_BIT_SHIFT (32) + /*Fast detect ERROR mask*/ #define SDFM_FD_ERROR_MASK_FOR_TRIP_VEC ( 0x3800000 ) @@ -262,8 +265,12 @@ typedef struct SDFM_ThresholdParms_s volatile uint8_t highThStatus; /**< High Threshold status*/ volatile uint8_t lowThStatus; - /**< reserved */ - volatile uint16_t reserved3; + /**< Zero cross enable bit*/ + volatile uint8_t zeroCrossEn; + /**< Zero cross Threshold status */ + volatile uint8_t zeroCrossThstatus; + /**< Zero Cross Threshold*/ + volatile uint32_t zeroCrossTh; }SDFM_ThresholdParms; /** @@ -294,8 +301,8 @@ typedef struct SDFM_Cfg_s volatile uint8_t fd_one_min; /**< sdfm ch clock parms*/ SDFM_ClkSourceParms sdfm_clk_parms; - /**< array to store the params for gpio toggle for different channels*/ - SDFM_GpioParams sdfm_gpio_params[3]; + /**< array to store the params of gpios for zero cross threshold*/ + SDFM_GpioParams sdfm_gpio_params; } SDFM_Cfg; /** diff --git a/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h b/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h index 84842f1..a110906 100644 --- a/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h +++ b/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h @@ -1,3 +1,56 @@ +/* + * + * Copyright (c) 2021-2023, Texas Instruments Incorporated + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, + * non-exclusive license under copyrights and patents it now or hereafter + * owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") + * this software subject to the terms herein. With respect to the foregoing patent + * license, such license is granted solely to the extent that any such patent + * is necessary to Utilize the software alone. The patent license shall not apply to any + * combinations which include this software, other than combinations with devices + * manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * Any redistribution and use are licensed by TI for use only with TI Devices. + * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * Any redistribution and use of the source code, including any resulting derivative works, + * are licensed by TI for use only with TI Devices. + * Any redistribution and use of any object code compiled from the source code and + * any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND + * TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ const uint32_t EnDatFirmwareMultiMakePRU_0[] = { 0x21000300, 0x00000207, diff --git a/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h b/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h index ce5e359..9df4101 100644 --- a/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h +++ b/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h @@ -1,3 +1,56 @@ +/* + * + * Copyright (c) 2021-2023, Texas Instruments Incorporated + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, + * non-exclusive license under copyrights and patents it now or hereafter + * owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") + * this software subject to the terms herein. With respect to the foregoing patent + * license, such license is granted solely to the extent that any such patent + * is necessary to Utilize the software alone. The patent license shall not apply to any + * combinations which include this software, other than combinations with devices + * manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * Any redistribution and use are licensed by TI for use only with TI Devices. + * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * Any redistribution and use of the source code, including any resulting derivative works, + * are licensed by TI for use only with TI Devices. + * Any redistribution and use of any object code compiled from the source code and + * any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND + * TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = { 0x21000300, 0x00000207, diff --git a/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h b/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h index 97f5859..98df899 100644 --- a/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h +++ b/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h @@ -1,3 +1,56 @@ +/* + * + * Copyright (c) 2021-2023, Texas Instruments Incorporated + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, + * non-exclusive license under copyrights and patents it now or hereafter + * owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") + * this software subject to the terms herein. With respect to the foregoing patent + * license, such license is granted solely to the extent that any such patent + * is necessary to Utilize the software alone. The patent license shall not apply to any + * combinations which include this software, other than combinations with devices + * manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * Any redistribution and use are licensed by TI for use only with TI Devices. + * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * Any redistribution and use of the source code, including any resulting derivative works, + * are licensed by TI for use only with TI Devices. + * Any redistribution and use of any object code compiled from the source code and + * any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND + * TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = { 0x21000300, 0x00000207, diff --git a/source/position_sense/endat/firmware/endat_master_multi_bin.h b/source/position_sense/endat/firmware/endat_master_multi_bin.h index f0ea8b3..9490b11 100644 --- a/source/position_sense/endat/firmware/endat_master_multi_bin.h +++ b/source/position_sense/endat/firmware/endat_master_multi_bin.h @@ -1,3 +1,57 @@ +/* + * + * Copyright (c) 2021-2023, Texas Instruments Incorporated + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, + * non-exclusive license under copyrights and patents it now or hereafter + * owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") + * this software subject to the terms herein. With respect to the foregoing patent + * license, such license is granted solely to the extent that any such patent + * is necessary to Utilize the software alone. The patent license shall not apply to any + * combinations which include this software, other than combinations with devices + * manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * Any redistribution and use are licensed by TI for use only with TI Devices. + * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * Any redistribution and use of the source code, including any resulting derivative works, + * are licensed by TI for use only with TI Devices. + * Any redistribution and use of any object code compiled from the source code and + * any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND + * TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + const uint32_t EnDatFirmwareMulti_0[] = { 0x21000300, 0x00000207,