Pull request #31: am243x/am263x : rtlibs : Add DCL examples and sources

Merge in PINDSW/motor_control_sdk from PINDSW-6566_add_dcl to next

* commit '3faf4a3ee1c99a33d4c9eac71f659d0b1aa91002':
  am243x/am263x : rtlibs : Add DCL examples and sources
This commit is contained in:
Dhaval Khandla 2023-09-15 02:27:36 -05:00 committed by Pratheesh Gangadhar TK
commit 0d683d8711
277 changed files with 50889 additions and 8 deletions

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@ -1,4 +1,516 @@
[
{
"resourceType": "project.ccs",
"resourceClass": [
"example"
],
"resourceSubClass": [
"example.gettingstarted"
],
"description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.",
"name": "dcl_df22",
"location": "../../examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec",
"devtools": [
"AM243x_GP_EVM"
],
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"ticlang"
],
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"dcl_df22",
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"description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.",
"name": "dcl_df22",
"location": "../../examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
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],
"description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is M4FSS0-0 running NORTOS.",
"name": "dcl_df22",
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],
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],
"description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is M4FSS0-0 running FREERTOS.",
"name": "dcl_df22",
"location": "../../examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/example.projectspec",
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"name": "dcl_df22",
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"name": "dcl_df22",
"location": "../../examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec",
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"resourceType": "project.ccs",
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],
"description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.",
"name": "dcl_pi",
"location": "../../examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec",
"devtools": [
"AM243x_GP_EVM"
],
"kernel": [
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],
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"ticlang"
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"resourceType": "project.ccs",
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"description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.",
"name": "dcl_pi",
"location": "../../examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
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"description": "A PI controller example demonstrating the digital control library (DCL). CPU is M4FSS0-0 running NORTOS.",
"name": "dcl_pi",
"location": "../../examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/example.projectspec",
"devtools": [
"AM243x_GP_EVM"
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"name": "dcl_pi",
"location": "../../examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec",
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"description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.",
"name": "dcl_pi",
"location": "../../examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
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"description": "A PI controller example demonstrating the digital control library (DCL). CPU is M4FSS0-0 running NORTOS.",
"name": "dcl_pi",
"location": "../../examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/example.projectspec",
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"description": "A PI controller example demonstrating the digital control library (DCL). CPU is M4FSS0-0 running FREERTOS.",
"name": "dcl_pi",
"location": "../../examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec",
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{
"resourceType": "project.ccs",
"resourceClass": [

View File

@ -1,4 +1,260 @@
[
{
"resourceType": "project.ccs",
"resourceClass": [
"example"
],
"resourceSubClass": [
"example.gettingstarted"
],
"description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.",
"name": "dcl_df22",
"location": "../../examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec",
"devtools": [
"TMDSCNCD263"
],
"kernel": [
"nortos"
],
"compiler": [
"ticlang"
],
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"dcl",
"dcl_df22",
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"description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.",
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"description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.",
"name": "dcl_pi",
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"name": "dcl_pi",
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"resourceType": "project.ccs",
"resourceClass": [
@ -39,6 +295,7 @@
"name": "User Guide",
"location": "../../docs/api_guide_am263x/index.html",
"devtools": [
"TMDSCNCD263",
"LP-AM263"
],
"mainCategories": [

View File

@ -14,6 +14,8 @@ const device_defines = {
};
const example_file_list = [
"examples/dcl/dcl_df22/.project/mcsdk_project.js",
"examples/dcl/dcl_pi/.project/mcsdk_project.js",
"examples/position_sense/endat_diagnostic/single_channel/.project/project.js",
"examples/position_sense/endat_diagnostic/multi_channel_load_share/.project/project.js",
"examples/position_sense/endat_diagnostic/multi_channel_single_pru/.project/project.js",

View File

@ -11,6 +11,8 @@ const device_defines = {
};
const example_file_list = [
"examples/dcl/dcl_df22/.project/mcsdk_project.js",
"examples/dcl/dcl_pi/.project/mcsdk_project.js",
"examples/position_sense/tamagawa_diagnostic_over_soc_uart/.project/project.js",
];

View File

@ -0,0 +1,18 @@
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/dcl.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/dcl_common.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pi/dcl_pi.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pi/dcl_pi2.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pid/dcl_pid.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pid/dcl_pidf64.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df11.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df13.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df22.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df23.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_aux.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_clamp.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_css.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_stability.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_zpk3.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/misc/dcl_error.h
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/misc/dcl_fdlog.h

View File

@ -0,0 +1,144 @@
# Digital Control Library (DCL) {#DCL}
[TOC]
## Introduction
The Sitara™ Digital Control Library (DCL) provides a suite of robust software functions for developers of digital
control applications using the Texas Instruments Sitara MCU. DCL is a header-only library, and all functions in
the library are provided in the form of C source-code.
The DCL contains PI,PID and "Direct Form" controller types. The former are typically used to tune properties of
a transient response, while the latter are typically used to shape the open loop frequency response.
In addintion, DCL contains functions to convert controller parameters from one type to the other. As well as
functions to parameterize the controller given a transfer function.
Several utility modules such as error handling, data logging are also included as a supporting module.
## Features Supported
Supported controller modules (floating-point)
- Linear PI
- Linear PID
- Linear PI with double integrator
- Direct Form 1 (first order)
- Direct Form 1 (third order)
- Direct Form 2 (second order)
- Direct Form 2 (third order)
Other utility modules:
- Error Handling
- Testpoints
- Data Logging
## Features Not Supported
(Compared with C2000Ware's DCL)
- Fix-point controller modules
- Non-linear PID controller
- Reference Generator and performance index
- Multi-channel data logs
## Benchmark Results
A benchmark on R5F core has been conducted to observe the following results when running controller arithmetic:
<table>
<tr>
<th>Controller Function
<th>Cpu Cycles
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> PI Controller </td></tr>
<tr>
<td>DCL_runPISeries</td>
<td>49.15</td>
</tr>
<tr>
<td>DCL_runPIParallel</td>
<td>50.00</td>
</tr>
<tr>
<td>DCL_runPISeriesTustin</td>
<td>56.35</td>
</tr>
<tr>
<td>DCL_runPIParallelEnhanced</td>
<td>62.57</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> PI2 Controller </td></tr>
<tr>
<td>DCL_runPI2Series</td>
<td>74.00</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> PID Controller </td></tr>
<tr>
<td>DCL_runPIDSeries</td>
<td>64.68</td>
</tr>
<tr>
<td>DCL_runPIDParallel</td>
<td>64.84</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> DF11 Controller </td></tr>
<tr>
<td>DCL_runDF11</td>
<td>24.00</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> DF13 Controller </td></tr>
<tr>
<td>DCL_runDF13</td>
<td>43.00</td>
</tr>
<tr>
<td>DCL_runDF13Clamp</td>
<td>53.00</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> DF22 Controller </td></tr>
<tr>
<td>DCL_runDF22</td>
<td>27.00</td>
</tr>
<tr>
<td>DCL_runDF22Clamp</td>
<td>41.00</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> DF23 Controller </td></tr>
<tr>
<td>DCL_runDF23</td>
<td>29.00</td>
</tr>
<tr>
<td>DCL_runDF23Clamp</td>
<td>45.00</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> PID 64bit Controller </td></tr>
<tr>
<td>DCL_runPIDF64Series</td>
<td>185.14</td>
</tr>
<tr>
<td>DCL_runPIDF64Parallel</td>
<td>173.63</td>
</tr>
</table>
- Ran with TI Clang Compiler v2.1.3.LTS, with -Os flag and functions in ram, obtained the average result from 600 consecutive reading of running the controller with DPL CycleCountP.
- Actual result may vary depending on provided datasets and memory configuration.
## Provided Examples
The following examples has been provided to demonstrate the DCL library:
- \ref EXAMPLES_DCL_PI
- \ref EXAMPLES_DCL_DF22
## Additional References {#DCL_ADDITIONAL_REFERENCES}
N/A
## API
\ref DCL_API_MODULE

View File

@ -3,3 +3,5 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/hdsl_example.
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/endat_example.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_example.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_example.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md

View File

@ -13,6 +13,7 @@ INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/rele
INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/release_notes_09_00_00.md
@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg
@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg
@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.cfg
# Used to selectively pick DEVICE specific sections within .md files
ENABLED_SECTIONS = SOC_AM243X

View File

@ -1,2 +1,4 @@
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/examples.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_uart_example.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_uart_example.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md
INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md

View File

@ -10,6 +10,7 @@ PROJECT_NAME = "AM263x Motor Control SDK"
INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/main_page/main_page.md
@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg
@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg
@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.cfg
# Used to selectively pick DEVICE specific sections within .md files
ENABLED_SECTIONS = SOC_AM263X

View File

@ -0,0 +1,97 @@
# DCL DF22 Test {#EXAMPLES_DCL_DF22}
[TOC]
Simple DCL DF22 controller demonstration
This example leverages a direct form 2 2nd order (DF22) compensator from
the digital control library (DCL).
It demonstrates how to setup and run the DF22 controller. The example first
initializes the datalog DCL_FDLOG to the test vector, run the controller
based on the test input and compare the output with the expected value.
## Files and directory structure
<table>
<tr>
<th>Folder/Files
<th>Description
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> ${MOTOR_CONTROL_SDK_PATH}/examples/dcl/dcl_df22/</td></tr>
<tr>
<td>df22_test.c</td>
<td>Main function for DF22 testing</td>
</tr>
<tr>
<td>df22_test.h</td>
<td>Contains all initialization of needed strctures</td>
</tr>
<tr>
<td>data/</td>
<td>Contains pre-generated data files result compares with</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> ${MOTOR_CONTROL_SDK_PATH}/source/dcl</td></tr>
<tr>
<td>dcl/</td>
<td>Folder containing DCL library source</td>
</tr>
</table>
# Supported Combinations {#EXAMPLES_DCL_DF22_COMBO}
\cond SOC_AM64X
Parameter | Value
---------------|-----------
CPU + OS | r5fss0-0 nortos
^ | m4fss0-0 nortos
^ | r5fss0-0 freertos
^ | m4fss0-0 freertos
Toolchain | ti-arm-clang
Board | @VAR_BOARD_NAME_LOWER, @VAR_SK_BOARD_NAME_LOWER
Example folder | examples/dcl/dcl_df22
\endcond
\cond SOC_AM243X
Parameter | Value
---------------|-----------
CPU + OS | r5fss0-0 nortos
^ | m4fss0-0 nortos
^ | r5fss0-0 freertos
^ | m4fss0-0 freertos
Toolchain | ti-arm-clang
Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
Example folder | examples/dcl/dcl_df22
\endcond
\cond SOC_AM263X
Parameter | Value
---------------|-----------
CPU + OS | r5fss0-0 nortos
^ | r5fss0-0 freertos
Toolchain | ti-arm-clang
Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
Example folder | examples/dcl/dcl_df22
\endcond
# Steps to Run the Example
- **When using CCS projects to build**, import the CCS project for the required combination and build it using the CCS project menu (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_PROJECTS_PAGE.html, Using SDK with CCS Projects}).
- **When using makefiles to build**, note the required combination and build using make command (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html, Using SDK with Makefiles}).
- Launch a CCS debug session and run the executable, see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html, CCS Launch\, Load and Run}
### Sample Output
Shown below is a sample output when the application is run:
\code
DF22 test produced 0 error
\endcode

View File

@ -0,0 +1,96 @@
# DCL PI Test {#EXAMPLES_DCL_PI}
[TOC]
Simple DCL PI controller demonstration
This example leverages a PI controller from the digital control library(DCL).
It demonstrates how to setup and run the PI controller. The example first
initializes the datalog DCL_FDLOG to the test vector, run the controller
based on the test input and compare the output with the expected value.
## Files and directory structure
<table>
<tr>
<th>Folder/Files
<th>Description
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> ${MOTOR_CONTROL_SDK_PATH}/examples/dcl/dcl_pi/</td></tr>
<tr>
<td>pi_test.c</td>
<td>Main function for PI testing</td>
</tr>
<tr>
<td>pi_test.h</td>
<td>Contains all initialization of needed strctures</td>
</tr>
<tr>
<td>data/</td>
<td>Contains pre-generated data files result compares with</td>
</tr>
<tr><td colspan="2" bgcolor=#F0F0F0> ${MOTOR_CONTROL_SDK_PATH}/source/dcl</td></tr>
<tr>
<td>dcl/</td>
<td>Folder containing DCL library source</td>
</tr>
</table>
# Supported Combinations {#EXAMPLES_DCL_PI_COMBOS}
\cond SOC_AM64X
Parameter | Value
---------------|-----------
CPU + OS | r5fss0-0 nortos
^ | m4fss0-0 nortos
^ | r5fss0-0 freertos
^ | m4fss0-0 freertos
Toolchain | ti-arm-clang
Board | @VAR_BOARD_NAME_LOWER, @VAR_SK_BOARD_NAME_LOWER
Example folder | examples/dcl/dcl_pi
\endcond
\cond SOC_AM243X
Parameter | Value
---------------|-----------
CPU + OS | r5fss0-0 nortos
^ | m4fss0-0 nortos
^ | r5fss0-0 freertos
^ | m4fss0-0 freertos
Toolchain | ti-arm-clang
Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
Example folder | examples/dcl/dcl_pi
\endcond
\cond SOC_AM263X
Parameter | Value
---------------|-----------
CPU + OS | r5fss0-0 nortos
^ | r5fss0-0 freertos
Toolchain | ti-arm-clang
Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER
Example folder | examples/dcl/dcl_pi
\endcond
# Steps to Run the Example
- **When using CCS projects to build**, import the CCS project for the required combination and build it using the CCS project menu (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_PROJECTS_PAGE.html, Using SDK with CCS Projects}).
- **When using makefiles to build**, note the required combination and build using make command (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html, Using SDK with Makefiles}).
- Launch a CCS debug session and run the executable, see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html, CCS Launch\, Load and Run}
### Sample Output
Shown below is a sample output when the application is run:
\code
PI test produced 0 error
\endcode

View File

@ -1,12 +1,33 @@
# Examples and Demos {#EXAMPLES}
This page lists all the examples and demos supported in this SDK.
\cond SOC_AM64X || SOC_AM243X
-# \subpage EXAMPLE_MOTORCONTROL_ENDAT
-# \subpage EXAMPLE_MOTORCONTROL_HDSL
-# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA
-# \subpage EXAMPLE_MOTORCONTROL_SDFM
\cond SOC_AM64X
- Position Sense
-# \subpage EXAMPLE_MOTORCONTROL_ENDAT
-# \subpage EXAMPLE_MOTORCONTROL_HDSL
-# \subpage EXAMPLE_MOTORCONTROL_HDSL_TRACE
-# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA
- Current Sense
-# \subpage EXAMPLE_MOTORCONTROL_SDFM
\endcond
\cond SOC_AM243X
- Position Sense
-# \subpage EXAMPLE_MOTORCONTROL_ENDAT
-# \subpage EXAMPLE_MOTORCONTROL_HDSL
-# \subpage EXAMPLE_MOTORCONTROL_HDSL_TRACE
-# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA
- Current Sense
-# \subpage EXAMPLE_MOTORCONTROL_SDFM
- RTLibs
-# \subpage EXAMPLES_DCL_PI
-# \subpage EXAMPLES_DCL_DF22
\endcond
\cond SOC_AM263X
-# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA_OVER_UART
- Position Sense
-# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA_OVER_UART
- RTLibs
-# \subpage EXAMPLES_DCL_PI
-# \subpage EXAMPLES_DCL_DF22
\endcond

View File

@ -23,7 +23,7 @@ Given below is a block diagram of the SW modules in this SDK
The main software components in the block diagram specific to motor control are described below
\cond SOC_AM64X || SOC_AM243X
\cond SOC_AM64X
<table>
<tr>
@ -63,6 +63,52 @@ The main software components in the block diagram specific to motor control are
\endcond
\cond SOC_AM243X
<table>
<tr>
<th>Software Components
<th>Documentation Page
<th>Description
</tr>
<tr><td colspan="3" bgcolor=#F0F0F0>**Position Sense Encoders**</td></tr>
<tr>
<td> EnDat
<td>\ref ENDAT
<td> Driver and PRU-ICSS firmware for EnDat encoder interface
</tr>
<tr>
<td> HDSL
<td>\ref HDSL
<td> Driver and PRU-ICSS firmware for Hiperface DSL encoder interface
</tr>
<tr>
<td> Tamagawa
<td>\ref TAMAGAWA
<td> Driver and PRU-ICSS firmware for Tamagawa encoder interface
</tr>
<tr><td colspan="3" bgcolor=#F0F0F0>**Current Sense**</td></tr>
<tr>
<td> %SDFM
<td>\ref SDFM
<td> Driver and firmware for current sense using Sigma-Delta Filtering Module
</tr>
<tr><td colspan="3" bgcolor=#F0F0F0>**Real Time Libraries**</td></tr>
<tr>
<td> Digital Control Library (DCL)
<td>\ref DCL
<td> Header-only library for digital control applications
</tr>
<tr><td colspan="3" bgcolor=#F0F0F0>**Examples and Demos**</td></tr>
<tr>
<td>Examples and Demos
<td>\ref EXAMPLES
<td>Examples and demos showing usage of different SW libraries and APIs for motor control
</tr>
</table>
\endcond
\cond SOC_AM263X
<table>
<tr>

View File

@ -0,0 +1,14 @@
function getComponentProperty(device)
{
return require(`./mcsdk_project_${device}`).getComponentProperty();
};
function getComponentBuildProperty(buildOption)
{
return require(`./mcsdk_project_${buildOption.device}`).getComponentBuildProperty(buildOption);
};
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

View File

@ -0,0 +1,266 @@
let path = require('path');
let device = "am243x";
const files = {
common: [
/* Project Files */
"df22_test.c",
"main.c",
],
};
const projectspec_files = {
common: [
"../../../df22_test.h",
"../../../data",
]
}
/* Relative to where the makefile will be generated
* Typically at <example_folder>/<BOARD>/<core_os_combo>/<compiler>
*/
const filedirs = {
common: [
"..", /* core_os_combo base */
"../../..", /* Example base */
],
};
const libdirs_nortos = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib",
],
};
const libdirs_freertos = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib",
],
};
const includes_nortos_r5f = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/source/dcl"
],
};
const includes_freertos_r5f = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f",
"${MOTOR_CONTROL_SDK_PATH}/source/dcl"
],
};
const includes_nortos_m4f = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/source/dcl"
],
};
const includes_freertos_m4f = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f",
"${MOTOR_CONTROL_SDK_PATH}/source/dcl"
],
};
const libs_nortos_r5f = {
common: [
"nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
"drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
"board.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
],
};
const libs_freertos_r5f = {
common: [
"freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
"drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
"board.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
],
};
const libs_nortos_m4f = {
common: [
"nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib",
"drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib",
"board.am243x.m4f.ti-arm-clang.${ConfigName}.lib",
],
};
const libs_freertos_m4f = {
common: [
"freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib",
"drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib",
"board.am243x.m4f.ti-arm-clang.${ConfigName}.lib",
],
};
const lnkfiles_r5f = {
common: [
"linker.cmd",
"dcl_linker_r5f_am243x_sitara.cmd",
]
};
const lnkfiles_m4f = {
common: [
"linker.cmd",
"dcl_linker_m4f_am243x_sitara.cmd",
]
};
const syscfgfile = "../example.syscfg";
const readmeDoxygenPageTag = "EXAMPLES_DCL_DF22";
const templates_nortos_r5f =
[
{
input: ".project/templates/am243x/common/linker_r5f.cmd.xdt",
output: "linker.cmd",
},
{
input: ".project/templates/am243x/nortos/main_nortos.c.xdt",
output: "../main.c",
options: {
entryFunction: "dcl_df22_main",
},
}
];
const templates_freertos_r5f =
[
{
input: ".project/templates/am243x/common/linker_r5f.cmd.xdt",
output: "linker.cmd",
},
{
input: ".project/templates/am243x/freertos/main_freertos.c.xdt",
output: "../main.c",
options: {
entryFunction: "dcl_df22_main",
},
}
];
const templates_nortos_m4f =
[
{
input: ".project/templates/am243x/common/linker_m4f.cmd.xdt",
output: "linker.cmd",
},
{
input: ".project/templates/am243x/nortos/main_nortos.c.xdt",
output: "../main.c",
options: {
entryFunction: "dcl_df22_main",
},
}
];
const templates_freertos_m4f =
[
{
input: ".project/templates/am243x/common/linker_m4f.cmd.xdt",
output: "linker.cmd",
},
{
input: ".project/templates/am243x/freertos/main_freertos.c.xdt",
output: "../main.c",
options: {
entryFunction: "dcl_df22_main",
},
}
];
const buildOptionCombos = [
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "nortos"},
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"},
{ device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "nortos"},
{ device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"},
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "nortos"},
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"},
{ device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "nortos"},
{ device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"},
];
function getComponentProperty() {
let property = {};
property.dirPath = path.resolve(__dirname, "..");
property.type = "executable";
property.name = "dcl_df22";
property.isInternal = false;
property.tirexResourceSubClass = [ "example.gettingstarted" ];
property.description = "A Direct Form 2 2nd order example demonstrating the digital control library (DCL)."
property.buildOptionCombos = buildOptionCombos;
return property;
}
function getComponentBuildProperty(buildOption) {
let build_property = {};
/* The following build property has been modified for dcl usage,
specifically - added different includes vars distinguishing no/free rtos
added different lnkfiles vars distinguishing cpu-specific lnkfiles
*/
build_property.files = files;
build_property.filedirs = filedirs;
build_property.libdirs = libdirs_nortos;
build_property.syscfgfile = syscfgfile;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
build_property.projectspec_files = projectspec_files;
if(buildOption.cpu.match(/r5f*/)) {
build_property.lnkfiles = lnkfiles_r5f;
if(buildOption.os.match(/freertos*/) )
{
build_property.includes = includes_freertos_r5f;
build_property.libdirs = libdirs_freertos;
build_property.libs = libs_freertos_r5f;
build_property.templates = templates_freertos_r5f;
}
else
{
build_property.includes = includes_nortos_r5f;
build_property.libs = libs_nortos_r5f;
build_property.templates = templates_nortos_r5f;
}
}
if(buildOption.cpu.match(/m4f*/)) {
build_property.lnkfiles = lnkfiles_m4f;
if(buildOption.os.match(/freertos*/) )
{
build_property.includes = includes_freertos_m4f;
build_property.libdirs = libdirs_freertos;
build_property.libs = libs_freertos_m4f;
build_property.templates = templates_freertos_m4f;
}
else
{
build_property.includes = includes_nortos_m4f;
build_property.libs = libs_nortos_m4f;
build_property.templates = templates_nortos_m4f;
}
}
return build_property;
}
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

View File

@ -0,0 +1,178 @@
let path = require('path');
let device = "am263x";
const files = {
common: [
/* Project Files */
"df22_test.c",
"main.c",
],
};
const projectspec_files = {
common: [
"../../../df22_test.h",
"../../../data",
]
}
/* Relative to where the makefile will be generated
* Typically at <example_folder>/<BOARD>/<core_os_combo>/<compiler>
*/
const filedirs = {
common: [
"..", /* core_os_combo base */
"../../..", /* Example base */
],
};
const libdirs_nortos = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib",
],
};
const libdirs_freertos = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib",
],
};
const includes_nortos_r5f = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/source/dcl"
],
};
const includes_freertos_r5f = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f",
"${MOTOR_CONTROL_SDK_PATH}/source/dcl"
],
};
const libs_nortos_r5f = {
common: [
"nortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib",
"drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib",
"board.am263x.r5f.ti-arm-clang.${ConfigName}.lib",
],
};
const libs_freertos_r5f = {
common: [
"freertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib",
"drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib",
"board.am263x.r5f.ti-arm-clang.${ConfigName}.lib",
],
};
const lnkfiles = {
common: [
"linker.cmd",
"dcl_linker_r5f_am263x_sitara.cmd",
]
};
const syscfgfile = "../example.syscfg";
const readmeDoxygenPageTag = "EXAMPLES_DCL_DF22";
const templates_nortos_r5f =
[
{
input: ".project/templates/am263x/common/linker_r5f.cmd.xdt",
output: "linker.cmd",
},
{
input: ".project/templates/am263x/nortos/main_nortos.c.xdt",
output: "../main.c",
options: {
entryFunction: "dcl_df22_main",
},
}
];
const templates_freertos_r5f =
[
{
input: ".project/templates/am263x/common/linker_r5f.cmd.xdt",
output: "linker.cmd",
},
{
input: ".project/templates/am263x/freertos/main_freertos.c.xdt",
output: "../main.c",
options: {
entryFunction: "dcl_df22_main",
},
}
];
const buildOptionCombos = [
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-cc", os: "nortos"},
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-cc", os: "freertos"},
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-lp", os: "nortos"},
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-lp", os: "freertos"},
];
function getComponentProperty() {
let property = {};
property.dirPath = path.resolve(__dirname, "..");
property.type = "executable";
property.name = "dcl_df22";
property.isInternal = false;
property.tirexResourceSubClass = [ "example.gettingstarted" ];
property.description = "A Direct Form 2 2nd order example demonstrating the digital control library (DCL)."
property.buildOptionCombos = buildOptionCombos;
return property;
}
function getComponentBuildProperty(buildOption) {
let build_property = {};
/* The following build property has been modified for dcl usage,
specifically - added different includes vars distinguishing no/free rtos
added different lnkfiles vars for cpu-specific lnk files
*/
build_property.files = files;
build_property.filedirs = filedirs;
build_property.libdirs = libdirs_nortos;
build_property.lnkfiles = lnkfiles;
build_property.syscfgfile = syscfgfile;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
build_property.projectspec_files = projectspec_files;
if(buildOption.cpu.match(/r5f*/)) {
if(buildOption.os.match(/freertos*/) )
{
build_property.includes = includes_freertos_r5f;
build_property.libdirs = libdirs_freertos;
build_property.libs = libs_freertos_r5f;
build_property.templates = templates_freertos_r5f;
}
else
{
build_property.includes = includes_nortos_r5f;
build_property.libs = libs_nortos_r5f;
build_property.templates = templates_nortos_r5f;
}
}
return build_property;
}
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.00"
* @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null}
*/
/**
* Import the modules used in this configuration.
*/
const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false);
const addr_translate1 = addr_translate.addInstance();
const addr_translate2 = addr_translate.addInstance();
const addr_translate3 = addr_translate.addInstance();
const addr_translate4 = addr_translate.addInstance();
const clock = scripting.addModule("/kernel/dpl/clock");
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0";
addr_translate1.localAddr = 0x80000000;
addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1";
addr_translate2.systemAddr = 0x20000000;
addr_translate2.localAddr = 0xA0000000;
addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2";
addr_translate3.systemAddr = 0x40000000;
addr_translate3.localAddr = 0xC0000000;
addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3";
addr_translate4.systemAddr = 0x60000000;
addr_translate4.localAddr = 0x60000000;
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.MCU_UART.$assign = "MCU_USART0";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.attributes = "Device";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 18;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
debug_log.uartLog.MCU_UART.RXD.$suggestSolution = "MCU_UART0_RXD";
debug_log.uartLog.MCU_UART.TXD.$suggestSolution = "MCU_UART0_TXD";

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/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void dcl_df22_main(void *args);
void freertos_main(void *args)
{
dcl_df22_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM M4F_IRAM
#define REG_RAM M4F_IRAM /* M4F_DRAM also works */
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex M.AM2434_ALV"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Debug,
Release,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex M.AM2434_ALV"
deviceCore="Cortex_M4F_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-m4
-mfloat-abi=hard
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context m4fss0-0 --part ALV --package ALV
"
description="A Dcl Df22 FREERTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am243x.m4f.ti-arm-clang.debug.lib
-ldrivers.am243x.m4f.ti-arm-clang.debug.lib
-lboard.am243x.m4f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am243x.m4f.ti-arm-clang.release.lib
-ldrivers.am243x.m4f.ti-arm-clang.release.lib
-lboard.am243x.m4f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_m4f_am243x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */
--retain="*(.vectors)"
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
SECTIONS
{
/* This has the M4F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > M4F_VECS
.text: {} palign(8) > M4F_IRAM /* This is where code resides */
.bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */
.rodata: {} palign(8) > M4F_DRAM /* This is where const's go */
.sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */
.stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */
/* Sections needed for C++ projects */
.ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */
.init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */
.fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */
/* General purpose user shared memory */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM
}
MEMORY
{
M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200
M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00
M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000
/* shared memories that are used by all cores */
/* On M4F,
* - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it
* accessible on M4F
* - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_m4f_am243x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:m4fss0-0:freertos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

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@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.00"
* @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null}
*/
/**
* Import the modules used in this configuration.
*/
const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false);
const addr_translate1 = addr_translate.addInstance();
const addr_translate2 = addr_translate.addInstance();
const addr_translate3 = addr_translate.addInstance();
const addr_translate4 = addr_translate.addInstance();
const clock = scripting.addModule("/kernel/dpl/clock");
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0";
addr_translate1.localAddr = 0x80000000;
addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1";
addr_translate2.systemAddr = 0x20000000;
addr_translate2.localAddr = 0xA0000000;
addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2";
addr_translate3.systemAddr = 0x40000000;
addr_translate3.localAddr = 0xC0000000;
addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3";
addr_translate4.systemAddr = 0x60000000;
addr_translate4.localAddr = 0x60000000;
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.MCU_UART.$assign = "MCU_USART0";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.attributes = "Device";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 18;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
debug_log.uartLog.MCU_UART.RXD.$suggestSolution = "MCU_UART0_RXD";
debug_log.uartLog.MCU_UART.TXD.$suggestSolution = "MCU_UART0_TXD";

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/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
void dcl_df22_main(void *args);
int main(void)
{
System_init();
Board_init();
dcl_df22_main(NULL);
Board_deinit();
System_deinit();
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM M4F_IRAM
#define REG_RAM M4F_IRAM /* M4F_DRAM also works */
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex M.AM2434_ALV"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Debug,
Release,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex M.AM2434_ALV"
deviceCore="Cortex_M4F_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-m4
-mfloat-abi=hard
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context m4fss0-0 --part ALV --package ALV
"
description="A Dcl Df22 NORTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lnortos.am243x.m4f.ti-arm-clang.debug.lib
-ldrivers.am243x.m4f.ti-arm-clang.debug.lib
-lboard.am243x.m4f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lnortos.am243x.m4f.ti-arm-clang.release.lib
-ldrivers.am243x.m4f.ti-arm-clang.release.lib
-lboard.am243x.m4f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_m4f_am243x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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@ -0,0 +1,62 @@
/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */
--retain="*(.vectors)"
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
SECTIONS
{
/* This has the M4F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > M4F_VECS
.text: {} palign(8) > M4F_IRAM /* This is where code resides */
.bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */
.rodata: {} palign(8) > M4F_DRAM /* This is where const's go */
.sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */
.stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */
/* Sections needed for C++ projects */
.ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */
.init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */
.fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */
/* General purpose user shared memory */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM
}
MEMORY
{
M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200
M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00
M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000
/* shared memories that are used by all cores */
/* On M4F,
* - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it
* accessible on M4F
* - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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@ -0,0 +1,300 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_m4f_am243x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lnortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:m4fss0-0:nortos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

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@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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@ -0,0 +1,8 @@
/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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@ -0,0 +1,62 @@
/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.00"
* @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null}
*/
/**
* Import the modules used in this configuration.
*/
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x80000000;
mpu_armv76.size = 31;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";

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@ -0,0 +1,84 @@
/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void dcl_df22_main(void *args);
void freertos_main(void *args)
{
dcl_df22_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */
#define REG_RAM MSRAM
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM2434_ALV"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Debug,
Release,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex R.AM2434_ALV"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part ALV --package ALV
"
description="A Dcl Df22 FREERTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.debug.lib
-ldrivers.am243x.r5f.ti-arm-clang.debug.lib
-lboard.am243x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.release.lib
-ldrivers.am243x.r5f.ti-arm-clang.release.lib
-lboard.am243x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_r5f_am243x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is disabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > MSRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > MSRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > MSRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > MSRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > MSRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
}
/*
NOTE: Below memory is reserved for DMSC usage
- During Boot till security handoff is complete
0x701E0000 - 0x701FFFFF (128KB)
- After "Security Handoff" is complete (i.e at run time)
0x701F4000 - 0x701FFFFF (48KB)
Security handoff is complete when this message is sent to the DMSC,
TISCI_MSG_SEC_HANDOVER
This should be sent once all cores are loaded and all application
specific firewall calls are setup.
*/
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memory segments */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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@ -0,0 +1,305 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_r5f_am243x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

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@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.00"
* @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null}
*/
/**
* Import the modules used in this configuration.
*/
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x80000000;
mpu_armv76.size = 31;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";

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/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
void dcl_df22_main(void *args);
int main(void)
{
System_init();
Board_init();
dcl_df22_main(NULL);
Board_deinit();
System_deinit();
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */
#define REG_RAM MSRAM
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM2434_ALV"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Debug,
Release,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex R.AM2434_ALV"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part ALV --package ALV
"
description="A Dcl Df22 NORTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lnortos.am243x.r5f.ti-arm-clang.debug.lib
-ldrivers.am243x.r5f.ti-arm-clang.debug.lib
-lboard.am243x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lnortos.am243x.r5f.ti-arm-clang.release.lib
-ldrivers.am243x.r5f.ti-arm-clang.release.lib
-lboard.am243x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_r5f_am243x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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@ -0,0 +1,148 @@
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is disabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > MSRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > MSRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > MSRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > MSRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > MSRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
}
/*
NOTE: Below memory is reserved for DMSC usage
- During Boot till security handoff is complete
0x701E0000 - 0x701FFFFF (128KB)
- After "Security Handoff" is complete (i.e at run time)
0x701F4000 - 0x701FFFFF (48KB)
Security handoff is complete when this message is sent to the DMSC,
TISCI_MSG_SEC_HANDOVER
This should be sent once all cores are loaded and all application
specific firewall calls are setup.
*/
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memory segments */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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@ -0,0 +1,302 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_r5f_am243x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lnortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:nortos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

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@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.01"
* @versions {"tool":"1.9.0+2015","templates":null}
*/
/**
* Import the modules used in this configuration.
*/
const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false);
const addr_translate1 = addr_translate.addInstance();
const addr_translate2 = addr_translate.addInstance();
const addr_translate3 = addr_translate.addInstance();
const addr_translate4 = addr_translate.addInstance();
const clock = scripting.addModule("/kernel/dpl/clock");
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0";
addr_translate1.localAddr = 0x80000000;
addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1";
addr_translate2.systemAddr = 0x20000000;
addr_translate2.localAddr = 0xA0000000;
addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2";
addr_translate3.systemAddr = 0x40000000;
addr_translate3.localAddr = 0xC0000000;
addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3";
addr_translate4.systemAddr = 0x60000000;
addr_translate4.localAddr = 0x60000000;
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.attributes = "Device";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 18;

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@ -0,0 +1,84 @@
/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void dcl_df22_main(void *args);
void freertos_main(void *args)
{
dcl_df22_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM M4F_IRAM
#define REG_RAM M4F_IRAM /* M4F_DRAM also works */
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex M.AM2434_ALX"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Debug,
Release,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex M.AM2434_ALX"
deviceCore="Cortex_M4F_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-m4
-mfloat-abi=hard
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context m4fss0-0 --part ALX --package ALX
"
description="A Dcl Df22 FREERTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am243x.m4f.ti-arm-clang.debug.lib
-ldrivers.am243x.m4f.ti-arm-clang.debug.lib
-lboard.am243x.m4f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am243x.m4f.ti-arm-clang.release.lib
-ldrivers.am243x.m4f.ti-arm-clang.release.lib
-lboard.am243x.m4f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_m4f_am243x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */
--retain="*(.vectors)"
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
SECTIONS
{
/* This has the M4F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > M4F_VECS
.text: {} palign(8) > M4F_IRAM /* This is where code resides */
.bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */
.rodata: {} palign(8) > M4F_DRAM /* This is where const's go */
.sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */
.stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */
/* Sections needed for C++ projects */
.ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */
.init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */
.fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */
/* General purpose user shared memory */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM
}
MEMORY
{
M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200
M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00
M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000
/* shared memories that are used by all cores */
/* On M4F,
* - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it
* accessible on M4F
* - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_m4f_am243x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:m4fss0-0:freertos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

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@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.01"
* @versions {"tool":"1.9.0+2015","templates":null}
*/
/**
* Import the modules used in this configuration.
*/
const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false);
const addr_translate1 = addr_translate.addInstance();
const addr_translate2 = addr_translate.addInstance();
const addr_translate3 = addr_translate.addInstance();
const addr_translate4 = addr_translate.addInstance();
const clock = scripting.addModule("/kernel/dpl/clock");
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0";
addr_translate1.localAddr = 0x80000000;
addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1";
addr_translate2.systemAddr = 0x20000000;
addr_translate2.localAddr = 0xA0000000;
addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2";
addr_translate3.systemAddr = 0x40000000;
addr_translate3.localAddr = 0xC0000000;
addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3";
addr_translate4.systemAddr = 0x60000000;
addr_translate4.localAddr = 0x60000000;
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.attributes = "Device";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 18;

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/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
void dcl_df22_main(void *args);
int main(void)
{
System_init();
Board_init();
dcl_df22_main(NULL);
Board_deinit();
System_deinit();
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM M4F_IRAM
#define REG_RAM M4F_IRAM /* M4F_DRAM also works */
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex M.AM2434_ALX"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Debug,
Release,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex M.AM2434_ALX"
deviceCore="Cortex_M4F_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-m4
-mfloat-abi=hard
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context m4fss0-0 --part ALX --package ALX
"
description="A Dcl Df22 NORTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lnortos.am243x.m4f.ti-arm-clang.debug.lib
-ldrivers.am243x.m4f.ti-arm-clang.debug.lib
-lboard.am243x.m4f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lnortos.am243x.m4f.ti-arm-clang.release.lib
-ldrivers.am243x.m4f.ti-arm-clang.release.lib
-lboard.am243x.m4f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_m4f_am243x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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@ -0,0 +1,62 @@
/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */
--retain="*(.vectors)"
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
SECTIONS
{
/* This has the M4F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > M4F_VECS
.text: {} palign(8) > M4F_IRAM /* This is where code resides */
.bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */
.rodata: {} palign(8) > M4F_DRAM /* This is where const's go */
.sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */
.stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */
/* Sections needed for C++ projects */
.ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */
.init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */
.fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */
/* General purpose user shared memory */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM
}
MEMORY
{
M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200
M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00
M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000
/* shared memories that are used by all cores */
/* On M4F,
* - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it
* accessible on M4F
* - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_m4f_am243x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lnortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:m4fss0-0:nortos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

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@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.01"
* @versions {"data":"2021040816","timestamp":"2021040816","tool":"1.8.1+1900","templates":null}
*/
/**
* Import the modules used in this configuration.
*/
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
debug_log.uartLog.UART.RXD.$suggestSolution = "B10";
debug_log.uartLog.UART.TXD.$suggestSolution = "B11";

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@ -0,0 +1,84 @@
/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void dcl_df22_main(void *args);
void freertos_main(void *args)
{
dcl_df22_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */
#define REG_RAM MSRAM
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM2434_ALX"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Debug,
Release,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex R.AM2434_ALX"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part ALX --package ALX
"
description="A Dcl Df22 FREERTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.debug.lib
-ldrivers.am243x.r5f.ti-arm-clang.debug.lib
-lboard.am243x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.release.lib
-ldrivers.am243x.r5f.ti-arm-clang.release.lib
-lboard.am243x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_r5f_am243x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is disabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > MSRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > MSRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > MSRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > MSRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > MSRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
}
/*
NOTE: Below memory is reserved for DMSC usage
- During Boot till security handoff is complete
0x701E0000 - 0x701FFFFF (128KB)
- After "Security Handoff" is complete (i.e at run time)
0x701F4000 - 0x701FFFFF (48KB)
Security handoff is complete when this message is sent to the DMSC,
TISCI_MSG_SEC_HANDOVER
This should be sent once all cores are loaded and all application
specific firewall calls are setup.
*/
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memory segments */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

View File

@ -0,0 +1,305 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_r5f_am243x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

View File

@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.01"
* @versions {"data":"2021040816","timestamp":"2021040816","tool":"1.8.1+1900","templates":null}
*/
/**
* Import the modules used in this configuration.
*/
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
debug_log.uartLog.UART.RXD.$suggestSolution = "B10";
debug_log.uartLog.UART.TXD.$suggestSolution = "B11";

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/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
void dcl_df22_main(void *args);
int main(void)
{
System_init();
Board_init();
dcl_df22_main(NULL);
Board_deinit();
System_deinit();
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */
#define REG_RAM MSRAM
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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@ -0,0 +1,114 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM2434_ALX"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Debug,
Release,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex R.AM2434_ALX"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part ALX --package ALX
"
description="A Dcl Df22 NORTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lnortos.am243x.r5f.ti-arm-clang.debug.lib
-ldrivers.am243x.r5f.ti-arm-clang.debug.lib
-lboard.am243x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lnortos.am243x.r5f.ti-arm-clang.release.lib
-ldrivers.am243x.r5f.ti-arm-clang.release.lib
-lboard.am243x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_r5f_am243x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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@ -0,0 +1,148 @@
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is disabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > MSRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > MSRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > MSRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > MSRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > MSRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
}
/*
NOTE: Below memory is reserved for DMSC usage
- During Boot till security handoff is complete
0x701E0000 - 0x701FFFFF (128KB)
- After "Security Handoff" is complete (i.e at run time)
0x701F4000 - 0x701FFFFF (48KB)
Security handoff is complete when this message is sent to the DMSC,
TISCI_MSG_SEC_HANDOVER
This should be sent once all cores are loaded and all application
specific firewall calls are setup.
*/
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memory segments */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_r5f_am243x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lnortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:nortos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

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@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00"
* @versions {"tool":"1.14.0+2667"}
*/
/**
* Import the modules used in this configuration.
*/
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART0";
debug_log.uartLog.UART.$assign = "UART0";
debug_log.uartLog.UART.RXD.$assign = "ball.A7";
debug_log.uartLog.UART.TXD.$assign = "ball.A6";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x80000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x50D00000;
mpu_armv75.size = 14;
mpu_armv75.allowExecute = false;
mpu_armv75.attributes = "Device";
mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x72000000;
mpu_armv76.size = 14;
mpu_armv76.allowExecute = false;
mpu_armv76.attributes = "NonCached";

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@ -0,0 +1,84 @@
/*
* Copyright (C) 2018-2022 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void dcl_df22_main(void *args);
void freertos_main(void *args)
{
dcl_df22_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

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/*
* This linker file is optional, it's complementary to the device/core linker file
* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...)))
* and link to a specific memory region for the best performance
*/
/* Define core & platform specific variables */
#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */
#define REG_RAM OCRAM
SECTIONS
{
/* dcl functions mapped to on-chip fast ram */
dclfuncs : {} > FAST_RAM
/* optional -- map datas & variables to regular ram */
/* Sitara default linker should already map variables to ram */
dclDataSection : {} > REG_RAM
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM263x"
/>
</when>
</applicability>
<project
title="Dcl Df22"
name = "dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
Debug,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="2.1.3"
device="Cortex R.AM263x"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM263X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${CG_TOOL_ROOT}/lib
-m=dcl_df22.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am263x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part AM263x --package ZCZ
"
description="A Dcl Df22 FREERTOS project">
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am263x.r5f.ti-arm-clang.debug.lib
-ldrivers.am263x.r5f.ti-arm-clang.debug.lib
-lboard.am263x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am263x.r5f.ti-arm-clang.release.lib
-ldrivers.am263x.r5f.ti-arm-clang.release.lib
-lboard.am263x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../df22_test.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="dcl_linker_r5f_am263x_sitara.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am263x/EXAMPLES_DCL_DF22.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="../../../df22_test.h" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="../../../data" openOnCreation="false" excludeFromBuild="true" action="copy">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is enabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > OCRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > OCRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > OCRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > OCRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > OCRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > OCRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* this is used only when Secure IPC is enabled */
.bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM
.bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F
}
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memories that are used by RTOS/NORTOS cores */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000
LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000
/* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80
MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE
MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE
}

View File

@ -0,0 +1,276 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=dcl_df22.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp
FILES_common := \
df22_test.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/source/dcl \
-Igenerated \
DEFINES_common := \
-DSOC_AM263X \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
dcl_linker_r5f_am263x_sitara.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(BOOTIMAGE_NAME)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am263x:r5fss0-0:freertos:ti-arm-clang dcl_df22 ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 0
BOOTIMAGE_CORE_ID_r5fss0-1 = 1
BOOTIMAGE_CORE_ID_r5fss1-0 = 2
BOOTIMAGE_CORE_ID_r5fss1-1 = 3
SBL_RUN_ADDRESS=0x70002000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
-include $(addprefix $(OBJDIR)/, $(DEPS))

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@ -0,0 +1,84 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 0
BOOTIMAGE_CORE_ID_r5fss0-1 = 1
BOOTIMAGE_CORE_ID_r5fss1-0 = 2
BOOTIMAGE_CORE_ID_r5fss1-1 = 3
SBL_RUN_ADDRESS=0x70002000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
endif

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@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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@ -0,0 +1,8 @@
/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"kernel/freertos/rov/FreeRTOS.rov.js",
];

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@ -0,0 +1,59 @@
/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00"
* @versions {"tool":"1.14.0+2667"}
*/
/**
* Import the modules used in this configuration.
*/
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART0";
debug_log.uartLog.UART.$assign = "UART0";
debug_log.uartLog.UART.RXD.$assign = "ball.A7";
debug_log.uartLog.UART.TXD.$assign = "ball.A6";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x80000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x50D00000;
mpu_armv75.size = 14;
mpu_armv75.allowExecute = false;
mpu_armv75.attributes = "Device";
mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x72000000;
mpu_armv76.size = 14;
mpu_armv76.allowExecute = false;
mpu_armv76.attributes = "NonCached";

View File

@ -0,0 +1,50 @@
/*
* Copyright (C) 2018-2022 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
void dcl_df22_main(void *args);
int main(void)
{
System_init();
Board_init();
dcl_df22_main(NULL);
Board_deinit();
System_deinit();
return 0;
}

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