diff --git a/.metadata/.tirex/am243x.content.tirex.json b/.metadata/.tirex/am243x.content.tirex.json index 34c9094..ac45f17 100644 --- a/.metadata/.tirex/am243x.content.tirex.json +++ b/.metadata/.tirex/am243x.content.tirex.json @@ -1,4 +1,516 @@ [ + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). 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CPU is M4FSS0-0 running FREERTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "m4fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "project.ccs", "resourceClass": [ diff --git a/.metadata/.tirex/am263x.content.tirex.json b/.metadata/.tirex/am263x.content.tirex.json index bc8b3c1..d8a821a 100644 --- a/.metadata/.tirex/am263x.content.tirex.json +++ b/.metadata/.tirex/am263x.content.tirex.json @@ -1,4 +1,260 @@ [ + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "TMDSCNCD263" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "TMDSCNCD263" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "LP-AM263" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "LP-AM263" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "TMDSCNCD263" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "TMDSCNCD263" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "LP-AM263" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "LP-AM263" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "project.ccs", "resourceClass": [ @@ -39,6 +295,7 @@ "name": "User Guide", "location": "../../docs/api_guide_am263x/index.html", "devtools": [ + "TMDSCNCD263", "LP-AM263" ], "mainCategories": [ diff --git a/.project/device/project_am243x.js b/.project/device/project_am243x.js index 3511b9e..acf00e9 100644 --- a/.project/device/project_am243x.js +++ b/.project/device/project_am243x.js @@ -14,6 +14,8 @@ const device_defines = { }; const example_file_list = [ + "examples/dcl/dcl_df22/.project/mcsdk_project.js", + "examples/dcl/dcl_pi/.project/mcsdk_project.js", "examples/position_sense/endat_diagnostic/single_channel/.project/project.js", "examples/position_sense/endat_diagnostic/multi_channel_load_share/.project/project.js", "examples/position_sense/endat_diagnostic/multi_channel_single_pru/.project/project.js", diff --git a/.project/device/project_am263x.js b/.project/device/project_am263x.js index c04e672..6f6cb12 100644 --- a/.project/device/project_am263x.js +++ b/.project/device/project_am263x.js @@ -11,6 +11,8 @@ const device_defines = { }; const example_file_list = [ + "examples/dcl/dcl_df22/.project/mcsdk_project.js", + "examples/dcl/dcl_pi/.project/mcsdk_project.js", "examples/position_sense/tamagawa_diagnostic_over_soc_uart/.project/project.js", ]; diff --git a/docs_src/docs/api_guide/components/dcl/dcl.cfg b/docs_src/docs/api_guide/components/dcl/dcl.cfg new file mode 100644 index 0000000..80a55d6 --- /dev/null +++ b/docs_src/docs/api_guide/components/dcl/dcl.cfg @@ -0,0 +1,18 @@ +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/dcl.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/dcl_common.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pi/dcl_pi.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pi/dcl_pi2.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pid/dcl_pid.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pid/dcl_pidf64.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df11.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df13.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df22.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df23.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_aux.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_clamp.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_css.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_stability.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_zpk3.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/misc/dcl_error.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/misc/dcl_fdlog.h \ No newline at end of file diff --git a/docs_src/docs/api_guide/components/dcl/dcl.md b/docs_src/docs/api_guide/components/dcl/dcl.md new file mode 100644 index 0000000..5ccd009 --- /dev/null +++ b/docs_src/docs/api_guide/components/dcl/dcl.md @@ -0,0 +1,144 @@ +# Digital Control Library (DCL) {#DCL} + +[TOC] + +## Introduction + +The Sitara™ Digital Control Library (DCL) provides a suite of robust software functions for developers of digital +control applications using the Texas Instruments Sitara MCU. DCL is a header-only library, and all functions in +the library are provided in the form of C source-code. + +The DCL contains PI,PID and "Direct Form" controller types. The former are typically used to tune properties of +a transient response, while the latter are typically used to shape the open loop frequency response. + +In addintion, DCL contains functions to convert controller parameters from one type to the other. As well as +functions to parameterize the controller given a transfer function. + +Several utility modules such as error handling, data logging are also included as a supporting module. + +## Features Supported + +Supported controller modules (floating-point) + +- Linear PI +- Linear PID +- Linear PI with double integrator +- Direct Form 1 (first order) +- Direct Form 1 (third order) +- Direct Form 2 (second order) +- Direct Form 2 (third order) + +Other utility modules: + +- Error Handling +- Testpoints +- Data Logging + +## Features Not Supported + +(Compared with C2000Ware's DCL) +- Fix-point controller modules +- Non-linear PID controller +- Reference Generator and performance index +- Multi-channel data logs + +## Benchmark Results + +A benchmark on R5F core has been conducted to observe the following results when running controller arithmetic: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Controller Function + Cpu Cycles +
PI Controller
DCL_runPISeries49.15
DCL_runPIParallel50.00
DCL_runPISeriesTustin56.35
DCL_runPIParallelEnhanced62.57
PI2 Controller
DCL_runPI2Series74.00
PID Controller
DCL_runPIDSeries64.68
DCL_runPIDParallel64.84
DF11 Controller
DCL_runDF1124.00
DF13 Controller
DCL_runDF1343.00
DCL_runDF13Clamp53.00
DF22 Controller
DCL_runDF2227.00
DCL_runDF22Clamp41.00
DF23 Controller
DCL_runDF2329.00
DCL_runDF23Clamp45.00
PID 64bit Controller
DCL_runPIDF64Series185.14
DCL_runPIDF64Parallel173.63
+ +- Ran with TI Clang Compiler v2.1.3.LTS, with -Os flag and functions in ram, obtained the average result from 600 consecutive reading of running the controller with DPL CycleCountP. +- Actual result may vary depending on provided datasets and memory configuration. + +## Provided Examples + +The following examples has been provided to demonstrate the DCL library: + +- \ref EXAMPLES_DCL_PI +- \ref EXAMPLES_DCL_DF22 + +## Additional References {#DCL_ADDITIONAL_REFERENCES} + +N/A + +## API + +\ref DCL_API_MODULE diff --git a/docs_src/docs/api_guide/device/am243x/examples.cfg b/docs_src/docs/api_guide/device/am243x/examples.cfg index 532c41e..6a45b03 100644 --- a/docs_src/docs/api_guide/device/am243x/examples.cfg +++ b/docs_src/docs/api_guide/device/am243x/examples.cfg @@ -3,3 +3,5 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/hdsl_example. INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/endat_example.md INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_example.md INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md diff --git a/docs_src/docs/api_guide/device/am243x/includes.cfg b/docs_src/docs/api_guide/device/am243x/includes.cfg index f3c5b15..a515d42 100644 --- a/docs_src/docs/api_guide/device/am243x/includes.cfg +++ b/docs_src/docs/api_guide/device/am243x/includes.cfg @@ -13,6 +13,7 @@ INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/rele INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/release_notes_09_00_00.md @INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg @INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.cfg # Used to selectively pick DEVICE specific sections within .md files ENABLED_SECTIONS = SOC_AM243X diff --git a/docs_src/docs/api_guide/device/am263x/examples.cfg b/docs_src/docs/api_guide/device/am263x/examples.cfg index 69164ef..00a46fe 100644 --- a/docs_src/docs/api_guide/device/am263x/examples.cfg +++ b/docs_src/docs/api_guide/device/am263x/examples.cfg @@ -1,2 +1,4 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/examples.md -INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_uart_example.md \ No newline at end of file +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_uart_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md \ No newline at end of file diff --git a/docs_src/docs/api_guide/device/am263x/includes.cfg b/docs_src/docs/api_guide/device/am263x/includes.cfg index daafc25..9534baf 100644 --- a/docs_src/docs/api_guide/device/am263x/includes.cfg +++ b/docs_src/docs/api_guide/device/am263x/includes.cfg @@ -10,6 +10,7 @@ PROJECT_NAME = "AM263x Motor Control SDK" INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/main_page/main_page.md @INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg @INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.cfg # Used to selectively pick DEVICE specific sections within .md files ENABLED_SECTIONS = SOC_AM263X diff --git a/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md b/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md new file mode 100644 index 0000000..28295a0 --- /dev/null +++ b/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md @@ -0,0 +1,97 @@ +# DCL DF22 Test {#EXAMPLES_DCL_DF22} + +[TOC] + +Simple DCL DF22 controller demonstration + +This example leverages a direct form 2 2nd order (DF22) compensator from +the digital control library (DCL). + +It demonstrates how to setup and run the DF22 controller. The example first +initializes the datalog DCL_FDLOG to the test vector, run the controller +based on the test input and compare the output with the expected value. + + +## Files and directory structure + + + + + + + + + + + + + + + + + + + + + + +
Folder/Files + Description +
${MOTOR_CONTROL_SDK_PATH}/examples/dcl/dcl_df22/
df22_test.cMain function for DF22 testing
df22_test.hContains all initialization of needed strctures
data/Contains pre-generated data files result compares with
${MOTOR_CONTROL_SDK_PATH}/source/dcl
dcl/Folder containing DCL library source
+ +# Supported Combinations {#EXAMPLES_DCL_DF22_COMBO} + +\cond SOC_AM64X + + Parameter | Value + ---------------|----------- + CPU + OS | r5fss0-0 nortos + ^ | m4fss0-0 nortos + ^ | r5fss0-0 freertos + ^ | m4fss0-0 freertos + Toolchain | ti-arm-clang + Board | @VAR_BOARD_NAME_LOWER, @VAR_SK_BOARD_NAME_LOWER + Example folder | examples/dcl/dcl_df22 + +\endcond + +\cond SOC_AM243X + + Parameter | Value + ---------------|----------- + CPU + OS | r5fss0-0 nortos + ^ | m4fss0-0 nortos + ^ | r5fss0-0 freertos + ^ | m4fss0-0 freertos + Toolchain | ti-arm-clang + Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER + Example folder | examples/dcl/dcl_df22 + +\endcond + +\cond SOC_AM263X + + Parameter | Value + ---------------|----------- + CPU + OS | r5fss0-0 nortos + ^ | r5fss0-0 freertos + Toolchain | ti-arm-clang + Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER + Example folder | examples/dcl/dcl_df22 + +\endcond + +# Steps to Run the Example + +- **When using CCS projects to build**, import the CCS project for the required combination and build it using the CCS project menu (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_PROJECTS_PAGE.html, Using SDK with CCS Projects}). +- **When using makefiles to build**, note the required combination and build using make command (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html, Using SDK with Makefiles}). +- Launch a CCS debug session and run the executable, see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html, CCS Launch\, Load and Run} + + +### Sample Output + +Shown below is a sample output when the application is run: + +\code +DF22 test produced 0 error +\endcode diff --git a/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md b/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md new file mode 100644 index 0000000..9618edb --- /dev/null +++ b/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md @@ -0,0 +1,96 @@ +# DCL PI Test {#EXAMPLES_DCL_PI} + +[TOC] + +Simple DCL PI controller demonstration + +This example leverages a PI controller from the digital control library(DCL). +It demonstrates how to setup and run the PI controller. The example first +initializes the datalog DCL_FDLOG to the test vector, run the controller +based on the test input and compare the output with the expected value. + + +## Files and directory structure + + + + + + + + + + + + + + + + + + + + + + +
Folder/Files + Description +
${MOTOR_CONTROL_SDK_PATH}/examples/dcl/dcl_pi/
pi_test.cMain function for PI testing
pi_test.hContains all initialization of needed strctures
data/Contains pre-generated data files result compares with
${MOTOR_CONTROL_SDK_PATH}/source/dcl
dcl/Folder containing DCL library source
+ +# Supported Combinations {#EXAMPLES_DCL_PI_COMBOS} + +\cond SOC_AM64X + + Parameter | Value + ---------------|----------- + CPU + OS | r5fss0-0 nortos + ^ | m4fss0-0 nortos + ^ | r5fss0-0 freertos + ^ | m4fss0-0 freertos + Toolchain | ti-arm-clang + Board | @VAR_BOARD_NAME_LOWER, @VAR_SK_BOARD_NAME_LOWER + Example folder | examples/dcl/dcl_pi + +\endcond + +\cond SOC_AM243X + + Parameter | Value + ---------------|----------- + CPU + OS | r5fss0-0 nortos + ^ | m4fss0-0 nortos + ^ | r5fss0-0 freertos + ^ | m4fss0-0 freertos + Toolchain | ti-arm-clang + Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER + Example folder | examples/dcl/dcl_pi + +\endcond + +\cond SOC_AM263X + + Parameter | Value + ---------------|----------- + CPU + OS | r5fss0-0 nortos + ^ | r5fss0-0 freertos + Toolchain | ti-arm-clang + Boards | @VAR_BOARD_NAME_LOWER, @VAR_LP_BOARD_NAME_LOWER + Example folder | examples/dcl/dcl_pi + +\endcond + +# Steps to Run the Example + +- **When using CCS projects to build**, import the CCS project for the required combination and build it using the CCS project menu (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_PROJECTS_PAGE.html, Using SDK with CCS Projects}). +- **When using makefiles to build**, note the required combination and build using make command (see \htmllink{@VAR_MCU_SDK_DOCS_PATH/MAKEFILE_BUILD_PAGE.html, Using SDK with Makefiles}). +- Launch a CCS debug session and run the executable, see \htmllink{@VAR_MCU_SDK_DOCS_PATH/CCS_LAUNCH_PAGE.html, CCS Launch\, Load and Run} + + + +### Sample Output + +Shown below is a sample output when the application is run: + +\code +PI test produced 0 error +\endcode diff --git a/docs_src/docs/api_guide/examples/examples.md b/docs_src/docs/api_guide/examples/examples.md index 6ae6194..428226b 100644 --- a/docs_src/docs/api_guide/examples/examples.md +++ b/docs_src/docs/api_guide/examples/examples.md @@ -1,12 +1,33 @@ # Examples and Demos {#EXAMPLES} This page lists all the examples and demos supported in this SDK. -\cond SOC_AM64X || SOC_AM243X --# \subpage EXAMPLE_MOTORCONTROL_ENDAT --# \subpage EXAMPLE_MOTORCONTROL_HDSL --# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA --# \subpage EXAMPLE_MOTORCONTROL_SDFM + +\cond SOC_AM64X +- Position Sense + -# \subpage EXAMPLE_MOTORCONTROL_ENDAT + -# \subpage EXAMPLE_MOTORCONTROL_HDSL + -# \subpage EXAMPLE_MOTORCONTROL_HDSL_TRACE + -# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA +- Current Sense + -# \subpage EXAMPLE_MOTORCONTROL_SDFM +\endcond + +\cond SOC_AM243X +- Position Sense + -# \subpage EXAMPLE_MOTORCONTROL_ENDAT + -# \subpage EXAMPLE_MOTORCONTROL_HDSL + -# \subpage EXAMPLE_MOTORCONTROL_HDSL_TRACE + -# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA +- Current Sense + -# \subpage EXAMPLE_MOTORCONTROL_SDFM +- RTLibs + -# \subpage EXAMPLES_DCL_PI + -# \subpage EXAMPLES_DCL_DF22 \endcond \cond SOC_AM263X --# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA_OVER_UART +- Position Sense + -# \subpage EXAMPLE_MOTORCONTROL_TAMAGAWA_OVER_UART +- RTLibs + -# \subpage EXAMPLES_DCL_PI + -# \subpage EXAMPLES_DCL_DF22 \endcond \ No newline at end of file diff --git a/docs_src/docs/api_guide/main_page/main_page.md b/docs_src/docs/api_guide/main_page/main_page.md index 31ddc16..71ef526 100644 --- a/docs_src/docs/api_guide/main_page/main_page.md +++ b/docs_src/docs/api_guide/main_page/main_page.md @@ -23,7 +23,7 @@ Given below is a block diagram of the SW modules in this SDK The main software components in the block diagram specific to motor control are described below -\cond SOC_AM64X || SOC_AM243X +\cond SOC_AM64X @@ -63,6 +63,52 @@ The main software components in the block diagram specific to motor control are \endcond +\cond SOC_AM243X + +
+ + + + + + + + + + + + + + + + + + +
Software Components + Documentation Page + Description +
**Position Sense Encoders**
EnDat + \ref ENDAT + Driver and PRU-ICSS firmware for EnDat encoder interface +
HDSL + \ref HDSL + Driver and PRU-ICSS firmware for Hiperface DSL encoder interface +
Tamagawa + \ref TAMAGAWA + Driver and PRU-ICSS firmware for Tamagawa encoder interface +
**Current Sense**
%SDFM + \ref SDFM + Driver and firmware for current sense using Sigma-Delta Filtering Module +
**Real Time Libraries**
Digital Control Library (DCL) + \ref DCL + Header-only library for digital control applications +
**Examples and Demos**
Examples and Demos + \ref EXAMPLES + Examples and demos showing usage of different SW libraries and APIs for motor control +
+ +\endcond + \cond SOC_AM263X diff --git a/examples/dcl/dcl_df22/.project/mcsdk_project.js b/examples/dcl/dcl_df22/.project/mcsdk_project.js new file mode 100644 index 0000000..4c25148 --- /dev/null +++ b/examples/dcl/dcl_df22/.project/mcsdk_project.js @@ -0,0 +1,14 @@ +function getComponentProperty(device) +{ + return require(`./mcsdk_project_${device}`).getComponentProperty(); +}; + +function getComponentBuildProperty(buildOption) +{ + return require(`./mcsdk_project_${buildOption.device}`).getComponentBuildProperty(buildOption); +}; + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/dcl/dcl_df22/.project/mcsdk_project_am243x.js b/examples/dcl/dcl_df22/.project/mcsdk_project_am243x.js new file mode 100644 index 0000000..1b43f1b --- /dev/null +++ b/examples/dcl/dcl_df22/.project/mcsdk_project_am243x.js @@ -0,0 +1,266 @@ +let path = require('path'); + +let device = "am243x"; + +const files = { + common: [ + /* Project Files */ + "df22_test.c", + "main.c", + ], +}; + +const projectspec_files = { + common: [ + "../../../df22_test.h", + "../../../data", + ] +} + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", /* Example base */ + ], +}; + +const libdirs_nortos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + ], +}; + +const includes_nortos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const includes_nortos_m4f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const includes_freertos_m4f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f", + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const libs_nortos_r5f = { + common: [ + "nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const libs_nortos_m4f = { + common: [ + "nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const libs_freertos_m4f = { + common: [ + "freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const lnkfiles_r5f = { + common: [ + "linker.cmd", + "dcl_linker_r5f_am243x_sitara.cmd", + ] +}; + +const lnkfiles_m4f = { + common: [ + "linker.cmd", + "dcl_linker_m4f_am243x_sitara.cmd", + ] +}; + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLES_DCL_DF22"; + +const templates_nortos_r5f = +[ + { + input: ".project/templates/am243x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/nortos/main_nortos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_df22_main", + }, + } +]; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am243x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_df22_main", + }, + } +]; + + +const templates_nortos_m4f = +[ + { + input: ".project/templates/am243x/common/linker_m4f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/nortos/main_nortos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_df22_main", + }, + } +]; + +const templates_freertos_m4f = +[ + { + input: ".project/templates/am243x/common/linker_m4f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_df22_main", + }, + } +]; + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "nortos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"}, + { device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "nortos"}, + { device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "nortos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"}, + { device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "nortos"}, + { device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "dcl_df22"; + property.isInternal = false; + property.tirexResourceSubClass = [ "example.gettingstarted" ]; + property.description = "A Direct Form 2 2nd order example demonstrating the digital control library (DCL)." + property.buildOptionCombos = buildOptionCombos; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + /* The following build property has been modified for dcl usage, + specifically - added different includes vars distinguishing no/free rtos + added different lnkfiles vars distinguishing cpu-specific lnkfiles + */ + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.libdirs = libdirs_nortos; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + build_property.projectspec_files = projectspec_files; + + if(buildOption.cpu.match(/r5f*/)) { + build_property.lnkfiles = lnkfiles_r5f; + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + } + else + { + build_property.includes = includes_nortos_r5f; + build_property.libs = libs_nortos_r5f; + build_property.templates = templates_nortos_r5f; + } + } + if(buildOption.cpu.match(/m4f*/)) { + build_property.lnkfiles = lnkfiles_m4f; + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_m4f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_m4f; + build_property.templates = templates_freertos_m4f; + } + else + { + build_property.includes = includes_nortos_m4f; + build_property.libs = libs_nortos_m4f; + build_property.templates = templates_nortos_m4f; + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/dcl/dcl_df22/.project/mcsdk_project_am263x.js b/examples/dcl/dcl_df22/.project/mcsdk_project_am263x.js new file mode 100644 index 0000000..891ddc9 --- /dev/null +++ b/examples/dcl/dcl_df22/.project/mcsdk_project_am263x.js @@ -0,0 +1,178 @@ +let path = require('path'); + +let device = "am263x"; + +const files = { + common: [ + /* Project Files */ + "df22_test.c", + "main.c", + ], +}; + +const projectspec_files = { + common: [ + "../../../df22_test.h", + "../../../data", + ] +} + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", /* Example base */ + ], +}; + +const libdirs_nortos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + ], +}; + +const includes_nortos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const libs_nortos_r5f = { + common: [ + "nortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + + +const lnkfiles = { + common: [ + "linker.cmd", + "dcl_linker_r5f_am263x_sitara.cmd", + ] +}; + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLES_DCL_DF22"; + +const templates_nortos_r5f = +[ + { + input: ".project/templates/am263x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am263x/nortos/main_nortos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_df22_main", + }, + } +]; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am263x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am263x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_df22_main", + }, + } +]; + + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-cc", os: "nortos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-cc", os: "freertos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-lp", os: "nortos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-lp", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "dcl_df22"; + property.isInternal = false; + property.tirexResourceSubClass = [ "example.gettingstarted" ]; + property.description = "A Direct Form 2 2nd order example demonstrating the digital control library (DCL)." + property.buildOptionCombos = buildOptionCombos; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + /* The following build property has been modified for dcl usage, + specifically - added different includes vars distinguishing no/free rtos + added different lnkfiles vars for cpu-specific lnk files + */ + build_property.files = files; + build_property.filedirs = filedirs; + build_property.libdirs = libdirs_nortos; + build_property.lnkfiles = lnkfiles; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + build_property.projectspec_files = projectspec_files; + + if(buildOption.cpu.match(/r5f*/)) { + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + } + else + { + build_property.includes = includes_nortos_r5f; + build_property.libs = libs_nortos_r5f; + build_property.templates = templates_nortos_r5f; + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/example.syscfg b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..3539198 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/example.syscfg @@ -0,0 +1,57 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.00" + * @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); +const addr_translate1 = addr_translate.addInstance(); +const addr_translate2 = addr_translate.addInstance(); +const addr_translate3 = addr_translate.addInstance(); +const addr_translate4 = addr_translate.addInstance(); +const clock = scripting.addModule("/kernel/dpl/clock"); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; +addr_translate1.localAddr = 0x80000000; + +addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1"; +addr_translate2.systemAddr = 0x20000000; +addr_translate2.localAddr = 0xA0000000; + +addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2"; +addr_translate3.systemAddr = 0x40000000; +addr_translate3.localAddr = 0xC0000000; + +addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3"; +addr_translate4.systemAddr = 0x60000000; +addr_translate4.localAddr = 0x60000000; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.MCU_UART.$assign = "MCU_USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.attributes = "Device"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 18; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.MCU_UART.RXD.$suggestSolution = "MCU_UART0_RXD"; +debug_log.uartLog.MCU_UART.TXD.$suggestSolution = "MCU_UART0_TXD"; diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/main.c b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/main.c new file mode 100644 index 0000000..20ce9d5 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_df22_main(void *args); + +void freertos_main(void *args) +{ + dcl_df22_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd new file mode 100644 index 0000000..abbd5a0 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM M4F_IRAM +#define REG_RAM M4F_IRAM /* M4F_DRAM also works */ + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..d406a5a --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,115 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..ca912dd --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,62 @@ + +/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */ +--retain="*(.vectors)" +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 + + +SECTIONS +{ + /* This has the M4F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > M4F_VECS + .text: {} palign(8) > M4F_IRAM /* This is where code resides */ + + .bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */ + .rodata: {} palign(8) > M4F_DRAM /* This is where const's go */ + .sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */ + .stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */ + + /* Sections needed for C++ projects */ + .ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */ + .init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */ + .fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */ + + /* General purpose user shared memory */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM +} + +MEMORY +{ + M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200 + M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00 + M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000 + + /* shared memories that are used by all cores */ + /* On M4F, + * - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it + * accessible on M4F + * - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000 + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..048bbb6 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,303 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_m4f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:m4fss0-0:freertos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8215903 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..520c508 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/example.syscfg b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..3539198 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/example.syscfg @@ -0,0 +1,57 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.00" + * @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); +const addr_translate1 = addr_translate.addInstance(); +const addr_translate2 = addr_translate.addInstance(); +const addr_translate3 = addr_translate.addInstance(); +const addr_translate4 = addr_translate.addInstance(); +const clock = scripting.addModule("/kernel/dpl/clock"); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; +addr_translate1.localAddr = 0x80000000; + +addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1"; +addr_translate2.systemAddr = 0x20000000; +addr_translate2.localAddr = 0xA0000000; + +addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2"; +addr_translate3.systemAddr = 0x40000000; +addr_translate3.localAddr = 0xC0000000; + +addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3"; +addr_translate4.systemAddr = 0x60000000; +addr_translate4.localAddr = 0x60000000; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.MCU_UART.$assign = "MCU_USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.attributes = "Device"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 18; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.MCU_UART.RXD.$suggestSolution = "MCU_UART0_RXD"; +debug_log.uartLog.MCU_UART.TXD.$suggestSolution = "MCU_UART0_TXD"; diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/main.c b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/main.c new file mode 100644 index 0000000..4a61f6c --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_df22_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_df22_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd new file mode 100644 index 0000000..abbd5a0 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM M4F_IRAM +#define REG_RAM M4F_IRAM /* M4F_DRAM also works */ + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..b8259a3 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,112 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..ca912dd --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,62 @@ + +/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */ +--retain="*(.vectors)" +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 + + +SECTIONS +{ + /* This has the M4F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > M4F_VECS + .text: {} palign(8) > M4F_IRAM /* This is where code resides */ + + .bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */ + .rodata: {} palign(8) > M4F_DRAM /* This is where const's go */ + .sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */ + .stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */ + + /* Sections needed for C++ projects */ + .ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */ + .init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */ + .fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */ + + /* General purpose user shared memory */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM +} + +MEMORY +{ + M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200 + M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00 + M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000 + + /* shared memories that are used by all cores */ + /* On M4F, + * - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it + * accessible on M4F + * - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000 + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..4eb35da --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,300 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_m4f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:m4fss0-0:nortos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..653f9a5 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..ef616d4 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..7876a6b --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,62 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.00" + * @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x80000000; +mpu_armv76.size = 31; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/main.c b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..20ce9d5 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_df22_main(void *args); + +void freertos_main(void *args) +{ + dcl_df22_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd new file mode 100644 index 0000000..9eca059 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM MSRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..b220939 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..eab4000 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,305 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..41f5086 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/example.syscfg b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..7876a6b --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/example.syscfg @@ -0,0 +1,62 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.00" + * @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x80000000; +mpu_armv76.size = 31; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/main.c b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/main.c new file mode 100644 index 0000000..4a61f6c --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_df22_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_df22_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd new file mode 100644 index 0000000..9eca059 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM MSRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..772909e --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,114 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..64ac0f4 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,302 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:nortos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..81886bf --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..8933277 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/example.syscfg b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..e5282a5 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/example.syscfg @@ -0,0 +1,45 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"tool":"1.9.0+2015","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); +const addr_translate1 = addr_translate.addInstance(); +const addr_translate2 = addr_translate.addInstance(); +const addr_translate3 = addr_translate.addInstance(); +const addr_translate4 = addr_translate.addInstance(); +const clock = scripting.addModule("/kernel/dpl/clock"); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; +addr_translate1.localAddr = 0x80000000; + +addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1"; +addr_translate2.systemAddr = 0x20000000; +addr_translate2.localAddr = 0xA0000000; + +addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2"; +addr_translate3.systemAddr = 0x40000000; +addr_translate3.localAddr = 0xC0000000; + +addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3"; +addr_translate4.systemAddr = 0x60000000; +addr_translate4.localAddr = 0x60000000; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.attributes = "Device"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 18; diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/main.c b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/main.c new file mode 100644 index 0000000..20ce9d5 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_df22_main(void *args); + +void freertos_main(void *args) +{ + dcl_df22_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd new file mode 100644 index 0000000..abbd5a0 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM M4F_IRAM +#define REG_RAM M4F_IRAM /* M4F_DRAM also works */ + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..1fc2900 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,115 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..ca912dd --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,62 @@ + +/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */ +--retain="*(.vectors)" +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 + + +SECTIONS +{ + /* This has the M4F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > M4F_VECS + .text: {} palign(8) > M4F_IRAM /* This is where code resides */ + + .bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */ + .rodata: {} palign(8) > M4F_DRAM /* This is where const's go */ + .sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */ + .stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */ + + /* Sections needed for C++ projects */ + .ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */ + .init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */ + .fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */ + + /* General purpose user shared memory */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM +} + +MEMORY +{ + M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200 + M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00 + M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000 + + /* shared memories that are used by all cores */ + /* On M4F, + * - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it + * accessible on M4F + * - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000 + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..8c99389 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,303 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_m4f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:m4fss0-0:freertos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8215903 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..c587694 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/example.syscfg b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..e5282a5 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/example.syscfg @@ -0,0 +1,45 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"tool":"1.9.0+2015","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); +const addr_translate1 = addr_translate.addInstance(); +const addr_translate2 = addr_translate.addInstance(); +const addr_translate3 = addr_translate.addInstance(); +const addr_translate4 = addr_translate.addInstance(); +const clock = scripting.addModule("/kernel/dpl/clock"); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; +addr_translate1.localAddr = 0x80000000; + +addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1"; +addr_translate2.systemAddr = 0x20000000; +addr_translate2.localAddr = 0xA0000000; + +addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2"; +addr_translate3.systemAddr = 0x40000000; +addr_translate3.localAddr = 0xC0000000; + +addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3"; +addr_translate4.systemAddr = 0x60000000; +addr_translate4.localAddr = 0x60000000; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.attributes = "Device"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 18; diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/main.c b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/main.c new file mode 100644 index 0000000..4a61f6c --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_df22_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_df22_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd new file mode 100644 index 0000000..abbd5a0 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM M4F_IRAM +#define REG_RAM M4F_IRAM /* M4F_DRAM also works */ + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..5086eca --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,112 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..ca912dd --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,62 @@ + +/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */ +--retain="*(.vectors)" +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 + + +SECTIONS +{ + /* This has the M4F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > M4F_VECS + .text: {} palign(8) > M4F_IRAM /* This is where code resides */ + + .bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */ + .rodata: {} palign(8) > M4F_DRAM /* This is where const's go */ + .sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */ + .stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */ + + /* Sections needed for C++ projects */ + .ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */ + .init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */ + .fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */ + + /* General purpose user shared memory */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM +} + +MEMORY +{ + M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200 + M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00 + M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000 + + /* shared memories that are used by all cores */ + /* On M4F, + * - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it + * accessible on M4F + * - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000 + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..2b72457 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,300 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_m4f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:m4fss0-0:nortos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..653f9a5 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..e094b3d --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..0e4bb27 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,57 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"data":"2021040816","timestamp":"2021040816","tool":"1.8.1+1900","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "B10"; +debug_log.uartLog.UART.TXD.$suggestSolution = "B11"; diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/main.c b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..20ce9d5 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_df22_main(void *args); + +void freertos_main(void *args) +{ + dcl_df22_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd new file mode 100644 index 0000000..9eca059 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM MSRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..348a135 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..a01b03a --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,305 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..dd6e280 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/example.syscfg b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..0e4bb27 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/example.syscfg @@ -0,0 +1,57 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"data":"2021040816","timestamp":"2021040816","tool":"1.8.1+1900","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "B10"; +debug_log.uartLog.UART.TXD.$suggestSolution = "B11"; diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/main.c b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/main.c new file mode 100644 index 0000000..4a61f6c --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_df22_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_df22_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd new file mode 100644 index 0000000..9eca059 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM MSRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..d324a5b --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,114 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..689688b --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,302 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_df22.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_df22.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:nortos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..81886bf --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..fd1e20c --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/example.syscfg b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..81572a9 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,59 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00" + * @versions {"tool":"1.14.0+2667"} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.UART.$assign = "UART0"; +debug_log.uartLog.UART.RXD.$assign = "ball.A7"; +debug_log.uartLog.UART.TXD.$assign = "ball.A6"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x80000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x50D00000; +mpu_armv75.size = 14; +mpu_armv75.allowExecute = false; +mpu_armv75.attributes = "Device"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x72000000; +mpu_armv76.size = 14; +mpu_armv76.allowExecute = false; +mpu_armv76.attributes = "NonCached"; diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/main.c b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..6e147ed --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2022 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_df22_main(void *args); + +void freertos_main(void *args) +{ + dcl_df22_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd new file mode 100644 index 0000000..266ff50 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM OCRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..95d7961 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..7a34f5e --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,137 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is enabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > OCRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > OCRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + + .data: {} palign(8) /* This is where initialized globals and static go */ + } > OCRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > OCRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > OCRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > OCRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* this is used only when Secure IPC is enabled */ + .bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM + .bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F +} + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + + /* shared memories that are used by RTOS/NORTOS cores */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000 + LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000 + /* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */ + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80 + MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE + MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE + } diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..f4d1dab --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,276 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM263X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am263x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(BOOTIMAGE_NAME) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am263x:r5fss0-0:freertos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..e0799fb --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,84 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +endif diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..6752802 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/example.syscfg b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..81572a9 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/example.syscfg @@ -0,0 +1,59 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00" + * @versions {"tool":"1.14.0+2667"} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.UART.$assign = "UART0"; +debug_log.uartLog.UART.RXD.$assign = "ball.A7"; +debug_log.uartLog.UART.TXD.$assign = "ball.A6"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x80000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x50D00000; +mpu_armv75.size = 14; +mpu_armv75.allowExecute = false; +mpu_armv75.attributes = "Device"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x72000000; +mpu_armv76.size = 14; +mpu_armv76.allowExecute = false; +mpu_armv76.attributes = "NonCached"; diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/main.c b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/main.c new file mode 100644 index 0000000..8ef5336 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2022 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_df22_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_df22_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd new file mode 100644 index 0000000..266ff50 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM OCRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..7be73f9 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,114 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..7a34f5e --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,137 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is enabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > OCRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > OCRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + + .data: {} palign(8) /* This is where initialized globals and static go */ + } > OCRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > OCRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > OCRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > OCRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* this is used only when Secure IPC is enabled */ + .bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM + .bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F +} + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + + /* shared memories that are used by RTOS/NORTOS cores */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000 + LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000 + /* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */ + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80 + MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE + MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE + } diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..c5e60d6 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,273 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM263X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am263x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am263x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am263x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(BOOTIMAGE_NAME) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am263x:r5fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am263x:r5fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am263x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am263x:r5fss0-0:nortos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..d790183 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,84 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +endif diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..87faa00 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/example.syscfg b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..81572a9 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,59 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00" + * @versions {"tool":"1.14.0+2667"} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.UART.$assign = "UART0"; +debug_log.uartLog.UART.RXD.$assign = "ball.A7"; +debug_log.uartLog.UART.TXD.$assign = "ball.A6"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x80000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x50D00000; +mpu_armv75.size = 14; +mpu_armv75.allowExecute = false; +mpu_armv75.attributes = "Device"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x72000000; +mpu_armv76.size = 14; +mpu_armv76.allowExecute = false; +mpu_armv76.attributes = "NonCached"; diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/main.c b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..6e147ed --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2022 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_df22_main(void *args); + +void freertos_main(void *args) +{ + dcl_df22_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd new file mode 100644 index 0000000..266ff50 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM OCRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..61a4f95 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..7a34f5e --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,137 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is enabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > OCRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > OCRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + + .data: {} palign(8) /* This is where initialized globals and static go */ + } > OCRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > OCRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > OCRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > OCRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* this is used only when Secure IPC is enabled */ + .bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM + .bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F +} + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + + /* shared memories that are used by RTOS/NORTOS cores */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000 + LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000 + /* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */ + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80 + MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE + MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE + } diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..f4d1dab --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,276 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM263X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am263x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(BOOTIMAGE_NAME) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am263x:r5fss0-0:freertos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..e0799fb --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,84 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +endif diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..ce5d86b --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/example.syscfg b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..81572a9 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/example.syscfg @@ -0,0 +1,59 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00" + * @versions {"tool":"1.14.0+2667"} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.UART.$assign = "UART0"; +debug_log.uartLog.UART.RXD.$assign = "ball.A7"; +debug_log.uartLog.UART.TXD.$assign = "ball.A6"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x80000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x50D00000; +mpu_armv75.size = 14; +mpu_armv75.allowExecute = false; +mpu_armv75.attributes = "Device"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x72000000; +mpu_armv76.size = 14; +mpu_armv76.allowExecute = false; +mpu_armv76.attributes = "NonCached"; diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/main.c b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/main.c new file mode 100644 index 0000000..8ef5336 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2022 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_df22_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_df22_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd new file mode 100644 index 0000000..266ff50 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM OCRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..c68478c --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,114 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..7a34f5e --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,137 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is enabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > OCRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > OCRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + + .data: {} palign(8) /* This is where initialized globals and static go */ + } > OCRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > OCRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > OCRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > OCRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* this is used only when Secure IPC is enabled */ + .bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM + .bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F +} + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + + /* shared memories that are used by RTOS/NORTOS cores */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000 + LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000 + /* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */ + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80 + MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE + MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE + } diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..c5e60d6 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,273 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_df22.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_df22.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_df22.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_df22.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_df22.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_df22.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_df22.$(PROFILE).rprc_tmp + +FILES_common := \ + df22_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM263X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am263x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am263x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am263x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(BOOTIMAGE_NAME) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am263x:r5fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am263x:r5fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am263x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am263x:r5fss0-0:nortos:ti-arm-clang dcl_df22 ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..d790183 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,84 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +endif diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..9ad2ff7 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_df22/data/DF22_ctl-1.dat b/examples/dcl/dcl_df22/data/DF22_ctl-1.dat new file mode 100644 index 0000000..e1dc89a --- /dev/null +++ b/examples/dcl/dcl_df22/data/DF22_ctl-1.dat @@ -0,0 +1,1601 @@ +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, 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Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "df22_test.h" + +void dcl_df22_main(void *args) +{ + /* Open drivers to open the UART driver for console */ + Drivers_open(); + Board_driversOpen(); + + DF22_runTest(df22_controller); + + Board_driversClose(); + Drivers_close(); +} + +int DF22_runTest(DCL_DF22 *ctrl_handle) +{ + // + // Define DFLOG pointers that will be used to access the data buffer + // + DCL_FDLOG inBuf, outBuf, ctlBuf; + DCL_resetDF22(ctrl_handle); + + // + // Initialize Log pointers to the data buffer + // + DCL_initLog(&inBuf, (float32_t*)in_buffer, DATA_LENGTH); + DCL_initLog(&outBuf, (float32_t*)out_buffer, DATA_LENGTH); + DCL_initLog(&ctlBuf, (float32_t*)ctl_buffer, DATA_LENGTH); + DCL_clearLog(&outBuf); + + int i; + for (i = 0; i < NUM_ELEMENTS; i++) + { + // + // ek = Servo error value + // uk = Output control effort + // + float32_t ek,uk; + + // + // Read the input data buffers + // + ek = DCL_readLog(&inBuf); + + // + // Run the controller + // Note: DCL_runDF22() does not have an internal clamp + // Use DCL_runDF22Clamp(ctrl_handle, ek, max, min) + // instead if an internal clamp is needed. + // DCL also provides external clamp DCL_runClamp(*data, max, min) + // + uk = DCL_runDF22(ctrl_handle, ek); + + // + // Write the results to the output buffer + // + DCL_writeLog(&outBuf, uk); + + } + + // + // Reset the log pointer so it starts from the beginning + // + DCL_resetLog(&outBuf); + + // + // Check output against reference output with tolerance + // + int errors = 0; + for (i = 0; i < NUM_ELEMENTS; i++) + { + float32_t output = DCL_readLog(&outBuf); // out_buffer[i] + float32_t expected = DCL_readLog(&ctlBuf); // ctl_buffer[i] + if (!DCL_isZero(output - expected)) + { + errors++; + DebugP_log("FAIL at sample %d, outputs %f, should be %f\n", i, output, expected); + } + } + + DebugP_log("DF22 test produced %d error\n",errors); + + return errors; +} \ No newline at end of file diff --git a/examples/dcl/dcl_df22/df22_test.h b/examples/dcl/dcl_df22/df22_test.h new file mode 100644 index 0000000..bf7946b --- /dev/null +++ b/examples/dcl/dcl_df22/df22_test.h @@ -0,0 +1,109 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef DF22_TEST_H +#define DF22_TEST_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "ti_drivers_config.h" +#include "ti_drivers_open_close.h" +#include "ti_board_open_close.h" +#include + +// +// User configurable values +// +#define DF22_TESTCASE 1 //!< Defines testcase, tests 1-3 is provided +#define DATA_LENGTH 1601 //!< Size of total data inputs +#define NUM_ELEMENTS 400 //!< The number of samples ran, cannot exceed DATA_LENGTH + +void dcl_df22_main(void *args); +int DF22_runTest(DCL_DF22 *ctrl_handle); + +// +// Controller initialization +// +//! Method 1: +//! Direct assignments +//! +DCL_DF22 *df22_controller = &(DCL_DF22) +{ + .b0 = 9.8549f, + .b1 = -19.4165f, + .b2 = 9.5636f, + .a1 = -1.9417f, + .a2 = 0.9417f, + DF22_INT_DEFAULTS // macro for default values of internal attributes +}; + +//! Method 2: +//! Initalizing with input controller parameters +//! +/* +float32_t b0 = 9.8549f, b1 = -19.4165f, b2 = 9.5636f, a1 = -1.9417f, a2 = 0.9417f; +DCL_DF22 *df22_controller = DCL_initDF22asParam(9.8549f,-19.4165f,9.5636f,-1.9417f,0.9417f); // (b0,b1,b2,a1,a2) +*/ + + +// +// Macros for selecting testvector based on DF22_TESTCASE +// +#define _LSTR(x) #x +#define __LSTR(x) _LSTR(x) +#define DF22_IN_DATA(x) __LSTR(data/DF22_in-x.dat) +#define DF22_CTL_DATA(x) __LSTR(data/DF22_ctl-x.dat) + +// +// Allocate data sections and initialize test vector +// +const float32_t __attribute__((weak)) in_buffer[DATA_LENGTH] = +{ +#include DF22_IN_DATA(DF22_TESTCASE) +}; + +const float32_t __attribute__((weak)) ctl_buffer[DATA_LENGTH] = +{ +#include DF22_CTL_DATA(DF22_TESTCASE) +}; + +static float32_t out_buffer[DATA_LENGTH]; + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif diff --git a/examples/dcl/dcl_pi/.project/mcsdk_project.js b/examples/dcl/dcl_pi/.project/mcsdk_project.js new file mode 100644 index 0000000..4c25148 --- /dev/null +++ b/examples/dcl/dcl_pi/.project/mcsdk_project.js @@ -0,0 +1,14 @@ +function getComponentProperty(device) +{ + return require(`./mcsdk_project_${device}`).getComponentProperty(); +}; + +function getComponentBuildProperty(buildOption) +{ + return require(`./mcsdk_project_${buildOption.device}`).getComponentBuildProperty(buildOption); +}; + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/dcl/dcl_pi/.project/mcsdk_project_am243x.js b/examples/dcl/dcl_pi/.project/mcsdk_project_am243x.js new file mode 100644 index 0000000..ef06eb5 --- /dev/null +++ b/examples/dcl/dcl_pi/.project/mcsdk_project_am243x.js @@ -0,0 +1,267 @@ +let path = require('path'); + +let device = "am243x"; + +const files = { + common: [ + /* Project Files */ + "pi_test.c", + "main.c", + + ], +}; + +const projectspec_files = { + common: [ + "../../../pi_test.h", + "../../../data", + ] +} + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", /* Example base */ + ], +}; + +const libdirs_nortos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + ], +}; + +const includes_nortos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const includes_nortos_m4f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const includes_freertos_m4f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f", + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const libs_nortos_r5f = { + common: [ + "nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const libs_nortos_m4f = { + common: [ + "nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const libs_freertos_m4f = { + common: [ + "freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.m4f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const lnkfiles_r5f = { + common: [ + "linker.cmd", + "dcl_linker_r5f_am243x_sitara.cmd", + ] +}; + +const lnkfiles_m4f = { + common: [ + "linker.cmd", + "dcl_linker_m4f_am243x_sitara.cmd", + ] +}; + + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLES_DCL_PI"; + +const templates_nortos_r5f = +[ + { + input: ".project/templates/am243x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/nortos/main_nortos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_pi_main", + }, + } +]; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am243x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_pi_main", + }, + } +]; + + +const templates_nortos_m4f = +[ + { + input: ".project/templates/am243x/common/linker_m4f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/nortos/main_nortos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_pi_main", + }, + } +]; + +const templates_freertos_m4f = +[ + { + input: ".project/templates/am243x/common/linker_m4f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_pi_main", + }, + } +]; + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "nortos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"}, + { device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "nortos"}, + { device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "nortos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"}, + { device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "nortos"}, + { device: device, cpu: "m4fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "dcl_pi"; + property.isInternal = false; + property.tirexResourceSubClass = [ "example.gettingstarted" ]; + property.description = "A PI controller example demonstrating the digital control library (DCL)." + property.buildOptionCombos = buildOptionCombos; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + /* The following build property has been modified for dcl usage, + specifically - added different includes vars distinguishing no/free rtos + added different lnkfiles vars distinguishing cpu-specific lnkfiles + */ + build_property.files = files; + build_property.filedirs = filedirs; + build_property.libdirs = libdirs_nortos; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + build_property.projectspec_files = projectspec_files; + + if(buildOption.cpu.match(/r5f*/)) { + build_property.lnkfiles = lnkfiles_r5f; + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + } + else + { + build_property.includes = includes_nortos_r5f; + build_property.libs = libs_nortos_r5f; + build_property.templates = templates_nortos_r5f; + } + } + if(buildOption.cpu.match(/m4f*/)) { + build_property.lnkfiles = lnkfiles_m4f; + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_m4f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_m4f; + build_property.templates = templates_freertos_m4f; + } + else + { + build_property.includes = includes_nortos_m4f; + build_property.libs = libs_nortos_m4f; + build_property.templates = templates_nortos_m4f; + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/dcl/dcl_pi/.project/mcsdk_project_am263x.js b/examples/dcl/dcl_pi/.project/mcsdk_project_am263x.js new file mode 100644 index 0000000..00d44f8 --- /dev/null +++ b/examples/dcl/dcl_pi/.project/mcsdk_project_am263x.js @@ -0,0 +1,178 @@ +let path = require('path'); + +let device = "am263x"; + +const files = { + common: [ + /* Project Files */ + "pi_test.c", + "main.c", + ], +}; + +const projectspec_files = { + common: [ + "../../../pi_test.h", + "../../../data", + ] +} + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", /* Example base */ + ], +}; + +const libdirs_nortos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + ], +}; + +const includes_nortos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/source/dcl" + ], +}; + +const libs_nortos_r5f = { + common: [ + "nortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am263x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + + +const lnkfiles = { + common: [ + "linker.cmd", + "dcl_linker_r5f_am263x_sitara.cmd", + ] +}; + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLES_DCL_PI"; + +const templates_nortos_r5f = +[ + { + input: ".project/templates/am263x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am263x/nortos/main_nortos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_pi_main", + }, + } +]; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am263x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am263x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "dcl_pi_main", + }, + } +]; + + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-cc", os: "nortos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-cc", os: "freertos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-lp", os: "nortos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am263x-lp", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "dcl_pi"; + property.isInternal = false; + property.tirexResourceSubClass = [ "example.gettingstarted" ]; + property.description = "A PI controller example demonstrating the digital control library (DCL). " + property.buildOptionCombos = buildOptionCombos; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + /* The following build property has been modified for dcl usage, + specifically - added different includes vars distinguishing no/free rtos + added different lnkfiles vars for cpu-specific lnk files + */ + build_property.files = files; + build_property.filedirs = filedirs; + build_property.libdirs = libdirs_nortos; + build_property.lnkfiles = lnkfiles; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + build_property.projectspec_files = projectspec_files; + + if(buildOption.cpu.match(/r5f*/)) { + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + } + else + { + build_property.includes = includes_nortos_r5f; + build_property.libs = libs_nortos_r5f; + build_property.templates = templates_nortos_r5f; + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/example.syscfg b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..3539198 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/example.syscfg @@ -0,0 +1,57 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.00" + * @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); +const addr_translate1 = addr_translate.addInstance(); +const addr_translate2 = addr_translate.addInstance(); +const addr_translate3 = addr_translate.addInstance(); +const addr_translate4 = addr_translate.addInstance(); +const clock = scripting.addModule("/kernel/dpl/clock"); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; +addr_translate1.localAddr = 0x80000000; + +addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1"; +addr_translate2.systemAddr = 0x20000000; +addr_translate2.localAddr = 0xA0000000; + +addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2"; +addr_translate3.systemAddr = 0x40000000; +addr_translate3.localAddr = 0xC0000000; + +addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3"; +addr_translate4.systemAddr = 0x60000000; +addr_translate4.localAddr = 0x60000000; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.MCU_UART.$assign = "MCU_USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.attributes = "Device"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 18; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.MCU_UART.RXD.$suggestSolution = "MCU_UART0_RXD"; +debug_log.uartLog.MCU_UART.TXD.$suggestSolution = "MCU_UART0_TXD"; diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/main.c b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/main.c new file mode 100644 index 0000000..f9d06fe --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_pi_main(void *args); + +void freertos_main(void *args) +{ + dcl_pi_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd new file mode 100644 index 0000000..abbd5a0 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM M4F_IRAM +#define REG_RAM M4F_IRAM /* M4F_DRAM also works */ + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..53c9b80 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,115 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..ca912dd --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,62 @@ + +/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */ +--retain="*(.vectors)" +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 + + +SECTIONS +{ + /* This has the M4F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > M4F_VECS + .text: {} palign(8) > M4F_IRAM /* This is where code resides */ + + .bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */ + .rodata: {} palign(8) > M4F_DRAM /* This is where const's go */ + .sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */ + .stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */ + + /* Sections needed for C++ projects */ + .ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */ + .init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */ + .fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */ + + /* General purpose user shared memory */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM +} + +MEMORY +{ + M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200 + M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00 + M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000 + + /* shared memories that are used by all cores */ + /* On M4F, + * - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it + * accessible on M4F + * - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000 + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..dbe5e9b --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,303 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_pi.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_pi.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_m4f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:m4fss0-0:freertos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8215903 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..d22dd7e --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/example.syscfg b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..3539198 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/example.syscfg @@ -0,0 +1,57 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.00" + * @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); +const addr_translate1 = addr_translate.addInstance(); +const addr_translate2 = addr_translate.addInstance(); +const addr_translate3 = addr_translate.addInstance(); +const addr_translate4 = addr_translate.addInstance(); +const clock = scripting.addModule("/kernel/dpl/clock"); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; +addr_translate1.localAddr = 0x80000000; + +addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1"; +addr_translate2.systemAddr = 0x20000000; +addr_translate2.localAddr = 0xA0000000; + +addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2"; +addr_translate3.systemAddr = 0x40000000; +addr_translate3.localAddr = 0xC0000000; + +addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3"; +addr_translate4.systemAddr = 0x60000000; +addr_translate4.localAddr = 0x60000000; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.MCU_UART.$assign = "MCU_USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.attributes = "Device"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 18; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.MCU_UART.RXD.$suggestSolution = "MCU_UART0_RXD"; +debug_log.uartLog.MCU_UART.TXD.$suggestSolution = "MCU_UART0_TXD"; diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/main.c b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/main.c new file mode 100644 index 0000000..358587c --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_pi_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_pi_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd new file mode 100644 index 0000000..abbd5a0 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM M4F_IRAM +#define REG_RAM M4F_IRAM /* M4F_DRAM also works */ + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..079cb85 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,112 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..ca912dd --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,62 @@ + +/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */ +--retain="*(.vectors)" +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 + + +SECTIONS +{ + /* This has the M4F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > M4F_VECS + .text: {} palign(8) > M4F_IRAM /* This is where code resides */ + + .bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */ + .rodata: {} palign(8) > M4F_DRAM /* This is where const's go */ + .sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */ + .stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */ + + /* Sections needed for C++ projects */ + .ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */ + .init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */ + .fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */ + + /* General purpose user shared memory */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM +} + +MEMORY +{ + M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200 + M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00 + M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000 + + /* shared memories that are used by all cores */ + /* On M4F, + * - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it + * accessible on M4F + * - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000 + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..19c1587 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,300 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_pi.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_pi.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_m4f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:m4fss0-0:nortos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context m4fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..653f9a5 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..add77c7 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..7876a6b --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,62 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.00" + * @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x80000000; +mpu_armv76.size = 31; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/main.c b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..f9d06fe --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_pi_main(void *args); + +void freertos_main(void *args) +{ + dcl_pi_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd new file mode 100644 index 0000000..9eca059 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM MSRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..e026473 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..d56c6a4 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,305 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_pi.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_pi.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..8c03776 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/example.syscfg b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..7876a6b --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/example.syscfg @@ -0,0 +1,62 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.00" + * @versions {"data":"2021012919","timestamp":"2021012919","tool":"1.8.0+1785","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x80000000; +mpu_armv76.size = 31; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/main.c b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/main.c new file mode 100644 index 0000000..358587c --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_pi_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_pi_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd new file mode 100644 index 0000000..9eca059 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM MSRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..b6125c1 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,114 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..4c05b50 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,302 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_pi.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_pi.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:nortos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..81886bf --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..e190412 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/example.syscfg b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..e5282a5 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/example.syscfg @@ -0,0 +1,45 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"tool":"1.9.0+2015","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); +const addr_translate1 = addr_translate.addInstance(); +const addr_translate2 = addr_translate.addInstance(); +const addr_translate3 = addr_translate.addInstance(); +const addr_translate4 = addr_translate.addInstance(); +const clock = scripting.addModule("/kernel/dpl/clock"); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; +addr_translate1.localAddr = 0x80000000; + +addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1"; +addr_translate2.systemAddr = 0x20000000; +addr_translate2.localAddr = 0xA0000000; + +addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2"; +addr_translate3.systemAddr = 0x40000000; +addr_translate3.localAddr = 0xC0000000; + +addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3"; +addr_translate4.systemAddr = 0x60000000; +addr_translate4.localAddr = 0x60000000; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.attributes = "Device"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 18; diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/main.c b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/main.c new file mode 100644 index 0000000..f9d06fe --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_pi_main(void *args); + +void freertos_main(void *args) +{ + dcl_pi_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd new file mode 100644 index 0000000..abbd5a0 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM M4F_IRAM +#define REG_RAM M4F_IRAM /* M4F_DRAM also works */ + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..259bff3 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,115 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..ca912dd --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,62 @@ + +/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */ +--retain="*(.vectors)" +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 + + +SECTIONS +{ + /* This has the M4F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > M4F_VECS + .text: {} palign(8) > M4F_IRAM /* This is where code resides */ + + .bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */ + .rodata: {} palign(8) > M4F_DRAM /* This is where const's go */ + .sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */ + .stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */ + + /* Sections needed for C++ projects */ + .ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */ + .init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */ + .fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */ + + /* General purpose user shared memory */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM +} + +MEMORY +{ + M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200 + M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00 + M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000 + + /* shared memories that are used by all cores */ + /* On M4F, + * - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it + * accessible on M4F + * - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000 + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..da401c6 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,303 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_pi.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_pi.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CM4F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/m4f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_m4f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:m4fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:m4fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:m4fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:m4fss0-0:freertos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8215903 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:m4fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..0650974 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/example.syscfg b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..e5282a5 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/example.syscfg @@ -0,0 +1,45 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "m4fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"tool":"1.9.0+2015","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); +const addr_translate1 = addr_translate.addInstance(); +const addr_translate2 = addr_translate.addInstance(); +const addr_translate3 = addr_translate.addInstance(); +const addr_translate4 = addr_translate.addInstance(); +const clock = scripting.addModule("/kernel/dpl/clock"); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; +addr_translate1.localAddr = 0x80000000; + +addr_translate2.$name = "CONFIG_ADDR_TRANSLATE_REGION1"; +addr_translate2.systemAddr = 0x20000000; +addr_translate2.localAddr = 0xA0000000; + +addr_translate3.$name = "CONFIG_ADDR_TRANSLATE_REGION2"; +addr_translate3.systemAddr = 0x40000000; +addr_translate3.localAddr = 0xC0000000; + +addr_translate4.$name = "CONFIG_ADDR_TRANSLATE_REGION3"; +addr_translate4.systemAddr = 0x60000000; +addr_translate4.localAddr = 0x60000000; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.attributes = "Device"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 18; diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/main.c b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/main.c new file mode 100644 index 0000000..358587c --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_pi_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_pi_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd new file mode 100644 index 0000000..abbd5a0 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/dcl_linker_m4f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM M4F_IRAM +#define REG_RAM M4F_IRAM /* M4F_DRAM also works */ + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..2ddc6ea --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,112 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..ca912dd --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,62 @@ + +/* make sure below retain is there in your linker command file, it keeps the vector table in the final binary */ +--retain="*(.vectors)" +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 + + +SECTIONS +{ + /* This has the M4F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > M4F_VECS + .text: {} palign(8) > M4F_IRAM /* This is where code resides */ + + .bss: {} palign(8) > M4F_DRAM /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .data: {} palign(8) > M4F_DRAM /* This is where initialized globals and static go */ + .rodata: {} palign(8) > M4F_DRAM /* This is where const's go */ + .sysmem: {} palign(8) > M4F_IRAM /* This is where the malloc heap goes */ + .stack: {} palign(8) > M4F_IRAM /* This is where the main() stack goes */ + + /* Sections needed for C++ projects */ + .ARM.exidx: {} palign(8) > M4F_IRAM /* Needed for C++ exception handling */ + .init_array: {} palign(8) > M4F_IRAM /* Contains function pointers called before main */ + .fini_array: {} palign(8) > M4F_IRAM /* Contains function pointers called after main */ + + /* General purpose user shared memory */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM +} + +MEMORY +{ + M4F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000200 + M4F_IRAM : ORIGIN = 0x00000200 , LENGTH = 0x0002FE00 + M4F_DRAM : ORIGIN = 0x00030000 , LENGTH = 0x00010000 + + /* shared memories that are used by all cores */ + /* On M4F, + * - By default MSMC RAM is not accessible to M4F, a RAT entry is needed to make it + * accessible on M4F + * - So make sure there is a RAT entry which has a 1:1 mapping from 0x70000000 to 0x70200000 + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + IPC_VRING_MEM: ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..27f95d8 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,300 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_pi.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_pi.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_m4f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.m4f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:m4fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:m4fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:m4fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:m4fss0-0:nortos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context m4fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..653f9a5 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_m4fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:m4fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..07ef5d1 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..0e4bb27 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,57 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"data":"2021040816","timestamp":"2021040816","tool":"1.8.1+1900","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "B10"; +debug_log.uartLog.UART.TXD.$suggestSolution = "B11"; diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/main.c b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..f9d06fe --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_pi_main(void *args); + +void freertos_main(void *args) +{ + dcl_pi_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd new file mode 100644 index 0000000..9eca059 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM MSRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..6f1eb4f --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..0510fb5 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,305 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_pi.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_pi.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..3de906e --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/example.syscfg b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..0e4bb27 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/example.syscfg @@ -0,0 +1,57 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"data":"2021040816","timestamp":"2021040816","tool":"1.8.1+1900","templates":null} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "B10"; +debug_log.uartLog.UART.TXD.$suggestSolution = "B11"; diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/main.c b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/main.c new file mode 100644 index 0000000..358587c --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_pi_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_pi_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd new file mode 100644 index 0000000..9eca059 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am243x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM MSRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..cb7d322 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,114 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..a580f30 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,302 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=dcl_pi.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=dcl_pi.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am243x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:nortos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..81886bf --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..f5cdc5f --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/example.syscfg b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..81572a9 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,59 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00" + * @versions {"tool":"1.14.0+2667"} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.UART.$assign = "UART0"; +debug_log.uartLog.UART.RXD.$assign = "ball.A7"; +debug_log.uartLog.UART.TXD.$assign = "ball.A6"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x80000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x50D00000; +mpu_armv75.size = 14; +mpu_armv75.allowExecute = false; +mpu_armv75.attributes = "Device"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x72000000; +mpu_armv76.size = 14; +mpu_armv76.allowExecute = false; +mpu_armv76.attributes = "NonCached"; diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/main.c b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..d109dd6 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2022 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_pi_main(void *args); + +void freertos_main(void *args) +{ + dcl_pi_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd new file mode 100644 index 0000000..266ff50 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM OCRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..6889965 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..7a34f5e --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,137 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is enabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > OCRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > OCRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + + .data: {} palign(8) /* This is where initialized globals and static go */ + } > OCRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > OCRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > OCRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > OCRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* this is used only when Secure IPC is enabled */ + .bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM + .bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F +} + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + + /* shared memories that are used by RTOS/NORTOS cores */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000 + LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000 + /* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */ + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80 + MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE + MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE + } diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..4a61b80 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,276 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM263X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am263x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(BOOTIMAGE_NAME) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am263x:r5fss0-0:freertos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..e0799fb --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,84 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +endif diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..126f029 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/example.syscfg b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..81572a9 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/example.syscfg @@ -0,0 +1,59 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00" + * @versions {"tool":"1.14.0+2667"} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.UART.$assign = "UART0"; +debug_log.uartLog.UART.RXD.$assign = "ball.A7"; +debug_log.uartLog.UART.TXD.$assign = "ball.A6"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x80000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x50D00000; +mpu_armv75.size = 14; +mpu_armv75.allowExecute = false; +mpu_armv75.attributes = "Device"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x72000000; +mpu_armv76.size = 14; +mpu_armv76.allowExecute = false; +mpu_armv76.attributes = "NonCached"; diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/main.c b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/main.c new file mode 100644 index 0000000..05518c3 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2022 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_pi_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_pi_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd new file mode 100644 index 0000000..266ff50 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM OCRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..581eb56 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,114 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..7a34f5e --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,137 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is enabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > OCRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > OCRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + + .data: {} palign(8) /* This is where initialized globals and static go */ + } > OCRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > OCRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > OCRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > OCRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* this is used only when Secure IPC is enabled */ + .bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM + .bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F +} + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + + /* shared memories that are used by RTOS/NORTOS cores */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000 + LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000 + /* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */ + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80 + MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE + MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE + } diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..9685a70 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,273 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM263X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am263x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am263x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am263x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(BOOTIMAGE_NAME) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am263x:r5fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am263x:r5fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am263x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am263x:r5fss0-0:nortos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..d790183 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,84 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +endif diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..d455b0f --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/example.syscfg b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..81572a9 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,59 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00" + * @versions {"tool":"1.14.0+2667"} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.UART.$assign = "UART0"; +debug_log.uartLog.UART.RXD.$assign = "ball.A7"; +debug_log.uartLog.UART.TXD.$assign = "ball.A6"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x80000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x50D00000; +mpu_armv75.size = 14; +mpu_armv75.allowExecute = false; +mpu_armv75.attributes = "Device"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x72000000; +mpu_armv76.size = 14; +mpu_armv76.allowExecute = false; +mpu_armv76.attributes = "NonCached"; diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/main.c b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..d109dd6 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2022 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void dcl_pi_main(void *args); + +void freertos_main(void *args) +{ + dcl_pi_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd new file mode 100644 index 0000000..266ff50 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM OCRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..6a1a47f --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..7a34f5e --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,137 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is enabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > OCRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > OCRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + + .data: {} palign(8) /* This is where initialized globals and static go */ + } > OCRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > OCRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > OCRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > OCRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* this is used only when Secure IPC is enabled */ + .bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM + .bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F +} + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + + /* shared memories that are used by RTOS/NORTOS cores */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000 + LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000 + /* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */ + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80 + MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE + MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE + } diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..4a61b80 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,276 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am263x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM263X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am263x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am263x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(BOOTIMAGE_NAME) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am263x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am263x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am263x:r5fss0-0:freertos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..e0799fb --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,84 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am263x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +endif diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..b8b55a3 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/example.syscfg b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/example.syscfg new file mode 100644 index 0000000..81572a9 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/example.syscfg @@ -0,0 +1,59 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM263x_beta" --package "ZCZ" --part "AM263x" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263x@08.06.00" + * @versions {"tool":"1.14.0+2667"} + */ + +/** + * Import the modules used in this configuration. + */ +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.UART.$assign = "UART0"; +debug_log.uartLog.UART.RXD.$assign = "ball.A7"; +debug_log.uartLog.UART.TXD.$assign = "ball.A6"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x80000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x50D00000; +mpu_armv75.size = 14; +mpu_armv75.allowExecute = false; +mpu_armv75.attributes = "Device"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x72000000; +mpu_armv76.size = 14; +mpu_armv76.allowExecute = false; +mpu_armv76.attributes = "NonCached"; diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/main.c b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/main.c new file mode 100644 index 0000000..05518c3 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/main.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2018-2022 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" + +void dcl_pi_main(void *args); + +int main(void) +{ + System_init(); + Board_init(); + + dcl_pi_main(NULL); + + Board_deinit(); + System_deinit(); + + return 0; +} diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd new file mode 100644 index 0000000..266ff50 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/dcl_linker_r5f_am263x_sitara.cmd @@ -0,0 +1,19 @@ +/* +* This linker file is optional, it's complementary to the device/core linker file +* Here it specifies the dcl function & data mapping allocated by __attribute__((section(...))) +* and link to a specific memory region for the best performance +*/ + +/* Define core & platform specific variables */ +#define FAST_RAM R5F_TCMB0 /* R5F_TCMA also works */ +#define REG_RAM OCRAM + +SECTIONS +{ + /* dcl functions mapped to on-chip fast ram */ + dclfuncs : {} > FAST_RAM + + /* optional -- map datas & variables to regular ram */ + /* Sitara default linker should already map variables to ram */ + dclDataSection : {} > REG_RAM +} \ No newline at end of file diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..d201c9e --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec @@ -0,0 +1,114 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..7a34f5e --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/linker.cmd @@ -0,0 +1,137 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is enabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > OCRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > OCRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + + .data: {} palign(8) /* This is where initialized globals and static go */ + } > OCRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > OCRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > OCRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > OCRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* this is used only when Secure IPC is enabled */ + .bss.sipc_hsm_queue_mem (NOLOAD) : {} > MAILBOX_HSM + .bss.sipc_r5f_queue_mem (NOLOAD) : {} > MAILBOX_R5F +} + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB : ORIGIN = 0x00080000 , LENGTH = 0x00008000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + + /* shared memories that are used by RTOS/NORTOS cores */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x00004000 + LOG_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x00004000 + /* MSS mailbox memory is used as shared memory, we dont use bottom 32*12 bytes, since its used as SW queue by ipc_notify */ + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000, LENGTH = 0x3E80 + MAILBOX_HSM: ORIGIN = 0x44000000 , LENGTH = 0x000003CE + MAILBOX_R5F: ORIGIN = 0x44000400 , LENGTH = 0x000003CE + } diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile new file mode 100644 index 0000000..9685a70 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile @@ -0,0 +1,273 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=dcl_pi.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=dcl_pi.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=dcl_pi.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=dcl_pi.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=dcl_pi.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=dcl_pi.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=dcl_pi.$(PROFILE).rprc_tmp + +FILES_common := \ + pi_test.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/dcl \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM263X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + dcl_linker_r5f_am263x_sitara.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lnortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + nortos.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am263x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/nortos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am263x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am263x:r5fss0-0:nortos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(BOOTIMAGE_NAME) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am263x:r5fss0-0:nortos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am263x:r5fss0-0:nortos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am263x:r5fss0-0:nortos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am263x:r5fss0-0:nortos:ti-arm-clang dcl_pi ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM263x_beta --context r5fss0-0 --part AM263x --package ZCZ --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..d790183 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,84 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-1 = 1 +BOOTIMAGE_CORE_ID_r5fss1-0 = 2 +BOOTIMAGE_CORE_ID_r5fss1-1 = 3 +SBL_RUN_ADDRESS=0x70002000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am263x:r5fss0-0:nortos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +endif diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..1d080a1 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/dcl/dcl_pi/data/PI_ctl-1.dat b/examples/dcl/dcl_pi/data/PI_ctl-1.dat new file mode 100644 index 0000000..ad82014 --- /dev/null +++ b/examples/dcl/dcl_pi/data/PI_ctl-1.dat @@ -0,0 +1,1609 @@ +/* + A DCL_runPISeries example with the + following controller parameters: + .Kp = 2.50000f, + .Ki = 0.01000f, + .Umax = 2.00000f, + .Umin = -2.00000f +*/ +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, 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0000000..2dcb3d0 --- /dev/null +++ b/examples/dcl/dcl_pi/data/PI_ctl-3.dat @@ -0,0 +1,1609 @@ +/* + A DCL_runPISeriesTustin example with the + following controller parameters: + .Kp = 2.50000f, + .Ki = 0.01000f, + .Umax = 2.00000f, + .Umin = -2.00000f +*/ +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, +0.000000, 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+-0.00000000e+00f, +-0.00000000e+00f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-0.00000000e+00f, +-0.00000000e+00f, +-0.00000000e+00f, +0.00000000e+00f, +0.00000000e+00f, +0.00000000e+00f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +0.00000000e+00f, +0.00000000e+00f, +0.00000000e+00f, +-0.00000000e+00f, +-0.00000000e+00f, +-0.00000000e+00f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-0.00000000e+00f, +-0.00000000e+00f, +-0.00000000e+00f, +0.00000000e+00f, +0.00000000e+00f, +0.00000000e+00f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +2.44140625e-04f, +0.00000000e+00f, +0.00000000e+00f, +0.00000000e+00f, +-0.00000000e+00f, +-0.00000000e+00f, +-0.00000000e+00f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-2.44140625e-04f, +-0.00000000e+00f, +-0.00000000e+00f, +-0.00000000e+00f, diff --git a/examples/dcl/dcl_pi/pi_test.c b/examples/dcl/dcl_pi/pi_test.c new file mode 100644 index 0000000..3354e64 --- /dev/null +++ b/examples/dcl/dcl_pi/pi_test.c @@ -0,0 +1,126 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "pi_test.h" + +void dcl_pi_main(void *args) +{ + /* Open drivers to open the UART driver for console */ + Drivers_open(); + Board_driversOpen(); + + // + // Available PI controllers are: + // - DCL_runPISeries + // - DCL_runPIParallel + // - DCL_runPISeriesTustin + // - DCL_runPIParallelEnhanced (Requires additional parameters) + // + PI_runTest(pi_controller, &DCL_runPISeries); + + Board_driversClose(); + Drivers_close(); +} + +int PI_runTest(DCL_PI *ctrl_handle, DCL_PI_FUNC dcl_pi_func) +{ + // + // Define DFLOG pointers that will be used to access the data buffer + // + DCL_FDLOG rkBuf, ykBuf, outBuf, ctlBuf; + DCL_resetPI(ctrl_handle); + + // + // Initialize Log pointers to the data buffer + // + DCL_initLog(&rkBuf, (float32_t*)rk_buffer, DATA_LENGTH); + DCL_initLog(&ykBuf, (float32_t*)yk_buffer, DATA_LENGTH); + DCL_initLog(&outBuf, (float32_t*)out_buffer, DATA_LENGTH); + DCL_initLog(&ctlBuf, (float32_t*)ctl_buffer, DATA_LENGTH); + DCL_clearLog(&outBuf); + + int i; + for (i = 0; i < NUM_ELEMENTS; i++) + { + // + // rk = Target referenced value + // yk = Current feedback value + // uk = Output control effort + // + float32_t rk,yk,uk; + + // + // Read the input data buffers + // + rk = DCL_readLog(&rkBuf); + yk = DCL_readLog(&ykBuf); + + // + // Run the controller + // Equivalent to uk = DCL_runPI_series(ctrl_handle, rk, yk); + // + uk = (*dcl_pi_func)(ctrl_handle, rk, yk); + + // + // Write the results to the output buffer + // + DCL_writeLog(&outBuf, uk); + + } + + // + // Reset the log pointer so it starts from the beginning + // + DCL_resetLog(&outBuf); + + // + // Check output against expected output with tolerance (1e-06) + // + int errors = 0; + for (i = 0; i < NUM_ELEMENTS; i++) + { + float32_t output = DCL_readLog(&outBuf); // out_buffer[i] + float32_t expected = DCL_readLog(&ctlBuf); // ctl_buffer[i] + if (!DCL_isZero(output - expected)) + { + errors++; + DebugP_log("FAIL at sample %d, outputs %f, should be %f\n", i, output, expected); + } + } + + DebugP_log("PI test produced %d error\n",errors); + + return errors; +} + + diff --git a/examples/dcl/dcl_pi/pi_test.h b/examples/dcl/dcl_pi/pi_test.h new file mode 100644 index 0000000..5f6e72a --- /dev/null +++ b/examples/dcl/dcl_pi/pi_test.h @@ -0,0 +1,115 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef PI_TEST_H +#define PI_TEST_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "ti_drivers_config.h" +#include "ti_drivers_open_close.h" +#include "ti_board_open_close.h" +#include + +// +// User configurable values +// +#define PI_TESTCASE 1 //!< Defines testcase, tests 1-3 is provided +#define DATA_LENGTH 1601 //!< Size of total data inputs +#define NUM_ELEMENTS 400 //!< The number of samples ran, cannot exceed DATA_LENGTH + +void dcl_pi_main(void *args); +typedef float32_t (*DCL_PI_FUNC)(DCL_PI *p, float32_t rk, float32_t yk); +int PI_runTest(DCL_PI *ctrl_handle, DCL_PI_FUNC dcl_pi_func); + + +// +// Controller initialization +// +//! Method 1: +//! Direct assignments +//! +DCL_PI *pi_controller = &(DCL_PI) +{ + .Kp = 2.50000f, + .Ki = 0.01000f, + .Umax = 2.00000f, + .Umin = -2.00000f, + PI_INT_DEFAULTS // macro for default values of internal attributes +}; + +//! Method 2: +//! Initalizing with input controller parameters +//! +/* +float32_t kp = 2.5f, ki = 0.01f, umax = 1.0f, umin = -1.0f; +DCL_PI *pi_controller = DCL_initPIasParam(2.5f,0.01f,1.0f,-1.0f); // (kp,ki,umax,umin) +*/ + +// +// Macros for selecting testvector based on PI_TESTCASE +// +#define _LSTR(x) #x +#define __LSTR(x) _LSTR(x) +#define PI_RK_DATA(x) __LSTR(data/PI_rk-x.dat) +#define PI_YK_DATA(x) __LSTR(data/PI_yk-x.dat) +#define PI_CTL_DATA(x) __LSTR(data/PI_ctl-x.dat) + +// +// Allocate data sections and initialize data +// +const float32_t __attribute__((weak)) rk_buffer[DATA_LENGTH] = +{ +#include PI_RK_DATA(PI_TESTCASE) +}; + +const float32_t __attribute__((weak)) yk_buffer[DATA_LENGTH] = +{ +#include PI_YK_DATA(PI_TESTCASE) +}; + +const float32_t __attribute__((weak)) ctl_buffer[DATA_LENGTH] = +{ +#include PI_CTL_DATA(PI_TESTCASE) +}; + +static float32_t out_buffer[DATA_LENGTH]; + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif diff --git a/makefile.am243x b/makefile.am243x index 1c2e442..2a9a5b8 100644 --- a/makefile.am243x +++ b/makefile.am243x @@ -46,6 +46,22 @@ help: @echo . @echo Example build targets, @echo ====================== + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/position_sense/endat_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/position_sense/endat_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/position_sense/endat_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @@ -172,6 +188,22 @@ $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa): BUILD_COMBO_EXAMPLE_ALL = # Various Example Targets +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += endat_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += endat_diagnostic_multi_channel_load_share_am243x-evm_r5fss0-0_freertos_ti-arm-clang @@ -209,6 +241,54 @@ examples: $(BUILD_COMBO_EXAMPLE_ALL) examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL) + dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile all + endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang: $(MAKE) -C examples/position_sense/endat_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all @@ -293,6 +373,22 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL) BUILD_COMBO_EXAMPLE_CLEAN_ALL = # Various Example Clean Targets +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += endat_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += endat_diagnostic_multi_channel_load_share_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean @@ -330,6 +426,54 @@ examples-clean: $(BUILD_COMBO_EXAMPLE_CLEAN_ALL) examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL) + dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile clean + endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/position_sense/endat_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean @@ -414,6 +558,22 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL) BUILD_COMBO_EXAMPLE_SCRUB_ALL = # Various Example Scrub Targets +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += endat_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += endat_diagnostic_multi_channel_load_share_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub @@ -451,6 +611,54 @@ examples-scrub: $(BUILD_COMBO_EXAMPLE_SCRUB_ALL) examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL) + dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile scrub + endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub: $(MAKE) -C examples/position_sense/endat_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub diff --git a/makefile.am263x b/makefile.am263x index 346cda7..8a874ec 100644 --- a/makefile.am263x +++ b/makefile.am263x @@ -40,6 +40,14 @@ help: @echo . @echo Example build targets, @echo ====================== + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic_over_soc_uart/am263x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo . @echo System Example build targets, @@ -104,6 +112,14 @@ $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa_over_soc_uart): BUILD_COMBO_EXAMPLE_ALL = # Various Example Targets +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang # Various System Example Targets @@ -115,12 +131,44 @@ examples: $(BUILD_COMBO_EXAMPLE_ALL) examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL) + dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile all + + dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile all + + dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all + tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang: $(MAKE) -C examples/position_sense/tamagawa_diagnostic_over_soc_uart/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all BUILD_COMBO_EXAMPLE_CLEAN_ALL = # Various Example Clean Targets +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean # Various System Example Clean Targets @@ -132,12 +180,44 @@ examples-clean: $(BUILD_COMBO_EXAMPLE_CLEAN_ALL) examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL) + dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile clean + + dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile clean + + dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean + tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/position_sense/tamagawa_diagnostic_over_soc_uart/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean BUILD_COMBO_EXAMPLE_SCRUB_ALL = # Various Example Scrub Targets +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_scrub # Various System Example Scrub Targets @@ -149,6 +229,30 @@ examples-scrub: $(BUILD_COMBO_EXAMPLE_SCRUB_ALL) examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL) + dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + + dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile scrub + + dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: $(MAKE) -C examples/position_sense/tamagawa_diagnostic_over_soc_uart/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub diff --git a/makefile_projectspec.am243x b/makefile_projectspec.am243x index 7f9f477..d83dd2b 100644 --- a/makefile_projectspec.am243x +++ b/makefile_projectspec.am243x @@ -7,6 +7,22 @@ include $(MOTOR_CONTROL_SDK_PATH)/imports.mak BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL = # Various Example Projectspec Build Targets +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += endat_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += endat_diagnostic_multi_channel_load_share_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build @@ -44,6 +60,54 @@ all: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL) all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL) + dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build: $(MAKE) -C examples/position_sense/endat_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all @@ -129,6 +193,22 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL) BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL = # Various Example Projectspec Clean Targets +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += endat_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += endat_diagnostic_multi_channel_load_share_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean @@ -166,6 +246,54 @@ clean: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL) clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL) + dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/position_sense/endat_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean @@ -251,6 +379,22 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL) BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL = # Various Example Projectspec Export Targets +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += endat_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += endat_diagnostic_multi_channel_load_share_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export @@ -288,6 +432,54 @@ export: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL) export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL) + dcl_df22_am243x-evm_r5fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am243x-evm_m4fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am243x-evm_m4fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am243x-lp_r5fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am243x-lp_m4fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am243x-lp_m4fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am243x-evm_r5fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am243x-evm_m4fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am243x-evm_m4fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am243x-lp_r5fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am243x-lp_m4fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am243x-lp_m4fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + endat_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export: $(MAKE) -C examples/position_sense/endat_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export @@ -398,6 +590,22 @@ help: @echo . @echo Example ProjectSpec build targets, @echo ================================== + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-evm/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am243x-lp/m4fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/position_sense/endat_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/position_sense/endat_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/position_sense/endat_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] diff --git a/makefile_projectspec.am263x b/makefile_projectspec.am263x index 82304bf..9130f64 100644 --- a/makefile_projectspec.am263x +++ b/makefile_projectspec.am263x @@ -4,6 +4,14 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL = # Various Example Projectspec Build Targets +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_build # Various System Example Projectspec Build Targets @@ -15,6 +23,30 @@ all: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL) all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL) + dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec all + + dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_build: $(MAKE) -C examples/position_sense/tamagawa_diagnostic_over_soc_uart/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all @@ -22,6 +54,14 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL) BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL = # Various Example Projectspec Clean Targets +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean # Various System Example Projectspec Clean Targets @@ -33,6 +73,30 @@ clean: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL) clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL) + dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec clean + + dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/position_sense/tamagawa_diagnostic_over_soc_uart/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean @@ -40,6 +104,14 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL) BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL = # Various Example Projectspec Export Targets +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_export # Various System Example Projectspec Export Targets @@ -51,6 +123,30 @@ export: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL) export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL) + dcl_df22_am263x-cc_r5fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am263x-cc_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am263x-lp_r5fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_df22_am263x-lp_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am263x-cc_r5fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am263x-cc_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec export + + dcl_pi_am263x-lp_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + tamagawa_diagnostic_soc_uart_am263x-lp_r5fss0-0_freertos_ti-arm-clang_export: $(MAKE) -C examples/position_sense/tamagawa_diagnostic_over_soc_uart/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export @@ -74,6 +170,14 @@ help: @echo . @echo Example ProjectSpec build targets, @echo ================================== + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic_over_soc_uart/am263x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo . @echo System Example ProjectSpec build targets, diff --git a/source/dcl/common/dcl_aux.h b/source/dcl/common/dcl_aux.h new file mode 100644 index 0000000..544d169 --- /dev/null +++ b/source/dcl/common/dcl_aux.h @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_AUX_H_ +#define _DCL_AUX_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_aux.h + * \brief Defines all the auxiliary macros for DCL + */ + +#ifndef NULL +#define NULL 0 +#endif + +//! \brief Local definitions of the mathematical constant pi +//! +#define CONST_PI 3.14159265358979323846f +#define CONST_2PI 2.0f * CONST_PI +#define CONST_PI_F64 3.1415926535897932384626433832795028841971693993751058209749445923078164062L +#define CONST_2PI_F64 2.0L * CONST_PI_F64 + +//! \brief Define the acceptable FPU numerical tolerances +//! +#define DCL_FPU32_TOL 1.0e-06f +#define DCL_FPU64_TOL 1.0e-10L + +//! \brief Define the default control period in seconds +//! +#define DCL_DEFAULT_PERIOD_S 100.0e-06f +#define DCL_DEFAULT_PERIODF64_S 100.0e-06L + +//! \brief Determines numerical proximity to specified value +//! +#define DCL_isValue(x,y) (((x < (y + DCL_FPU32_TOL)) && (x > (y - DCL_FPU32_TOL))) ? 1U : 0U) +#define DCL_isValueF64(x,y) (((x < (y + DCL_FPU64_TOL)) && (x > (y - DCL_FPU64_TOL))) ? 1U : 0U) + +//! \brief Determines floating point numerical proximity to zero +//! +#define DCL_isZero(x) DCL_isValue(x,0.0f) +#define DCL_isZeroF64(x) DCL_isValueF64(x,0.0L) + +//! \brief Returns a random floating point result between -1.0 and +1.0 +//! where 'a' is the multiplier in single or double precision. +//! Useful for initialization of arrays and matrices during test. +//! +//! \code +//! float32_t s = DCL_rand(1.0f); +//! \endcode +//! +#define DCL_rand(a) (a * ((float32_t) rand() / (float32_t) (RAND_MAX >> 1) - 1.0f)) +#define DCL_randF64(a) (a * ((float64_t) rand() / (float64_t) (RAND_MAX >> 1) - 1.0L)) + +//! \brief Defines the lower limit on derivative filter coefficient c2 +//! in order for fc to lie below the Nyquist frequency +//! +#define DCL_c2Limit ((2.0f - CONST_PI) / (2.0f + CONST_PI)) +#define DCL_c2LimitF64 ((2.0L - CONST_PI_F64) / (2.0L + CONST_PI_F64)) + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_AUX_H_ \ No newline at end of file diff --git a/source/dcl/common/dcl_clamp.h b/source/dcl/common/dcl_clamp.h new file mode 100644 index 0000000..44c6b48 --- /dev/null +++ b/source/dcl/common/dcl_clamp.h @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_CLAMP_H_ +#define _DCL_CLAMP_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_clamp.h + * \brief Defines both single, double precision clamp function for saturation + */ + +//--- Controller clamping functions ------------------------------------ + +//! \brief Saturates a control variable and returns true if either limit is exceeded +//! +//! \param[in] data The address of the data variable +//! \param[in] Umax The upper limit +//! \param[in] Umin The lower limit +//! \return Returns 'false' if (Umin < data < Umax), else 'true' +//! +_DCL_CODE_ACCESS +bool DCL_runClamp(float32_t *data, float32_t Umax, float32_t Umin) +{ + float32_t iv = *(data); + *(data) = (*(data) > Umax) ? Umax : *(data); + *(data) = (*(data) < Umin) ? Umin : *(data); + return(((iv < Umax) && (iv > Umin)) ? false : true); +} + +//! \brief Saturates a control variable and returns true if either limit is exceeded +//! +//! \param[in] data The address of the data variable +//! \param[in] Umax The upper limit +//! \param[in] Umin The lower limit +//! \return Returns 'false' if (Umin < data < Umax), else 'true' +//! +_DCL_CODE_ACCESS +bool DCL_runClampF64(float64_t *data, float64_t Umax, float64_t Umin) +{ + float64_t iv = *(data); + *(data) = (*(data) > Umax) ? Umax : *(data); + *(data) = (*(data) < Umin) ? Umin : *(data); + return(((iv < Umax) && (iv > Umin)) ? false : true); +} + +//! \brief Macro to saturate a control variable but does not change the data itself unlike runClamp() +//! +//! \param[in] data The data value +//! \param[in] Umax The upper limit +//! \param[in] Umin The lower limit +//! \return Returns unchanged data value is not saturated, else either Umax or Umin +#define DCL_runSat(data,Umax,Umin) (data > Umax) ? Umax : (data < Umin) ? Umin : data + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_CLAMP_H_ diff --git a/source/dcl/common/dcl_css.h b/source/dcl/common/dcl_css.h new file mode 100644 index 0000000..5d28335 --- /dev/null +++ b/source/dcl/common/dcl_css.h @@ -0,0 +1,157 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_CSS_H_ +#define _DCL_CSS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_css.h + * \brief Defines Controller Common Support Structure (CSS) and related macros + */ + +//--- Controller Common Support Structure ------------------------------------ + +//! \brief Defines the controller common support structure +//! +//! \details The CSS is accessed via a pointer in most of the DCL +//! controller structs. It contains data used for testing and +//! configuring the controller, as well as for error checking. +//! +typedef struct dcl_css { + float32_t tpt; //!< Test point + float32_t t_sec; //!< Controller period in seconds + volatile uint32_t sts; //!< Status word + uint32_t err_line; //!< Error location line (errno) + uint32_t err; //!< Error status code + const char* err_func; //!< Error function name +} DCL_CSS; + +//! \brief Default values to initialize the CSS structure +//! +#define DCL_CSS_DEFAULTS { 0.0f, DCL_DEFAULT_PERIOD_S, 0U, 0U, 0U, NULL } + +//! \brief Defines the 64bit CSS structure +//! +typedef struct dcl_css64 { + float64_t tpt; //!< Test point + float64_t t_sec; //!< Controller period in seconds + volatile uint32_t sts; //!< Status word + uint32_t err_line; //!< Error location line (errno) + uint32_t err; //!< Error status code + const char* err_func; //!< Error function name +} DCL_CSSF64; + +//! \brief Default values to initialize the CSS 64bit structure +//! +#define DCL_CSSF64_DEFAULTS { 0.0L, DCL_DEFAULT_PERIODF64_S, 0U, 0U, 0U, NULL } + +//! \brief Loads the controller period in the CSS +//! CSS pointer must be configured first +//! +//! \param[in] p Pointer to the controller structure +//! \param[in] a Sample period in seconds +//! \return None +//! +#define DCL_setControllerPeriod(p,a) ((p)->css->T = a) + +//--- Status word ------------------------------------------------------------ + +//! \brief Defines the library enumerated status bits +//! +//! \details To perform a safe parameter update, the user first loads new parameter into +//! the controller's SPS. Then either invoke DCL_update() for an one-time update, +//! or in the case of an ISR routine update, the user could use +//! DCL_setPendingStatus() to indicate an pending update. In which the next call to +//! DCL_pendingUpdate() would update the controller parameter and clear the flag. +//! +//! Both DCL_update() and DCL_pendingUpdate() disables global interrupts to ensure a safe update. +//! +typedef enum +{ + dcl_sts_none = 0U, //!< Status empty + dcl_sts_param_update = (1U << 0), //!< Parameter update-in-progress flag, high if ongoing parameter update + dcl_sts_param_pending = (1U << 2), //!< Parameter pending-for-update flag, high if parameter needs to be updated + dcl_sts_ctrl_running = (1U << 1) //!< Controller operation-in-progress flag, high if operation is in progress +} dcl_status_bits; + +//! \brief Macros to set and clear the update-in-progress flag +//! +#define DCL_setUpdateStatus(p) ((p)->css->sts |= dcl_sts_param_update) +#define DCL_clearUpdateStatus(p) ((p)->css->sts &= ~dcl_sts_param_update) + +//! \brief Determine whether a parameter update-in-progress flag is set +//! +//! \return 'true' if update status is set, otherwise false +//! +#define DCL_getUpdateStatus(p) (0U != ((p)->css->sts & dcl_sts_param_update)) + + +//! \brief Macros to set and clear the pending-for-update flag +//! +#define DCL_setPendingStatus(p) ((p)->css->sts |= dcl_sts_param_pending) +#define DCL_clearPendingStatus(p) ((p)->css->sts &= ~dcl_sts_param_pending) + +//! \brief Determine whether a parameter pending-for-update flag is set +//! +//! \return 'true' if pending status is set, otherwise false +//! +#define DCL_getPendingStatus(p) (0U != ((p)->css->sts & dcl_sts_param_pending)) + +//! \brief Macros placed at the beginning and end of the controller +//! so that other functions know a control operation is in +//! progress. Typically only used with complex controllers +//! which may not be atomic. +//! +#define DCL_setControllerStatus(p) ((p)->css->sts |= dcl_sts_ctrl_running) +#define DCL_clearControllerStatus(p) ((p)->css->sts &= ~dcl_sts_ctrl_running) + +//! \brief Determine whether a controller operation-in-progress flag is set +//! +//! \return 'true' if controller running flag is set, otherwise false +//! +#define DCL_getControllerStatus(p) (0U != ((p)->css->sts & dcl_sts_ctrl_running)) + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_CSS_H_ diff --git a/source/dcl/common/dcl_stability.h b/source/dcl/common/dcl_stability.h new file mode 100644 index 0000000..5f406e0 --- /dev/null +++ b/source/dcl/common/dcl_stability.h @@ -0,0 +1,119 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_STABILITY_H_ +#define _DCL_STABILITY_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_stability.h + * \brief Defines polynomial stability functions + */ + +//--- Polynomial stability functions ----------------------------------------- + +//! \brief Determines stability of a first order real polynomial +//! P(z) = z + a1 +//! +//! \param[in] a1 Coefficient a1 +//! \return 'true' if the root has magnitude less than 1, 'false' otherwise +//! +_DCL_CODE_ACCESS +bool DCL_isStablePn1(float32_t a1) +{ + return ((a1 * a1) < 1.0f); +} + +//! \brief Determines stability of a second order polynomial with real coefficients +//! P(z) = a0 z^2 + a1 z + a2 +//! +//! \param[in] a0 Second order coefficient a1 +//! \param[in] a1 First order coefficient a1 +//! \param[in] a2 Coefficient a2 +//! \return 'true' if both roots have magnitude less than 1, 'false' otherwise +//! +_DCL_CODE_ACCESS +bool DCL_isStablePn2(float32_t a0, float32_t a1, float32_t a2) +{ + float32_t b0, b1, c0; + + b0 = a0 - a2 * a2 / a0; + b1 = a1 - a1 * a2 / a0; + c0 = b0 - b1 * b1 / b0; + + return ((a0 > 0.0f) && (b0 > 0.0f) && (c0 > 0.0f)); +} + +//! \brief Determines stability of a third order polynomial with real coefficients +//! P(z) = a0 z^3 + a1 z^2 + a2 z + a3 +//! +//! \param[in] a0 Third order coefficient a1 +//! \param[in] a1 Second order coefficient a1 +//! \param[in] a2 First order coefficient a2 +//! \param[in] a3 Coefficient a3 +//! \return 'true' if all roots have magnitude less than 1, 'false' otherwise +//! +_DCL_CODE_ACCESS +bool DCL_isStablePn3(float32_t a0, float32_t a1, float32_t a2, float32_t a3) +{ + float32_t b0, b1, b2, c0, c1, d0; + + b0 = a0 - a3 * a3 / a0; + b1 = a1 - a2 * a3 / a0; + b2 = a2 - a1 * a3 / a0; + c0 = b0 - b2 * b2 / b0; + c1 = b1 - b1 * b2 / b0; + d0 = c0 - c1 * c1 / c0; + + return ((a0 > 0.0f) && (b0 > 0.0f) && (c0 > 0.0f) && (d0 > 0.0f)); +} + +/* +//! \brief Determines stability of a ZPK3 representation by checking pole magnitude +//! Located in common/dcl_zpk3.h +extern bool DCL_isStableZpk3(DCL_ZPK3 *q); +*/ + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_STABILITY_H_ diff --git a/source/dcl/common/dcl_zpk3.h b/source/dcl/common/dcl_zpk3.h new file mode 100644 index 0000000..417f0ec --- /dev/null +++ b/source/dcl/common/dcl_zpk3.h @@ -0,0 +1,141 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_ZPK3_H_ +#define _DCL_ZPK3_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * + * @{ + * \file dcl_zpk3.h + * \brief Defines ZPK3 strcture that represents + * a third order transfer function of poles and zeros + */ + +#include + +//--- ZPK3 structure --------------------------------------------------------- + +//! \brief Defines the DCL_ZPK3 controller structure. +//! +//! \details Allows controllers to be defined in terms of complex pole +//! and zero frequencies. The common structure consists of +//! three complex zeros, three complex poles, and a real gain. +//! All frequencies must be specified in radians/sec. <--- TODO: Conflicting units compared with the documentation,rad/s or hz? +//! +typedef struct dcl_zpk3 +{ + float complex z1; //!< Complex zeros 1 + float complex z2; //!< Complex zeros 2 + float complex z3; //!< Complex zeros 3 + float complex p1; //!< Complex poles 1 + float complex p2; //!< Complex poles 2 + float complex p3; //!< Complex poles 3 + float32_t K; //!< Real gain +} DCL_ZPK3; + +//! \brief Defines default values to initialize the DCL_ZPK3 structure +//! +#define ZPK3_DEFAULTS { 0.0f + 0.0f*I, 0.0f + 0.0f*I, 0.0f + 0.0f*I, \ + 0.0f + 0.0f*I, 0.0f + 0.0f*I, 0.0f + 0.0f*I, \ + 1.0f } + +_DCL_CODE_ACCESS +bool DCL_isStableZpk3(DCL_ZPK3 *q) +{ + return((cabsf(q->p1) < 1.0f) && (cabsf(q->p2) < 1.0f) && (cabsf(q->p3) < 1.0f)); +} + +// \brief All ZPK functions exist in its respective controller conversion type +// All the ZPK conversion function prototypes are listed below +/* +//! \brief Loads the DF11 shadow coefficients from a ZPK3 description +//! Note: new settings take effect after DCL_updateDF11() +//! Only real z1 & p1 considered: all other roots ignored +//! Located in df/dcl_df11.h +extern void DCL_loadDF11asZPK(DCL_DF11 *p, DCL_ZPK3 *q); + +//! \brief Loads the DF13 shadow coefficients from a ZPK3 description +//! Note: new settings take effect after DCL_updateDF13() +//! Located in df/dcl_df13.h +extern void DCL_loadDF13asZPK(DCL_DF13 *p, DCL_ZPK3 *q); + +//! \brief Loads the DF22 shadow coefficients from a ZPK3 description +//! Note: new settings take effect after DCL_updateDF22() +//! Only z1, z2, p1 & p2 considered: z3 & p3 ignored +//! Located in df/dcl_df22.h +extern void DCL_loadDF22asZPK(DCL_DF22 *p, DCL_ZPK3 *q); + +//! \brief Loads the DF23 shadow coefficients from a ZPK3 description +//! Note: new settings take effect after DCL_updateDF23() +//! Located in df/dcl_df23.h +extern void DCL_loadDF23asZPK(DCL_DF23 *p, DCL_ZPK3 *q); + +//! \brief Configures a series PI controller in "zero-pole-gain" form +//! Note: new settings take effect after DCL_updatePI() +//! Only z1 considered in DCL_ZPK3, other poles & zeros ignored +//! Zero frequency assumed to be in radians/sec. +//! Located in pi/dcl_pi.h +extern void DCL_loadSeriesPIasZPK(DCL_PI *p, DCL_ZPK3 *q); + +//! \brief Configures a parallel PI controller in "zero-pole-gain" form +//! Note: new settings take effect after DCL_updatePI() +//! Zero frequency assumed to be in radians/sec. +//! Located in pi/dcl_pi.h +extern void DCL_loadParallelPIasZPK(DCL_PI *p, DCL_ZPK3 *q); + +//! \brief Configures a series PID controller in ZPK form +//! Note: parameters take effect after call to DCL_updatePID() +//! Only z1, z2 & p2 considered. p1 = 0 assumed. +//! Located in pid/dcl_pid.h +extern void DCL_loadSeriesPIDasZPK(DCL_PID *p, DCL_ZPK3 *q); + +//! \brief Configures a parallel PID controller in ZPK form +//! Note: parameters take effect after call to DCL_updatePID() +//! Only z1, z2 & p2 considered. p1 = 0 assumed. +//! Located in pid/dcl_pid.h +extern void DCL_loadParallelPIDasZPK(DCL_PID *p, DCL_ZPK3 *q); +*/ + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_ZPK3_H_ diff --git a/source/dcl/dcl.h b/source/dcl/dcl.h new file mode 100644 index 0000000..fc32970 --- /dev/null +++ b/source/dcl/dcl.h @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_H_ +#define _DCL_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \defgroup DCL_API_MODULE APIs for Digital Control Library + * \ingroup MOTOR_CONTROL_API + * + * Here is the list of APIs used for Digital Control Library + * @{ + * + * \file dcl.h + * \brief Top level header that contains all Digital Controller Library functions + */ + +//! \brief Library version number formatted for numerical comparison +//! v4.00.00.00 +#define DCL_VERSION 4000000 + +//! \brief Enable voltaile flag for dcl strcutures +//! Only enable the flag if the controller can +//! execute across different cores/threads +//! (update parameter funcs does not count) +//! Disabled by default +//#define DCL_VOLATILE_ENABLED + +//! \brief Build the library with error handling enabled +//! Performs error checks on various update and +//! stability functions +//! Disabled by default +//#define DCL_ERROR_HANDLING_ENABLED + +//! \brief Build the library with test points enabled +//! during arthmetic operations +//! Disabled by default +//#define DCL_TESTPOINTS_ENABLED + +#include "misc/dcl_fdlog.h" +#include "misc/dcl_error.h" + +/* 32bit arthmetic */ +#include "pi/dcl_pi.h" +#include "pi/dcl_pi2.h" +#include "pid/dcl_pid.h" + +#include "df/dcl_df11.h" +#include "df/dcl_df13.h" +#include "df/dcl_df22.h" +#include "df/dcl_df23.h" + +/* 64bit arthmetic */ +#include "pid/dcl_pidf64.h" + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_H_ diff --git a/source/dcl/dcl_common.h b/source/dcl/dcl_common.h new file mode 100644 index 0000000..4ed4f85 --- /dev/null +++ b/source/dcl/dcl_common.h @@ -0,0 +1,114 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_COMMON_H_ +#define _DCL_COMMON_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_common.h + * \brief Top level header that contains all DCL common strctures and functions + */ + +//! \brief Defines single,double precision data type. +//! Note: Assumes ABI to be __TI_EABI__, +//! does not support legacy __TI_COFF__. +typedef float float32_t; +typedef double float64_t; + +//! \brief Defines the scope of dcl functions (static inline/extern inline/none) +#define _DCL_CODE_ACCESS static inline + +//! \brief Defines dcl function section that users can specify in the linker file(.cmd) +//! and to accelerate performance by mapping to faster memory +//! Note: only DCL_runXXX and DCL_updateXXX/pendingUpdateXXX are included by default +#define _DCL_CODE_SECTION __attribute__((section("dclfuncs"))) + +//! \brief Defines volatile for DCL strctures +//! Flags can be defined in dcl.h or +//! user files before including DCL lib +#ifdef DCL_VOLATILE_ENABLED + #define _DCL_VOLATILE volatile +#else + #define _DCL_VOLATILE +#endif + +//! \brief Set a software breakpoint assembly instruction +//! +#if defined (__TMS320C28XX__) //C28 ISA + #define DCL_setBreakPoint() asm(" ESTOP") +#elif defined (__ARM_ARCH) //ARM ISA + #define DCL_setBreakPoint() __asm(" bkpt #0") +#else + #define DCL_setBreakPoint() + #warning "DCL currently doesn't support break point for this architecture" +#endif + +//! \brief Define enable and disable interrupt operations +//! +#if defined (__TMS320C28XX__) + #define DCL_disableInts() __disable_interrupts() + #define DCL_restoreInts(v) if (0U == (v & 0x1)) __enable_interrupts() + typedef uint16_t dcl_interrupt_t; +#elif defined (SOC_AM64X) || defined (SOC_AM243X) || defined (SOC_AM263X) + #include + #define DCL_disableInts() HwiP_disable() + #define DCL_restoreInts(v) HwiP_restore(v) + typedef uint32_t dcl_interrupt_t; +#else + #define DCL_disableInts() 0 + #define DCL_restoreInts(v) + typedef uint32_t dcl_interrupt_t; + #warning "DCL currently doesn't support interrupt operations for this architecture" +#endif + +#include +#include +#include "common/dcl_aux.h" +#include "common/dcl_css.h" +#include "common/dcl_zpk3.h" +#include "common/dcl_clamp.h" +#include "common/dcl_stability.h" + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_COMMON_H_ diff --git a/source/dcl/df/dcl_df11.h b/source/dcl/df/dcl_df11.h new file mode 100644 index 0000000..9e33335 --- /dev/null +++ b/source/dcl/df/dcl_df11.h @@ -0,0 +1,305 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_DF11_H_ +#define _DCL_DF11_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_df11.h + * \brief Contains direct form 1 1st order DF11 compensator + * with its related structures and functions + */ + +#include "../dcl_common.h" + +//--- Direct Form 1 - 1st order ---------------------------------------------- + +//! \brief Defines the DCL_DF11 shadow parameter set +//! used for updating compensator parameter +//! +typedef struct dcl_df11_sps +{ + float32_t b0; //!< pos. coefficient to e(k) + float32_t b1; //!< pos. coefficient to e(k-1) + float32_t a1; //!< neg. coefficient to u(k-1) +} DCL_DF11_SPS; + +#define DF11_SPS_DEFAULTS { 0.5f, 0.5f, 1.0f } + +//! \brief DF11 object for storing df11 specific parameters +//! +typedef _DCL_VOLATILE struct dcl_df11 +{ + /* compensator parameter */ + float32_t b0; //!< pos. coefficient to e(k) + float32_t b1; //!< pos. coefficient to e(k-1) + float32_t a1; //!< neg. coefficient to u(k-1) + + /* internal storage */ + float32_t d1; //!< e(k-1) + float32_t d2; //!< u(k-1) + + /* miscellaneous */ + DCL_DF11_SPS *sps; //!< Pointer to the shadow parameter set + DCL_CSS *css; //!< Pointer to the common support structure +} DCL_DF11, *DF11_Handle; + +//! \brief Defines default values to initialize DCL_DF11 +//! +#define DF11_DEFAULTS { 0.5f, 0.5f, 1.0f, 0.0f, 0.0f, \ + &(DCL_DF11_SPS)DF11_SPS_DEFAULTS, &(DCL_CSS)DCL_CSS_DEFAULTS } + +//! \brief Macro for internal default values to initialize DCL_DF11 +//! Example: DCL_DF11 df11_ctrl = { +//! .b0 = 0.5f, +//! .b1 = 0.5f, +//! .a1 = 1.0f, +//! DF11_INT_DEFAULTS +//! }; +#define DF11_INT_DEFAULTS .d1=0.0f, .d2=0.0f, .sps=&(DCL_DF11_SPS)DF11_SPS_DEFAULTS, .css=&(DCL_CSS)DCL_CSS_DEFAULTS + +//! \brief Initialize DCL_DF11 struct with default parameters +//! Example: DCL_DF11* df11_ctrl = DCL_initDF11(); +//! +//! \return A DCL_DF11* pointer +//! +#define DCL_initDF11() &(DCL_DF11)DF11_DEFAULTS + +//! \brief Initialize DCL_DF11 struct with input compensator parameters +//! Example: DCL_DF11* DF11_ctrl = DCL_initDF11asParam(0.5f,0.5f,1.0f); +//! Note: input parameter needs to be in the same order as listed in DF11_SPS struct +//! +//! \return A DCL_DF11* pointer +//! +#define DCL_initDF11asParam(_b0,_b1,_a1) &(DCL_DF11){ .b0=_b0, .b1=_b1, .a1=_a1, \ + DF11_INT_DEFAULTS } + +//! \brief Initialize DCL_DF11 struct with sps parameters +//! Example: DCL_DF11_SPS df_sps = { .b0 = , .b1 = , ...}; //initial parameter +//! DCL_DF11 df_ctrl; +//! DCL_initDF11asSPS(&df_ctrl,&df_sps); +//! +//! \param[in] df_ptr DCL_DF11* pointer that needs to be initialized +//! \param[in] sps_ptr DCL_DF11_SPS* pointer with assigned parameters +//! \return DCL_DF11* Returns DCL_DF11* with set sps parameters, default parameter will be used +//! if sps_ptr is not specified +//! +#define DCL_initDF11asSPS(df_ptr,sps_ptr) \ +({ \ + DCL_DF11* new_df = (df_ptr) ? df_ptr : DCL_initDF11(); \ + DCL_DF11_SPS* new_sps = (sps_ptr) ? sps_ptr : &(DCL_DF11_SPS)DF11_SPS_DEFAULTS;\ + if(sps_ptr) \ + { \ + *new_df = (DCL_DF11){ (new_sps)->b0, (new_sps)->b1, (new_sps)->a1, \ + 0.0f, 0.0f, (DCL_DF11_SPS*)new_sps, &(DCL_CSS)DCL_CSS_DEFAULTS }; \ + } \ + new_df; \ +}) + +//! \brief Resets DF11 internal storage data with interrupt protection +//! +//! \param[in] df Pointer to the DCL_DF11 structure +//! +_DCL_CODE_ACCESS +void DCL_resetDF11(DCL_DF11 *df) +{ + dcl_interrupt_t ints = DCL_disableInts(); + df->d1 = df->d2 = 0.0f; + DCL_restoreInts(ints); +} + +//! \brief Loads DF11 tuning parameter from its SPS parameter +//! +//! \param[in] df Pointer to the active DCL_DF11 controller structure +//! +_DCL_CODE_ACCESS +void DCL_fupdateDF11(DCL_DF11 *df) +{ + df->b0 = df->sps->b0; + df->b1 = df->sps->b1; + df->a1 = df->sps->a1; +} + +//! \brief Updates DF11 parameter from its SPS parameter with interrupt protection +//! +//! \param[in] df Pointer to the DCL_DF11 controller structure +//! \return 'true' if update is successful, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_updateDF11(DCL_DF11 *df) +{ + if (!DCL_getUpdateStatus(df)) + { + dcl_interrupt_t ints = DCL_disableInts(); + DCL_setUpdateStatus(df); + df->b0 = df->sps->b0; + df->b1 = df->sps->b1; + df->a1 = df->sps->a1; + DCL_clearUpdateStatus(df); + DCL_restoreInts(ints); + return true; + } + return false; +} + +//! \brief A conditional update based on the pending-for-update flag. +//! If the pending status is set, the function will update DF11 +//! parameter from its SPS parameter and clear the status flag on completion. +//! Note: Use DCL_setPendingStatus(df) to set the pending status. +//! +//! \param[in] df Pointer to the DCL_DF11 controller structure +//! \return 'true' if an update is applied, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_pendingUpdateDF11(DCL_DF11 *df) +{ + if (DCL_getPendingStatus(df) && DCL_updateDF11(df)) + { + DCL_clearPendingStatus(df); + return true; + } + return false; +} + +//! \brief Update SPS parameter with active param, userful when needing +//! to update only few active param from SPS and keep rest the same +//! +//! \param[in] df Pointer to the active DCL_DF11 controller structure +//! +_DCL_CODE_ACCESS +void DCL_updateDF11SPS(DCL_DF11 *df) +{ + df->sps->b0 = df->b0; + df->sps->b1 = df->b1; + df->sps->a1 = df->a1; +} + +//! \brief Determines stability of the shadow DF11 compensator +//! +//! \param[in] df Pointer to the DCL_DF11 controller structure +//! \return 'true' if the pole has magnitude less than 1, 'false' otherwise +//! +_DCL_CODE_ACCESS +bool DCL_isStableDF11(DCL_DF11 *df) +{ + return(DCL_isStablePn1(df->sps->a1)); +} + +//! \brief Loads the DF11 shadow coefficients from a ZPK3 description +//! Note: Sampling period df->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updateDF11(). +//! Only real z1 & p1 considered, all other roots ignored. +//! +//! \param[in] df Pointer to the DCL_DF11 controller structure +//! \param[in] zpk Pointer to the ZPK3 structure +//! +_DCL_CODE_ACCESS +void DCL_loadDF11asZPK(DCL_DF11 *df, DCL_ZPK3 *zpk) +{ +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= DCL_isZero(cimagf(zpk->z1)) ? dcl_none : dcl_param_warn_err; + err_code |= DCL_isZero(cimagf(zpk->p1)) ? dcl_none : dcl_param_warn_err; + if (err_code) + { + DCL_setError(df,err_code); + DCL_getErrorInfo(df); + DCL_runErrorHandler(df); + } +#endif + + float32_t t_sec = df->css->t_sec; + float32_t a0p = 2.0f - (float32_t) crealf(zpk->p1) * t_sec; + df->sps->b0 = zpk->K * (2.0f - (float32_t) crealf(zpk->z1) * t_sec) / a0p; + df->sps->b1 = zpk->K * (-2.0f - (float32_t) crealf(zpk->z1) * t_sec) / a0p; + df->sps->a1 = (-2.0f - (float32_t) crealf(zpk->p1) * t_sec) / a0p; +} + +//! \brief Loads compensator coefficients to emulate series form PI +//! Note: Sampling period df->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updateDF11(). +//! +//! \param[in] df Pointer to the DCL_DF11 controller structure +//! \param[in] Kp Proportional gain +//! \param[in] Ki Integral gain +//! +_DCL_CODE_ACCESS +void DCL_loadDF11asPI(DCL_DF11 *df, float32_t Kp, float32_t Ki) +{ +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (Kp < 0.0f) ? dcl_param_invalid_err : dcl_none; + err_code |= (Ki < 0.0f) ? dcl_param_invalid_err : dcl_none; + if (err_code) + { + DCL_setError(df,err_code); + DCL_getErrorInfo(df); + DCL_runErrorHandler(df); + } +#endif + + float32_t t_sec = df->css->t_sec; + df->sps->b0 = Kp * ((Ki * t_sec) + 2.0f) / 2.0f; + df->sps->b1 = Kp * ((Ki * t_sec) - 2.0f) / 2.0f; + df->sps->a1 = -1.0f; +} + +//! \brief Executes a 1st order Direct Form 1 controller +//! +//! \param[in] df Pointer to the DCL_DF11 controller structure +//! \param[in] ek The servo error +//! \return uk The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runDF11(DCL_DF11 *df, float32_t ek) +{ + df->d2 = (ek * df->b0) + (df->d1 * df->b1) - (df->d2 * df->a1); + df->d1 = ek; + + return(df->d2); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_DF11_H_ diff --git a/source/dcl/df/dcl_df13.h b/source/dcl/df/dcl_df13.h new file mode 100644 index 0000000..c68e493 --- /dev/null +++ b/source/dcl/df/dcl_df13.h @@ -0,0 +1,372 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_DF13_H_ +#define _DCL_DF13_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_df13.h + * \brief Contains direct form 1 3rd order DF13 compensator + * with its related structures and functions + */ + +#include "../dcl_common.h" + +//--- Direct Form 1 - 3rd order ---------------------------------------------- + +//! \brief Defines the DCL_DF13 shadow parameter set +//! used for updating compensator parameter +//! +typedef struct dcl_df13_sps { + float32_t b0; //!< pos. coefficient to e(k) + float32_t b1; //!< pos. coefficient to e(k-1) + float32_t b2; //!< pos. coefficient to e(k-2) + float32_t b3; //!< pos. coefficient to e(k-3) + float32_t a1; //!< neg. coefficient to u(k-1) + float32_t a2; //!< neg. coefficient to u(k-2) + float32_t a3; //!< neg. coefficient to u(k-3) +} DCL_DF13_SPS; + +#define DF13_SPS_DEFAULTS { 0.25f, 0.25f, 0.25f, 0.25f, 0.0f, 0.0f, 0.0f } + +//! \brief DF13 object for storing df13 specific parameters +//! +typedef _DCL_VOLATILE struct dcl_df13 +{ + /* compensator parameter */ + float32_t b0; //!< pos. coefficient to e(k) + float32_t b1; //!< pos. coefficient to e(k-1) + float32_t b2; //!< pos. coefficient to e(k-2) + float32_t b3; //!< pos. coefficient to e(k-3) + float32_t a1; //!< neg. coefficient to u(k-1) + float32_t a2; //!< neg. coefficient to u(k-2) + float32_t a3; //!< neg. coefficient to u(k-3) + + /* internal storage */ + float32_t d1; //!< e(k-1) + float32_t d2; //!< e(k-2) + float32_t d3; //!< e(k-3) + float32_t d4; //!< u(k-1) + float32_t d5; //!< u(k-2) + float32_t d6; //!< u(k-3) + + /* miscellaneous */ + DCL_DF13_SPS *sps; //!< updates compensator parameter + DCL_CSS *css; //!< configuration & debugging +} DCL_DF13, *DF13_Handle; + +//! \brief Defines default values to initialize DCL_DF13 +//! +#define DF13_DEFAULTS { 0.25f, 0.25f, 0.25f, 0.25f, 0.0f, 0.0f, 0.0f, \ + 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, \ + &(DCL_DF13_SPS)DF13_SPS_DEFAULTS, &(DCL_CSS)DCL_CSS_DEFAULTS } + +//! \brief Macro for internal default values to initialize DCL_DF13 +//! Example: DCL_DF13 df13_ctrl = { +//! .b0 = 0.25f, +//! .b1 = 0.25f, +//! ... +//! .a3 = 0.0f, +//! DF13_INT_DEFAULTS +//! }; +#define DF13_INT_DEFAULTS .d1=0.0f, .d2=0.0f, .d3=0.0f, .d4=0.0f, .d5=0.0f, \ + .d6=0.0f, .sps=&(DCL_DF13_SPS)DF13_SPS_DEFAULTS, \ + .css=&(DCL_CSS)DCL_CSS_DEFAULTS + +//! \brief Initialize DCL_DF13 struct with default parameters +//! Example: DCL_DF13* df13_ctrl = DCL_initDF13(); +//! +//! \return A DCL_DF13* pointer +//! +#define DCL_initDF13() &(DCL_DF13)DF13_DEFAULTS + +//! \brief Initialize DCL_DF13 struct with input compensator parameters +//! Example: DCL_DF13* DF13_ctrl = DCL_initDF13asParam(0.25f,0.25f,0.25f,0.25f,0.0f,0.0f,0.0f); +//! Note: input parameter needs to be in the same order as listed in DF13_SPS struct +//! +//! \return A DCL_DF13* pointer +//! +#define DCL_initDF13asParam(_b0,_b1,_b2,_b3,_a1,_a2,_a3) &(DCL_DF13){ .b0=_b0, .b1=_b1, \ + .b2=_b2, .b3=_b3, .a1=_a1, .a2=_a2, .a3=_a3, DF13_INT_DEFAULTS } + +//! \brief Initialize DCL_DF13 struct with sps parameters +//! Example: DCL_DF13_SPS df_sps = { .b0 = , .b1 = , ...}; //initial parameter +//! DCL_DF13 df_ctrl; +//! DCL_initDF13asSPS(&df_ctrl,&df_sps); +//! +//! \param[in] df_ptr DCL_DF13* pointer that needs to be initialized +//! \param[in] sps_ptr DCL_DF13_SPS* pointer with assigned parameters +//! \return DCL_DF13* Returns DCL_DF13* with set sps parameters, default parameter will be used +//! if sps_ptr is not specified +//! +#define DCL_initDF13asSPS(df_ptr,sps_ptr) \ +({ \ + DCL_DF13* new_df = (df_ptr) ? df_ptr : DCL_initDF13(); \ + DCL_DF13_SPS* new_sps = (sps_ptr) ? sps_ptr : &(DCL_DF13_SPS)DF13_SPS_DEFAULTS; \ + if(sps_ptr) \ + { \ + *new_df =(DCL_DF13){ (new_sps)->b0, (new_sps)->b1, (new_sps)->b2, (new_sps)->b3, \ + (new_sps)->a1, (new_sps)->a2, (new_sps)->a3, 0.0f, 0.0f, 0.0f, 0.0f, \ + 0.0f, 0.0f, (DCL_DF13_SPS*)new_sps, &(DCL_CSS)DCL_CSS_DEFAULTS }; \ + } \ + new_df; \ +}) + +//! \brief Resets DF13 internal storage data with interrupt protection +//! Implemented as inline C function +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! +_DCL_CODE_ACCESS +void DCL_resetDF13(DCL_DF13 *df) +{ + dcl_interrupt_t ints = DCL_disableInts(); + df->d1 = df->d2 = df->d3 = df->d4 = df->d5 = df->d6 = 0.0f; + DCL_restoreInts(ints); +} + +//! \brief Loads DF13 tuning parameter from its SPS parameter +//! +//! \param[in] df Pointer to the active DCL_DF13 controller structure +//! +_DCL_CODE_ACCESS +void DCL_fupdateDF13(DCL_DF13 *df) +{ + df->b0 = df->sps->b0; + df->b1 = df->sps->b1; + df->b2 = df->sps->b2; + df->b3 = df->sps->b3; + df->a1 = df->sps->a1; + df->a2 = df->sps->a2; + df->a3 = df->sps->a3; +} + +//! \brief Updates DF13 parameter from its SPS parameter with interrupt protection +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! \return 'true' if update is successful, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_updateDF13(DCL_DF13 *df) +{ + if (!DCL_getUpdateStatus(df)) + { + dcl_interrupt_t ints = DCL_disableInts(); + DCL_setUpdateStatus(df); + df->b0 = df->sps->b0; + df->b1 = df->sps->b1; + df->b2 = df->sps->b2; + df->b3 = df->sps->b3; + df->a1 = df->sps->a1; + df->a2 = df->sps->a2; + df->a3 = df->sps->a3; + DCL_clearUpdateStatus(df); + DCL_restoreInts(ints); + return true; + } + return false; +} + +//! \brief A conditional update based on the pending-for-update flag. +//! If the pending status is set, the function will update DF13 +//! parameter from its SPS parameter and clear the status flag on completion.. +//! Note: Use DCL_setPendingStatus(df) to set the pending status. +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! \return 'true' if an update is applied, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_pendingUpdateDF13(DCL_DF13 *df) +{ + if (DCL_getPendingStatus(df) && DCL_updateDF13(df)) + { + DCL_clearPendingStatus(df); + return true; + } + return false; +} + +//! \brief Update SPS parameter with active param, userful when needing +//! to update only few active param from SPS and keep rest the same +//! +//! \param[in] df Pointer to the active DCL_DF13 controller structure +//! +_DCL_CODE_ACCESS +void DCL_updateDF13SPS(DCL_DF13 *df) +{ + df->sps->b0 = df->b0; + df->sps->b1 = df->b1; + df->sps->b2 = df->b2; + df->sps->b3 = df->b3; + df->sps->a1 = df->a1; + df->sps->a2 = df->a2; + df->sps->a3 = df->a3; +} + +//! \brief Determines stability of the shadow compensator +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! \return 'true' if all poles have magnitude less than 1, 'false' otherwise +//! +_DCL_CODE_ACCESS +bool DCL_isStableDF13(DCL_DF13 *df) +{ + return(DCL_isStablePn3(1.0f, df->sps->a1, df->sps->a2, df->sps->a3)); +} + +//! \brief Loads the DF13 shadow coefficients from a ZPK3 description. +//! Note: Sampling period df->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updateDF13(). +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! \param[in] zpk Pointer to the DCL_ZPK3 structure +//! +_DCL_CODE_ACCESS +void DCL_loadDF13asZPK(DCL_DF13 *df, DCL_ZPK3 *zpk) +{ +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= DCL_isZero(cimagf(zpk->z1) + cimagf(zpk->z2) + cimagf(zpk->z3)) ? dcl_none : dcl_param_invalid_err; + err_code |= DCL_isZero(cimagf(zpk->p1) + cimagf(zpk->p2) + cimagf(zpk->p3)) ? dcl_none : dcl_param_invalid_err; + if (err_code) + { + DCL_setError(df,err_code); + DCL_getErrorInfo(df); + DCL_runErrorHandler(df); + } +#endif + + float32_t beta2 = -(float32_t) crealf(zpk->z1 + zpk->z2 + zpk->z3); + float32_t beta1 = (float32_t) crealf((zpk->z1 * zpk->z2) + (zpk->z2 * zpk->z3) + (zpk->z1 * zpk->z3)); + float32_t beta0 = -(float32_t) crealf(zpk->z1 * zpk->z2 * zpk->z3); + + float32_t alpha2 = -(float32_t) crealf(zpk->p1 + zpk->p2 + zpk->p3); + float32_t alpha1 = (float32_t) crealf((zpk->p1 * zpk->p2) + (zpk->p2 * zpk->p3) + (zpk->p1 * zpk->p3)); + float32_t alpha0 = -(float32_t) crealf(zpk->p1 * zpk->p2 * zpk->p3); + + float32_t t_sec = df->css->t_sec; + + float32_t a0p = 8.0f + (alpha2 * 4.0f * t_sec) + (alpha1 * 2.0f * t_sec * t_sec) + (alpha0 * t_sec * t_sec * t_sec); + + df->sps->b0 = zpk->K * (8.0f + (beta2 * 4.0f * t_sec) + (beta1 * 2.0f * t_sec * t_sec) + (beta0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->b1 = zpk->K * (-24.0f - (beta2 * 4.0f * t_sec) + (beta1 * 2.0f * t_sec * t_sec) + (3.0f * beta0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->b2 = zpk->K * (24.0f - (beta2 * 4.0f * t_sec) - (beta1 * 2.0f * t_sec * t_sec) + (3.0f * beta0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->b3 = zpk->K * (-8.0f + (beta2 * 4.0f * t_sec) - (beta1 * 2.0f * t_sec * t_sec) + (beta0 * t_sec * t_sec * t_sec)) / a0p; + + df->sps->a1 = (-24.0f - (alpha2 * 4.0f * t_sec) + (alpha1 * 2.0f * t_sec * t_sec) + (3.0f * alpha0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->a2 = (24.0f - (alpha2 * 4.0f * t_sec) - (alpha1 * 2.0f * t_sec * t_sec) + (3.0f * alpha0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->a3 = (-8.0f + (alpha2 * 4.0f * t_sec) - (alpha1 * 2.0f * t_sec * t_sec) + (alpha0 * t_sec * t_sec * t_sec)) / a0p; +} + +//! \brief Executes a 3rd order Direct Form 1 controller +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! \param[in] ek The servo error +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runDF13(DCL_DF13 *df, float32_t ek) +{ + float32_t v4 = (ek * df->b0) + (df->d1 * df->b1) + (df->d2 * df->b2) + (df->d3 * df->b3) - (df->d4 * df->a1) - (df->d5 * df->a2) - (df->d6 * df->a3); + df->d3 = df->d2; + df->d2 = df->d1; + df->d1 = ek; + df->d6 = df->d5; + df->d5 = df->d4; + df->d4 = v4; + + return(v4); +} + +//! \brief Immediate computation to obtain DF13 servo error +//! without updating the controller +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! \param[in] ek The servo error +//! \return The control effort +//! +_DCL_CODE_ACCESS +float32_t DCL_runDF13PartialCompute(DCL_DF13 *df, float32_t ek) +{ + float32_t v4 = (ek * df->b0) + (df->d1 * df->b1) + (df->d2 * df->b2) + (df->d3 * df->b3) - (df->d4 * df->a1) - (df->d5 * df->a2) - (df->d6 * df->a3); + return(v4); +} + +//! \brief Update DF13 controller based on pre-computed control effort +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! \param[in] ek The servo error +//! \param[in] uk The controller output in the previous sample interval +//! +_DCL_CODE_ACCESS +void DCL_runDF13PartialUpdate(DCL_DF13 *df, float32_t ek, float32_t uk) +{ + df->d3 = df->d2; + df->d2 = df->d1; + df->d1 = ek; + df->d6 = df->d5; + df->d5 = df->d4; + df->d4 = uk; +} + +//! \brief Executes a 3rd order Direct Form 1 controller with clamp +//! +//! \param[in] df Pointer to the DCL_DF13 controller structure +//! \param[in] ek The servo error +//! \param[in] Umax Upper saturation limit +//! \param[in] Umin Lower saturation limit +//! \return uk The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runDF13Clamp(DCL_DF13 *df, float32_t ek, float32_t Umax, float32_t Umin) +{ + float32_t uk = DCL_runDF13PartialCompute(df, ek); + bool is_clamped = DCL_runClamp(&uk, Umax, Umin); + if(!is_clamped) DCL_runDF13PartialUpdate(df, ek, uk); + return(uk); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_DF13_H_ diff --git a/source/dcl/df/dcl_df22.h b/source/dcl/df/dcl_df22.h new file mode 100644 index 0000000..4ed9626 --- /dev/null +++ b/source/dcl/df/dcl_df22.h @@ -0,0 +1,458 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_DF22_H_ +#define _DCL_DF22_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_df22.h + * \brief Contains direct form 2 2nd order DF22 compensator + * with its related structures and functions + */ + +#include "../dcl_common.h" + +//--- Direct Form 2 - 2nd order ---------------------------------------------- + +//! \brief Defines the DCL_DF22 shadow parameter set +//! used for updating compensator parameter +//! +typedef struct dcl_df22_sps +{ + float32_t b0; //!< pos. coefficient to e(k) + float32_t b1; //!< pos. coefficient to e(k-1) + float32_t b2; //!< pos. coefficient to e(k-2) + float32_t a1; //!< neg. coefficient to u(k-1) + float32_t a2; //!< neg. coefficient to u(k-2) +} DCL_DF22_SPS; + +#define DF22_SPS_DEFAULTS { 1.0f, 0.0f, 0.0f, 0.0f, 0.0f } + +//! \brief DF22 object for storing df22 specific parameters +//! +typedef _DCL_VOLATILE struct dcl_df22 +{ + /* compensator parameter */ + float32_t b0; //!< pos. coefficient to e(k) + float32_t b1; //!< pos. coefficient to e(k-1) + float32_t b2; //!< pos. coefficient to e(k-2) + float32_t a1; //!< neg. coefficient to u(k-1) + float32_t a2; //!< neg. coefficient to u(k-2) + + /* internal storage */ + float32_t x1; //!< x1 = b1*e(k-1) - a1*u(k-1) + x2 + float32_t x2; //!< x2 = b2*e(k-2) - a2*u(k-2) + + /* miscellaneous */ + DCL_DF22_SPS *sps; //!< updates compensator parameter + DCL_CSS *css; //!< configuration & debugging +} DCL_DF22, *DF22_Handle; + +//! \brief Defines default values to initialize DCL_DF22 +//! +#define DF22_DEFAULTS { 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, \ + &(DCL_DF22_SPS)DF22_SPS_DEFAULTS, &(DCL_CSS)DCL_CSS_DEFAULTS } + +//! \brief Macro for internal default values to initialize DCL_DF22 +//! Example: DCL_DF22 df22_ctrl = { +//! .b0 = 1.00f, +//! .b1 = 0.0f, +//! ... +//! .a2 = 0.0f, +//! DF22_INT_DEFAULTS +//! }; +#define DF22_INT_DEFAULTS .x1=0.0f, .x2=0.0f, .sps=&(DCL_DF22_SPS)DF22_SPS_DEFAULTS, \ + .css=&(DCL_CSS)DCL_CSS_DEFAULTS + +//! \brief Initialize DCL_DF22 struct with default parameters +//! Example: DCL_DF22* df22_ctrl = DCL_initDF22(); +//! +//! \return A DCL_DF22* pointer +//! +#define DCL_initDF22() &(DCL_DF22)DF22_DEFAULTS + +//! \brief Initialize DCL_DF22 struct with input compensator parameters +//! Example: DCL_DF22 DF22_ctrl = DCL_initD22asParam(1.0f,0.0f,0.0f,0.0f,0.0f); +//! Note: input parameter needs to be in the same order as listed in DF22_SPS struct. +//! +//! \return A DCL_DF22* pointer +//! +#define DCL_initDF22asParam(_b0,_b1,_b2,_a1,_a2) &(DCL_DF22){ .b0=_b0, .b1=_b1, \ + .b2=_b2, .a1=_a1, .a2=_a2, .a3=_a3, DF22_INT_DEFAULTS } + +//! \brief Initialize DCL_DF22 struct using sps parameters +//! Example: DCL_DF22_SPS df_sps = { .b0 = , .b1 = , ...}; //initial parameter +//! DCL_DF22 df_ctrl; +//! DCL_initDF22asSPS(&df_ctrl,&df_sps); +//! +//! \param[in] df_ptr DCL_DF22* pointer that needs to be initialized +//! \param[in] sps_ptr DCL_DF22_SPS* pointer with assigned parameters +//! \return Returns DCL_DF22* with set sps parameters, default parameter will be used +//! if sps_ptr is not specified +//! +#define DCL_initDF22asSPS(df_ptr,sps_ptr) \ +({ \ + DCL_DF22* new_df = (df_ptr) ? df_ptr : DCL_initDF22(); \ + DCL_DF22_SPS* new_sps = (sps_ptr) ? sps_ptr : &(DCL_DF22_SPS)DF22_SPS_DEFAULTS; \ + if(sps_ptr) \ + { \ + *new_df = (DCL_DF22){ (new_sps)->b0, (new_sps)->b1, (new_sps)->b2, (new_sps)->a1,\ + (new_sps)->a2, 0.0f, 0.0f, (DCL_DF22_SPS*)new_sps, &(DCL_CSS)DCL_CSS_DEFAULTS }; \ + } \ + new_df; \ +}) + +//! \brief Resets DF22 internal storage data with interrupt protection +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! +_DCL_CODE_ACCESS +void DCL_resetDF22(DCL_DF22 *df) +{ + dcl_interrupt_t ints = DCL_disableInts(); + df->x1 = df->x2 = 0.0f; + DCL_restoreInts(ints); +} + +//! \brief Loads DF22 tuning parameter from its SPS parameter +//! +//! \param[in] df Pointer to the active DCL_DF22 controller structure +//! +_DCL_CODE_ACCESS +void DCL_fupdateDF22(DCL_DF22 *df) +{ + df->b0 = df->sps->b0; + df->b1 = df->sps->b1; + df->b2 = df->sps->b2; + df->a1 = df->sps->a1; + df->a2 = df->sps->a2; +} + +//! \brief Updates DF22 parameter from its SPS parameter with interrupt protection +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \return 'true' if update is successful, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_updateDF22(DCL_DF22 *df) +{ + if (!DCL_getUpdateStatus(df)) + { + dcl_interrupt_t ints = DCL_disableInts(); + DCL_setUpdateStatus(df); + df->b0 = df->sps->b0; + df->b1 = df->sps->b1; + df->b2 = df->sps->b2; + df->a1 = df->sps->a1; + df->a2 = df->sps->a2; + DCL_clearUpdateStatus(df); + DCL_restoreInts(ints); + return true; + } + return false; +} + +//! \brief A conditional update based on the pending-for-update flag. +//! If the pending status is set, the function will update DF22 +//! parameter from its SPS parameter and clear the status flag on completion. +//! Note: Use DCL_setPendingStatus(df) to set the pending status. +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \return 'true' if an update is applied, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_pendingUpdateDF22(DCL_DF22 *df) +{ + if (DCL_getPendingStatus(df) && DCL_updateDF22(df)) + { + DCL_clearPendingStatus(df); + return true; + } + return false; +} + +//! \brief Update SPS parameter with active param, userful when needing +//! to update only few active param from SPS and keep rest the same +//! +//! \param[in] df Pointer to the active DCL_DF22 controller structure +//! +_DCL_CODE_ACCESS +void DCL_updateDF22SPS(DCL_DF22 *df) +{ + df->sps->b0 = df->b0; + df->sps->b1 = df->b1; + df->sps->b2 = df->b2; + df->sps->a1 = df->a1; + df->sps->a2 = df->a2; +} + + +//! \brief Determines stability of the shadow compensator +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \return 'true' if both poles have magnitude less than 1, 'false' otherwise +//! +_DCL_CODE_ACCESS +bool DCL_isStableDF22(DCL_DF22 *df) +{ + return(DCL_isStablePn2(1.0f, df->sps->a1, df->sps->a2)); +} + +//! \brief Loads the DF22 shadow coefficients from a ZPK3 description +//! Note: Sampling period df->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updateDF22(). +//! Only z1, z2, p1 & p2 are considered, z3 & p3 are ignored. +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \param[in] zpk Pointer to the DCL_ZPK3 structure +//! +_DCL_CODE_ACCESS +void DCL_loadDF22asZPK(DCL_DF22 *df, DCL_ZPK3 *zpk) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= DCL_isZero(cimagf(zpk->z1) + cimagf(zpk->z2)) ? dcl_none : dcl_param_invalid_err; + err_code |= DCL_isZero(cimagf(zpk->p1) + cimagf(zpk->p2)) ? dcl_none : dcl_param_invalid_err; + DCL_setError(df,err_code); + if (err_code) + { + DCL_getErrorInfo(df); + DCL_runErrorHandler(df); + } +#endif + + float32_t beta1 = -(float32_t) crealf(zpk->z1 + zpk->z2); + float32_t beta0 = (float32_t) crealf(zpk->z1 * zpk->z2); + float32_t alpha1 = -(float32_t) crealf(zpk->p1 + zpk->p2); + float32_t alpha0 = (float32_t) crealf(zpk->p1 * zpk->p2); + + float32_t t_sec = df->css->t_sec; + float32_t a0p = 4.0f + (alpha1 * 2.0f * t_sec) + (alpha0 * t_sec * t_sec); + + df->sps->b0 = zpk->K * (4.0f + (beta1 * 2.0f * t_sec) + (beta0 * t_sec * t_sec)) / a0p; + df->sps->b1 = zpk->K * (-8.0f + (2.0f * beta0 * t_sec * t_sec)) / a0p; + df->sps->b2 = zpk->K * (4.0f - (beta1 * 2.0f * t_sec) + (beta0 * t_sec * t_sec)) / a0p; + df->sps->a1 = (-8.0f + (2.0f * alpha0 * t_sec * t_sec)) / a0p; + df->sps->a2 = (4.0f - (alpha1 * 2.0f * t_sec) + (alpha0 * t_sec * t_sec)) / a0p; +} + +//! \brief Loads the DF22 shadow coefficients from damping ratio and un-damped +//! natural frequency using sample rate in CSS. +//! Note: Sampling period df->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updateDF22(). +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \param[in] z The damping ratio +//! \param[in] wn The un-damped natural frequency in rad/s +//! +_DCL_CODE_ACCESS +void DCL_loadDF22asZwn(DCL_DF22 *df, float32_t z, float32_t wn) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (z >= 0.0f) ? dcl_none : dcl_param_invalid_err; + err_code |= (wn >= 0.0f) ? dcl_none : dcl_param_invalid_err; + if (err_code) + { + DCL_setError(df,err_code); + DCL_getErrorInfo(df); + DCL_runErrorHandler(df); + } +#endif + + float32_t t_sec = df->css->t_sec; + float32_t v1 = wn * wn * t_sec * t_sec; + float32_t a2p = 1.0f / (4.0f + (4.0f * z * wn * t_sec) + v1); + df->sps->b0 = v1 * a2p; + df->sps->b1 = 2.0f * df->sps->b0; + df->sps->b2 = df->sps->b0; + df->sps->a1 = ((2.0f * v1) - 8.0f) * a2p; + df->sps->a2 = (4.0f - (4.0f * z * wn * t_sec) + v1) * a2p; +} + +//! \brief Loads the shadow DF22 compensator coefficients to emulate a series form PID. +//! Note: Sampling period df->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updateDF22(). +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \param[in] Kp Proportional gain +//! \param[in] Ki Integral gain +//! \param[in] Kd Derivative gain +//! \param[in] fc Derivative path filter bandwidth in Hz +//! +_DCL_CODE_ACCESS +void DCL_loadDF22asSeriesPID(DCL_DF22 *df, float32_t Kp, float32_t Ki, float32_t Kd, float32_t fc) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (Kp < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (Ki < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (Kd < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= ((fc < 0.0f) || (fc > (1.0f / (2.0f * df->css->T)))) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(df,err_code); + DCL_getErrorInfo(df); + DCL_runErrorHandler(df); + } +#endif + + float32_t t_sec = df->css->t_sec; + float32_t tau = 1 / (2.0f * CONST_PI * fc); + float32_t c1 = 2.0f / (t_sec + (2.0f * tau)); + float32_t c2 = c1 * (t_sec - (2.0f * tau)) / 2.0f; + float32_t Kdp = Kd * c1; + df->sps->b0 = Kp * (1 + Ki + Kdp); + df->sps->b1 = Kp * (c2 - 1 + Ki*c2 - 2*Kdp); + df->sps->b2 = Kp * (-c2 + Kdp); + df->sps->a1 = c2 - 1; + df->sps->a2 = -c2; +} + +//! \brief Loads the shadow DF22 compensator coefficients to emulate a parallel form PID. +//! Note: Sampling period df->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updateDF22(). +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \param[in] Kp Proportional gain +//! \param[in] Ki Integral gain +//! \param[in] Kd Derivative gain +//! \param[in] fc Derivative path filter bandwidth in Hz +//! +_DCL_CODE_ACCESS +void DCL_loadDF22asParallelPID(DCL_DF22 *df, float32_t Kp, float32_t Ki, float32_t Kd, float32_t fc) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (Kp < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (Ki < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (Kd < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (fc < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (fc > (1.0f / (2.0f * df->css->t_sec))) ? dcl_param_warn_err : dcl_none; + if (err_code) + { + DCL_setError(df,err_code); + DCL_getErrorInfo(df); + DCL_runErrorHandler(df); + } +#endif + + float32_t t_sec = df->css->t_sec; + float32_t tau = 1.0f / (2.0f * CONST_PI * fc); + float32_t c1 = 2.0f / (t_sec + (2.0f * tau)); + float32_t c2 = c1 * (t_sec - (2.0f * tau)) / 2.0f; + float32_t Kdp = Kd * c1; + df->sps->b0 = Kp + Ki + Kdp; + df->sps->b1 = (Kp * (c2 - 1)) + (Ki * c2) - (2.0f * Kdp); + df->sps->b2 = (-c2 * Kp) + Kdp; + df->sps->a1 = c2 - 1; + df->sps->a2 = -c2; +} + +//! \brief Executes a 2nd order Direct Form 2 controller +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \param[in] ek The servo error +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runDF22(DCL_DF22 *df, float32_t ek) +{ + float32_t v7 = (ek * df->b0) + df->x1; + df->x1 = (ek * df->b1) + df->x2 - (v7 * df->a1); + df->x2 = (ek * df->b2) - (v7 * df->a2); + + return(v7); +} + +//! \brief Immediate computation to obtain DF22 servo error +//! without updating the controller +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \param[in] ek The servo error +//! \return The control effort +//! +_DCL_CODE_ACCESS +float32_t DCL_runDF22PartialCompute(DCL_DF22 *df, float32_t ek) +{ + return((ek * df->b0) + df->x1); +} + +//! \brief Update DF22 controller based on pre-computed control effort +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \param[in] ek The servo error +//! \param[in] uk The controller output in the previous sample interval +//! +_DCL_CODE_ACCESS +void DCL_runDF22PartialUpdate(DCL_DF22 *df, float32_t ek, float32_t uk) +{ + df->x1 = (ek * df->b1) + df->x2 - (uk * df->a1); + df->x2 = (ek * df->b2) - (uk * df->a2); +} + +//! \brief Executes a 2nd order Direct Form 2 controller with clamp +//! +//! \param[in] df Pointer to the DCL_DF22 controller structure +//! \param[in] ek The servo error +//! \param[in] Umax Upper saturation limit +//! \param[in] Umin Lower saturation limit +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runDF22Clamp(DCL_DF22 *df, float32_t ek, float32_t Umax, float32_t Umin) +{ + float32_t uk = DCL_runDF22PartialCompute(df, ek); + bool is_clamped = DCL_runClamp(&uk, Umax, Umin); + if(!is_clamped) DCL_runDF22PartialUpdate(df, ek, uk); + return(uk); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_DF22_H_ diff --git a/source/dcl/df/dcl_df23.h b/source/dcl/df/dcl_df23.h new file mode 100644 index 0000000..3a35ad4 --- /dev/null +++ b/source/dcl/df/dcl_df23.h @@ -0,0 +1,359 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_DF23_H_ +#define _DCL_DF23_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_df23.h + * \brief Contains direct form 2 3rd order DF23 compensator + * with its related structures and functions + */ + +#include "../dcl_common.h" + +//--- Direct Form 2 - 3rd order ---------------------------------------------- + +//! \brief Defines the DCL_DF23 shadow parameter set +//! used for updating compensator parameter +//! +typedef struct dcl_df23_sps +{ + float32_t b0; //!< pos. coefficient to e(k) + float32_t b1; //!< pos. coefficient to e(k-1) + float32_t b2; //!< pos. coefficient to e(k-2) + float32_t b3; //!< pos. coefficient to e(k-3) + float32_t a1; //!< neg. coefficient to u(k-1) + float32_t a2; //!< neg. coefficient to u(k-2) + float32_t a3; //!< neg. coefficient to u(k-3) +} DCL_DF23_SPS; + +#define DF23_SPS_DEFAULTS { 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f } + +//! \brief DF23 object for storing df23 specific parameters +//! +typedef _DCL_VOLATILE struct dcl_df23 +{ + /* compensator parameter */ + float32_t b0; //!< pos. coefficient to e(k) + float32_t b1; //!< pos. coefficient to e(k-1) + float32_t b2; //!< pos. coefficient to e(k-2) + float32_t b3; //!< pos. coefficient to e(k-3) + float32_t a1; //!< neg. coefficient to u(k-1) + float32_t a2; //!< neg. coefficient to u(k-2) + float32_t a3; //!< neg. coefficient to u(k-3) + + /* internal storage */ + float32_t x1; //!< x1 = b1*e(k-1) - a1*u(k-1) + x2 + float32_t x2; //!< x2 = b2*e(k-2) - a2*u(k-2) + x3 + float32_t x3; //!< x3 = b3*e(k-3) - a3*u(k-3) + + /* miscellaneous */ + DCL_DF23_SPS *sps; //!< updates compensator parameter + DCL_CSS *css; //!< configuration & debugging +} DCL_DF23, *DF23_Handle; + +//! \brief Defines default values to initialize DCL_DF23 +//! +#define DF23_DEFAULTS { 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, \ + 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, \ + &(DCL_DF23_SPS)DF23_SPS_DEFAULTS, &(DCL_CSS)DCL_CSS_DEFAULTS } + +//! \brief Macro for internal default values to initialize DCL_DF23 +//! Example: DCL_DF23 df23_ctrl = { +//! .b0 = 1.0f, +//! .b1 = 0.0f, +//! ... +//! .a3 = 0.0f, +//! DF23_INT_DEFAULTS +//! }; +#define DF23_INT_DEFAULTS .x1=0.0f, .x2=0.0f, .x3=0.0f, \ +.sps=&(DCL_DF23_SPS)DF23_SPS_DEFAULTS, .css=&(DCL_CSS)DCL_CSS_DEFAULTS + +//! \brief Initialize DCL_DF23 struct with default parameters +//! Example: DCL_DF23* df23_ctrl = DCL_initDF23(); +//! +//! \return A DCL_DF23* pointer +//! +#define DCL_initDF23() &(DCL_DF23)DF23_DEFAULTS + +//! \brief Initialize DCL_DF23 struct with input compensator parameters +//! Example: DCL_DF23* DF23_ctrl = DCL_initDF23asParam(1.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f); +//! Note: input parameter needs to be in the same order as listed in DF23_SPS struct. +//! +//! \return A DCL_DF23* pointer +//! +#define DCL_initDF23asParam(_b0,_b1,_b2,_b3,_a1,_a2,_a3) &(DCL_DF23){ .b0=_b0, .b1=_b1, \ + .b2=_b2, .b3=_b3, .a1=_a1, .a2=_a2, .a3=_a3, DF23_INT_DEFAULTS } + +//! \brief Initialize DCL_DF23 struct with sps parameters +//! Example: DCL_DF23_SPS df_sps = { .b0 = , .b1 = , ...}; //initial parameter +//! DCL_DF23 df_ctrl; +//! DCL_initDF23asSPS(&df_ctrl,&df_sps); +//! +//! \param[in] df_ptr DCL_DF23* pointer that needs to be initialized +//! \param[in] sps_ptr DCL_DF23_SPS* pointer with assigned parameters +//! \return Returns DCL_DF23* with set sps parameters, default parameter will be used +//! if sps_ptr is not specified +//! +#define DCL_initDF23asSPS(df_ptr,sps_ptr) \ +({ \ + DCL_DF23* new_df = (df_ptr) ? df_ptr : DCL_initDF23(); \ + DCL_DF23_SPS* new_sps = (sps_ptr) ? sps_ptr : &(DCL_DF23_SPS)DF23_SPS_DEFAULTS;\ + if(sps_ptr) \ + { \ + *new_df = (DCL_DF23){ (new_sps)->b0, (new_sps)->b1, (new_sps)->b2, \ + (new_sps)->b3,(new_sps)->a1, (new_sps)->a2, (new_sps)->a3, 0.0f, \ + 0.0f, 0.0f, (DCL_DF23_SPS*)new_sps, &(DCL_CSS)DCL_CSS_DEFAULTS }; \ + } \ + new_df; \ +}) + +//! \brief Resets DF23 internal storage data with interrupt protection +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! +_DCL_CODE_ACCESS +void DCL_resetDF23(DCL_DF23 *df) +{ + dcl_interrupt_t ints = DCL_disableInts(); + df->x1 = df->x2 = df->x3 = 0.0f; + DCL_restoreInts(ints); +} + +//! \brief Loads DF23 tuning parameter from its SPS parameter +//! +//! \param[in] df Pointer to the active DCL_DF23 controller structure +//! +_DCL_CODE_ACCESS +void DCL_fupdateDF23(DCL_DF23 *df) +{ + df->b0 = df->sps->b0; + df->b1 = df->sps->b1; + df->b2 = df->sps->b2; + df->b3 = df->sps->b3; + df->a1 = df->sps->a1; + df->a2 = df->sps->a2; + df->a3 = df->sps->a3; +} + +//! \brief Updates DF23 parameter from its SPS parameter with interrupt protection +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! \return 'true' if update is successful, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_updateDF23(DCL_DF23 *df) +{ + if (!DCL_getUpdateStatus(df)) + { + dcl_interrupt_t ints = DCL_disableInts(); + DCL_setUpdateStatus(df); + df->b0 = df->sps->b0; + df->b1 = df->sps->b1; + df->b2 = df->sps->b2; + df->b3 = df->sps->b3; + df->a1 = df->sps->a1; + df->a2 = df->sps->a2; + df->a3 = df->sps->a3; + DCL_clearUpdateStatus(df); + DCL_restoreInts(ints); + return true; + } + return false; +} + +//! \brief A conditional update based on the pending-for-update flag. +//! If the pending status is set, the function will update DF23 +//! parameter from its SPS parameter and clear the status flag on completion. +//! Note: Use DCL_setPendingStatus(df) to set the pending status. +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! \return 'true' if an update is applied, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_pendingUpdateDF23(DCL_DF23 *df) +{ + if (DCL_getPendingStatus(df) && DCL_updateDF23(df)) + { + DCL_clearPendingStatus(df); + return true; + } + return false; +} + +//! \brief Update SPS parameter with active param, userful when needing +//! to update only few active param from SPS and keep rest the same +//! +//! \param[in] df Pointer to the active DCL_DF23 controller structure +//! +_DCL_CODE_ACCESS +void DCL_updateDF23SPS(DCL_DF23 *df) +{ + df->sps->b0 = df->b0; + df->sps->b1 = df->b1; + df->sps->b2 = df->b2; + df->sps->b3 = df->b3; + df->sps->a1 = df->a1; + df->sps->a2 = df->a2; + df->sps->a3 = df->a3; +} + +//! \brief Determines stability of the shadow compensator +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! \return 'true' if all poles have magnitude less than 1, 'false' otherwise +//! +_DCL_CODE_ACCESS +bool DCL_isStableDF23(DCL_DF23 *df) +{ + return(DCL_isStablePn3(1.0f, df->sps->a1, df->sps->a2, df->sps->a3)); +} + +//! \brief Loads the DF23 shadow coefficients from a ZPK3 description +//! Note: Sampling period df->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updateDF23(). +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! \param[in] zpk Pointer to the DCL_ZPK3 structure +//! +_DCL_CODE_ACCESS +void DCL_loadDF23asZPK(DCL_DF23 *df, DCL_ZPK3 *zpk) +{ +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= DCL_isZero(cimagf(zpk->z1) + cimagf(zpk->z2) + cimagf(zpk->z3)) ? dcl_none : dcl_param_invalid_err; + err_code |= DCL_isZero(cimagf(zpk->p1) + cimagf(zpk->p2) + cimagf(zpk->p3)) ? dcl_none : dcl_param_invalid_err; + if (err_code) + { + DCL_setError(df,err_code); + DCL_getErrorInfo(df); + DCL_runErrorHandler(df); + } +#endif + + float32_t beta2 = -(float32_t) crealf(zpk->z1 + zpk->z2 + zpk->z3); + float32_t beta1 = (float32_t) crealf((zpk->z1 * zpk->z2) + (zpk->z2 * zpk->z3) + (zpk->z1 * zpk->z3)); + float32_t beta0 = -(float32_t) crealf(zpk->z1 * zpk->z2 * zpk->z3); + + float32_t alpha2 = -(float32_t) crealf(zpk->p1 + zpk->p2 + zpk->p3); + float32_t alpha1 = (float32_t) crealf((zpk->p1 * zpk->p2) + (zpk->p2 * zpk->p3) + (zpk->p1 * zpk->p3)); + float32_t alpha0 = -(float32_t) crealf(zpk->p1 * zpk->p2 * zpk->p3); + + float32_t t_sec = df->css->t_sec; + float32_t a0p = 8.0f + (alpha2 * 4.0f * t_sec) + (alpha1 * 2.0f * t_sec * t_sec) + (alpha0 * t_sec * t_sec * t_sec); + + df->sps->b0 = zpk->K * (8.0f + (beta2 * 4.0f * t_sec) + (beta1 * 2.0f * t_sec * t_sec) + (beta0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->b1 = zpk->K * (-24.0f - (beta2 * 4.0f * t_sec) + (beta1 * 2.0f * t_sec * t_sec) + (3.0f * beta0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->b2 = zpk->K * (24.0f - (beta2 * 4.0f * t_sec) - (beta1 * 2.0f * t_sec * t_sec) + (3.0f * beta0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->b3 = zpk->K * (-8.0f + (beta2 * 4.0f * t_sec) - (beta1 * 2.0f * t_sec * t_sec) + (beta0 * t_sec * t_sec * t_sec)) / a0p; + + df->sps->a1 = (-24.0f - (alpha2 * 4.0f * t_sec) + (alpha1 * 2.0f * t_sec * t_sec) + (3.0f * alpha0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->a2 = (24.0f - (alpha2 * 4.0f * t_sec) - (alpha1 * 2.0f * t_sec * t_sec) + (3.0f * alpha0 * t_sec * t_sec * t_sec)) / a0p; + df->sps->a3 = (-8.0f + (alpha2 * 4.0f * t_sec) - (alpha1 * 2.0f * t_sec * t_sec) + (alpha0 * t_sec * t_sec * t_sec)) / a0p; +} + +//! \brief Executes a 3rd order Direct Form 2 controller +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! \param[in] ek The servo error +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runDF23(DCL_DF23 *df, float32_t ek) +{ + float32_t v7 = (ek * df->b0) + df->x1; + df->x1 = (ek * df->b1) + df->x2 - (v7 * df->a1); + df->x2 = (ek * df->b2) + df->x3 - (v7 * df->a2); + df->x3 = (ek * df->b3) - (v7 * df->a3); + return(v7); +} + +//! \brief Immediate computation to obtain DF23 servo error +//! without updating the controller +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! \param[in] ek The servo error +//! \return The control effort +//! +_DCL_CODE_ACCESS +float32_t DCL_runDF23PartialCompute(DCL_DF23 *df, float32_t ek) +{ + return((ek * df->b0) + df->x1); +} + +//! \brief Update DF22 controller based on pre-computed control effort +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! \param[in] ek The servo error +//! \param[in] uk The controller output in the previous sample interval +//! +_DCL_CODE_ACCESS +void DCL_runDF23PartialUpdate(DCL_DF23 *df, float32_t ek, float32_t uk) +{ + df->x1 = (ek * df->b1) + df->x2 - (uk * df->a1); + df->x2 = (ek * df->b2) + df->x3 - (uk * df->a2); + df->x3 = (ek * df->b3) - (uk * df->a3); +} + +//! \brief Executes a 3rd order Direct Form 2 controller with clamp +//! +//! \param[in] df Pointer to the DCL_DF23 controller structure +//! \param[in] ek The servo error +//! \param[in] Umax Upper saturation limit +//! \param[in] Umin Lower saturation limit +//! \return uk The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runDF23Clamp(DCL_DF23 *df, float32_t ek, float32_t Umax, float32_t Umin) +{ + float32_t uk = DCL_runDF23PartialCompute(df, ek); + bool is_clamped = DCL_runClamp(&uk, Umax, Umin); + if(!is_clamped) DCL_runDF23PartialUpdate(df, ek, uk); + return(uk); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_DF23_H_ diff --git a/source/dcl/misc/dcl_c28_compatibility.h b/source/dcl/misc/dcl_c28_compatibility.h new file mode 100644 index 0000000..601d6bb --- /dev/null +++ b/source/dcl/misc/dcl_c28_compatibility.h @@ -0,0 +1,222 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_C28_COMPATIBILITY_H_ +#define _DCL_C28_COMPATIBILITY_H_ + +//! \file dcl_c28_compatibility.h +//! \brief C28 compatibility macro +//! Contains backward compatbility mapping to C28 DCL's naming scheme +//! +//! Note: +//! CLA functions are not compatible, nonetheless its +//! direct equivalent are listed in comments +//! ASM functions will be alias into inline C code + +#ifdef __cplusplus +extern "C" { +#endif + +//***************************************************************************** +// PI +//***************************************************************************** +#define DCL_runPI_C1 DCL_runPISeries +#define DCL_runPI_C2 DCL_runPISeries +#define DCL_runPI_C3 DCL_runPIParallel +#define DCL_runPI_C4 DCL_runPIParallel +#define DCL_runPI_C5 DCL_runPIParallelEnhanced +#define DCL_runPI_C6 DCL_runPISeriesTustin +#define DCL_runPI_C7 DCL_runPISeriesTustin +/* +// C28 CLA Functions +#define DCL_runPI_L1 DCL_runPISeries +#define DCL_runPI_L2 DCL_runPIParallel +#define DCL_runPI_L3 DCL_runPISeries +#define DCL_runPI_L4 DCL_runPIParallel +#define DCL_runPI_L5 DCL_runPISeriesTustin +*/ + +//***************************************************************************** +// PI2 +//***************************************************************************** +#define DCL_runPI2_C1 DCL_runPI2Series +#define DCL_runPI2_C2 DCL_runPI2Series + +//***************************************************************************** +// PID +//***************************************************************************** +#define DCL_runPID_C1 DCL_runPIDSeries +#define DCL_runPID_C2 DCL_runPIDSeries +#define DCL_runPID_C3 DCL_runPIDParallel +#define DCL_runPID_C4 DCL_runPIDParallel +/* +// C28 CLA Functions +#define DCL_runPID_L1 DCL_runPIDSeries +#define DCL_runPID_L2 DCL_runPIDParallel +#define DCL_runPID_L3 DCL_runPIDSeries +#define DCL_runPID_L4 DCL_runPIDParallel +*/ + +//***************************************************************************** +// DF11 +//***************************************************************************** +#define DCL_runDF11_C1 DCL_runDF11 +#define DCL_runDF11_C2 DCL_runDF11 +/* +// C28 CLA Functions +#define DCL_runDF11_L1 DCL_runDF11 +*/ + +//***************************************************************************** +// DF13 +//***************************************************************************** +#define DCL_runDF13_C1 DCL_runDF13 +#define DCL_runDF13_C2 DCL_runDF13PartialCompute +#define DCL_runDF13_C3 DCL_runDF13PartialUpdate +#define DCL_runDF13_C4 DCL_runDF13 +#define DCL_runDF13_C5 DCL_runDF13PartialCompute +#define DCL_runDF13_C6 DCL_runDF13PartialUpdate +/* +// C28 CLA Functions +#define DCL_runDF13_L1 DCL_runDF13 +#define DCL_runDF13_L2 DCL_runDF13PartialCompute +#define DCL_runDF13_L3 DCL_runDF13PartialUpdate +#define DCL_runDF13_L4 DCL_runDF13 +#define DCL_runDF13_L5 DCL_runDF13PartialCompute +#define DCL_runDF13_L6 DCL_runDF13PartialUpdate +*/ + +//***************************************************************************** +// DF22 +//***************************************************************************** +#define DCL_runDF22_C1 DCL_runDF22 +#define DCL_runDF22_C2 DCL_runDF22PartialCompute +#define DCL_runDF22_C3 DCL_runDF22PartialUpdate +#define DCL_runDF22_C4 DCL_runDF22 +#define DCL_runDF22_C5 DCL_runDF22PartialCompute +#define DCL_runDF22_C6 DCL_runDF22PartialUpdate +/* +// C28 CLA Functions +#define DCL_runDF22_L1 DCL_runDF22 +#define DCL_runDF22_L2 DCL_runDF22PartialCompute +#define DCL_runDF22_L3 DCL_runDF22PartialUpdate +#define DCL_runDF22_L4 DCL_runDF22 +*/ + +//***************************************************************************** +// DF23 +//***************************************************************************** +#define DCL_runDF23_C1 DCL_runDF23 +#define DCL_runDF23_C2 DCL_runDF23PartialCompute +#define DCL_runDF23_C3 DCL_runDF23PartialUpdate +#define DCL_runDF23_C4 DCL_runDF23 +#define DCL_runDF23_C5 DCL_runDF23PartialCompute +#define DCL_runDF23_C6 DCL_runDF23PartialUpdate +/* +// C28 CLA Functions +#define DCL_runDF23_L1 DCL_runDF23 +#define DCL_runDF23_L2 DCL_runDF23PartialCompute +#define DCL_runDF23_L3 DCL_runDF23PartialUpdate +*/ + +//***************************************************************************** +// Clamp +//***************************************************************************** +#define DCL_runClamp_C1 DCL_runClamp +#define DCL_runClamp_C2 DCL_runClamp +#define DCL_runClamp_S1 DCL_runClampF64 +/* +// C28 CLA Functions +#define DCL_runClamp_L1 DCL_runClamp +*/ + +//***************************************************************************** +// Macro Functions +//***************************************************************************** +#define F32_IS_VALUE DCL_isValue +#define F64_IS_VALUE DCL_isValue64 +#define F32_IS_ZERO DCL_isZero +#define F64_IS_ZERO DCL_isZero64 +#define DCL_randf DCL_rand +#define DCL_randf64 DCL_rand64 +#define DCL_C2_LIMIT_32 DCL_c2Limit +#define DCL_C2_LIMIT_64 DCL_c2Limit64 +#define DCL_BREAK_POINT DCL_setBreakPoint +#define DCL_DISABLE_INTS DCL_disableInts +#define DCL_RESTORE_INTS DCL_restoreInts +#define DCL_SET_CONTROLLER_PERIOD DCL_setControllerPeriod +#define DCL_SET_SAMPLE_RATE DCL_setControllerPeriod +#define DCL_REQUEST_UPDATE DCL_setPendingStatus +#define DCL_CLEAR_UPDATE_REQUEST DCL_clearPendingStatus +#define DCL_UPDATE_WAITING DCL_getPendingStatus +#define DCL_CONTROLLER_BEGIN DCL_setControllerStatus +#define DCL_CONTROLLER_END DCL_clearControllerStatus +#define DCL_CONTROLLER_IN_PROGRESS DCL_getControllerStatus +#define DCL_SET_ERROR DCL_setError +#define DCL_CLEAR_ERROR_CODE DCL_clearError +#define DCL_RUN_ERROR_HANDLER DCL_runErrorHandler +#define DCL_GET_ERROR_LOC DCL_getErrorInfo + +//***************************************************************************** +// Macro Constants +//***************************************************************************** +#define CONST_PI_32 CONST_PI +#define CONST_2PI_32 CONST_2PI +#define CONST_PI_64 CONST_PI_F64 +#define CONST_2PI_64 CONST_2PI_F64 +#define DCL_DEFAULT_T_F32 DCL_DEFAULT_PERIOD_S +#define DCL_DEFAULT_T_F64 DCL_DEFAULT_PERIODF64_S +#define DEFAULT_FPU32_TOL DCL_FPU32_TOL +#define DEFAULT_FPU64_TOL DCL_FPU64_TOL +#define NULL_ADDR NULL + +//***************************************************************************** +// FDLOG +//***************************************************************************** +#define FDLOG DCL_FDLOG +#define DCL_createLog DCL_initLog +#define FDLOG_SPACE DCL_getLogRemain +#define FDLOG_SIZE DCL_getLogSize +#define FDLOG_ELEMENT DCL_getLogIndex +#define FDLOG_DEFAULTS {0,0,0} +#define FDLOG_DEFAULT_SIZE 0x0400 + +//***************************************************************************** +// PID64 - 64 bit +//***************************************************************************** +#define DCL_runPIDF64_S1 DCL_runPIDF64Series + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_C28_COMPATIBILITY_H_ diff --git a/source/dcl/misc/dcl_error.h b/source/dcl/misc/dcl_error.h new file mode 100644 index 0000000..fdc9a36 --- /dev/null +++ b/source/dcl/misc/dcl_error.h @@ -0,0 +1,122 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_ERROR_H_ +#define _DCL_ERROR_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_error.h + * \brief Defines all error handling strctures and macro + */ + +#include "../dcl_common.h" + +//--- Error handling --------------------------------------------------------- + +//! \brief Defines the library enumerated error codes +//! These will be applied as bit masks in the error handler +//! +typedef enum +{ + dcl_none = 0U, //!< No error + dcl_param_range_err = (1U << 0), //!< Parameter range exceeded + dcl_param_invalid_err = (1U << 1), //!< Parameter not valid + dcl_param_warn_err = (1U << 2), //!< Parameter warning + dcl_input_range_err = (1U << 3), //!< Input range exceeded + dcl_overflow_err = (1U << 4), //!< Numerical overflow + dcl_underflow_err = (1U << 5), //!< Numerical underflow + dcl_controller_err = (1U << 6), //!< Controller operation not completed + dcl_timing_err = (1U << 7) //!< Timing error +} dcl_error_codes; + +//! \brief Macro to clear stored error code in CSS +//! +//! \param[in] ptr DCL controller object that contains css +//! +#define DCL_clearError(ptr) ((ptr)->css->err = dcl_none) + +//! \brief Macro to set error code in CSS +//! +//! \param[in] ptr DCL controller object that contains css +//! \param[in] code enum dcl_error_codes +//! +#define DCL_setError(ptr,code) ((ptr)->css->err |= code) + +//! \brief Macro to store line location of error in CSS +//! +//! \param[in] ptr DCL controller object that contains css +//! +#define DCL_getErrorLine(ptr) ((ptr)->css->err_line = ((ptr)->css->err) ? __LINE__ : 0) + +//! \brief Macro to store function location of error in CSS +//! +//! \param[in] ptr DCL controller object that contains css +//! +#define DCL_getErrorFunc(ptr) ((ptr)->css->err_func = ((ptr)->css->err) ? __FUNCTION__ : NULL) + +//! \brief Macro to store error info in CSS +//! +//! \param[in] ptr DCL controller object that contains css +//! +#define DCL_getErrorInfo(ptr) \ +{ \ + DCL_getErrorLine(ptr); \ + DCL_getErrorFunc(ptr); \ +} + +//! \brief Prototype for basic error handler +//! +//! \param[in] ptr DCL controller object that contains css +//! +#define DCL_runErrorHandler(ptr) \ +{ \ + if(dcl_none != ptr->css->err)\ + { \ + DCL_setBreakPoint(); \ + DCL_clearError(ptr); \ + } \ +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_ERROR_H_ diff --git a/source/dcl/misc/dcl_fdlog.h b/source/dcl/misc/dcl_fdlog.h new file mode 100644 index 0000000..26fc58b --- /dev/null +++ b/source/dcl/misc/dcl_fdlog.h @@ -0,0 +1,236 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_FDLOG_H_ +#define _DCL_FDLOG_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_fdlog.h + * \brief Defines a 32-bit floating-point data logger strcture + * and related functions. + * + * \details The FDLOG structure describes a continuous memory block + * which is characterized by its start index pointer, + * current index pointer, and size of the buffer. + * + * Overfilling the data logger would result in a warp-around + * in a similar fashion as circular buffers. + * + * \code An example of initialization and use is shown below: + * + * uint32_t fdlog_size = 400; + * #pragma DATA_SECTION(r_Array, "DataLogSection") //Not unnecessary but helpful for debugging + * float32_t r_Array[fdlog_size]; + * DCL_FDLOG rBuf; + * + * DCL_initLog(&rBuf, r_Array, fdlog_size); + * DCL_clearLog(&rBuf); + * + * DCL_writeFDLOG(&rBuf, some_results); + * output = readFDLOG(&rBuf); + * \endcode + */ + +#include "../dcl_common.h" + +typedef _DCL_VOLATILE struct dcl_fdlog +{ + float32_t *fptr; //!< Pointer to first buffer element + float32_t *dptr; //!< Current data index pointer + uint32_t size; //!< The size of buffer +} DCL_FDLOG; + +/******************** macro definitions ********************/ + +//! \brief Obtain the total size of buffer +//! +//! \param[in] buf Pointer to DCL_FDLOG +//! \return uint32_t size +//! +#define DCL_getLogSize(buf) ((buf)->size) + +//! \brief Index of the current pointer (zero-indexed) +//! +//! \param[in] buf Pointer to DCL_FDLOG +//! \return uint32_t index +//! +#define DCL_getLogIndex(buf) ((uint32_t)((buf)->dptr - (buf)->fptr)) + +//! \brief Remaining space left from indexed pointer to end of buffer +//! +//! \param[in] buf Pointer to DCL_FDLOG +//! \return uint32_t remain +//! +#define DCL_getLogRemain(buf) ((buf)->size - DCL_getLogIndex(buf)) + +//! \brief Sets index of the current pointer (zero-indexed) +//! +//! \param[in] buf Pointer to DCL_FDLOG +//! \param[in] idx Index number +//! +_DCL_CODE_ACCESS +void DCL_setLogIndex(DCL_FDLOG *buf, uint32_t idx) +{ + if(idx < buf->size) + { + buf->dptr = buf->fptr + idx; + } +} + +/******************** inline functions ********************/ + +//! \brief Resets all structure pointers to null value +//! +//! \param[in] buf The DCL_FDLOG structure +//! +_DCL_CODE_ACCESS +void DCL_deleteLog(DCL_FDLOG *buf) { buf->dptr = buf->fptr = NULL; buf->size = 0; } + +//! \brief Resets the data index pointer to start of buffer +//! \param[in] buf The DCL_FDLOG structure +//! +_DCL_CODE_ACCESS +void DCL_resetLog(DCL_FDLOG *buf) { buf->dptr = buf->fptr; } + +//! \brief Fills the buffer with a given data value and resets the +//! data index pointer to the start of the buffer +//! +//! \param[in] buf The DCL_FDLOG structure +//! \param[in] data The fill data value +//! +_DCL_CODE_ACCESS +void DCL_fillLog(DCL_FDLOG *buf, float32_t data) +{ + uint32_t length = DCL_getLogSize(buf); + float32_t* mem = buf->fptr; + DCL_resetLog(buf); + while (length--) *mem++ = data; +} + +//! \brief Clears the buffer contents by writing 0 to all elements and +//! resets the data index pointer to the start of the buffer. +//! +#define DCL_clearLog(buf) DCL_fillLog(buf,0) + +//! \brief Assigns the buffer pointers to a memory block or array and +//! sets the data index pointer to the first address +//! +//! \param[in] buf The DCL_FDLOG structure +//! \param[in] addr The start address of the memory block +//! \param[in] size The length of the memory block in 32-bit words +//! +_DCL_CODE_ACCESS +void DCL_initLog(DCL_FDLOG *buf, float32_t *addr, uint32_t size) +{ + buf->fptr = addr; + buf->size = size; + DCL_resetLog(buf); +} + +//! \brief Writes a data point into the buffer and advances the +//! indexing pointer, wrapping if necessary. +//! Returns the over-written data value for delay line or FIFO +//! implementation. +//! +//! \param[in] buf The DCL_FDLOG structure +//! \param[in] data The input data value +//! \return The over-written data value +//! +_DCL_CODE_ACCESS +float32_t DCL_writeLog(DCL_FDLOG *buf, float32_t data) +{ + // save existing data + float32_t rv = *(buf->dptr); + + // write new data to log + *(buf->dptr++) = data; + + // check for end of buffer & wrap if necessary + if (DCL_getLogIndex(buf) > (buf->size - 1)) DCL_resetLog(buf); + + return(rv); +} + +//! \brief Reads a data point from the buffer and then advances the +//! indexing pointer, wrapping if necessary +//! +//! \param[in] buf The DCL_FDLOG structure +//! \return The indexed data value +//! +_DCL_CODE_ACCESS +float32_t DCL_readLog(DCL_FDLOG *buf) +{ + float32_t rv = *(buf->dptr++); + + // check for end of buffer & wrap if necessary + if (DCL_getLogIndex(buf) > (buf->size - 1)) DCL_resetLog(buf); + + return(rv); +} + +//! \brief Copies the contents of one log (src) into another (dst). +//! Both logs must have the same length. +//! +//! \param[in] src The destination DCL_FDLOG structure +//! \param[in] dst The source DCL_FDLOG structure +//! +_DCL_CODE_ACCESS +void DCL_copyLog(DCL_FDLOG *src, DCL_FDLOG *dst) +{ + uint32_t length = DCL_getLogSize(src); + if (length != DCL_getLogSize(dst)) + { + return; + } + + float32_t* src_ptr = src->fptr; + float32_t* dst_ptr = dst->fptr; + while (length--) *(dst_ptr++) = *(src_ptr++); + DCL_setLogIndex(dst, DCL_getLogIndex(src)); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_FDLOG_H_ + +/* end of file */ diff --git a/source/dcl/pi/dcl_pi.h b/source/dcl/pi/dcl_pi.h new file mode 100644 index 0000000..1f8bd01 --- /dev/null +++ b/source/dcl/pi/dcl_pi.h @@ -0,0 +1,437 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_PI_H_ +#define _DCL_PI_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_pi.h + * \brief Contains PI controller with its related structures and functions + */ + +#include "../dcl_common.h" + +//--- Linear PI controller --------------------------------------------------- + +//! \brief Defines the DCL_PI shadow parameter set +//! used for updating controller parameter +//! +typedef struct dcl_pi_sps +{ + float32_t Kp; //!< Proportional gain + float32_t Ki; //!< Integral gain + float32_t Umax; //!< Upper saturation limit + float32_t Umin; //!< Lower saturation limit +} DCL_PI_SPS; + +//! \brief Defines default values to initialize DCL_PI_SPS +//! +#define PI_SPS_DEFAULTS { 1.0f, 0.0f, 1.0f, -1.0f } + +//! \brief PI object for storing PI specific parameters +//! +typedef _DCL_VOLATILE struct dcl_pi +{ + /* controller parameter */ + float32_t Kp; //!< Proportional gain + float32_t Ki; //!< Integral gain + float32_t Umax; //!< Upper control saturation limit + float32_t Umin; //!< Lower control saturation limit + + /* internal storage */ + float32_t i6; //!< Saturation storage + float32_t i10; //!< I path feedback value + float32_t i11; //!< Tustin integrator storage + + /* miscellaneous */ + DCL_PI_SPS *sps; //!< updates controller parameter + DCL_CSS *css; //!< configuration & debugging +} DCL_PI, *PI_Handle; + +//! \brief Defines default values to initialize DCL_PI +//! +#define PI_DEFAULTS { 1.0f, 0.0f, 1.0f, -1.0f, 1.0f, 0.0f, 0.0f, \ + &(DCL_PI_SPS)PI_SPS_DEFAULTS, &(DCL_CSS)DCL_CSS_DEFAULTS } + +//! \brief Macro for internal default values to initialize DCL_PI +//! Example: DCL_PI pi_ctrl = { +//! .Kp = 1.0f, +//! .Ki = 0.0f, +//! .Umax = 1.0f, +//! .Umin = -1.0f, +//! PI_INT_DEFAULTS +//! }; +#define PI_INT_DEFAULTS .i6=1.0f, .i10=0.0f, .i11=0.0f, \ +.sps=&(DCL_PI_SPS)PI_SPS_DEFAULTS, .css=&(DCL_CSS)DCL_CSS_DEFAULTS + +//! \brief Initialize DCL_PI struct with default parameters +//! Example: DCL_PI* pi_ctrl = DCL_initPI(); +//! +//! \return A DCL_PI* pointer +//! +#define DCL_initPI() &(DCL_PI)PI_DEFAULTS + +//! \brief Initialize DCL_PI struct with input controller parameters +//! Example: DCL_PI* pi_ctrl = DCL_initPIasParam(1.0f,0.0f,1.0f,-1.0f); +//! Note: input parameter needs to be in the same order as listed in PI_SPS struct +//! +//! \return A DCL_PI* pointer +//! +#define DCL_initPIasParam(kp,ki,umax,umin) &(DCL_PI){ .Kp=kp, .Ki=ki, \ + .Umax=umax, .Umin=umin, PI_INT_DEFAULTS } + +//! \brief Initialize DCL_PI struct with sps parameters +//! Example: DCL_PI_SPS pi_sps = { .Kp = , .Ki = , ...}; +//! DCL_PI pi_ctrl; +//! DCL_initPIasSPS(&pi_ctrl,&pi_sps); +//! +//! \param[in] pi_ptr DCL_PI* pointer that needs to be initialized +//! \param[in] sps_ptr DCL_PI_SPS* pointer with assigned parameters +//! \return Returns DCL_PI* with set sps parameters, default parameter will be used +//! if sps_ptr is not specified +//! +#define DCL_initPIasSPS(pi_ptr,sps_ptr) \ +({ \ + DCL_PI* new_pi = (pi_ptr) ? pi_ptr : DCL_initPI(); \ + DCL_PI_SPS* new_sps = (sps_ptr) ? sps_ptr : &(DCL_PI_SPS)PI_SPS_DEFAULTS; \ + if(sps_ptr) \ + { \ + *new_pi = (DCL_PI){ (new_sps)->Kp, (new_sps)->Ki, (new_sps)->Umax, (new_sps)->Umin,\ + 1.0f, 0.0f, 0.0f, (DCL_PI_SPS*)new_sps, &(DCL_CSS)DCL_CSS_DEFAULTS }; \ + } \ + new_pi; \ +}) + +//! \brief Resets PI internal storage data with interrupt protection +//! +//! \param[in] pi Pointer to the DCL_PI structure +//! +_DCL_CODE_ACCESS +void DCL_resetPI(DCL_PI *pi) +{ + dcl_interrupt_t ints = DCL_disableInts(); + pi->i6 = 1.0f; + pi->i10 = pi->i11 = 0.0f; + DCL_restoreInts(ints); +} + +//! \brief Loads PI tuning parameter from its SPS parameter +//! +//! \param[in] pi Pointer to the DCL_PI controller structure +//! +_DCL_CODE_ACCESS +void DCL_fupdatePI(DCL_PI *pi) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (pi->sps->Umax <= pi->sps->Umin) ? dcl_param_invalid_err : dcl_none; + err_code |= (pi->css->t_sec <= 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (pi->sps->Kp < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (pi->sps->Ki < 0.0f) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(pi,err_code); + DCL_getErrorInfo(pi); + DCL_runErrorHandler(pi); + } +#endif + + pi->Kp = pi->sps->Kp; + pi->Ki = pi->sps->Ki; + pi->Umax = pi->sps->Umax; + pi->Umin = pi->sps->Umin; +} + +//! \brief Updates PI parameter from its SPS parameter with interrupt protection +//! +//! \param[in] pi Pointer to the DCL_PI controller structure +//! \return 'true' if update is successful, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_updatePI(DCL_PI *pi) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (pi->sps->Umax <= pi->sps->Umin) ? dcl_param_invalid_err : dcl_none; + err_code |= (pi->css->t_sec <= 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (pi->sps->Kp < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (pi->sps->Ki < 0.0f) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(pi,err_code); + DCL_getErrorInfo(pi); + DCL_runErrorHandler(pi); + } +#endif + + if (!DCL_getUpdateStatus(pi)) + { + dcl_interrupt_t ints = DCL_disableInts(); + DCL_setUpdateStatus(pi); + pi->Kp = pi->sps->Kp; + pi->Ki = pi->sps->Ki; + pi->Umax = pi->sps->Umax; + pi->Umin = pi->sps->Umin; + DCL_clearUpdateStatus(pi); + DCL_restoreInts(ints); + return true; + } + return false; +} + +//! \brief A conditional update based on the pending-for-update flag. +//! If the pending status is set, the function will update PI +//! parameter from its SPS parameter and clear the status flag on completion. +//! Note: Use DCL_setPendingStatus(pi) to set the pending status. +//! +//! \param[in] pi Pointer to the DCL_PI controller structure +//! \return 'true' if an update is applied, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_pendingUpdatePI(DCL_PI *pi) +{ + if (DCL_getPendingStatus(pi) && DCL_updatePI(pi)) + { + DCL_clearPendingStatus(pi); + return true; + } + return false; +} + +//! \brief Update SPS parameter with active param, userful when needing +//! to update only few active param from SPS and keep rest the same +//! +//! \param[in] pi Pointer to the active DCL_PI controller structure +//! +_DCL_CODE_ACCESS +void DCL_updatePISPS(DCL_PI *pi) +{ + pi->sps->Kp = pi->Kp; + pi->sps->Ki = pi->Ki; + pi->sps->Umax = pi->Umax; + pi->sps->Umin = pi->Umin; +} + +//! \brief Configures a series PI controller in "zero-pole-gain" form +//! Note: Sampling period pi->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updatePI(). +//! Only z1 considered in DCL_ZPK3, other poles & zeros ignored. +//! Zero frequency assumed to be in radians/sec. +//! +//! \param[in] pi Pointer to the DCL_PI controller structure +//! \param[in] zpk Pointer to the ZPK3 structure +//! +_DCL_CODE_ACCESS +void DCL_loadSeriesPIasZPK(DCL_PI *pi, DCL_ZPK3 *zpk) +{ +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (zpk->K < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (crealf(zpk->z1) > (1.0f / (2.0f * pi->css->t_sec))) ? dcl_param_warn_err : dcl_none; + if (err_code) + { + DCL_setError(pi,err_code); + DCL_getErrorInfo(pi); + DCL_runErrorHandler(pi); + } +#endif + + float32_t t_sec = pi->css->t_sec; + float32_t z1 = (float32_t) crealf(zpk->z1); + pi->sps->Kp = zpk->K * (1.0f + (t_sec * z1) / 2.0f); + pi->sps->Ki = (-2.0f * t_sec * z1) / (2.0f + (t_sec * z1)); + +} + +//! \brief Configures a parallel PI controller in "zero-pole-gain" form +//! Note: Sampling period pi->css->t_sec are used in the calculation. +//! New settings take effect after DCL_updatePI(). +//! Zero frequency assumed to be in radians/sec. +//! +//! \param[in] pi Pointer to the active DCL_PI controller structure +//! \param[in] zpk Pointer to the ZPK3 structure +//! +_DCL_CODE_ACCESS +void DCL_loadParallelPIasZPK(DCL_PI *pi, DCL_ZPK3 *zpk) +{ +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (zpk->K < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (crealf(zpk->z1) > (1.0f / (2.0f * pi->css->t_sec))) ? dcl_param_warn_err : dcl_none; + if (err_code) + { + DCL_setError(pi,err_code); + DCL_getErrorInfo(pi); + DCL_runErrorHandler(pi); + } +#endif + + float32_t t_sec = pi->css->t_sec; + float32_t z1 = (float32_t) crealf(zpk->z1); + pi->sps->Kp = zpk->K * (1.0f + (t_sec * z1) / 2.0f); + pi->sps->Ki = -zpk->K * t_sec * z1; +} + +//! \brief Executes an inline series form PI controller +//! +//! \param[in] pi Pointer to the DCL_PI structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback value +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runPISeries(DCL_PI *pi, float32_t rk, float32_t yk) +{ + float32_t v2, v4, v5, v9; + + v2 = pi->Kp * (rk - yk); + v4 = pi->i10 + (pi->Ki * pi->i6 * v2); + v5 = v2 + v4; + v9 = DCL_runSat(v5, pi->Umax, pi->Umin); + pi->i6 = (v5 == v9) ? 1.0f : 0.0f; + pi->i10 = v4; + +#ifdef DCL_TESTPOINTS_ENABLED + pi->css->tpt = v5; +#endif + + return(v9); +} + +//! \brief Executes a parallel form PI controller +//! Implemented as inline C function +//! +//! \param[in] pi Pointer to the DCL_PI structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback value +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runPIParallel(DCL_PI *pi, float32_t rk, float32_t yk) +{ + float32_t v1, v2, v4, v5, v9; + + v1 = rk - yk; + v2 = pi->Kp * v1; + v4 = (v1 * pi->Ki * pi->i6) + pi->i10; + pi->i10 = v4; + v5 = v2 + v4; + v9 = DCL_runSat(v5, pi->Umax, pi->Umin); + pi->i6 = (v5 == v9) ? 1.0f : 0.0f; + +#ifdef DCL_TESTPOINTS_ENABLED + pi->css->tpt = v5; +#endif + + return(v9); +} + +//! \brief Executes a parallel form PI controller with +//! enhanced anti-windup logic incorporating an +//! addintional integrator saturation clamp +//! +//! \param[in] pi Pointer to the DCL_PI structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback value +//! \param[in] Imax Upper integrator saturation limit +//! \param[in] Imin Lower integrator saturation limit +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runPIParallelEnhanced(DCL_PI *pi, float32_t rk, float32_t yk, float32_t Imax, float32_t Imin) +{ + float32_t v1, v5, v7, v8; + bool l11, l14, l17, l18, l19; + + v1 = rk - yk; + v5 = (v1 * pi->Ki * pi->i6) + pi->i10; + pi->i10 = v5; + v7 = (v1 * pi->Kp) + v5; + v8 = DCL_runSat(v7, pi->Umax, pi->Umin); + l17 = (v7 == v8) ? true : false; + l11 = (DCL_runSat(v5,Imax,Imin) == v5) ? true : false; + l19 = (v5 > 0) ? true : false; + l14 = (v1 > 0) ? true : false; + l18 = l17 && (!l11 || (l19 ^ l14)); + pi->i6 = (l18) ? 1.0f : 0.0f; + +#ifdef DCL_TESTPOINTS_ENABLED + pi->css->tpt = v7; +#endif + + return(v8); +} + +//! \brief Executes a series form PI controller with Tustin integrator +//! +//! \param[in] pi Pointer to the DCL_PI structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback value +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runPISeriesTustin(DCL_PI *pi, float32_t rk, float32_t yk) +{ + float32_t v2, v4, v5, v8, v9; + + v2 = (rk - yk) * pi->Kp; + v8 = v2 * pi->Ki * pi->i6; + v4 = v8 + pi->i11 + pi->i10; + v5 = v2 + v4; + pi->i10 = v4; + pi->i11 = v8; + v9 = DCL_runSat(v5, pi->Umax, pi->Umin); + pi->i6 = (v5 == v9) ? 1.0f : 0.0f; + +#ifdef DCL_TESTPOINTS_ENABLED + pi->css->tpt = v4; +#endif + + return(v9); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_PI_H_ diff --git a/source/dcl/pi/dcl_pi2.h b/source/dcl/pi/dcl_pi2.h new file mode 100644 index 0000000..9d97c56 --- /dev/null +++ b/source/dcl/pi/dcl_pi2.h @@ -0,0 +1,299 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_PI2_H_ +#define _DCL_PI2_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * \file dcl_pi2.h + * \brief Contains PI2 (double integrator) controller + * with its related structures and functions + */ + +#include "../dcl_common.h" + +//--- Linear PI2 controller -------------------------------------------------- + +//! \brief Defines the DCL_PI2 shadow parameter set +//! used for updating controller parameter +//! +typedef struct dcl_pi2_sps +{ + float32_t Kp; //!< Proportional gain + float32_t Ki; //!< Integral gain + float32_t Umax; //!< Upper saturation limit + float32_t Umin; //!< Lower saturation limit +} DCL_PI2_SPS; + +//! \brief Defines default values to initialize DCL_PI2_SPS +//! +#define PI2_SPS_DEFAULTS { 1.0f, 0.0f, 1.0f, -1.0f } + +//! \brief PI2 object for storing PI2 specific parameters +//! PI2 - PI controller with double integrators +//! +typedef _DCL_VOLATILE struct dcl_pi2 +{ + /* controller parameter */ + float32_t Kp; //!< Proportional gain + float32_t Ki; //!< Integral gain + float32_t Umax; //!< Upper saturation limit + float32_t Umin; //!< Lower saturation limit + + /* internal storage */ + float32_t i6; //!< Integrator 1 storage + float32_t i9; //!< Integrator 2 storage + float32_t i12; //!< Saturation 1 storage + float32_t i13; //!< Saturation 2 storage + + /* miscellaneous */ + DCL_PI2_SPS *sps; //!< updates controller parameter + DCL_CSS *css; //!< configuration & debugging +} DCL_PI2, *PI2_Handle; + +//! \brief Defines default values to initialize DCL_PI2 +//! +#define PI2_DEFAULTS { 1.0f, 0.0f, 1.0f, -1.0f, 0.0f, 0.0f, 1.0f, 1.0f, \ + &(DCL_PI2_SPS)PI2_SPS_DEFAULTS, &(DCL_CSS)DCL_CSS_DEFAULTS } + +//! \brief Macro for internal default values to initialize DCL_PI2 +//! Example: DCL_PI2 pi2_ctrl = { +//! .Kp = 1.0f, +//! .Ki = 0.0f, +//! .Umax = 1.0f, +//! .Umin = -1.0f, +//! PI2_INT_DEFAULTS +//! }; +#define PI2_INT_DEFAULTS .i6=0.0f, .i9=0.0f, .i12=1.0f, .i13=1.0f, \ +.sps=&(DCL_PI2_SPS)PI2_SPS_DEFAULTS, .css=&(DCL_CSS)DCL_CSS_DEFAULTS + +//! \brief Initialize DCL_PI2 struct with default parameters +//! Example: DCL_PI2 pi2_ctrl = DCL_initPI2(); +//! +//! \return A DCL_PI2* pointer +//! +#define DCL_initPI2() &(DCL_PI2)PI2_DEFAULTS + +//! \brief Initialize DCL_PI2 struct with input controller parameters +//! Example: DCL_PI2* pi2_ctrl = DCL_initPI2asParam(1.0f,0.0f,1.0f,-1.0f); +//! Note: input parameter needs to be in the same order as listed in PI2_SPS struct +//! +//! \return A DCL_PI2* pointer +//! +#define DCL_initPI2asParam(kp,ki,umax,umin) &(DCL_PI2){ .Kp=kp, .Ki=ki, \ + .Umax=umax, .Umin=umin, PI2_INT_DEFAULTS } + +//! \brief Initialize DCL_PI2 struct with sps parameters +//! Example: DCL_PI2_SPS pi2_sps = { .Kp = , .Ki = , ...}; +//! DCL_PI2 pi2_ctrl; +//! DCL_initPI2asSPS(&pi2_ctrl,&pi2_sps); +//! +//! \param[in] pi2_ptr DCL_PI2* pointer that needs to be initialized +//! \param[in] sps_ptr DCL_PI2_SPS* pointer with assigned parameters +//! \return Returns DCL_PI2* with set sps parameters, default parameter will be used +//! if sps_ptr is not specified +//! +#define DCL_initPI2asSPS(pi2_ptr,sps_ptr) \ +({ \ + DCL_PI2* new_pi = (pi2_ptr) ? pi2_ptr : DCL_initPI2(); \ + DCL_PI2_SPS* new_sps = (sps_ptr) ? sps_ptr : &(DCL_PI2_SPS)PI2_SPS_DEFAULTS; \ + if(sps_ptr) \ + { \ + *new_pi = (DCL_PI){ (new_sps)->Kp, (new_sps)->Ki, (new_sps)->Umax, (new_sps)->Umin,\ + 0.0f, 0.0f, 1.0f, 1.0f, (DCL_PI_SPS*)new_sps, &(DCL_CSS)DCL_CSS_DEFAULTS }; \ + } \ + new_pi; \ +}) + +//! \brief Resets PI2 internal storage data with interrupt protection +//! +//! \param[in] pi2 Pointer to the DCL_PI2 structure +//! +_DCL_CODE_ACCESS +void DCL_resetPI2(DCL_PI2 *pi2) +{ + dcl_interrupt_t ints = DCL_disableInts(); + pi2->i6 = pi2->i9 = 0.0f; + pi2->i12 = pi2->i13 = 1.0f; + DCL_restoreInts(ints); +} + +//! \brief Loads PI2 tuning parameter from its SPS parameter +//! +//! \param[in] pi2 Pointer to the DCL_PI2 controller structure +//! +_DCL_CODE_ACCESS +void DCL_fupdatePI2(DCL_PI2 *pi2) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (pi2->sps->Umax <= pi2->sps->Umin) ? dcl_param_invalid_err : dcl_none; + err_code |= (pi2->css->t_sec <= 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (pi2->sps->Kp < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (pi2->sps->Ki < 0.0f) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(pi2,err_code); + DCL_getErrorInfo(pi2); + DCL_runErrorHandler(pi2); + } +#endif + + pi2->Ki = pi2->sps->Ki; + pi2->Kp = pi2->sps->Kp; + pi2->Umax = pi2->sps->Umax; + pi2->Umin = pi2->sps->Umin; +} + +//! \brief Updates PI2 parameter from its SPS parameter with interrupt protection +//! +//! \param[in] pi2 Pointer to the DCL_PI2 controller structure +//! \return 'true' if update is successful, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_updatePI2(DCL_PI2 *pi2) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= (pi2->sps->Umax <= pi2->sps->Umin) ? dcl_param_invalid_err : dcl_none; + err_code |= (pi2->css->t_sec <= 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (pi2->sps->Kp < 0.0f) ? dcl_param_range_err : dcl_none; + err_code |= (pi2->sps->Ki < 0.0f) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(pi2,err_code); + DCL_getErrorInfo(pi2); + DCL_runErrorHandler(pi2); + } +#endif + + if (!DCL_getUpdateStatus(pi2)) + { + dcl_interrupt_t ints = DCL_disableInts(); + DCL_setUpdateStatus(pi2); + pi2->Ki = pi2->sps->Ki; + pi2->Kp = pi2->sps->Kp; + pi2->Umax = pi2->sps->Umax; + pi2->Umin = pi2->sps->Umin; + DCL_clearUpdateStatus(pi2); + DCL_restoreInts(ints); + return true; + } + return false; +} + +//! \brief A conditional update based on the pending-for-update flag. +//! If the pending status is set, the function will update PI2 +//! parameter from its SPS parameter and clear the status flag on completion. +//! Note: Use DCL_setPendingStatus(pi2) to set the pending status. +//! +//! \param[in] pi2 Pointer to the DCL_PI2 controller structure +//! \return 'true' if an update is applied, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_pendingUpdatePI2(DCL_PI2 *pi2) +{ + if (DCL_getPendingStatus(pi2) && DCL_updatePI2(pi2)) + { + DCL_clearPendingStatus(pi2); + return true; + } + return false; +} + +//! \brief Update SPS parameter with active param, userful when needing +//! to update only few active param from SPS and keep rest the same +//! +//! \param[in] pi2 Pointer to the active DCL_PI controller structure +//! +_DCL_CODE_ACCESS +void DCL_updatePI2SPS(DCL_PI2 *pi2) +{ + pi2->sps->Kp = pi2->Kp; + pi2->sps->Ki = pi2->Ki; + pi2->sps->Umax = pi2->Umax; + pi2->sps->Umin = pi2->Umin; +} + +//! \brief Executes an inline series form PI2 controller on the FPU32 +//! +//! \param[in] pi2 Pointer to the DCL_PI2 structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runPI2Series(DCL_PI2 *pi2, float32_t rk, float32_t yk) +{ + float32_t v1, v2, v5, v8, v10, v11, v14; + bool l1, l2, l3, l4, l5, l6; + + v1 = rk - yk; + v2 = pi2->Kp * v1; + v5 = (v1 * pi2->Ki * pi2->i12) + pi2->i6; + pi2->i6 = v5; + v8 = (v5 * pi2->i13) + pi2->i9; + pi2->i9 = v8; + v10 = v2 + v8; + v11 = DCL_runSat(v10,pi2->Umax,pi2->Umin); + v14 = v10 - v11; + l1 = (v1 > 0.0f) ? true : false; + l2 = (v14 > 0.0f) ? true : false; + l3 = (v14 == 0.0f) ? true : false; + l4 = (v5 > 0.0f) ? true : false; + l5 = l3 || (l1 ^ l2); + l6 = l3 || (l4 ^ l2); + pi2->i12 = (l5) ? 1.0f : 0.0f; + pi2->i13 = (l6) ? 1.0f : 0.0f; + +#ifdef DCL_TESTPOINTS_ENABLED + pi2->css->tpt = v8; +#endif + + return(v11); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_PI2_H_ diff --git a/source/dcl/pid/dcl_pid.h b/source/dcl/pid/dcl_pid.h new file mode 100644 index 0000000..04ce65c --- /dev/null +++ b/source/dcl/pid/dcl_pid.h @@ -0,0 +1,549 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_PID_H_ +#define _DCL_PID_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_pid.h + * \brief Contains 32-bit PID controller with its related structures and functions + */ + +#include "../dcl_common.h" + +//--- Linear PID controller -------------------------------------------------- + +//! \brief Defines the DCL_PID shadow parameter set +//! used for updating controller parameter +//! +typedef struct dcl_pid_sps +{ + float32_t Kp; //!< Proportional gain + float32_t Ki; //!< Integral gain + float32_t Kd; //!< Derivative gain + float32_t Kr; //!< Set point weight, default is 1 + float32_t c1; //!< D path filter coefficient 1, default is 1 + float32_t c2; //!< D path filter coefficient 2, default is 0 + float32_t Umax; //!< Upper saturation limit + float32_t Umin; //!< Lower saturation limit +} DCL_PID_SPS; + +//! \brief Defines default values to initialize DCL_PID_SPS +//! +#define PID_SPS_DEFAULTS { 1.0f, 0.0f, 0.0f, 1.0f, 1.0f, 0.0f, 1.0f, -1.0f } + +//! \brief PID object for storing PID specific parameters +//! +typedef _DCL_VOLATILE struct dcl_pid +{ + /* controller parameter */ + float32_t Kp; //!< Proportional gain + float32_t Ki; //!< Integral gain + float32_t Kd; //!< Derivative gain + float32_t Kr; //!< Set point weight, default is 1 + float32_t c1; //!< D path filter coefficient 1, default is 1 + float32_t c2; //!< D path filter coefficient 2, default is 0 + float32_t Umax; //!< Upper saturation limit + float32_t Umin; //!< Lower saturation limit + + /* internal storage */ + float32_t d2; //!< D path feedback value (Kd * c1) + float32_t d3; //!< D path feedback value (c2) + float32_t i10; //!< I path feedback value + float32_t i14; //!< I path saturation storage + + /* miscellaneous */ + DCL_PID_SPS *sps; //!< updates controller parameter + DCL_CSS *css; //!< configuration & debugging +} DCL_PID, *PID_Handle; + +//! \brief Defines default values to initialize the DCL_PID structure +//! +#define PID_DEFAULTS { 1.0f, 0.0f, 0.0f, 1.0f, 1.0f, 0.0f, \ + 1.0f, -1.0f, 0.0f, 0.0f, 0.0f, 1.0f, \ + &(DCL_PID_SPS)PID_SPS_DEFAULTS, &(DCL_CSS)DCL_CSS_DEFAULTS } + +//! \brief Macro for internal default values to initialize DCL_PID +//! Example: DCL_PID pid_ctrl = { +//! .Kp = 1.0f, +//! .Ki = 0.0f, +//! ... +//! .Umin = -1.0f, +//! PID_INT_DEFAULTS +//! }; +#define PID_INT_DEFAULTS .d2=0.0f, .d3=0.0f, .i10=0.0f, .i14=1.0f, \ + .sps=&(DCL_PID_SPS)PID_SPS_DEFAULTS, .css=&(DCL_CSS)DCL_CSS_DEFAULTS + +//! \brief Initialize DCL_PID struct with default parameters +//! Example: DCL_PID* pid_ctrl = DCL_initPID(); +//! +//! \return A DCL_PID* pointer +//! +#define DCL_initPID() &(DCL_PID)PID_DEFAULTS + +//! \brief Initialize DCL_PID struct with input controller parameters +//! Example: DCL_PID* pid_ctrl = DCL_initPIDasParam(1.0f,0.0f,0.0f,1.0f,1.0f,0.0f,1.0f,-1.0f); +//! Note: input parameter needs to be in the same order as listed in PID_SPS struct +//! +//! \return A DCL_PID* pointer +//! +#define DCL_initPIDasParam(kp,ki,kd,kr,_c1,_c2,umax,umin) &(DCL_PID){ .Kp=kp, .Ki=ki, .Kd=kd, .Kr=kr, \ + .c1=_c1, .c2=_c2, .Umax=umax, .Umin=umin, PID_INT_DEFAULTS } + +//! \brief Initialize DCL_PID struct with SPS parameters +//! Example: DCL_PID_SPS pid_sps = { .Kp = , .Ki = , ...}; //initial parameter +//! DCL_PID pid_ctrl; +//! DCL_initPIasSPS(&pid_ctrl,&pid_sps); +//! Note: The newly declared DCL_PID structure will use the SPS input parameter as its attribute for sps. +//! +//! \param[in] pid_ptr DCL_PID* pointer that needs to be initialized +//! \param[in] sps_ptr DCL_PID_SPS* pointer with assigned parameters +//! \return Returns DCL_PID* with set sps parameters, default parameter will be used +//! if sps_ptr is not specified +//! +#define DCL_initPIDasSPS(pid_ptr,sps_ptr) \ +({ \ + DCL_PID* new_pid = (pid_ptr) ? pid_ptr : DCL_initPID(); \ + DCL_PID_SPS* new_sps = (sps_ptr) ? sps_ptr : &(DCL_PID_SPS)PID_SPS_DEFAULTS; \ + if(sps_ptr) \ + { \ + *new_pid = (DCL_PID){ (new_sps)->Kp, (new_sps)->Ki, (new_sps)->Kd,(new_sps)->Kr,\ + (new_sps)->c1, (new_sps)->c2, (new_sps)->Umax, (new_sps)->Umin, 0.0f, 0.0f, \ + 0.0f, 1.0f, (DCL_PID_SPS*)new_sps, &(DCL_CSS)DCL_CSS_DEFAULTS }; \ + } \ + new_pid; \ +}) + +//! \brief Resets PID internal storage data with interrupt protection +//! +//! \param[in] pid Pointer to the DCL_PID structure +//! +_DCL_CODE_ACCESS +void DCL_resetPID(DCL_PID *pid) +{ + dcl_interrupt_t ints = DCL_disableInts(); + pid->d2 = pid->d3 = pid->i10 = 0.0f; + pid->i14 = 1.0f; + DCL_restoreInts(ints); +} + +//! \brief Loads PID tuning parameter from its SPS parameter +//! +//! \param[in] pid Pointer to the active DCL_PID controller structure +//! +_DCL_CODE_ACCESS +void DCL_fupdatePID(DCL_PID *pid) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + float32_t tau = (2.0f - pid->sps->c1 * pid->css->t_sec) / (2.0f * pid->sps->c1); + float32_t ec2 = pid->sps->c1 * (pid->css->t_sec - 2.0f * tau) / 2.0f; + uint32_t err_code = dcl_none; + err_code |= DCL_isValue(pid->sps->c2, ec2) ? dcl_none : dcl_param_invalid_err; + err_code |= (pid->sps->Umax > pid->sps->Umin) ? dcl_none : dcl_param_invalid_err; + err_code |= (pid->css->t_sec > 0.0f) ? dcl_none : dcl_param_range_err; + err_code |= ((pid->sps->Kp > 0.0f) && (pid->sps->Ki > 0.0f) && (pid->sps->Kd > 0.0f) && (pid->sps->Kr > 0.0f)) ? dcl_none : dcl_param_range_err ; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + pid->Kp = pid->sps->Kp; + pid->Ki = pid->sps->Ki; + pid->Kd = pid->sps->Kd; + pid->Kr = pid->sps->Kr; + pid->c1 = pid->sps->c1; + pid->c2 = pid->sps->c2; + pid->Umax = pid->sps->Umax; + pid->Umin = pid->sps->Umin; +} + +//! \brief Updates PID parameter from its SPS parameter with interrupt protection +//! +//! \param[in] pid Pointer to the active DCL_PID controller structure +//! \return 'true' if update is successful, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_updatePID(DCL_PID *pid) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + float32_t tau = (2.0f - pid->sps->c1 * pid->css->t_sec) / (2.0f * pid->sps->c1); + float32_t ec2 = pid->sps->c1 * (pid->css->t_sec - 2.0f * tau) / 2.0f; + uint32_t err_code = dcl_none; + err_code |= DCL_isValue(pid->sps->c2, ec2) ? dcl_none : dcl_param_invalid_err; + err_code |= (pid->sps->Umax > pid->sps->Umin) ? dcl_none : dcl_param_invalid_err; + err_code |= (pid->css->t_sec > 0.0f) ? dcl_none : dcl_param_range_err; + err_code |= ((pid->sps->Kp > 0.0f) && (pid->sps->Ki > 0.0f) && (pid->sps->Kd > 0.0f) && (pid->sps->Kr > 0.0f)) ? dcl_none : dcl_param_range_err ; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + if (!DCL_getUpdateStatus(pid)) + { + dcl_interrupt_t ints = DCL_disableInts(); + DCL_setUpdateStatus(pid); + pid->Kp = pid->sps->Kp; + pid->Ki = pid->sps->Ki; + pid->Kd = pid->sps->Kd; + pid->Kr = pid->sps->Kr; + pid->c1 = pid->sps->c1; + pid->c2 = pid->sps->c2; + pid->Umax = pid->sps->Umax; + pid->Umin = pid->sps->Umin; + DCL_clearUpdateStatus(pid); + DCL_restoreInts(ints); + return true; + } + return false; +} + +//! \brief A conditional update based on the pending-for-update flag. +//! If the pending status is set, the function will update PID +//! parameter from its SPS parameter and clear the status flag on completion. +//! Note: Use DCL_setPendingStatus(pid) to set the pending status. +//! +//! \param[in] pid Pointer to the DCL_PID controller structure +//! \return 'true' if an update is applied, otherwise 'false' +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +bool DCL_pendingUpdatePID(DCL_PID *pid) +{ + if (DCL_getPendingStatus(pid) && DCL_updatePID(pid)) + { + DCL_clearPendingStatus(pid); + return true; + } + return false; +} + +//! \brief Update SPS parameter with active param, userful when needing +//! to update only few active param from SPS and keep rest the same +//! +//! \param[in] pid Pointer to the active DCL_PID controller structure +//! +_DCL_CODE_ACCESS +void DCL_updatePIDSPS(DCL_PID *pid) +{ + pid->sps->Kp = pid->Kp; + pid->sps->Ki = pid->Ki; + pid->sps->Kd = pid->Kd; + pid->sps->Kr = pid->Kr; + pid->sps->c1 = pid->c1; + pid->sps->c2 = pid->c2; + pid->sps->Umax = pid->Umax; + pid->sps->Umin = pid->Umin; +} + +//! \brief Loads the derivative path filter shadow coefficients. +//! Note: Sampling period pid->css->t_sec are used in the calculation. +//! New coefficients take effect when DCL_updatePID() is called. +//! +//! \param[in] pid Pointer to the DCL_PID structure +//! \param[in] fc The desired filter bandwidth in Hz +//! +_DCL_CODE_ACCESS +void DCL_setPIDfilterBW(DCL_PID *pid, float32_t fc) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= ((fc >= 1.0f / (2.0f * pid->css->t_sec)) || (fc <= 0.0f)) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + float32_t t_sec = pid->css->t_sec; + float32_t tau = 1.0f / (2.0f * CONST_PI * fc); + pid->sps->c1 = 2.0f / (t_sec + (2.0f * tau)); + pid->sps->c2 = (t_sec - (2.0f * tau)) / (t_sec + (2.0f * tau)); +} + +//! \brief Loads the PID derivative path filter active coefficients +//! Note: Sampling period pid->css->t_sec are used in the calculation. +//! New coefficients take effect immediately. SPS & CSS contents are unaffected. +//! +//! \param[in] pid Pointer to the DCL_PID structure +//! \param[in] fc The desired filter bandwidth in Hz +//! \param[in] t_sec The controller update rate in seconds +//! +_DCL_CODE_ACCESS +void DCL_setActivePIDfilterBW(DCL_PID *pid, float32_t fc, float32_t t_sec) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= ((fc >= 1.0f / (2.0f * t_sec)) || (fc <= 0.0f)) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + float32_t tau = 1.0f / (2.0f * CONST_PI * fc); + pid->c1 = 2.0f / (t_sec + (2.0f * tau)); + pid->c2 = (t_sec - (2.0f * tau)) / (t_sec + (2.0f * tau)); +} + +//! \brief Calculates the active derivative path filter bandwidth in Hz. +//! Note: Sampling period pid->css->t_sec are used in the calculation. +//! \param[in] pid Pointer to the DCL_PID structure +//! \return The filter bandwidth in Hz +//! +_DCL_CODE_ACCESS +float32_t DCL_getPIDfilterBW(DCL_PID *pid) +{ + float32_t tau = ((2.0f - pid->c1 * pid->css->t_sec) / (2.0f * pid->c1)); + return(1.0f / (2.0f * CONST_PI * tau)); +} + +//! \brief Configures a series PID controller parameter in ZPK form. +//! Note: Sampling period pid->css->t_sec are used in the calculation. +//! Parameters take effect after call to DCL_updatePID(). +//! Only z1, z2 & p2 considered, p1 = 0 assumed. +//! +//! \param[in] pid Pointer to the active DCL_PID controller structure +//! \param[in] zpk Pointer to the DCL_ZPK3 structure +//! +_DCL_CODE_ACCESS +void DCL_loadSeriesPIDasZPK(DCL_PID *pid, DCL_ZPK3 *zpk) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= DCL_isZero(cimagf(zpk->z1) + cimagf(zpk->z2)) ? dcl_none : dcl_param_invalid_err; + err_code |= DCL_isZero(cimagf(zpk->p2)) ? dcl_none : dcl_param_invalid_err; + err_code |= (crealf(zpk->p2) <= DCL_c2Limit) ? dcl_none :dcl_param_invalid_err; + err_code |= (zpk->K >= 0.0f) ? dcl_none : dcl_param_range_err; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + float32_t beta1 = -(float32_t) crealf(zpk->z1 + zpk->z2); + float32_t beta0 = (float32_t) crealf(zpk->z1 * zpk->z2); + float32_t alpha1 = -(float32_t) crealf(zpk->p1 + zpk->p2); + float32_t alpha0 = (float32_t) crealf(zpk->p1 * zpk->p2); + float32_t t_sec = pid->css->t_sec; + float32_t a0p = 4.0f + (alpha1 * 2.0f * t_sec) + (alpha0 * t_sec * t_sec); + float32_t b0 = zpk->K * (4.0f + (beta1 * 2.0f * t_sec) + (beta0 * t_sec *t_sec)) / a0p; + float32_t b1 = zpk->K * (-8.0f + (2.0f * beta0 * t_sec * t_sec)) / a0p; + float32_t b2 = zpk->K * (4.0f - (beta1 * 2.0f * t_sec) + (beta0 * t_sec * t_sec)) / a0p; + float32_t a2 = (4.0f - (alpha1 * 2.0f * t_sec) + (alpha0 * t_sec * t_sec)) / a0p; + float32_t c2 = -a2; + float32_t tau = (t_sec / 2.0f) * (1.0f - c2) / (1.0f + c2); + pid->sps->c1 = 2.0f / (t_sec + 2.0f * tau); + pid->sps->c2 = c2; + float32_t det = (c2 + 1.0f); + det *= det; + +#ifdef DCL_ERROR_HANDLING_ENABLED + err_code = dcl_none; + err_code |= (DCL_isZero(det)) ? dcl_param_invalid_err : dcl_none; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + float32_t k1 = ((c2 * b0) - b1 - ((2.0f + c2) * b2)) / det; + float32_t k2 = (c2 + 1.0f) * (b0 + b1 + b2) / det; + float32_t k3 = ((c2 * c2 * b0) - (c2 * b1) + b2) / det; + pid->sps->Kp = k1; + pid->sps->Ki = k2 / k1; + pid->sps->Kd = k3 / (k1 * pid->sps->c1); + +#ifdef DCL_TESTPOINTS_ENABLED + pid->css->tpt = det; +#endif + +} + +//! \brief Configures a parallel PID controller in ZPK form. +//! Note: Sampling period pid->css->t_sec are used in the calculation. +//! Parameters take effect after call to DCL_updatePID(). +//! Only z1, z2 & p2 considered, p1 = 0 assumed. +//! +//! \param[in] pid Pointer to the active DCL_PID controller structure +//! \param[in] zpk Pointer to the DCL_ZPK3 structure +//! +_DCL_CODE_ACCESS +void DCL_loadParallelPIDasZPK(DCL_PID *pid, DCL_ZPK3 *zpk) +{ +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code = dcl_none; + err_code |= DCL_isZero(cimagf(zpk->z1) + cimagf(zpk->z2)) ? dcl_none : dcl_param_invalid_err; + err_code |= DCL_isZero(cimagf(zpk->p2)) ? dcl_none : dcl_param_invalid_err; + err_code |= (crealf(zpk->p2) <= DCL_c2Limit) ? dcl_none : dcl_param_invalid_err; + err_code |= (zpk->K >= 0.0f) ? dcl_none : dcl_param_range_err; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + float32_t beta1 = -(float32_t) crealf(zpk->z1 + zpk->z2); + float32_t beta0 = (float32_t) crealf(zpk->z1 * zpk->z2); + float32_t alpha1 = -(float32_t) crealf(zpk->p1 + zpk->p2); + float32_t alpha0 = (float32_t) crealf(zpk->p1 * zpk->p2); + float32_t t_sec = pid->css->t_sec; + float32_t a0p = 4.0f + (alpha1 * 2.0f * t_sec) + (alpha0 * t_sec * t_sec); + float32_t b0 = zpk->K * (4.0f + (beta1 * 2.0f * t_sec) + (beta0 * t_sec * t_sec)) / a0p; + float32_t b1 = zpk->K * (-8.0f + (2.0f * beta0 * t_sec * t_sec)) / a0p; + float32_t b2 = zpk->K * (4.0f - (beta1 * 2.0f * t_sec) + (beta0 * t_sec * t_sec)) / a0p; + float32_t a2 = (4.0f - (alpha1 * 2.0f * t_sec) + (alpha0 * t_sec * t_sec)) / a0p; + float32_t c2 = -a2; + float32_t tau = (t_sec / 2.0f) * (1.0f - c2) / (1.0f + c2); + pid->sps->c1 = 2.0f / (t_sec + 2.0f * tau); + pid->sps->c2 = c2; + float32_t det = (c2 + 1.0f); + det *= det; + +#ifdef DCL_ERROR_HANDLING_ENABLED + err_code = (DCL_isZero(det)) ? dcl_param_invalid_err : dcl_none; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + pid->sps->Kp = ((c2 * b0) - b1 - ((2.0f + c2) * b2)) / det; + pid->sps->Ki = (c2 + 1.0f) * (b0 + b1 + b2) / det; + pid->sps->Kd = ((c2 * c2 * b0) - (c2 * b1) + b2) / (det * pid->sps->c1); + +#ifdef DCL_TESTPOINTS_ENABLED + pid->css->tpt = det; +#endif + +} + +//! \brief Executes an ideal form PID controller +//! +//! \param[in] pid Pointer to the DCL_PID structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback value +//! \param[in] lk External output clamp flag +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runPIDSeries(DCL_PID *pid, float32_t rk, float32_t yk, float32_t lk) +{ + float32_t v1, v4, v5, v8, v9, v10, v12; + + v5 = (pid->Kr * rk) - yk; + v8 = ((rk - yk) * pid->Ki * pid->Kp * pid->i14) + pid->i10; + pid->i10 = v8; + v1 = yk * pid->Kd * pid->c1; + v4 = v1 - pid->d2 - pid->d3; + pid->d2 = v1; + pid->d3 = v4 * pid->c2; + v9 = ((v5 - v4) * pid->Kp) + v8; + v10 = DCL_runSat(v9, pid->Umax, pid->Umin); + v12 = (v10 == v9) ? 1.0f : 0.0f; + pid->i14 = v12 * lk; + +#ifdef DCL_TESTPOINTS_ENABLED + pid->css->tpt = v4; +#endif + + return(v10); +} + +//! \brief Executes a parallel form PID controller +//! +//! \param[in] pid Pointer to the DCL_PID structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback value +//! \param[in] lk External output clamp flag +//! \return The control effort +//! +_DCL_CODE_ACCESS _DCL_CODE_SECTION +float32_t DCL_runPIDParallel(DCL_PID *pid, float32_t rk, float32_t yk, float32_t lk) +{ + float32_t v1, v4, v5, v6, v8, v9, v10, v12; + + v5 = rk - yk; + v6 = v5 * pid->Kp; + v8 = v5 * pid->Ki * pid->i14 + pid->i10; + pid->i10 = v8; + v1 = v5 * pid->Kd * pid->c1; + v4 = v1 - pid->d2 - pid->d3; + pid->d2 = v1; + pid->d3 = v4 * pid->c2; + v9 = v6 + v8 + v4; + v10 = DCL_runSat(v9, pid->Umax, pid->Umin); + v12 = (v10 == v9) ? 1.0f : 0.0f; + pid->i14 = v12 * lk; + +#ifdef DCL_TESTPOINTS_ENABLED + pid->css->tpt = v8; +#endif + + return(v10); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_PID_H_ diff --git a/source/dcl/pid/dcl_pidf64.h b/source/dcl/pid/dcl_pidf64.h new file mode 100644 index 0000000..e96d0cc --- /dev/null +++ b/source/dcl/pid/dcl_pidf64.h @@ -0,0 +1,420 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _DCL_PID64_H_ +#define _DCL_PID64_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup DCL_API_MODULE APIs for Digital Control Library + * @{ + * + * \file dcl_pidf64.h + * \brief Contains 64-bit PID controller with its related structures and functions + */ + +#include "../dcl_common.h" + +//--- Linear PID 64bit controller -------------------------------------------------- + +//! \brief Defines the shadow PID64 controller structure +//! used for updating controller parameter +//! +typedef struct dcl_pid64_sps { + float64_t Kp; //!< Proportional gain + float64_t Ki; //!< Integral gain + float64_t Kd; //!< Derivative gain + float64_t Kr; //!< Set point weight, default is 1 + float64_t c1; //!< D-term filter coefficient 1, default is 1 + float64_t c2; //!< D-term filter coefficient 2, default is 0 + float64_t Umax; //!< Upper saturation limit + float64_t Umin; //!< Lower saturation limit +} DCL_PIDF64_SPS; + +//! \brief Defines default values to initialize the DCL_PIDF64 shadow structure +//! +#define PIDF64_SPS_DEFAULTS { 1.0L, 0.0L, 0.0L, 1.0L, 1.0L, 0.0L, 1.0L, -1.0L } + +//! \brief PID 64bit object for storing PID specific 64bit parameters +//! +typedef _DCL_VOLATILE struct dcl_pidf64 { + /* controller parameter */ + float64_t Kp; //!< Proportional gain + float64_t Ki; //!< Integral gain + float64_t Kd; //!< Derivative gain + float64_t Kr; //!< Set point weight, default is 1 + float64_t c1; //!< D-term filter coefficient 1, default is 1 + float64_t c2; //!< D-term filter coefficient 2, default is 0 + float64_t Umax; //!< Upper saturation limit + float64_t Umin; //!< Lower saturation limit + + /* internal storage */ + float64_t d2; //!< D path feedback value (Kd * c1) + float64_t d3; //!< D path feedback value (c2) + float64_t i10; //!< I path feedback value + float64_t i14; //!< I path saturation storage + + /* miscellaneous */ + DCL_PIDF64_SPS *sps; //!< updates controller parameter + DCL_CSSF64 *css; //!< configuration & debugging +} DCL_PIDF64, *PIDF64_Handle; + +//! \brief Defines default values to initialize the DCL_PID64 active structure +//! +#define PIDF64_DEFAULTS { 1.0L, 0.0L, 0.0L, 1.0L, 1.0L, 0.0L, \ + 1.0L, -1.0L, 0.0L, 0.0L, 0.0L, 1.0L, \ +&(DCL_PIDF64_SPS)PIDF64_SPS_DEFAULTS, &(DCL_CSSF64)DCL_CSSF64_DEFAULTS } + +//! \brief Macro for internal default values to initialize DCL_PIDF64 +//! Example: DCL_PIDF64 pid_ctrl = { +//! .Kp = 1.0L, +//! .Ki = 0.0L, +//! ... +//! .Umin = -1.0L, +//! PIDF64_INT_DEFAULTS +//! }; +#define PIDF64_INT_DEFAULTS .d2=0.0L, .d3=0.0L, .i10=0.0L, .i14=1.0L, \ + .sps=&(DCL_PIDF64_SPS)PI_SPS_DEFAULTS, .css=&(DCL_CSSF64)DCL_CSS_DEFAULTS + +//! \brief Initialize DCL_PIDF64 struct with default parameters +//! Example: DCL_PIDF64* pid_ctrl = DCL_initPID(); +//! +//! \return A DCL_PIDF64* pointer +//! +#define DCL_initPIDF64() &(DCL_PIDF64)PIDF64_DEFAULTS + +//! \brief Initialize DCL_PIDF64 struct with input controller parameters +//! Example: DCL_PIDF64* pid_ctrl = DCL_initPIDF64asParam(1.0L,0.0L,0.0L,1.0L,1.0L,0.0L,1.0L,-1.0L); +//! Note: input parameter needs to be in the same order as listed in PIDF64_SPS struct +//! +//! \return A DCL_PID* pointer +//! +#define DCL_initPIDF64asParam(kp,ki,kd,kr,_c1,_c2,umax,umin) &(DCL_PIDF64){ .Kp=kp, .Ki=ki, .Kd=kd, .Kr=kr, \ + .c1=_c1, .c2=_c2, .Umax=umax, .Umin=umin, PIDF64_INT_DEFAULTS } + +//! \brief Initialize DCL_PIDF64 struct with sps parameters +//! Example: DCL_PIDF64_SPS pid_sps = { .Kp = , .Ki = , ...}; //initial parameter +//! DCL_PIDF64 pid_ctrl; +//! DCL_initPIasSPS(&pid_ctrl,&pid_sps); +//! +//! \param[in] pid_ptr DCL_PIDF64* pointer that needs to be initialized +//! \param[in] sps_ptr DCL_PIDF64_SPS* pointer with assigned parameters +//! \return Returns DCL_PID* with set sps parameters, default parameter will be used +//! if sps_ptr is not specified +//! +#define DCL_initPIDF64asSPS(pid_ptr,sps_ptr) \ +({ \ + DCL_PIDF64* new_pid = (pid_ptr) ? pid_ptr : DCL_initPID(); \ + DCL_PIDF64_SPS* new_sps = (sps_ptr) ? sps_ptr : &(DCL_PIDF64_SPS)PID_SPS_DEFAULTS; \ + if(sps_ptr) \ + { \ + *new_pi = (DCL_PID){ (new_sps)->Kp, (new_sps)->Ki, (new_sps)->Kd,(new_sps)->Kr,\ + (new_sps)->c1, (new_sps)->c2, (new_sps)->Umax, (new_sps)->Umin, 0.0L, 0.0L, \ + 0.0L, 1.0L,(DCL_PIDF64_SPS*)new_sps, &(DCL_CSS)DCL_CSS_DEFAULTS }; \ + } \ + new_pid; \ +}) + +//! \brief Resets PID64 internal storage data with interrupt protection +//! +//! \param[in] pid Pointer to the DCL_PID64 structure +//! +_DCL_CODE_ACCESS +void DCL_resetPIDF64(DCL_PIDF64 *pid) +{ + dcl_interrupt_t ints = DCL_disableInts(); + pid->d2 = pid->d3 = pid->i10 = 0.0L; + pid->i14 = 1.0L; + DCL_restoreInts(ints); +} + +//! \brief Loads PIDF64 tuning parameter from its SPS parameter +//! +//! \param[in] pid Pointer to the active DCL_PID64 controller structure +//! +_DCL_CODE_ACCESS +void DCL_fupdatePIDF64(DCL_PIDF64 *pid) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + float64_t tau = (2.0L - pid->sps->c1 * p->css->t_sec) / (2.0L * pid->sps->c1); + float64_t ec2 = pid->sps->c1 * (pid->css->t_sec - 2.0L * tau) / 2.0L; + uint32_t err_code = dcl_none; + err_code |= DCL_isValue(pid->sps->c2, ec2) ? dcl_none : dcl_param_invalid_err; + err_code |= (pid->sps->Umax > pid->sps->Umin) ? dcl_none : dcl_param_invalid_err; + err_code |= (pid->css->t_sec > 0.0L) ? dcl_none : dcl_param_range_err; + err_code |= ((pid->sps->Kp > 0.0L) && (pid->sps->Ki > 0.0L) && (pid->sps->Kd > 0.0L) && (pid->sps->Kr > 0.0L)) ? dcl_none : dcl_param_range_err ; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + pid->Kp = pid->sps->Kp; + pid->Ki = pid->sps->Ki; + pid->Kd = pid->sps->Kd; + pid->Kr = pid->sps->Kr; + pid->c1 = pid->sps->c1; + pid->c2 = pid->sps->c2; + pid->Umax = pid->sps->Umax; + pid->Umin = pid->sps->Umin; +} + + +//! \brief Updates PID parameter from its SPS parameter with interrupt protection +//! +//! \param[in] pid Pointer to the DCL_PID64 controller structure +//! \return 'true' if update is successful, otherwise 'false' +//! +_DCL_CODE_ACCESS +bool DCL_updatePIDF64(DCL_PIDF64 *pid) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + float64_t tau = (2.0L - pid->sps->c1 * pid->css->t_sec) / (2.0L * pid->sps->c1); + float64_t ec2 = pid->sps->c1 * (pid->css->t_sec - 2.0L * tau) / 2.0L; + uint32_t err_code = dcl_none; + err_code |= DCL_isValue(pid->sps->c2, ec2) ? dcl_none : dcl_param_invalid_err; + err_code |= (pid->sps->Umax > pid->sps->Umin) ? dcl_none : dcl_param_invalid_err; + err_code |= (pid->css->t_sec > 0.0L) ? dcl_none : dcl_param_range_err; + err_code |= ((pid->sps->Kp > 0.0L) && (pid->sps->Ki > 0.0L) && (pid->sps->Kd > 0.0L) && (pid->sps->Kr > 0.0L)) ? dcl_none : dcl_param_range_err ; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + if (!DCL_getUpdateStatus(pid)) + { + dcl_interrupt_t ints = DCL_disableInts(); + DCL_setUpdateStatus(pid); + pid->Kp = pid->sps->Kp; + pid->Ki = pid->sps->Ki; + pid->Kd = pid->sps->Kd; + pid->Kr = pid->sps->Kr; + pid->c1 = pid->sps->c1; + pid->c2 = pid->sps->c2; + pid->Umax = pid->sps->Umax; + pid->Umin = pid->sps->Umin; + DCL_clearUpdateStatus(pid); + DCL_restoreInts(ints); + return true; + } + return false; +} + +//! \brief A conditional update based on the pending-for-update flag. +//! If the pending status is set, the function will update PIDF64 +//! parameter from its SPS parameter and clear the status flag on completion. +//! Note: Use DCL_setPendingStatus(pid) to set the pending status. +//! +//! \param[in] pid Pointer to the DCL_PIDF64 controller structure +//! \return 'true' if an update is applied, otherwise 'false' +//! +_DCL_CODE_ACCESS +bool DCL_pendingUpdatePIDF64(DCL_PIDF64 *pid) +{ + if (DCL_getPendingStatus(pid) && DCL_updatePIDF64(pid)) + { + DCL_clearPendingStatus(pid); + return true; + } + return false; +} + +//! \brief Update SPS parameter with active param, userful when needing +//! to update only few active param from SPS and keep rest the same +//! +//! \param[in] pid Pointer to the active DCL_PIDF64 controller structure +//! +_DCL_CODE_ACCESS +void DCL_updatePIDF64SPS(DCL_PIDF64 *pid) +{ + pid->sps->Kp = pid->Kp; + pid->sps->Ki = pid->Ki; + pid->sps->Kd = pid->Kd; + pid->sps->Kr = pid->Kr; + pid->sps->c1 = pid->c1; + pid->sps->c2 = pid->c2; + pid->sps->Umax = pid->Umax; + pid->sps->Umin = pid->Umin; +} + +//! \brief Loads the derivative path filter shadow coefficients +//! Note: Sampling period pid->css->t_sec are used in the calculation +//! Note: new coefficients take effect when DCL_updatePID64() is called +//! +//! \param[in] pid Pointer to the DCL_PID64 structure +//! \param[in] fc The desired filter bandwidth in Hz +//! +_DCL_CODE_ACCESS +void DCL_setPIDF64filterBW(DCL_PIDF64 *pid, float64_t fc) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code; + err_code = ((fc >= 1.0L / (2.0L * pid->css->t_sec)) || (fc <= 0.0L)) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + float64_t t_sec = pid->css->t_sec; + float64_t tau = 1.0L / (2.0L * CONST_PI_F64 * fc); + pid->sps->c1 = 2.0L / (t_sec + (2.0L * tau)); + pid->sps->c2 = (t_sec - (2.0L * tau)) / (t_sec + (2.0L * tau)); +} + +//! \brief Loads the PID64 derivative path filter active coefficients +//! Note: Sampling period pid->css->t_sec are used in the calculation +//! Note: new coefficients take effect immediately. SPS & +//! CSS contents are unaffected. +//! +//! \param[in] pid Pointer to the DCL_PID64 structure +//! \param[in] fc The desired filter bandwidth in Hz +//! \param[in] t_sec The controller update rate in seconds +//! +_DCL_CODE_ACCESS +void DCL_setActivePIDF64filterBW(DCL_PIDF64 *pid, float64_t fc, float64_t t_sec) +{ + +#ifdef DCL_ERROR_HANDLING_ENABLED + uint32_t err_code; + err_code = ((fc >= 1.0L / (2.0L * t_sec)) || (fc <= 0.0L)) ? dcl_param_range_err : dcl_none; + if (err_code) + { + DCL_setError(pid,err_code); + DCL_getErrorInfo(pid); + DCL_runErrorHandler(pid); + } +#endif + + float64_t tau = 1.0L / (2.0L * CONST_PI_F64 * fc); + pid->c1 = 2.0L / (t_sec + (2.0L * tau)); + pid->c2 = (t_sec - (2.0L * tau)) / (t_sec + (2.0L * tau)); +} + +//! \brief Returns the active derivative path filter bandwidth in Hz +//! Note: Sampling period pid->css->t_sec are used in the calculation +//! +//! \param[in] pid Pointer to the DCL_PID64 structure +//! \return The filter bandwidth in Hz +//! +_DCL_CODE_ACCESS +float64_t DCL_getPIDF64filterBW(DCL_PIDF64 *pid) +{ + float64_t tau = ((2.0L - pid->c1 * pid->css->t_sec) / (2.0L * pid->c1)); + return(1.0L / (2.0L * CONST_PI_F64 * tau)); +} + +//! \brief Executes an ideal form PID64 controller +//! +//! \param[in] pid Pointer to the DCL_PID64 structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback value +//! \param[in] lk External output clamp flag +//! \return The control effort +//! +_DCL_CODE_ACCESS +float64_t DCL_runPIDF64Series(DCL_PIDF64 *pid, float64_t rk, float64_t yk, float64_t lk) +{ + float64_t v1, v4, v5, v8, v9, v10, v12; + + v5 = (pid->Kr * rk) - yk; + v8 = ((rk - yk) * pid->Ki * pid->Kp * pid->i14) + pid->i10; + pid->i10 = v8; + v1 = yk * pid->Kd * pid->c1; + v4 = v1 - pid->d2 - pid->d3; + pid->d2 = v1; + pid->d3 = v4 * pid->c2; + v9 = ((v5 - v4) * pid->Kp) + v8; + v10 = DCL_runSat(v9, pid->Umax, pid->Umin); + v12 = (v10 == v9) ? 1.0 : 0.0; + pid->i14 = v12 * lk; + +#ifdef DCL_TESTPOINTS_ENABLED + pid->css->tpt = v5; +#endif + + return(v10); +} + +//! \brief Executes an parallel form PID64 controller +//! +//! \param[in] pid Pointer to the DCL_PID64 structure +//! \param[in] rk The controller set-point reference +//! \param[in] yk The measured feedback value +//! \param[in] lk External output clamp flag +//! \return The control effort +//! +_DCL_CODE_ACCESS +float64_t DCL_runPIDF64Parallel(DCL_PIDF64 *pid, float64_t rk, float64_t yk, float64_t lk) +{ + float64_t v1, v4, v5, v6, v8, v9, v10, v12; + + v5 = rk - yk; + v6 = v5 * pid->Kp; + v8 = v5 * pid->Ki * pid->i14 + pid->i10; + pid->i10 = v8; + v1 = v5 * pid->Kd * pid->c1; + v4 = v1 - pid->d2 - pid->d3; + pid->d2 = v1; + pid->d3 = v4 * pid->c2; + v9 = v6 + v8 + v4; + v10 = DCL_runSat(v9, pid->Umax, pid->Umin); + v12 = (v10 == v9) ? 1.0f : 0.0f; + pid->i14 = v12 * lk; + +#ifdef DCL_TESTPOINTS_ENABLED + pid->css->tpt = v8; +#endif + + return(v10); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif // extern "C" + +#endif // _DCL_PIDF64_H_