rev: оставлени минимум, необходимый для запуска ESC и переноса в ПЗИ

This commit is contained in:
Александр Гуляев 2024-12-05 17:22:22 +03:00
parent 10c63a7282
commit e456226125
6 changed files with 7253 additions and 7439 deletions

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@ -131,7 +131,7 @@
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@ -1,4 +1,11 @@
eclipse.preferences.version=1
encoding//FLASH/device/subdir_rules.mk=UTF-8
encoding//FLASH/device/subdir_vars.mk=UTF-8
encoding//FLASH/makefile=UTF-8
encoding//FLASH/objects.mk=UTF-8
encoding//FLASH/sources.mk=UTF-8
encoding//FLASH/subdir_rules.mk=UTF-8
encoding//FLASH/subdir_vars.mk=UTF-8
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@ -65,7 +65,6 @@ V4.30 : create file (state machine; handling state transition options; input fee
#include "cia402appl.h"
#undef _CiA402_
//#include <DebugP.h>
/*--------------------------------------------------------------------------------------
------
@ -1397,48 +1396,45 @@ void APPL_Application(void)
\brief This is the main function
*////////////////////////////////////////////////////////////////////////////////////////
int main(void) // TODO: main()
{
/* initialize the Hardware and the EtherCAT Slave Controller */
HW_Init();
///< инициализация hard of CM
ESC_initHW();
/*
* FIXME : мои настройки и проверки
*/
// HW_SetLed(TRUE, TRUE); ///< AMG Этих LED/pins нет в rev.1
/*
* Register MII Management Control/Status (0x0510:0x0511)
* 7:3
*/
///< Запись PHY адреса
uint16_t reg1;
ESC_writeWordISR(0x8002, ESC_MII_CTRL_STATUS_1_OFFSET); ///< разблокировать запись в 0х0512
// Register PHY Register Address (0x0513)
ESC_writeWordISR(0x01, ESC_PHY_REG_ADDRESS_OFFSET);
reg1 = ESC_readWord(ESC_PHY_REG_ADDRESS_OFFSET);
// запись нового адреса 0x04
reg1 = ESC_readWord(ESC_PHY_ADDRESS_OFFSET);
ESC_writeWordISR(0x18, ESC_PHY_ADDRESS_OFFSET);
reg1 = ESC_readWord(ESC_PHY_ADDRESS_OFFSET);
// port rgisters
uint8_t reg2 = ESC_readWord(0x07);
///** Пример из С2000
// ESC_writeWordISR(0x0D00, ESC_PHY_REG_ADDRESS_OFFSET); //0x0D for CM, set extended PHY register control
// ESC_writeWordISR(0x0D00, ESC_PHY_REG_ADDRESS_OFFSET); // 0x0D for CM, set extended PHY register control
// ESC_writeWordISR(0x0007, ESC_PHY_DATA_OFFSET); // DEVAD for MMD7
// ESC_writeWord(0x0200, ESC_MII_CTRL_STATUS_1_OFFSET); //write command for C28x, status_2_offset register for CM
// ESC_writeWordISR(0x0E00, ESC_PHY_REG_ADDRESS_OFFSET); //0x0E for CM, set extended PHY Data register
// ESC_writeWordISR(0x003D, ESC_PHY_DATA_OFFSET); // PHY extended register address
// ESC_writeWord(0x0200, ESC_MII_CTRL_STATUS_1_OFFSET); //write command for C28x, status_2_offset register for CM
// ESC_writeWordISR(0x0D00, ESC_PHY_REG_ADDRESS_OFFSET); //0x0D for CM, set extended PHY register control
// ESC_writeWordISR(0x4007, ESC_PHY_DATA_OFFSET); // change to Data in REGCR Bit 15:14
// ESC_writeWord(0x0200, ESC_MII_CTRL_STATUS_1_OFFSET); //write command for C28x, status_2_offset register for CM
// ESC_writeWordISR(0x0E00, ESC_PHY_REG_ADDRESS_OFFSET); //0x0E for CM, set extended PHY Data register
// ESC_writeWord(0x0100, ESC_MII_CTRL_STATUS_1_OFFSET); //Read command for C28x, status_2_offset register for CM
// ESC_writeWord(0x0200, ESC_MII_CTRL_STATUS_1_OFFSET); // write command for C28x, status_2_offset register for CM
// ESC_writeWordISR(0x0E00, ESC_PHY_REG_ADDRESS_OFFSET); // 0x0E for CM, set extended PHY Data register
// ESC_writeWordISR(0x003D, ESC_PHY_DATA_OFFSET); // PHY extended register address
// ESC_writeWord(0x0200, ESC_MII_CTRL_STATUS_1_OFFSET); // write command for C28x, status_2_offset register for CM
// ESC_writeWordISR(0x0D00, ESC_PHY_REG_ADDRESS_OFFSET); // 0x0D for CM, set extended PHY register control
// ESC_writeWordISR(0x4007, ESC_PHY_DATA_OFFSET); // change to Data in REGCR Bit 15:14
// ESC_writeWord(0x0200, ESC_MII_CTRL_STATUS_1_OFFSET); // write command for C28x, status_2_offset register for CM
// ESC_writeWordISR(0x0E00, ESC_PHY_REG_ADDRESS_OFFSET); // 0x0E for CM, set extended PHY Data register
// ESC_writeWord(0x0100, ESC_MII_CTRL_STATUS_1_OFFSET); // Read command for C28x, status_2_offset register for CM
//---------------------------------------------------------------------
//** Инициализация словарей
/* Инициализация словарей */
MainInit();
/*Initialize Axes structures*/

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@ -12,35 +12,8 @@
// $Release Date: Fri Nov 17 18:58:50 IST 2023 $
// $Copyright:
// Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################
// Файл зачищенный и заточенный под ПЧ2П board rev.1 2024(C)
//###########################################################################
//
@ -48,6 +21,8 @@
//
#include "ethercat_slave_cm_hal.h"
#undef PDI_HAL_TEST
#ifdef PDI_HAL_TEST
//
@ -68,8 +43,7 @@ static uint32_t ESC_readBlockData[ESC_HAL_TEST_BLOCK_LENGTH / 4U];
// ESC_getTimer
//
//*****************************************************************************
uint32_t
ESC_getTimer(void)
uint32_t ESC_getTimer(void)
{
//
// Return 1's compliment of the CPU timer
@ -82,8 +56,7 @@ ESC_getTimer(void)
// ESC_clearTimer
//
//*****************************************************************************
void
ESC_clearTimer(void)
void ESC_clearTimer(void)
{
//
// Set the timer period count
@ -101,8 +74,7 @@ ESC_clearTimer(void)
// ESC_timerIncPerMilliSec
//
//*****************************************************************************
uint32_t
ESC_timerIncPerMilliSec(void)
uint32_t ESC_timerIncPerMilliSec(void)
{
//
// Returns value based on core frequency of 125MHz.
@ -1023,29 +995,18 @@ ESC_releaseESCReset(void)
// ESC_initHW
//
//*****************************************************************************
uint16_t
ESC_initHW(void)
uint16_t ESC_initHW(void)
{
//
// Set application-specific timeout for waiting for EEPROM to load
// and one for waiting for memory initialization
// (End user can adjust as needed)
//
uint16_t eepromTimeOut = 0x1000U;
uint16_t memoryTimeOut = 0x300U;
//
// Initialize CM - Disable watchdog, enable peripherals
// (Device clocking setup by CPU1)
//
CM_init();
//
// Initialize ESC GPIOs
//
// Already setup and initialized by CPU1
//
//
// Register EtherCAT Interrupt Handlers
//
@ -1067,39 +1028,19 @@ ESC_initHW(void)
CPUTimer_setPreScaler(CPUTIMER0_BASE, 0U);
CPUTimer_startTimer(CPUTIMER0_BASE);
#ifdef PDI_HAL_TEST
//
// Enable Pass, fail signals for HAL PDI Test
//
ESC_passFailSignalSetup();
#endif // PDI_HAL_TEST
//
// Configure EEPROM Size for 16K bits or less
//
ESCSS_configureEEPROMSize(ESC_SS_CONFIG_BASE, ESCSS_LESS_THAN_16K);
//
// Reset ESC
//
ESC_resetESC();
#ifdef PDI_HAL_TEST
//
// Enable the debug access
//
while((HWREGH(ESC_SS_BASE + ESCSS_O_ACCESS_CTRL) &
ESCSS_ACCESS_CTRL_ENABLE_DEBUG_ACCESS) !=
ESCSS_ACCESS_CTRL_ENABLE_DEBUG_ACCESS)
{
ESCSS_enableDebugAccess(ESC_SS_BASE);
}
#endif // PDI_HAL_TEST
//
// Initialize ESCSS Memory
//
ESCSS_initMemory(ESC_SS_BASE);
///< ПОСЛЕ ЭТОГО ЗАПУСКАЕТСЯ ESC >>>>>>>>>> !!!
//
// Wait for ESCSS memory initialization to complete
@ -1161,8 +1102,7 @@ ESC_initHW(void)
// ESC_releaseHW
//
//*****************************************************************************
void
ESC_releaseHW(void)
void ESC_releaseHW(void)
{
//
// Intentionally empty - Implementation is left to the end user
@ -1237,6 +1177,6 @@ ESC_applicationSync1Handler(void)
ESCSS_clearRawInterruptStatus(ESC_SS_BASE, ESCSS_INTR_CLR_SYNC1_CLR);
}
//
// End of File
//
//-----------------------------------------------------------------
// End of File
//-----------------------------------------------------------------