инициализация сигма-дельта и потров
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Eugene
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32
Projects/epwm_test/src/gpio_init.c
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32
Projects/epwm_test/src/gpio_init.c
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/*
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* gpio_init.c
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*
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* Created on: 4 ñåíò. 2023 ã.
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* Author: seklyuts
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*/
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#include "f28x_project.h"
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void GpioInit(void)
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{
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EALLOW;
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GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0;
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GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0;
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GpioCtrlRegs.GPAGMUX1.bit.GPIO0 = 0;
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GpioCtrlRegs.GPAGMUX1.bit.GPIO1 = 0;
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GpioCtrlRegs.GPADIR.bit.GPIO0 = 1;
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GpioCtrlRegs.GPADIR.bit.GPIO1 = 1;
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GpioDataRegs.GPADAT.bit.GPIO0 = 0;
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GpioDataRegs.GPADAT.bit.GPIO1 = 0;
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EDIS;
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}
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void Gpio0out(uint16_t out_bit)
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{
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GpioDataRegs.GPADAT.bit.GPIO0 = out_bit;
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}
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void Gpio1out(uint16_t out_bit)
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{
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GpioDataRegs.GPADAT.bit.GPIO1 = out_bit;
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}
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16
Projects/epwm_test/src/gpio_init.h
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16
Projects/epwm_test/src/gpio_init.h
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/*
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* gpio_init.h
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*
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* Created on: 4 ñåíò. 2023 ã.
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* Author: seklyuts
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*/
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#ifndef SRC_GPIO_INIT_H_
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#define SRC_GPIO_INIT_H_
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void GpioInit(void);
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void Gpio0out(uint16_t out_bit);
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void Gpio1out(uint16_t out_bit);
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#endif /* SRC_GPIO_INIT_H_ */
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203
Projects/epwm_test/src/sdfm.c
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203
Projects/epwm_test/src/sdfm.c
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/*
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* sdfm.c
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*
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* Created on: 25 àâã. 2023 ã.
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* Author: seklyuts
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*/
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#include "f28x_project.h"
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#include "f2838x_sdfm_drivers.h"
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//
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// Defines
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//
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#define MAX_SAMPLES 1024
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#define SDFM_PIN_MUX_OPTION1 1
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#define SDFM_PIN_MUX_OPTION2 2
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#define SDFM_PIN_MUX_OPTION3 3
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#define EPWM_TIMER_TBPRD 65535 // ePWM Period register
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#define SDFM_INT_MASK 0x80001000U
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//
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// Globals
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//
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uint16_t gPeripheralNumber;
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//uint16_t gPWM_number = 1; // ePWM 1 for synchronizing SDFM1 filters
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int16_t Filter1_Result[MAX_SAMPLES];
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int16_t Filter3_Result[MAX_SAMPLES];
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int16_t Filter2_Result[MAX_SAMPLES];
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int16_t Filter4_Result[MAX_SAMPLES];
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#pragma DATA_SECTION(Filter1_Result,"Filter1_RegsFile");
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#pragma DATA_SECTION(Filter2_Result,"Filter2_RegsFile");
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#pragma DATA_SECTION(Filter3_Result,"Filter3_RegsFile");
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#pragma DATA_SECTION(Filter4_Result,"Filter4_RegsFile");
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int16_t ADC_Volt;
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__interrupt void Sdfm1_ISR(void);
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void SdfmInitGpio(void)
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{
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EALLOW;
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GPIO_SetupPinOptions(16, GPIO_INPUT, GPIO_ASYNC);
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GPIO_SetupPinMux(16,GPIO_MUX_CPU1,7);
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GPIO_SetupPinOptions(17, GPIO_INPUT, GPIO_ASYNC);
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GPIO_SetupPinMux(17,GPIO_MUX_CPU1,7);
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EDIS;
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}
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void SdfmInitEnable(void)
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{
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CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
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CpuSysRegs.PCLKCR6.bit.SD1 = 1;
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}
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void SdfmInitInterruptEn(void)
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{
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EALLOW;
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PieVectTable.SDFM1_INT = &Sdfm1_ISR;
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IER |= M_INT5;
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PieCtrlRegs.PIEIER5.bit.INTx9 = 1; // SDFM1 interrupt enabled
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EDIS;
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}
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void SdfmInit(uint16_t Num)
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{
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uint16_t HLT, LLT;
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gPeripheralNumber = Num;
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//
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// Configure SDFM type to 0
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//
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EALLOW;
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DevCfgRegs.SDFMTYPE.all = 0x8000;
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EDIS;
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//
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// Input Control Module
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//
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// Configure Input Control Mode: Modulator Clock rate = Modulator data rate
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//
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Sdfm_configureInputCtrl(gPeripheralNumber, FILTER1, MODE_0);
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//
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// Comparator Module
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//
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HLT = 0x7FFF; //Over value threshold settings
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LLT = 0x0000; //Under value threshold settings
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//
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// Configure Comparator module's comparator filter type and comparator's OSR
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// value, higher threshold, lower threshold
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//
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Sdfm_configureComparator(gPeripheralNumber, FILTER1, SINC3, OSR_32,
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HLT, LLT);
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//
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// Enable Master filter bit: Unless this bit is set none of the filter modules
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// can be enabled. All the filter modules are synchronized when master filter
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// bit is enabled after individual filter modules are enabled. All the filter
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// modules are asynchronized when master filter bit is enabled before
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// individual filter modules are enabled.
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//
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Sdfm_enableMFE(gPeripheralNumber);
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//
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// Data filter Module
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//
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// Configure Data filter modules filter type, OSR value and
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// enable / disable data filter
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//
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Sdfm_configureData_filter(gPeripheralNumber, FILTER1, FILTER_ENABLE, SINC3,
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OSR_256, DATA_16_BIT, SHIFT_9_BITS);
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EALLOW;
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// Sdfm1Regs.SDSYNC1.bit.SYNCSEL = 0;
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Sdfm1Regs.SDDFPARM1.bit.SDSYNCEN = 0;
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EDIS;
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// Sdfm_configureExternalreset(gPeripheralNumber,FILTER_1_EXT_RESET_ENABLE,0,0,0);
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Sdfm_configureInterrupt(gPeripheralNumber, FILTER1, IEH_DISABLE,
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IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
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//
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// Enable master interrupt so that any of the filter interrupts can trigger
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// by SDFM interrupt to CPU
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//
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Sdfm_enableMIE(gPeripheralNumber);
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}
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//
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// Sdfm1_ISR - SDFM 1 ISR
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//
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__interrupt void Sdfm1_ISR(void)
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{
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static uint16_t loopCounter1 = 0;
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//
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// Wait for result from all the filters (SDIFLG)
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//
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uint32_t IntFlags = Sdfm_readFlagRegister(gPeripheralNumber);
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// while((Sdfm_readFlagRegister(gPeripheralNumber) &
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// SDFM_INT_MASK) != SDFM_INT_MASK);
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//
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// Reset the loop counter
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//
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if(loopCounter1 >= MAX_SAMPLES)
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{
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loopCounter1 = 0;
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}
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//
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// Read each SDFM filter output and store it in respective filter
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// result array
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//
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if (IntFlags & 0x1000)
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{
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ADC_Volt = Filter1_Result[loopCounter1++] = SDFM1_READ_FILTER1_DATA_16BIT;
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EALLOW;
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Sdfm1Regs.SDCPARM1.bit.MFIE = 1;
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EDIS;
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}
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if(IntFlags & 0x100)
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{
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ADC_Volt = 0;
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EALLOW;
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Sdfm1Regs.SDCPARM1.bit.MFIE = 0;
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EDIS;
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}
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//
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// Clear SDFM flag register
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//
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Sdfm_clearFlagRegister(gPeripheralNumber,IntFlags);
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//
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// Acknowledge this __interrupt to receive more __interrupts from group 5
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//
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PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
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}
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//Sdfm_clearFlagRegister
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//Sdfm_readFlagRegister
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19
Projects/epwm_test/src/sdfm.h
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19
Projects/epwm_test/src/sdfm.h
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@ -0,0 +1,19 @@
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/*
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* sdfm.h
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*
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* Created on: 25 àâã. 2023 ã.
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* Author: seklyuts
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*/
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#ifndef SRC_SDFM_H_
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#define SRC_SDFM_H_
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void SdfmInitGpio(void);
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void SdfmInitEnable(void);
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void SdfmInitInterruptEn(void);
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void SdfmInit(uint16_t Num);
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#endif /* SRC_SDFM_H_ */
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