diff --git a/Projects/epwm_test/src/gpio_init.c b/Projects/epwm_test/src/gpio_init.c new file mode 100644 index 0000000..ba4c60d --- /dev/null +++ b/Projects/epwm_test/src/gpio_init.c @@ -0,0 +1,32 @@ +/* + * gpio_init.c + * + * Created on: 4 ñåíò. 2023 ã. + * Author: seklyuts + */ +#include "f28x_project.h" + +void GpioInit(void) +{ + EALLOW; + GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0; + GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0; + GpioCtrlRegs.GPAGMUX1.bit.GPIO0 = 0; + GpioCtrlRegs.GPAGMUX1.bit.GPIO1 = 0; + GpioCtrlRegs.GPADIR.bit.GPIO0 = 1; + GpioCtrlRegs.GPADIR.bit.GPIO1 = 1; + GpioDataRegs.GPADAT.bit.GPIO0 = 0; + GpioDataRegs.GPADAT.bit.GPIO1 = 0; + EDIS; +} + +void Gpio0out(uint16_t out_bit) +{ + GpioDataRegs.GPADAT.bit.GPIO0 = out_bit; +} + + +void Gpio1out(uint16_t out_bit) +{ + GpioDataRegs.GPADAT.bit.GPIO1 = out_bit; +} diff --git a/Projects/epwm_test/src/gpio_init.h b/Projects/epwm_test/src/gpio_init.h new file mode 100644 index 0000000..9c465b6 --- /dev/null +++ b/Projects/epwm_test/src/gpio_init.h @@ -0,0 +1,16 @@ +/* + * gpio_init.h + * + * Created on: 4 ñåíò. 2023 ã. + * Author: seklyuts + */ + +#ifndef SRC_GPIO_INIT_H_ +#define SRC_GPIO_INIT_H_ + + +void GpioInit(void); +void Gpio0out(uint16_t out_bit); +void Gpio1out(uint16_t out_bit); + +#endif /* SRC_GPIO_INIT_H_ */ diff --git a/Projects/epwm_test/src/sdfm.c b/Projects/epwm_test/src/sdfm.c new file mode 100644 index 0000000..fe3f4b8 --- /dev/null +++ b/Projects/epwm_test/src/sdfm.c @@ -0,0 +1,203 @@ +/* + * sdfm.c + * + * Created on: 25 àâã. 2023 ã. + * Author: seklyuts + */ + +#include "f28x_project.h" +#include "f2838x_sdfm_drivers.h" +// +// Defines +// +#define MAX_SAMPLES 1024 +#define SDFM_PIN_MUX_OPTION1 1 +#define SDFM_PIN_MUX_OPTION2 2 +#define SDFM_PIN_MUX_OPTION3 3 +#define EPWM_TIMER_TBPRD 65535 // ePWM Period register +#define SDFM_INT_MASK 0x80001000U +// +// Globals +// +uint16_t gPeripheralNumber; +//uint16_t gPWM_number = 1; // ePWM 1 for synchronizing SDFM1 filters +int16_t Filter1_Result[MAX_SAMPLES]; +int16_t Filter3_Result[MAX_SAMPLES]; +int16_t Filter2_Result[MAX_SAMPLES]; +int16_t Filter4_Result[MAX_SAMPLES]; +#pragma DATA_SECTION(Filter1_Result,"Filter1_RegsFile"); +#pragma DATA_SECTION(Filter2_Result,"Filter2_RegsFile"); +#pragma DATA_SECTION(Filter3_Result,"Filter3_RegsFile"); +#pragma DATA_SECTION(Filter4_Result,"Filter4_RegsFile"); +int16_t ADC_Volt; + +__interrupt void Sdfm1_ISR(void); + + +void SdfmInitGpio(void) +{ + EALLOW; + + GPIO_SetupPinOptions(16, GPIO_INPUT, GPIO_ASYNC); + GPIO_SetupPinMux(16,GPIO_MUX_CPU1,7); + GPIO_SetupPinOptions(17, GPIO_INPUT, GPIO_ASYNC); + GPIO_SetupPinMux(17,GPIO_MUX_CPU1,7); + + EDIS; +} + +void SdfmInitEnable(void) +{ + CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1; + CpuSysRegs.PCLKCR6.bit.SD1 = 1; + +} + +void SdfmInitInterruptEn(void) +{ + EALLOW; + PieVectTable.SDFM1_INT = &Sdfm1_ISR; + IER |= M_INT5; + PieCtrlRegs.PIEIER5.bit.INTx9 = 1; // SDFM1 interrupt enabled + EDIS; + + +} + +void SdfmInit(uint16_t Num) +{ + uint16_t HLT, LLT; + + gPeripheralNumber = Num; + // + // Configure SDFM type to 0 + // + EALLOW; + DevCfgRegs.SDFMTYPE.all = 0x8000; + EDIS; + + + // + // Input Control Module + // + // Configure Input Control Mode: Modulator Clock rate = Modulator data rate + // + Sdfm_configureInputCtrl(gPeripheralNumber, FILTER1, MODE_0); + + + // + // Comparator Module + // + HLT = 0x7FFF; //Over value threshold settings + LLT = 0x0000; //Under value threshold settings + + // + // Configure Comparator module's comparator filter type and comparator's OSR + // value, higher threshold, lower threshold + // + Sdfm_configureComparator(gPeripheralNumber, FILTER1, SINC3, OSR_32, + HLT, LLT); + + // + // Enable Master filter bit: Unless this bit is set none of the filter modules + // can be enabled. All the filter modules are synchronized when master filter + // bit is enabled after individual filter modules are enabled. All the filter + // modules are asynchronized when master filter bit is enabled before + // individual filter modules are enabled. + // + Sdfm_enableMFE(gPeripheralNumber); + + // + // Data filter Module + // + // Configure Data filter modules filter type, OSR value and + // enable / disable data filter + // + Sdfm_configureData_filter(gPeripheralNumber, FILTER1, FILTER_ENABLE, SINC3, + OSR_256, DATA_16_BIT, SHIFT_9_BITS); + + + EALLOW; +// Sdfm1Regs.SDSYNC1.bit.SYNCSEL = 0; + Sdfm1Regs.SDDFPARM1.bit.SDSYNCEN = 0; + EDIS; + +// Sdfm_configureExternalreset(gPeripheralNumber,FILTER_1_EXT_RESET_ENABLE,0,0,0); + + + + Sdfm_configureInterrupt(gPeripheralNumber, FILTER1, IEH_DISABLE, + IEL_DISABLE, MFIE_ENABLE, AE_ENABLE); + + + + // + // Enable master interrupt so that any of the filter interrupts can trigger + // by SDFM interrupt to CPU + // + Sdfm_enableMIE(gPeripheralNumber); + + +} + +// +// Sdfm1_ISR - SDFM 1 ISR +// +__interrupt void Sdfm1_ISR(void) +{ + static uint16_t loopCounter1 = 0; + + + // + // Wait for result from all the filters (SDIFLG) + // + + uint32_t IntFlags = Sdfm_readFlagRegister(gPeripheralNumber); +// while((Sdfm_readFlagRegister(gPeripheralNumber) & +// SDFM_INT_MASK) != SDFM_INT_MASK); + + + // + // Reset the loop counter + // + if(loopCounter1 >= MAX_SAMPLES) + { + loopCounter1 = 0; + } + + // + // Read each SDFM filter output and store it in respective filter + // result array + // + + if (IntFlags & 0x1000) + { + ADC_Volt = Filter1_Result[loopCounter1++] = SDFM1_READ_FILTER1_DATA_16BIT; + EALLOW; + Sdfm1Regs.SDCPARM1.bit.MFIE = 1; + EDIS; + } + + if(IntFlags & 0x100) + { + ADC_Volt = 0; + EALLOW; + Sdfm1Regs.SDCPARM1.bit.MFIE = 0; + EDIS; + } + + // + // Clear SDFM flag register + // + Sdfm_clearFlagRegister(gPeripheralNumber,IntFlags); + + // + // Acknowledge this __interrupt to receive more __interrupts from group 5 + // + PieCtrlRegs.PIEACK.all = PIEACK_GROUP5; +} + +//Sdfm_clearFlagRegister + +//Sdfm_readFlagRegister + diff --git a/Projects/epwm_test/src/sdfm.h b/Projects/epwm_test/src/sdfm.h new file mode 100644 index 0000000..5d56fd5 --- /dev/null +++ b/Projects/epwm_test/src/sdfm.h @@ -0,0 +1,19 @@ +/* + * sdfm.h + * + * Created on: 25 àâã. 2023 ã. + * Author: seklyuts + */ + +#ifndef SRC_SDFM_H_ +#define SRC_SDFM_H_ + +void SdfmInitGpio(void); +void SdfmInitEnable(void); +void SdfmInitInterruptEn(void); +void SdfmInit(uint16_t Num); + + + + +#endif /* SRC_SDFM_H_ */