motor-control-sdk/docs_src/docs/api_guide/examples/hdsl_example.md
Dhaval Khandla 0690477541 am243x: docs: Rename the PDF files for 3-axis adapter and Transceiver
- Remove AM64x from the name

Fixes: PINDSW-7489

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
2024-01-10 15:17:20 +05:30

7.9 KiB

HDSL Diagnostic

[TOC]

Introduction

The HDSL diagnostic application described here interacts with the firmware interface.

HDSL diagnostic application does below,

  • Configures pinmux, GPIO, ICSS clock to 300MHz,
  • Initializes ICSS0-PRU1, ICSS0-IEP0 and IEP1(for SYNC mode support.Timesync router is used to latch the loopback.),
  • Loads lookup table for encoding/decoding of Hiperface data
  • Loads the initialization section of PRU firmware & executes it.

Firmware is split to three sections, initialization, datalink and transport. At startup, the application displays details about encoder and status. It then presents the user with menu options, based on the option selected, application communicates with HDSL interface and the result is presented to the user.

This example also allows the capability to save the HDSL register data into memory for the defined duration.

\cond SOC_AM243X

  • For @VAR_BOARD_NAME_LOWER example, the data is stored in DDR.
  • For @VAR_LP_BOARD_NAME_LOWER example, the data is stored in MSRAM. \endcond

\note Channel 2 can be enabled only if channel 0 is enabled because of code overlay scheme needed in TX-PRU. See \ref HDSL_DESIGN_TXPRU_OVERLAY for more details

\note The HDSL register trace option is only available with debug mode builds for single channel examples.

Important files and directory structure

Folder/Files Description
${SDK_INSTALL_PATH}/examples/position_sense/hdsl_diagnostic
hdsl_diagnostic.c hdsl_diagnostic.h Source and Header files
${SDK_INSTALL_PATH}/source/position_sense/hdsl
driver/ Folder containing HDSL PRU driver sources.
include/ Folder containing HDSL PRU header sources.
firmware/ Folder containing HDSL PRU firmware sources.

\cond SOC_AM64X

Parameter Value
CPU + OS r5fss0-0 freertos
ICSSG ICSSG0
PRU PRU1 (single channel)
^ PRU1, RTU-PRU1, TXPRU1 (multi channel using three PRUs - load share mode)
Toolchain ti-arm-clang
Board @VAR_BOARD_NAME_LOWER
Example folder examples/position_sense/hdsl_diagnostic

\endcond

\cond SOC_AM243X

Parameter Value
CPU + OS r5fss0-0 freertos
ICSSG ICSSG0
PRU PRU1 (single channel)
^ PRU1, RTU-PRU1, TXPRU1 (multi channel using three PRUs - load share mode)
Toolchain ti-arm-clang
Board @VAR_BOARD_NAME_LOWER (2 channel and 1 channel examples), @VAR_LP_BOARD_NAME_LOWER (2 channel and 1 channel examples)
Example folder examples/position_sense/hdsl_diagnostic

\endcond

Steps to Run the Example

Hardware Prerequisites

Other than the basic EVM setup mentioned in EVM Setup , below additional hardware is required to run this demo

\note For more design details of the TIDEP-01015 3 Axis Board, Interface card connecting EVM and TIDEP-01015 3 Axis, or HDSL AM64xE1 Transceiver card, please contact TI via E2E/FAE.

\cond SOC_AM243X

Hardware Prerequisities for Booster Pack

Hardware Setup(Using TIDA-00179, TIDEP-01015 and Interface board)

\imageStyle{HDSL_Connections.png,width:40%} \image html HDSL_Connections.png "Hardware Setup"

Hardware Setup(Using HDSL AM64xE1 Transceiver)

\imageStyle{HDSL_AM64xE1.png,width:60%} \image html HDSL_AM64xE1.png "Hardware Setup"

\cond SOC_AM243X

Hardware Setup(Using Booster Pack & AM243x-LP)

\imageStyle{HDSL_Booster_Pack.png,width:40%} \image html HDSL_Booster_Pack.png "Hardware Setup of Booster Pack + LP for HDSL"

Booster Pack Jumper Configuration

Designator ON/OFF Description
J11 OFF VSENSE/ISENSE select
J13 OFF VSENSE/ISENSE select
J17 Pin 1-2 Connected %SDFM Clock Feedback Select
J18/J19 J18 OFF & J19 ON Axis 1: Encoder/Resolver Voltage Select
J20/J21 J20 ON & J21 OFF Axis 2: Encoder/Resolver Voltage Select
J22 OFF Axis 1: Manchester Encoding Select
J23 OFF Axis 2: Manchester Encoding Select
J24 ON Axis 1: RS485/DSL MUX
J25 OFF Axis 2: RS485/DSL MUX
J26 OFF VSENSE/ISENSE Select
J27 ON 3WIRE/%SDFM MUX
J28 OFF 3WIRE MUX
\endcond ## Build, load and run

Mode, Channel(s) and Board Selection from sysconfig:

  • Select Mode from sysconfig menu (Freerun/sync mode).
  • Select Channel 0/channel 1 from sysconfig menu for channel selection.
  • Select Boosterpack option from sysconfig for running application on AM243x-LP. \imageStyle{hdsl_sysconfig_menu.png,width:60%} \image html hdsl_sysconfig_menu.png "HDSL SYSCONFIG Menu"

Sample Output

Shown below is a sample output when the application is run

  • Freerun mode \image html hdsl_freerun_menu.png "HDSL Freerun mode Menu" \image html hdsl_positional_commands_menu.png "HDSL Freerun mode Menu"

  • Sync Mode This is a test feature. In real application, PWM syncout will be connected to Latch input instead of IEP1 sync. Enter 6000 as period in UART menu after loading application. Refer \ref HDSL_DESIGN_SYNC for more details about sync mode.

\image html hdsl_sync_mode_menu1.png "HDSL Sync mode Menu" \image html hdsl_sync_mode_menu2.png "HDSL Sync mode Menu" \image html hdsl_positional_commands_menu.png "HDSL Sync mode Menu"