Merge in PINDSW/motor_control_sdk from PINDSW-7166_fix_icssg1_clock_init_ref_design to next
* commit 'c71267b7fceea304bde32fd6c92449e08388998c':
am243x: ReferenceDesign: Update ICSSG1 clock configuration
- For the tidep_01032_dual_motor_drive reference design, ICSSG0 core clock should
be configured to 300 MHz and ICSSG1 core clock should be configured to 200 MHz.
R5F_0_0 configures ICSSG0 first and then R5F_1_0 configures ICSSG1.
- Because of MCUSDK-12117 bug, ICSSG1 clock configuration to 200 MHz causes ICSSG0
also to run at 200 MHz which is a problem for EnDat and SDFM firmwares.
- To avoid this issue, the clock configuration of ICSSG1 should be done separately
and not from SysConfig generated API.
Fixes: PINDSW-7166
Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
-Initial version for MCSDK 09.01.00
-Ported the EnDat 2.2 part to the new ICSSG EnDat 2.2 FW
-Add SDFM code
-Add endat_periodic_trigger.c/h to the CCS projectspec file
-Add PRU and RTU firmware header files for SDFM
-Enable load share mode
-SDFM Enable load share mode support
-Migrate to the EnDat 2.2 FW/driver
-Migrate to the SDFM FW/drive
-Migrate to Motor Control SDK 09.01.00.01
-Migrate R5F_0_0 drives motor 2 only project to EnDat 2.2
FW/driver and SDFM FW/drive
-Fixed the EtherCAT CiA402 client interference with motor control issue
-Add JS for projectspec file generation
-Code clean up
-Integarted the RTLib FOC functions into the reference design
-Add USE_RTLIB_FOC macro
-Add non cacheable region for EtherCAT slave application
-Remove SDDF folder
Fixes: PINDSW-7074
Signed-off-by: Ming Wei <mwei@ti.com>
Merge in PINDSW/motor_control_sdk from PINDSW-7051_add_hdsl_3rd_channel_2 to next
* commit '086fda69e2894c94701b50fa6554e1258d5ca9cd':
am64x/am243x: hdsl: Add support for third channel
- Add example and firmware projects for third channel
- Update diagnostic application changes to support 3rd channel
- Add overlay based firmware build for third channel
- Update sysconfig module for third channel
- Add driver APIs for configuring copy table and channel mask
- Add IPC among cores when overlay based loading is needed for
third channel
- Add logic to reset all channels when one channel is reset
Fixes: PINDSW-7051
Signed-off-by: Rajul Bhambay <r-bhambay@ti.com>
Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
Merge in PINDSW/motor_control_sdk from a0502729_PINDSW-7136_enable_shifting_between_time_trigger_point to next
* commit 'e4930a5fcd1dd756e5d71819e3d025a45f227623':
am64x/am243x: SDFM: Enable shifting between time-trigger point
Merge in PINDSW/motor_control_sdk from a0503545_tamagawa to next
* commit '10ae899ab6ace09c4f69d78916148e3d94100d19':
am64x/am243: tamagawa: resolve reviewer comments
am64x/am243: tamagawa: add global reinit
am64x/am243: tamagawa: Enable periodic trigger mode for multi-channel
Merge in PINDSW/motor_control_sdk from a0503545_tamagawa to next
* commit '52627d5ba63e873ec4d999ea0c3dde2c7826e775':
am243x: tamagawa: add multi_channel example on am243x-lp
- Firmware for RTU and PRU cores are always being loaded
- This leads to unnecessary protocol resets in beginning, because of
global PRU-ICSS peripheral reinitialization in both cores
Fixes: PINDSW-7126
Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
Merge in PINDSW/motor_control_sdk from PINDSW-5479_update_bissc to next
* commit 'c5bc321959da60d80ded93ea4a9ce96514edd614':
am243x: bissc: Refactor the code
Merge in PINDSW/motor_control_sdk from a0503545_PWM to next
* commit 'baaca0657d2866d64a545b6bfadfeea26f1de260':
am243x: pruio: modify example
am243x/am64x: pruio: add pwm driver example
am243x/am64x: pruio: add pwm driver
-modify example to generate pwm's in sync
-change to pruicss_pwm
-remove hardcoded values in api calls
Fixes: PINDSW-7096
Signed-off-by: Manoj Koppolu <manoj_koppolu@ti.com>
