External/motor-control-sdk
8
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

am243x/am64x: hdsl: Add check for QM becoming 15 in application

Browse Source 
- 15 is the standard value during normal operation

Fixes: PINDSW-7131

Signed-off-by: Dhaval Khandla <dhavaljk@ti.com>
This commit is contained in:
Dhaval Khandla 2023-12-19 15:09:03 +05:30
parent e6cf3c58ad
commit c7fffe2cd9
1 changed files with 33 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
examples/position_sense/hdsl_diagnostic/hdsl_diagnostic.c
View File

@ -130,6 +130,10 @@
#define ENCODER_RSSI_REG_ADDRESS (0x7C) #define ENCODER_RSSI_REG_ADDRESS (0x7C)
#define ENCODER_PING_REG_ADDRESS (0x7F) #define ENCODER_PING_REG_ADDRESS (0x7F)
/*Bit 7 will be set in QM when link is establised*/
#define QM_LINK_ESTABLISHED (0x80)
#define QM_LINK_ESTABLISHED_AND_VALUE_15 (0x8F)
#if !defined(HDSL_MULTI_CHANNEL) && defined(_DEBUG_) #if !defined(HDSL_MULTI_CHANNEL) && defined(_DEBUG_)
/* Memory Trace is triggered for each H-Frame. SYS_EVENT_21 is triggered for each /* Memory Trace is triggered for each H-Frame. SYS_EVENT_21 is triggered for each
@ -1444,20 +1448,32 @@ void hdsl_diagnostic_main(void *arg)
hdsl_pruss_load_run_fw_300m(gHdslHandleCh0); hdsl_pruss_load_run_fw_300m(gHdslHandleCh0);
#endif #endif
DebugP_log( "\r\n HDSL setup finished\n"); DebugP_log( "\r\n HDSL setup finished\n");
/*need some extra time for SYNC mode since frames are longer*/
#if (CONFIG_HDSL0_CHANNEL0==1) #if (CONFIG_HDSL0_CHANNEL0==1)
//Channel 0 starts here: /* Channel 0 starts here */
while(1) while(1)
{ {
ureg = HDSL_get_master_qm(gHdslHandleCh0); ureg = HDSL_get_master_qm(gHdslHandleCh0);
if((ureg & 0x80) != 0) if((ureg & QM_LINK_ESTABLISHED) != 0)
break; break;
DebugP_log( "\r\n Hiperface DSL encoder not detected\n"); DebugP_log( "\r\n Hiperface DSL encoder not detected\n");
ClockP_usleep(10000); ClockP_usleep(10000);
} }
/* Wait until QM is 15 */
while(1)
{
ureg = HDSL_get_master_qm(gHdslHandleCh0);
if(ureg == QM_LINK_ESTABLISHED_AND_VALUE_15)
break;
DebugP_log( "\r\n QM is not 15 \n");
ClockP_usleep(10000);
}
DebugP_log( "\r\n"); DebugP_log( "\r\n");
DebugP_log( "\r |-------------------------------------------------------------------------------|\n"); DebugP_log( "\r |-------------------------------------------------------------------------------|\n");
DebugP_log( "\r | Hiperface DSL Diagnostic : Channel 0 |\n"); DebugP_log( "\r | Hiperface DSL Diagnostic : Channel 0 |\n");
@ -1498,18 +1514,30 @@ void hdsl_diagnostic_main(void *arg)
#endif #endif
#if (CONFIG_HDSL0_CHANNEL1==1) #if (CONFIG_HDSL0_CHANNEL1==1)
//Channel 1 starts here: /* Channel 1 starts here */
while(1) while(1)
{ {
ureg = HDSL_get_master_qm(gHdslHandleCh1); ureg = HDSL_get_master_qm(gHdslHandleCh1);
if((ureg & 0x80) != 0) if((ureg & QM_LINK_ESTABLISHED) != 0)
break; break;
DebugP_log( "\r\n Hiperface DSL encoder not detected\n"); DebugP_log( "\r\n Hiperface DSL encoder not detected\n");
ClockP_usleep(10000); ClockP_usleep(10000);
} }
/* Wait until QM is 15 */
while(1)
{
ureg = HDSL_get_master_qm(gHdslHandleCh1);
if(ureg == QM_LINK_ESTABLISHED_AND_VALUE_15)
break;
DebugP_log( "\r\n QM is not 15 \n");
ClockP_usleep(10000);
}
DebugP_log( "\r\n"); DebugP_log( "\r\n");
DebugP_log( "\r |-------------------------------------------------------------------------------|\n"); DebugP_log( "\r |-------------------------------------------------------------------------------|\n");
DebugP_log( "\r | Hiperface DSL Diagnostic : Channel 1 |\n"); DebugP_log( "\r | Hiperface DSL Diagnostic : Channel 1 |\n");