diff --git a/examples/position_sense/hdsl_diagnostic/hdsl_diagnostic.c b/examples/position_sense/hdsl_diagnostic/hdsl_diagnostic.c
index 769108d..0464102 100644
--- a/examples/position_sense/hdsl_diagnostic/hdsl_diagnostic.c
+++ b/examples/position_sense/hdsl_diagnostic/hdsl_diagnostic.c
@@ -130,6 +130,10 @@
 #define ENCODER_RSSI_REG_ADDRESS    (0x7C)
 #define ENCODER_PING_REG_ADDRESS    (0x7F)
 
+/*Bit 7 will be set in QM when link is establised*/
+#define QM_LINK_ESTABLISHED                 (0x80)
+#define QM_LINK_ESTABLISHED_AND_VALUE_15    (0x8F)
+
 
 #if !defined(HDSL_MULTI_CHANNEL) && defined(_DEBUG_)
 /* Memory Trace is triggered for each H-Frame. SYS_EVENT_21 is triggered for each
@@ -1444,20 +1448,32 @@ void hdsl_diagnostic_main(void *arg)
     hdsl_pruss_load_run_fw_300m(gHdslHandleCh0);
     #endif
     DebugP_log( "\r\n HDSL setup finished\n");
-    /*need some extra time for SYNC mode since frames are longer*/
+
     #if (CONFIG_HDSL0_CHANNEL0==1)
-    //Channel 0 starts here:
+    /* Channel 0 starts here */
     while(1)
     {
         ureg = HDSL_get_master_qm(gHdslHandleCh0);
 
-        if((ureg & 0x80) != 0)
+        if((ureg & QM_LINK_ESTABLISHED) != 0)
             break;
 
         DebugP_log( "\r\n Hiperface DSL encoder not detected\n");
         ClockP_usleep(10000);
     }
 
+    /* Wait until QM is 15 */
+    while(1)
+    {
+        ureg = HDSL_get_master_qm(gHdslHandleCh0);
+
+        if(ureg == QM_LINK_ESTABLISHED_AND_VALUE_15)
+            break;
+
+        DebugP_log( "\r\n QM is not 15 \n");
+        ClockP_usleep(10000);
+    }
+
     DebugP_log( "\r\n");
     DebugP_log( "\r |-------------------------------------------------------------------------------|\n");
     DebugP_log( "\r |            Hiperface DSL Diagnostic : Channel 0                               |\n");
@@ -1498,18 +1514,30 @@ void hdsl_diagnostic_main(void *arg)
     #endif
     #if (CONFIG_HDSL0_CHANNEL1==1)
 
-    //Channel 1 starts here:
+    /* Channel 1 starts here */
     while(1)
     {
         ureg = HDSL_get_master_qm(gHdslHandleCh1);
 
-        if((ureg & 0x80) != 0)
+        if((ureg & QM_LINK_ESTABLISHED) != 0)
             break;
 
         DebugP_log( "\r\n Hiperface DSL encoder not detected\n");
         ClockP_usleep(10000);
     }
 
+    /* Wait until QM is 15 */
+    while(1)
+    {
+        ureg = HDSL_get_master_qm(gHdslHandleCh1);
+
+        if(ureg == QM_LINK_ESTABLISHED_AND_VALUE_15)
+            break;
+
+        DebugP_log( "\r\n QM is not 15 \n");
+        ClockP_usleep(10000);
+    }
+
     DebugP_log( "\r\n");
     DebugP_log( "\r |-------------------------------------------------------------------------------|\n");
     DebugP_log( "\r |            Hiperface DSL Diagnostic : Channel 1                               |\n");