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ECAT_Slave_in_ПЧ2П_c402
0.8
Реализация EtherCAT Slave для CM TMS320F28388D
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#include <stdint.h>#include <stdbool.h>#include "inc/hw_memmap.h"#include "inc/hw_nmi.h"#include "inc/hw_sysctl.h"#include "inc/hw_types.h"#include "inc/hw_wwd.h"#include "debug.h"#include "cpu.h"Макросы | |
| #define | SYSCTL_WD_CHKBITS 0x0028U |
| #define | SYSCTL_WD_ENRSTKEY 0x0055U |
| #define | SYSCTL_WD_RSTKEY 0x00AAU |
| #define | SYSCTL_PERIPH_REG_M 0x001FU |
| #define | SYSCTL_PERIPH_REG_S 0x0000U |
| #define | SYSCTL_PERIPH_BIT_M 0x1F00U |
| #define | SYSCTL_PERIPH_BIT_S 0x0008U |
| #define | SYSCTL_CMNMIFLGCLR_KEY 0x5674U |
| #define | SYSCTL_CMNMIFLGFRC_KEY 0x2732U |
| #define | SYSCTL_CMNMICFG_KEY 0x6789U |
| #define | SYSCTL_CMNMIWDPRD_KEY 0x9238U |
| #define | SYSCTL_CMSYSCTL_KEY 0x5634U |
| #define | SYSCTL_WWD_KEY 0x1234U |
| #define | SYSCTL_ETHERCAT_I2C_LOOPBACK 0x1U |
| #define | SYSCTL_NMI_GLOBAL 0x1U |
| #define | SYSCTL_NMI_NMIINT 0x0001U |
| Non-maskable interrupt. Подробнее... | |
| #define | SYSCTL_NMI_CLOCKFAIL 0x0002U |
| Clock Failure. Подробнее... | |
| #define | SYSCTL_NMI_MEMUNCERR 0x0004U |
| RAM/ROM Uncorrectable error. Подробнее... | |
| #define | SYSCTL_NMI_FLUNCERR 0x0008U |
| Uncorrectable Flash error. Подробнее... | |
| #define | SYSCTL_NMI_MCANUNCERR 0x0010U |
| MCAN Uncorrectable Error. Подробнее... | |
| #define | SYSCTL_NMI_WWDNMI 0x0020U |
| CM Windowed Watchdog. Подробнее... | |
| #define | SYSCTL_NMI_ECATNMI 0x0040U |
| EtherCAT reset out. Подробнее... | |
| #define | SYSCTL_CAUSE_PORESETN 0x00000001U |
| Power-on reset. Подробнее... | |
| #define | SYSCTL_CAUSE_XRSN 0x00000002U |
| External reset pin. Подробнее... | |
| #define | SYSCTL_CAUSE_CPU1WDRSN 0x00000004U |
| CPU1 Watchdog reset. Подробнее... | |
| #define | SYSCTL_CAUSE_CPU1NMIWDRSN 0x00000008U |
| CPU1 NMI WD reset. Подробнее... | |
| #define | SYSCTL_CAUSE_CPU1SYSRSN 0x00000010U |
| CPU1 System reset. Подробнее... | |
| #define | SYSCTL_CAUSE_CPU1SCCRESETN 0x00000020U |
| CPU1 SCCRESETn reset. Подробнее... | |
| #define | SYSCTL_CAUSE_ECAT_RESET_OUT 0x00000040U |
| ECAT Reset. Подробнее... | |
| #define | SYSCTL_CAUSE_CPU1SIMRESET_CPURSN 0x00000080U |
| SIMRESET_CPURSn-CPU1. Подробнее... | |
| #define | SYSCTL_CAUSE_CMRSTCTLRESETREQ 0x00000100U |
| Reset req from CM. Подробнее... | |
| #define | SYSCTL_CAUSE_CMVECTRESETN 0x00010000U |
| CM Vector Reset. Подробнее... | |
| #define | SYSCTL_CAUSE_CMSYSRESETREQ 0x00020000U |
| CM System reset. Подробнее... | |
| #define | SYSCTL_CAUSE_CMNMIWDRSTN 0x00040000U |
| CM NMI WD Reset. Подробнее... | |
| #define | SYSCTL_CAUSE_CMEOLRESETN 0x00080000U |
| Logic reset. Подробнее... | |
| #define | SYSCTL_CMECATCTL_LOCK 0x1U |
| block writes to CM-Ethercat control Reg Подробнее... | |
| #define | CM_CLK_FREQ 125000000U |
| #define | SYSCTL_DELAY |