185 lines
3.7 KiB
C++
185 lines
3.7 KiB
C++
/*!\file
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* \brief Ôàéë ñîäåðæèò îïèñàíèå òèïîâ äëÿ íàáîðà ìîäóëåé îáðàáîòêè ìèêðîñõåìû AD1259.
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*/
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/*
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* AD1259.h
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*
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* Created on: 7 àâã. 2019 ã.
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* Author: user
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*/
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#ifndef SOURCE_DRIVER_CHIPSET_AD1259_H_
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#define SOURCE_DRIVER_CHIPSET_AD1259_H_
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#include "../SerialPortAdapter.hpp"
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namespace driver { namespace chipset { namespace ADS1259 {
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//Àäðåñà ðåãèñòðîâ.
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struct ControlRegistersPairedAcronims {
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enum Acronims {
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CONFIG0 = 0x00,
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CONFIG1 = 0x01,
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CONFIG2 = 0x02,
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OFC0 = 0x03,
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OFC1 = 0x04,
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OFC2 = 0x05,
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FSC0 = 0x06,
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FSC1 = 0x07,
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FSC2 = 0x08
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};
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};
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struct Commands {
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enum {
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WAKEUP = 0x02,
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RESET = 0x06,
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START = 0x08,
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STOP = 0x0A,
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RDATAC = 0x10,
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SDATAC = 0x11
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};
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};
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enum RefBias : unsigned {
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ref_bias_disable,
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ref_bias_enable //Ïî ñáðîñó.
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};
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enum SpiTimeout : unsigned {
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spi_timeout_disable,
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spi_timeout_enable //Ïî ñáðîñó.
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};
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union Config0Reg {
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struct {
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SpiTimeout spi_timeout : 1;
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uint16_t : 1;
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RefBias ref_bias : 1;
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uint16_t : 1;
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uint16_t id : 2;
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uint16_t : 1;
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uint16_t bit7 : 1;
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} bit;
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uint16_t all;
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Config0Reg() : all(0x80) {}
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};
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enum OutOfRange : unsigned {
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out_of_range_disable, //Ïî ñáðîñó.
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out_of_range_enable
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};
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enum Checksum : unsigned {
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checksum_disable, //Ïî ñáðîñó.
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checksum_enable
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};
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enum DigFilterMode : unsigned {
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sinc1_filter_mode, //Ïî ñáðîñó.
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sinc2_filter_mode
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};
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enum RefSelect : unsigned {
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internal_ref, //Ïî ñáðîñó.
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external_ref
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};
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enum StartConvDelay : unsigned {
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nodelay, //Ïî ñáðîñó.
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delay_64_clk,
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delay_128_clk,
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delay_256_clk,
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delay_512_clk,
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delay_1024_clk,
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delay_2048_clk,
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delay_4096_clk
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};
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union Config1Reg {
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struct {
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StartConvDelay start_conv_delay : 3;
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RefSelect ref_select : 1;
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DigFilterMode filter_mode : 1;
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uint16_t : 1;
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Checksum checksum : 1;
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OutOfRange out_of_range_flag : 1;
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} bit;
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uint16_t all;
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Config1Reg() : all(0) {}
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};
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enum DataReadyFlag : unsigned {
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data_ready,
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data_not_ready
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};
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enum ClockSource : unsigned {
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internal_oscillator,
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external_clock
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};
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enum SyncOut : unsigned {
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syncout_disable, //Ïî ñáðîñó.
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syncout_enable
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};
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enum ConvControlMode : unsigned {
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gate_control_mode, //Ïî ñáðîñó.
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pulse_control_mode
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};
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enum DataRate {
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dr_10sps, //Ïî ñáðîñó.
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dr_16sps,
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dr_50sps,
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dr_60sps,
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dr_400sps,
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dr_1200sps,
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dr_3600sps,
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dr_14400sps
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};
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union Config2Reg {
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struct {
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DataRate datarate : 3;
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uint16_t : 1;
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ConvControlMode conv_control_mode : 1;
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SyncOut syncout : 1;
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ClockSource clock_source : 1;
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DataReadyFlag data_ready_flag : 1;
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} bit;
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uint16_t all;
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Config2Reg() : all(0) {}
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};
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//! Ñòðóêòóðà íàñòðàåâàåìûõ ïàðàìåòðîâ ìèêðîñõåìû ADS1259
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struct Parameters {
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typedef uint16_t OptionRegister;
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static const unsigned int allowed_options = 9;
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enum AllowedRegisters {
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CONFIG0_REGISTER,
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CONFIG1_REGISTER,
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CONFIG2_REGISTER,
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OFC0_REGISTER,
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OFC1_REGISTER,
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OFC2_REGISTER,
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FSC0_REGISTER,
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FSC1_REGISTER,
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FSC2_REGISTER,
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};
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OptionRegister option[allowed_options];
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};
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} }}
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#endif /* SOURCE_DRIVER_CHIPSET_AD1259_H_ */
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