1279 lines
44 KiB
C
1279 lines
44 KiB
C
//#############################################################################
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//
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// FILE: pmbus.h
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//
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// TITLE: C28x PMBUS Driver
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//
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//#############################################################################
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// $Copyright:
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// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//#############################################################################
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#ifndef PMBUS_H
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#define PMBUS_H
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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//! \addtogroup pmbus_api PMBus
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//! @{
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//
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//
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// Defines for the API.
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//
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//*****************************************************************************
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#include <stdbool.h>
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#include <stdint.h>
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#include "inc/hw_pmbus.h"
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#include "inc/hw_memmap.h"
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#include "inc/hw_types.h"
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#include "cpu.h"
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#include "debug.h"
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#include "pmbus_common.h"
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#include "hw_reg_inclusive_terminology.h"
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//! Specifies whether to include the CRC8 table in the
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//! library build
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#define PMBUS_INCLUDE_CRC8_TABLE 0x1U
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//*****************************************************************************
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//
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// PCBCCR Commands -> used in PMBus_configControlleer()
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//
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//*****************************************************************************
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//! Enable Process call message
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#define PMBUS_CONTROLLER_ENABLE_PRC_CALL 0x00100000UL
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//! Enable Group command message
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#define PMBUS_CONTROLLER_ENABLE_GRP_CMD 0x00080000UL
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//! Enable PEC byte
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#define PMBUS_CONTROLLER_ENABLE_PEC 0x00040000UL
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//! Enable Extended command
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#define PMBUS_CONTROLLER_ENABLE_EXT_CMD 0x00020000UL
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//! Enable Command word
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#define PMBUS_CONTROLLER_ENABLE_CMD 0x00010000UL
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//! Enable read
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#define PMBUS_CONTROLLER_ENABLE_READ 0x00000001UL
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//*****************************************************************************
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//
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// PMBINTM Commands -> used in PMBus_enableInterrupt() and
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// PMBus_disableInterrupt()
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//
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//*****************************************************************************
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//! Bus Free Interrupt
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#define PMBUS_INT_BUS_FREE 0x00000001UL
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//! Clock Low Time-out Interrupt
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#define PMBUS_INT_CLK_LOW_TIMEOUT 0x00000002UL
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//! Data Ready Interrupt
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#define PMBUS_INT_DATA_READY 0x00000004UL
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//! Data Request Interrupt
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#define PMBUS_INT_DATA_REQUEST 0x00000008UL
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//! Target Address Ready Interrupt
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#define PMBUS_INT_TARGET_ADDR_READY 0x00000010UL
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//! End of Message Interrupt
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#define PMBUS_INT_EOM 0x00000020UL
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//! Alert Detection Interrupt
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#define PMBUS_INT_ALERT 0x00000040UL
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//! Control Detection Interrupt
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#define PMBUS_INT_CONTROL 0x00000080UL
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//! Lost Arbitration Interrupt
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#define PMBUS_INT_LOST_ARB 0x00000100UL
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//! Clock High Detection Interrupt
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#define PMBUS_INT_CLK_HIGH_DETECT 0x00000200UL
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//! all PMBus interrupts
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#define PMBUS_INT_ALL 0x000003FFUL
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//*****************************************************************************
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//
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// PMBSTS Commands -> returned by PMBus_getInterruptStatus()
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//
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//*****************************************************************************
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//! Bus Free Interrupt
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#define PMBUS_INTSRC_BUS_FREE 0x00002000UL
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//! Clock Low Time-out Interrupt
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#define PMBUS_INTSRC_CLK_LOW_TIMEOUT 0x00000100UL
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//! Data Ready Interrupt
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#define PMBUS_INTSRC_DATA_READY 0x00000008UL
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//! Data Request Interrupt
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#define PMBUS_INTSRC_DATA_REQUEST 0x00000010UL
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//! Target Address Ready Interrupt
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#define PMBUS_INTSRC_TARGET_ADDR_READY 0x00000400UL
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//! End of Message Interrupt
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#define PMBUS_INTSRC_EOM 0x00000020UL
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//! Alert Detection Interrupt
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#define PMBUS_INTSRC_ALERT 0x00010000UL
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//! Control Detection Interrupt
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#define PMBUS_INTSRC_CONTROL 0x00020000UL
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//! Lost Arbitration Interrupt
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#define PMBUS_INTSRC_LOST_ARB 0x00004000UL
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//! Clock High Detection Interrupt
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#define PMBUS_INTSRC_CLK_HIGH_DETECT 0x00000200UL
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//*****************************************************************************
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//
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// PMBSC Commands -> They are used in the configWord passed to
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// PMBus_configTarget()
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//
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//*****************************************************************************
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//! Enable manual target ack modes
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#define PMBUS_TARGET_ENABLE_MANUAL_ACK 0x00000080UL
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//! Enable PEC byte processing
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#define PMBUS_TARGET_ENABLE_PEC_PROCESSING 0x00008000UL
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//! Transmit PEC at end of transaction
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#define PMBUS_TARGET_TRANSMIT_PEC 0x00080000UL
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//! Data Request flag generated after
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//! receipt of command code, firmware
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//! required to issue ACK to continue message
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#define PMBUS_TARGET_ENABLE_MANUAL_CMD_ACK 0x00100000UL
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//! any bits cleared in target address mask
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//! make that bit a don't care
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#define PMBUS_TARGET_DISABLE_ADDRESS_MASK 0x0000007FUL
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//! Target will auto acknowledge every
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//! received byte
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#define PMBUS_TARGET_AUTO_ACK_1_BYTES 0x00000000UL
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//! Target will auto acknowledge every
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//! 2 received bytes
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#define PMBUS_TARGET_AUTO_ACK_2_BYTES 0x00200000UL
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//! Target will auto acknowledge every
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//! 3 received bytes
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#define PMBUS_TARGET_AUTO_ACK_3_BYTES 0x00400000UL
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//! Target will auto acknowledge every
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//! 4 received bytes
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#define PMBUS_TARGET_AUTO_ACK_4_BYTES 0x00600000UL
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//*****************************************************************************
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//
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// PMBCTRL Commands
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//
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//*****************************************************************************
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//! Reset control state machines
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#define PMBUS_RESET 0x00000001UL
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//! Enable Target Alert
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#define PMBUS_ENABLE_TARGET_ALERT 0x00000002UL
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//! Set Clock Low Time-out Interrupt
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//! generation on falling edge
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#define PMBUS_SET_BUS_LO_INT_FALLING_EDGE 0x00000004UL
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//! Set Control Interrupt to be
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//! generated on rising edge
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#define PMBUS_SET_CNTL_INT_RISING_EDGE 0x00000020UL
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//! Enable PMBus Current Source A Control
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#define PMBUS_ENABLE_IBIAS_A_EN 0x00040000UL
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//! Enable PMBus Current Source B Control
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#define PMBUS_ENABLE_IBIAS_B_EN 0x00080000UL
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//! Disable Clock Low Time-out
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#define PMBUS_DISABLE_CLK_LOW_TIMEOUT 0x00100000UL
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//! Enable PMBus Target Enable
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#define PMBUS_ENABLE_TARGET_MODE 0x00200000UL
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//! Enable PMBus Controller Enable
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#define PMBUS_ENABLE_CONTROLLER_MODE 0x00400000UL
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//*****************************************************************************
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//
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// PMBUS Module Clock defines
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//
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//*****************************************************************************
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//! Min SYSCLK input to PMBus module
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#define PMBUS_SYS_FREQ_MIN 10000000UL
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//! Max SYSCLK input to PMBus module
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#define PMBUS_SYS_FREQ_MAX 200000000UL
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//! Max module frequency of 20 MHz
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#define PMBUS_MODULE_FREQ_MAX 20000000UL
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//! Min module frequency = min_sys_freq / 32
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#define PMBUS_MODULE_FREQ_MIN (PMBUS_SYS_FREQ_MIN / 32)
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//*****************************************************************************
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//
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//! Clock Mode Descriptor
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//!
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//! Used in PMBus_configBusClock() to set up the bus speed. There are two
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//! possible modes of operation:
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//! -# Standard Mode 100 kHz
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//! -# Fast Mode 400 kHz
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//
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//*****************************************************************************
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typedef enum{
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PMBUS_CLOCKMODE_STANDARD = 0U, //!< Standard mode 100 kHz
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PMBUS_CLOCKMODE_FAST = 1U //!< Fast Mode 400 kHz
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}PMBus_ClockMode;
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//*****************************************************************************
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//
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//! Access Type Descriptor
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//!
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//! Used in PMBus_getCurrentAccessType() to determine if the device, in target
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//! mode, was accessed with read or write enabled.
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//
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//*****************************************************************************
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typedef enum{
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PMBUS_ACCESSTYPE_WRITE = 0U, //!< Target last address for write transaction
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PMBUS_ACCESSTYPE_READ = 1U //!< Target last address for read transaction
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}PMBus_accessType;
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//*****************************************************************************
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//
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//! Interrupt Edge Descriptor
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//!
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//! Used in PMBus_setCtrlIntEdge() and PMBus_setClkLowTimeoutIntEdge() to set
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//! the edge, falling or rising, that triggers an interrupt
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//
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//*****************************************************************************
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typedef enum{
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PMBUS_INTEDGE_FALLING = 0U, //!< Interrupt generated on falling edge
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PMBUS_INTEDGE_RISING = 1U //!< Interrupt generated on rising edge
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}PMBus_intEdge;
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//*****************************************************************************
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//
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// globals
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//
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//*****************************************************************************
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#if PMBUS_INCLUDE_CRC8_TABLE == 0x1U
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//! CRC table for the polynomial x^8+x^2+x^1+1 or 0x7 (File scope only)
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extern const uint16_t PMBus_crc8Table[256U];
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#endif //PMBUS_INCLUDE_CRC8_TABLE == 0x1U
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//*****************************************************************************
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//
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// Prototypes for the APIs.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \internal
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//! Checks a PMBus base address.
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//!
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//! \param base is the base address of the PMBus instance used.
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//!
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//! This function determines if a PMBus module base address is valid.
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//!
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//! \return Returns \b true if the base address is valid and \b false
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//! otherwise.
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//
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//*****************************************************************************
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#ifdef DEBUG
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static inline bool
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PMBus_isBaseValid(uint32_t base)
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{
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return(base == PMBUSA_BASE);
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}
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#endif
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//*****************************************************************************
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//
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//! Disables the PMBus module.
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//!
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//! \param base is the base address of the PMBus instance used.
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//!
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//! This function resets the internal state machine of the PMBus module and
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//! holds it in that state
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void PMBus_disableModule(uint32_t base)
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{
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//
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// Check the arguments.
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//
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ASSERT(PMBus_isBaseValid(base));
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EALLOW;
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HWREG(base + PMBUS_O_PMBCTRL) |= PMBUS_RESET;
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EDIS;
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}
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//*****************************************************************************
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//
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//! Enables the PMBus module.
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//!
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//! \param base is the base address of the PMBus instance used.
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//!
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//! This function enables operation of the PMBus module by removing it from the
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//! reset state
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void PMBus_enableModule(uint32_t base)
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{
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//
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// Check the arguments.
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//
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ASSERT(PMBus_isBaseValid(base));
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EALLOW;
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HWREG(base + PMBUS_O_PMBCTRL) &= ~(uint32_t)PMBUS_RESET;
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EDIS;
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}
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//*****************************************************************************
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//
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//! Enables PMBus interrupt sources.
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//!
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//! \param base is the base address of the PMBus instance used.
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//! \param intFlags is the bit mask of the interrupt sources to be enabled.
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//!
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//! This function enables the indicated PMBus interrupt sources. Only the
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//! sources that are enabled can be reflected to the processor interrupt.
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//! Disabled sources have no effect on the processor.
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//!
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//! The \e intFlags parameter is the logical OR of any of the following:
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//!
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//! - \b PMBUS_INT_BUS_FREE - Bus Free Interrupt
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//! - \b PMBUS_INT_CLK_LOW_TIMEOUT - Clock Low Time-out Interrupt
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//! - \b PMBUS_INT_DATA_READY - Data Ready Interrupt
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//! - \b PMBUS_INT_DATA_REQUEST - Data Request Interrupt
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//! - \b PMBUS_INT_TARGET_ADDR_READY - Target Address Ready Interrupt
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//! - \b PMBUS_INT_EOM - End of Message Interrupt
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//! - \b PMBUS_INT_ALERT - Alert Detection Interrupt
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//! - \b PMBUS_INT_CONTROL - Control Detection Interrupt
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//! - \b PMBUS_INT_LOST_ARB - Lost Arbitration Interrupt
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//! - \b PMBUS_INT_CLK_HIGH_DETECT - Clock High Detection Interrupt
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//! - \b PMBUS_INT_ALL - all PMBus interrupts
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void PMBus_enableInterrupt(uint32_t base, uint32_t intFlags)
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{
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//
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// Check the arguments.
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//
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ASSERT(PMBus_isBaseValid(base));
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EALLOW;
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//
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// Enable the desired basic interrupts, that is, clear their mask bits
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// in PMBINTM
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//
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HWREG(base + PMBUS_O_PMBINTM) &= ~(intFlags & 0x03FFU);
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EDIS;
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}
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//*****************************************************************************
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//
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//! Disables PMBus interrupt sources.
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//!
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//! \param base is the base address of the PMBus instance used.
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//! \param intFlags is the bit mask of the interrupt sources to be disabled.
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//!
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//! This function disables the indicated PMBus interrupt sources. Only
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//! the sources that are enabled can be reflected to the processor interrupt.
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//! Disabled sources have no effect on the processor.
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//!
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//! The \e intFlags parameter has the same definition as the \e intFlags
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//! parameter to PMBus_enableInterrupt().
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void PMBus_disableInterrupt(uint32_t base, uint32_t intFlags)
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{
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//
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// Check the arguments.
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//
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ASSERT(PMBus_isBaseValid(base));
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EALLOW;
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//
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// Disable the desired interrupts
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//
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HWREG(base + PMBUS_O_PMBINTM) |= (intFlags & 0x03FFU);
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EDIS;
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}
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//*****************************************************************************
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//
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//! Indicates whether or not the PMBus bus is busy.
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//!
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//! \param status the value of the status register (PMBUS_O_PMBSTS)
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//!
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//! This function returns an indication of whether or not the PMBus bus is busy
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//!
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//! \note The status register is cleared each time it is read, therefore, it
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//! should be read once at the beginning of an interrupt service routine using
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//! PMBus_getInterruptStatus() and saved to a temporary variable for further
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//! processing.
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//!
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//! \return Returns \b true if the PMBus bus is busy; otherwise, returns
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//! \b false.
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//
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//*****************************************************************************
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static inline bool PMBus_isBusBusy(uint32_t status)
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{
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return(((status & PMBUS_PMBSTS_BUS_FREE) == 0U) ? true : false);
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}
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//*****************************************************************************
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//
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//! Indicates whether or not the PEC is valid
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//!
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//! \param status the value of the status register (PMBUS_O_PMBSTS)
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//!
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//! This function returns an indication of whether or not the received PEC
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//! was valid
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//!
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//! \note The status register is cleared each time it is read, therefore, it
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//! should be read once at the beginning of an interrupt service routine using
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//! PMBus_getStatus() and saved to a temporary variable for further
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//! processing.
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//!
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//! \return Returns \b true if the PEC is valid; otherwise, returns
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//! \b false.
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//
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//*****************************************************************************
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static inline bool PMBus_isPECValid(uint32_t status)
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{
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return(((status & PMBUS_PMBSTS_PEC_VALID) != 0U) ? true : false);
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}
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//*****************************************************************************
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//
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//! Enable I2C mode
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//!
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//! \param base is the base address of the PMBus instance used.
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//!
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//! Set the PMBus module to work in I2C mode
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void PMBus_enableI2CMode(uint32_t base)
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{
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//
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// Locals
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//
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uint32_t interruptState;
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//
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// Check the arguments.
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//
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ASSERT(PMBus_isBaseValid(base));
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EALLOW;
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//
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// Save off the interrupt state and disable them
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//
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interruptState = HWREG(base + PMBUS_O_PMBINTM);
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HWREG(base + PMBUS_O_PMBINTM) = PMBUS_INT_ALL;
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//
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// Set module to I2C mode
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//
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HWREG(base + PMBUS_O_PMBCTRL) |= PMBUS_PMBCTRL_I2CMODE;
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//
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// Restore the interrupt status
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//
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HWREG(base + PMBUS_O_PMBINTM) = interruptState;
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EDIS;
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}
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//*****************************************************************************
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//
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//! Disable I2C mode
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//!
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//! \param base is the base address of the PMBus instance used.
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//!
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//! Set the PMBus module to work in PMBus mode
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void PMBus_disableI2CMode(uint32_t base)
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{
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//
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// Locals
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//
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uint32_t interruptState;
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//
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// Check the arguments.
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|
//
|
|
ASSERT(PMBus_isBaseValid(base));
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|
|
EALLOW;
|
|
|
|
//
|
|
// Save off the interrupt state and disable them
|
|
//
|
|
interruptState = HWREG(base + PMBUS_O_PMBINTM);
|
|
HWREG(base + PMBUS_O_PMBINTM) = PMBUS_INT_ALL;
|
|
|
|
//
|
|
// Set module to PMBUS mode
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCTRL) &= ~(uint32_t)PMBUS_PMBCTRL_I2CMODE;
|
|
|
|
//
|
|
// Restore the interrupt status
|
|
//
|
|
HWREG(base + PMBUS_O_PMBINTM) = interruptState;
|
|
EDIS;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Read the status register
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! \return Contents of the status register.
|
|
//
|
|
//*****************************************************************************
|
|
static inline uint32_t PMBus_getStatus(uint32_t base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
return(HWREG(base + PMBUS_O_PMBSTS));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Acknowledge the transaction by writing to the PMBACK register
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline void PMBus_ackTransaction(uint32_t base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
//
|
|
// Acknowledge
|
|
//
|
|
HWREG(base + PMBUS_O_PMBACK) |= PMBUS_PMBACK_ACK;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Nack the transaction by writing to the PMBACK register
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline void PMBus_nackTransaction(uint32_t base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
//
|
|
// NACK
|
|
//
|
|
HWREG(base + PMBUS_O_PMBACK) &= ~(uint32_t)PMBUS_PMBACK_ACK;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Alert the controller by asserting the ALERT line
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! A target PMBus can alert the controller by pulling the alert line low.
|
|
//! This triggers an Alert Response from the controller`, where the ,controller issues
|
|
//! the \b Alert \b Response \b Address on the bus with a read bit and the
|
|
//! alerting target is required to reply with its address.
|
|
//!
|
|
//! \note The alerting device should be in target mode.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline void PMBus_assertAlertLine(uint32_t base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
EALLOW;
|
|
|
|
//
|
|
//Pull the alert line low
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCTRL) |= PMBUS_PMBCTRL_ALERT_EN;
|
|
|
|
EDIS;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! De-assert the alert line
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline void PMBus_deassertAlertLine(uint32_t base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
EALLOW;
|
|
|
|
//
|
|
//Pull the alert line low
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCTRL) &= ~(uint32_t)PMBUS_PMBCTRL_ALERT_EN;
|
|
|
|
EDIS;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Configure the PMBus operation in Controller Mode.
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param targetAddress address of the Target device
|
|
//! \param byteCount number of bytes transmitted (or read) in the message
|
|
//! (up to 255)
|
|
//! \param configWord can be a combination of the following
|
|
//! -# PMBUS_CONTROLLER_ENABLE_PRC_CALL
|
|
//! -# PMBUS_CONTROLLER_ENABLE_GRP_CMD
|
|
//! -# PMBUS_CONTROLLER_ENABLE_PEC
|
|
//! -# PMBUS_CONTROLLER_ENABLE_EXT_CMD
|
|
//! -# PMBUS_CONTROLLER_ENABLE_CMD
|
|
//! -# PMBUS_CONTROLLER_ENABLE_READ
|
|
//!
|
|
//! Assuming the PMBus module is set to Controller mode this function will
|
|
//! configure the PMBCCR register. It overwrites the contents of the PMBCCR
|
|
//! register.
|
|
//! \note
|
|
//! -# Writing to the PMBCCR register initiates a message on the bus once
|
|
//! the bus is free. In the event of a write the TXBUF must be loaded prior
|
|
//! to configuration, or very quickly after configuration, before the module
|
|
//! starts the bus clock.
|
|
//! -# If the user does not specify an option for example,
|
|
//! PMBUS_CONTROLLER_ENABLE_READ, the code will write a 0 (a write) in its
|
|
//! bit field.
|
|
//! -# setting byteCount to 0U (on a write) triggers a quick command; there
|
|
//! is no need to precede this command with the PMBus_putControllerData()
|
|
//! -# If transmitting with a non-zero byteCount the user must precede this
|
|
//! with the PMBus_putControlllerData(), supplying it with the location of the data
|
|
//! and the number of bytes (<= 4). For block transmissions the user will have
|
|
//! to call PMBus_putControllerData(), PMBus_configController() and then continue
|
|
//! calling PMBus_putControllerData() transmitting 4 (or less for the final
|
|
//! transmit) bytes at a time till all the data bytes are transmitted.
|
|
//! -# If receiving the user must follow up with the PMBus_getData(),
|
|
//! supplying it with the location of an empty buffer and the status byte
|
|
//! -# In cases where the controller must transmit for example, process call,
|
|
//! the user must call PMBus_putControllerData(), then configure the controlller to
|
|
//! transmit the command and two bytes, then call PMBus_getData() to
|
|
//! read two bytes from the target. The controller module need not be reconfigured
|
|
//! between write and read whenever a repeated start is involved in the
|
|
//! transaction
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline void PMBus_configController(uint32_t base, uint16_t targetAddress,
|
|
uint16_t byteCount, uint32_t configWord)
|
|
{
|
|
//
|
|
// Locals
|
|
// Form a bit mask of the bit fields configWord changes
|
|
//
|
|
const uint32_t bitmask = (PMBUS_PMBCCR_RW | PMBUS_PMBCCR_CMD_ENA |
|
|
PMBUS_PMBCCR_EXT_CMD | PMBUS_PMBCCR_PEC_ENA |
|
|
PMBUS_PMBCCR_GRP_CMD | PMBUS_PMBCCR_PRC_CALL);
|
|
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
ASSERT(targetAddress <= 0x7FU);
|
|
ASSERT(byteCount <= 0xFFU);
|
|
|
|
|
|
EALLOW;
|
|
|
|
//
|
|
// Write the user configured bit fields (passed in configWord) as well
|
|
// as target address and message byte counts. Writing to PMBMC triggers
|
|
// activity on the bus, once the bus is free (PMBSTS.BUS_FREE = 1)
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCCR) = ((configWord & bitmask) |
|
|
(((uint32_t)targetAddress << PMBUS_PMBCCR_TARGET_ADDR_S) &
|
|
PMBUS_PMBCCR_TARGET_ADDR_M) |
|
|
(((uint32_t)byteCount << PMBUS_PMBCCR_BYTE_COUNT_S) &
|
|
PMBUS_PMBCCR_BYTE_COUNT_M));
|
|
EDIS;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Get the address that the PMBus module will respond to (in target mode)
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! This function will query the PMBUS_O_PMBHTA register, this
|
|
//! will be the address of the module when used in Target Mode.
|
|
//! \return Address of the PMBus device (in slave mode).
|
|
//
|
|
//*****************************************************************************
|
|
static inline uint16_t PMBus_getOwnAddress(uint32_t base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
return((HWREG(base + PMBUS_O_PMBHTA) & 0xFEU) >> 1U);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Set the current device address
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param address : Address to be configured.
|
|
//!
|
|
//! This function configures the current device address, this
|
|
//! will be the own address of the module.
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline void PMBus_setOwnAddress(uint32_t base, uint16_t Ownaddress)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
ASSERT(Ownaddress <= 0x7FU);
|
|
|
|
|
|
EALLOW;
|
|
|
|
//
|
|
// Write the address to the PMBSC register (bits 6:0)
|
|
//
|
|
HWREG(base + PMBUS_O_PMBTCR)|= Ownaddress;
|
|
|
|
EDIS;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Set the target address
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param address : Target Address to be configured.
|
|
//!
|
|
//! This function configures the current device address, this
|
|
//! will be the target address.
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline void PMBus_setTargetAddress(uint32_t base, uint16_t targetAddress)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
ASSERT(targetAddress <= 0x7FU);
|
|
|
|
EALLOW;
|
|
|
|
//
|
|
// Write the target address to PMBMC register
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCCR) |= (((uint32_t)targetAddress << PMBUS_PMBCCR_TARGET_ADDR_S) &
|
|
PMBUS_PMBCCR_TARGET_ADDR_M);
|
|
EDIS;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Determine the current access (read/write) type
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! This function will query the PMBUS_O_PMBHTA register, to determine if
|
|
//! the current access type was a read or write access. This bit is relevant
|
|
//! only when the PMBus module is addressed as a target.
|
|
//!
|
|
//! \return an enum of the type PMBus_accessType which specifies if the device,
|
|
//! in target mode, was addressed for a read or write operation
|
|
//
|
|
//*****************************************************************************
|
|
static inline PMBus_accessType PMBus_getCurrentAccessType(uint32_t base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
return((PMBus_accessType)(HWREG(base + PMBUS_O_PMBHTA) & 0x01U));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the triggering edge of the Control Interrupt
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param intEdge interrupt to trigger on rising or falling edge
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline void PMBus_setCtrlIntEdge(uint32_t base, PMBus_intEdge intEdge)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
EALLOW;
|
|
|
|
if(intEdge == PMBUS_INTEDGE_FALLING)
|
|
{
|
|
//
|
|
// Clear bit
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCTRL) &=
|
|
~(uint32_t)PMBUS_PMBCTRL_CNTL_INT_EDGE;
|
|
}
|
|
else // PMBUS_INTEDGE_RISING
|
|
{
|
|
//
|
|
// Set bit
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCTRL) |= PMBUS_PMBCTRL_CNTL_INT_EDGE;
|
|
}
|
|
EDIS;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the triggering edge of the Clock Low Time-out Interrupt
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param intEdge interrupt to trigger on rising or falling edge
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
static inline
|
|
void PMBus_setClkLowTimeoutIntEdge(uint32_t base, PMBus_intEdge intEdge)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(PMBus_isBaseValid(base));
|
|
|
|
EALLOW;
|
|
|
|
if(intEdge == PMBUS_INTEDGE_FALLING)
|
|
{
|
|
//
|
|
// Set bit
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCTRL) |= PMBUS_PMBCTRL_BUS_LO_INT_EDGE;
|
|
}
|
|
else // PMBUS_INTEDGE_RISING
|
|
{
|
|
//
|
|
// Clear bit
|
|
//
|
|
HWREG(base + PMBUS_O_PMBCTRL) &=
|
|
~(uint32_t)PMBUS_PMBCTRL_BUS_LO_INT_EDGE;
|
|
}
|
|
|
|
EDIS;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Initializes the PMBus to Target Mode.
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param address Target address
|
|
//! \param mask Target address mask - Used in address detection, the Target
|
|
//! mask enables acknowledgement of multiple device addresses by the Target.
|
|
//! Writing a '0' to a bit within the Target mask enables the corresponding bit
|
|
//! in the Target address to be either '1' or '0' and still allow for a match.
|
|
//! Writing a '0' to all bits in the mask enables the PMBus Interface to
|
|
//! acknowledge any device address. Upon power-up, the controller mask defaults to
|
|
//! 7Fh, indicating the controller will only acknowledge the address programmed
|
|
//! into the Controller Address (Bits 6-0).
|
|
//! Set to PMBUS_DISABLE_TARGET_ADDRESS_MASK if you do not wish to have a mask
|
|
//!
|
|
//! This function sets up the PMBus in target mode and also configures the target
|
|
//! address for the PMBus module
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern
|
|
void PMBus_initTargetMode(uint32_t base, uint16_t address, uint16_t mask);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Configure the PMBus operation in Target Mode.
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param configWord can be a combination of the following
|
|
//! -# PMBUS_CONTROLLER_ENABLE_MANUAL_ACK
|
|
//! -# PMBUS_CONTROLLER_ENABLE_PEC_PROCESSING
|
|
//! -# PMBUS_CONTROLLER_ENABLE_MANUAL_CMD_ACK
|
|
//! -# PMBUS_CONTROLLER_AUTO_ACK_1_BYTES
|
|
//! -# PMBUS_CONTROLLER_AUTO_ACK_2_BYTES
|
|
//! -# PMBUS_CONTROLLER_AUTO_ACK_3_BYTES
|
|
//! -# PMBUS_CONTROLLER_AUTO_ACK_4_BYTES
|
|
//!
|
|
//! Assuming the PMBus module is set to target mode, this function will
|
|
//! configure the PMBSC register. It overwrites the contents of the PMBSC
|
|
//! register, with the exception of the address, target mask, TXPEC and byte
|
|
//! count bit fields.
|
|
//! \note If the user does not specify an option, for example,
|
|
//! PMBUS_TARGET_ENABLE_PEC_PROCESSING, the code will write a 0 (a write) in
|
|
//! its bit field.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void PMBus_configTarget(uint32_t base, uint32_t configWord);
|
|
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the current PMBus interrupt status.
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! This function returns the interrupt status for the PMBus module.
|
|
//!
|
|
//! \return The current interrupt status, as a bit field of
|
|
//! - \b PMBUS_INTSRC_BUS_FREE
|
|
//! - \b PMBUS_INTSRC_CLK_LOW_TIMEOUT
|
|
//! - \b PMBUS_INTSRC_DATA_READY
|
|
//! - \b PMBUS_INTSRC_DATA_REQUEST
|
|
//! - \b PMBUS_INTSRC_TARGET_ADDR_READY
|
|
//! - \b PMBUS_INTSRC_EOM
|
|
//! - \b PMBUS_INTSRC_ALERT
|
|
//! - \b PMBUS_INTSRC_CONTROL
|
|
//! - \b PMBUS_INTSRC_LOST_ARB
|
|
//! - \b PMBUS_INTSRC_CLK_HIGH_DETECT
|
|
//
|
|
//*****************************************************************************
|
|
extern uint32_t PMBus_getInterruptStatus(uint32_t base);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Read the receive buffer (Target or Controller mode)
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param buffer pointer to the message buffer where the received bytes
|
|
//! will be written to
|
|
//! \param status the value of the status register (PMBUS_O_PMBSTS)
|
|
//!
|
|
//! This function can read up to 4 bytes in the receive buffer.
|
|
//! \note
|
|
//! -# The status register is cleared each time it is read, therefore, it
|
|
//! should be read once at the beginning of an interrupt service routine using
|
|
//! PMBus_getStatus() and saved to a temporary variable for further
|
|
//! processing.
|
|
//!
|
|
//! -# The buffer should be at least 4 words long; anything smaller will
|
|
//! lead to the possibility of memory overrun when a transaction of 4 bytes
|
|
//! happens.
|
|
//!
|
|
//! \return Returns the number of byte(s) received by the PMBus in the
|
|
//! array pointed to by buffer.
|
|
//
|
|
//*****************************************************************************
|
|
extern uint16_t
|
|
PMBus_getData(uint32_t base, uint16_t *buffer, uint32_t status);
|
|
|
|
#define PMBus_getControllerData PMBus_getData
|
|
#define PMBus_getTargetData PMBus_getData
|
|
//*****************************************************************************
|
|
//
|
|
//! write to the transmit buffer (Target mode)
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param buffer pointer to the message buffer where the transmit bytes
|
|
//! are stored
|
|
//! \param nBytes number of transmit bytes, up to 4
|
|
//! \param txPEC 1 transmit PEC at end of message, 0 no PEC
|
|
//!
|
|
//! This function can write up to 4 bytes in the transmit buffer.
|
|
//!
|
|
//! \note
|
|
//! -# The user must check the UNIT_BUSY bit before attempting a transmission.
|
|
//! -# The buffer should be at least 4 words long; anything smaller will
|
|
//! lead to the possibility of memory overrun when a transaction of 4 bytes
|
|
//! happens.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void
|
|
PMBus_putTargetData(uint32_t base, uint16_t *buffer, uint16_t nBytes,
|
|
bool txPEC);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Manual acknowledgement of the target address
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param address address of the target
|
|
//! \param status the value of the status register (PMBUS_O_PMBSTS)
|
|
//! \param buffer pointer to a buffer to store the received data
|
|
//!//! This function will read the address that was put on the bus, compare it
|
|
//! with address passed to this function and then acknowledge on a match (or
|
|
//! nack on mismatch). For this function to work, TARGET_ADDR_READY bit in
|
|
//! PBINTM must be enabled. This function checks the TARGET_ADDR_READY bit in
|
|
//! the status register before acknowledging so it would be preferable to use
|
|
//! this function in an interrupt handler that responds to the TARGET_ADDR_READY
|
|
//! interrupt.
|
|
//!
|
|
//! \note
|
|
//! -# The status register is cleared each time it is read, therefore, it
|
|
//! should be read once at the beginning of an interrupt service routine using
|
|
//! PMBus_getStatus() and saved to a temporary variable for further
|
|
//! processing.
|
|
//! -# The buffer should be at least 4 words long; anything smaller will
|
|
//! lead to the possibility of memory overrun when a transaction of 4 bytes
|
|
//! happens.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void PMBus_ackAddress(uint32_t base, uint32_t address, uint32_t status,
|
|
uint16_t *buffer);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Manual acknowledgement of a command
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param command command to manually acknowledge - it can be any of the
|
|
//! commands listed in this header file. All commands have the common
|
|
//! prefix \b PMBUS_CMD.
|
|
//! \param status contents of the status register PMBUS_O_PMBSTS
|
|
//! \param buffer pointer to a buffer to store the received data
|
|
//!
|
|
//! This function will read the command that was put on the bus, compare it
|
|
//! with command passed to this function and then acknowledge on a match (or
|
|
//! nack on mismatch). For this function to work, DATA_READY bit in PBINTM
|
|
//! must be enabled. This function checks the DATA_READY bit in the status
|
|
//! register before acknowledging so it would be preferable to use this
|
|
//! function in an interrupt handler that responds to the DATA_READY interrupt.
|
|
//!
|
|
//! \note
|
|
//! -# The status register is cleared each time it is read, therefore, it
|
|
//! should be read once at the beginning of an interrupt service routine using
|
|
//! PMBus_getStatus() and saved to a temporary variable for further
|
|
//! processing.
|
|
//! -# The buffer should be at least 4 words long; anything smaller will
|
|
//! lead to the possibility of memory overrun when a transaction of 4 bytes
|
|
//! happens.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void PMBus_ackCommand(uint32_t base, uint32_t command, uint32_t status,
|
|
uint16_t *buffer);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Generate a CRC table at run time
|
|
//!
|
|
//! \param crcTable points to the CRC8 Table (must be size 256)
|
|
//!
|
|
//! This function generates a CRC lookup table to run a CRC on the
|
|
//! received data. The table is generated from the polynomial
|
|
//! x^8 + x^2 + x^1 + 1 (0x7 - leading 1 is implicit)
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void PMBus_generateCRCTable(uint16_t *crcTable);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Run a CRC on the received data and check against the
|
|
//! received PEC to validate the integrity of the data
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param buffer points to the received message
|
|
//! \param crcTable points to the CRC8 Table
|
|
//! \param byteCount size of the message, does not include the PEC byte
|
|
//! \param pec is the received PEC to check against
|
|
//!
|
|
//! This function uses a CRC lookup table to run a CRC on the
|
|
//! received data. The table was generated from the polynomial
|
|
//! x^8 + x^2 + x^1 + 1 (0x7 - leading 1 is implicit)
|
|
//!
|
|
//! \note The buffer should be at least 4 words long; anything smaller will
|
|
//! lead to the possibility of memory overrun when a transaction of 4 bytes
|
|
//! happens.
|
|
//!
|
|
//! \return \b true if the calculated CRC is equal to the PEC, \b false
|
|
//! otherwise.
|
|
//
|
|
//*****************************************************************************
|
|
extern bool PMBus_verifyPEC(uint32_t base, uint16_t *buffer,
|
|
const uint16_t *crcTable, uint16_t byteCount, uint16_t pec);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Initializes the PMBus to Controller Mode.
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//!
|
|
//! This function sets up the PMBus in controller mode.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void PMBus_initControllerMode(uint32_t base);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! write to the transmit buffer (Controller mode)
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param buffer pointer to the message buffer where the transmit bytes
|
|
//! are stored
|
|
//! \param nBytes number of transmit bytes, up to 255
|
|
//!
|
|
//! This function can write up to 255 bytes in the transmit buffer.
|
|
//!
|
|
//! \note
|
|
//! -# The user must check the UNIT_BUSY bit before attempting the
|
|
//! first transmission.
|
|
//! -# The buffer should be at least 4 words long; anything smaller will
|
|
//! lead to the possibility of memory overrun when a transaction of 4 bytes
|
|
//! happens.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void
|
|
PMBus_putControllerData(uint32_t base, uint16_t *buffer, uint16_t nBytes);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Configure the PMBus module clock
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param moduleFrequency desired module frequency; can range from
|
|
//! PMBUS_MODULE_FREQ_MIN Hz to PMBUS_MODULE_FREQ_MAX Hz. Please input the
|
|
//! frequency in Hz, for example, 312500 for 312.4 kHz
|
|
//! \param sysFrequency Frequency of the system clock (input to PMBus). The
|
|
//! values may range anywhere from PMBUS_SYS_FREQ_MIN Hz to PMBUS_SYS_FREQ_MAX
|
|
//! Hz. Please input the frequency in Hz, for example, 100000000 for 100 MHz.
|
|
//!
|
|
//! The frequency to the PMBus module may not exceed PMBUS_MODULE_FREQ_MAX Hz,
|
|
//! the appropriate clock divider is chosen to bring the module clock to the
|
|
//! desired frequency - this value is then returned by the function.
|
|
//! In the event that the desired bus frequency is unattainable, the clock
|
|
//! divider is set to the maximum possible value
|
|
//!
|
|
//! \return module frequency calculated from the system frequency and clock
|
|
//! divider.
|
|
//
|
|
//*****************************************************************************
|
|
extern uint32_t
|
|
PMBus_configModuleClock(uint32_t base, uint32_t moduleFrequency,
|
|
uint32_t sysFrequency);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Configure the bus clock by overriding the default settings
|
|
//!
|
|
//! \param base is the base address of the PMBus instance used.
|
|
//! \param mode is the operating mode for the PMBus, can be
|
|
//! - Standard Mode
|
|
//! - Fast Mode
|
|
//! \param moduleFrequency desired module frequency; can range from
|
|
//! PMBUS_MODULE_FREQ_MIN Hz to PMBUS_MODULE_FREQ_MAX Hz. Please input the
|
|
//! frequency in Hz, for example, 312500 for 312.4 kHz.
|
|
//!
|
|
//! The frequency to the PMBus module may not exceed PMBUS_MODULE_FREQ_MAX Hz.
|
|
//!
|
|
//! \note
|
|
//! -# The module comes out of reset with preprogrammed values that allow
|
|
//! it to work in standard mode with a module clock of 10MHz. The module clock
|
|
//! is set to 10MHz at power cycle, therefore, the user does not have to call
|
|
//! this function unless they wish to change the operating frequency of the
|
|
//! module clock from the default 10 MHz.
|
|
//!
|
|
//! \return \b true for successful override, \b false on failure.
|
|
//
|
|
//*****************************************************************************
|
|
extern bool
|
|
PMBus_configBusClock(uint32_t base, PMBus_ClockMode mode,
|
|
uint32_t moduleFrequency);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Close the Doxygen group.
|
|
//! @}
|
|
//
|
|
// Mark the end of the C bindings section for C++ compilers.
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif // PMBUS_H
|