seklyuts/MotorControlModuleSDFM_TMS320F28388D
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases 4 Wiki Activity

исправил I2caRegs.I2CFFRX.bit.RXFFINTCLR = 0; в сравнении

Browse Source
This commit is contained in:
seklyuts 2024-03-29 16:46:44 +03:00
parent 98b3c65675
commit f858d0f702
1 changed files with 5 additions and 61 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

66
Projects/EFC_IPC_Server_C28/src/Peripherals/i2c_init.c
View File

@ -127,10 +127,6 @@ uint16_t j = 0;
// //
uint16_t I2CWrite(uint16_t slaveAddr, uint16_t MemAdr, uint16_t byteCount, bool sendStopCondition, uint16_t * I2C_TXdata) uint16_t I2CWrite(uint16_t slaveAddr, uint16_t MemAdr, uint16_t byteCount, bool sendStopCondition, uint16_t * I2C_TXdata)
{ {
//
// Locals
//
uint16_t index = 0; uint16_t index = 0;
I2caRegs.I2CFFRX.bit.RXFFRST = 0; I2caRegs.I2CFFRX.bit.RXFFRST = 0;
@ -148,42 +144,22 @@ uint16_t I2CWrite(uint16_t slaveAddr, uint16_t MemAdr, uint16_t byteCount, bool
return 1; return 1;
} }
//
// Configure slave address
//
I2caRegs.I2CSAR.all = slaveAddr; // Slave address I2caRegs.I2CSAR.all = slaveAddr; // Slave address
//
// Configure I2C as Master Transmitter
//
I2caRegs.I2CMDR.bit.MST = 0x1; I2caRegs.I2CMDR.bit.MST = 0x1;
I2caRegs.I2CMDR.bit.TRX = 0x1; I2caRegs.I2CMDR.bit.TRX = 0x1;
//
//Set Data Count
//
I2caRegs.I2CFFTX.bit.TXFFINTCLR = 1; I2caRegs.I2CFFTX.bit.TXFFINTCLR = 1;
I2caRegs.I2CCNT = byteCount+1; I2caRegs.I2CCNT = byteCount+1;
I2caRegs.I2CMDR.bit.NACKMOD = 0x0; I2caRegs.I2CMDR.bit.NACKMOD = 0x0;
I2caRegs.I2CDXR.all = MemAdr ; I2caRegs.I2CDXR.all = MemAdr ;
//
//transmit the bytes
//
for(index=0; index < byteCount; index++) for(index=0; index < byteCount; index++)
{ {
I2caRegs.I2CDXR.all= I2C_TXdata[index]; I2caRegs.I2CDXR.all= I2C_TXdata[index];
} }
//
// send Start condition
//
I2caRegs.I2CMDR.bit.STT = 0x1; I2caRegs.I2CMDR.bit.STT = 0x1;
//
//wait till byte is sent
//
TimerTimeouts = 0; TimerTimeouts = 0;
while((I2caRegs.I2CFFTX.bit.TXFFST > 0)&&(TimerTimeouts < TIME_OVER*(byteCount+1))); while((I2caRegs.I2CFFTX.bit.TXFFST > 0)&&(TimerTimeouts < TIME_OVER*(byteCount+1)));
if(TimerTimeouts >= TIME_OVER) if(TimerTimeouts >= TIME_OVER)
@ -226,22 +202,12 @@ uint16_t ttest=0;
uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, uint16_t * I2C_RXdata) uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, uint16_t * I2C_RXdata)
{ {
I2caRegs.I2CMDR.bit.NACKMOD = 0x0; I2caRegs.I2CMDR.bit.NACKMOD = 0x0;
//
// Configure slave address
//
I2caRegs.I2CSAR.all = slaveAddr; I2caRegs.I2CSAR.all = slaveAddr;
//
// Configure I2C in Master Receiver mode
//
I2caRegs.I2CMDR.bit.MST = 0x1; I2caRegs.I2CMDR.bit.MST = 0x1;
I2caRegs.I2CMDR.bit.TRX = 0x0; I2caRegs.I2CMDR.bit.TRX = 0x0;
uint16_t count = 0; uint16_t count = 0;
I2caRegs.I2CFFRX.bit.RXFFINTCLR = 0; I2caRegs.I2CFFRX.bit.RXFFINTCLR = 0;
I2caRegs.I2CCNT = byteCount; I2caRegs.I2CCNT = byteCount;
I2caRegs.I2CMDR.bit.STT = 0x1; I2caRegs.I2CMDR.bit.STT = 0x1;
TimerTimeouts = 0; TimerTimeouts = 0;
@ -259,14 +225,6 @@ uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition,
RXdata = I2C_RXdata[count] = I2caRegs.I2CDRR.all; RXdata = I2C_RXdata[count] = I2caRegs.I2CDRR.all;
} }
// TimerTimeouts = 0;
// while((I2caRegs.I2CSTR.bit.NACK == 0x1)&&(TimerTimeouts < TIME_OVER));
// if(TimerTimeouts >= TIME_OVER)
// {
// ErrI2c4++;
// return 1;
// }
I2caRegs.I2CMDR.bit.NACKMOD = 0x1; I2caRegs.I2CMDR.bit.NACKMOD = 0x1;
TimerTimeouts = 0; TimerTimeouts = 0;
@ -281,33 +239,19 @@ uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition,
return 0; return 0;
} }
uint16_t I2CVerify(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, uint16_t * I2C_Vfdata) uint16_t I2CVerify(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, uint16_t * I2C_Vfdata)
{ {
uint16_t VerErr = 0; uint16_t VerErr = 0;
I2caRegs.I2CMDR.bit.NACKMOD = 0x0;
//
// Configure slave address
//
I2caRegs.I2CSAR.all = slaveAddr;
// I2caRegs.I2CMDR.bit.NACKMOD = 0x0;
// Configure I2C in Master Receiver mode I2caRegs.I2CSAR.all = slaveAddr;
//
I2caRegs.I2CMDR.bit.MST = 0x1; I2caRegs.I2CMDR.bit.MST = 0x1;
I2caRegs.I2CMDR.bit.TRX = 0x0; I2caRegs.I2CMDR.bit.TRX = 0x0;
uint16_t count = 0; uint16_t count = 0;
I2caRegs.I2CFFRX.bit.RXFFINTCLR = 0;
I2caRegs.I2CCNT = byteCount; I2caRegs.I2CCNT = byteCount;
I2caRegs.I2CMDR.bit.STT = 0x1; I2caRegs.I2CMDR.bit.STT = 0x1;
//
// Read the received data into RX buffer
//
TimerTimeouts = 0; TimerTimeouts = 0;
while((count < (byteCount))&&(TimerTimeouts < TIME_OVER)) while((count < (byteCount))&&(TimerTimeouts < TIME_OVER))
{ {