Драйвера записи в SPI по секторам и страницам с проверками
This commit is contained in:
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90f626ebb1
commit
b2dd3b785c
@ -7,6 +7,8 @@
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#include "f28x_project.h"
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#include "f28x_project.h"
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#include "spi_init.h"
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#include "spi_init.h"
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#include "BL25CM1A.h"
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#define WREN 0b00000110 //Enable Write Operations
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#define WREN 0b00000110 //Enable Write Operations
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#define WRDI 0b00000100 //Disable Write Operations
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#define WRDI 0b00000100 //Disable Write Operations
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#define RDSR 0b00000101 //Read Status Register
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#define RDSR 0b00000101 //Read Status Register
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@ -47,17 +49,18 @@ void Bl25cm1a_write(void)
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rdata2[1] = SpiRegs.SPIRXBUF;
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rdata2[1] = SpiRegs.SPIRXBUF;
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}
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}
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#define quant 8
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#define FIFO_SIZE 8
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void Bl25cm1a_read_data(uint32_t Addr)
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void Bl25cm1a_read_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte)
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{
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{
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volatile uint16_t empty, i, j;
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volatile uint16_t empty, i, j;
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transmitData(READ);
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transmitData(READ);
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transmitData(Addr>>16);
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transmitData(Addr>>16);
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transmitData(Addr>>8);
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transmitData(Addr>>8);
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transmitData(Addr);
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transmitData(Addr);
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for(i = 0; i<quant; i++) transmitData(0xFF);
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for(i = 0; i<num_byte; i++) transmitData(0xFF);
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while(SpiRegs.SPIFFRX.bit.RXFFST != (quant+4))
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while(SpiRegs.SPIFFRX.bit.RXFFST != (num_byte+4))
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{
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{
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}
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}
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@ -65,21 +68,21 @@ void Bl25cm1a_read_data(uint32_t Addr)
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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for(j = 0; j<quant; j++)
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for(j = 0; j<num_byte; j++)
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{
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{
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rdata2[j] = SpiRegs.SPIRXBUF;
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read_data[j] = SpiRegs.SPIRXBUF;
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}
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}
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}
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}
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void Bl25cm1a_write_data(uint32_t Addr)
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void Bl25cm1a_write_8_bytes(uint32_t Addr, char * write_data, uint16_t num_byte)
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{
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{
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volatile uint16_t empty, i, j;
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volatile uint16_t empty, i, j;
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transmitData(WRITE);
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transmitData(WRITE);
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transmitData(Addr>>16);
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transmitData(Addr>>16);
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transmitData(Addr>>8);
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transmitData(Addr>>8);
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transmitData(Addr);
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transmitData(Addr);
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for(i = 0; i<quant; i++) transmitData(rdata2[i]);
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for(i = 0; i<num_byte; i++) transmitData(rdata2[i]);
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while(SpiRegs.SPIFFRX.bit.RXFFST != (quant+4))
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while(SpiRegs.SPIFFRX.bit.RXFFST != (num_byte+4))
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{
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{
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}
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}
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@ -87,8 +90,98 @@ void Bl25cm1a_write_data(uint32_t Addr)
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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for(j = 0; j<quant; j++)
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for(j = 0; j<num_byte; j++)
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{
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{
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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}
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}
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}
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}
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uint16_t Bl25cm1a_verify_8_bytes(uint32_t Addr, char * verify_data, uint16_t num_byte)
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{
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volatile uint16_t empty, i, j;
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transmitData(READ);
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transmitData(Addr>>16);
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transmitData(Addr>>8);
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transmitData(Addr);
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for(i = 0; i<FIFO_SIZE; i++) transmitData(0xFF);
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while(SpiRegs.SPIFFRX.bit.RXFFST != (FIFO_SIZE+4))
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{
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}
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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for(j = 0; j<FIFO_SIZE; j++)
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{
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if(verify_data[j] != SpiRegs.SPIRXBUF) return 1;
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}
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return 0;
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}
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void Bl25cm1a_read_data(uint32_t Addr, uint16_t quant, char * read_data)
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{
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uint32_t i=0;
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char * addr_read_data = read_data;
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if(quant > 8)
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{
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for(i = 0; i < (quant-8); i += 8)
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{
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Bl25cm1a_read_8_bytes(Addr+i, addr_read_data, 8);
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addr_read_data += 8;
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}
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}
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if(i < quant) Bl25cm1a_read_8_bytes(Addr+i, addr_read_data, quant - i);
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}
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uint16_t Bl25cm1a_verify_data(uint32_t Addr, uint16_t quant, char * verify_data)
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{
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uint32_t i=0;
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char * addr_read_data = verify_data;
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if(quant > 8)
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{
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for(i = 0; i < (quant-8); i += 8)
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{
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if(Bl25cm1a_verify_8_bytes(Addr+i, addr_read_data, 8)) return 1;
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addr_read_data += 8;
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}
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}
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if(i < quant) if(Bl25cm1a_verify_8_bytes(Addr+i, addr_read_data, quant - i)) return 1;
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return 0;
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}
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void Bl25cm1a_write_1_page(uint32_t Addr, uint16_t quant, char * write_data)
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{
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uint32_t i=0;
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char * addr_write_data = write_data;
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if(quant > 8)
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{
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for(i = 0; i < (quant-8); i += 8)
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{
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Bl25cm1a_write_8_bytes(Addr+i, addr_write_data, 8);
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addr_write_data += 8;
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}
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}
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if(i < quant) Bl25cm1a_write_8_bytes(Addr+i, addr_write_data, quant - i);
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}
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void Bl25cm1a_write_data(uint32_t Addr, uint16_t quant, char * write_data)
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{
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char * addr_write_data = write_data;
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uint16_t page_quant = 0;
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while( (Addr&0xFF)+quant > BL25CM1A0_PAGE) //åñëè äàííûå âûõîäÿò çà ãðàíèöó òåêóùåé ñòðàíèöû
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{
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page_quant = BL25CM1A0_PAGE - (Addr&0xFF); //âû÷èñëÿåì êîë-âî äàííûõ äî êîíöà òåêóùåé ñòðàíèöû
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Bl25cm1a_write_1_page(Addr, page_quant, addr_write_data); //çàïèñûâàåì ýòè äàííûå íà òåêóùóþ ñòðàíèöó
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Addr += page_quant; //ïåðåëèñòûâàåì ñòðàíèöó âíåøíåé ïàìÿòè
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addr_write_data += page_quant; //øàãàåì íà ñëåäóþùèå íåçàïèñàííûå äàííûå â áóôåðå
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quant -= page_quant; //óìåíüøàåì êîë-âî äàííûõ íà âåëè÷èíó êîòîðóþ óæå çàïèñàëè
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}
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if(quant > 0) Bl25cm1a_write_1_page(Addr, quant, addr_write_data); //åñëè äàííûå äëÿ çàïèñè îñòàëèñü, òî çàïèñûâàåì èõ
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}
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@ -8,11 +8,12 @@
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#ifndef SRC_BL25CM1A_H_
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#ifndef SRC_BL25CM1A_H_
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#define SRC_BL25CM1A_H_
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#define SRC_BL25CM1A_H_
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#define BL25CM1A0_SIZE 0x10000 //16 bit lenght
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#define BL25CM1A0_SIZE 0x10000 //16 bit lenght
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#define BL25CM1A0_PAGE 0x100
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void Bl25cm1a_en(void);
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void Bl25cm1a_en(void);
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void Bl25cm1a_write(void);
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void Bl25cm1a_write(void);
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void Bl25cm1a_write_data(uint32_t Addr);
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void Bl25cm1a_write_data(uint32_t Addr, uint16_t quant, char * write_data);
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void Bl25cm1a_read_data(uint32_t Addr);
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void Bl25cm1a_read_data(uint32_t Addr, uint16_t quant, char * read_data);
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uint16_t Bl25cm1a_verify_data(uint32_t Addr, uint16_t quant, char * verify_data);
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#endif /* SRC_BL25CM1A_H_ */
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#endif /* SRC_BL25CM1A_H_ */
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@ -57,11 +57,11 @@ void ExtEEPROM_run(void)
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break;
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break;
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case 3:
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case 3:
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GD25Q16ETIGR_en();
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GD25Q16ETIGR_en();
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GD25Q16ETIGR_write_data(SpiAdr);
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//GD25Q16ETIGR_write_data(SpiAdr);
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sendNowSPIGD25 = 0;
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sendNowSPIGD25 = 0;
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break;
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break;
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case 4:
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case 4:
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GD25Q16ETIGR_read_data(SpiAdr);
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//GD25Q16ETIGR_read_data(SpiAdr);
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sendNowSPIGD25 = 0;
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sendNowSPIGD25 = 0;
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break;
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break;
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case 5:
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case 5:
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@ -83,11 +83,11 @@ void ExtEEPROM_run(void)
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break;
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break;
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case 3:
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case 3:
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Bl25cm1a_en();
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Bl25cm1a_en();
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Bl25cm1a_write_data(SpiAdr);
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//Bl25cm1a_write_data(SpiAdr);
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sendNowSPIBL25 = 0;
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sendNowSPIBL25 = 0;
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break;
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break;
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case 4:
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case 4:
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Bl25cm1a_read_data(SpiAdr);
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//Bl25cm1a_read_data(SpiAdr);
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sendNowSPIBL25 = 0;
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sendNowSPIBL25 = 0;
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break;
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break;
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case 5:
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case 5:
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@ -7,6 +7,8 @@
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#include "f28x_project.h"
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#include "f28x_project.h"
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#include "spi_init.h"
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#include "spi_init.h"
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#include "GD25Q16ETIGR.h"
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//max adr 0x1FFFFF (2097152 bytes = 2048 Kbytes = 2 Mbyte)
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//max adr 0x1FFFFF (2097152 bytes = 2048 Kbytes = 2 Mbyte)
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#define WriteEnable 0x06
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#define WriteEnable 0x06
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#define WriteDisable 0x04
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#define WriteDisable 0x04
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@ -50,51 +52,141 @@ void GD25Q16ETIGR_write(void)
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rdata1[1] = SpiRegs.SPIRXBUF;
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rdata1[1] = SpiRegs.SPIRXBUF;
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}
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}
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#define quant 8
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#define FIFO_SIZE 8
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void GD25Q16ETIGR_read_data(uint32_t Addr)
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void GD25Q16ETIGR_read_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte)//÷òåíèå äî 8 áàéò
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{
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{
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volatile uint16_t empty, i, j;
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volatile uint16_t empty, i, j;
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transmitData(ReadData);
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transmitData(ReadData);
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transmitData(Addr>>16);
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transmitData(Addr>>16);
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transmitData(Addr>>8);
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transmitData(Addr>>8);
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transmitData(Addr);
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transmitData(Addr);
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for(i = 0; i<quant; i++) transmitData(0xFF);
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for(i = 0; i<num_byte; i++) transmitData(0xFF);
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while(SpiRegs.SPIFFRX.bit.RXFFST != (quant+4))
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while(SpiRegs.SPIFFRX.bit.RXFFST != (num_byte+4))
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{
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{
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}
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}
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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for(j = 0; j<quant; j++)
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for(j = 0; j<num_byte; j++)
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{
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{
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rdata1[j] = SpiRegs.SPIRXBUF;
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read_data[j] = SpiRegs.SPIRXBUF;
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}
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}
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}
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uint16_t GD25Q16ETIGR_verify_8_bytes(uint32_t Addr, char * verify_data, uint16_t num_byte)//÷òåíèå è ïðîâåðêà äî 8 áàéò
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{
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volatile uint16_t empty, i, j;
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transmitData(ReadData);
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transmitData(Addr>>16);
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transmitData(Addr>>8);
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transmitData(Addr);
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for(i = 0; i<FIFO_SIZE; i++) transmitData(0xFF);
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while(SpiRegs.SPIFFRX.bit.RXFFST != (FIFO_SIZE+4))
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{
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}
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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for(j = 0; j<FIFO_SIZE; j++)
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{
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if(verify_data[j] != SpiRegs.SPIRXBUF) return 1;
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}
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return 0;
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}
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void GD25Q16ETIGR_write_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte)//çàïèñü äî 8 áàéò
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{
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volatile uint16_t empty, i, j;
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transmitData(PageProgram);
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transmitData(Addr>>16);
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transmitData(Addr>>8);
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transmitData(Addr);
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for(i = 0; i<num_byte; i++) transmitData(rdata1[i]);
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while(SpiRegs.SPIFFRX.bit.RXFFST != (num_byte+4))
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{
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}
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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empty = SpiRegs.SPIRXBUF;
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for(j = 0; j<num_byte; j++)
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{
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empty = SpiRegs.SPIRXBUF;
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}
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}
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void GD25Q16ETIGR_read_data(uint32_t Addr, uint16_t quant, char * read_data)
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{
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uint32_t i=0;
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char * addr_read_data = read_data;
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if(quant > 8)
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{
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for(i = 0; i < (quant-8); i += 8)
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{
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GD25Q16ETIGR_read_8_bytes(Addr+i, addr_read_data, 8);
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addr_read_data += 8;
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}
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}
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if(i < quant) GD25Q16ETIGR_read_8_bytes(Addr+i, addr_read_data, quant - i);
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}
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}
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void GD25Q16ETIGR_write_data(uint32_t Addr)
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void GD25Q16ETIGR_write_1_page(uint32_t Addr, uint16_t quant, char * write_data) // çàïèñü âíóòðè îäíîé ñòðàíèöû
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{
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{
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volatile uint16_t empty, i, j;
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uint32_t i=0;
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transmitData(PageProgram);
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char * addr_write_data = write_data;
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transmitData(Addr>>16);
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transmitData(Addr>>8);
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transmitData(Addr);
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for(i = 0; i<quant; i++) transmitData(rdata1[i]);
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|
||||||
while(SpiRegs.SPIFFRX.bit.RXFFST != (quant+4))
|
|
||||||
{
|
|
||||||
|
|
||||||
}
|
if(quant > 8)
|
||||||
empty = SpiRegs.SPIRXBUF;
|
{
|
||||||
empty = SpiRegs.SPIRXBUF;
|
for(i = 0; i < (quant-8); i += 8)
|
||||||
empty = SpiRegs.SPIRXBUF;
|
{
|
||||||
empty = SpiRegs.SPIRXBUF;
|
GD25Q16ETIGR_write_8_bytes(Addr+i, addr_write_data, 8);
|
||||||
for(j = 0; j<quant; j++)
|
addr_write_data += 8;
|
||||||
{
|
}
|
||||||
empty = SpiRegs.SPIRXBUF;
|
}
|
||||||
}
|
if(i < quant) GD25Q16ETIGR_write_8_bytes(Addr+i, addr_write_data, quant - i);
|
||||||
|
}
|
||||||
|
|
||||||
|
void GD25Q16ETIGR_write_data(uint32_t Addr, uint16_t quant, char * write_data)
|
||||||
|
{
|
||||||
|
char * addr_write_data = write_data;
|
||||||
|
uint16_t page_quant = 0;
|
||||||
|
|
||||||
|
while( (Addr&0xFF)+quant > GD25Q16E_PAGE) //åñëè äàííûå âûõîäÿò çà ãðàíèöó òåêóùåé ñòðàíèöû
|
||||||
|
{
|
||||||
|
page_quant = GD25Q16E_PAGE - (Addr&0xFF); //âû÷èñëÿåì êîë-âî äàííûõ äî êîíöà òåêóùåé ñòðàíèöû
|
||||||
|
GD25Q16ETIGR_write_1_page(Addr, page_quant, addr_write_data); //çàïèñûâàåì ýòè äàííûå íà òåêóùóþ ñòðàíèöó
|
||||||
|
Addr += page_quant; //ïåðåëèñòûâàåì ñòðàíèöó âíåøíåé ïàìÿòè
|
||||||
|
addr_write_data += page_quant; //øàãàåì íà ñëåäóþùèå íåçàïèñàííûå äàííûå
|
||||||
|
quant -= page_quant; //óìåíüøàåì êîë-âî äàííûõ íà âåëè÷èíó êîòîðóþ óæå çàïèñàëè
|
||||||
|
}
|
||||||
|
if(quant > 0) GD25Q16ETIGR_write_1_page(Addr, quant, addr_write_data); //åñëè äàííûå äëÿ çàïèñè îñòàëèñü, òî çàïèñûâàåì èõ
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
uint16_t GD25Q16ETIGR_verify_data(uint32_t Addr, uint16_t quant, char * verify_data)
|
||||||
|
{
|
||||||
|
uint32_t i=0;
|
||||||
|
char * addr_read_data = verify_data;
|
||||||
|
|
||||||
|
if(quant > 8) //åñëè êîë-âî áàéò áîëüøå 8, òî ÷èòàåì êóñêàìè ïî 8
|
||||||
|
{
|
||||||
|
for(i = 0; i < (quant-8); i += 8) //åñëè îñòàëîñü áîëüøå âîñüìè ÷èòàåì êóñêàìè äàëüøå
|
||||||
|
{
|
||||||
|
if(GD25Q16ETIGR_verify_8_bytes(Addr+i, addr_read_data, 8)) return 1;
|
||||||
|
addr_read_data += 8;
|
||||||
|
}
|
||||||
|
} //òóò îñòàíåòñÿ ìåíüøå 8ìè
|
||||||
|
if(i < quant) if(GD25Q16ETIGR_verify_8_bytes(Addr+i, addr_read_data, quant - i)) return 1; //÷èòàåì ÷òî îñòàëîñü åñëè îíî îñòàëîñü
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -9,11 +9,13 @@
|
|||||||
#define SRC_GD25Q16ETIGR_H_
|
#define SRC_GD25Q16ETIGR_H_
|
||||||
|
|
||||||
#define GD25Q16E_SIZE 0x100000 // 16 bit lenght
|
#define GD25Q16E_SIZE 0x100000 // 16 bit lenght
|
||||||
|
#define GD25Q16E_PAGE 0x100
|
||||||
|
|
||||||
void GD25Q16ETIGR_en(void);
|
void GD25Q16ETIGR_en(void);
|
||||||
void GD25Q16ETIGR_write(void);
|
void GD25Q16ETIGR_write(void);
|
||||||
void GD25Q16ETIGR_write_data(uint32_t Addr);
|
void GD25Q16ETIGR_write_data(uint32_t Addr, uint16_t quant, char * write_data);
|
||||||
void GD25Q16ETIGR_read_data(uint32_t Addr);
|
void GD25Q16ETIGR_read_data(uint32_t Addr, uint16_t quant, char * read_data);
|
||||||
|
uint16_t GD25Q16ETIGR_verify_data(uint32_t Addr, uint16_t quant, char * verify_data);
|
||||||
void GD25Q16ETIGR_ReadManufacturerDeviceID(void);
|
void GD25Q16ETIGR_ReadManufacturerDeviceID(void);
|
||||||
|
|
||||||
#endif /* SRC_GD25Q16ETIGR_H_ */
|
#endif /* SRC_GD25Q16ETIGR_H_ */
|
||||||
|
|||||||
@ -25,7 +25,7 @@ void ZD24C02A_read(uint16_t byteCount, char * Array)
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
void ZD24C02A_verify(uint16_t byteCount, char * Array)
|
uint16_t ZD24C02A_verify(uint16_t byteCount, char * Array)
|
||||||
{
|
{
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|||||||
@ -18,6 +18,6 @@ void ZD24C02A_write(uint16_t byteCount, char * Array);
|
|||||||
void ZD24C02A_read(uint16_t byteCount, char * Array);
|
void ZD24C02A_read(uint16_t byteCount, char * Array);
|
||||||
void ZD24C02A_test(char * Array);
|
void ZD24C02A_test(char * Array);
|
||||||
void ZD24C02A_read_all(uint16_t byteCount, char * Array);
|
void ZD24C02A_read_all(uint16_t byteCount, char * Array);
|
||||||
void ZD24C02A_verify(uint16_t byteCount, char * Array);
|
uint16_t ZD24C02A_verify(uint16_t byteCount, char * Array);
|
||||||
|
|
||||||
#endif /* SRC_ZD24C02A_H_ */
|
#endif /* SRC_ZD24C02A_H_ */
|
||||||
|
|||||||
@ -112,9 +112,9 @@ void getMessage_from_Cm_Flash(void)
|
|||||||
uint16_t FlashSektorEnd = 0;
|
uint16_t FlashSektorEnd = 0;
|
||||||
uint32_t FactAddressFlash = Bzero_Sector0_start;
|
uint32_t FactAddressFlash = Bzero_Sector0_start;
|
||||||
uint32_t block1, block2;
|
uint32_t block1, block2;
|
||||||
uint16_t FlashErr = 0;
|
uint16_t MemOperationError = 0;
|
||||||
|
|
||||||
if(InData > 2048) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
||||||
if((InAddr+InData) > 0x40000) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
if((InAddr+InData) > 0x40000) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
||||||
|
|
||||||
@ -131,35 +131,35 @@ void getMessage_from_Cm_Flash(void)
|
|||||||
FlashSektorEnd = Internal_flash_Sektor_Addr(FactAddressFlash + InData - 1); //ñåêòîð â êîòîðîì êîíåö çàïèñè (òîò æå èëè ñëåäóþùèé, òàê êàê ðàçìåð ñåêòîðà áîëüøå ðàçìåðà áóôåðà)
|
FlashSektorEnd = Internal_flash_Sektor_Addr(FactAddressFlash + InData - 1); //ñåêòîð â êîòîðîì êîíåö çàïèñè (òîò æå èëè ñëåäóþùèé, òàê êàê ðàçìåð ñåêòîðà áîëüøå ðàçìåðà áóôåðà)
|
||||||
if(!BlockWasErased[FlashSektorStart])
|
if(!BlockWasErased[FlashSektorStart])
|
||||||
{
|
{
|
||||||
FlashErr = Internal_flash_Erase(FactAddressFlash); // åñëè ñåêòîð ñ êîòîðîãî íà÷èíàåì çàïèñü íå áûë ñò¸ðò, òî ñòèðàåì åãî
|
MemOperationError = Internal_flash_Erase(FactAddressFlash); // åñëè ñåêòîð ñ êîòîðîãî íà÷èíàåì çàïèñü íå áûë ñò¸ðò, òî ñòèðàåì åãî
|
||||||
if(!FlashErr) BlockWasErased[FlashSektorStart] = 1;
|
if(!MemOperationError) BlockWasErased[FlashSektorStart] = 1;
|
||||||
else {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, FlashErr, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
else {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
||||||
}
|
}
|
||||||
if(FlashSektorEnd == FlashSektorStart) //åñëè çàêàí÷èâàåì â ýòîì æå ñåêòîðå ÷òî è íà÷àëè, òî ïðîñòî ïèøåì åãî
|
if(FlashSektorEnd == FlashSektorStart) //åñëè çàêàí÷èâàåì â ýòîì æå ñåêòîðå ÷òî è íà÷àëè, òî ïðîñòî ïèøåì åãî
|
||||||
{
|
{
|
||||||
FlashErr = Internal_flash_Program_AutoECC(FactAddressFlash, InData);
|
MemOperationError = Internal_flash_Program_AutoECC(FactAddressFlash, InData);
|
||||||
if(FlashErr) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, FlashErr, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
||||||
}
|
}
|
||||||
else //åñëè íà÷àëè â îäíîì ñåêòîðå, à çàêàí÷èâàåì â äðóãîì òî
|
else //åñëè íà÷àëè â îäíîì ñåêòîðå, à çàêàí÷èâàåì â äðóãîì òî
|
||||||
{
|
{
|
||||||
if(!BlockWasErased[FlashSektorEnd])//ñòèðàåì âòîðîé ñåêòîð åñëè îí íå áûë ñò¸ðò ðàíåå
|
if(!BlockWasErased[FlashSektorEnd])//ñòèðàåì âòîðîé ñåêòîð åñëè îí íå áûë ñò¸ðò ðàíåå
|
||||||
{
|
{
|
||||||
FlashErr = Internal_flash_Erase(FactAddressFlash+InData);
|
MemOperationError = Internal_flash_Erase(FactAddressFlash+InData);
|
||||||
if(!FlashErr)BlockWasErased[FlashSektorEnd] = 1;
|
if(!MemOperationError)BlockWasErased[FlashSektorEnd] = 1;
|
||||||
else {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, FlashErr, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
else {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
||||||
}
|
}
|
||||||
block1 = internal_flash_FlashBankStartAddr(FlashSektorEnd)-FactAddressFlash; //âû÷èñëÿåì ðàçìåð ïåðâîãî êóñêà
|
block1 = internal_flash_FlashBankStartAddr(FlashSektorEnd)-FactAddressFlash; //âû÷èñëÿåì ðàçìåð ïåðâîãî êóñêà
|
||||||
block2 = InData - block1; //è ðàçìåð êóñêà äëÿ âòîðîãî ñåêòîðà
|
block2 = InData - block1; //è ðàçìåð êóñêà äëÿ âòîðîãî ñåêòîðà
|
||||||
FlashErr = Internal_flash_Program_AutoECC(FactAddressFlash, block1); // è ïèøåì ñïåðâà êóñîê â ïåðâûé ñåêòîð,
|
MemOperationError = Internal_flash_Program_AutoECC(FactAddressFlash, block1); // è ïèøåì ñïåðâà êóñîê â ïåðâûé ñåêòîð,
|
||||||
if(FlashErr) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, FlashErr, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
||||||
FlashErr = Internal_flash_Program_AutoECC(internal_flash_FlashBankStartAddr(FlashSektorEnd), block2); // ïîòîì êóñîê âî âòîðîé
|
MemOperationError = Internal_flash_Program_AutoECC(internal_flash_FlashBankStartAddr(FlashSektorEnd), block2); // ïîòîì êóñîê âî âòîðîé
|
||||||
if(FlashErr) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, FlashErr, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
|
||||||
}
|
}
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
break;
|
break;
|
||||||
case VERIFY:
|
case VERIFY:
|
||||||
FlashErr = verifyFlashMessage_to_Cm(FactAddressFlash, InData);
|
MemOperationError = verifyFlashMessage_to_Cm(FactAddressFlash, InData);
|
||||||
if(FlashErr) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, FlashErr, 0);
|
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0);
|
||||||
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
break;
|
break;
|
||||||
case END:
|
case END:
|
||||||
@ -174,7 +174,8 @@ void getMessage_from_Cm_Flash(void)
|
|||||||
#ifdef CPU1
|
#ifdef CPU1
|
||||||
void getMessage_from_Cm_EMIF(void)
|
void getMessage_from_Cm_EMIF(void)
|
||||||
{
|
{
|
||||||
if(InData > 2048) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
uint16_t MemOperationError = 0;
|
||||||
|
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
||||||
if((InAddr+InData) > 0x100000) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
if((InAddr+InData) > 0x100000) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
||||||
|
|
||||||
@ -199,7 +200,8 @@ void getMessage_from_Cm_EMIF(void)
|
|||||||
|
|
||||||
void getMessage_from_Cm_BL25CM1A(void)
|
void getMessage_from_Cm_BL25CM1A(void)
|
||||||
{
|
{
|
||||||
if(InData > 2048) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
uint16_t MemOperationError = 0;
|
||||||
|
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
||||||
if((InAddr+InData) > BL25CM1A0_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
if((InAddr+InData) > BL25CM1A0_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
||||||
|
|
||||||
@ -207,15 +209,19 @@ void getMessage_from_Cm_BL25CM1A(void)
|
|||||||
{
|
{
|
||||||
case READ:
|
case READ:
|
||||||
Bl25cm1a_en();
|
Bl25cm1a_en();
|
||||||
|
Bl25cm1a_read_data(InAddr*2, InData, (char *)CPUXTOCMMSGRAM0_BASE);
|
||||||
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
break;
|
break;
|
||||||
case WRITE:
|
case WRITE:
|
||||||
Bl25cm1a_en();
|
Bl25cm1a_en();
|
||||||
|
Bl25cm1a_write_data(InAddr*2, InData, (char *)CMTOCPUXMSGRAM0_BASE);
|
||||||
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
break;
|
break;
|
||||||
case VERIFY:
|
case VERIFY:
|
||||||
Bl25cm1a_en();
|
Bl25cm1a_en();
|
||||||
|
MemOperationError = Bl25cm1a_verify_data(InAddr*2, InData, (char *)CMTOCPUXMSGRAM0_BASE);
|
||||||
|
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0);
|
||||||
|
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
case END:
|
case END:
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
||||||
break;
|
break;
|
||||||
@ -227,7 +233,8 @@ void getMessage_from_Cm_BL25CM1A(void)
|
|||||||
|
|
||||||
void getMessage_from_Cm_GD25Q16E(void)
|
void getMessage_from_Cm_GD25Q16E(void)
|
||||||
{
|
{
|
||||||
if(InData > 2048) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
uint16_t MemOperationError = 0;
|
||||||
|
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
||||||
if((InAddr+InData) > GD25Q16E_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
if((InAddr+InData) > GD25Q16E_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
||||||
|
|
||||||
@ -235,15 +242,19 @@ void getMessage_from_Cm_GD25Q16E(void)
|
|||||||
{
|
{
|
||||||
case READ:
|
case READ:
|
||||||
GD25Q16ETIGR_en();
|
GD25Q16ETIGR_en();
|
||||||
|
GD25Q16ETIGR_read_data(InAddr*2, InData, (char *)CPUXTOCMMSGRAM0_BASE);
|
||||||
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
break;
|
break;
|
||||||
case WRITE:
|
case WRITE:
|
||||||
GD25Q16ETIGR_en();
|
GD25Q16ETIGR_en();
|
||||||
|
GD25Q16ETIGR_write_data(InAddr*2, InData, (char *)CMTOCPUXMSGRAM0_BASE);
|
||||||
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
break;
|
break;
|
||||||
case VERIFY:
|
case VERIFY:
|
||||||
GD25Q16ETIGR_en();
|
GD25Q16ETIGR_en();
|
||||||
|
MemOperationError = GD25Q16ETIGR_verify_data(InAddr*2, InData, (char *)CMTOCPUXMSGRAM0_BASE);
|
||||||
|
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0);
|
||||||
|
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
case END:
|
case END:
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
||||||
break;
|
break;
|
||||||
@ -255,7 +266,8 @@ void getMessage_from_Cm_GD25Q16E(void)
|
|||||||
|
|
||||||
void getMessage_from_Cm_ZD24C02A(void)
|
void getMessage_from_Cm_ZD24C02A(void)
|
||||||
{
|
{
|
||||||
if(InData > 2048) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
uint16_t MemOperationError = 0;
|
||||||
|
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
|
||||||
if((InAddr+InData) > ZD24C02A_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
if((InAddr+InData) > ZD24C02A_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
||||||
|
|
||||||
@ -263,12 +275,16 @@ void getMessage_from_Cm_ZD24C02A(void)
|
|||||||
{
|
{
|
||||||
case READ:
|
case READ:
|
||||||
ZD24C02A_read(InData*2, (char *)CPUXTOCMMSGRAM0_BASE);
|
ZD24C02A_read(InData*2, (char *)CPUXTOCMMSGRAM0_BASE);
|
||||||
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
break;
|
break;
|
||||||
case WRITE:
|
case WRITE:
|
||||||
ZD24C02A_write(InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
|
ZD24C02A_write(InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
|
||||||
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
break;
|
break;
|
||||||
case VERIFY:
|
case VERIFY:
|
||||||
ZD24C02A_verify(InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
|
MemOperationError = ZD24C02A_verify(InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
|
||||||
|
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0);
|
||||||
|
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
|
||||||
case END:
|
case END:
|
||||||
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
|
||||||
break;
|
break;
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user