Добавлены библиотеки внешней памяти SPI

Projects/epwm_test/epwm_test.c

@@ -17,6 +17,8 @@
 #include "init_perif.h"
 #include"frm_uart.h"
 #include "spi_init.h"
+#include "BL25CM1A.h"
+#include "GD25Q16ETIGR.h"
 //
 // Main
 //
@@ -27,9 +29,7 @@ volatile uint16_t counter1=0 ;
 volatile uint16_t counter2=0 ;
 
 
-uint16_t sdata = 0;  // sent data
+uint16_t sendNow = 0;
-uint16_t rdata = 0;  // received data
-uint16_t error = 0;
 
 
 void main(void)
@@ -37,6 +37,8 @@ void main(void)
 
     InitPerif();
     FRMUartInit();
+//    GD25Q16ETIGR_en();
+//    Bl25cm1a_en();
 //
 // IDLE loop. Just sit and loop forever (optional):
 //
@@ -44,28 +46,12 @@ void main(void)
     {
         asm (" NOP");
 
-        transmitData(sdata);
+//        if(sendNow)
-
+//        {
-        //
+//            Bl25cm1a_write();
-        // Wait until data is received
+//            GD25Q16ETIGR_write();
-        //
+//            sendNow = 0;
-        while(SpiaRegs.SPIFFRX.bit.RXFFST != 1)
+//        }
-        {
-
-        }
-
-        //
-        // Check against sent data
-        //
-        rdata = SpiaRegs.SPIRXBUF;
-        if(rdata != sdata)
-        {
-            error++;
-        }
-        sdata++;
-
-
-
 
         if(FMSTR_is_enable()) {
                 if(counter < 100) counter++;

Projects/epwm_test/src/BL25CM1A.c

@@ -0,0 +1,61 @@
+/*
+ * BL25CM1A.c
+ *
+ *  Created on: 7 ñåíò. 2023 ã.
+ *      Author: seklyuts
+ */
+#include "f28x_project.h"
+#include "spi_init.h"
+
+#define WREN 0b00000110 //Enable Write Operations
+#define WRDI 0b00000100 //Disable Write Operations
+#define RDSR 0b00000101 //Read Status Register
+#define WRSR 0b00000001 //Write Status Register
+#define READ 0b00000011 //Read Data from Memory
+#define WRITE 0b00000010 //Write Data to Memory
+#define RDID 0b10000011 //Read identification page
+#define WRID 0b10000010 //Write identification page
+#define RDLS 0b10000011 //Reads the identification page lock status
+#define LID 0b10000010 //Locks the identification page in read-only mode
+
+
+uint16_t sdata = RDSR;  // sent data
+uint16_t rdata = 0;  // received data
+uint16_t error = 0;
+
+void Bl25cm1a_en(void)
+{
+    transmitData(WREN);
+    while(SpiaRegs.SPIFFRX.bit.RXFFST != 1)
+    {
+
+    }
+
+    rdata = SpiaRegs.SPIRXBUF;
+}
+
+
+void Bl25cm1a_write(void)
+{
+        transmitData(sdata);
+
+        //
+        // Wait until data is received
+        //
+        while(SpiaRegs.SPIFFRX.bit.RXFFST != 1)
+        {
+
+        }
+
+        rdata = SpiaRegs.SPIRXBUF;
+
+
+}
+
+void Bl25cm1a_read(void)
+{
+
+
+
+
+}

Projects/epwm_test/src/BL25CM1A.h

@@ -0,0 +1,15 @@
+/*
+ * BL25CM1A.h
+ *
+ *  Created on: 7 ñåíò. 2023 ã.
+ *      Author: seklyuts
+ */
+
+#ifndef SRC_BL25CM1A_H_
+#define SRC_BL25CM1A_H_
+
+void Bl25cm1a_en(void);
+void Bl25cm1a_write(void);
+void Bl25cm1a_read(void);
+
+#endif /* SRC_BL25CM1A_H_ */

Projects/epwm_test/src/GD25Q16ETIGR.c

@@ -0,0 +1,41 @@
+/*
+ * GD25Q16ETIGR.c
+ *
+ *  Created on: 7 ñåíò. 2023 ã.
+ *      Author: seklyuts
+ */
+#include "f28x_project.h"
+#include "spi_init.h"
+
+
+uint16_t sdata1 = 0x6;  // sent data
+uint16_t rdata1 = 0;  // received data
+uint16_t error1 = 0;
+
+void GD25Q16ETIGR_en(void)
+{
+    transmitData(sdata1);
+    while(SpiaRegs.SPIFFRX.bit.RXFFST != 1)
+    {
+
+    }
+
+    rdata1 = SpiaRegs.SPIRXBUF;
+}
+
+
+void GD25Q16ETIGR_write(void)
+{
+        transmitData(sdata1);
+
+        //
+        // Wait until data is received
+        //
+        while(SpiaRegs.SPIFFRX.bit.RXFFST != 1)
+        {
+
+        }
+
+        rdata1 = SpiaRegs.SPIRXBUF;
+
+}

Projects/epwm_test/src/GD25Q16ETIGR.h

@@ -0,0 +1,14 @@
+/*
+ * GD25Q16ETIGR.h
+ *
+ *  Created on: 7 ñåíò. 2023 ã.
+ *      Author: seklyuts
+ */
+
+#ifndef SRC_GD25Q16ETIGR_H_
+#define SRC_GD25Q16ETIGR_H_
+
+void GD25Q16ETIGR_en(void);
+void GD25Q16ETIGR_write(void);
+
+#endif /* SRC_GD25Q16ETIGR_H_ */

Projects/epwm_test/src/pwm_init.h

@@ -9,7 +9,7 @@
 #define SRC_PWM_INIT_H_
 
 
-#define PERIOD_BRAKE    500
+#define PERIOD_BRAKE    1000
 #define PERIOD_MOTOR    5000
 #define EPWM_DB         150
 #define PERIOD_2    PERIOD_MOTOR/2

Projects/epwm_test/src/pwm_interrupts.c

@@ -51,13 +51,13 @@ __interrupt void epwm2_isr(void)
     // Clear INT flag for this timer
     //
     EPwm2Regs.ETCLR.bit.INT = 1;
-
+    Gpio0out(0);
     //
     // Acknowledge this interrupt to receive more interrupts from group 3
     //
     PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
 //    GpioDataRegs.GPADAT.bit.GPIO0 = 0;
-    Gpio0out(0);
+
 }
 
 //

Projects/epwm_test/src/sdfm.c

@@ -66,8 +66,6 @@ void SdfmInitInterruptEn(void)
     IER |= M_INT5;
     PieCtrlRegs.PIEIER5.bit.INTx9 = 1;    // SDFM1 interrupt enabled
     EDIS;
-
-
 }
 
 void SdfmInit(uint16_t Num)

Projects/epwm_test/src/spi_init.c

@@ -7,6 +7,9 @@
 
 #include "f28x_project.h"
 
+__interrupt void spia_rx_isr(void);
+__interrupt void spia_tx_isr(void);
+
 
 void SpiInit(void)
 {
@@ -33,8 +36,8 @@ void SpiInit(void)
     //
     SpiaRegs.SPICCR.bit.SPISWRESET = 0;
     SpiaRegs.SPICCR.bit.CLKPOLARITY = 0;
-    SpiaRegs.SPICCR.bit.SPICHAR = (16 - 1);
+    SpiaRegs.SPICCR.bit.SPICHAR = (8 - 1);
-    SpiaRegs.SPICCR.bit.SPILBK = 1;
+    SpiaRegs.SPICCR.bit.SPILBK = 0;
 
     //
     // Enable master (0 == slave, 1 == master)
@@ -47,6 +50,11 @@ void SpiInit(void)
     SpiaRegs.SPICTL.bit.CLK_PHASE = 0;
     SpiaRegs.SPICTL.bit.SPIINTENA = 0;
 
+    PieCtrlRegs.PIEIER6.bit.INTx1 = 0;
+    PieCtrlRegs.PIEIER6.bit.INTx2 = 0;
+
+    PieVectTable.SPIA_RX_INT = &spia_rx_isr;
+    PieVectTable.SPIA_TX_INT = &spia_tx_isr;
     //
     // Set the baud rate using a 1 MHz SPICLK
     // BRR = (LSPCLK / SPICLK) - 1
@@ -105,7 +113,19 @@ void SpiaGpioInit(void)
 
 void transmitData(uint16_t a)
 {
-    SpiaRegs.SPITXBUF = a;
+    SpiaRegs.SPITXBUF = a<<8;
 }
 
 
+__interrupt void spia_rx_isr(void)
+{
+    uint16_t temp = SpiaRegs.SPISTS.all;
+    PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
+}
+
+
+__interrupt void spia_tx_isr(void)
+{
+    uint16_t temp = SpiaRegs.SPISTS.all;
+    PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
+}