seklyuts/MotorControlModuleSDFM_TMS320F28388D
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Добавлен в протокол i2c

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This commit is contained in:
Eugene 2023-11-20 14:26:23 +03:00
parent b2dd3b785c
commit 80ea1ca20d
13 changed files with 686 additions and 40 deletions
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2
Projects/epwm_test/epwm_test.c
View File

@ -25,7 +25,7 @@ void main(void)
InitPerif(); InitPerif();
for(;;) for(;;)
{ {
asm (" NOP"); // asm (" NOP");
ExtEEPROM_run(); ExtEEPROM_run();
frmmstr_run(); frmmstr_run();
} }

2
Projects/mem_test/.cproject
View File

@ -433,7 +433,7 @@
</toolChain> </toolChain>
</folderInfo> </folderInfo>
<sourceEntries> <sourceEntries>
<entry excluding="Freemaster|src/frmmstr_run.c|src/timer_base.c|src/Peripherals/i2c_init.c|src/ExternalEEPROM/ZD24C02A.c|src/ExternalEEPROM/GD25Q16ETIGR.c|src/ExternalEEPROM/ExtEEPROM.c|src/ExternalEEPROM/BL25CM1A.c|src/Peripherals/spi_init.c|src/Peripherals/gpio_init.c|src/frm_uart.c|lib/f2838x_epwm.c|device/driverlib|2838x_RAM_combined_lnk_cpu1.cmd|2838x_FLASH_lnk_cpu1.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/> <entry excluding="src/Peripherals/pwm_interrupts.c|src/Peripherals/pwm_init.c|Freemaster|src/frmmstr_run.c|src/timer_base.c|src/Peripherals/i2c_init.c|src/ExternalEEPROM/ZD24C02A.c|src/ExternalEEPROM/GD25Q16ETIGR.c|src/ExternalEEPROM/ExtEEPROM.c|src/ExternalEEPROM/BL25CM1A.c|src/Peripherals/spi_init.c|src/Peripherals/gpio_init.c|src/frm_uart.c|lib/f2838x_epwm.c|device/driverlib|2838x_RAM_combined_lnk_cpu1.cmd|2838x_FLASH_lnk_cpu1.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries> </sourceEntries>
</configuration> </configuration>
</storageModule> </storageModule>

10
Projects/mem_test/src/ExternalEEPROM/ExtEEPROM.c
View File

@ -30,12 +30,12 @@ void ExtEEPROM_run(void)
if(WriteI2C) if(WriteI2C)
{ {
ArrayForTests[0] = Adr; ArrayForTests[0] = Adr;
ZD24C02A_write(NByte, ArrayForTests); //ZD24C02A_write(NByte, ArrayForTests);
} }
else else
{ {
ArrayMax[0] = Adr; ArrayMax[0] = Adr;
ZD24C02A_read(NByte, ArrayMax); //ZD24C02A_read(NByte, ArrayMax);
} }
sendNowI2C = 0; sendNowI2C = 0;
} }
@ -52,7 +52,7 @@ void ExtEEPROM_run(void)
sendNowSPIGD25 = 0; sendNowSPIGD25 = 0;
break; break;
case 2: case 2:
GD25Q16ETIGR_write(); //GD25Q16ETIGR_write();
sendNowSPIGD25 = 0; sendNowSPIGD25 = 0;
break; break;
case 3: case 3:
@ -78,7 +78,7 @@ void ExtEEPROM_run(void)
sendNowSPIBL25 = 0; sendNowSPIBL25 = 0;
break; break;
case 2: case 2:
Bl25cm1a_write(); //Bl25cm1a_write();
sendNowSPIBL25 = 0; sendNowSPIBL25 = 0;
break; break;
case 3: case 3:
@ -91,7 +91,7 @@ void ExtEEPROM_run(void)
sendNowSPIBL25 = 0; sendNowSPIBL25 = 0;
break; break;
case 5: case 5:
Bl25cm1a_en(); //Bl25cm1a_en();
sendNowSPIBL25 = 0; sendNowSPIBL25 = 0;
break; break;
} }

83
Projects/mem_test/src/ExternalEEPROM/ZD24C02A.c
View File

@ -9,26 +9,87 @@
#include "ZD24C02A.h" #include "ZD24C02A.h"
volatile uint16_t SlaveAdr = I2C_SLAVE_ADDRESS; volatile uint16_t SlaveAdr = I2C_SLAVE_ADDRESS;
char BufferZD24C02A[17];
void ZD24C02A_write(uint16_t byteCount, char * Array)// ìîæåò ïèñàòü î÷åðåäÿìè ïî 16 áàéò uint16_t ZD24C02A_write_16(char Addr, char * Array, uint16_t quant)// ìîæåò ïèñàòü î÷åðåäÿìè ïî 16 áàéò
{ {
I2CWrite(SlaveAdr, (byteCount + 1), true, Array); if(I2CWrite(SlaveAdr, Addr, quant, true, Array)) return 1;
else return 0;
} }
void ZD24C02A_read(uint16_t byteCount, char * Array) uint16_t ZD24C02A_read_16(char Addr, char * Array, uint16_t quant)
{ {
I2CWrite(SlaveAdr, 1, false, Array);
I2CRead(SlaveAdr, byteCount, true, Array); if(I2CWrite(SlaveAdr, Addr, 0, false, Array)) return 1;
// I2CWriteRead(I2C_SLAVE_ADDRESS, byteCount, true, Array); if(I2CRead(SlaveAdr, quant, true, Array)) return 1;
// I2CWriteReadOnes(I2C_SLAVE_ADDRESS); else return 0;
}
uint16_t ZD24C02A_verify_16(char Addr, char * Array, uint16_t quant)
{
uint16_t VerifyErr = 0;
if(I2CWrite(SlaveAdr, Addr, 0, false, BufferZD24C02A)) return 1;
VerifyErr = I2CVerify(SlaveAdr, quant, true, Array);
return VerifyErr;
}
uint16_t ZD24C02A_write(uint32_t Addr, uint16_t byteCount, char * Array)
{
return 0;
}
uint16_t ZD24C02A_read(uint32_t Addr, uint16_t quant, char * read_data)
{
uint16_t Err_read = 0;
uint32_t i=0;
char * addr_read_data = read_data;
if(quant > 16)
{
for(i = 0; i < (quant-16); i += 16)
{
Err_read = ZD24C02A_read_16(Addr+i, addr_read_data, 16);
if(Err_read) return 1;
addr_read_data += 16;
}
}
if(i < quant) Err_read = ZD24C02A_read_16(Addr+i, addr_read_data, quant - i);
if(Err_read) return 1;
else return 0;
}
uint16_t ZD24C02A_verify(uint32_t Addr, uint16_t quant, char * verify_data)
{
uint16_t Err_read = 0;
uint32_t i=0;
char * addr_read_data = verify_data;
if(quant > 16)
{
for(i = 0; i < (quant-16); i += 16)
{
Err_read = ZD24C02A_verify_16(Addr+i, addr_read_data, 16);
if(Err_read) return Err_read;
addr_read_data += 16;
}
}
if(i < quant)
{
Err_read = ZD24C02A_verify_16(Addr+i, addr_read_data, quant - i);
if(Err_read) return Err_read;
}
return 0;
} }
uint16_t ZD24C02A_verify(uint16_t byteCount, char * Array)
{
}
void ZD24C02A_read_all(uint16_t byteCount, char * Array) void ZD24C02A_read_all(uint16_t byteCount, char * Array)
@ -44,6 +105,6 @@ void ZD24C02A_test(char * Array)
uint16_t i=0; uint16_t i=0;
for(i=0;i<=255;i+=15) for(i=0;i<=255;i+=15)
{ {
I2CWrite(SlaveAdr, 1, true, Array); // I2CWrite(SlaveAdr, 1, true, Array);
} }
} }

6
Projects/mem_test/src/ExternalEEPROM/ZD24C02A.h
View File

@ -14,10 +14,10 @@
#define ZD24C02A_SIZE 0x80 #define ZD24C02A_SIZE 0x80
void ZD24C02A_write(uint16_t byteCount, char * Array); uint16_t ZD24C02A_write(uint32_t Addr, uint16_t byteCount, char * Array);
void ZD24C02A_read(uint16_t byteCount, char * Array); uint16_t ZD24C02A_read(uint32_t Addr, uint16_t quant, char * read_data);
void ZD24C02A_test(char * Array); void ZD24C02A_test(char * Array);
void ZD24C02A_read_all(uint16_t byteCount, char * Array); void ZD24C02A_read_all(uint16_t byteCount, char * Array);
uint16_t ZD24C02A_verify(uint16_t byteCount, char * Array); uint16_t ZD24C02A_verify(uint32_t Addr, uint16_t quant, char * verify_data);
#endif /* SRC_ZD24C02A_H_ */ #endif /* SRC_ZD24C02A_H_ */

72
Projects/mem_test/src/Peripherals/i2c_init.c
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@ -121,7 +121,7 @@ uint16_t j = 0;
// //
// Function to send data over I2C. // Function to send data over I2C.
// //
void I2CWrite(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_TXdata) uint16_t I2CWrite(uint16_t slaveAddr, uint16_t MemAdr, uint16_t byteCount, bool sendStopCondition, char * I2C_TXdata)
{ {
// //
@ -151,6 +151,13 @@ void I2CWrite(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, ch
// I2caRegs.I2CMDR.bit.STP = 0x1; // I2caRegs.I2CMDR.bit.STP = 0x1;
I2caRegs.I2CMDR.bit.STT = 0x1; I2caRegs.I2CMDR.bit.STT = 0x1;
I2caRegs.I2CDXR.all = MemAdr ;
TimerTimeouts = 0;
while((I2caRegs.I2CSTR.bit.BYTESENT != 0x1)&&(TimerTimeouts < TIME_OVER));
I2caRegs.I2CSTR.bit.BYTESENT = 0x1;
if(TimerTimeouts >= TIME_OVER) {ErrI2c++; return 1;}
// //
//transmit the bytes //transmit the bytes
// //
@ -164,7 +171,7 @@ void I2CWrite(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, ch
while((I2caRegs.I2CSTR.bit.BYTESENT != 0x1)&&(TimerTimeouts < TIME_OVER)); while((I2caRegs.I2CSTR.bit.BYTESENT != 0x1)&&(TimerTimeouts < TIME_OVER));
I2caRegs.I2CSTR.bit.BYTESENT = 0x1; I2caRegs.I2CSTR.bit.BYTESENT = 0x1;
if(TimerTimeouts >= TIME_OVER) {ErrI2c++; return;} if(TimerTimeouts >= TIME_OVER) {ErrI2c++; return 1;}
} }
// //
@ -176,14 +183,16 @@ void I2CWrite(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, ch
TimerTimeouts = 0; TimerTimeouts = 0;
while((I2caRegs.I2CMDR.bit.STP != 0x0)&&(TimerTimeouts < TIME_OVER)); while((I2caRegs.I2CMDR.bit.STP != 0x0)&&(TimerTimeouts < TIME_OVER));
I2caRegs.I2CSTR.bit.BYTESENT = 0x1; I2caRegs.I2CSTR.bit.BYTESENT = 0x1;
if(TimerTimeouts >= TIME_OVER) {ErrI2c1++; return;} if(TimerTimeouts >= TIME_OVER) {ErrI2c1++; return 1;}
} }
return 0;
} }
// //
// Function to read data over I2C. Returns the number of bytes read // Function to read data over I2C. Returns the number of bytes read
// //
uint16_t ttest=0; uint16_t ttest=0;
uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_RXdata) uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_RXdata)
{ {
I2caRegs.I2CMDR.bit.NACKMOD = 0x0; I2caRegs.I2CMDR.bit.NACKMOD = 0x0;
@ -218,7 +227,7 @@ uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition,
count++; count++;
} }
} }
if(TimerTimeouts >= TIME_OVER) {ErrI2c2 += (byteCount - count); return 0;} if(TimerTimeouts >= TIME_OVER) {ErrI2c2 += (byteCount - count); return 1;}
// //
// Send STOP condition // Send STOP condition
@ -229,11 +238,62 @@ uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition,
TimerTimeouts = 0; TimerTimeouts = 0;
while((I2caRegs.I2CMDR.bit.STP != 0x0)&&(TimerTimeouts < TIME_OVER)); while((I2caRegs.I2CMDR.bit.STP != 0x0)&&(TimerTimeouts < TIME_OVER));
I2caRegs.I2CSTR.bit.BYTESENT = 0x1; I2caRegs.I2CSTR.bit.BYTESENT = 0x1;
if(TimerTimeouts >= TIME_OVER) {ErrI2c3++; return 0;} if(TimerTimeouts >= TIME_OVER) {ErrI2c3++; return 1;}
} }
return count; return 0;
} }
uint16_t I2CVerify(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_Vfdata)
{
uint16_t VerErr = 0;
I2caRegs.I2CMDR.bit.NACKMOD = 0x0;
//
// Configure slave address
//
I2caRegs.I2CSAR.all = slaveAddr;
//
// Configure I2C in Master Receiver mode
//
I2caRegs.I2CMDR.bit.MST = 0x1;
I2caRegs.I2CMDR.bit.TRX = 0x0;
uint16_t count = 0;
I2caRegs.I2CCNT = byteCount;
I2caRegs.I2CMDR.bit.STT = 0x1;
//
// Read the received data into RX buffer
//
TimerTimeouts = 0;
while((count < (byteCount))&&(TimerTimeouts < TIME_OVER))
{
// if(count == (byteCount-1)) {I2caRegs.I2CMDR.bit.NACKMOD = 0x1; I2caRegs.I2CMDR.bit.STP = 0x1;}
if(I2caRegs.I2CSTR.bit.RRDY ==0x1)
{
RXdata = I2caRegs.I2CDRR.all;
if(I2C_Vfdata[count] != RXdata) VerErr = 1;
count++;
}
}
if(TimerTimeouts >= TIME_OVER) {ErrI2c2 += (byteCount - count); return 1;}
//
// Send STOP condition
//
if(sendStopCondition)
{
I2caRegs.I2CMDR.bit.STP = 0x1;
TimerTimeouts = 0;
while((I2caRegs.I2CMDR.bit.STP != 0x0)&&(TimerTimeouts < TIME_OVER));
I2caRegs.I2CSTR.bit.BYTESENT = 0x1;
if(TimerTimeouts >= TIME_OVER) {ErrI2c3++; return 1;}
}
if(VerErr) return 2;
else return 0;
}

3
Projects/mem_test/src/Peripherals/i2c_init.h
View File

@ -17,9 +17,10 @@
void I2CMasterInit(uint16_t I2CSlave_OwnAddress, uint16_t I2CSlave_Address); void I2CMasterInit(uint16_t I2CSlave_OwnAddress, uint16_t I2CSlave_Address);
void I2CWrite(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_TXdata); uint16_t I2CWrite(uint16_t slaveAddr, uint16_t MemAdr, uint16_t byteCount, bool sendStopCondition, char * I2C_TXdata);
uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_RXdata); uint16_t I2CRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_RXdata);
uint16_t I2CWriteRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_RXdata); uint16_t I2CWriteRead(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_RXdata);
uint16_t I2CVerify(uint16_t slaveAddr, uint16_t byteCount, bool sendStopCondition, char * I2C_Vfdata);
void I2CMasterGpioInit(void); void I2CMasterGpioInit(void);
void TimerBaseTimeoutInc(void); void TimerBaseTimeoutInc(void);
void I2CWriteReadOnes(uint16_t slaveAddr); void I2CWriteReadOnes(uint16_t slaveAddr);

32
Projects/mem_test/src/Peripherals/ipc_init.c
View File

@ -189,6 +189,7 @@ void getMessage_from_Cm_EMIF(void)
break; break;
case VERIFY: case VERIFY:
break;
case END: case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
break; break;
@ -209,19 +210,20 @@ void getMessage_from_Cm_BL25CM1A(void)
{ {
case READ: case READ:
Bl25cm1a_en(); Bl25cm1a_en();
Bl25cm1a_read_data(InAddr*2, InData, (char *)CPUXTOCMMSGRAM0_BASE); Bl25cm1a_read_data(InAddr*2, InData*2, (char *)CPUXTOCMMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break; break;
case WRITE: case WRITE:
Bl25cm1a_en(); Bl25cm1a_en();
Bl25cm1a_write_data(InAddr*2, InData, (char *)CMTOCPUXMSGRAM0_BASE); Bl25cm1a_write_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break; break;
case VERIFY: case VERIFY:
Bl25cm1a_en(); Bl25cm1a_en();
MemOperationError = Bl25cm1a_verify_data(InAddr*2, InData, (char *)CMTOCPUXMSGRAM0_BASE); MemOperationError = Bl25cm1a_verify_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0); if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break;
case END: case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
break; break;
@ -242,19 +244,20 @@ void getMessage_from_Cm_GD25Q16E(void)
{ {
case READ: case READ:
GD25Q16ETIGR_en(); GD25Q16ETIGR_en();
GD25Q16ETIGR_read_data(InAddr*2, InData, (char *)CPUXTOCMMSGRAM0_BASE); GD25Q16ETIGR_read_data(InAddr*2, InData*2, (char *)CPUXTOCMMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break; break;
case WRITE: case WRITE:
GD25Q16ETIGR_en(); GD25Q16ETIGR_en();
GD25Q16ETIGR_write_data(InAddr*2, InData, (char *)CMTOCPUXMSGRAM0_BASE); GD25Q16ETIGR_write_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break; break;
case VERIFY: case VERIFY:
GD25Q16ETIGR_en(); GD25Q16ETIGR_en();
MemOperationError = GD25Q16ETIGR_verify_data(InAddr*2, InData, (char *)CMTOCPUXMSGRAM0_BASE); MemOperationError = GD25Q16ETIGR_verify_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0); if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break;
case END: case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
break; break;
@ -267,6 +270,7 @@ void getMessage_from_Cm_GD25Q16E(void)
void getMessage_from_Cm_ZD24C02A(void) void getMessage_from_Cm_ZD24C02A(void)
{ {
uint16_t MemOperationError = 0; uint16_t MemOperationError = 0;
uint16_t I2CErr = 0;
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;} if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;}
if((InAddr+InData) > ZD24C02A_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;} if((InAddr+InData) > ZD24C02A_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
@ -274,17 +278,21 @@ void getMessage_from_Cm_ZD24C02A(void)
switch(InCommand >> 16) switch(InCommand >> 16)
{ {
case READ: case READ:
ZD24C02A_read(InData*2, (char *)CPUXTOCMMSGRAM0_BASE); I2CErr = ZD24C02A_read(InAddr*2, InData*2, (char *)CPUXTOCMMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break; break;
case WRITE: case WRITE:
ZD24C02A_write(InData*2, (char *)CMTOCPUXMSGRAM0_BASE); I2CErr = ZD24C02A_write(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break; break;
case VERIFY: case VERIFY:
MemOperationError = ZD24C02A_verify(InData*2, (char *)CMTOCPUXMSGRAM0_BASE); MemOperationError = ZD24C02A_verify(InData*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0); if(MemOperationError == 2) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0);
else if(MemOperationError == 1) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break;
case END: case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0);
break; break;

229
Projects/mem_test/src/Peripherals/pwm_init.c Normal file
View File

@ -0,0 +1,229 @@
/*
* init.c
*
* Created on: 21 àâã. 2023 ã.
* Author: seklyuts
*/
#include <pwm_init.h>
#include "f28x_project.h"
#include "pwm_interrupts.h"
#include "gpio_init.h"
#define COUNT_UP 1
#define COUNT_DOWN 0
volatile struct EPWM_REGS * EPwmRegs[17] = {NULL, &EPwm1Regs, &EPwm2Regs, &EPwm3Regs, &EPwm4Regs, &EPwm5Regs, &EPwm6Regs, &EPwm7Regs, &EPwm8Regs, &EPwm9Regs, &EPwm10Regs, &EPwm11Regs, &EPwm12Regs, &EPwm13Regs, &EPwm14Regs, &EPwm15Regs, &EPwm16Regs};
uint32_t EPwmTimerIntCount[17];
uint16_t EPwm_DB_Direction[17];
volatile uint16_t PwmBrake100 = PERIOD_BRAKE;
volatile uint16_t PwmMotor100 = PERIOD_MOTOR;
void PWM_ABC_StopAllClose(void)
{
EALLOW;
EPwm2Regs.TZCTL.bit.TZA = 2;
EPwm2Regs.TZCTL.bit.TZB = 2;
EPwm3Regs.TZCTL.bit.TZA = 2;
EPwm3Regs.TZCTL.bit.TZB = 2;
EPwm4Regs.TZCTL.bit.TZA = 2;
EPwm4Regs.TZCTL.bit.TZB = 2;
EDIS;
}
void PWM_ABC_StartOut(void)
{
EALLOW;
EPwm2Regs.TZCTL.bit.TZA = 3;
EPwm2Regs.TZCTL.bit.TZB = 3;
EPwm3Regs.TZCTL.bit.TZA = 3;
EPwm3Regs.TZCTL.bit.TZB = 3;
EPwm4Regs.TZCTL.bit.TZA = 3;
EPwm4Regs.TZCTL.bit.TZB = 3;
EDIS;
}
void PWMAllInit(void)
{
//
// Initialize the Device Peripherals:
//
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
EDIS;
PwmBrake100 = PERIOD_BRAKE;
PwmMotor100 = PERIOD_MOTOR;
// PWMInit(1, PwmMotor100, INDEPENDED);
PWMInit(2, PwmMotor100, COMPLIMENTARY);
// PWMInit(3, PwmMotor100, COMPLIMENTARY);
// PWMInit(4, PwmMotor100, COMPLIMENTARY);
// PWMInit(5, PwmBrake100, INDEPENDED);
// PWMInit(6, PwmMotor100, COMPLIMENTARY);
//
// PWMInit(11, PwmMotor100, INDEPENDED);
// PWMInit(12, PwmMotor100, INDEPENDED);
//
// EPwm11Regs.CMPC = SDFM_DELAY;
// EPwm11Regs.CMPD = SDFM_DELAY;
// EPwm12Regs.CMPC = SDFM_DELAY;
// EPwm12Regs.CMPD = SDFM_DELAY;
// EPwm11Regs.CMPA.bit.CMPA = SDFM_DELAY;
// EPwm11Regs.CMPB.bit.CMPB = SDFM_DELAY;
// EPwm12Regs.CMPA.bit.CMPA = SDFM_DELAY;
// EPwm12Regs.CMPB.bit.CMPB = SDFM_DELAY;
EALLOW;
EPwm2Regs.TZCTL.bit.TZA = 2;
EPwm2Regs.TZCTL.bit.TZB = 2;
// EPwm3Regs.TZCTL.bit.TZA = 2;
// EPwm3Regs.TZCTL.bit.TZB = 2;
// EPwm4Regs.TZCTL.bit.TZA = 2;
// EPwm4Regs.TZCTL.bit.TZB = 2;
EDIS;
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;
}
void PWMGpioInit(void)
{
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
InitEPwm5Gpio();
InitEPwm6Gpio();
InitEPwm11Gpio();
}
void PWMInitEnable(void)
{
// CpuSysRegs.PCLKCR2.bit.EPWM1=1;
CpuSysRegs.PCLKCR2.bit.EPWM2=1;
// CpuSysRegs.PCLKCR2.bit.EPWM3=1;
// CpuSysRegs.PCLKCR2.bit.EPWM4=1;
// CpuSysRegs.PCLKCR2.bit.EPWM5=1;
// CpuSysRegs.PCLKCR2.bit.EPWM6=1;
}
void PWMInitInterruptEn(void)
{
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM2_INT = &epwm2_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Enable CPU INT3 which is connected to EPWM1-3 INT:
//
IER |= M_INT3;
//
// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3 (page 150)
//
// PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
// PieCtrlRegs.PIEIER3.bit.INTx3 = 1;
// PieCtrlRegs.PIEIER3.bit.INTx4 = 1;
// PieCtrlRegs.PIEIER3.bit.INTx5 = 1;
// PieCtrlRegs.PIEIER3.bit.INTx6 = 1;
// PieCtrlRegs.PIEIER3.bit.INTx11 = 1;
}
void PWMInit(uint16_t Num, uint16_t Period, uint16_t Independed)
{
if( (Num < 11)||(Num > 12) ) EPwmRegs[Num]->TBPRD = Period;
else EPwmRegs[Num]->TBPRD = Period*2-1;// Set timer period
EPwmRegs[Num]->TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwmRegs[Num]->TBCTR = 0x0000; // Clear counter
//
// Setup TBCLK
//
if( (Num < 11)||(Num > 12) ) EPwmRegs[Num]->TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
else EPwmRegs[Num]->TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwmRegs[Num]->TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwmRegs[Num]->TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwmRegs[Num]->TBCTL.bit.CLKDIV = TB_DIV1;
EPwmRegs[Num]->CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwmRegs[Num]->CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwmRegs[Num]->CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwmRegs[Num]->CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
//
// Setup compare
//
EALLOW;
EPwmRegs[Num]->TZCTL.bit.TZA = 3;
EPwmRegs[Num]->TZCTL.bit.TZB = 3;
EPwmRegs[Num]->TZFRC.all = 4;
EDIS; //Ïðîãðàììíî âûñòàâëÿåì TZ-ñîáûòèå
//
// Set actions
//
if( (Num < 11)||(Num > 12) )
{
EPwmRegs[Num]->AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on Zero
EPwmRegs[Num]->AQCTLA.bit.CAD = AQ_CLEAR;
EPwmRegs[Num]->AQCTLB.bit.CAU = AQ_CLEAR; // Set PWM1A on Zero
EPwmRegs[Num]->AQCTLB.bit.CAD = AQ_SET;
}
else
{
EPwmRegs[Num]->AQCTLA.bit.ZRO = AQ_SET;
EPwmRegs[Num]->AQCTLA.bit.CAU = AQ_CLEAR;
EPwmRegs[Num]->AQCTLB.bit.ZRO = AQ_SET;
EPwmRegs[Num]->AQCTLB.bit.CBU = AQ_CLEAR;
}
//
// Active Low PWMs - Setup Deadband
//
EPwmRegs[Num]->DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
if(Independed)
{
EPwmRegs[Num]->CMPA.bit.CMPA = Period;
EPwmRegs[Num]->DBCTL.bit.POLSEL = DB_ACTV_HI; //DB_ACTV_HI - independ
EPwmRegs[Num]->DBRED.bit.DBRED = 0;
EPwmRegs[Num]->DBFED.bit.DBFED = 0;
}
else
{
EPwmRegs[Num]->CMPA.bit.CMPA = Period/2;
EPwmRegs[Num]->DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwmRegs[Num]->DBRED.bit.DBRED = EPWM_DB;
EPwmRegs[Num]->DBFED.bit.DBFED = EPWM_DB;
}
EPwmRegs[Num]->DBCTL.bit.IN_MODE = DBA_ALL;
// EPwm1_DB_Direction = COUNT_UP;
//
//
if( (Num < 11)||(Num > 12) ) EPwmRegs[Num]->ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
else EPwmRegs[Num]->ETSEL.bit.INTSEL = ET_CTRU_CMPA;
EPwmRegs[Num]->ETSEL.bit.INTEN = 1; // Enable INT
EPwmRegs[Num]->ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1 event
}

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Projects/mem_test/src/Peripherals/pwm_init.h Normal file
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@ -0,0 +1,53 @@
/*
* pwm_init.h
*
* Created on: 21 àâã. 2023 ã.
* Author: seklyuts
*/
#include "f28x_project.h"
#ifndef SRC_PWM_INIT_H_
#define SRC_PWM_INIT_H_
#define SYS_PWM_FREQUENCY 100000000.0 //Hz
#define FREQUENCY_BRAKE 200000.0 //Hz
#define FREQUENCY_MOTOR 10000.0 //Hz
#define EPWM_DB_mkS 3.0 //mkS
#define PERIOD_BRAKE (SYS_PWM_FREQUENCY/2/FREQUENCY_BRAKE) //Tic
#define PERIOD_MOTOR (SYS_PWM_FREQUENCY/2/FREQUENCY_MOTOR) //Tic
#define EPWM_DB (EPWM_DB_mkS*SYS_PWM_FREQUENCY/1000000)
#define SDFM_DELAY_mkS 70.0 //mkS
#define SDFM_DELAY (SDFM_DELAY_mkS*SYS_PWM_FREQUENCY/1000000)
#define PERIOD_2 (PERIOD_MOTOR/2)
#define PWM_MAX (PERIOD_MOTOR - EPWM_DB)
#define PWM_MIN EPWM_DB*2
#define INDEPENDED 1
#define COMPLIMENTARY 0
void PWMInit(uint16_t Num, uint16_t Period, uint16_t Independed);
void PWMGpioInit(void);
void PWMInitEnable(void);
void PWMInitInterruptEn(void);
void PWMAllInit(void);
void PWM_ABC_StopAllClose(void);
void PWM_ABC_StartOut(void);
void InitEPwm1Example(void);
void InitEPwm2Example(void);
void InitEPwm3Example(void);
void InitEPwm4Example(void);
void InitEPwm5Example(void);
void InitEPwm6Example(void);
#endif /* SRC_PWM_INIT_H_ */

202
Projects/mem_test/src/Peripherals/pwm_interrupts.c Normal file
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@ -0,0 +1,202 @@
/*
* interrupts.c
*
* Created on: 21 àâã. 2023 ã.
* Author: seklyuts
*/
#include <pwm_init.h>
#include "f28x_project.h"
#include "frm_uart.h"
#include "gpio_init.h"
#include "i2c_init.h"
#include "timer_base.h"
#include "pwm_interrupts.h"
volatile uint16_t AutoChange = 0;
volatile uint16_t PWM_out = 2500;
//volatile uint16_t PWM_motor = PERIOD_2;
uint16_t Fault = 0, Fault_fix = 0, Ready = 0, Ready_Fix = 0;
uint16_t counter1s=0;
uint16_t FaultABC = 0, FaultABCFix = 0;
uint16_t PwmFlagStartADC = 0;
typedef struct
{
int16_t UA;
int16_t UB;
int16_t UC;
}strPWMABC;
volatile strPWMABC PWM_motor = {PERIOD_2, PERIOD_2, PERIOD_2};
//
// epwm1_isr - EPWM1 ISR
//
__interrupt void epwm1_isr(void)
{
// if(AutoChange) pwm_AutoChange(1);
// else
EPwm1Regs.CMPA.bit.CMPA = PWM_out;
//
// Clear INT flag for this timer
//
EPwm1Regs.ETCLR.bit.INT = 1;
MainTimerBaseTimeoutInc();
//
// Acknowledge this interrupt to receive more interrupts from group 3
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
//
// epwm2_isr - EPWM2 ISR
//
__interrupt void epwm2_isr(void)
{
// Gpio57out(1);
// EALLOW;
// Sdfm1Regs.SDDFPARM4.bit.FEN = 1;
// EDIS;
// GpioDataRegs.GPADAT.bit.GPIO0 = 1;
//
// Clear INT flag for this timer
//
EPwm2Regs.ETCLR.bit.INT = 1;
TimerBaseTimeoutInc();
FMSTR_enable_set();
//
// Acknowledge this interrupt to receive more interrupts from group 3
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
// GpioDataRegs.GPADAT.bit.GPIO0 = 0;
// Gpio57out(0);
}
//
// epwm3_isr - EPWM3 ISR
//
__interrupt void epwm3_isr(void)
{
EPwm3Regs.CMPA.bit.CMPA = PERIOD_MOTOR - PWM_motor.UB;
//
// Clear INT flag for this timer
//
EPwm3Regs.ETCLR.bit.INT = 1;
//
// Acknowledge this interrupt to receive more interrupts from group 3
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
__interrupt void epwm4_isr(void)
{
EPwm4Regs.CMPA.bit.CMPA = PERIOD_MOTOR - PWM_motor.UC;
//
// Clear INT flag for this timer
//
EPwm4Regs.ETCLR.bit.INT = 1;
//
// Acknowledge this interrupt to receive more interrupts from group 3
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
__interrupt void epwm5_isr(void)
{
// Ready = GpioDataRegs.GPADAT.bit.GPIO19;
// if(Ready == 0)
// {
// Ready_Fix = 0;
// }
// Fault = !GpioDataRegs.GPADAT.bit.GPIO18;
// if(Fault) Fault_fix = 1;
// if(Fault_fix)
// {
// EPwm5Regs.CMPA.bit.CMPA = PERIOD_BRAKE;
// PWM_out = 0;
// }
// else
// {
EPwm5Regs.CMPA.bit.CMPA = PERIOD_BRAKE - PWM_out;
// }
//
// Clear INT flag for this timer
//
EPwm5Regs.ETCLR.bit.INT = 1;
//
// Acknowledge this interrupt to receive more interrupts from group 3
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
float Volt=0;
__interrupt void epwm6_isr(void)
{
EPwm6Regs.CMPA.bit.CMPA = PERIOD_MOTOR - PWM_out;
//
// Clear INT flag for this timer
//
EPwm6Regs.ETCLR.bit.INT = 1;
//
// Acknowledge this interrupt to receive more interrupts from group 3
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
uint16_t PWM_test = SDFM_DELAY;
__interrupt void epwm11_isr(void)
{
// Gpio55out(1);
EPwm11Regs.CMPA.bit.CMPA = PWM_test;
EPwm11Regs.CMPB.bit.CMPB = PWM_test;
EPwm11Regs.CMPC = PWM_test;
EPwm11Regs.CMPD = PWM_test;
EPwm11Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
// Gpio55out(0);
}
//
// InitEPwm1Example - Initialize EPWM1 configuration
//

25
Projects/mem_test/src/Peripherals/pwm_interrupts.h Normal file
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@ -0,0 +1,25 @@
/*
* pwm_interrupts.h
*
* Created on: 21 àâã. 2023 ã.
* Author: seklyuts
*/
#ifndef SRC_PWM_INTERRUPTS_H_
#define SRC_PWM_INTERRUPTS_H_
__interrupt void epwm1_isr(void);
__interrupt void epwm2_isr(void);
__interrupt void epwm3_isr(void);
__interrupt void epwm4_isr(void);
__interrupt void epwm5_isr(void);
__interrupt void epwm6_isr(void);
__interrupt void epwm11_isr(void);
void pwm_set_volt_3F(float phaseA, float phaseB, float phaseC);
void pwm_clr_PwmFlagStartADC(void);
#endif /* SRC_PWM_INTERRUPTS_H_ */

7
Projects/mem_test/src/init_perif.c
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@ -16,6 +16,7 @@
#include "GD25Q16ETIGR.h" #include "GD25Q16ETIGR.h"
#include "ZD24C02A.h" #include "ZD24C02A.h"
#include "BL25CM1A.h" #include "BL25CM1A.h"
#include "pwm_init.h"
#endif #endif
@ -66,15 +67,21 @@ void InitPerif(void)
// //
// Enable global Interrupts and higher priority real-time debug events: // Enable global Interrupts and higher priority real-time debug events:
// //
#endif #endif
EINT; // Enable Global interrupt INTM EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM ERTM; // Enable Global realtime interrupt DBGM
#ifdef CPU1 #ifdef CPU1
FRMUartInit(); FRMUartInit();
GD25Q16ETIGR_en(); GD25Q16ETIGR_en();
PWMInitEnable();
PWMInitInterruptEn();
PWMAllInit();
#endif #endif
ipc_init(); ipc_init();
Internal_flash_Init(); Internal_flash_Init();
// Bl25cm1a_en(); // Bl25cm1a_en();
} }