Отлажено измерение тока и напряжение
Учтено инвертирование ШИМ в третьей фазе Настроено масштабирование напряжение (вектор напряжения в вольтах, а не в процентах ШИМ) Напряжение моста фильтруется
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<listOptionValue builtIn="false" value="${workspace_loc:/${ProjName}/src}"/>
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<entry excluding="2838x_RAM_combined_lnk_cpu1.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
|
Binary file not shown.
@ -18,7 +18,7 @@
|
||||
#include "init_perif.h"
|
||||
#include "frmmstr_run.h"
|
||||
#include "ExtEEPROM.h"
|
||||
|
||||
#include "adc_init.h"
|
||||
|
||||
void main(void)
|
||||
{
|
||||
@ -26,8 +26,9 @@ void main(void)
|
||||
for(;;)
|
||||
{
|
||||
// asm (" NOP");
|
||||
ExtEEPROM_run();
|
||||
//ExtEEPROM_run();
|
||||
frmmstr_run();
|
||||
adc_run();
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -292,7 +292,7 @@ void InitEPwm8Gpio(void)
|
||||
// Comment out other unwanted lines.
|
||||
//
|
||||
GpioCtrlRegs.GPAPUD.bit.GPIO14 = 1; // Disable pull-up on GPIO14 (EPWM8A)
|
||||
GpioCtrlRegs.GPAPUD.bit.GPIO15 = 1; // Disable pull-up on GPIO15 (EPWM8B)
|
||||
// GpioCtrlRegs.GPAPUD.bit.GPIO15 = 1; // Disable pull-up on GPIO15 (EPWM8B)
|
||||
// GpioCtrlRegs.GPEPUD.bit.GPIO159 = 1; // Disable pull-up on GPIO159 (EPWM8A)
|
||||
// GpioCtrlRegs.GPFPUD.bit.GPIO160 = 1; // Disable pull-up on GPIO160 (EPWM8B)
|
||||
|
||||
@ -302,7 +302,7 @@ void InitEPwm8Gpio(void)
|
||||
// Comment out other unwanted lines.
|
||||
//
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1; // Configure GPIO14 as EPWM8A
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1; // Configure GPIO15 as EPWM8B
|
||||
// GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1; // Configure GPIO15 as EPWM8B
|
||||
// GpioCtrlRegs.GPEMUX2.bit.GPIO159 = 1; // Configure GPIO159 as EPWM8A
|
||||
// GpioCtrlRegs.GPFMUX1.bit.GPIO160 = 1; // Configure GPIO160 as EPWM8B
|
||||
|
||||
|
@ -28,27 +28,27 @@
|
||||
void Bl25cm1a_en(void)
|
||||
{
|
||||
volatile uint16_t empty;
|
||||
Gpio15outSPI_CS_BL25CM1A(0);
|
||||
Gpio_SPI_CS_BL25CM1A(0);
|
||||
transmitData(WREN);
|
||||
while(SpiRegs.SPIFFRX.bit.RXFFST != 1)
|
||||
{
|
||||
|
||||
}
|
||||
Gpio15outSPI_CS_BL25CM1A(1);
|
||||
Gpio_SPI_CS_BL25CM1A(1);
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
}
|
||||
|
||||
uint16_t Bl25cm1a_ReadStatus(void)
|
||||
{
|
||||
volatile uint16_t empty;
|
||||
Gpio15outSPI_CS_BL25CM1A(0);
|
||||
Gpio_SPI_CS_BL25CM1A(0);
|
||||
transmitData(RDSR);
|
||||
transmitData(0xFF);
|
||||
while(SpiRegs.SPIFFRX.bit.RXFFST != 2)
|
||||
{
|
||||
|
||||
}
|
||||
Gpio15outSPI_CS_BL25CM1A(1);
|
||||
Gpio_SPI_CS_BL25CM1A(1);
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
return empty;
|
||||
@ -64,7 +64,7 @@ void Bl25cm1a_read_8_bytes(uint32_t Addr, uint16_t * read_data, uint16_t num_byt
|
||||
{
|
||||
Stat = Bl25cm1a_ReadStatus();
|
||||
}
|
||||
Gpio15outSPI_CS_BL25CM1A(0);
|
||||
Gpio_SPI_CS_BL25CM1A(0);
|
||||
transmitData(READ);
|
||||
transmitData(Addr>>16);
|
||||
transmitData(Addr>>8);
|
||||
@ -74,7 +74,7 @@ void Bl25cm1a_read_8_bytes(uint32_t Addr, uint16_t * read_data, uint16_t num_byt
|
||||
{
|
||||
|
||||
}
|
||||
Gpio15outSPI_CS_BL25CM1A(1);
|
||||
Gpio_SPI_CS_BL25CM1A(1);
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
@ -97,7 +97,7 @@ void Bl25cm1a_write_8_bytes(uint32_t Addr, uint16_t * write_data, uint16_t num_b
|
||||
}
|
||||
|
||||
Bl25cm1a_en();
|
||||
Gpio15outSPI_CS_BL25CM1A(0);
|
||||
Gpio_SPI_CS_BL25CM1A(0);
|
||||
transmitData(WRITE);
|
||||
transmitData(Addr>>16);
|
||||
transmitData(Addr>>8);
|
||||
@ -107,7 +107,7 @@ void Bl25cm1a_write_8_bytes(uint32_t Addr, uint16_t * write_data, uint16_t num_b
|
||||
{
|
||||
|
||||
}
|
||||
Gpio15outSPI_CS_BL25CM1A(1);
|
||||
Gpio_SPI_CS_BL25CM1A(1);
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
@ -129,7 +129,7 @@ uint16_t Bl25cm1a_verify_8_bytes(uint32_t Addr, uint16_t * verify_data, uint16_
|
||||
{
|
||||
Stat = Bl25cm1a_ReadStatus();
|
||||
}
|
||||
Gpio15outSPI_CS_BL25CM1A(0);
|
||||
Gpio_SPI_CS_BL25CM1A(0);
|
||||
transmitData(READ);
|
||||
transmitData(Addr>>16);
|
||||
transmitData(Addr>>8);
|
||||
@ -139,7 +139,7 @@ uint16_t Bl25cm1a_verify_8_bytes(uint32_t Addr, uint16_t * verify_data, uint16_
|
||||
{
|
||||
|
||||
}
|
||||
Gpio15outSPI_CS_BL25CM1A(1);
|
||||
Gpio_SPI_CS_BL25CM1A(1);
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
empty = SpiRegs.SPIRXBUF;
|
||||
|
@ -5,6 +5,88 @@
|
||||
* Author: seklyuts
|
||||
*/
|
||||
|
||||
#include "f28x_project.h"
|
||||
|
||||
Uint16 AdcbResult0;
|
||||
Uint16 AdcbResult1;
|
||||
int16 ADCdiff;
|
||||
Uint16 adc_start = 0;
|
||||
|
||||
__interrupt void adcb1_isr(void)
|
||||
{
|
||||
AdcbResult0 = AdcbResultRegs.ADCRESULT0;
|
||||
AdcbResult1 = AdcbResultRegs.ADCRESULT1;
|
||||
|
||||
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
|
||||
|
||||
ADCdiff = AdcbResult0 - AdcbResult1;
|
||||
//
|
||||
// Acknowledge
|
||||
//
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
|
||||
}
|
||||
|
||||
void ConfigureADC(void)
|
||||
{
|
||||
|
||||
//
|
||||
// Map ISR functions
|
||||
//
|
||||
EALLOW;
|
||||
PieVectTable.ADCB1_INT = &adcb1_isr; //function for ADCA interrupt 1
|
||||
|
||||
PieCtrlRegs.PIEIER1.bit.INTx2 = 1;
|
||||
IER |= M_INT1;
|
||||
//
|
||||
// Write configurations
|
||||
//
|
||||
AdcbRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
|
||||
AdcSetMode(ADC_ADCB, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
|
||||
|
||||
//
|
||||
// Set pulse positions to late
|
||||
//
|
||||
AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;
|
||||
|
||||
AdcbRegs.ADCCTL2.bit.SIGNALMODE = 0;
|
||||
|
||||
//
|
||||
// Power up the ADC
|
||||
//
|
||||
AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;
|
||||
|
||||
//
|
||||
// Delay for 1ms to allow ADC time to power up
|
||||
//
|
||||
DELAY_US(1000);
|
||||
|
||||
|
||||
//ADCB
|
||||
AdcbRegs.ADCSOC0CTL.bit.CHSEL = 0; //SOC0 will convert pin B0
|
||||
AdcbRegs.ADCSOC0CTL.bit.ACQPS = 14; //sample window is acqps +
|
||||
//1 SYSCLK cycles
|
||||
AdcbRegs.ADCSOC1CTL.bit.CHSEL = 1; //SOC1 will convert pin B1
|
||||
AdcbRegs.ADCSOC1CTL.bit.ACQPS = 14; //sample window is acqps +
|
||||
//1 SYSCLK cycles
|
||||
AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 1; //end of SOC1 will set INT1 flag
|
||||
AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable INT1 flag
|
||||
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
|
||||
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
void adc_run(void)
|
||||
{
|
||||
if(adc_start)
|
||||
{
|
||||
adc_start = 0;
|
||||
AdcbRegs.ADCSOCFRC1.all = 0x0003; //SOC0 and SOC1
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void adc_start_set(void)
|
||||
{
|
||||
adc_start = 1;
|
||||
}
|
||||
|
@ -10,6 +10,11 @@
|
||||
|
||||
|
||||
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
void ConfigureADC(void);
|
||||
void adc_run(void);
|
||||
void adc_start_set(void);
|
||||
|
||||
#endif /* SRC_PERIPHERALS_ADC_INIT_H_ */
|
||||
|
@ -9,74 +9,75 @@
|
||||
void GpioInit(void)
|
||||
{
|
||||
EALLOW;
|
||||
// GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 0;
|
||||
// GpioCtrlRegs.GPAGMUX2.bit.GPIO20 = 0;
|
||||
// GpioCtrlRegs.GPADIR.bit.GPIO20 = 1;
|
||||
// GpioDataRegs.GPADAT.bit.GPIO20 = 0;
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO4 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO4 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO4 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 0;
|
||||
// GpioCtrlRegs.GPAGMUX2.bit.GPIO21 = 0;
|
||||
// GpioCtrlRegs.GPADIR.bit.GPIO21 = 1;
|
||||
// GpioDataRegs.GPADAT.bit.GPIO21 = 0;
|
||||
|
||||
GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 0;
|
||||
GpioCtrlRegs.GPAGMUX1.bit.GPIO15 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO15 = 1;
|
||||
GpioDataRegs.GPADAT.bit.GPIO15 = 0;
|
||||
GpioCtrlRegs.GPCMUX2.bit.GPIO95 = 0; // ğåëå ñèëîâîå
|
||||
GpioCtrlRegs.GPCGMUX2.bit.GPIO95 = 0;
|
||||
GpioCtrlRegs.GPCDIR.bit.GPIO95 = 1;
|
||||
GpioDataRegs.GPCDAT.bit.GPIO95 = 1;
|
||||
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO54 = 0;
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO54 = 0;
|
||||
GpioCtrlRegs.GPBDIR.bit.GPIO54 = 1;
|
||||
GpioDataRegs.GPBDAT.bit.GPIO54 = 0;
|
||||
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO55 = 0;
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO55 = 0;
|
||||
GpioCtrlRegs.GPBDIR.bit.GPIO55 = 1;
|
||||
GpioDataRegs.GPBDAT.bit.GPIO55 = 0;
|
||||
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO56 = 0;
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO56 = 0;
|
||||
GpioCtrlRegs.GPBDIR.bit.GPIO56 = 1;
|
||||
GpioDataRegs.GPBDAT.bit.GPIO56 = 0;
|
||||
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO57 = 0;
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO57 = 0;
|
||||
GpioCtrlRegs.GPBDIR.bit.GPIO57 = 1;
|
||||
GpioDataRegs.GPBDAT.bit.GPIO57 = 0;
|
||||
|
||||
|
||||
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0;
|
||||
GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO18 = 0;
|
||||
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0;
|
||||
GpioCtrlRegs.GPAGMUX2.bit.GPIO19 = 0;
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO19 = 0;
|
||||
|
||||
GpioCtrlRegs.GPCMUX2.bit.GPIO90 = 0;
|
||||
GpioCtrlRegs.GPCGMUX2.bit.GPIO90 = 0;
|
||||
GpioCtrlRegs.GPCDIR.bit.GPIO90 = 0;
|
||||
|
||||
GpioCtrlRegs.GPCMUX2.bit.GPIO92 = 0;
|
||||
GpioCtrlRegs.GPCGMUX2.bit.GPIO92 = 0;
|
||||
GpioCtrlRegs.GPCDIR.bit.GPIO92 = 0;
|
||||
|
||||
GpioCtrlRegs.GPCMUX2.bit.GPIO94 = 0;
|
||||
GpioCtrlRegs.GPCGMUX2.bit.GPIO94 = 0;
|
||||
GpioCtrlRegs.GPCDIR.bit.GPIO94 = 0;
|
||||
|
||||
GpioCtrlRegs.GPDMUX2.bit.GPIO127 = 0;
|
||||
GpioCtrlRegs.GPDGMUX2.bit.GPIO127 = 0;
|
||||
GpioCtrlRegs.GPDDIR.bit.GPIO127 = 0;
|
||||
|
||||
GpioCtrlRegs.GPEMUX2.bit.GPIO147 = 0;
|
||||
GpioCtrlRegs.GPEGMUX2.bit.GPIO147 = 0;
|
||||
GpioCtrlRegs.GPEDIR.bit.GPIO147 = 0;
|
||||
|
||||
GpioCtrlRegs.GPDMUX1.bit.GPIO104 = 0;
|
||||
GpioCtrlRegs.GPDGMUX1.bit.GPIO104 = 0;
|
||||
GpioCtrlRegs.GPDDIR.bit.GPIO104 = 0;
|
||||
GpioCtrlRegs.GPCMUX1.bit.GPIO64 = 0;//FaultPWM
|
||||
GpioCtrlRegs.GPCGMUX1.bit.GPIO64 = 0;
|
||||
GpioCtrlRegs.GPCDIR.bit.GPIO64 = 0;
|
||||
GpioDataRegs.GPCDAT.bit.GPIO64 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPBMUX2.bit.GPIO55 = 0;
|
||||
// GpioCtrlRegs.GPBGMUX2.bit.GPIO55 = 0;
|
||||
// GpioCtrlRegs.GPBDIR.bit.GPIO55 = 1;
|
||||
// GpioDataRegs.GPBDAT.bit.GPIO55 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPBMUX2.bit.GPIO56 = 0;
|
||||
// GpioCtrlRegs.GPBGMUX2.bit.GPIO56 = 0;
|
||||
// GpioCtrlRegs.GPBDIR.bit.GPIO56 = 1;
|
||||
// GpioDataRegs.GPBDAT.bit.GPIO56 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPBMUX2.bit.GPIO57 = 0;
|
||||
// GpioCtrlRegs.GPBGMUX2.bit.GPIO57 = 0;
|
||||
// GpioCtrlRegs.GPBDIR.bit.GPIO57 = 1;
|
||||
// GpioDataRegs.GPBDAT.bit.GPIO57 = 0;
|
||||
//
|
||||
//
|
||||
//
|
||||
// GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0;
|
||||
// GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0;
|
||||
// GpioCtrlRegs.GPADIR.bit.GPIO18 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0;
|
||||
// GpioCtrlRegs.GPAGMUX2.bit.GPIO19 = 0;
|
||||
// GpioCtrlRegs.GPADIR.bit.GPIO19 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPCMUX2.bit.GPIO90 = 0;
|
||||
// GpioCtrlRegs.GPCGMUX2.bit.GPIO90 = 0;
|
||||
// GpioCtrlRegs.GPCDIR.bit.GPIO90 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPCMUX2.bit.GPIO92 = 0;
|
||||
// GpioCtrlRegs.GPCGMUX2.bit.GPIO92 = 0;
|
||||
// GpioCtrlRegs.GPCDIR.bit.GPIO92 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPCMUX2.bit.GPIO94 = 0;
|
||||
// GpioCtrlRegs.GPCGMUX2.bit.GPIO94 = 0;
|
||||
// GpioCtrlRegs.GPCDIR.bit.GPIO94 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPDMUX2.bit.GPIO127 = 0;
|
||||
// GpioCtrlRegs.GPDGMUX2.bit.GPIO127 = 0;
|
||||
// GpioCtrlRegs.GPDDIR.bit.GPIO127 = 0;
|
||||
//
|
||||
// GpioCtrlRegs.GPEMUX2.bit.GPIO147 = 0;
|
||||
// GpioCtrlRegs.GPEGMUX2.bit.GPIO147 = 0;
|
||||
// GpioCtrlRegs.GPEDIR.bit.GPIO147 = 0;
|
||||
//
|
||||
GpioCtrlRegs.GPDMUX1.bit.GPIO103 = 0;
|
||||
GpioCtrlRegs.GPDGMUX1.bit.GPIO103 = 0;
|
||||
GpioCtrlRegs.GPDDIR.bit.GPIO103 = 1;
|
||||
GpioDataRegs.GPDDAT.bit.GPIO103 = 0;
|
||||
|
||||
EDIS;
|
||||
}
|
||||
@ -91,14 +92,10 @@ void GpioInit(void)
|
||||
// GpioDataRegs.GPADAT.bit.GPIO21 = out_bit;
|
||||
//}
|
||||
|
||||
void Gpio15outSPI_CS_BL25CM1A(uint16_t out_bit)
|
||||
{
|
||||
GpioDataRegs.GPADAT.bit.GPIO15 = out_bit;
|
||||
}
|
||||
|
||||
void Gpio54out(uint16_t out_bit)
|
||||
void Gpio4out(uint16_t out_bit)
|
||||
{
|
||||
GpioDataRegs.GPBDAT.bit.GPIO54 = out_bit;
|
||||
GpioDataRegs.GPADAT.bit.GPIO4 = out_bit;
|
||||
}
|
||||
|
||||
void Gpio55out(uint16_t out_bit)
|
||||
@ -115,3 +112,8 @@ void Gpio57out(uint16_t out_bit)
|
||||
{
|
||||
GpioDataRegs.GPBDAT.bit.GPIO57 = out_bit;
|
||||
}
|
||||
|
||||
void Gpio95out(uint16_t out_bit)
|
||||
{
|
||||
GpioDataRegs.GPCDAT.bit.GPIO95 = out_bit;
|
||||
}
|
||||
|
@ -9,20 +9,26 @@
|
||||
#define SRC_GPIO_INIT_H_
|
||||
|
||||
|
||||
#define FaultAL !GpioDataRegs.GPCDAT.bit.GPIO90
|
||||
#define FaultAH !GpioDataRegs.GPCDAT.bit.GPIO92
|
||||
#define FaultBL !GpioDataRegs.GPCDAT.bit.GPIO94
|
||||
#define FaultBH !GpioDataRegs.GPDDAT.bit.GPIO127
|
||||
#define FaultCL !GpioDataRegs.GPEDAT.bit.GPIO147
|
||||
#define FaultCH !GpioDataRegs.GPDDAT.bit.GPIO104
|
||||
|
||||
//#define FaultAL !GpioDataRegs.GPCDAT.bit.GPIO90
|
||||
//#define FaultAH !GpioDataRegs.GPCDAT.bit.GPIO92
|
||||
//#define FaultBL !GpioDataRegs.GPCDAT.bit.GPIO94
|
||||
//#define FaultBH !GpioDataRegs.GPDDAT.bit.GPIO127
|
||||
//#define FaultCL !GpioDataRegs.GPEDAT.bit.GPIO147
|
||||
//#define FaultCH !GpioDataRegs.GPDDAT.bit.GPIO104
|
||||
|
||||
#define FaultPWM !GpioDataRegs.GPCDAT.bit.GPIO64
|
||||
|
||||
|
||||
|
||||
void GpioInit(void);
|
||||
//void Gpio20out(uint16_t out_bit);
|
||||
//void Gpio21out(uint16_t out_bit);
|
||||
void Gpio15outSPI_CS_BL25CM1A(uint16_t out_bit);
|
||||
void Gpio54out(uint16_t out_bit);
|
||||
void Gpio_SPI_CS_BL25CM1A(uint16_t out_bit);
|
||||
void Gpio4out(uint16_t out_bit);
|
||||
void Gpio55out(uint16_t out_bit);
|
||||
void Gpio56out(uint16_t out_bit);
|
||||
void Gpio57out(uint16_t out_bit);
|
||||
void Gpio95out(uint16_t out_bit);
|
||||
|
||||
#endif /* SRC_GPIO_INIT_H_ */
|
||||
|
@ -14,7 +14,11 @@
|
||||
#define COUNT_UP 1
|
||||
#define COUNT_DOWN 0
|
||||
|
||||
volatile struct EPWM_REGS * EPwmRegs[17] = {NULL, &EPwm1Regs, &EPwm2Regs, &EPwm3Regs, &EPwm4Regs, &EPwm5Regs, &EPwm6Regs, &EPwm7Regs, &EPwm8Regs, &EPwm9Regs, &EPwm10Regs, &EPwm11Regs, &EPwm12Regs, &EPwm13Regs, &EPwm14Regs, &EPwm15Regs, &EPwm16Regs};
|
||||
volatile struct EPWM_REGS * EPwmRegs[17] = {NULL, &EPwm1Regs, &EPwm2Regs, &EPwm3Regs, &EPwm4Regs, &EPwm5Regs, &EPwm6Regs, &EPwm7Regs, &EPwm8Regs, &EPwm9Regs, &EPwm10Regs,
|
||||
&EPwm11Regs, &EPwm12Regs, &EPwm13Regs, &EPwm14Regs, &EPwm15Regs, &EPwm16Regs};
|
||||
|
||||
|
||||
|
||||
uint32_t EPwmTimerIntCount[17];
|
||||
uint16_t EPwm_DB_Direction[17];
|
||||
volatile uint16_t PwmBrake100 = PERIOD_BRAKE;
|
||||
@ -27,24 +31,24 @@ volatile uint16_t PwmMotor100 = PERIOD_MOTOR;
|
||||
void PWM_ABC_StopAllClose(void)
|
||||
{
|
||||
EALLOW;
|
||||
EPwm2Regs.TZCTL.bit.TZA = 2;
|
||||
EPwm2Regs.TZCTL.bit.TZB = 2;
|
||||
EPwm3Regs.TZCTL.bit.TZA = 2;
|
||||
EPwm3Regs.TZCTL.bit.TZB = 2;
|
||||
EPwm4Regs.TZCTL.bit.TZA = 2;
|
||||
EPwm4Regs.TZCTL.bit.TZB = 2;
|
||||
EPwmRegs[PWM_A]->TZCTL.bit.TZA = 2;
|
||||
EPwmRegs[PWM_A]->TZCTL.bit.TZB = 2;
|
||||
EPwmRegs[PWM_B]->TZCTL.bit.TZA = 2;
|
||||
EPwmRegs[PWM_B]->TZCTL.bit.TZB = 2;
|
||||
EPwmRegs[PWM_C]->TZCTL.bit.TZA = 2;
|
||||
EPwmRegs[PWM_C]->TZCTL.bit.TZB = 2;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
void PWM_ABC_StartOut(void)
|
||||
{
|
||||
EALLOW;
|
||||
EPwm2Regs.TZCTL.bit.TZA = 3;
|
||||
EPwm2Regs.TZCTL.bit.TZB = 3;
|
||||
EPwm3Regs.TZCTL.bit.TZA = 3;
|
||||
EPwm3Regs.TZCTL.bit.TZB = 3;
|
||||
EPwm4Regs.TZCTL.bit.TZA = 3;
|
||||
EPwm4Regs.TZCTL.bit.TZB = 3;
|
||||
EPwmRegs[PWM_A]->TZCTL.bit.TZA = 3;
|
||||
EPwmRegs[PWM_A]->TZCTL.bit.TZB = 3;
|
||||
EPwmRegs[PWM_B]->TZCTL.bit.TZA = 3;
|
||||
EPwmRegs[PWM_B]->TZCTL.bit.TZB = 3;
|
||||
EPwmRegs[PWM_C]->TZCTL.bit.TZA = 3;
|
||||
EPwmRegs[PWM_C]->TZCTL.bit.TZB = 3;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
@ -61,13 +65,14 @@ void PWMAllInit(void)
|
||||
PwmBrake100 = PERIOD_BRAKE;
|
||||
PwmMotor100 = PERIOD_MOTOR;
|
||||
|
||||
PWMInit(1, PwmMotor100, INDEPENDED);
|
||||
PWMInit(2, PwmMotor100, COMPLIMENTARY);
|
||||
PWMInit(3, PwmMotor100, COMPLIMENTARY);
|
||||
PWMInit(4, PwmMotor100, COMPLIMENTARY);
|
||||
PWMInit(5, PwmBrake100, INDEPENDED);
|
||||
PWMInit(6, PwmMotor100, COMPLIMENTARY);
|
||||
PWMInit(1, PwmMotor100, INDEPENDED); //ñ÷¸ò÷èê îáùåãî íàçíà÷åíèÿ
|
||||
PWMInit(PWM_A, PwmMotor100, COMPLIMENTARY);//ØÈÌ
|
||||
PWMInit(PWM_B, PwmMotor100, COMPLIMENTARY);//ØÈÌ
|
||||
PWMInit(PWM_C, PwmMotor100, COMPLIMENTARY);//ØÈÌ
|
||||
PWMInit(PWM_BRAKE, PwmBrake100, INDEPENDED);//Òîðìîç
|
||||
// PWMInit(6, PwmMotor100, COMPLIMENTARY);
|
||||
|
||||
//11 è 12 äëÿ SDFM
|
||||
PWMInit(11, PwmMotor100, INDEPENDED);
|
||||
PWMInit(12, PwmMotor100, INDEPENDED);
|
||||
|
||||
@ -81,38 +86,39 @@ void PWMAllInit(void)
|
||||
EPwm12Regs.CMPB.bit.CMPB = SDFM_DELAY;
|
||||
|
||||
EALLOW;
|
||||
EPwm2Regs.TZCTL.bit.TZA = 2;
|
||||
EPwm2Regs.TZCTL.bit.TZB = 2;
|
||||
EPwm3Regs.TZCTL.bit.TZA = 2;
|
||||
EPwm3Regs.TZCTL.bit.TZB = 2;
|
||||
EPwm4Regs.TZCTL.bit.TZA = 2;
|
||||
EPwm4Regs.TZCTL.bit.TZB = 2;
|
||||
EPwmRegs[PWM_A]->TZCTL.bit.TZA = 2;
|
||||
EPwmRegs[PWM_A]->TZCTL.bit.TZB = 2;
|
||||
EPwmRegs[PWM_B]->TZCTL.bit.TZA = 2;
|
||||
EPwmRegs[PWM_B]->TZCTL.bit.TZB = 2;
|
||||
EPwmRegs[PWM_C]->TZCTL.bit.TZA = 2;
|
||||
EPwmRegs[PWM_C]->TZCTL.bit.TZB = 2;
|
||||
EDIS;
|
||||
|
||||
EALLOW;
|
||||
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
|
||||
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;// ñèíõðîííûé çàïóñê òàéìåðîâ
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
void PWMGpioInit(void)
|
||||
void PWMGpioInit(void)//Òóò â áèáëèîòå÷íîì ôàéëå âðó÷íóþ ïðîâåðÿåì ÷òî ïèíû òå êîòîðûå íàäî ïî ñõåìå
|
||||
{
|
||||
InitEPwm2Gpio();
|
||||
InitEPwm3Gpio();
|
||||
InitEPwm4Gpio();
|
||||
InitEPwm5Gpio();
|
||||
InitEPwm6Gpio();
|
||||
InitEPwm11Gpio();
|
||||
InitEPwm7Gpio();
|
||||
InitEPwm8Gpio();
|
||||
|
||||
// InitEPwm11Gpio();
|
||||
}
|
||||
|
||||
void PWMInitEnable(void)
|
||||
{
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM1=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM2=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM3=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM4=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM5=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM6=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM7=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM8=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM11=1;
|
||||
CpuSysRegs.PCLKCR2.bit.EPWM12=1;
|
||||
}
|
||||
|
||||
void PWMInitInterruptEn(void)
|
||||
@ -125,8 +131,7 @@ void PWMInitInterruptEn(void)
|
||||
PieVectTable.EPWM2_INT = &epwm2_isr;
|
||||
PieVectTable.EPWM3_INT = &epwm3_isr;
|
||||
PieVectTable.EPWM4_INT = &epwm4_isr;
|
||||
PieVectTable.EPWM5_INT = &epwm5_isr;
|
||||
PieVectTable.EPWM6_INT = &epwm6_isr;
|
||||
PieVectTable.EPWM8_INT = &epwm8_isr;
|
||||
PieVectTable.EPWM11_INT = &epwm11_isr;
|
||||
EDIS; // This is needed to disable write to EALLOW protected registers
|
||||
|
||||
@ -138,12 +143,11 @@ void PWMInitInterruptEn(void)
|
||||
//
|
||||
// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3 (page 150)
|
||||
//
|
||||
// PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
|
||||
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
|
||||
PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
|
||||
// PieCtrlRegs.PIEIER3.bit.INTx3 = 1;
|
||||
// PieCtrlRegs.PIEIER3.bit.INTx4 = 1;
|
||||
PieCtrlRegs.PIEIER3.bit.INTx5 = 1;
|
||||
PieCtrlRegs.PIEIER3.bit.INTx6 = 1;
|
||||
|
||||
PieCtrlRegs.PIEIER3.bit.INTx8 = 1;
|
||||
|
||||
PieCtrlRegs.PIEIER3.bit.INTx11 = 1;
|
||||
}
|
||||
|
||||
|
@ -14,22 +14,27 @@
|
||||
|
||||
#define FREQUENCY_BRAKE 200000.0 //Hz
|
||||
#define FREQUENCY_MOTOR 10000.0 //Hz
|
||||
#define EPWM_DB_mkS 3.0 //mkS
|
||||
#define EPWM_DB_mkS 6.0 //mkS
|
||||
|
||||
#define PERIOD_BRAKE (SYS_PWM_FREQUENCY/2/FREQUENCY_BRAKE) //Tic
|
||||
#define PERIOD_MOTOR (SYS_PWM_FREQUENCY/2/FREQUENCY_MOTOR) //Tic
|
||||
#define PERIOD_BRAKE (SYS_PWM_FREQUENCY/2.0/FREQUENCY_BRAKE) //Tic
|
||||
#define PERIOD_MOTOR (SYS_PWM_FREQUENCY/2.0/FREQUENCY_MOTOR) //Tic
|
||||
|
||||
#define EPWM_DB (EPWM_DB_mkS*SYS_PWM_FREQUENCY/1000000)
|
||||
|
||||
#define SDFM_DELAY_mkS 70.0 //mkS
|
||||
#define SDFM_DELAY_mkS 50.0 //mkS
|
||||
#define SDFM_DELAY (SDFM_DELAY_mkS*SYS_PWM_FREQUENCY/1000000)
|
||||
|
||||
#define PERIOD_2 (PERIOD_MOTOR/2)
|
||||
#define PERIOD_2 (PERIOD_MOTOR/2.0)
|
||||
#define PWM_MAX (PERIOD_MOTOR - EPWM_DB)
|
||||
#define PWM_MIN EPWM_DB*2
|
||||
#define INDEPENDED 1
|
||||
#define COMPLIMENTARY 0
|
||||
|
||||
#define PWM_A 5
|
||||
#define PWM_B 2
|
||||
#define PWM_C 7
|
||||
|
||||
#define PWM_BRAKE 8
|
||||
|
||||
void PWMInit(uint16_t Num, uint16_t Period, uint16_t Independed);
|
||||
void PWMGpioInit(void);
|
||||
|
@ -14,6 +14,8 @@
|
||||
#include "vector.h"
|
||||
#include "pwm_interrupts.h"
|
||||
#include "sdfm.h"
|
||||
#include "adc_init.h"
|
||||
#include <pwm_init.h>
|
||||
|
||||
|
||||
volatile uint16_t AutoChange = 0;
|
||||
@ -23,6 +25,7 @@ uint16_t Fault = 0, Fault_fix = 0, Ready = 0, Ready_Fix = 0;
|
||||
uint16_t counter1s=0;
|
||||
uint16_t FaultABC = 0, FaultABCFix = 0;
|
||||
uint16_t PwmFlagStartADC = 0;
|
||||
extern volatile struct EPWM_REGS * EPwmRegs[17];
|
||||
|
||||
typedef struct
|
||||
{
|
||||
@ -34,14 +37,17 @@ typedef struct
|
||||
volatile strPWMABC PWM_motor = {PERIOD_2, PERIOD_2, PERIOD_2};
|
||||
|
||||
|
||||
void pwm_set_volt_3F(float phaseA, float phaseB, float phaseC)
|
||||
void pwm_set_volt_3F(float phaseA, float phaseB, float phaseC, float Udc)
|
||||
{
|
||||
int16_t A,B,C;
|
||||
|
||||
A = (int16_t)(phaseA*(PERIOD_2/100.0));
|
||||
B = (int16_t)(phaseB*(PERIOD_2/100.0));
|
||||
C = (int16_t)(phaseC*(PERIOD_2/100.0));
|
||||
Gpio4out(1);
|
||||
|
||||
A = (int16_t)((phaseA/Udc)*PERIOD_2);
|
||||
B = (int16_t)((phaseB/Udc)*PERIOD_2);
|
||||
C = (int16_t)((phaseC/Udc)*PERIOD_2);
|
||||
|
||||
Gpio4out(0);
|
||||
|
||||
if(A > 0) A+= EPWM_DB/2;
|
||||
else if(A < 0) A-= EPWM_DB/2;
|
||||
@ -52,9 +58,9 @@ void pwm_set_volt_3F(float phaseA, float phaseB, float phaseC)
|
||||
|
||||
PWM_motor.UA = PERIOD_2 + A;
|
||||
PWM_motor.UB = PERIOD_2 + B;
|
||||
PWM_motor.UC = PERIOD_2 + C;
|
||||
PWM_motor.UC = PERIOD_2 - C;
|
||||
|
||||
FaultABC = (FaultAL + (FaultAH<<1) + (FaultBL<<2) + (FaultBH<<3) + (FaultCL<<4) + (FaultCH<<5) );
|
||||
FaultABC = 0;//(FaultPWM);
|
||||
if(FaultABC) FaultABCFix = FaultABC;
|
||||
|
||||
if((FaultABC)||(FaultABCFix))
|
||||
@ -66,9 +72,9 @@ void pwm_set_volt_3F(float phaseA, float phaseB, float phaseC)
|
||||
vectorFault();
|
||||
}
|
||||
|
||||
EPwm2Regs.CMPA.bit.CMPA = PERIOD_MOTOR - PWM_motor.UA;
|
||||
EPwm3Regs.CMPA.bit.CMPA = PERIOD_MOTOR - PWM_motor.UB;
|
||||
EPwm4Regs.CMPA.bit.CMPA = PERIOD_MOTOR - PWM_motor.UC;
|
||||
EPwmRegs[PWM_A]->CMPA.bit.CMPA = PERIOD_MOTOR - PWM_motor.UA;
|
||||
EPwmRegs[PWM_B]->CMPA.bit.CMPA = PERIOD_MOTOR - PWM_motor.UB;
|
||||
EPwmRegs[PWM_C]->CMPA.bit.CMPA = PERIOD_MOTOR - PWM_motor.UC;
|
||||
|
||||
}
|
||||
|
||||
@ -100,10 +106,12 @@ __interrupt void epwm1_isr(void)
|
||||
//
|
||||
// epwm2_isr - EPWM2 ISR
|
||||
//
|
||||
uint32_t Test_ADC_PWM_Synch1=0, Test_ADC_PWM_Synch2=0;
|
||||
uint16_t TestStopSync = 0;
|
||||
|
||||
__interrupt void epwm2_isr(void)
|
||||
{
|
||||
Gpio57out(1);
|
||||
// Gpio57out(1);
|
||||
|
||||
// EALLOW;
|
||||
// Sdfm1Regs.SDDFPARM4.bit.FEN = 1;
|
||||
@ -120,14 +128,23 @@ __interrupt void epwm2_isr(void)
|
||||
{
|
||||
PwmFlagStartADC = 0;
|
||||
FMSTR_enable_set();
|
||||
adc_start_set();
|
||||
PWM_ABC_StopAllClose();
|
||||
PWM_motor.UA = PERIOD_2;
|
||||
PWM_motor.UB = PERIOD_2;
|
||||
PWM_motor.UC = PERIOD_2;
|
||||
vectorFault();
|
||||
Test_ADC_PWM_Synch1++;
|
||||
if(TestStopSync == 2) TestStopSync = 3;
|
||||
}
|
||||
|
||||
else Test_ADC_PWM_Synch2++;
|
||||
//
|
||||
// Acknowledge this interrupt to receive more interrupts from group 3
|
||||
//
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
|
||||
// Gpio4out(1);
|
||||
// GpioDataRegs.GPADAT.bit.GPIO0 = 0;
|
||||
Gpio57out(0);
|
||||
// Gpio57out(0);
|
||||
|
||||
}
|
||||
|
||||
@ -166,7 +183,7 @@ __interrupt void epwm4_isr(void)
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
|
||||
}
|
||||
|
||||
__interrupt void epwm5_isr(void)
|
||||
__interrupt void epwm8_isr(void)
|
||||
{
|
||||
// Ready = GpioDataRegs.GPADAT.bit.GPIO19;
|
||||
// if(Ready == 0)
|
||||
@ -182,13 +199,13 @@ __interrupt void epwm5_isr(void)
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
EPwm5Regs.CMPA.bit.CMPA = PERIOD_BRAKE - PWM_out;
|
||||
EPwm8Regs.CMPA.bit.CMPA = PERIOD_BRAKE - PWM_out;
|
||||
// }
|
||||
|
||||
//
|
||||
// Clear INT flag for this timer
|
||||
//
|
||||
EPwm5Regs.ETCLR.bit.INT = 1;
|
||||
EPwm8Regs.ETCLR.bit.INT = 1;
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt to receive more interrupts from group 3
|
||||
@ -224,19 +241,19 @@ uint16_t PWM_test = SDFM_DELAY;
|
||||
__interrupt void epwm11_isr(void)
|
||||
{
|
||||
|
||||
// Gpio55out(1);
|
||||
|
||||
|
||||
EPwm11Regs.CMPA.bit.CMPA = PWM_test;
|
||||
EPwm11Regs.CMPB.bit.CMPB = PWM_test;
|
||||
EPwm11Regs.CMPC = PWM_test;
|
||||
EPwm11Regs.CMPD = PWM_test;
|
||||
|
||||
sdfm_start_conversion_current();
|
||||
if(TestStopSync != 3) sdfm_start_conversion_current();
|
||||
|
||||
PwmFlagStartADC = 1;
|
||||
EPwm11Regs.ETCLR.bit.INT = 1;
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
|
||||
// Gpio55out(0);
|
||||
// Gpio4out(0);
|
||||
}
|
||||
|
||||
|
||||
|
@ -14,10 +14,10 @@ __interrupt void epwm1_isr(void);
|
||||
__interrupt void epwm2_isr(void);
|
||||
__interrupt void epwm3_isr(void);
|
||||
__interrupt void epwm4_isr(void);
|
||||
__interrupt void epwm5_isr(void);
|
||||
__interrupt void epwm8_isr(void);
|
||||
__interrupt void epwm6_isr(void);
|
||||
__interrupt void epwm11_isr(void);
|
||||
void pwm_set_volt_3F(float phaseA, float phaseB, float phaseC);
|
||||
void pwm_set_volt_3F(float phaseA, float phaseB, float phaseC, float Udc);
|
||||
void pwm_clr_PwmFlagStartADC(void);
|
||||
|
||||
|
||||
|
@ -91,7 +91,7 @@ volatile int16 * SdfmReadData[8] = {
|
||||
|
||||
int16_t sdfmAdc[8] = {0,0,0,0,0,0,0,0};
|
||||
int16_t sdfmAdcErr[8] = {0,0,0,0,0,0,0,0};
|
||||
int16_t sdfmOffset[8] = {0,0,0,0,0,0,0,0};
|
||||
int16_t sdfmOffset[8] = {0,0,0,0,0,-10,0,0};
|
||||
uint16_t startInitCurrent = 0;
|
||||
uint16_t initDone[8] = {WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM};
|
||||
uint16_t sdfmIndex = 0;
|
||||
@ -105,7 +105,7 @@ __interrupt void Sdfm2_ISR(void);
|
||||
|
||||
volatile float CurrentFactorBrake = FACTOR_CURRENT_BRAKE*32767.0;
|
||||
volatile float CurrentFactorMotor = FACTOR_CURRENT_MOTOR*32767.0;
|
||||
volatile float VdcFactor = FACTOR_VDC;
|
||||
|
||||
|
||||
|
||||
|
||||
@ -122,7 +122,7 @@ void SdfmGpioInit(void)
|
||||
EALLOW;
|
||||
|
||||
GPIO_SetupPinOptions(16, GPIO_INPUT, GPIO_ASYNC);
|
||||
GPIO_SetupPinMux(16,GPIO_MUX_CPU1,7); //SDFM-1 Channel 1 Data Input (brake)
|
||||
GPIO_SetupPinMux(16,GPIO_MUX_CPU1,7); //SDFM-1 Channel 1 Data Input (Iu)a
|
||||
GPIO_SetupPinOptions(17, GPIO_INPUT, GPIO_ASYNC);
|
||||
GPIO_SetupPinMux(17,GPIO_MUX_CPU1,7); //SDFM-1 Channel 1 Clock Input
|
||||
|
||||
@ -142,7 +142,7 @@ void SdfmGpioInit(void)
|
||||
GPIO_SetupPinMux(59,GPIO_MUX_CPU1,7); //SDFM-2 Channel 2 Clock Input
|
||||
|
||||
GPIO_SetupPinOptions(60, GPIO_INPUT, GPIO_ASYNC);
|
||||
GPIO_SetupPinMux(60,GPIO_MUX_CPU1,7); //SDFM-2 Channel 3 Data Input (Iu)a
|
||||
GPIO_SetupPinMux(60,GPIO_MUX_CPU1,7); //SDFM-2 Channel 3 Data Input (brake)
|
||||
GPIO_SetupPinOptions(61, GPIO_INPUT, GPIO_ASYNC);
|
||||
GPIO_SetupPinMux(61,GPIO_MUX_CPU1,7); //SDFM-2 Channel 3 Clock Input
|
||||
|
||||
@ -204,6 +204,7 @@ void SdfmInit(void)
|
||||
Sdfm_configureInputCtrl(SDFM2, FILTER2, MODE_0);
|
||||
Sdfm_configureInputCtrl(SDFM2, FILTER3, MODE_0);
|
||||
Sdfm_configureInputCtrl(SDFM2, FILTER4, MODE_0);
|
||||
|
||||
//
|
||||
// Comparator Module
|
||||
//
|
||||
@ -301,31 +302,28 @@ void SdfmInit(void)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void sdfmGet(uint16_t N)
|
||||
{
|
||||
uint16_t i = 0;
|
||||
int32_t OffsetCount = 0;
|
||||
|
||||
if(N == SDFM_IA) Gpio54out(1);
|
||||
if(N == SDFM_IB) Gpio55out(1);
|
||||
if(N == SDFM_IC) Gpio56out(1);
|
||||
// Gpio4out(1);
|
||||
|
||||
FilterResult[N][loopCounter[N]] = *SdfmReadData[N];
|
||||
sdfmAdc[N] = FilterResult[N][loopCounter[N]] - sdfmOffset[N];
|
||||
if(loopCounter[N] < MAX_SAMPLES) loopCounter[N]++;
|
||||
else
|
||||
{
|
||||
loopCounter[N] = 0;
|
||||
if(!initDone[N])
|
||||
if(N != 5) {
|
||||
if(loopCounter[N] < MAX_SAMPLES) loopCounter[N]++;
|
||||
else
|
||||
{
|
||||
for(i = 0; i <= (MAX_SAMPLES-1); i++) OffsetCount += FilterResult[N][i];
|
||||
sdfmOffset[N] = OffsetCount>>FILTER_BIT;
|
||||
initDone[N] = 0xFF;
|
||||
loopCounter[N] = 0;
|
||||
if(!initDone[N])
|
||||
{
|
||||
for(i = 0; i <= (MAX_SAMPLES-1); i++) OffsetCount += FilterResult[N][i];
|
||||
sdfmOffset[N] = OffsetCount>>FILTER_BIT;
|
||||
initDone[N] = 0xFF;
|
||||
}
|
||||
else if(initDone[N] != 0xFF) initDone[N]--;
|
||||
}
|
||||
else if(initDone[N] != 0xFF) initDone[N]--;
|
||||
}
|
||||
EALLOW;
|
||||
SDCPARM_Reg_arr[N]->bit.MFIE = 1;
|
||||
@ -333,9 +331,11 @@ void sdfmGet(uint16_t N)
|
||||
EDIS;
|
||||
sdfmAdcErr[N] = 0;
|
||||
|
||||
if(N == SDFM_IA) Gpio54out(0);
|
||||
if(N == SDFM_IB) Gpio55out(0);
|
||||
if(N == SDFM_IC) Gpio56out(0);
|
||||
// Gpio4out(0);
|
||||
|
||||
// if(N == SDFM_IA) Gpio54out(0);
|
||||
// if(N == SDFM_IB) Gpio55out(0);
|
||||
// if(N == SDFM_IC) Gpio56out(0);
|
||||
}
|
||||
|
||||
|
||||
@ -356,10 +356,8 @@ sdfm_check_all_current_measurements_was_done(void)
|
||||
{
|
||||
if((sdfmIndex & SDFM_ALL_CURRENTS) == SDFM_ALL_CURRENTS)
|
||||
{
|
||||
Gpio15outSPI_CS_BL25CM1A(1);
|
||||
sdfmIndex = 0;
|
||||
vectorControl(sdfmAdc[SDFM_IA],sdfmAdc[SDFM_IB],sdfmAdc[SDFM_IC]);
|
||||
Gpio15outSPI_CS_BL25CM1A(0);
|
||||
vectorControl(sdfmAdc[SDFM_IA],sdfmAdc[SDFM_IB],sdfmAdc[SDFM_IC],sdfmAdc[SDFM_U_DC]);
|
||||
}
|
||||
}
|
||||
|
||||
@ -367,7 +365,7 @@ sdfm_check_all_current_measurements_was_done(void)
|
||||
__interrupt void Sdfm1_ISR(void)
|
||||
{
|
||||
uint16_t i;
|
||||
uint16_t IntFlags;
|
||||
uint32_t IntFlags;
|
||||
|
||||
IntFlags = Sdfm_readFlagRegister(SDFM1);
|
||||
sdfmIndex |= (IntFlags & 0xF000)>>12;
|
||||
@ -401,6 +399,7 @@ uint32_t IntFlags;
|
||||
void sdfm_start_conversion_current(void)
|
||||
{
|
||||
sdfmIndex = 0;
|
||||
|
||||
EALLOW;
|
||||
Sdfm1Regs.SDIFLGCLR.all = 0xFFFFFFFF;
|
||||
Sdfm2Regs.SDIFLGCLR.all = 0xFFFFFFFF;
|
||||
@ -410,6 +409,8 @@ void sdfm_start_conversion_current(void)
|
||||
SDDFPARM_Reg_arr[SDFM_IB]->bit.AE = 1;
|
||||
SDCPARM_Reg_arr[SDFM_IC]->bit.MFIE = 1;
|
||||
SDDFPARM_Reg_arr[SDFM_IC]->bit.AE = 1;
|
||||
SDCPARM_Reg_arr[SDFM_U_DC]->bit.MFIE = 1;
|
||||
SDDFPARM_Reg_arr[SDFM_U_DC]->bit.AE = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
@ -8,23 +8,24 @@
|
||||
#ifndef SRC_SDFM_H_
|
||||
#define SRC_SDFM_H_
|
||||
|
||||
#define SDFM_IA 6
|
||||
#define SDFM_IB 3
|
||||
#define SDFM_IC 4
|
||||
#define SDFM_IA 0//16, 17
|
||||
#define SDFM_IB 3//22, 23
|
||||
#define SDFM_IC 4//24, 25
|
||||
|
||||
#define SDFM_BRAKE 0
|
||||
#define SDFM_U_DC 5
|
||||
#define SDFM_BRAKE 6//60, 61
|
||||
#define SDFM_U_DC 5//58, 59
|
||||
|
||||
#define SDFM_SIN 7
|
||||
#define SDFM_COS 1
|
||||
#define SDFM_SIN 7//62, 63
|
||||
#define SDFM_COS 1//65, 66
|
||||
|
||||
#define SDFM_REF 2
|
||||
#define SDFM_REF 2//67, 68
|
||||
|
||||
#define SDFM_BIT_IA (1<<SDFM_IA)
|
||||
#define SDFM_BIT_IB (1<<SDFM_IB)
|
||||
#define SDFM_BIT_IC (1<<SDFM_IC)
|
||||
#define SDFM_BIT_U (1<<SDFM_U_DC)
|
||||
|
||||
#define SDFM_ALL_CURRENTS (SDFM_BIT_IA | SDFM_BIT_IB | SDFM_BIT_IC)
|
||||
#define SDFM_ALL_CURRENTS (SDFM_BIT_IA | SDFM_BIT_IB | SDFM_BIT_IC | SDFM_BIT_U)
|
||||
|
||||
#define SDFM_VOLTAGE_MAX 320.0 //mV
|
||||
#define R_BRAKE 220.0 //mOM
|
||||
|
@ -7,6 +7,12 @@
|
||||
|
||||
#include "f28x_project.h"
|
||||
|
||||
#define SPI_PROGRAM_CS_GPAMUX1 GpioCtrlRegs.GPDMUX1.bit.GPIO98
|
||||
#define SPI_PROGRAM_CS_GPAGMUX1 GpioCtrlRegs.GPDGMUX1.bit.GPIO98
|
||||
#define SPI_PROGRAM_CS_GPADIR GpioCtrlRegs.GPDDIR.bit.GPIO98
|
||||
#define SPI_PROGRAM_CS_GPADAT GpioDataRegs.GPDDAT.bit.GPIO98
|
||||
|
||||
|
||||
__interrupt void spia_rx_isr(void);
|
||||
__interrupt void spia_tx_isr(void);
|
||||
|
||||
@ -86,20 +92,20 @@ void SpiAGpioInit(void)
|
||||
// Pull-ups can be enabled or disabled by the user.
|
||||
// This will enable the pullups for the specified pins.
|
||||
//
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pull-up on GPIO16 (SPISIMOA)
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0; // Enable pull-up on GPIO17 (SPISOMIA)
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0; // Enable pull-up on GPIO18 (SPICLKA)
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0; // Enable pull-up on GPIO19 (SPISTEA)
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pull-up on (SPISIMOA)
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0; // Enable pull-up on (SPISOMIA)
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0; // Enable pull-up on (SPICLKA)
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0; // Enable pull-up on (SPISTEA)
|
||||
|
||||
//
|
||||
// Set qualification for selected pins to asynch only
|
||||
//
|
||||
// This will select asynch (no qualification) for the selected pins.
|
||||
//
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3; // Asynch input GPIO16 (SPISIMOA)
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3; // Asynch input GPIO17 (SPISOMIA)
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO34 = 3; // Asynch input GPIO18 (SPICLKA)
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO35 = 3; // Asynch input GPIO19 (SPISTEA)
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3; // Asynch input (SPISIMOA)
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3; // Asynch input (SPISOMIA)
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO34 = 3; // Asynch input (SPICLKA)
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO35 = 3; // Asynch input (SPISTEA)
|
||||
|
||||
//
|
||||
// Configure SPI-A pins
|
||||
@ -107,14 +113,44 @@ void SpiAGpioInit(void)
|
||||
// This specifies which of the possible GPIO pins will be SPI functional
|
||||
// pins.
|
||||
//
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 3; // Configure GPIO16 as SPISIMOA
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 3; // Configure GPIO17 as SPISOMIA
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 3; // Configure GPIO18 as SPICLKA
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 3; // Configure GPIO19 as SPISTEA
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 3; // Configure GPIO32 as SPISIMOA
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 3; // Configure GPIO33 as SPISOMIA
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 3; // Configure GPIO34 as SPICLKA
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 3; // Configure GPIO35 as SPISTEA
|
||||
|
||||
|
||||
SPI_PROGRAM_CS_GPAMUX1 = 0;//program CS for BL25CM1A
|
||||
SPI_PROGRAM_CS_GPAGMUX1 = 0;
|
||||
SPI_PROGRAM_CS_GPADIR = 1;
|
||||
SPI_PROGRAM_CS_GPADAT = 0;
|
||||
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
void spi_TurnOnCS1_GD25Q16E(void)
|
||||
{
|
||||
EALLOW;
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 3; // Configure GPIO35 as SPISTEA
|
||||
EDIS;
|
||||
}
|
||||
|
||||
void spi_TurnOffCS1_GD25Q16E(void)
|
||||
{
|
||||
EALLOW;
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 0;
|
||||
GpioDataRegs.GPBDAT.bit.GPIO35 = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
void Gpio_SPI_CS_BL25CM1A(uint16_t out_bit)
|
||||
{
|
||||
EALLOW;
|
||||
SPI_PROGRAM_CS_GPADAT = out_bit;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
void spi_transmitAData(uint16_t a)
|
||||
{
|
||||
SpiaRegs.SPITXBUF = a<<8;
|
||||
|
@ -17,7 +17,7 @@ void spi_transmitAData(uint16_t a);
|
||||
void SpiBGpioInit(void);
|
||||
void SpiBInit(void);
|
||||
void transmitBData(uint16_t a);
|
||||
|
||||
void Gpio_SPI_CS_BL25CM1A(uint16_t out_bit);
|
||||
|
||||
|
||||
#ifdef ExtEEPROM_SPIB
|
||||
|
@ -12,6 +12,7 @@
|
||||
volatile uint16_t counter=0 ;
|
||||
volatile uint16_t counter1=0 ;
|
||||
volatile uint16_t counter2=0 ;
|
||||
volatile uint16_t Rele=0;
|
||||
|
||||
void frmmstr_run(void)
|
||||
{
|
||||
@ -30,5 +31,6 @@ void frmmstr_run(void)
|
||||
FMSTR_Poll();
|
||||
FMSTR_Recorder();
|
||||
FMSTR_enable_clr();
|
||||
Gpio95out(Rele);
|
||||
}
|
||||
}
|
||||
|
@ -18,21 +18,14 @@
|
||||
#include "GD25Q16ETIGR.h"
|
||||
#include "ZD24C02A.h"
|
||||
#include "vector.h"
|
||||
#include "adc_init.h"
|
||||
|
||||
|
||||
|
||||
void InitPerif(void)
|
||||
{
|
||||
InitSysCtrl();
|
||||
|
||||
PWMGpioInit();
|
||||
PWMInitEnable();
|
||||
|
||||
SdfmGpioInit();
|
||||
SdfmInitEnable();
|
||||
|
||||
SpiGpioInit();
|
||||
I2CMasterGpioInit();
|
||||
|
||||
|
||||
// Clear all interrupts and initialize PIE vector table:
|
||||
// Disable CPU interrupts
|
||||
@ -63,23 +56,35 @@ void InitPerif(void)
|
||||
//
|
||||
InitPieVectTable();
|
||||
|
||||
//
|
||||
GpioInit();
|
||||
PWMInitInterruptEn();
|
||||
PWMAllInit();
|
||||
SdfmInitInterruptEn();
|
||||
//
|
||||
SdfmInitEnable();
|
||||
SdfmInit();
|
||||
SpiInit();
|
||||
I2CMasterInit(I2C_OWN_ADDRESS,I2C_SLAVE_ADDRESS);
|
||||
SdfmGpioInit();
|
||||
SdfmInitInterruptEn();
|
||||
//
|
||||
PWMInitEnable();
|
||||
PWMAllInit();
|
||||
PWMGpioInit();
|
||||
PWMInitInterruptEn();
|
||||
|
||||
vectorInitCurrLoop();
|
||||
|
||||
// SpiGpioInit();
|
||||
// SpiInit();
|
||||
// I2CMasterGpioInit();
|
||||
// I2CMasterInit(I2C_OWN_ADDRESS,I2C_SLAVE_ADDRESS);
|
||||
|
||||
FRMUartInit();
|
||||
// vectorInitCurrLoop();
|
||||
// ConfigureADC();
|
||||
|
||||
|
||||
|
||||
//
|
||||
// Enable global Interrupts and higher priority real-time debug events:
|
||||
//
|
||||
EINT; // Enable Global interrupt INTM
|
||||
ERTM; // Enable Global realtime interrupt DBGM
|
||||
|
||||
FRMUartInit();
|
||||
GD25Q16ETIGR_en();
|
||||
// Bl25cm1a_en();
|
||||
vectorInitCurrLoop();
|
||||
|
||||
}
|
||||
|
@ -16,11 +16,21 @@
|
||||
#include "gpio_init.h"
|
||||
#include "frm_uart.h"
|
||||
#include "skvt.h"
|
||||
#include "adc_init.h"
|
||||
|
||||
#define IMAX_A 10.0 //A
|
||||
#define IMAX (IMAX_A*BIT_MAX/FACTOR_CURRENT_MOTOR_A)
|
||||
|
||||
typedef struct {
|
||||
int16_t Value16in; // Íåôèëüðîâàííîå çíà÷åíèå
|
||||
int16_t Value16filtered; // Ôèëüðîâàííîå çíà÷åíèå
|
||||
int32_t Value32; // Êîíå÷íîå íàïðÿæåíèå òðåíèðîâêè
|
||||
int16_t ShiftFilter; // Filters
|
||||
} Filtered;
|
||||
|
||||
Filtered UdcFilter = {0,0,0,10};
|
||||
|
||||
int16_t Filter(int16_t inValue, Filtered *Struct);
|
||||
|
||||
const int16_t mcgenSineTable256[257] = \
|
||||
{ 0,-201,-402,-603,-804,-1005,-1206,-1407,-1607,-1808,
|
||||
@ -63,22 +73,35 @@ TMode Mode = OffMode;
|
||||
uint16_t Step = 0, StepS, Nstep = 2, NoLoop = 0, StepShift = 6;
|
||||
float CurrentRegTuneAmpl = 0, FRM_cur = 0;
|
||||
int16_t Angle_test=0,sin_int,cos_int, AngleErr;
|
||||
|
||||
float Udc;
|
||||
uint16_t SectorCheckOn=1;
|
||||
volatile int16_t UdcFiltered = 0;
|
||||
float UdcVolt = 0;
|
||||
volatile float VdcFactor = FACTOR_VDC;
|
||||
volatile VoltProcImit = 0;
|
||||
|
||||
void vectorFault(void)
|
||||
{
|
||||
Mode = OffMode;
|
||||
}
|
||||
|
||||
void vectorControl(int16_t CurrentA, int16_t CurrentB, int16_t CurrentC)
|
||||
void vectorControl(int16_t CurrentA, int16_t CurrentB, int16_t CurrentC, int16_t sdfmUdc)
|
||||
{
|
||||
|
||||
|
||||
pwm_clr_PwmFlagStartADC();
|
||||
Ia = CurrentA;//sdfm_get(6);
|
||||
Ib = CurrentB;//sdfm_get(3);
|
||||
Ic = CurrentC;//sdfm_get(4);
|
||||
Ia = -CurrentA;//sdfm_get(6);
|
||||
Ib = -CurrentB;//sdfm_get(3);
|
||||
Ic = -CurrentC;//sdfm_get(4);
|
||||
if((Ia > IMAX)||(Ib>IMAX)||(Ic>IMAX)||(Ia<-IMAX)||(Ib<-IMAX)||(Ic<-IMAX) ) {OverCur[0] = Ia; OverCur[1] = Ib; OverCur[2] = Ic; ErrCur++; if(ErrCur >= 3) {Mode = OffMode; CurFault++;}}
|
||||
else ErrCur = 0;
|
||||
|
||||
UdcFiltered = Filter(sdfmUdc, &UdcFilter);
|
||||
if(UdcFiltered < 0) UdcFiltered = 0;
|
||||
if(VoltProcImit) UdcVolt = VoltProcImit;
|
||||
else UdcVolt = (float)UdcFiltered*VdcFactor/32768;
|
||||
|
||||
|
||||
Step = Step + Nstep;
|
||||
CurrLoop.piId.Ref = 0;
|
||||
switch(Mode)
|
||||
@ -106,9 +129,12 @@ void vectorControl(int16_t CurrentA, int16_t CurrentB, int16_t CurrentC)
|
||||
Mode = OffMode;
|
||||
PWM_ABC_StopAllClose();
|
||||
}
|
||||
vector_klark_park(1,Ia,Ib,Ic);
|
||||
Udc = sdfmUdc * FACTOR_VDC;
|
||||
vector_klark_park(SectorCheckOn,Ia,Ib,Ic);
|
||||
vector_inversion();
|
||||
FMSTR_enable_set();
|
||||
adc_start_set();
|
||||
|
||||
}
|
||||
|
||||
void vectorInitCurrLoop(void)
|
||||
@ -215,7 +241,7 @@ void vector_inversion(void)
|
||||
vectorUabc.b=-temp3;
|
||||
vectorUabc.c=-(temp1+temp2);
|
||||
}
|
||||
pwm_set_volt_3F(vectorUabc.a,vectorUabc.b,vectorUabc.c);
|
||||
pwm_set_volt_3F(vectorUabc.a,vectorUabc.b,vectorUabc.c, UdcVolt);
|
||||
}
|
||||
|
||||
float Test1, Test2;
|
||||
@ -283,9 +309,9 @@ void vector_klark_park(uint16_t SectorOn, int16_t CurrentA, int16_t CurrentB, in
|
||||
vectorIdq.d = _IQmpy(vectorI2ph.Alfa,vectorSinCos.cos) + _IQmpy(vectorI2ph.Beta,vectorSinCos.sin);
|
||||
vectorIdq.q = _IQmpy(vectorI2ph.Beta,vectorSinCos.cos) - _IQmpy(vectorI2ph.Alfa,vectorSinCos.sin);
|
||||
|
||||
Angle_test = Atan(sin_int, cos_int);
|
||||
// Angle_test = Atan(sin_int, cos_int);
|
||||
|
||||
AngleErr = Angle_test - vectorSinCos.Angle;
|
||||
// AngleErr = Angle_test - vectorSinCos.Angle;
|
||||
|
||||
|
||||
// CurrLoop.piIq.Ref = Inputs->IqRef;//Çàäàííîå
|
||||
@ -312,24 +338,38 @@ void vector_klark_park(uint16_t SectorOn, int16_t CurrentA, int16_t CurrentB, in
|
||||
CurrLoop.piId.uCorr = CurrLoop.piIq.uCorr = 0.0f;
|
||||
#endif
|
||||
|
||||
Gpio4out(1);
|
||||
|
||||
float UmaxVolt = VOLT_MAX_FACTOR * UdcVolt;
|
||||
|
||||
CurrLoop.piIq.Umax = UmaxVolt; // Parameter: upper saturation limit
|
||||
CurrLoop.piIq.Umin = -UmaxVolt;
|
||||
CurrLoop.piId.Umax = UmaxVolt; // Parameter: upper saturation limit
|
||||
CurrLoop.piId.Umin = -UmaxVolt;
|
||||
|
||||
PI_MACRO(CurrLoop.piIq);
|
||||
PI_MACRO(CurrLoop.piId);
|
||||
|
||||
/*Ïðîïîðöèîíàëüíîå îãðàíè÷åíèå íàïðÿæåíèé Uq è Ud*/
|
||||
// Test1 = my_sqrtf(Test2);
|
||||
|
||||
Gpio4out(0);
|
||||
|
||||
float Ulim = my_sqrtf(CurrLoop.piId.Out * CurrLoop.piId.Out + CurrLoop.piIq.Out * CurrLoop.piIq.Out);
|
||||
if (Ulim > VOLT_MAX_PROC)
|
||||
|
||||
Gpio4out(1);
|
||||
|
||||
if (Ulim > UmaxVolt)// ìàêñèìàëüíîå íàïðÿæåíèå â âîëüòàõ
|
||||
{
|
||||
if(Ulim > ZERO_LVL)
|
||||
{
|
||||
float K = VOLT_MAX_PROC / Ulim;
|
||||
float K = UmaxVolt / Ulim;
|
||||
FRM_Ud = CurrLoop.piId.Out *= K;
|
||||
FRM_Uq = CurrLoop.piIq.Out *= K;
|
||||
}
|
||||
}
|
||||
|
||||
Gpio4out(0);
|
||||
|
||||
if(!NoLoop)
|
||||
{
|
||||
vectorUdq.q = CurrLoop.piIq.Out;
|
||||
@ -363,3 +403,11 @@ float my_sqrtf(float x)
|
||||
/* now sqrt(x) = x * 1/sqrt(x) */
|
||||
return x * x0;
|
||||
}
|
||||
|
||||
// Ôèëüòð ñèãíàëà
|
||||
int16_t Filter(int16_t inValue, Filtered *Struct) {
|
||||
(*Struct).Value16in = inValue;
|
||||
(*Struct).Value32+=(int32_t)((*Struct).Value16in)-(int32_t)((*Struct).Value16filtered);
|
||||
(*Struct).Value16filtered =(int16_t)(((*Struct).Value32)>>((*Struct).ShiftFilter));
|
||||
return ((*Struct).Value16filtered);
|
||||
}
|
||||
|
@ -34,8 +34,9 @@
|
||||
#define SIN_LENGTH_TABLE 256
|
||||
|
||||
#define VOLT_MAX_PROC 94.0
|
||||
#define PI_REG_I_PROPOR 35.0
|
||||
#define PI_REG_I_INTEGR 0.1
|
||||
#define VOLT_MAX_FACTOR VOLT_MAX_PROC/100.0
|
||||
#define PI_REG_I_PROPOR 16.0
|
||||
#define PI_REG_I_INTEGR 0.05
|
||||
#define CURRENT_MAX 40.0 //A
|
||||
#define ZERO_LVL 0.00001f
|
||||
|
||||
@ -84,13 +85,16 @@ typedef enum
|
||||
}TMode;
|
||||
|
||||
|
||||
|
||||
|
||||
int16_t vector_mcsinPIxLUT(int16_t Value, int16_t *psinTable);
|
||||
void vector_inversion(void);
|
||||
void vector_klark_park(uint16_t SectorOn, int16_t CurrentA, int16_t CurrentB, int16_t CurrentC);
|
||||
void vectorInitCurrLoop(void);
|
||||
void vectorControl(int16_t CurrentA, int16_t CurrentB, int16_t CurrentC);
|
||||
void vectorControl(int16_t CurrentA, int16_t CurrentB, int16_t CurrentC, int16_t sdfmUdc);
|
||||
void vectorFault(void);
|
||||
float my_sqrtf(float x);
|
||||
void vectorResCurrLoop(void);
|
||||
|
||||
|
||||
#endif /* SRC_VECTOR_H_ */
|
||||
|
@ -1,16 +1,6 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<configurations XML_version="1.2" id="configurations_0">
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<configuration XML_version="1.2" id="Texas Instruments XDS2xx USB Debug Probe_0">
|
||||
<instance XML_version="1.2" desc="Texas Instruments XDS2xx USB Debug Probe_0" href="connections/TIXDS2XXUSB_Connection.xml" id="Texas Instruments XDS2xx USB Debug Probe_0" xml="TIXDS2XXUSB_Connection.xml" xmlpath="connections"/>
|
||||
<connection XML_version="1.2" id="Texas Instruments XDS2xx USB Debug Probe_0">
|
||||
|
Loading…
Reference in New Issue
Block a user