внешняя память

Projects/EFC_IPC_Server_C28/lib/f2838x_emif.c

@@ -246,24 +246,42 @@ void ASync_cs4_config(Uint16 inst, Uint16 async_mem_data_width,
 //
 // setup_emif1_pinmux_async_16bit - function for EMIF1 GPIO pin setup
 //
+#define DEBUG_BOARD
+
 void setup_emif1_pinmux_async_16bit(Uint16 cpu_sel)
 {
     Uint16 i;
 
-    for (i=48; i<=52; i++)//38 to 52
+//Addr
+
+    for (i=38; i<=41; i++)
     {
-        if ((i != 42) && (i != 43))
+            GPIO_SetupPinMux(i,cpu_sel,2);//A0 - A3
-        {
-            GPIO_SetupPinMux(i,cpu_sel,2);//A0 - A12
-        }
     }
 
+    GPIO_SetupPinMux(45,cpu_sel,2);//A5
 
-    for (i=76; i<=82; i++) //69 to 82
+#ifdef    DEBUG_BOARD
+    GPIO_SetupPinMux(17,cpu_sel,0);//A4
+    GpioCtrlRegs.GPADIR.bit.GPIO17 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO17 = 0;
+    GPIO_SetupPinMux(18,cpu_sel,0);//A6
+    GpioCtrlRegs.GPADIR.bit.GPIO18 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO18 = 0;
+    GPIO_SetupPinMux(19,cpu_sel,0);//A7
+    GpioCtrlRegs.GPADIR.bit.GPIO19 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO19 = 0;
+
+
+#else
+    GPIO_SetupPinMux(44,cpu_sel,2);//A4
+    GPIO_SetupPinMux(46,cpu_sel,2);//A6
+    GPIO_SetupPinMux(47,cpu_sel,2);//A7
+#endif
+
+    for (i=48; i<=52; i++)
     {
-        {
+            GPIO_SetupPinMux(i,cpu_sel,2);//A8 - A12
-            GPIO_SetupPinMux(i,cpu_sel,2);//D2 - D15
-        }
     }
 
     for (i=86; i<=92; i++) //86 to 92
@@ -273,9 +291,32 @@ void setup_emif1_pinmux_async_16bit(Uint16 cpu_sel)
         }
     }
 
+//Data
+    for (i=69; i<=74; i++) //69 to 82
+    {
+        {
+            GPIO_SetupPinMux(i,cpu_sel,2);//D10 - D15
+        }
+    }
+
+#ifdef    DEBUG_BOARD
+    GPIO_SetupPinMux(16,cpu_sel,0);//D9
+    GpioCtrlRegs.GPADIR.bit.GPIO16 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO16 = 0;
+#else
+    GPIO_SetupPinMux(75,cpu_sel,2);//D9
+#endif
+
+    for (i=76; i<=82; i++) //69 to 82
+    {
+        {
+            GPIO_SetupPinMux(i,cpu_sel,2);//D2 - D8
+        }
+    }
     GPIO_SetupPinMux(55,cpu_sel,9);//D0
     GPIO_SetupPinMux(56,cpu_sel,9);//D1
 
+//Cntrl
 
     GPIO_SetupPinMux(26,cpu_sel,0);//RST
     GPIO_SetupPinMux(27,cpu_sel,0);//BYTE
@@ -294,13 +335,12 @@ void setup_emif1_pinmux_async_16bit(Uint16 cpu_sel)
     //
     // setup async mode and enable pull-ups for Data pins
     //
-    for (i=69; i<=92; i++)
+    for (i=69; i<=82; i++)
     {
-        if ((i != 84) && (i != 84) && (i != 85))
-        {
             GPIO_SetupPinOptions(i,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
-        }
     }
+    GPIO_SetupPinOptions(55,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
+    GPIO_SetupPinOptions(56,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
 }
 
 //

Projects/EFC_IPC_Server_C28/mem_test.c

@@ -17,6 +17,7 @@
 //#include "f28x_project.h"
 #ifdef CPU1
 #include "frmmstr_run.h"
+#include "emif_init.h"
 #endif
 
 #include "init_perif.h"
@@ -29,8 +30,9 @@ void main(void)
     {
         asm (" NOP");
         ipc_run();
-#ifdef CPU1
 
+#ifdef CPU1
+        emif_run();
 //        frmmstr_run();
 #endif
     }

Projects/EFC_IPC_Server_C28/src/Peripherals/emif_init.c

@@ -10,7 +10,8 @@
 #define TEST_PASS            0xABCDABCD
 #define TEST_FAIL            0xDEADDEAD
 #define ASRAM_CS2_START_ADDR 0x100000
-#define ASRAM_CS2_SIZE       0x10
+#define ASRAM_CS3_START_ADDR 0x300000
+#define ASRAM_CS2_SIZE       0x1
 
 #define EMIF1                0
 #define EMIF2                1
@@ -38,55 +39,335 @@ int i;
 //
 // Function Prototypes
 //
-extern void setup_emif1_pinmux_async_16bit(Uint16);
+//extern void setup_emif1_pinmux_async_16bit(Uint16);
+
+
+#define DEBUG_BOARD
+
+#ifdef    DEBUG_BOARD
+
+void flash_gpio_debug_board(Uint32 addr, Uint16 data)
+{
+    EALLOW;
+    GpioDataRegs.GPADAT.bit.GPIO17 = (addr>>4) & 1;
+    GpioDataRegs.GPADAT.bit.GPIO17 = (addr>>4) & 1;
+    GpioDataRegs.GPADAT.bit.GPIO17 = (addr>>4) & 1;
+    asm (" NOP");
+    asm (" NOP");
+    GpioDataRegs.GPADAT.bit.GPIO18 = (addr>>6) & 1;
+    GpioDataRegs.GPADAT.bit.GPIO18 = (addr>>6) & 1;
+    GpioDataRegs.GPADAT.bit.GPIO18 = (addr>>6) & 1;
+    asm (" NOP");
+    asm (" NOP");
+    GpioDataRegs.GPADAT.bit.GPIO19 = (addr>>7) & 1;
+    GpioDataRegs.GPADAT.bit.GPIO19 = (addr>>7) & 1;
+    GpioDataRegs.GPADAT.bit.GPIO19 = (addr>>7) & 1;
+    asm (" NOP");
+    asm (" NOP");
+    GpioDataRegs.GPADAT.bit.GPIO16 = (data>>9) & 1;
+    GpioDataRegs.GPADAT.bit.GPIO16 = (data>>9) & 1;
+    GpioDataRegs.GPADAT.bit.GPIO16 = (data>>9) & 1;
+    EDIS;
+}
+#endif
+
+
+
+
+void emif1_gpio_init_pinmux_async_16bit(Uint16 cpu_sel)
+{
+    Uint16 i;
+
+//Addr
+
+    for (i=38; i<=41; i++)
+    {
+            GPIO_SetupPinMux(i,cpu_sel,2);//A0 - A3
+    }
+
+    GPIO_SetupPinMux(45,cpu_sel,2);//A5
+
+#ifdef    DEBUG_BOARD
+    EALLOW;
+
+    GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 0;
+    GpioCtrlRegs.GPAGMUX2.bit.GPIO17 = 0;
+    GpioCtrlRegs.GPADIR.bit.GPIO17 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO17 = 0;
+
+    GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0;
+    GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0;
+    GpioCtrlRegs.GPADIR.bit.GPIO18 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO18 = 0;
+
+    GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0;
+    GpioCtrlRegs.GPAGMUX2.bit.GPIO19 = 0;
+    GpioCtrlRegs.GPADIR.bit.GPIO19 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO19 = 0;
+    EDIS;
+
+#else
+    GPIO_SetupPinMux(44,cpu_sel,2);//A4
+    GPIO_SetupPinMux(46,cpu_sel,2);//A6
+    GPIO_SetupPinMux(47,cpu_sel,2);//A7
+#endif
+
+    for (i=48; i<=52; i++)
+    {
+            GPIO_SetupPinMux(i,cpu_sel,2);//A8 - A12
+    }
+
+    for (i=86; i<=92; i++) //86 to 92
+    {
+        {
+            GPIO_SetupPinMux(i,cpu_sel,2);//A13 - A19
+        }
+    }
+
+//Data
+    for (i=69; i<=74; i++) //69 to 82
+    {
+        {
+            GPIO_SetupPinMux(i,cpu_sel,2);//D10 - D15
+        }
+    }
+
+#ifdef    DEBUG_BOARD
+
+    EALLOW;
+    GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 0;
+    GpioCtrlRegs.GPAGMUX2.bit.GPIO16 = 0;
+    GpioCtrlRegs.GPADIR.bit.GPIO16 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO16 = 0;
+    EDIS;
+#else
+    GPIO_SetupPinMux(75,cpu_sel,2);//D9
+#endif
+
+    for (i=76; i<=82; i++) //69 to 82
+    {
+        {
+            GPIO_SetupPinMux(i,cpu_sel,2);//D2 - D8
+        }
+    }
+    GPIO_SetupPinMux(55,cpu_sel,9);//D0
+    GPIO_SetupPinMux(56,cpu_sel,9);//D1
+
+//Cntrl
+
+    GPIO_SetupPinMux(26,cpu_sel,0);//RST
+    GPIO_SetupPinMux(27,cpu_sel,0);//BYTE
+
+    EALLOW;
+    GpioCtrlRegs.GPADIR.bit.GPIO26 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO26 = 1;
+
+    GpioCtrlRegs.GPADIR.bit.GPIO27 = 1;
+    GpioDataRegs.GPADAT.bit.GPIO27 = 1;//word mode
+    EDIS;
+    GPIO_SetupPinMux(29,cpu_sel,9);//CS3
+    GPIO_SetupPinMux(31,cpu_sel,2);//WEN
+    GPIO_SetupPinMux(36,cpu_sel,2);//WAIT
+    GPIO_SetupPinMux(37,cpu_sel,2);//OEn
+
+    //
+    // setup async mode and enable pull-ups for Data pins
+    //
+    for (i=69; i<=82; i++)
+    {
+            GPIO_SetupPinOptions(i,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
+    }
+    GPIO_SetupPinOptions(55,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
+    GPIO_SetupPinOptions(56,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
+}
 
 //
 // mem_read_write - This function performs simple read/write word accesses
 //                  to memory.
 //
+Uint32 ArrWriteAdr[3] = {0x555, 0x2AA, 0x555};
+Uint16 ArrWriteData[3] = {0xAA, 0x55, 0xA0};
+
+void MX29LV160D_emif_start_write_command(void)
+{
+    long *XMEM_ps;
+
+#ifdef    DEBUG_BOARD
+    flash_gpio_debug_board(ArrWriteAdr[0], ArrWriteData[0]);
+#endif
+
+    XMEM_ps = (long *)(ASRAM_CS3_START_ADDR & ArrWriteAdr[0]);
+    *XMEM_ps = ArrWriteData[0];
+
+#ifdef    DEBUG_BOARD
+    flash_gpio_debug_board(ArrWriteAdr[1], ArrWriteData[1]);
+#endif
+
+    XMEM_ps = (long *)(ASRAM_CS3_START_ADDR & ArrWriteAdr[1]);
+    *XMEM_ps = ArrWriteData[1];
+
+#ifdef    DEBUG_BOARD
+    flash_gpio_debug_board(ArrWriteAdr[2], ArrWriteData[2]);
+#endif
+
+    XMEM_ps = (long *)(ASRAM_CS3_START_ADDR & ArrWriteAdr[2]);
+    *XMEM_ps = ArrWriteData[2];
+}
+
+Uint32 ArrEraseAdr[3] = {0x555, 0x2AA, 0x555};
+Uint16 ArrEraseData[3] = {0xAA, 0x55, 0x80};
+
+void MX29LV160D_emif_start_erase_command(void)
+{
+    long *XMEM_ps;
+
+#ifdef    DEBUG_BOARD
+    flash_gpio_debug_board(ArrEraseAdr[0], ArrEraseData[0]);
+#endif
+
+    XMEM_ps = (long *)(ASRAM_CS3_START_ADDR & ArrEraseAdr[0]);
+    *XMEM_ps = ArrEraseData[0];
+
+#ifdef    DEBUG_BOARD
+    flash_gpio_debug_board(ArrEraseAdr[1], ArrEraseData[1]);
+#endif
+
+    XMEM_ps = (long *)(ASRAM_CS3_START_ADDR & ArrEraseAdr[1]);
+    *XMEM_ps = ArrEraseData[1];
+
+#ifdef    DEBUG_BOARD
+    flash_gpio_debug_board(ArrEraseAdr[2], ArrEraseData[2]);
+#endif
+
+    XMEM_ps = (long *)(ASRAM_CS3_START_ADDR & ArrEraseAdr[2]);
+    *XMEM_ps = ArrEraseData[2];
+
+#ifdef    DEBUG_BOARD
+    flash_gpio_debug_board(ArrEraseAdr[0], ArrEraseData[0]);
+#endif
+
+    XMEM_ps = (long *)(ASRAM_CS3_START_ADDR & ArrEraseAdr[0]);
+    *XMEM_ps = ArrEraseData[0];
+
+#ifdef    DEBUG_BOARD
+    flash_gpio_debug_board(ArrEraseAdr[1], ArrEraseData[1]);
+#endif
+
+    XMEM_ps = (long *)(ASRAM_CS3_START_ADDR & ArrEraseAdr[1]);
+    *XMEM_ps = ArrEraseData[1];
+}
+
+
+
+
+Uint16 data_polling_alg(Uint32 addr, Uint16 data_sharp)
+{
+    Uint16 data;
+    long *XMEM_ps;
+
+    XMEM_ps = (long *)(addr);
+
+    do
+    {
+        data = *XMEM_ps & 0xFF;
+        if( ((data>>7) & 1) != data_sharp) return 0;
+    }
+    while( ((data>>5) & 1) != 1);
+
+    data = *XMEM_ps & 0xFF;
+
+    if( ((data>>7) & 1) != data_sharp )  return 0;
+    else return 1;
+}
+
+Uint16 toggle_bit_alg(Uint32 addr)
+{
+    Uint16 data[2];
+    long *XMEM_ps;
+
+    XMEM_ps = (long *)(addr);
+
+    do
+    {
+        data[0] = *XMEM_ps & 0xFF;
+        data[1] = *XMEM_ps & 0xFF;
+        if( ((data[0]>>6) & 1) == ((data[0]>>6) & 1) ) return 0;
+    }
+    while( ((data[1]>>5) & 1) != 1);
+
+    data[0] = *XMEM_ps & 0xFF;
+    data[1] = *XMEM_ps & 0xFF;
+
+    if( ((data[0]>>6) & 1) != ((data[0]>>6) & 1) )  return 0;
+    else return 1;
+}
+
+
 
 uint16_t Arr1[ASRAM_CS2_SIZE], Arr2[ASRAM_CS2_SIZE];
 
-char
+char mem_read_write(Uint32 start_addr, Uint32 mem_size)
-mem_read_write(Uint32 start_addr, Uint32 mem_size)
 {
-    unsigned long mem_rds;
+    volatile Uint16 mem_rds;
-    unsigned long mem_wds;
+    volatile Uint16 mem_wds;
+    volatile Uint16 Err;
     long *XMEM_ps;
-    Uint32 i;
+//    Uint32 i;
+
+
+
+    XMEM_ps = (long *)(start_addr+0x8000);
+
+    Arr1[0] =  *XMEM_ps++;
+    Arr1[1] =  *XMEM_ps++;
+    Arr1[2] =  *XMEM_ps;
 
     //
     //Write data
     //
-    XMEM_ps = (long *)start_addr;
+    MX29LV160D_emif_start_write_command();
-
     //
     //Fill memory
     //
-    mem_wds = 0x01234567;
+    XMEM_ps = (long *)(start_addr+0x8000);
-    for (i=0; i < mem_size; i++)
+    mem_wds = 0x012;
-    {
+//    for (i=0; i < mem_size; i++)
+//    {
+        flash_gpio_debug_board((Uint32)XMEM_ps, mem_wds);
         *XMEM_ps = mem_wds;
-        if(i < ASRAM_CS2_SIZE) Arr1[i] = mem_wds & 0x0FF;
+//        if(i < ASRAM_CS2_SIZE) Arr1[i] = mem_wds & 0x0FF;
-        XMEM_ps ++;
+//        XMEM_ps ++;
-        mem_wds += 0x11111111;
+//        mem_wds += 0x11;
-    }
+//    }
+
+
+//    do
+//    {
+        Err = toggle_bit_alg((Uint32)XMEM_ps);
 
     //
     //Verify memory
     //
-    mem_wds = 0x01234567;
+        mem_wds = 0x012;
-    XMEM_ps = (long *)start_addr;
+        XMEM_ps = (long *)(start_addr+0x8000);
-    for (i=0; i < mem_size; i++)
+//    for (i=0; i < mem_size; i++)
-    {
+//    {
+        flash_gpio_debug_board((Uint32)XMEM_ps, mem_wds);
         mem_rds = *XMEM_ps;
-        if( (mem_rds & 0xFF) != (mem_wds & 0xFF) )
+//        if(i < ASRAM_CS2_SIZE) Arr2[i] = mem_rds & 0xFF;
-        {
+//    }
-            if(i < ASRAM_CS2_SIZE) Arr2[i] = mem_rds & 0xFF;
+//    while((mem_rds & 0xFF) != (mem_wds & 0xFF));
-        }
+
-        XMEM_ps++;
+//        if( (mem_rds & 0xFF) != (mem_wds & 0xFF) )
-        mem_wds += 0x11111111;
+//        {
-    }
+//            Err++;
+//        }
+
+
+
+//        XMEM_ps++;
+//        mem_wds += 0x11;
+//    }
     return(0);
 }
 
@@ -94,8 +375,7 @@ mem_read_write(Uint32 start_addr, Uint32 mem_size)
 //  mem_data_walk - This function performs a walking 0 & 1 on data lines for
 //                  SRAM RD & WR
 //
-char
+char mem_data_walk(Uint32 start_addr, Uint32 mem_size)
-mem_data_walk(Uint32 start_addr, Uint32 mem_size)
 {
     unsigned long sram_rd;
     unsigned long sram_wd;
@@ -157,8 +437,7 @@ mem_data_walk(Uint32 start_addr, Uint32 mem_size)
 //
 // mem_addr_walk - This function performs a toggle on each address bit.
 //
-char
+char mem_addr_walk(Uint32 start_addr, Uint32 addr_size)
-mem_addr_walk(Uint32 start_addr, Uint32 addr_size)
 {
     unsigned long sram_rd;
     unsigned long sram_wd;
@@ -206,8 +485,7 @@ mem_addr_walk(Uint32 start_addr, Uint32 addr_size)
 // mem_data_size - This function performs different data type
 //                (HALFWORD/WORD) access.
 //
-char
+char mem_data_size(Uint32 start_addr, Uint32 size_to_check)
-mem_data_size(Uint32 start_addr, Uint32 size_to_check)
 {
     unsigned short mem_rds;
     unsigned long  mem_rdl;
@@ -329,7 +607,7 @@ void emif_init(void)
     //
     //Configure GPIO pins for EMIF1
     //
-     setup_emif1_pinmux_async_16bit(0);
+      emif1_gpio_init_pinmux_async_16bit(0);
 
      Emif1Regs.ASYNC_WCCR.bit.WP0 = 0;
 
@@ -353,33 +631,33 @@ void emif_init(void)
                                      EMIF_ASYNC_WSETUP_1    | // Write Setup time
                                                               // of 1 Emif Clock
                                      EMIF_ASYNC_EW_ENABLE  | // Extended Wait
-                                                              // Disable.
+                                                              // Enable.
                                      EMIF_ASYNC_SS_ENABLE    // Strobe Select Mode
-                                                              // Disable.
+                                                              // Enable.
                                     );
 
     //
     //Check basic RD/WR access to CS2 space
     //
-      ErrCount_local = mem_read_write(ASRAM_CS2_START_ADDR, ASRAM_CS2_SIZE);
+      ErrCount_local = mem_read_write(ASRAM_CS3_START_ADDR, ASRAM_CS2_SIZE);
       ErrCount = ErrCount + ErrCount_local;
 
     //
     //Address walk checks (Tested for Memory with address width of 16bit)
     //
-//      ErrCount_local = mem_addr_walk(ASRAM_CS2_START_ADDR, 16);
+//      ErrCount_local = mem_addr_walk(ASRAM_CS3_START_ADDR, 16);
 //      ErrCount = ErrCount + ErrCount_local;
 
     //
     //Data walk checks
     //
-//      ErrCount_local = mem_data_walk(ASRAM_CS2_START_ADDR, ASRAM_CS2_SIZE);
+//      ErrCount_local = mem_data_walk(ASRAM_CS3_START_ADDR, ASRAM_CS2_SIZE);
 //      ErrCount = ErrCount + ErrCount_local;
 
     //
     //Data size checks
     //
-//      ErrCount_local = mem_data_size(ASRAM_CS2_START_ADDR, 4);
+//      ErrCount_local = mem_data_size(ASRAM_CS3_START_ADDR, 4);
  //     ErrCount = ErrCount + ErrCount_local;
 
       if (ErrCount == 0x0)
@@ -388,3 +666,9 @@ void emif_init(void)
       }
 }
 
+void emif_run(void)
+{
+    mem_read_write(ASRAM_CS3_START_ADDR, ASRAM_CS2_SIZE);
+
+}
+

Projects/EFC_IPC_Server_C28/src/Peripherals/emif_init.h

@@ -10,6 +10,6 @@
 
 
 void emif_init(void);
-
+void emif_run(void);
 
 #endif /* SRC_EMIF_INIT_H_ */