295 lines
8.6 KiB
C
295 lines
8.6 KiB
C
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//###########################################################################
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//
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// FILE: adc.c
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//
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// TITLE: C28x ADC driver.
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//
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//###########################################################################
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// $Copyright:
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// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#include "adc.h"
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//
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// The following macro calculates the INL trim location in OTP memory
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// required to calibrate the ADC linearity. Use this in the
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// ADC_setMode() function only.
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//
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#define ADC_getINLTrimOTPLoc(offset) ((uint32_t *)(0x70128U + (0xCU * offset)))
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//
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// This macro calculates the ADC offset trim location in OTP memory required
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// to calibrate ADC offset. Use this in the ADC_setMode() function only.
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//
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#define ADC_getOffsetTrimOTPLoc(offset) ((uint16_t *)(0x70158U + offset))
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//
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// TI-OTP key value expected to be programmed in trimmed device
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//
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#define TI_OTP_DEV_KEY (0x5A5AU)
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//
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// Macro to read the key value programmed in the device
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//
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#define TI_OTP_DEV_PRG_KEY (HWREGH(0x70238UL))
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//*****************************************************************************
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//
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// ADC_setMode
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//
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//*****************************************************************************
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void
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ADC_setMode(uint32_t base, ADC_Resolution resolution,
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ADC_SignalMode signalMode)
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{
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//
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// Check the arguments.
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//
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ASSERT(ADC_isBaseValid(base));
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//
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// Check for correct signal mode & resolution. In this device:
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// Differential signal conversions are supported in 16-bit only
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//
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if(signalMode == ADC_MODE_DIFFERENTIAL)
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{
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ASSERT(resolution == ADC_RESOLUTION_16BIT);
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}
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//
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// Apply the resolution and signalMode to the specified ADC.
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//
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EALLOW;
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HWREGH(base + ADC_O_CTL2) = (HWREGH(base + ADC_O_CTL2) &
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~(ADC_CTL2_RESOLUTION | ADC_CTL2_SIGNALMODE)) |
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((uint16_t)resolution | (uint16_t)signalMode);
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EDIS;
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//
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// Apply INL and offset trims
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//
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ADC_setINLTrim(base);
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ADC_setOffsetTrim(base);
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}
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//*****************************************************************************
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//
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// ADC_setINLTrim
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//
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//*****************************************************************************
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void
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ADC_setINLTrim(uint32_t base)
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{
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uint16_t i;
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uint32_t * inlTrimAddress;
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ADC_Resolution resolution;
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//
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// Check the arguments.
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//
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ASSERT(ADC_isBaseValid(base));
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resolution = (ADC_Resolution)
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(HWREGH(base + ADC_O_CTL2) & ADC_CTL2_RESOLUTION);
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if(TI_OTP_DEV_PRG_KEY == TI_OTP_DEV_KEY)
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{
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switch(base)
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{
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case ADCA_BASE:
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inlTrimAddress = ADC_getINLTrimOTPLoc(0U);
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break;
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case ADCB_BASE:
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inlTrimAddress = ADC_getINLTrimOTPLoc(1U);
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break;
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case ADCC_BASE:
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inlTrimAddress = ADC_getINLTrimOTPLoc(2U);
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break;
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case ADCD_BASE:
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inlTrimAddress = ADC_getINLTrimOTPLoc(3U);
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break;
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default:
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//
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// Invalid base address!
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//
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inlTrimAddress = ADC_getINLTrimOTPLoc(0U);
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break;
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}
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//
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// Update INL trim values to ADC trim registers
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//
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EALLOW;
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for(i = 0U; i < 6U; i++)
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{
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HWREG(base + ADC_O_INLTRIM1 + (i * 2U)) = (*inlTrimAddress++);
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}
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//
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// Apply linearity trim workaround for 12-bit resolution
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//
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if(resolution == ADC_RESOLUTION_12BIT)
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{
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//
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// 12-bit linearity trim workaround
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//
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HWREG(base + ADC_O_INLTRIM1) &= 0xFFFF0000U;
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HWREG(base + ADC_O_INLTRIM2) &= 0xFFFF0000U;
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HWREG(base + ADC_O_INLTRIM4) &= 0xFFFF0000U;
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HWREG(base + ADC_O_INLTRIM5) &= 0xFFFF0000U;
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}
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EDIS;
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}
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}
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//*****************************************************************************
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//
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// ADC_setOffsetTrim
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//
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//*****************************************************************************
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void
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ADC_setOffsetTrim(uint32_t base)
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{
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uint16_t offsetIndex = 0U, offsetTrim = 0U;
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ADC_Resolution resolution;
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ADC_SignalMode signalMode;
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//
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// Check the configured resoultion and signal mode for the ADC base.
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//
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resolution = (ADC_Resolution)
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(HWREGH(base + ADC_O_CTL2) & ADC_CTL2_RESOLUTION);
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signalMode = (ADC_SignalMode)
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(HWREGH(base + ADC_O_CTL2) & ADC_CTL2_SIGNALMODE);
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//
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// Get the offset index for the ADC base
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//
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switch(base)
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{
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case ADCA_BASE:
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offsetIndex = (uint16_t)(0U);
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break;
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case ADCB_BASE:
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offsetIndex = (uint16_t)(1U);
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break;
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case ADCC_BASE:
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offsetIndex = (uint16_t)(2U);
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break;
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case ADCD_BASE:
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offsetIndex = (uint16_t)(3U);
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break;
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default:
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//
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// Invalid base address!
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//
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offsetIndex = (uint16_t)(0U);
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break;
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}
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//
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// Get the offset trim value programmed into OTP
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//
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offsetIndex += (4U * ((resolution == ADC_RESOLUTION_16BIT) ? 1U : 0U));
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if(TI_OTP_DEV_PRG_KEY == TI_OTP_DEV_KEY)
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{
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offsetTrim = (*(uint16_t *)(ADC_getOffsetTrimOTPLoc(offsetIndex)));
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offsetTrim = (signalMode == ADC_MODE_SINGLE_ENDED) ?
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(offsetTrim >> 8U):(offsetTrim & 0xFFU);
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}
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else
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{
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offsetTrim = 0U;
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}
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//
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// Configure the offset trim, offset trim is not updated here in case of
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// untrimmed devices.
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//
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if(offsetTrim > 0x0U)
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{
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EALLOW;
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HWREGH(base + ADC_O_OFFTRIM) = offsetTrim;
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EDIS;
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}
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}
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//*****************************************************************************
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//
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// ADC_setPPBTripLimits
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//
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//*****************************************************************************
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void
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ADC_setPPBTripLimits(uint32_t base, ADC_PPBNumber ppbNumber,
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int32_t tripHiLimit, int32_t tripLoLimit)
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{
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uint32_t ppbHiOffset;
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uint32_t ppbLoOffset;
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//
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// Check the arguments.
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//
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ASSERT(ADC_isBaseValid(base));
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ASSERT((tripHiLimit <= 65535) && (tripHiLimit >= -65536));
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ASSERT((tripLoLimit <= 65535) && (tripLoLimit >= -65536));
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//
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// Get the offset to the appropriate trip limit registers.
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//
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ppbHiOffset = (ADC_PPBxTRIPHI_STEP * (uint32_t)ppbNumber) +
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ADC_O_PPB1TRIPHI;
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ppbLoOffset = (ADC_PPBxTRIPLO_STEP * (uint32_t)ppbNumber) +
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ADC_O_PPB1TRIPLO;
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EALLOW;
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//
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// Set the trip high limit.
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//
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HWREG(base + ppbHiOffset) =
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(HWREG(base + ppbHiOffset) & ~ADC_PPBTRIP_MASK) |
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((uint32_t)tripHiLimit & ADC_PPBTRIP_MASK);
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//
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// Set the trip low limit.
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//
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HWREG(base + ppbLoOffset) =
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(HWREG(base + ppbLoOffset) & ~ADC_PPBTRIP_MASK) |
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((uint32_t)tripLoLimit & ADC_PPBTRIP_MASK);
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EDIS;
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}
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