diff --git a/.metadata/.tirex/am243x.content.tirex.json b/.metadata/.tirex/am243x.content.tirex.json index c4ca4ed..f0fcb28 100644 --- a/.metadata/.tirex/am243x.content.tirex.json +++ b/.metadata/.tirex/am243x.content.tirex.json @@ -975,6 +975,70 @@ ] ] }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Icss Sdfm Nine Channel With Continuous Mode Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "icss_sdfm_nine_channel_with_continuous_mode", + "location": "../../examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_GP_EVM" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "current_sense", + "icss_sdfm_nine_channel_with_continuous_mode", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Icss Sdfm Nine Channel With Continuous Mode Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "icss_sdfm_nine_channel_with_continuous_mode", + "location": "../../examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "current_sense", + "icss_sdfm_nine_channel_with_continuous_mode", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "project.ccs", "resourceClass": [ @@ -1039,6 +1103,70 @@ ] ] }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Icss Sdfm Three Channel With Continuous Mode Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "icss_sdfm_three_channel_with_continuous_mode", + "location": "../../examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_GP_EVM" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "current_sense", + "icss_sdfm_three_channel_with_continuous_mode", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Icss Sdfm Three Channel With Continuous Mode Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "icss_sdfm_three_channel_with_continuous_mode", + "location": "../../examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "current_sense", + "icss_sdfm_three_channel_with_continuous_mode", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "project.ccs", "resourceClass": [ diff --git a/.project/device/project_am243x.js b/.project/device/project_am243x.js index cce8926..ccbd87f 100644 --- a/.project/device/project_am243x.js +++ b/.project/device/project_am243x.js @@ -30,7 +30,9 @@ const example_file_list = [ "examples/position_sense/bissc_diagnostic/multi_channel_load_share/.project/project.js", "examples/position_sense/bissc_diagnostic/multi_channel_single_pru/.project/project.js", "examples/current_sense/icss_sdfm_nine_channel_load_share_mode/.project/project.js", + "examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/.project/project.js", "examples/current_sense/icss_sdfm_three_channel_single_pru_mode/.project/project.js", + "examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/.project/project.js", "examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/.project/project.js", "examples/pruicss_pwm/pruicss_pwm_duty_cycle/.project/project.js", "examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project.js", diff --git a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/app_sdfm.c b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/app_sdfm.c index 768b6ab..6d355b7 100644 --- a/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/app_sdfm.c +++ b/examples/current_sense/icss_sdfm_nine_channel_load_share_mode/app_sdfm.c @@ -179,6 +179,7 @@ SdfmPrms gTestSdfmPrms = { 0, /*enable Phase delay measurment */ 0, /*Enable zero cross*/ {1700, 1700, 1700}, /*Zero cross threshold*/ + 0, /*enable continuous mode*/ }; #define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */ diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/.project/project.js b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/.project/project.js new file mode 100644 index 0000000..f6c2d16 --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/.project/project.js @@ -0,0 +1,14 @@ +function getComponentProperty(device) +{ + return require(`./project_${device}`).getComponentProperty(); +}; + +function getComponentBuildProperty(buildOption) +{ + return require(`./project_${buildOption.device}`).getComponentBuildProperty(buildOption); +}; + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/.project/project_am243x.js b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/.project/project_am243x.js new file mode 100644 index 0000000..20c611f --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/.project/project_am243x.js @@ -0,0 +1,125 @@ +let path = require('path'); + +let device = "am243x"; + +const files = { + common: [ + "app_sdfm.c", + "epwm_dc.c", + "epwm_drv_aux.c", + "epwm_mod.c", + "sdfm_example.c", + "main.c", + ], +}; + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", /* Example base */ + "../../../..", + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + "${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib" + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include", + "${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode", + "${MOTOR_CONTROL_SDK_PATH}/examples/current_sense", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include" + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + + +const lnkfiles = { + common: [ + "linker.cmd", + ] +}; + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLE_MOTORCONTROL_SDFM"; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am243x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "sdfm_main", + }, + } +]; + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "icss_sdfm_nine_channel_with_continuous_mode"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + property.isSkipTopLevelBuild = false; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.lnkfiles = lnkfiles; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + + if(buildOption.cpu.match(/r5f*/)) { + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..26f7043 --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,150 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" + * @versions {"tool":"1.18.0+3266"} + */ + +/** + * Import the modules used in this configuration. + */ +const sdfm = scripting.addModule("/current_sense/sdfm", {}, false); +const sdfm1 = sdfm.addInstance(); +const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false); +const epwm1 = epwm.addInstance(); +const gpio = scripting.addModule("/drivers/gpio/gpio", {}, false); +const gpio1 = gpio.addInstance(); +const gpio2 = gpio.addInstance(); +const gpio3 = gpio.addInstance(); +const gpio4 = gpio.addInstance(); +const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); +const pruicss1 = pruicss.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); +const pwm = scripting.addModule("/pru_icssg/pwm", {}, false); +const pwm1 = pwm.addInstance(); +const pwm2 = pwm.addInstance(); +const pwm3 = pwm.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +sdfm1.$name = "CONFIG_SDFM0"; +sdfm1.Channel_3 = true; +sdfm1.Channel_4 = true; +sdfm1.Channel_5 = true; +sdfm1.Channel_6 = true; +sdfm1.Channel_7 = true; +sdfm1.Channel_8 = true; +sdfm1.PRU_ICSSG0_PRU.$assign = "PRU_ICSSG0_PRU0"; + +epwm1.$name = "CONFIG_EPWM0"; +epwm1.EPWM.$assign = "EHRPWM0"; +epwm1.EPWM.A.$assign = "GPMC0_AD3"; +epwm1.EPWM.B.$assign = "GPMC0_AD4"; +epwm1.EPWM.SYNCO.$assign = "GPMC0_AD1"; +epwm1.EPWM.SYNCI.$used = false; + +gpio1.$name = "GPIO_MTR_1_PWM_EN"; +gpio1.pinDir = "OUTPUT"; +gpio1.GPIO.$assign = "GPIO0"; +gpio1.GPIO.gpioPin.rx = false; +gpio1.GPIO.gpioPin.$assign = "GPMC0_AD15"; + +gpio2.pinDir = "OUTPUT"; +gpio2.useMcuDomainPeripherals = true; +gpio2.$name = "GPIO_ZC_TH_CH0"; +gpio2.MCU_GPIO.$assign = "MCU_GPIO0"; +gpio2.MCU_GPIO.gpioPin.rx = false; +gpio2.MCU_GPIO.gpioPin.$assign = "MCU_SPI0_D1"; + +gpio3.pinDir = "OUTPUT"; +gpio3.useMcuDomainPeripherals = true; +gpio3.$name = "GPIO_ZC_TH_CH1"; +gpio3.MCU_GPIO.gpioPin.rx = false; +gpio3.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_CS0"; + +gpio4.pinDir = "OUTPUT"; +gpio4.useMcuDomainPeripherals = true; +gpio4.$name = "GPIO_ZC_TH_CH2"; +gpio4.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_D1"; + +pruicss1.$name = "CONFIG_PRU_ICSS0"; +pruicss1.coreClk = 300000000; +pruicss1.iepClk = 300000000; +sdfm1.pru = pruicss1; +pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x80000000; +mpu_armv76.size = 31; + +pwm1.$name = "CONFIG_PRU_ICSS_PWM0"; +pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0"; +pwm1.PRU_ICSSG0_PWM.TZ_OUT.$used = true; + +pwm2.$name = "CONFIG_PRU_ICSS_PWM1"; +pwm2.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM1"; +pwm2.PRU_ICSSG0_PWM.TZ_OUT.$used = true; + +pwm3.$name = "CONFIG_PRU_ICSS_PWM2"; +pwm3.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM2"; +pwm3.PRU_ICSSG0_PWM.TZ_OUT.$used = true; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +sdfm1.PRU_ICSSG0_PRU.GPI16.$suggestSolution = "PRG0_PRU0_GPO16"; +sdfm1.PRU_ICSSG0_PRU.GPI1.$suggestSolution = "PRG0_PRU0_GPO1"; +sdfm1.PRU_ICSSG0_PRU.GPI3.$suggestSolution = "PRG0_PRU0_GPO3"; +sdfm1.PRU_ICSSG0_PRU.GPI5.$suggestSolution = "PRG0_PRU0_GPO5"; +sdfm1.PRU_ICSSG0_PRU.GPI7.$suggestSolution = "PRG0_PRU0_GPO7"; +sdfm1.PRU_ICSSG0_PRU.GPI18.$suggestSolution = "PRG0_PRU0_GPO18"; +sdfm1.PRU_ICSSG0_PRU.GPI11.$suggestSolution = "PRG0_PRU0_GPO11"; +sdfm1.PRU_ICSSG0_PRU.GPI13.$suggestSolution = "PRG0_PRU0_GPO13"; +sdfm1.PRU_ICSSG0_PRU.GPI15.$suggestSolution = "PRG0_PRU0_GPO15"; +sdfm1.PRU_ICSSG0_PRU.GPI17.$suggestSolution = "PRG0_PRU0_GPO17"; +gpio3.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; +gpio4.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; +pwm1.PRU_ICSSG0_PWM.TZ_OUT.$suggestSolution = "PRG0_PRU0_GPO19"; +pwm2.PRU_ICSSG0_PWM.TZ_OUT.$suggestSolution = "PRG0_PRU1_GPO19"; +pwm3.PRU_ICSSG0_PWM.TZ_OUT.$suggestSolution = "PRG0_PRU1_GPO8"; diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/main.c b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..4268e23 --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void sdfm_main(void *args); + +void freertos_main(void *args) +{ + sdfm_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..9273c61 --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,128 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..1e56c6d --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,151 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM + + /* TCM used by ICSS PRU to write sdfm sample output */ + .gSdfmSampleOutput : {} align(4) > R5F_TCMB0 +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..d3b5fae --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,320 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + app_sdfm.c \ + epwm_dc.c \ + epwm_drv_aux.c \ + epwm_mod.c \ + sdfm_example.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + ../../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include \ + -I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode \ + -I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lpruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm_nine_channel_with_continuous_mode ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..ffaa1ea --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=icss_sdfm_nine_channel_with_continuous_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..d46875e --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "mcu_plus_sdk/source/kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..07f1efb --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,145 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" + * @versions {"tool":"1.18.0+3266"} + */ + +/** + * Import the modules used in this configuration. + */ +const sdfm = scripting.addModule("/current_sense/sdfm", {}, false); +const sdfm1 = sdfm.addInstance(); +const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false); +const epwm1 = epwm.addInstance(); +const epwm2 = epwm.addInstance(); +const gpio = scripting.addModule("/drivers/gpio/gpio", {}, false); +const gpio1 = gpio.addInstance(); +const gpio2 = gpio.addInstance(); +const gpio3 = gpio.addInstance(); +const gpio4 = gpio.addInstance(); +const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); +const pruicss1 = pruicss.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const pwm = scripting.addModule("/pru_icssg/pwm", {}, false); +const pwm1 = pwm.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +sdfm1.$name = "CONFIG_SDFM0"; +sdfm1.Channel_3 = true; +sdfm1.Channel_4 = true; +sdfm1.Channel_8 = true; +sdfm1.Channel_7 = true; +sdfm1.Channel_5 = true; +sdfm1.Channel_6 = true; + +epwm1.$name = "CONFIG_EPWM0"; +epwm1.EPWM.$assign = "EHRPWM0"; +epwm1.EPWM.SYNCI.$used = false; + +epwm2.$name = "CONFIG_EPWM1"; +epwm2.EPWM.SYNCO.$assign = "GPMC0_AD1"; +epwm2.EPWM.SYNCO.$used = false; +epwm2.EPWM.SYNCI.$used = false; + +gpio1.$name = "GPIO_MTR_1_PWM_EN"; +gpio1.pinDir = "OUTPUT"; +gpio1.useMcuDomainPeripherals = true; +gpio1.MCU_GPIO.gpioPin.$assign = "MCU_UART0_RXD"; + +gpio2.pinDir = "OUTPUT"; +gpio2.$name = "GPIO_ZC_TH_CH0"; +gpio2.GPIO.$assign = "GPIO0"; +gpio2.GPIO.gpioPin.rx = false; +gpio2.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO18"; + +gpio3.pinDir = "OUTPUT"; +gpio3.$name = "GPIO_ZC_TH_CH1"; +gpio3.GPIO.gpioPin.rx = false; +gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; + +gpio4.pinDir = "OUTPUT"; +gpio4.$name = "GPIO_ZC_TH_CH2"; +gpio4.GPIO.gpioPin.rx = false; +gpio4.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1"; + +pruicss1.$name = "CONFIG_PRU_ICSS0"; +pruicss1.coreClk = 300000000; +pruicss1.iepClk = 300000000; +sdfm1.pru = pruicss1; +pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO.create(1); +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].$name = "CONFIG_PRU_ICSS_ECAP_IO0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.$assign = "PRU_ICSSG0_ECAP0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.IN_APWM_OUT.$used = true; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +pwm1.$name = "CONFIG_PRU_ICSS_PWM0"; +pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0"; +pwm1.PRU_ICSSG0_PWM.TZ_OUT.$assign = "PRG0_PRU0_GPO19"; +pwm1.PRU_ICSSG0_PWM.TZ_OUT.$used = true; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +sdfm1.PRU_ICSSG0_PRU.$suggestSolution = "PRU_ICSSG0_PRU0"; +sdfm1.PRU_ICSSG0_PRU.GPI16.$suggestSolution = "PRG0_PRU0_GPO16"; +sdfm1.PRU_ICSSG0_PRU.GPI1.$suggestSolution = "PRG0_PRU0_GPO1"; +sdfm1.PRU_ICSSG0_PRU.GPI3.$suggestSolution = "PRG0_PRU0_GPO3"; +sdfm1.PRU_ICSSG0_PRU.GPI5.$suggestSolution = "PRG0_PRU0_GPO5"; +sdfm1.PRU_ICSSG0_PRU.GPI7.$suggestSolution = "PRG0_PRU0_GPO7"; +sdfm1.PRU_ICSSG0_PRU.GPI18.$suggestSolution = "PRG0_PRU0_GPO18"; +sdfm1.PRU_ICSSG0_PRU.GPI17.$suggestSolution = "PRG0_PRU0_GPO17"; +sdfm1.PRU_ICSSG0_PRU.GPI15.$suggestSolution = "PRG0_PRU0_GPO15"; +sdfm1.PRU_ICSSG0_PRU.GPI11.$suggestSolution = "PRG0_PRU0_GPO11"; +sdfm1.PRU_ICSSG0_PRU.GPI13.$suggestSolution = "PRG0_PRU0_GPO13"; +epwm1.EPWM.A.$suggestSolution = "GPMC0_AD3"; +epwm1.EPWM.B.$suggestSolution = "GPMC0_AD4"; +epwm1.EPWM.SYNCO.$suggestSolution = "GPMC0_AD1"; +epwm2.EPWM.$suggestSolution = "EHRPWM1"; +epwm2.EPWM.A.$suggestSolution = "GPMC0_AD5"; +epwm2.EPWM.B.$suggestSolution = "GPMC0_AD6"; +gpio1.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; +gpio3.GPIO.$suggestSolution = "GPIO1"; +gpio4.GPIO.$suggestSolution = "GPIO1"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.IN_APWM_OUT.$suggestSolution = "PRG0_PRU1_GPO15"; +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/main.c b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..4268e23 --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void sdfm_main(void *args); + +void freertos_main(void *args) +{ + sdfm_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..c20eafe --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,128 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..1e56c6d --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,151 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM + + /* TCM used by ICSS PRU to write sdfm sample output */ + .gSdfmSampleOutput : {} align(4) > R5F_TCMB0 +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..87fab3e --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,320 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=icss_sdfm_nine_channel_with_continuous_mode.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + app_sdfm.c \ + epwm_dc.c \ + epwm_drv_aux.c \ + epwm_mod.c \ + sdfm_example.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + ../../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include \ + -I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode \ + -I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lpruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm_nine_channel_with_continuous_mode ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..3623f37 --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=icss_sdfm_nine_channel_with_continuous_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..d46875e --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "mcu_plus_sdk/source/kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/app_sdfm.c b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/app_sdfm.c new file mode 100644 index 0000000..977f04c --- /dev/null +++ b/examples/current_sense/icss_sdfm_nine_channel_with_continuous_mode/app_sdfm.c @@ -0,0 +1,565 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include "ti_drivers_config.h" +#include "ti_drivers_open_close.h" +#include "ti_board_open_close.h" + +#include "epwm_dc.h" +#include "sdfm_example.h" + +/*EPWM1 configuration for sigma delta clock generation: */ +#define APP_EPWM1_ENABLE 0 /*make sure EPWM1 is added in sysconfig before making true this macro */ +/* Output channel - A or B */ +#define APP_EPWM_OUT_CH_EN ( 0x1 ) /* ChA enabled */ + +/* EPWM functional clock */ +/* Functional clock is the same for all EPWMs */ +#define APP_EPWM_FCLK ( CONFIG_EPWM0_FCLK ) + +/* EPWM functional clock dividers */ +#define APP_EPWM_FCLK_HSPCLKDIV ( 0x0 ) /* EPWM_TBCTL:HSPCLKDIV, High-Speed Time-base Clock Prescale Bits */ +#define APP_EPWM_FCLK_CLKDIV ( 0x0 ) /* EPWM_TBCTL:CLKDIV, Time-base Clock Prescale Bits */ + +#if (APP_EPWM_FCLK_HSPCLKDIV != 0x0) +/* EPWM Time Base clock -- all EPWM TB clocks set the same */ +#define APP_EPWM_TB_FREQ ( APP_EPWM_FCLK / ( 2*APP_EPWM_FCLK_HSPCLKDIV * (1 << APP_EPWM_FCLK_CLKDIV))) +#else +/* EPWM Time Base clock -- all EPWM TB clocks set the same */ +#define APP_EPWM_TB_FREQ ( APP_EPWM_FCLK / ( 1 * (1 << APP_EPWM_FCLK_CLKDIV))) +#endif + +/* Initial Duty Cycle of PWM output signal in %, 0 to 100 */ +#define APP_EPWM0_DUTY_CYCLE ( 50U ) + +/* Frequency of PWM output signal in Hz */ +#define APP_EPWM_OUTPUT_FREQ_4K ( 1U * 4000U ) +#define APP_EPWM_OUTPUT_FREQ_8K ( 1U * 8000U ) +#define APP_EPWM_OUTPUT_FREQ_16K ( 1U * 16000U ) +#define APP_EPWM_OUTPUT_FREQ_20K ( 1U * 20000U ) +#define APP_EPWM_OUTPUT_FREQ ( APP_EPWM_OUTPUT_FREQ_8K ) /* init freq */ + +/*sample Read time */ +#define FIRST_SAMPLE_TRIGGER_TIME ((float)((float)1000000/(4*APP_EPWM_OUTPUT_FREQ))) /*sample trigger time for Single Update */ + +#define SECOND_SAMPLE_TRIGGER_TIME ((float)((float)3000000/(4*APP_EPWM_OUTPUT_FREQ))) /*Sample trigger time for double update*/ + +/* PWM count direction (Up, Down, Up/Down) */ +#define APP_EPWM_TB_COUNTER_DIR ( EPWM_TB_COUNTER_DIR_UP_DOWN ) + +/* Test ICSSG instance ID */ +#define TEST_ICSSG_INST_ID ( CONFIG_PRU_ICSS0 ) +/* Test ICSSG slice ID */ +#define TEST_ICSSG_SLICE_ID ( ICSSG_SLICE_ID_0 ) + +/* R5F interrupt settings for ICSSG */ +#define ICSSG_PRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_3 ) /* VIM interrupt number */ +#define ICSSG_RTUPRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_4 ) /* VIM interrupt number */ +#define ICSSG_TXPRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_5 ) +/*Load share macro*/ +#define ICSSG_PRU_LOAD_SHARE_MODE ( 1 ) + +#if ICSSG_PRU_LOAD_SHARE_MODE +#define NUM_CH_SUPPORTED ( 9 ) +#else +#define NUM_CH_SUPPORTED ( 3 ) +#endif + +/* EPWM0 IRQ handler */ +static void epwmIrqHandler(void *handle); + +/* EPWM1 IRQ handler */ +static void epwmIrqHandler1(void *handle); + +/* HWI global variables */ +static HwiP_Object gIcssgPruSdfmHwiObject; /* ICSSG PRU SDFM FW HWI */ + +#if APP_EPWM1_ENABLE +#define APP_EPWM_OUTPUT_FREQ1 (1U*20000000 ) +static HwiP_Object gIcssgRtuSDFMHwiObject; /* ICSSG RTU SDFM FW HWI */ + +static HwiP_Object gEpwm1HwiObject; /* EPWM1 HWI */ + +uint32_t gEpwm1BaseAddr; /* EPWM1 base address */ +EPwmObj_t gEpwm1Obj; /* EPWM1 object */ +Epwm_Handle hEpwm1; /* EPWM1 handle */ + +volatile uint32_t gEpwmOutFreq1 = APP_EPWM_OUTPUT_FREQ1; /*EPWM1 output freq. */ + +#endif + +static HwiP_Object gEpwm0HwiObject; /* EPWM0 HWI */ + +/* EPWM global variables */ +uint32_t gEpwm0BaseAddr; /* EPWM0 base address */ +EPwmObj_t gEpwm0Obj; /* EPWM0 object */ +Epwm_Handle hEpwm0; /* EPWM0 handle */ + + + +volatile uint32_t gEpwmOutFreq = APP_EPWM_OUTPUT_FREQ; /* EPWM output frequency */ + + +/* ICSSG PRU SDFM FW IRQ handler */ +static void pruSdfmIrqHandler(void *handle); +static void rtuPruSdfmIrqHandler(void *handle); +static void txPruSdfmIrqHandler(void *handle); + +/* Test ICSSG handle */ +PRUICSS_Handle gPruIcssHandle; + +/* Test Sdfm handles */ +sdfm_handle gHPruSdfm; + + +/* Sdfm output samples, written by PRU cores */ +__attribute__((section(".gSdfmSampleOutput"))) uint32_t gSdfm_sampleOutput[NUM_CH_SUPPORTED]; + +/* Test Sdfm parameters */ +SdfmPrms gTestSdfmPrms = { + ICSSG_PRU_LOAD_SHARE_MODE, + TEST_ICSSG_SLICE_ID, + PRUICSS_PRU0, + 300000000, + {300000000,0}, /*index[0]= IEP0 clock for G0, index[1] = reserved */ + 20000000, /*Value of SD clock (It should be exact equal to sd clock value)*/ + 0, /*enable double update*/ + FIRST_SAMPLE_TRIGGER_TIME, /*first sample trigger time*/ + SECOND_SAMPLE_TRIGGER_TIME, /*second sample trigger time*/ + APP_EPWM_OUTPUT_FREQ, /*PWM output frequency*/ + {{3500, 1000,0}, /*threshold parameters(High, low & reserevd)*/ + {3500, 1000,0}, + {3500, 1000,0}}, + {{0,0}, /*clock sourse & clock inversion for all channels*/ + {0,0}, + {0,0}}, + 15, /*Over current osr: The effect count is OSR + 1*/ + 128, /*Normal current osr */ + 0, /*comparator enable*/ + (uint32_t)&gSdfm_sampleOutput, /*Output samples base address*/ + 0, + {{4, 18, 2}, + {4, 18, 2}, + {4, 18, 2} + }, /*Fast detect fields {Window size, zero count max, zero count min}*/ + 0, /*enable Phase delay measurment */ + 0, /*Enable zero cross*/ + {1700, 1700, 1700}, /*Zero cross threshold*/ + 1, /*enable continuous mode*/ +}; + +#define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */ + +/* GPIO enable signal for EPWM0-2 on 3-axis breakout board */ +uint32_t gMtr1PwnEnGpioBaseAddr = GPIO_MTR_1_PWM_EN_BASE_ADDR; +uint32_t gMtr1PwnEnGpioPin = GPIO_MTR_1_PWM_EN_PIN; +uint32_t gMtr1PwnEnGpioPinDir = GPIO_MTR_1_PWM_EN_DIR; + +/* Flag for continuing to execute test */ +volatile Bool gRunFlag = TRUE; + + +/* ICSS SDFM Output sample for Channel 0 */ +/*Sample size*/ +#define MAX_SAMPLES (128) + +/* ICSS SDFM Output samples */ +uint32_t sdfm_ch_samples[NUM_CH_SUPPORTED][MAX_SAMPLES] = {0}; +uint32_t sdfmPruIdxCnt = 0; +uint32_t sdfmRtuIdxCnt = 0; +uint32_t sdfmTxPruIdxCnt = 0; + +/* IRQ counters */ +volatile uint32_t gPruSdfmIrqCnt=0; /* PRU ICSS SDFM FW IRQ count */ +volatile uint32_t gRtuPruSdfmIrqCnt=0; /* RTU PRU ICSS SDFM FW IRQ count */ +volatile uint32_t gTxPruSdfmIrqCnt=0; /* TX PRU ICSS SDFM FW IRQ count */ +volatile uint32_t gEpwmIsrCnt=0; /* EPWM0 IRQ count */ +volatile uint32_t gEpwmIsrCnt1=0; +/*PWM Parameters*/ +HwiP_Params hwiPrms; +HwiP_Params hwiPrms1; +EPwmCfgPrms_t epwmCfgPrms; +EPwmCfgPrms_t epwm1CfgPrms; + +void init_pwm() +{ + int32_t status; + /* Initialize EPWM0 base address, perform address translation */ + gEpwm0BaseAddr = (uint32_t)AddrTranslateP_getLocalAddr(CONFIG_EPWM0_BASE_ADDR); + + /* Register & enable EPWM0 interrupt */ + HwiP_Params_init(&hwiPrms); + hwiPrms.intNum = CONFIG_EPWM0_INTR; + hwiPrms.callback = &epwmIrqHandler; + hwiPrms.args = 0; + hwiPrms.isPulse = CONFIG_EPWM0_INTR_IS_PULSE; + hwiPrms.isFIQ = FALSE; + status = HwiP_construct(&gEpwm0HwiObject, &hwiPrms); + DebugP_assert(status == SystemP_SUCCESS); + + /* Configure EPWM0 */ + epwmCfgPrms.epwmId = EPWM_ID_0; + epwmCfgPrms.epwmBaseAddr = gEpwm0BaseAddr; + epwmCfgPrms.epwmOutChEn = APP_EPWM_OUT_CH_EN; + epwmCfgPrms.hspClkDiv = APP_EPWM_FCLK_HSPCLKDIV; + epwmCfgPrms.clkDiv = APP_EPWM_FCLK_CLKDIV; + epwmCfgPrms.epwmTbFreq = APP_EPWM_TB_FREQ; + epwmCfgPrms.epwmOutFreq = gEpwmOutFreq; + epwmCfgPrms.epwmDutyCycle[EPWM_OUTPUT_CH_A] = APP_EPWM0_DUTY_CYCLE; + epwmCfgPrms.epwmTbCounterDir = APP_EPWM_TB_COUNTER_DIR; + epwmCfgPrms.cfgTbSyncIn = TRUE; + epwmCfgPrms.tbPhsValue = 0; + epwmCfgPrms.tbSyncInCounterDir = EPWM_TB_COUNTER_DIR_UP; + epwmCfgPrms.cfgTbSyncOut = TRUE; + epwmCfgPrms.tbSyncOutMode = EPWM_TB_SYNC_OUT_EVT_CNT_EQ_ZERO; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].zeroAction = EPWM_AQ_ACTION_DONOTHING; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].prdAction = EPWM_AQ_ACTION_DONOTHING; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpAUpAction = EPWM_AQ_ACTION_HIGH; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpADownAction = EPWM_AQ_ACTION_LOW; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBUpAction = EPWM_AQ_ACTION_DONOTHING; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBDownAction = EPWM_AQ_ACTION_DONOTHING; + epwmCfgPrms.cfgDb = FALSE; + epwmCfgPrms.cfgEt = TRUE; + epwmCfgPrms.intSel = EPWM_ET_INTR_EVT_CNT_EQ_ZRO; + epwmCfgPrms.intPrd = EPWM_ET_INTR_PERIOD_FIRST_EVT; + hEpwm0 = epwmInit(&epwmCfgPrms, &gEpwm0Obj); + DebugP_assert(hEpwm0 != NULL); + +#if APP_EPWM1_ENABLE // DEBUG code for SDFM clock generation from EPWM1 + /* EPWM1 for SD clock generation */ + /* Initialize EPWM1 base address, perform address translation */ + gEpwm1BaseAddr = (uint32_t)AddrTranslateP_getLocalAddr(CONFIG_EPWM1_BASE_ADDR); + /* Register & enable EPWM0 interrupt */ + HwiP_Params_init(&hwiPrms1); + hwiPrms1.intNum = CONFIG_EPWM1_INTR; + hwiPrms1.callback = &epwmIrqHandler1; + hwiPrms1.args = 0; + hwiPrms1.isPulse = CONFIG_EPWM1_INTR_IS_PULSE; + hwiPrms1.isFIQ = FALSE; + status = HwiP_construct(&gEpwm1HwiObject, &hwiPrms1); + DebugP_assert(status == SystemP_SUCCESS); + /* Configure EPWM0 */ + epwm1CfgPrms.epwmId = EPWM_ID_1; + epwm1CfgPrms.epwmBaseAddr = gEpwm1BaseAddr; + epwm1CfgPrms.epwmOutChEn = APP_EPWM_OUT_CH_EN; + epwm1CfgPrms.hspClkDiv = APP_EPWM_FCLK_HSPCLKDIV; + epwm1CfgPrms.clkDiv = APP_EPWM_FCLK_CLKDIV; + epwm1CfgPrms.epwmTbFreq = APP_EPWM_TB_FREQ; + epwm1CfgPrms.epwmOutFreq = gEpwmOutFreq1; + epwm1CfgPrms.epwmDutyCycle[EPWM_OUTPUT_CH_A] = APP_EPWM0_DUTY_CYCLE; + epwm1CfgPrms.epwmTbCounterDir = APP_EPWM_TB_COUNTER_DIR; + epwm1CfgPrms.cfgTbSyncIn = FALSE; + epwm1CfgPrms.tbPhsValue = 0; + epwm1CfgPrms.cfgTbSyncOut = FALSE; + epwm1CfgPrms.tbSyncOutMode = EPWM_TB_SYNC_OUT_EVT_CNT_EQ_ZERO; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].zeroAction = EPWM_AQ_ACTION_DONOTHING; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].prdAction = EPWM_AQ_ACTION_DONOTHING; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpAUpAction = EPWM_AQ_ACTION_HIGH; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpADownAction = EPWM_AQ_ACTION_LOW; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBUpAction = EPWM_AQ_ACTION_DONOTHING; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBDownAction = EPWM_AQ_ACTION_DONOTHING; + epwm1CfgPrms.cfgDb = FALSE; + epwm1CfgPrms.cfgEt = FALSE; + epwm1CfgPrms.intSel = EPWM_ET_INTR_EVT_CNT_EQ_ZRO; + epwm1CfgPrms.intPrd = EPWM_ET_INTR_PERIOD_FIRST_EVT; + hEpwm1 = epwmInit(&epwm1CfgPrms, &gEpwm1Obj); + DebugP_assert(hEpwm1 != NULL); +#endif +} + +void init_sdfm() +{ + int32_t status; + /* Initialize ICSSG */ + status = initIcss(TEST_ICSSG_INST_ID, TEST_ICSSG_SLICE_ID, PRUICSS_G_MUX_EN, ICSSG_PRU_LOAD_SHARE_MODE, &gPruIcssHandle); + if (status != SDFM_ERR_NERR) { + DebugP_log("Error: initIcss() fail.\r\n"); + return; + } + + gTestSdfmPrms.loadShare = ICSSG_PRU_LOAD_SHARE_MODE; + /* Register & enable ICSSG PRU SDFM FW interrupt */ + HwiP_Params_init(&hwiPrms); + hwiPrms.intNum = ICSSG_PRU_SDFM_INT_NUM; + hwiPrms.callback = &pruSdfmIrqHandler; + hwiPrms.args = 0; + hwiPrms.isPulse = FALSE; + hwiPrms.isFIQ = FALSE; + status = HwiP_construct(&gIcssgPruSdfmHwiObject, &hwiPrms); + DebugP_assert(status == SystemP_SUCCESS); + +#if ICSSG_PRU_LOAD_SHARE_MODE + /* Register & enable ICSSG RTU PRU0 SDFM FW interrupt */ + HwiP_Params_init(&hwiPrms); + hwiPrms.intNum = ICSSG_RTUPRU_SDFM_INT_NUM; + hwiPrms.callback = &rtuPruSdfmIrqHandler; + hwiPrms.args = 0; + hwiPrms.isPulse = FALSE; + hwiPrms.isFIQ = FALSE; + status = HwiP_construct(&gIcssgPruSdfmHwiObject, &hwiPrms); + DebugP_assert(status == SystemP_SUCCESS); + + /* Register & enable ICSSG TX PRU SDFM FW interrupt */ + HwiP_Params_init(&hwiPrms); + hwiPrms.intNum = ICSSG_TXPRU_SDFM_INT_NUM; + hwiPrms.callback = &txPruSdfmIrqHandler; + hwiPrms.args = 0; + hwiPrms.isPulse = FALSE; + hwiPrms.isFIQ = FALSE; + status = HwiP_construct(&gIcssgPruSdfmHwiObject, &hwiPrms); + DebugP_assert(status == SystemP_SUCCESS); + +#endif + /* Initialize PRU cores for SDFM */ + status = initPruSdfm(gPruIcssHandle, PRUICSS_PRU0, &gTestSdfmPrms, &gHPruSdfm); + if (status != SDFM_ERR_NERR) + { + DebugP_log("Error: initPruSdfm() fail.\r\n"); + return; + } + +#if ICSSG_PRU_LOAD_SHARE_MODE + /*Update sdfm prams*/ + gTestSdfmPrms.pruInsId = PRUICSS_RTU_PRU0 ; + gTestSdfmPrms.samplesBaseAddress = (uint32_t)&gSdfm_sampleOutput + 12; + /* Initialize RTU PRU cores for SDFM */ + status = initPruSdfm(gPruIcssHandle, PRUICSS_RTU_PRU0, &gTestSdfmPrms, &gHPruSdfm); + if (status != SDFM_ERR_NERR) + { + DebugP_log("Error: initPruSdfm() fail.\r\n"); + return; + } + /*Update sdfm prams */ + gTestSdfmPrms.pruInsId = PRUICSS_TX_PRU0; + gTestSdfmPrms.samplesBaseAddress = (uint32_t)&gSdfm_sampleOutput + 24 ; + /* Initialize TX PRU cores for SDFM */ + status = initPruSdfm(gPruIcssHandle, PRUICSS_TX_PRU0, &gTestSdfmPrms, &gHPruSdfm); + if (status != SDFM_ERR_NERR) + { + DebugP_log("Error: initPruSdfm() fail.\r\n"); + return; + } + +#endif +} +void sdfm_main(void *args) +{ + + /* Open drivers to open the UART driver for console */ + Drivers_open(); + Board_driversOpen(); + + DebugP_log("Sample SDFM example running!...\r\n"); + + /* Output build time */ + DebugP_log("Build timestamp : %s %s\r\n", __DATE__, __TIME__); + + + /* Enable EPWM0-2 on 3-axis Breakout Board */ + GPIO_setDirMode(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin, gMtr1PwnEnGpioPinDir); + GPIO_pinWriteHigh(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin); + GPIO_pinWriteLow(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin); + + /* + * Configure EPWM0 + */ + init_pwm(); + DebugP_log("EPWM Configured!\r\n"); + + /* Configure SDFM */ + init_sdfm(); + DebugP_log("SDFM Configured!\r\n"); + + /* Start EPWM0 clock */ + CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_EPWM_TB_CLKEN, 1); + + /* Force SW sync for EPWM0 */ + EPWM_tbTriggerSwSync(gEpwm0BaseAddr); + + while(gRunFlag == TRUE) + { + ; + } + + /* Disable and clear interrupts for EPWM0 */ + EPWM_etIntrDisable(gEpwm0BaseAddr); /* Disable interrupts */ + EPWM_etIntrClear(gEpwm0BaseAddr); /* Clear pending interrupts */ + + /* Destroy EPWM0 HWI */ + HwiP_destruct(&gEpwm0HwiObject); + + /* Destroy PRU SDFM HWI */ + HwiP_destruct(&gIcssgPruSdfmHwiObject); + + DebugP_log("All tests have passed!!\r\n"); + + Board_driversClose(); + Drivers_close(); +} + +/* PRU SDFM FW IRQ handler */ +void pruSdfmIrqHandler(void *args) +{ + /* debug, inncrement PRU SDFM IRQ count */ + gPruSdfmIrqCnt++; + /* Clear interrupt at source */ + /* Write 18 to ICSSG_STATUS_CLR_INDEX_REG + Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18 + 18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM. + */ + PRUICSS_clearEvent(gPruIcssHandle, PRU_TRIGGER_HOST_SDFM_EVT); + + if(sdfmPruIdxCnt >= MAX_SAMPLES) + { + sdfmPruIdxCnt = 0; + } + +#if ICSSG_PRU_LOAD_SHARE_MODE + /*Select core */ + gHPruSdfm->sampleOutputInterface = (SDFM_SampleOutInterface *)((uint32_t)&gSdfm_sampleOutput); + /* SDFM Output sample for Channel 3 */ + sdfm_ch_samples[SDFM_CH3][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0); + /* SDFM Output sample for Channel 4 */ + sdfm_ch_samples[SDFM_CH4][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1); + /* SDFM Output sample for Channel 5 */ + sdfm_ch_samples[SDFM_CH5][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2); + +#else + /* SDFM Output sample for Channel 0 */ + sdfm_ch_samples[SDFM_CH0][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0); + /* SDFM Output sample for Channel 1 */ + sdfm_ch_samples[SDFM_CH1][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1); + /* SDFM Output sample for Channel 2 */ + sdfm_ch_samples[SDFM_CH2][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2); +#endif + + sdfmPruIdxCnt++; +} + +/* RTU PRU SDFM FW IRQ handler */ +void rtuPruSdfmIrqHandler(void *args) +{ + /* debug, inncrement PRU SDFM IRQ count */ + gRtuPruSdfmIrqCnt++; + /* Clear interrupt at source */ + /* Write 18 to ICSSG_STATUS_CLR_INDEX_REG + Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18 + 18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM. + */ + PRUICSS_clearEvent(gPruIcssHandle, RTU_TRIGGER_HOST_SDFM_EVT); + + if(sdfmRtuIdxCnt >= MAX_SAMPLES) + { + sdfmRtuIdxCnt = 0; + } + + /*Select core */ + gHPruSdfm->sampleOutputInterface = (SDFM_SampleOutInterface *)((uint32_t)&gSdfm_sampleOutput + 12); + /* SDFM Output sample for Channel 0 */ + sdfm_ch_samples[SDFM_CH0][sdfmRtuIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0); + /* SDFM Output sample for Channel 1 */ + sdfm_ch_samples[SDFM_CH1][sdfmRtuIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1); + /* SDFM Output sample for Channel 2 */ + sdfm_ch_samples[SDFM_CH2][sdfmRtuIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2); + + sdfmRtuIdxCnt++; + +} + +/* PRU SDFM FW IRQ handler */ +void txPruSdfmIrqHandler(void *args) +{ + /* debug, inncrement PRU SDFM IRQ count */ + gTxPruSdfmIrqCnt++; + /* Clear interrupt at source */ + /* Write 18 to ICSSG_STATUS_CLR_INDEX_REG + Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18 + 18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM. + */ + PRUICSS_clearEvent(gPruIcssHandle, TXPRU_TRIGGER_HOST_SDFM_EVT); + + if(sdfmTxPruIdxCnt >= MAX_SAMPLES) + { + sdfmTxPruIdxCnt = 0; + } + + /*Select core */ + gHPruSdfm->sampleOutputInterface = (SDFM_SampleOutInterface *)((uint32_t)&gSdfm_sampleOutput + 24); + + /* SDFM Output sample for Channel 6 */ + sdfm_ch_samples[SDFM_CH6][sdfmTxPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0); + /* SDFM Output sample for Channel 7 */ + sdfm_ch_samples[SDFM_CH7][sdfmTxPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1); + /* SDFM Output sample for Channel 8 */ + sdfm_ch_samples[SDFM_CH8][sdfmTxPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2); + + sdfmTxPruIdxCnt++; +} + +/* EPWM0 IRQ handler */ +static void epwmIrqHandler(void *args) +{ + volatile uint16_t status; + + /* debug, inncrement EPWM0 IRQ count */ + gEpwmIsrCnt++; + + status = EPWM_etIntrStatus(gEpwm0BaseAddr); + if (status & EPWM_ETFLG_INT_MASK) + { + EPWM_etIntrClear(gEpwm0BaseAddr); + } + return; +} + +#if APP_EPWM1_ENABLE //DEBUG code for EPWM1 +/* EPWM0 IRQ handler */ +static void epwmIrqHandler1(void *args) +{ + volatile uint16_t status; + + /* debug, inncrement EPWM0 IRQ count */ + gEpwmIsrCnt1++; + + status = EPWM_etIntrStatus(gEpwm1BaseAddr); + if (status & EPWM_ETFLG_INT_MASK) + { + EPWM_etIntrClear(gEpwm0BaseAddr); + } + return; +} +#endif diff --git a/examples/current_sense/icss_sdfm_three_channel_single_pru_mode/app_sdfm.c b/examples/current_sense/icss_sdfm_three_channel_single_pru_mode/app_sdfm.c index 197d421..4719278 100644 --- a/examples/current_sense/icss_sdfm_three_channel_single_pru_mode/app_sdfm.c +++ b/examples/current_sense/icss_sdfm_three_channel_single_pru_mode/app_sdfm.c @@ -169,6 +169,7 @@ SdfmPrms gTestSdfmPrms = { 0, /*reserved for phase delay*/ 0, /*Enable zero cross*/ {1700, 1700, 1700}, /*Zero cross threshold*/ + 0, /*enable continuous mode*/ }; #define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */ diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/.project/project.js b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/.project/project.js new file mode 100644 index 0000000..f6c2d16 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/.project/project.js @@ -0,0 +1,14 @@ +function getComponentProperty(device) +{ + return require(`./project_${device}`).getComponentProperty(); +}; + +function getComponentBuildProperty(buildOption) +{ + return require(`./project_${buildOption.device}`).getComponentBuildProperty(buildOption); +}; + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/.project/project_am243x.js b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/.project/project_am243x.js new file mode 100644 index 0000000..f88c3b7 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/.project/project_am243x.js @@ -0,0 +1,125 @@ +let path = require('path'); + +let device = "am243x"; + +const files = { + common: [ + "app_sdfm.c", + "epwm_dc.c", + "epwm_drv_aux.c", + "epwm_mod.c", + "sdfm_example.c", + "main.c", + ], +}; + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", + "../../../..", + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + "${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib", + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include", + "${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode", + "${MOTOR_CONTROL_SDK_PATH}/examples/current_sense", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include" + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + + +const lnkfiles = { + common: [ + "linker.cmd", + ] +}; + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLE_MOTORCONTROL_SDFM"; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am243x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "sdfm_main", + }, + } +]; + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "icss_sdfm_three_channel_with_continuous_mode"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + property.isSkipTopLevelBuild = false; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.lnkfiles = lnkfiles; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + + if(buildOption.cpu.match(/r5f*/)) { + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..3e05d5a --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,131 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" + * @versions {"tool":"1.18.0+3266"} + */ + +/** + * Import the modules used in this configuration. + */ +const sdfm = scripting.addModule("/current_sense/sdfm", {}, false); +const sdfm1 = sdfm.addInstance(); +const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false); +const epwm1 = epwm.addInstance(); +const gpio = scripting.addModule("/drivers/gpio/gpio", {}, false); +const gpio1 = gpio.addInstance(); +const gpio2 = gpio.addInstance(); +const gpio3 = gpio.addInstance(); +const gpio4 = gpio.addInstance(); +const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); +const pruicss1 = pruicss.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); +const pwm = scripting.addModule("/pru_icssg/pwm", {}, false); +const pwm1 = pwm.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +sdfm1.$name = "CONFIG_SDFM0"; + +epwm1.$name = "CONFIG_EPWM0"; +epwm1.EPWM.$assign = "EHRPWM0"; +epwm1.EPWM.A.$assign = "GPMC0_AD3"; +epwm1.EPWM.B.$assign = "GPMC0_AD4"; +epwm1.EPWM.SYNCO.$assign = "GPMC0_AD1"; +epwm1.EPWM.SYNCI.$used = false; + +gpio1.$name = "GPIO_MTR_1_PWM_EN"; +gpio1.pinDir = "OUTPUT"; +gpio1.GPIO.$assign = "GPIO0"; +gpio1.GPIO.gpioPin.rx = false; +gpio1.GPIO.gpioPin.$assign = "GPMC0_AD15"; + +gpio2.pinDir = "OUTPUT"; +gpio2.useMcuDomainPeripherals = true; +gpio2.$name = "GPIO_ZC_TH_CH0"; +gpio2.MCU_GPIO.$assign = "MCU_GPIO0"; +gpio2.MCU_GPIO.gpioPin.rx = false; +gpio2.MCU_GPIO.gpioPin.$assign = "MCU_SPI0_D1"; + +gpio3.pinDir = "OUTPUT"; +gpio3.useMcuDomainPeripherals = true; +gpio3.$name = "GPIO_ZC_TH_CH1"; +gpio3.MCU_GPIO.gpioPin.rx = false; +gpio3.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_CS0"; + +gpio4.pinDir = "OUTPUT"; +gpio4.useMcuDomainPeripherals = true; +gpio4.$name = "GPIO_ZC_TH_CH2"; +gpio4.MCU_GPIO.gpioPin.$assign = "MCU_SPI1_D1"; + +pruicss1.$name = "CONFIG_PRU_ICSS0"; +pruicss1.coreClk = 300000000; +pruicss1.iepClk = 300000000; +sdfm1.pru = pruicss1; +pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO.create(1); +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].$name = "CONFIG_PRU_ICSS_ECAP_IO0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.IN_APWM_OUT.$used = true; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x80000000; +mpu_armv76.size = 31; + +pwm1.$name = "CONFIG_PRU_ICSS_PWM0"; +pwm1.PRU_ICSSG0_PWM.TZ_OUT.$used = true; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +sdfm1.PRU_ICSSG0_PRU.$suggestSolution = "PRU_ICSSG0_PRU0"; +sdfm1.PRU_ICSSG0_PRU.GPI16.$suggestSolution = "PRG0_PRU0_GPO16"; +sdfm1.PRU_ICSSG0_PRU.GPI1.$suggestSolution = "PRG0_PRU0_GPO1"; +sdfm1.PRU_ICSSG0_PRU.GPI3.$suggestSolution = "PRG0_PRU0_GPO3"; +sdfm1.PRU_ICSSG0_PRU.GPI5.$suggestSolution = "PRG0_PRU0_GPO5"; +gpio3.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; +gpio4.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.$suggestSolution = "PRU_ICSSG0_ECAP0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.IN_APWM_OUT.$suggestSolution = "PRG0_PRU1_GPO15"; +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; +pwm1.PRU_ICSSG0_PWM.$suggestSolution = "PRU_ICSSG0_PWM0"; +pwm1.PRU_ICSSG0_PWM.TZ_OUT.$suggestSolution = "PRG0_PRU0_GPO19"; diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/main.c b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..4268e23 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void sdfm_main(void *args); + +void freertos_main(void *args) +{ + sdfm_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..98abd14 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,128 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..1e56c6d --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,151 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM + + /* TCM used by ICSS PRU to write sdfm sample output */ + .gSdfmSampleOutput : {} align(4) > R5F_TCMB0 +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..f5f06aa --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,320 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + app_sdfm.c \ + epwm_dc.c \ + epwm_drv_aux.c \ + epwm_mod.c \ + sdfm_example.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + ../../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include \ + -I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode \ + -I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lpruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm_three_channel_with_continuous_mode ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..dce325d --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=icss_sdfm_three_channel_with_continuous_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..d46875e --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "mcu_plus_sdk/source/kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..dc22fa5 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,133 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" + * @versions {"tool":"1.18.0+3266"} + */ + +/** + * Import the modules used in this configuration. + */ +const sdfm = scripting.addModule("/current_sense/sdfm", {}, false); +const sdfm1 = sdfm.addInstance(); +const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false); +const epwm1 = epwm.addInstance(); +const epwm2 = epwm.addInstance(); +const gpio = scripting.addModule("/drivers/gpio/gpio", {}, false); +const gpio1 = gpio.addInstance(); +const gpio2 = gpio.addInstance(); +const gpio3 = gpio.addInstance(); +const gpio4 = gpio.addInstance(); +const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); +const pruicss1 = pruicss.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const pwm = scripting.addModule("/pru_icssg/pwm", {}, false); +const pwm1 = pwm.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +sdfm1.$name = "CONFIG_SDFM0"; + +epwm1.$name = "CONFIG_EPWM0"; +epwm1.EPWM.$assign = "EHRPWM0"; +epwm1.EPWM.SYNCI.$used = false; + +epwm2.$name = "CONFIG_EPWM1"; +epwm2.EPWM.SYNCO.$assign = "GPMC0_AD1"; +epwm2.EPWM.SYNCO.$used = false; +epwm2.EPWM.SYNCI.$used = false; + +gpio1.$name = "GPIO_MTR_1_PWM_EN"; +gpio1.pinDir = "OUTPUT"; +gpio1.useMcuDomainPeripherals = true; +gpio1.MCU_GPIO.gpioPin.$assign = "MCU_UART0_RXD"; + +gpio2.pinDir = "OUTPUT"; +gpio2.$name = "GPIO_ZC_TH_CH0"; +gpio2.GPIO.$assign = "GPIO0"; +gpio2.GPIO.gpioPin.rx = false; +gpio2.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO18"; + +gpio3.pinDir = "OUTPUT"; +gpio3.$name = "GPIO_ZC_TH_CH1"; +gpio3.GPIO.gpioPin.rx = false; +gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; + +gpio4.pinDir = "OUTPUT"; +gpio4.$name = "GPIO_ZC_TH_CH2"; +gpio4.GPIO.gpioPin.rx = false; +gpio4.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1"; + +pruicss1.$name = "CONFIG_PRU_ICSS0"; +pruicss1.coreClk = 300000000; +pruicss1.iepClk = 300000000; +sdfm1.pru = pruicss1; +pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO.create(1); +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].$name = "CONFIG_PRU_ICSS_ECAP_IO0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.IN_APWM_OUT.$used = true; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +pwm1.$name = "CONFIG_PRU_ICSS_PWM0"; +pwm1.PRU_ICSSG0_PWM.$assign = "PRU_ICSSG0_PWM0"; +pwm1.PRU_ICSSG0_PWM.TZ_OUT.$used = true; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +sdfm1.PRU_ICSSG0_PRU.$suggestSolution = "PRU_ICSSG0_PRU0"; +sdfm1.PRU_ICSSG0_PRU.GPI16.$suggestSolution = "PRG0_PRU0_GPO16"; +sdfm1.PRU_ICSSG0_PRU.GPI1.$suggestSolution = "PRG0_PRU0_GPO1"; +sdfm1.PRU_ICSSG0_PRU.GPI3.$suggestSolution = "PRG0_PRU0_GPO3"; +sdfm1.PRU_ICSSG0_PRU.GPI5.$suggestSolution = "PRG0_PRU0_GPO5"; +epwm1.EPWM.A.$suggestSolution = "GPMC0_AD3"; +epwm1.EPWM.B.$suggestSolution = "GPMC0_AD4"; +epwm1.EPWM.SYNCO.$suggestSolution = "GPMC0_AD1"; +epwm2.EPWM.$suggestSolution = "EHRPWM1"; +epwm2.EPWM.A.$suggestSolution = "GPMC0_AD5"; +epwm2.EPWM.B.$suggestSolution = "GPMC0_AD6"; +gpio1.MCU_GPIO.$suggestSolution = "MCU_GPIO0"; +gpio3.GPIO.$suggestSolution = "GPIO1"; +gpio4.GPIO.$suggestSolution = "GPIO1"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.$suggestSolution = "PRU_ICSSG0_ECAP0"; +pruicss1.AdditionalICSSSettings[0].PruEcapIO[0].PRU_ICSSG0_ECAP.IN_APWM_OUT.$suggestSolution = "PRG0_PRU1_GPO15"; +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; +pwm1.PRU_ICSSG0_PWM.TZ_OUT.$suggestSolution = "PRG0_PRU0_GPO19"; diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/main.c b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..4268e23 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void sdfm_main(void *args); + +void freertos_main(void *args) +{ + sdfm_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..9df9b45 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,128 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..1e56c6d --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,151 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM + + /* TCM used by ICSS PRU to write sdfm sample output */ + .gSdfmSampleOutput : {} align(4) > R5F_TCMB0 +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..8f2720f --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,320 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=icss_sdfm_three_channel_with_continuous_mode.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + app_sdfm.c \ + epwm_dc.c \ + epwm_drv_aux.c \ + epwm_mod.c \ + sdfm_example.c \ + main.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + ../../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include \ + -I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode \ + -I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lpruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm_three_channel_with_continuous_mode ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..b072742 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=icss_sdfm_three_channel_with_continuous_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..d46875e --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "mcu_plus_sdk/source/kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/app_sdfm.c b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/app_sdfm.c new file mode 100644 index 0000000..a2e3ee8 --- /dev/null +++ b/examples/current_sense/icss_sdfm_three_channel_with_continuous_mode/app_sdfm.c @@ -0,0 +1,433 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include "ti_drivers_config.h" +#include "ti_drivers_open_close.h" +#include "ti_board_open_close.h" + +#include "epwm_dc.h" +#include "sdfm_example.h" + +/*EPWM1 configuration for sigma delta clock generation: */ +#define APP_EPWM1_ENABLE 0 /*make sure EPWM1 is added in sysconfig before making true this macro */ +/* Output channel - A or B */ +#define APP_EPWM_OUT_CH_EN ( 0x1 ) /* ChA enabled */ + +#define NUM_CH_SUPPORTED ( 3 ) +#define ICSSG_PRU_LOAD_SHARE_MODE ( 0 ) +/* EPWM functional clock */ +/* Functional clock is the same for all EPWMs */ +#define APP_EPWM_FCLK ( CONFIG_EPWM0_FCLK ) + +/* EPWM functional clock dividers */ +#define APP_EPWM_FCLK_HSPCLKDIV ( 0x0 ) /* EPWM_TBCTL:HSPCLKDIV, High-Speed Time-base Clock Prescale Bits */ +#define APP_EPWM_FCLK_CLKDIV ( 0x0 ) /* EPWM_TBCTL:CLKDIV, Time-base Clock Prescale Bits */ + +#if (APP_EPWM_FCLK_HSPCLKDIV != 0x0) +/* EPWM Time Base clock -- all EPWM TB clocks set the same */ +#define APP_EPWM_TB_FREQ ( APP_EPWM_FCLK / ( 2*APP_EPWM_FCLK_HSPCLKDIV * (1 << APP_EPWM_FCLK_CLKDIV))) +#else +/* EPWM Time Base clock -- all EPWM TB clocks set the same */ +#define APP_EPWM_TB_FREQ ( APP_EPWM_FCLK / ( 1 * (1 << APP_EPWM_FCLK_CLKDIV))) +#endif + +/* Initial Duty Cycle of PWM output signal in %, 0 to 100 */ +#define APP_EPWM0_DUTY_CYCLE ( 50U ) + +/* Frequency of PWM output signal in Hz */ +#define APP_EPWM_OUTPUT_FREQ_4K ( 1U * 4000U ) +#define APP_EPWM_OUTPUT_FREQ_8K ( 1U * 8000U ) +#define APP_EPWM_OUTPUT_FREQ_16K ( 1U * 16000U ) +#define APP_EPWM_OUTPUT_FREQ_20K ( 1U * 20000U ) +#define APP_EPWM_OUTPUT_FREQ ( APP_EPWM_OUTPUT_FREQ_8K ) /* init freq */ + +/*sample Read time */ +#define FIRST_SAMPLE_TRIGGER_TIME ((float)((float)1000000/(4*APP_EPWM_OUTPUT_FREQ))) /*sample trigger time for Single Update */ + +#define SECOND_SAMPLE_TRIGGER_TIME ((float)((float)3000000/(4*APP_EPWM_OUTPUT_FREQ))) /*Sample trigger time for double update*/ + +/* PWM count direction (Up, Down, Up/Down) */ +#define APP_EPWM_TB_COUNTER_DIR ( EPWM_TB_COUNTER_DIR_UP_DOWN ) + +/* Test ICSSG instance ID */ +#define TEST_ICSSG_INST_ID ( CONFIG_PRU_ICSS0 ) +/* Test ICSSG slice ID */ +#define TEST_ICSSG_SLICE_ID ( ICSSG_SLICE_ID_0 ) + +/* R5F interrupt settings for ICSSG */ +#define ICSSG_PRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_3 ) /* VIM interrupt number */ + +/* EPWM0 IRQ handler */ +static void epwmIrqHandler(void *handle); + +/* EPWM1 IRQ handler */ +static void epwmIrqHandler1(void *handle); + +/* HWI global variables */ +static HwiP_Object gIcssgPruSdfmHwiObject; /* ICSSG PRU SDFM FW HWI */ + +#if APP_EPWM1_ENABLE +#define APP_EPWM_OUTPUT_FREQ1 (1U*20000000 ) +static HwiP_Object gIcssgRtuSDFMHwiObject; /* ICSSG RTU SDFM FW HWI */ + +static HwiP_Object gEpwm1HwiObject; /* EPWM1 HWI */ + +uint32_t gEpwm1BaseAddr; /* EPWM1 base address */ +EPwmObj_t gEpwm1Obj; /* EPWM1 object */ +Epwm_Handle hEpwm1; /* EPWM1 handle */ + +volatile uint32_t gEpwmOutFreq1 = APP_EPWM_OUTPUT_FREQ1; /*EPWM1 output freq. */ + +#endif + +static HwiP_Object gEpwm0HwiObject; /* EPWM0 HWI */ + +/* EPWM global variables */ +uint32_t gEpwm0BaseAddr; /* EPWM0 base address */ +EPwmObj_t gEpwm0Obj; /* EPWM0 object */ +Epwm_Handle hEpwm0; /* EPWM0 handle */ + + + +volatile uint32_t gEpwmOutFreq = APP_EPWM_OUTPUT_FREQ; /* EPWM output frequency */ + + +/* ICSSG PRU SDFM FW IRQ handler */ +static void pruSdfmIrqHandler(void *handle); + + +/* Test ICSSG handle */ +PRUICSS_Handle gPruIcssHandle; + +/* Test Sdfm handles */ +sdfm_handle gHPruSdfm; + +/* Sdfm output samples, written by PRU cores */ +__attribute__((section(".gSdfmSampleOutput"))) uint32_t gSdfm_sampleOutput[NUM_CH_SUPPORTED]; + +/* Test Sdfm parameters */ +SdfmPrms gTestSdfmPrms = { + 0, /*Load share enable*/ + PRUICSS_PRU0, + TEST_ICSSG_SLICE_ID, + 300000000, /*PRU core clock*/ + {300000000, 0}, /*Value of G0IEP0, second index reserved for G1IEP0 */ + 20000000, /*Value of SD clock (It should be exact equal to sd clock value)*/ + 0, /*enable double update*/ + FIRST_SAMPLE_TRIGGER_TIME, /*first sample trigger time*/ + SECOND_SAMPLE_TRIGGER_TIME, /*second sample trigger time*/ + APP_EPWM_OUTPUT_FREQ, /*PWM output frequency*/ + {{3500, 1000,0}, /*threshold parameters(High, low & reserevd)*/ + {3500, 1000,0}, + {3500, 1000,0}}, + {{0,0}, /*clock sourse & clock inversion for all channels*/ + {0,0}, + {0,0}}, + 15, /*Over current osr: The effect count is OSR + 1*/ + 128, /*Normal current osr */ + 1, /*comparator enable*/ + (uint32_t)&gSdfm_sampleOutput, /*Output samples base address*/ + 0, /*Fast Detect enable */ + {{4, 18, 2}, + {4, 18, 2}, + {4, 18, 2} + }, /*Fast detect fields {Window size, zero count max, zero count min}*/ + 0, /*reserved for phase delay*/ + 0, /*Enable zero cross*/ + {1700, 1700, 1700}, /*Zero cross threshold*/ + 1, /*enable continuous mode*/ +}; + +#define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */ + +/* GPIO enable signal for EPWM0-2 on 3-axis breakout board */ +uint32_t gMtr1PwnEnGpioBaseAddr = GPIO_MTR_1_PWM_EN_BASE_ADDR; +uint32_t gMtr1PwnEnGpioPin = GPIO_MTR_1_PWM_EN_PIN; +uint32_t gMtr1PwnEnGpioPinDir = GPIO_MTR_1_PWM_EN_DIR; + +/* Flag for continuing to execute test */ +volatile Bool gRunFlag = TRUE; + + +/* ICSS SDFM Output sample for Channel 0 */ +/*Sample size*/ +#define MAX_SAMPLES (128) + +/* ICSS SDFM Output samples */ +uint32_t sdfm_ch_samples[NUM_CH_SUPPORTED][MAX_SAMPLES] = {0}; +uint32_t sdfmPruIdxCnt = 0; + +/* IRQ counters */ +volatile uint32_t gPruSdfmIrqCnt=0; /* PRU ICSS SDFM FW IRQ count */ + +volatile uint32_t gEpwmIsrCnt=0; /* EPWM0 IRQ count */ +volatile uint32_t gEpwmIsrCnt1=0; +/*PWM Parameters*/ +HwiP_Params hwiPrms; +HwiP_Params hwiPrms1; +EPwmCfgPrms_t epwmCfgPrms; +EPwmCfgPrms_t epwm1CfgPrms; + +void init_pwm() +{ + int32_t status; + /* Initialize EPWM0 base address, perform address translation */ + gEpwm0BaseAddr = (uint32_t)AddrTranslateP_getLocalAddr(CONFIG_EPWM0_BASE_ADDR); + + /* Register & enable EPWM0 interrupt */ + HwiP_Params_init(&hwiPrms); + hwiPrms.intNum = CONFIG_EPWM0_INTR; + hwiPrms.callback = &epwmIrqHandler; + hwiPrms.args = 0; + hwiPrms.isPulse = CONFIG_EPWM0_INTR_IS_PULSE; + hwiPrms.isFIQ = FALSE; + status = HwiP_construct(&gEpwm0HwiObject, &hwiPrms); + DebugP_assert(status == SystemP_SUCCESS); + + /* Configure EPWM0 */ + epwmCfgPrms.epwmId = EPWM_ID_0; + epwmCfgPrms.epwmBaseAddr = gEpwm0BaseAddr; + epwmCfgPrms.epwmOutChEn = APP_EPWM_OUT_CH_EN; + epwmCfgPrms.hspClkDiv = APP_EPWM_FCLK_HSPCLKDIV; + epwmCfgPrms.clkDiv = APP_EPWM_FCLK_CLKDIV; + epwmCfgPrms.epwmTbFreq = APP_EPWM_TB_FREQ; + epwmCfgPrms.epwmOutFreq = gEpwmOutFreq; + epwmCfgPrms.epwmDutyCycle[EPWM_OUTPUT_CH_A] = APP_EPWM0_DUTY_CYCLE; + epwmCfgPrms.epwmTbCounterDir = APP_EPWM_TB_COUNTER_DIR; + epwmCfgPrms.cfgTbSyncIn = TRUE; + epwmCfgPrms.tbPhsValue = 0; + epwmCfgPrms.tbSyncInCounterDir = EPWM_TB_COUNTER_DIR_UP; + epwmCfgPrms.cfgTbSyncOut = TRUE; + epwmCfgPrms.tbSyncOutMode = EPWM_TB_SYNC_OUT_EVT_CNT_EQ_ZERO; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].zeroAction = EPWM_AQ_ACTION_DONOTHING; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].prdAction = EPWM_AQ_ACTION_DONOTHING; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpAUpAction = EPWM_AQ_ACTION_HIGH; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpADownAction = EPWM_AQ_ACTION_LOW; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBUpAction = EPWM_AQ_ACTION_DONOTHING; + epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBDownAction = EPWM_AQ_ACTION_DONOTHING; + epwmCfgPrms.cfgDb = FALSE; + epwmCfgPrms.cfgEt = TRUE; + epwmCfgPrms.intSel = EPWM_ET_INTR_EVT_CNT_EQ_ZRO; + epwmCfgPrms.intPrd = EPWM_ET_INTR_PERIOD_FIRST_EVT; + hEpwm0 = epwmInit(&epwmCfgPrms, &gEpwm0Obj); + DebugP_assert(hEpwm0 != NULL); + +#if APP_EPWM1_ENABLE // DEBUG code for SDFM clock generation from EPWM1 + /* EPWM1 for SD clock generation */ + /* Initialize EPWM1 base address, perform address translation */ + gEpwm1BaseAddr = (uint32_t)AddrTranslateP_getLocalAddr(CONFIG_EPWM1_BASE_ADDR); + /* Register & enable EPWM0 interrupt */ + HwiP_Params_init(&hwiPrms1); + hwiPrms1.intNum = CONFIG_EPWM1_INTR; + hwiPrms1.callback = &epwmIrqHandler1; + hwiPrms1.args = 0; + hwiPrms1.isPulse = CONFIG_EPWM1_INTR_IS_PULSE; + hwiPrms1.isFIQ = FALSE; + status = HwiP_construct(&gEpwm1HwiObject, &hwiPrms1); + DebugP_assert(status == SystemP_SUCCESS); + /* Configure EPWM0 */ + epwm1CfgPrms.epwmId = EPWM_ID_1; + epwm1CfgPrms.epwmBaseAddr = gEpwm1BaseAddr; + epwm1CfgPrms.epwmOutChEn = APP_EPWM_OUT_CH_EN; + epwm1CfgPrms.hspClkDiv = APP_EPWM_FCLK_HSPCLKDIV; + epwm1CfgPrms.clkDiv = APP_EPWM_FCLK_CLKDIV; + epwm1CfgPrms.epwmTbFreq = APP_EPWM_TB_FREQ; + epwm1CfgPrms.epwmOutFreq = gEpwmOutFreq1; + epwm1CfgPrms.epwmDutyCycle[EPWM_OUTPUT_CH_A] = APP_EPWM0_DUTY_CYCLE; + epwm1CfgPrms.epwmTbCounterDir = APP_EPWM_TB_COUNTER_DIR; + epwm1CfgPrms.cfgTbSyncIn = FALSE; + epwm1CfgPrms.tbPhsValue = 0; + epwm1CfgPrms.cfgTbSyncOut = FALSE; + epwm1CfgPrms.tbSyncOutMode = EPWM_TB_SYNC_OUT_EVT_CNT_EQ_ZERO; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].zeroAction = EPWM_AQ_ACTION_DONOTHING; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].prdAction = EPWM_AQ_ACTION_DONOTHING; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpAUpAction = EPWM_AQ_ACTION_HIGH; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpADownAction = EPWM_AQ_ACTION_LOW; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBUpAction = EPWM_AQ_ACTION_DONOTHING; + epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBDownAction = EPWM_AQ_ACTION_DONOTHING; + epwm1CfgPrms.cfgDb = FALSE; + epwm1CfgPrms.cfgEt = FALSE; + epwm1CfgPrms.intSel = EPWM_ET_INTR_EVT_CNT_EQ_ZRO; + epwm1CfgPrms.intPrd = EPWM_ET_INTR_PERIOD_FIRST_EVT; + hEpwm1 = epwmInit(&epwm1CfgPrms, &gEpwm1Obj); + DebugP_assert(hEpwm1 != NULL); +#endif +} + +void init_sdfm() +{ + int32_t status; + /* Initialize ICSSG */ + status = initIcss(TEST_ICSSG_INST_ID, TEST_ICSSG_SLICE_ID, PRUICSS_G_MUX_EN, ICSSG_PRU_LOAD_SHARE_MODE, &gPruIcssHandle); + if (status != SDFM_ERR_NERR) { + DebugP_log("Error: initIcss() fail.\r\n"); + return; + } + + /* Register & enable ICSSG PRU SDFM FW interrupt */ + HwiP_Params_init(&hwiPrms); + hwiPrms.intNum = ICSSG_PRU_SDFM_INT_NUM; + hwiPrms.callback = &pruSdfmIrqHandler; + hwiPrms.args = 0; + hwiPrms.isPulse = FALSE; + hwiPrms.isFIQ = FALSE; + status = HwiP_construct(&gIcssgPruSdfmHwiObject, &hwiPrms); + DebugP_assert(status == SystemP_SUCCESS); + + /* Initialize PRU cores for SDFM */ + status = initPruSdfm(gPruIcssHandle, PRUICSS_PRU0, &gTestSdfmPrms, &gHPruSdfm); + if (status != SDFM_ERR_NERR) + { + DebugP_log("Error: initPruSdfm() fail.\r\n"); + return; + } +} +void sdfm_main(void *args) +{ + + /* Open drivers to open the UART driver for console */ + Drivers_open(); + Board_driversOpen(); + + DebugP_log("Sample SDFM example running!...\r\n"); + + /* Output build time */ + DebugP_log("Build timestamp : %s %s\r\n", __DATE__, __TIME__); + + + /* Enable EPWM0-2 on 3-axis Breakout Board */ + GPIO_setDirMode(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin, gMtr1PwnEnGpioPinDir); + GPIO_pinWriteHigh(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin); + GPIO_pinWriteLow(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin); + + /* + * Configure EPWM0 + */ + init_pwm(); + DebugP_log("EPWM Configured!\r\n"); + + /* Configure SDFM */ + init_sdfm(); + DebugP_log("SDFM Configured!\r\n"); + + /* Start EPWM0 clock */ + CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_EPWM_TB_CLKEN, 1); + + /* Force SW sync for EPWM0 */ + EPWM_tbTriggerSwSync(gEpwm0BaseAddr); + + while(gRunFlag == TRUE) + { + ; + } + + /* Disable and clear interrupts for EPWM0 */ + EPWM_etIntrDisable(gEpwm0BaseAddr); /* Disable interrupts */ + EPWM_etIntrClear(gEpwm0BaseAddr); /* Clear pending interrupts */ + + /* Destroy EPWM0 HWI */ + HwiP_destruct(&gEpwm0HwiObject); + + /* Destroy PRU SDFM HWI */ + HwiP_destruct(&gIcssgPruSdfmHwiObject); + + DebugP_log("All tests have passed!!\r\n"); + + Board_driversClose(); + Drivers_close(); +} + +/* PRU SDFM FW IRQ handler */ +void pruSdfmIrqHandler(void *args) +{ + /* debug, inncrement PRU SDFM IRQ count */ + gPruSdfmIrqCnt++; + /* Clear interrupt at source */ + /* Write 18 to ICSSG_STATUS_CLR_INDEX_REG + Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18 + 18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM. + */ + PRUICSS_clearEvent(gPruIcssHandle, PRU_TRIGGER_HOST_SDFM_EVT); + + if(sdfmPruIdxCnt >= MAX_SAMPLES) + { + sdfmPruIdxCnt = 0; + } + + /* SDFM Output sample for Channel 0 */ + sdfm_ch_samples[SDFM_CH0][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0); + /* SDFM Output sample for Channel 1 */ + sdfm_ch_samples[SDFM_CH1][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1); + /* SDFM Output sample for Channel 2 */ + sdfm_ch_samples[SDFM_CH2][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2); + + sdfmPruIdxCnt++; +} + +/* EPWM0 IRQ handler */ +static void epwmIrqHandler(void *args) +{ + volatile uint16_t status; + + /* debug, inncrement EPWM0 IRQ count */ + gEpwmIsrCnt++; + + status = EPWM_etIntrStatus(gEpwm0BaseAddr); + if(status & EPWM_ETFLG_INT_MASK) + { + EPWM_etIntrClear(gEpwm0BaseAddr); + } + return; +} + +#if APP_EPWM1_ENABLE //DEBUG code for EPWM1 +/* EPWM0 IRQ handler */ +static void epwmIrqHandler1(void *args) +{ + volatile uint16_t status; + + /* debug, inncrement EPWM0 IRQ count */ + gEpwmIsrCnt1++; + + status = EPWM_etIntrStatus(gEpwm1BaseAddr); + if (status & EPWM_ETFLG_INT_MASK) + { + EPWM_etIntrClear(gEpwm0BaseAddr); + } + return; +} +#endif diff --git a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/app_sdfm.c b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/app_sdfm.c index e738940..5ba77e7 100644 --- a/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/app_sdfm.c +++ b/examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/app_sdfm.c @@ -171,6 +171,7 @@ SdfmPrms gTestSdfmPrms = { 1, /*Phase delay enable*/ 0, /*Enable zero cross*/ {1700, 1700, 1700}, /*Zero cross threshold*/ + 0, /*enable continuous mode*/ }; #define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */ diff --git a/examples/current_sense/sdfm_example.c b/examples/current_sense/sdfm_example.c index b01dc88..c8a007e 100644 --- a/examples/current_sense/sdfm_example.c +++ b/examples/current_sense/sdfm_example.c @@ -320,6 +320,12 @@ int32_t initSdfmFw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, PRU /*set Noraml current OSR */ SDFM_setFilterOverSamplingRatio(hSdfm, pSdfmPrms->filterOsr); + + /*Enable Continuous mode*/ + if(pSdfmPrms->enableContinuousMode) + { + SDFM_enableContinuousNormalCurrent(hSdfm); + } /*below configuration for all three channel*/ for(SDFM_CH = 0; SDFM_CH < NUM_CH_SUPPORTED_PER_AXIS; SDFM_CH++) diff --git a/examples/current_sense/sdfm_example.h b/examples/current_sense/sdfm_example.h index 7fd28e3..7dfb588 100644 --- a/examples/current_sense/sdfm_example.h +++ b/examples/current_sense/sdfm_example.h @@ -177,6 +177,8 @@ typedef struct SdfmPrms_s uint8_t enZeroCross; /**