am64x/am243x: SDFM: Enable Load share mode

- Enable load share mode

Fixes: PINDSW-7112

Signed-off-by: Achala Ram <a-ram@ti.com>
This commit is contained in:
Achala Ram 2023-11-24 19:05:34 +05:30
parent 3c5cc57d30
commit 7df441dc89
100 changed files with 8828 additions and 1523 deletions

View File

@ -820,9 +820,9 @@
"resourceSubClass": [
"example.general"
],
"description": "A Icss Sdfm Example. CPU is R5FSS0-0 running FREERTOS.",
"name": "icss_sdfm",
"location": "../../examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
"description": "A Icss Sdfm Nine Channel Load Share Mode Example. CPU is R5FSS0-0 running FREERTOS.",
"name": "icss_sdfm_nine_channel_load_share_mode",
"location": "../../examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
"devtools": [
"AM243x_GP_EVM"
],
@ -834,7 +834,7 @@
],
"subCategories": [
"current_sense",
"icss_sdfm",
"icss_sdfm_nine_channel_load_share_mode",
"r5fss0-0_freertos"
],
"mainCategories": [
@ -852,9 +852,9 @@
"resourceSubClass": [
"example.general"
],
"description": "A Icss Sdfm Example. CPU is R5FSS0-0 running FREERTOS.",
"name": "icss_sdfm",
"location": "../../examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
"description": "A Icss Sdfm Nine Channel Load Share Mode Example. CPU is R5FSS0-0 running FREERTOS.",
"name": "icss_sdfm_nine_channel_load_share_mode",
"location": "../../examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
"devtools": [
"AM243x_LAUNCHPAD"
],
@ -866,7 +866,71 @@
],
"subCategories": [
"current_sense",
"icss_sdfm",
"icss_sdfm_nine_channel_load_share_mode",
"r5fss0-0_freertos"
],
"mainCategories": [
[
"Examples",
"Development Tools"
]
]
},
{
"resourceType": "project.ccs",
"resourceClass": [
"example"
],
"resourceSubClass": [
"example.general"
],
"description": "A Icss Sdfm Three Channel Single Pru Mode Example. CPU is R5FSS0-0 running FREERTOS.",
"name": "icss_sdfm_three_channel_single_pru_mode",
"location": "../../examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
"devtools": [
"AM243x_GP_EVM"
],
"kernel": [
"freertos"
],
"compiler": [
"ticlang"
],
"subCategories": [
"current_sense",
"icss_sdfm_three_channel_single_pru_mode",
"r5fss0-0_freertos"
],
"mainCategories": [
[
"Examples",
"Development Tools"
]
]
},
{
"resourceType": "project.ccs",
"resourceClass": [
"example"
],
"resourceSubClass": [
"example.general"
],
"description": "A Icss Sdfm Three Channel Single Pru Mode Example. CPU is R5FSS0-0 running FREERTOS.",
"name": "icss_sdfm_three_channel_single_pru_mode",
"location": "../../examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec",
"devtools": [
"AM243x_LAUNCHPAD"
],
"kernel": [
"freertos"
],
"compiler": [
"ticlang"
],
"subCategories": [
"current_sense",
"icss_sdfm_three_channel_single_pru_mode",
"r5fss0-0_freertos"
],
"mainCategories": [

View File

@ -29,11 +29,13 @@ const example_file_list = [
"examples/position_sense/bissc_diagnostic/single_channel/.project/project.js",
"examples/position_sense/bissc_diagnostic/multi_channel_load_share/.project/project.js",
"examples/position_sense/bissc_diagnostic/multi_channel_single_pru/.project/project.js",
"examples/current_sense/icss_sdfm/.project/project.js",
"examples/current_sense/icss_sdfm_nine_channel_load_share_mode/.project/project.js",
"examples/current_sense/icss_sdfm_three_channel_single_pru_mode/.project/project.js",
"examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/.project/project.js",
"examples/pruicss_pwm/pruicss_pwm_duty_cycle/.project/project.js",
"examples/pruicss_pwm/pruicss_pwm_epwm_sync/.project/project.js",
"source/current_sense/sdfm/firmware/.project/project.js",
"source/current_sense/sdfm/firmware/multi_axis_load_share/.project/project.js",
"source/current_sense/sdfm/firmware/single_axis_single_pru/.project/project.js",
"source/position_sense/endat/firmware/multi_channel_load_share/.project/project.js",
"source/position_sense/endat/firmware/single_channel/.project/project.js",
"source/position_sense/endat/firmware/multi_channel_single_pru/.project/project.js",

View File

@ -1,7 +1,6 @@
const common = require("../common.js");
const component_file_list = [
"source/current_sense/sdfm/.project/project.js",
"source/position_sense/endat/.project/project.js",
"source/position_sense/hdsl/.project/project.js",
"source/position_sense/tamagawa/.project/project.js",
@ -23,7 +22,6 @@ const example_file_list = [
"examples/position_sense/tamagawa_diagnostic/multi_channel/.project/project.js",
"examples/position_sense/tamagawa_diagnostic/single_channel/.project/project.js",
"examples/pruicss_pwm/pruicss_pwm_duty_cycle/.project/project.js",
"source/current_sense/sdfm/firmware/.project/project.js",
"source/position_sense/endat/firmware/multi_channel_load_share/.project/project.js",
"source/position_sense/endat/firmware/single_channel/.project/project.js",
"source/position_sense/endat/firmware/multi_channel_single_pru/.project/project.js",

View File

@ -39,7 +39,7 @@ const includes_freertos_r5f = {
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f",
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include",
"${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm",
"${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_nine_channel_load_share_mode",
],
};
@ -84,7 +84,7 @@ function getComponentProperty() {
property.dirPath = path.resolve(__dirname, "..");
property.type = "executable";
property.name = "icss_sdfm";
property.name = "icss_sdfm_nine_channel_load_share_mode";
property.isInternal = false;
property.buildOptionCombos = buildOptionCombos;
property.isSkipTopLevelBuild = false;

View File

@ -10,8 +10,8 @@
</applicability>
<project
title="Icss Sdfm"
name = "icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang"
title="Icss Sdfm Nine Channel Load Share Mode"
name = "icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
@ -36,7 +36,7 @@
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_nine_channel_load_share_mode
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
@ -54,7 +54,7 @@
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib
-i${CG_TOOL_ROOT}/lib
-m=icss_sdfm.${ConfigName}.map
-m=icss_sdfm_nine_channel_load_share_mode.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
@ -67,7 +67,7 @@
--context r5fss0-0 --part ALV --package ALV
"
description="A Icss Sdfm FREERTOS project">
description="A Icss Sdfm Nine Channel Load Share Mode FREERTOS project">
<configuration name="Release"
compilerBuildOptions="

View File

@ -103,6 +103,9 @@ SECTIONS
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
/* TCM used by ICSS PRU to write sdfm sample output */
.gSdfmSampleOutput : {} align(4) > R5F_TCMB0
}
/*

View File

@ -21,17 +21,17 @@ endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=icss_sdfm.$(PROFILE).out
OUTNAME:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=icss_sdfm.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=icss_sdfm.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=icss_sdfm.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=icss_sdfm.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=icss_sdfm.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=icss_sdfm.$(PROFILE).appimage.hs_fs
BOOTIMAGE_NAME:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
@ -66,7 +66,7 @@ INCLUDES_common := \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include \
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm \
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_nine_channel_load_share_mode \
-Igenerated \
DEFINES_common := \
@ -201,7 +201,7 @@ clean:
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm ...
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm_nine_channel_load_share_mode ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out

View File

@ -7,7 +7,7 @@ include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang
PROJECT_NAME=icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)

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@ -10,8 +10,8 @@
</applicability>
<project
title="Icss Sdfm"
name = "icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang"
title="Icss Sdfm Nine Channel Load Share Mode"
name = "icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
@ -36,7 +36,7 @@
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_nine_channel_load_share_mode
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
@ -54,7 +54,7 @@
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib
-i${CG_TOOL_ROOT}/lib
-m=icss_sdfm.${ConfigName}.map
-m=icss_sdfm_nine_channel_load_share_mode.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
@ -67,7 +67,7 @@
--context r5fss0-0 --part ALX --package ALX
"
description="A Icss Sdfm FREERTOS project">
description="A Icss Sdfm Nine Channel Load Share Mode FREERTOS project">
<configuration name="Release"
compilerBuildOptions="

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@ -103,6 +103,9 @@ SECTIONS
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
/* TCM used by ICSS PRU to write sdfm sample output */
.gSdfmSampleOutput : {} align(4) > R5F_TCMB0
}
/*

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@ -21,17 +21,17 @@ endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=icss_sdfm.$(PROFILE).out
OUTNAME:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=icss_sdfm.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=icss_sdfm.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=icss_sdfm.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=icss_sdfm.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=icss_sdfm.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=icss_sdfm.$(PROFILE).appimage.hs_fs
BOOTIMAGE_NAME:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=icss_sdfm_nine_channel_load_share_mode.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
@ -66,7 +66,7 @@ INCLUDES_common := \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include \
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm \
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_nine_channel_load_share_mode \
-Igenerated \
DEFINES_common := \
@ -201,7 +201,7 @@ clean:
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm ...
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm_nine_channel_load_share_mode ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out

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@ -7,7 +7,7 @@ include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang
PROJECT_NAME=icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)

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@ -0,0 +1,569 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <kernel/dpl/DebugP.h>
#include <kernel/dpl/AddrTranslateP.h>
#include <kernel/dpl/HwiP.h>
#include <drivers/epwm.h>
#include "ti_drivers_config.h"
#include "ti_drivers_open_close.h"
#include "ti_board_open_close.h"
#include "epwm_dc.h"
#include "cfg_pad.h"
#include "sdfm.h"
/*EPWM1 configuration for sigma delta clock generation: */
#define APP_EPWM1_ENABLE 0 /*make sure EPWM1 is added in sysconfig before making true this macro */
/* Output channel - A or B */
#define APP_EPWM_OUT_CH_EN ( 0x1 ) /* ChA enabled */
/* EPWM functional clock */
/* Functional clock is the same for all EPWMs */
#define APP_EPWM_FCLK ( CONFIG_EPWM0_FCLK )
/* EPWM functional clock dividers */
#define APP_EPWM_FCLK_HSPCLKDIV ( 0x0 ) /* EPWM_TBCTL:HSPCLKDIV, High-Speed Time-base Clock Prescale Bits */
#define APP_EPWM_FCLK_CLKDIV ( 0x0 ) /* EPWM_TBCTL:CLKDIV, Time-base Clock Prescale Bits */
#if (APP_EPWM_FCLK_HSPCLKDIV != 0x0)
/* EPWM Time Base clock -- all EPWM TB clocks set the same */
#define APP_EPWM_TB_FREQ ( APP_EPWM_FCLK / ( 2*APP_EPWM_FCLK_HSPCLKDIV * (1 << APP_EPWM_FCLK_CLKDIV)))
#else
/* EPWM Time Base clock -- all EPWM TB clocks set the same */
#define APP_EPWM_TB_FREQ ( APP_EPWM_FCLK / ( 1 * (1 << APP_EPWM_FCLK_CLKDIV)))
#endif
/* Initial Duty Cycle of PWM output signal in %, 0 to 100 */
#define APP_EPWM0_DUTY_CYCLE ( 50U )
/* Frequency of PWM output signal in Hz */
#define APP_EPWM_OUTPUT_FREQ_4K ( 1U * 4000U )
#define APP_EPWM_OUTPUT_FREQ_8K ( 1U * 8000U )
#define APP_EPWM_OUTPUT_FREQ_16K ( 1U * 16000U )
#define APP_EPWM_OUTPUT_FREQ_20K ( 1U * 20000U )
#define APP_EPWM_OUTPUT_FREQ ( APP_EPWM_OUTPUT_FREQ_8K ) /* init freq */
/*sample Read time */
#define FIRST_SAMPLE_TRIGGER_TIME ((float)((float)1000000/(4*APP_EPWM_OUTPUT_FREQ))) /*sample trigger time for Single Update */
#define SECOND_SAMPLE_TRIGGER_TIME ((float)((float)3000000/(4*APP_EPWM_OUTPUT_FREQ))) /*Sample trigger time for double update*/
/* PWM count direction (Up, Down, Up/Down) */
#define APP_EPWM_TB_COUNTER_DIR ( EPWM_TB_COUNTER_DIR_UP_DOWN )
/* Test ICSSG instance ID */
#define TEST_ICSSG_INST_ID ( CONFIG_PRU_ICSS0 )
/* Test ICSSG slice ID */
#define TEST_ICSSG_SLICE_ID ( ICSSG_SLICE_ID_0 )
/* R5F interrupt settings for ICSSG */
#define ICSSG_PRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_3 ) /* VIM interrupt number */
#define ICSSG_RTUPRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_4 ) /* VIM interrupt number */
#define ICSSG_TXPRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_5 )
/*Load share macro*/
#define ICSSG_PRU_LOAD_SHARE_MODE ( 1 )
#if ICSSG_PRU_LOAD_SHARE_MODE
#define NUM_CH_SUPPORTED ( 9 )
#else
#define NUM_CH_SUPPORTED ( 3 )
#endif
/* EPWM0 IRQ handler */
static void epwmIrqHandler(void *handle);
/* EPWM1 IRQ handler */
static void epwmIrqHandler1(void *handle);
/* HWI global variables */
static HwiP_Object gIcssgPruSdfmHwiObject; /* ICSSG PRU SDFM FW HWI */
#if APP_EPWM1_ENABLE
#define APP_EPWM_OUTPUT_FREQ1 (1U*20000000 )
static HwiP_Object gIcssgRtuSDFMHwiObject; /* ICSSG RTU SDFM FW HWI */
static HwiP_Object gEpwm1HwiObject; /* EPWM1 HWI */
uint32_t gEpwm1BaseAddr; /* EPWM1 base address */
EPwmObj_t gEpwm1Obj; /* EPWM1 object */
Epwm_Handle hEpwm1; /* EPWM1 handle */
volatile uint32_t gEpwmOutFreq1 = APP_EPWM_OUTPUT_FREQ1; /*EPWM1 output freq. */
#endif
static HwiP_Object gEpwm0HwiObject; /* EPWM0 HWI */
/* EPWM global variables */
uint32_t gEpwm0BaseAddr; /* EPWM0 base address */
EPwmObj_t gEpwm0Obj; /* EPWM0 object */
Epwm_Handle hEpwm0; /* EPWM0 handle */
volatile uint32_t gEpwmOutFreq = APP_EPWM_OUTPUT_FREQ; /* EPWM output frequency */
/* ICSSG PRU SDFM FW IRQ handler */
static void pruSdfmIrqHandler(void *handle);
static void rtuPruSdfmIrqHandler(void *handle);
static void txPruSdfmIrqHandler(void *handle);
/* Test ICSSG handle */
PRUICSS_Handle gPruIcssHandle;
/* Test Sdfm handles */
sdfm_handle gHPruSdfm;
/* Sdfm output samples, written by PRU cores */
__attribute__((section(".gSdfmSampleOutput"))) uint32_t gSdfm_sampleOutput[NUM_CH_SUPPORTED];
/* Test Sdfm parameters */
SdfmPrms gTestSdfmPrms = {
ICSSG_PRU_LOAD_SHARE_MODE,
TEST_ICSSG_SLICE_ID,
PRUICSS_PRU0,
300000000, /*Value of IEP clock*/
20000000, /*Value of SD clock (It should be exact equal to sd clock value)*/
0, /*enable double update*/
FIRST_SAMPLE_TRIGGER_TIME, /*first sample trigger time*/
SECOND_SAMPLE_TRIGGER_TIME, /*second sample trigger time*/
APP_EPWM_OUTPUT_FREQ, /*PWM output frequency*/
{{3500, 1000,0}, /*threshold parameters(High, low & reserevd)*/
{3500, 1000,0},
{3500, 1000,0}},
{{0,0}, /*clock sourse & clock inversion for all channels*/
{0,0},
{0,0}},
15, /*Over current osr: The effect count is OSR + 1*/
128, /*Normal current osr */
1, /*comparator enable*/
(uint32_t)&gSdfm_sampleOutput, /*Output samples base address*/
0,
{{4, 18, 2},
{4, 18, 2},
{4, 18, 2}
} /*Fast detect fields {Window size, zero count max, zero count min}*/
};
#define PRUICSS_G_MUX_EN ( 0x1 ) /* ICSSG_SA_MX_REG:G_MUX_EN */
/* GPIO enable signal for EPWM0-2 on 3-axis breakout board */
uint32_t gMtr1PwnEnGpioBaseAddr = GPIO_MTR_1_PWM_EN_BASE_ADDR;
uint32_t gMtr1PwnEnGpioPin = GPIO_MTR_1_PWM_EN_PIN;
uint32_t gMtr1PwnEnGpioPinDir = GPIO_MTR_1_PWM_EN_DIR;
/* Flag for continuing to execute test */
volatile Bool gRunFlag = TRUE;
/* ICSS SDFM Output sample for Channel 0 */
/*Sample size*/
#define MAX_SAMPLES (128)
/* ICSS SDFM Output samples */
uint32_t sdfm_ch_samples[NUM_CH_SUPPORTED][MAX_SAMPLES] = {0};
uint32_t sdfmPruIdxCnt = 0;
uint32_t sdfmRtuIdxCnt = 0;
uint32_t sdfmTxPruIdxCnt = 0;
/* IRQ counters */
volatile uint32_t gPruSdfmIrqCnt=0; /* PRU ICSS SDFM FW IRQ count */
volatile uint32_t gRtuPruSdfmIrqCnt=0; /* RTU PRU ICSS SDFM FW IRQ count */
volatile uint32_t gTxPruSdfmIrqCnt=0; /* TX PRU ICSS SDFM FW IRQ count */
volatile uint32_t gEpwmIsrCnt=0; /* EPWM0 IRQ count */
volatile uint32_t gEpwmIsrCnt1=0;
/*PWM Parameters*/
HwiP_Params hwiPrms;
HwiP_Params hwiPrms1;
EPwmCfgPrms_t epwmCfgPrms;
EPwmCfgPrms_t epwm1CfgPrms;
void init_pwm()
{
int32_t status;
/* Initialize EPWM0 base address, perform address translation */
gEpwm0BaseAddr = (uint32_t)AddrTranslateP_getLocalAddr(CONFIG_EPWM0_BASE_ADDR);
/* Register & enable EPWM0 interrupt */
HwiP_Params_init(&hwiPrms);
hwiPrms.intNum = CONFIG_EPWM0_INTR;
hwiPrms.callback = &epwmIrqHandler;
hwiPrms.args = 0;
hwiPrms.isPulse = CONFIG_EPWM0_INTR_IS_PULSE;
hwiPrms.isFIQ = FALSE;
status = HwiP_construct(&gEpwm0HwiObject, &hwiPrms);
DebugP_assert(status == SystemP_SUCCESS);
/* Configure EPWM0 */
epwmCfgPrms.epwmId = EPWM_ID_0;
epwmCfgPrms.epwmBaseAddr = gEpwm0BaseAddr;
epwmCfgPrms.epwmOutChEn = APP_EPWM_OUT_CH_EN;
epwmCfgPrms.hspClkDiv = APP_EPWM_FCLK_HSPCLKDIV;
epwmCfgPrms.clkDiv = APP_EPWM_FCLK_CLKDIV;
epwmCfgPrms.epwmTbFreq = APP_EPWM_TB_FREQ;
epwmCfgPrms.epwmOutFreq = gEpwmOutFreq;
epwmCfgPrms.epwmDutyCycle[EPWM_OUTPUT_CH_A] = APP_EPWM0_DUTY_CYCLE;
epwmCfgPrms.epwmTbCounterDir = APP_EPWM_TB_COUNTER_DIR;
epwmCfgPrms.cfgTbSyncIn = TRUE;
epwmCfgPrms.tbPhsValue = 0;
epwmCfgPrms.tbSyncInCounterDir = EPWM_TB_COUNTER_DIR_UP;
epwmCfgPrms.cfgTbSyncOut = TRUE;
epwmCfgPrms.tbSyncOutMode = EPWM_TB_SYNC_OUT_EVT_CNT_EQ_ZERO;
epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].zeroAction = EPWM_AQ_ACTION_DONOTHING;
epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].prdAction = EPWM_AQ_ACTION_DONOTHING;
epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpAUpAction = EPWM_AQ_ACTION_HIGH;
epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpADownAction = EPWM_AQ_ACTION_LOW;
epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBUpAction = EPWM_AQ_ACTION_DONOTHING;
epwmCfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBDownAction = EPWM_AQ_ACTION_DONOTHING;
epwmCfgPrms.cfgDb = FALSE;
epwmCfgPrms.cfgEt = TRUE;
epwmCfgPrms.intSel = EPWM_ET_INTR_EVT_CNT_EQ_ZRO;
epwmCfgPrms.intPrd = EPWM_ET_INTR_PERIOD_FIRST_EVT;
hEpwm0 = epwmInit(&epwmCfgPrms, &gEpwm0Obj);
DebugP_assert(hEpwm0 != NULL);
#if APP_EPWM1_ENABLE // DEBUG code for SDFM clock generation from EPWM1
/* EPWM1 for SD clock generation */
/* Initialize EPWM1 base address, perform address translation */
gEpwm1BaseAddr = (uint32_t)AddrTranslateP_getLocalAddr(CONFIG_EPWM1_BASE_ADDR);
/* Register & enable EPWM0 interrupt */
HwiP_Params_init(&hwiPrms1);
hwiPrms1.intNum = CONFIG_EPWM1_INTR;
hwiPrms1.callback = &epwmIrqHandler1;
hwiPrms1.args = 0;
hwiPrms1.isPulse = CONFIG_EPWM1_INTR_IS_PULSE;
hwiPrms1.isFIQ = FALSE;
status = HwiP_construct(&gEpwm1HwiObject, &hwiPrms1);
DebugP_assert(status == SystemP_SUCCESS);
/* Configure EPWM0 */
epwm1CfgPrms.epwmId = EPWM_ID_1;
epwm1CfgPrms.epwmBaseAddr = gEpwm1BaseAddr;
epwm1CfgPrms.epwmOutChEn = APP_EPWM_OUT_CH_EN;
epwm1CfgPrms.hspClkDiv = APP_EPWM_FCLK_HSPCLKDIV;
epwm1CfgPrms.clkDiv = APP_EPWM_FCLK_CLKDIV;
epwm1CfgPrms.epwmTbFreq = APP_EPWM_TB_FREQ;
epwm1CfgPrms.epwmOutFreq = gEpwmOutFreq1;
epwm1CfgPrms.epwmDutyCycle[EPWM_OUTPUT_CH_A] = APP_EPWM0_DUTY_CYCLE;
epwm1CfgPrms.epwmTbCounterDir = APP_EPWM_TB_COUNTER_DIR;
epwm1CfgPrms.cfgTbSyncIn = FALSE;
epwm1CfgPrms.tbPhsValue = 0;
epwm1CfgPrms.cfgTbSyncOut = FALSE;
epwm1CfgPrms.tbSyncOutMode = EPWM_TB_SYNC_OUT_EVT_CNT_EQ_ZERO;
epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].zeroAction = EPWM_AQ_ACTION_DONOTHING;
epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].prdAction = EPWM_AQ_ACTION_DONOTHING;
epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpAUpAction = EPWM_AQ_ACTION_HIGH;
epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpADownAction = EPWM_AQ_ACTION_LOW;
epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBUpAction = EPWM_AQ_ACTION_DONOTHING;
epwm1CfgPrms.aqCfg[EPWM_OUTPUT_CH_A].cmpBDownAction = EPWM_AQ_ACTION_DONOTHING;
epwm1CfgPrms.cfgDb = FALSE;
epwm1CfgPrms.cfgEt = FALSE;
epwm1CfgPrms.intSel = EPWM_ET_INTR_EVT_CNT_EQ_ZRO;
epwm1CfgPrms.intPrd = EPWM_ET_INTR_PERIOD_FIRST_EVT;
hEpwm1 = epwmInit(&epwm1CfgPrms, &gEpwm1Obj);
DebugP_assert(hEpwm1 != NULL);
#endif
}
void init_sdfm()
{
int32_t status;
/* Initialize ICSSG */
status = initIcss(TEST_ICSSG_INST_ID, TEST_ICSSG_SLICE_ID, PRUICSS_G_MUX_EN, ICSSG_PRU_LOAD_SHARE_MODE, &gPruIcssHandle);
if (status != SDFM_ERR_NERR) {
DebugP_log("Error: initIcss() fail.\r\n");
return;
}
gTestSdfmPrms.loadShare = ICSSG_PRU_LOAD_SHARE_MODE;
/* Register & enable ICSSG PRU SDFM FW interrupt */
HwiP_Params_init(&hwiPrms);
hwiPrms.intNum = ICSSG_PRU_SDFM_INT_NUM;
hwiPrms.callback = &pruSdfmIrqHandler;
hwiPrms.args = 0;
hwiPrms.isPulse = FALSE;
hwiPrms.isFIQ = FALSE;
status = HwiP_construct(&gIcssgPruSdfmHwiObject, &hwiPrms);
DebugP_assert(status == SystemP_SUCCESS);
#if ICSSG_PRU_LOAD_SHARE_MODE
/* Register & enable ICSSG RTU PRU0 SDFM FW interrupt */
HwiP_Params_init(&hwiPrms);
hwiPrms.intNum = ICSSG_RTUPRU_SDFM_INT_NUM;
hwiPrms.callback = &rtuPruSdfmIrqHandler;
hwiPrms.args = 0;
hwiPrms.isPulse = FALSE;
hwiPrms.isFIQ = FALSE;
status = HwiP_construct(&gIcssgPruSdfmHwiObject, &hwiPrms);
DebugP_assert(status == SystemP_SUCCESS);
/* Register & enable ICSSG TX PRU SDFM FW interrupt */
HwiP_Params_init(&hwiPrms);
hwiPrms.intNum = ICSSG_TXPRU_SDFM_INT_NUM;
hwiPrms.callback = &txPruSdfmIrqHandler;
hwiPrms.args = 0;
hwiPrms.isPulse = FALSE;
hwiPrms.isFIQ = FALSE;
status = HwiP_construct(&gIcssgPruSdfmHwiObject, &hwiPrms);
DebugP_assert(status == SystemP_SUCCESS);
#endif
/* Initialize PRU cores for SDFM */
status = initPruSdfm(gPruIcssHandle, PRUICSS_PRU0, &gTestSdfmPrms, &gHPruSdfm);
if (status != SDFM_ERR_NERR)
{
DebugP_log("Error: initPruSdfm() fail.\r\n");
return;
}
#if ICSSG_PRU_LOAD_SHARE_MODE
/*Update sdfm prams*/
gTestSdfmPrms.pruInsId = PRUICSS_RTU_PRU0 ;
gTestSdfmPrms.samplesBaseAddress = (uint32_t)&gSdfm_sampleOutput + 12;
/* Initialize RTU PRU cores for SDFM */
status = initPruSdfm(gPruIcssHandle, PRUICSS_RTU_PRU0, &gTestSdfmPrms, &gHPruSdfm);
if (status != SDFM_ERR_NERR)
{
DebugP_log("Error: initPruSdfm() fail.\r\n");
return;
}
/*Update sdfm prams */
gTestSdfmPrms.pruInsId = PRUICSS_TX_PRU0;
gTestSdfmPrms.samplesBaseAddress = (uint32_t)&gSdfm_sampleOutput + 24 ;
/* Initialize TX PRU cores for SDFM */
status = initPruSdfm(gPruIcssHandle, PRUICSS_TX_PRU0, &gTestSdfmPrms, &gHPruSdfm);
if (status != SDFM_ERR_NERR)
{
DebugP_log("Error: initPruSdfm() fail.\r\n");
return;
}
#endif
}
void sdfm_main(void *args)
{
/* Open drivers to open the UART driver for console */
Drivers_open();
Board_driversOpen();
DebugP_log("Sample SDFM example running!...\r\n");
/* Output build time */
DebugP_log("Build timestamp : %s %s\r\n", __DATE__, __TIME__);
/* Enable EPWM0-2 on 3-axis Breakout Board */
GPIO_setDirMode(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin, gMtr1PwnEnGpioPinDir);
GPIO_pinWriteHigh(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin);
GPIO_pinWriteLow(gMtr1PwnEnGpioBaseAddr, gMtr1PwnEnGpioPin);
/*
* Configure EPWM0
*/
init_pwm();
DebugP_log("EPWM Configured!\r\n");
/*
* Configure SDFM
*/
/* Configure SOC pads for SDFM.
Normally handled via Pinmux_init(),
but currently no way to pads for ICSSG from Sysconfig. */
cfgPad();
/* Configure SDFM */
init_sdfm();
DebugP_log("SDFM Configured!\r\n");
/* Start EPWM0 clock */
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_EPWM_TB_CLKEN, 1);
/* Force SW sync for EPWM0 */
EPWM_tbTriggerSwSync(gEpwm0BaseAddr);
while(gRunFlag == TRUE)
{
;
}
/* Disable and clear interrupts for EPWM0 */
EPWM_etIntrDisable(gEpwm0BaseAddr); /* Disable interrupts */
EPWM_etIntrClear(gEpwm0BaseAddr); /* Clear pending interrupts */
/* Destroy EPWM0 HWI */
HwiP_destruct(&gEpwm0HwiObject);
/* Destroy PRU SDFM HWI */
HwiP_destruct(&gIcssgPruSdfmHwiObject);
DebugP_log("All tests have passed!!\r\n");
Board_driversClose();
Drivers_close();
}
/* PRU SDFM FW IRQ handler */
void pruSdfmIrqHandler(void *args)
{
/* debug, inncrement PRU SDFM IRQ count */
gPruSdfmIrqCnt++;
/* Clear interrupt at source */
/* Write 18 to ICSSG_STATUS_CLR_INDEX_REG
Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18
18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM.
*/
PRUICSS_clearEvent(gPruIcssHandle, PRU_TRIGGER_HOST_SDFM_EVT);
if(sdfmPruIdxCnt >= MAX_SAMPLES)
{
sdfmPruIdxCnt = 0;
}
#if ICSSG_PRU_LOAD_SHARE_MODE
/*Select core */
gHPruSdfm->sampleOutputInterface = (SDFM_SampleOutInterface *)((uint32_t)&gSdfm_sampleOutput);
/* SDFM Output sample for Channel 3 */
sdfm_ch_samples[SDFM_CH3][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0);
/* SDFM Output sample for Channel 4 */
sdfm_ch_samples[SDFM_CH4][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1);
/* SDFM Output sample for Channel 5 */
sdfm_ch_samples[SDFM_CH5][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2);
#else
/* SDFM Output sample for Channel 0 */
sdfm_ch_samples[SDFM_CH0][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0);
/* SDFM Output sample for Channel 1 */
sdfm_ch_samples[SDFM_CH1][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1);
/* SDFM Output sample for Channel 2 */
sdfm_ch_samples[SDFM_CH2][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2);
#endif
sdfmPruIdxCnt++;
}
/* RTU PRU SDFM FW IRQ handler */
void rtuPruSdfmIrqHandler(void *args)
{
/* debug, inncrement PRU SDFM IRQ count */
gRtuPruSdfmIrqCnt++;
/* Clear interrupt at source */
/* Write 18 to ICSSG_STATUS_CLR_INDEX_REG
Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18
18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM.
*/
PRUICSS_clearEvent(gPruIcssHandle, RTU_TRIGGER_HOST_SDFM_EVT);
if(sdfmRtuIdxCnt >= MAX_SAMPLES)
{
sdfmRtuIdxCnt = 0;
}
/*Select core */
gHPruSdfm->sampleOutputInterface = (SDFM_SampleOutInterface *)((uint32_t)&gSdfm_sampleOutput + 12);
/* SDFM Output sample for Channel 0 */
sdfm_ch_samples[SDFM_CH0][sdfmRtuIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0);
/* SDFM Output sample for Channel 1 */
sdfm_ch_samples[SDFM_CH1][sdfmRtuIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1);
/* SDFM Output sample for Channel 2 */
sdfm_ch_samples[SDFM_CH2][sdfmRtuIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2);
sdfmRtuIdxCnt++;
}
/* PRU SDFM FW IRQ handler */
void txPruSdfmIrqHandler(void *args)
{
/* debug, inncrement PRU SDFM IRQ count */
gTxPruSdfmIrqCnt++;
/* Clear interrupt at source */
/* Write 18 to ICSSG_STATUS_CLR_INDEX_REG
Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18
18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM.
*/
PRUICSS_clearEvent(gPruIcssHandle, TXPRU_TRIGGER_HOST_SDFM_EVT);
if(sdfmTxPruIdxCnt >= MAX_SAMPLES)
{
sdfmTxPruIdxCnt = 0;
}
/*Select core */
gHPruSdfm->sampleOutputInterface = (SDFM_SampleOutInterface *)((uint32_t)&gSdfm_sampleOutput + 24);
/* SDFM Output sample for Channel 6 */
sdfm_ch_samples[SDFM_CH6][sdfmTxPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0);
/* SDFM Output sample for Channel 7 */
sdfm_ch_samples[SDFM_CH7][sdfmTxPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1);
/* SDFM Output sample for Channel 8 */
sdfm_ch_samples[SDFM_CH8][sdfmTxPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2);
sdfmTxPruIdxCnt++;
}
/* EPWM0 IRQ handler */
static void epwmIrqHandler(void *args)
{
volatile uint16_t status;
/* debug, inncrement EPWM0 IRQ count */
gEpwmIsrCnt++;
status = EPWM_etIntrStatus(gEpwm0BaseAddr);
if (status & EPWM_ETFLG_INT_MASK)
{
EPWM_etIntrClear(gEpwm0BaseAddr);
}
return;
}
#if APP_EPWM1_ENABLE //DEBUG code for EPWM1
/* EPWM0 IRQ handler */
static void epwmIrqHandler1(void *args)
{
volatile uint16_t status;
/* debug, inncrement EPWM0 IRQ count */
gEpwmIsrCnt1++;
status = EPWM_etIntrStatus(gEpwm1BaseAddr);
if (status & EPWM_ETFLG_INT_MASK)
{
EPWM_etIntrClear(gEpwm0BaseAddr);
}
return;
}
#endif

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@ -0,0 +1,119 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <drivers/pinmux.h>
#include "cfg_pad.h"
static Pinmux_PerCfg_t gPinMuxMainDomainCfgsdfm[] = {
/* PRG0_ECAP0_IN_APWM_OUT,
PRG0_PRU1_GPO15, PRG0_ECAP0_IN_APWM_OUT, U5, J2.C11 */
{
PIN_PRG0_PRU1_GPO15,
( PIN_MODE(10) | PIN_PULL_DISABLE )
},
/* SD8_CLK,
PRG0_PRU0_GPI16, SD8_CLK, U4, J2E:P9 */
{
PIN_PRG0_PRU0_GPO16,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD0_D,
PRG0_PRU0_GPI1, SD0_D, R4, J2E:P8 */
{
PIN_PRG0_PRU0_GPO1,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD1_D,
PRG0_PRU0_GPI3, SD1_D, V2, J2A:P9 */
{
PIN_PRG0_PRU0_GPO3,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD2_D,
PRG0_PRU0_GPI5, SD2_D, R3, J2C:P6 */
{
PIN_PRG0_PRU0_GPO5,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD3_D,
PRG0_PRU0_GPI7, SD3_D, T1, J2B:P7 */
{
PIN_PRG0_PRU0_GPO7,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD4_D,
PRG0_PRU0_GPI18, SD4_D, V1, J2B:P9 */
{
PIN_PRG0_PRU0_GPO18,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD5_D,
PRG0_PRU0_GPI11, SD5_D, Y3, J2B:P14 */
{
PIN_PRG0_PRU0_GPO11,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD6_D,
PRG0_PRU0_GPI13, SD6_D, R6, J2C:P5 */
{
PIN_PRG0_PRU0_GPO13,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD7_D,
PRG0_PRU0_GPI15, SD7_D, T5, J2D:P12 */
{
PIN_PRG0_PRU0_GPO15,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* SD8_D,
PRG0_PRU0_GPI17, SD8_D, U1, J2B:P8 */
{
PIN_PRG0_PRU0_GPO17,
( PIN_MODE(1) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
},
/* PWM0_TZ_OUT,
PRG0_PWM0_TZ_OUT, TZ_OUT, R3, J2C:P6 */
{
PIN_PRG0_PRU0_GPO19,
( PIN_MODE(3) | PIN_PULL_DISABLE )
},
{PINMUX_END, PINMUX_END}
};
/* Configure SOC pads */
void cfgPad(void)
{
Pinmux_config(gPinMuxMainDomainCfgsdfm, PINMUX_DOMAIN_ID_MAIN);
}

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/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _EPWM_DC_H_
#define _EPWM_DC_H_
#include <stdint.h>
#include <drivers/hw_include/hw_types.h>
#include <drivers/epwm.h>
/* Status return values */
#define EPWM_DC_SOK ( 0 )
#define EPWM_ID_0 ( 0 )
#define EPWM_ID_1 ( 1 )
#define EPWM_ID_2 ( 2 )
#define EPWM_NUM_OUT_CH ( EPWM_OUTPUT_CH_MAX + 1 )
/* EPWM configuration parameters */
typedef struct _EPwmCfgPrms_t
{
uint32_t epwmId; /* EPWM ID */
uint32_t epwmBaseAddr; /* EPWM base address */
uint32_t epwmOutChEn; /* EPWM output channel (A/B) enable bit mask */
uint32_t hspClkDiv; /* EPWM High-Speed Time-base Clock Prescale Bits */
uint32_t clkDiv; /* EPWM Time-base Clock Prescale Bits */
uint32_t epwmTbFreq; /* EPWM timebase clock */
uint32_t epwmOutFreq; /* EPWM output frequency */
/* EPWM duty cycle */
uint32_t epwmDutyCycle[EPWM_NUM_OUT_CH];
uint32_t epwmTbCounterDir; /* EPWM counter direction (Up, Down, Up/Down) */
/* TB sync in config */
Bool cfgTbSyncIn; /* config TB sync in flag (true/false) */
uint32_t tbPhsValue; /* cfgTbSyncIn==TRUE: timer phase value to load on Sync In event */
uint32_t tbSyncInCounterDir; /* cfgTbSyncIn==TRUE: counter direction on Sync In event */
/* TB sync out config */
Bool cfgTbSyncOut; /* config TB sync output flag (true/false) */
uint32_t tbSyncOutMode; /* cfgTbSyncOut==TRUE: Sync Out mode */
/* AQ config */
EPWM_AqActionCfg aqCfg[EPWM_NUM_OUT_CH];
/* DB config */
Bool cfgDb; /* config DB flag (true/false) */
EPWM_DeadbandCfg dbCfg; /* Deadband config */
/* ET config */
Bool cfgEt; /* config ET module */
uint32_t intSel; /* ET interrupt select */
uint32_t intPrd; /* ET interrupt period */
} EPwmCfgPrms_t;
/* EPWM object */
typedef struct _EPwmObj_t
{
uint32_t epwmId; /* EPWM ID */
uint32_t epwmBaseAddr; /* EPWM base address */
uint32_t epwmOutChEn; /* EPWM output channel (A/B) enable bit mask */
uint32_t hspClkDiv; /* EPWM High-Speed Time-base Clock Prescale Bits */
uint32_t clkDiv; /* EPWM Time-base Clock Prescale Bits */
uint32_t epwmTbFreq; /* EPWM timebase clock */
uint32_t epwmOutFreq; /* EPWM output frequency */
/* EPWM duty cycle */
uint32_t epwmDutyCycle[EPWM_NUM_OUT_CH];
uint32_t epwmPrdVal; /* EPWM period value */
// Bool updateOut; /* Flag indicates whether to update EPWM A/B outputs */
/* For handling up-down count alternating period
when period isn't divisible by 2 */
Bool toggleEpwmPrd; /* Flag for EPWM in alternating period mode */
uint8_t toggleEpwmPrdState; /* Alternating period state:
'Lower' or 'Upper' period written on alternate ISRs */
uint32_t epwmPrdValL; /* 'Lower' EPWM period value written in 'Lower' state */
uint32_t epwmPrdValU; /* 'Upper' EPWM period value written in 'Upper' state */
/* For handling ChA 100% Duty Cycle */
uint32_t cmpAVal; /* Current CMPA value */
Bool cmpANzToZ; /* Flag for EPWM transition CMPA!=0 to CMPA=0 */
Bool cmpAZToNz; /* Flag for EPWM transition CMPA=0 to CMPA!=0 */
/* For handling ChB 100% Duty Cycle */
uint32_t cmpBVal; /* Current CMPB value */
Bool cmpBNzToZ; /* Flag for EPWM transition CMPB!=0 to CMPB=0 */
Bool cmpBZToNz; /* Flag for EPWM transition CMPB=0 to CMPB!=0 */
} EPwmObj_t;
/* EPWM Handle */
typedef EPwmObj_t * Epwm_Handle;
/* Initialize EPWM */
Epwm_Handle epwmInit(
EPwmCfgPrms_t *pEpwmCfgPrms,
EPwmObj_t *pEpwmObj
);
/* Update EPWM period */
int32_t epwmUpdatePrd(
Epwm_Handle hEpwm,
uint32_t epwmOutFreqSet
);
/* Update EPWM A/B outputs */
int32_t epwmUpdateOut(
Epwm_Handle hEpwm,
float VrefA,
float VrefB
);
#endif /* _EPWM_DC_H_ */

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@ -0,0 +1,472 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_drivers_open_close.h"
#include "ti_board_open_close.h"
#include <stdint.h>
#include <drivers/hw_include/csl_types.h>
#include <drivers/pruicss.h>
#include <drivers/sciclient.h>
#include "tisdfm_pruss_intc_mapping.h" /* INTC configuration */
#include "current_sense/sdfm/firmware/sdfm_pru_bin.h" /* SDFM image data */
#include "current_sense/sdfm/firmware/sdfm_rtu_bin.h" /* SDFM image data */
#include "current_sense/sdfm/firmware/sdfm_txpru_bin.h" /* SDFM image data */
#include "current_sense/sdfm/firmware/sdfm_bin.h" /* SDFM image data */
#include "sdfm.h"
#include "current_sense/sdfm/include/sdfm_api.h"
/* PRU SDFM FW image info */
typedef struct PRUSDFM_PruFwImageInfo_s {
const uint32_t *pPruImemImg;
const uint32_t pruImemImgSz;
} PRUSDFM_PruFwImageInfo;
/* Number of PRU images */
#define PRU_SDFM_NUM_PRU_IMAGE ( 4 )
/* PRU SDFM image info */
static PRUSDFM_PruFwImageInfo gPruFwImageInfo[PRU_SDFM_NUM_PRU_IMAGE] =
{
{SDFM_PRU0_image_0, sizeof(SDFM_PRU0_image_0)}, /* single PRU FW binary */
{pru_SDFM_PRU0_image_0, sizeof(pru_SDFM_PRU0_image_0)}, /* load share PRU FW binary */
{pru_SDFM_RTU0_image_0, sizeof(pru_SDFM_RTU0_image_0)}, /*load share RTU FW binary */
{pru_SDFM_TXPRU0_image_0, sizeof(pru_SDFM_TXPRU0_image_0)} /*load share TXPRU binary*/
};
/* ICSS INTC configuration */
static const PRUICSS_IntcInitData gPruicssIntcInitdata = PRUICSS_INTC_INITDATA;
/*
* ======== initIcss ========
*/
/* Initialize ICSSG */
int32_t initIcss(
uint8_t icssInstId,
uint8_t sliceId,
uint8_t saMuxMode,
uint8_t loadShareMode,
PRUICSS_Handle *pPruIcssHandle
)
{
PRUICSS_Handle pruIcssHandle;
int32_t size;
int32_t status;
/* Open ICSS PRU instance */
pruIcssHandle = PRUICSS_open(icssInstId);
if (pruIcssHandle == NULL) {
return SDFM_ERR_INIT_ICSSG;
}
/* Disable slice PRU cores */
if (sliceId == ICSSG_SLICE_ID_0)
{
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_PRU0);
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_ICSSG;
}
if(loadShareMode)
{
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_RTU_PRU0);
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_ICSSG;
}
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_TX_PRU0);
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_ICSSG;
}
}
}
else if (sliceId == ICSSG_SLICE_ID_1)
{
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_PRU1);
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_ICSSG;
}
if(loadShareMode)
{
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_RTU_PRU1);
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_ICSSG;
}
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_TX_PRU1);
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_ICSSG;
}
}
}
else
{
return SDFM_ERR_INIT_ICSSG;
}
/* Reset slice memories */
size = PRUICSS_initMemory(pruIcssHandle, PRUICSS_IRAM_PRU(sliceId));
if (size == 0)
{
return SDFM_ERR_INIT_ICSSG;
}
if(loadShareMode)
{
size = PRUICSS_initMemory(pruIcssHandle, PRUICSS_IRAM_RTU_PRU(sliceId));
if (size == 0)
{
return SDFM_ERR_INIT_ICSSG;
}
size = PRUICSS_initMemory(pruIcssHandle, PRUICSS_IRAM_TX_PRU(sliceId));
if (size == 0)
{
return SDFM_ERR_INIT_ICSSG;
}
}
size = PRUICSS_initMemory(pruIcssHandle, PRUICSS_DATARAM(sliceId));
if (size == 0)
{
return SDFM_ERR_INIT_ICSSG;
}
/* Set ICSS pin mux */
PRUICSS_setSaMuxMode(pruIcssHandle, saMuxMode);
/* Initialize ICSS INTC */
status = PRUICSS_intcInit(pruIcssHandle, &gPruicssIntcInitdata);
if (status != SystemP_SUCCESS) {
return SDFM_ERR_INIT_ICSSG;
}
*pPruIcssHandle = pruIcssHandle;
return SDFM_ERR_NERR;
}
void sdfm_configure_gpio_pin(sdfm_handle h_sdfm)
{
/*ch0 GPIO configuration*/
uint32_t gpioBaseAddrCh0Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH0_BASE_ADDR);
uint32_t pinNumCh0Hi = GPIO_HIGH_TH_CH0_PIN;
GPIO_setDirMode(gpioBaseAddrCh0Hi, pinNumCh0Hi, GPIO_HIGH_TH_CH0_DIR);
SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Hi, pinNumCh0Hi, 0);
uint32_t gpioBaseAddrCh0Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH0_BASE_ADDR);
uint32_t pinNumCh0Lo = GPIO_LOW_TH_CH0_PIN;
GPIO_setDirMode(gpioBaseAddrCh0Lo, pinNumCh0Lo, GPIO_LOW_TH_CH0_DIR);
SDFM_configComparatorGpioPins(h_sdfm, 0, gpioBaseAddrCh0Lo, pinNumCh0Lo, 1);
/*ch1 GPIO configuration*/
uint32_t gpioBaseAddrCh1Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH1_BASE_ADDR);
uint32_t pinNumCh1Hi = GPIO_HIGH_TH_CH1_PIN;
GPIO_setDirMode(gpioBaseAddrCh1Hi, pinNumCh1Hi, GPIO_HIGH_TH_CH1_DIR);
SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Hi, pinNumCh1Hi, 0);
uint32_t gpioBaseAddrCh1Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH1_BASE_ADDR);
uint32_t pinNumCh1Lo = GPIO_LOW_TH_CH1_PIN;
GPIO_setDirMode(gpioBaseAddrCh1Lo, pinNumCh1Lo, GPIO_LOW_TH_CH1_DIR);
SDFM_configComparatorGpioPins(h_sdfm, 1, gpioBaseAddrCh1Lo, pinNumCh1Lo, 1);
/*ch2 GPIO configuration*/
uint32_t gpioBaseAddrCh2Hi = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_HIGH_TH_CH2_BASE_ADDR);
uint32_t pinNumCh2Hi = GPIO_HIGH_TH_CH2_PIN;
GPIO_setDirMode(gpioBaseAddrCh2Hi, pinNumCh2Hi, GPIO_HIGH_TH_CH2_DIR);
SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Hi, pinNumCh2Hi, 0);
uint32_t gpioBaseAddrCh2Lo = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LOW_TH_CH2_BASE_ADDR);
uint32_t pinNumCh2Lo = GPIO_LOW_TH_CH2_PIN;
GPIO_setDirMode(gpioBaseAddrCh2Lo, pinNumCh2Lo, GPIO_LOW_TH_CH2_DIR);
SDFM_configComparatorGpioPins(h_sdfm, 2, gpioBaseAddrCh2Lo, pinNumCh2Lo, 1);
}
/* Initialize SDFM PRU FW */
int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, void *pruss_cfg)
{
sdfm_handle hSdfm;
uint8_t SDFM_CH = 0;
/* Initialize SDFM instance */
hSdfm = SDFM_init(pruId, pSdfmPrms->pruInsId);
hSdfm->pruss_cfg = pruss_cfg;
if( pSdfmPrms->loadShare )
{
if(pSdfmPrms->pruInsId == PRUICSS_PRU0)
{
SDFM_enableLoadShareMode(hSdfm, pSdfmPrms->icssgSliceId);
}
switch (pSdfmPrms->pruInsId)
{
case PRUICSS_PRU0:
case PRUICSS_PRU1:
SDFM_CH = 3;
break;
case PRUICSS_RTU_PRU0:
case PRUICSS_RTU_PRU1:
SDFM_CH = 0;
break;
case PRUICSS_TX_PRU0:
case PRUICSS_TX_PRU1:
SDFM_CH = 6;
break;
default:
SDFM_CH = 0;
break;
}
}
for(int i = SDFM_CH; i<SDFM_CH + NUM_CH_SUPPORTED_PER_AXIS; i++)
{
SDFM_setEnableChannel(hSdfm, i);
}
uint32_t i;
i = SDFM_getFirmwareVersion(hSdfm);
DebugP_log("\n\n\n");
DebugP_log("SDFM firmware version \t: %x.%x.%x (%s)\n\n", (i >> 24) & 0x7F,
(i >> 16) & 0xFF, i & 0xFFFF, i & (1 << 31) ? "internal" : "release");
if (hSdfm == NULL)
{
return SDFM_ERR_INIT_SDFM;
}
hSdfm->iep_clock = pSdfmPrms->iep_clock;
hSdfm->sdfm_clock = pSdfmPrms->sd_clock;
hSdfm->sampleOutputInterface = (SDFM_SampleOutInterface *)(pSdfmPrms->samplesBaseAddress);
uint32_t sampleOutputInterfaceGlobalAddr = CPU0_BTCM_SOCVIEW(pSdfmPrms->samplesBaseAddress);
hSdfm->p_sdfm_interface->sampleBufferBaseAdd = sampleOutputInterfaceGlobalAddr;
hSdfm->iep_inc = 1; /* Default IEP increment 1 */
uint8_t acc_filter = 0; //SINC3 filter
uint8_t ecap_divider = 0x0F; //IEP at 300MHz: SD clock = 300/15=20Mhz
/*configure IEP count for one epwm period*/
SDFM_configIepCount(hSdfm, pSdfmPrms->epwm_out_freq);
/*configure ecap as PWM code for generate 20 MHz sdfm clock*/
SDFM_configEcap(hSdfm, ecap_divider);
/*set Noraml current OSR */
SDFM_setFilterOverSamplingRatio(hSdfm, pSdfmPrms->FilterOsr);
/*below configuration for all three channel*/
for(SDFM_CH = 0; SDFM_CH < NUM_CH_SUPPORTED_PER_AXIS; SDFM_CH++)
{
/*set comparator osr or Over current osr*/
SDFM_setCompFilterOverSamplingRatio(hSdfm, SDFM_CH, pSdfmPrms->ComFilterOsr);
/*set ACC source or filter type*/
SDFM_configDataFilter(hSdfm, SDFM_CH, acc_filter);
/*set clock inversion & clock source for all three channel*/
SDFM_selectClockSource(hSdfm, SDFM_CH, pSdfmPrms->clkPrms[SDFM_CH]);
/*set threshold values */
SDFM_setCompFilterThresholds(hSdfm, SDFM_CH, pSdfmPrms->threshold_parms[SDFM_CH]);
if(pSdfmPrms->en_fd)
{
/*Fast detect configuration */
SDFM_configFastDetect(hSdfm, SDFM_CH, pSdfmPrms->fastDetect[SDFM_CH]);
}
if(pSdfmPrms->en_com)
{
SDFM_enableComparator(hSdfm, SDFM_CH);
}
else
{
SDFM_disableComparator(hSdfm, SDFM_CH);
}
}
/*GPIO pin configuration for threshold measurment*/
sdfm_configure_gpio_pin(hSdfm);
SDFM_setSampleTriggerTime(hSdfm, pSdfmPrms->firstSampTrigTime);
if(pSdfmPrms->en_second_update)
{
SDFM_enableDoubleSampling(hSdfm, pSdfmPrms->secondSampTrigTime);
}
else
{
SDFM_disableDoubleSampling(hSdfm);
}
/* Enable (global) SDFM */
SDFM_enable(hSdfm);
*pHSdfm = hSdfm;
return SDFM_ERR_NERR;
}
/*
* ======== initPruSdfm ========
*/
/* Initialize PRU core for SDFM */
int32_t initPruSdfm(
PRUICSS_Handle pruIcssHandle,
uint8_t pruInstId,
SdfmPrms *pSdfmPrms,
sdfm_handle *pHSdfm
)
{
uint8_t sliceId;
uint32_t pruIMem;
PRUSDFM_PruFwImageInfo *pPruFwImageInfo;
int32_t size;
const uint32_t *sourceMem; /* Source memory[ Array of uint32_t ] */
uint32_t imemOffset; /* Offset at which write will happen */
uint32_t byteLen; /* Total number of bytes to be written */
uint8_t pruId;
int32_t status;
void *pruss_cfg;
pruss_cfg = (void *)(((PRUICSS_HwAttrs *)(pruIcssHandle->hwAttrs))->cfgRegBase);
/* Reset PRU */
status = PRUICSS_resetCore(pruIcssHandle, pruInstId);
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_PRU_SDFM;
}
/* Calculate slice ID */
sliceId = pruInstId - (uint8_t)pruInstId/ICSSG_NUM_SLICE * ICSSG_NUM_SLICE;
/* Determine PRU DMEM address */
/* Determine PRU FW image and PRU IMEM address */
switch (pruInstId)
{
case PRUICSS_PRU0:
case PRUICSS_PRU1:
if(pSdfmPrms->loadShare)
{
pPruFwImageInfo = &gPruFwImageInfo[1];
pruIMem = PRUICSS_IRAM_PRU(sliceId);
}
else
{
pPruFwImageInfo = &gPruFwImageInfo[0];
pruIMem = PRUICSS_IRAM_PRU(sliceId);
}
break;
case PRUICSS_RTU_PRU0:
case PRUICSS_RTU_PRU1:
pPruFwImageInfo = &gPruFwImageInfo[2];
pruIMem = PRUICSS_IRAM_RTU_PRU(sliceId);
break;
case PRUICSS_TX_PRU0:
case PRUICSS_TX_PRU1:
pPruFwImageInfo = &gPruFwImageInfo[3];
pruIMem = PRUICSS_IRAM_TX_PRU(sliceId);
if(pruInstId == PRUICSS_TX_PRU0)
{
PRUICSS_setConstantTblEntry(pruIcssHandle, pruInstId, PRUICSS_CONST_TBL_ENTRY_C28, 0x2A4);
}
else
{
PRUICSS_setConstantTblEntry(pruIcssHandle, pruInstId, PRUICSS_CONST_TBL_ENTRY_C28, 0x2A5);
}
break;
default:
pPruFwImageInfo = NULL;
break;
}
if ((pPruFwImageInfo == NULL) ||
(pPruFwImageInfo->pPruImemImg == NULL))
{
return SDFM_ERR_INIT_PRU_SDFM;
}
/* Write IMEM */
imemOffset = 0;
sourceMem = (uint32_t *)pPruFwImageInfo->pPruImemImg;
byteLen = pPruFwImageInfo->pruImemImgSz;
size = PRUICSS_writeMemory(pruIcssHandle, pruIMem, imemOffset, sourceMem, byteLen);
if (size == 0)
{
return SDFM_ERR_INIT_PRU_SDFM;
}
/* Enable PRU */
status = PRUICSS_enableCore(pruIcssHandle, pruInstId);
if (status != SystemP_SUCCESS) {
return SDFM_ERR_INIT_PRU_SDFM;
}
/* Translate PRU ID to SDFM API */
if ((pruInstId == PRUICSS_PRU0) || (pruInstId == PRUICSS_RTU_PRU0) || (pruInstId == PRUICSS_TX_PRU0))
{
pruId = PRU_ID_0;
}
else if ((pruInstId == PRUICSS_PRU1) || (pruInstId == PRUICSS_RTU_PRU1) || (pruInstId == PRUICSS_TX_PRU1))
{
pruId = PRU_ID_1;
}
else
{
return SDFM_ERR_INIT_PRU_SDFM;
}
/* Initialize SDFM PRU FW */
status = init_sdfm_pru_fw(pruId, pSdfmPrms, pHSdfm, pruss_cfg);
if (status != SDFM_ERR_NERR)
{
return SDFM_ERR_INIT_PRU_SDFM;
}
return SDFM_ERR_NERR;
}

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/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SDFM_H_
#define _SDFM_H_
#include <stdint.h>
#include <drivers/pruicss.h>
#include "current_sense/sdfm/include/sdfm_api.h"
/* Status codes */
#define SDFM_ERR_NERR ( 0 ) /* no error */
#define SDFM_ERR_CFG_PIN_MUX ( -1 ) /* pin mux configuration error */
#define SDFM_ERR_CFG_ICSSG_CLKCFG ( -2 ) /* ICSSG clock configuration error */
#define SDFM_ERR_INIT_ICSSG ( -3 ) /* initialize ICSSG error */
#define SDFM_ERR_CFG_MCU_INTR ( -4 ) /* interrupt configuration error */
#define SDFM_ERR_INIT_PRU_SDFM ( -5 ) /* initialize PRU for SDFM error */
#define SDFM_ERR_INIT_SDFM ( -6 ) /* initialize SDFM error */
/* Bit for SDFM configuration mask */
#define SDFM_CFG_CLK ( 1<<0 )
#define SDFM_CFG_OSR ( 1<<1 )
#define SDFM_CFG_TRIG_SAMP_TIME ( 1<<2 )
#define SDFM_CFG_TRIG_SAMP_CNT ( 1<<3 )
#define SDFM_CFG_CH_EN ( 1<<4 )
#define SDFM_CFG_FD ( 1<<5 )
#define SDFM_CFG_TRIG_OUT_SAMP_BUF ( 1<<6 )
/* SDFM mode */
#define SDFM_MODE_TRIG ( 0 )
#define SDFM_MODE_CONT ( 1 )
/* ICSSG Core clock source selection options */
#define CORE_CLK_SEL_ICSSGn_CORE_CLK ( 0 ) /* Mux Output */
#define CORE_CLK_SEL_ICSSGn_ICLK ( 1 ) /* ICSSGn_ICLK = MAIN_SYSCLK0/2 = 250 MHz */
/* ICSSG Core clock selections in case Mux Output selected */
#define ICSSGn_CORE_CLK_SEL_MAIN_PLL2_HSDIV0_CLKOUT ( 0 ) /* 225 or 300 MHz, default 225 MHz */
#define ICSSGn_CORE_CLK_SEL_MAIN_PLL0_HSDIV9_CLKOUT ( 1 ) /* 200, 250, or 333 MHz, default 200 MHz */
#define ICSSGn_CORE_CLK_SEL_NUMSEL ( 2 )
/* ICSSG Core clock frequency in case Mux Output selected.
Set to 0 in case clock frequency configuration not desired. */
#define ICSSGn_CORE_CLK_FREQ_225MHZ ( 225000000UL ) /* MAIN PLL2 HSDIV0, 225 MHz */
#define ICSSGn_CORE_CLK_FREQ_300MHZ ( 300000000UL ) /* MAIN PLL2 HSDIV0, 300 MHz */
#define ICSSGn_CORE_CLK_FREQ_200MHZ ( 200000000UL ) /* MAIN PLL0 HSDIV9, 200 MHz */
#define ICSSGn_CORE_CLK_FREQ_250MHZ ( 250000000UL ) /* MAIN PLL0 HSDIV9, 250 MHz */
#define ICSSGn_CORE_CLK_FREQ_333MHZ ( 333333333UL ) /* MAIN PLL0 HSDIV9, 333 MHz */
#define ICSSGn_CORE_CLK_FREQ_NOCFG ( 0UL ) /* No clock frequency reconfig */
//#define ICSSGn_CORE_CLK_FREQ ( ICSSGn_CORE_CLK_FREQ_NOCFG )
#define ICSSGn_CORE_CLK_FREQ ( ICSSGn_CORE_CLK_FREQ_300MHZ )
//#define ICSSGn_CORE_CLK_FREQ ( ICSSGn_CORE_CLK_FREQ_333MHZ )
/* ICSSG IEP clock source selection options */
#define IEP_CLK_SEL_ICSSGn_IEP_CLK ( 0 ) /* Mux Output */
#define IEP_CLK_SEL_CORE_CLK ( 1 ) /* CORE_CLK */
/* ICSSG IEP clock selections in case Mux output selected */
#define ICSSGn_IEP_CLK_SEL_MAIN_PLL2_HSDIV5_CLKOUT ( 0 ) /* Default 225 MHz */
#define ICSSGn_IEP_CLK_SEL_MAIN_PLL0_HSDIV6_CLKOUT ( 1 ) /* 200 or 250 MHz, default 200 MHz */
#define ICSSGn_IEP_CLK_SEL_CPSW0_CPTS_RFT_CLK ( 2 )
#define ICSSGn_IEP_CLK_SEL_CPTS_RFT_CLK ( 3 )
#define ICSSGn_IEP_CLK_SEL_MCU_EXT_REFCLK0 ( 4 )
#define ICSSGn_IEP_CLK_SEL_EXT_REFCLK1 ( 5 )
#define ICSSGn_IEP_CLK_SEL_SERDES0_IP1_LN0_TXMCLK ( 6 )
#define ICSSGn_IEP_CLK_SEL_SYSCLK0 ( 7 )
#define ICSSGn_IEP_CLK_SEL_NUMSEL ( 8 )
/* ICSSG IEP clock frequency in case Mux Output selected.
Set to 0 in case clock frequency configuration not desired. */
#define ICSSGn_IEP_CLK_FREQ_200MHZ ( 200000000UL ) /* MAIN PLL0 HSDIV6, 200 MHz */
#define ICSSGn_IEP_CLK_FREQ_250MHZ ( 250000000UL ) /* MAIN PLL0 HSDIV6, 250 MHz */
#define ICSSGn_IEP_CLK_FREQ_NOCFG ( 0UL ) /* No clock frequency reconfig */
#define ICSSGn_IEP_CLK_FREQ ( ICSSGn_IEP_CLK_FREQ_NOCFG )
/* Default ICSS pin mux setting */
#define PRUICSS_G_MUX_EN_DEF ( 0x0 ) /* ICSSG_SA_MX_REG:G_MUX_EN */
/* Translate the TCM local view addr to SoC view addr */
#define CPU0_ATCM_SOCVIEW(x) (CSL_R5FSS0_CORE0_ATCM_BASE+(x))
#define CPU1_ATCM_SOCVIEW(x) (CSL_R5FSS1_CORE0_ATCM_BASE+(x))
#define CPU0_BTCM_SOCVIEW(x) (CSL_R5FSS0_CORE0_BTCM_BASE+(x - CSL_R5FSS0_BTCM_BASE))
#define CPU1_BTCM_SOCVIEW(x) (CSL_R5FSS1_CORE0_BTCM_BASE+(x - CSL_R5FSS1_BTCM_BASE))
#define ICSSG_SLICE_ID_0 ( 0 ) /* ICSSG slide ID 0 */
#define ICSSG_SLICE_ID_1 ( 1 ) /* ICSSG slide ID 1 */
#define ICSSG_NUM_SLICE ( 2 ) /* ICSSG number of slices */
#define NUM_FD_FIELD ( 3 )
/* SDFM Channel IDs*/
#define SDFM_CH0 (0)
#define SDFM_CH1 (1)
#define SDFM_CH2 (2)
#define SDFM_CH3 (3)
#define SDFM_CH4 (4)
#define SDFM_CH5 (5)
#define SDFM_CH6 (6)
#define SDFM_CH7 (7)
#define SDFM_CH8 (8)
/*!
* @brief PRUICSS Instance IDs
*/
typedef enum PRUICSS_MaxInstances_s
{
PRUICSS_INSTANCE_ONE=0,
PRUICSS_INSTANCE_TWO=1,
PRUICSS_INSTANCE_MAX=2
} PRUICSS_MaxInstances;
/* SDFM configuration parameters */
typedef struct SdfmPrms_s
{
/**<loadshare mode*/
uint8_t loadShare;
/**<PRU core instance ID*/
uint8_t pruInsId;
/**<ICSSG pru Slice ID*/
uint8_t icssgSliceId;
/**< IEP clock value */
uint32_t iep_clock;
/**< Sigma delta input clock value */
uint32_t sd_clock;
/**< double update enable field */
uint8_t en_second_update;
/**< First normal current sample trigger time */
float firstSampTrigTime;
/**< First normal current sample trigger time */
float secondSampTrigTime;
/**< output freq. of EPWM0 */
uint32_t epwm_out_freq;
/**< Over current threshold parameters */
SDFM_ThresholdParms threshold_parms[NUM_CH_SUPPORTED_PER_AXIS];
/**< SD clock source and clock inversion */
SDFM_ClkSourceParms clkPrms[3];
/**< Over current OSR */
uint16_t ComFilterOsr;
/**< Normal current OSR */
uint16_t FilterOsr;
/**< over current enable field */
uint8_t en_com;
/**< output samples base address*/
uint32_t samplesBaseAddress;
/**<enable fast detect*/
uint8_t en_fd;
/**<Fast detect configuration field*/
uint8_t fastDetect[NUM_SD_CH][NUM_FD_FIELD];
} SdfmPrms;
/* Initialize ICSSG */
int32_t initIcss(
uint8_t icssInstId,
uint8_t sliceId,
uint8_t saMuxMode,
uint8_t loadShareMode,
PRUICSS_Handle *pPruIcssHandle
);
/* Initialize PRU core for SDFM */
int32_t initPruSdfm(
PRUICSS_Handle pruIcssHandle,
uint8_t pruInstId,
SdfmPrms *pSdfmPrms,
sdfm_handle *pHSdfm
);
#endif /* _SDFM_H_ */

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/*
* Copyright (c) 2023, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
* @file ti_uart_pruss_intc_mapping.h
*
* @brief Pruss interrupt mapping related macros
*
*/
#ifndef TI_UART_PRUSS_INTC_MAPPING_H
#define TI_UART_PRUSS_INTC_MAPPING_H
#ifdef __cplusplus
extern "C" {
#endif
#define IEP_TIM_CAP_CMP_EVENT 7
#define SYNC1_OUT_EVENT 13
#define SYNC0_OUT_EVENT 14
/* SYS_EVT_16-31 can be used for generating interrupts for IPC with hosts/prus etc */
#define PRU_ARM_EVENT00 16
#define PRU_ARM_EVENT01 17
#define PRU_ARM_EVENT02 18
#define PRU_ARM_EVENT03 19
#define PRU_ARM_EVENT04 20
#define PRU_ARM_EVENT05 21
#define PRU_ARM_EVENT06 22
#define PRU_ARM_EVENT07 23
#define PRU_ARM_EVENT08 24
#define PRU_ARM_EVENT09 25
#define PRU_ARM_EVENT10 26
#define PRU_ARM_EVENT11 27
#define PRU_ARM_EVENT12 28
#define PRU_ARM_EVENT13 29
#define PRU_ARM_EVENT14 30
#define PRU_ARM_EVENT15 31
#define PRU0_RX_ERR32_EVENT 33
#define PORT1_TX_UNDERFLOW 39
#define PORT1_TX_OVERFLOW 40
#define MII_LINK0_EVENT 41
#define PORT1_RX_EOF_EVENT 42
#define PRU1_RX_ERR32_EVENT 45
#define PORT2_TX_UNDERFLOW 51
#define PORT2_TX_OVERFLOW 53
#define PORT2_RX_EOF_EVENT 54
#define MII_LINK1_EVENT 53
#define CHANNEL0 0
#define CHANNEL1 1
#define CHANNEL2 2
#define CHANNEL3 3
#define CHANNEL4 4
#define CHANNEL5 5
#define CHANNEL6 6
#define CHANNEL7 7
#define CHANNEL8 8
#define CHANNEL9 9
#define PRU0 0
#define PRU1 1
#define PRU_EVTOUT0 2
#define PRU_EVTOUT1 3
#define PRU_EVTOUT2 4
#define PRU_EVTOUT3 5
#define PRU_EVTOUT4 6
#define PRU_EVTOUT5 7
#define PRU_EVTOUT6 8
#define PRU_EVTOUT7 9
#define PRU0_HOSTEN_MASK ((uint32_t)0x0001)
#define PRU1_HOSTEN_MASK ((uint32_t)0x0002)
#define PRU_EVTOUT0_HOSTEN_MASK ((uint32_t)0x0004)
#define PRU_EVTOUT1_HOSTEN_MASK ((uint32_t)0x0008)
#define PRU_EVTOUT2_HOSTEN_MASK ((uint32_t)0x0010)
#define PRU_EVTOUT3_HOSTEN_MASK ((uint32_t)0x0020)
#define PRU_EVTOUT4_HOSTEN_MASK ((uint32_t)0x0040)
#define PRU_EVTOUT5_HOSTEN_MASK ((uint32_t)0x0080)
#define PRU_EVTOUT6_HOSTEN_MASK ((uint32_t)0x0100)
#define PRU_EVTOUT7_HOSTEN_MASK ((uint32_t)0x0200)
#define SYS_EVT_POLARITY_LOW 0
#define SYS_EVT_POLARITY_HIGH 1
#define SYS_EVT_TYPE_PULSE 0
#define SYS_EVT_TYPE_EDGE 1
#define PRUICSS_INTC_INITDATA { \
{ IEP_TIM_CAP_CMP_EVENT, PRU_ARM_EVENT02, PRU_ARM_EVENT03, PRU_ARM_EVENT04, PRU_ARM_EVENT05, PRU_ARM_EVENT06, PRU_ARM_EVENT07,\
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [7-15] for Misra C standards */ \
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [16-31] for Misra C standards */ \
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [32-47] for Misra C standards */ \
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}, /* initializing member [48-63] for Misra C standards */ \
{ {IEP_TIM_CAP_CMP_EVENT, CHANNEL1, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT02, CHANNEL2, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT03, CHANNEL3, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT04, CHANNEL4, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT05, CHANNEL5, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT06, CHANNEL6, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT07, CHANNEL7, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [7] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [8] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [9] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [10] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [11] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [12] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [13] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [14] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [15] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [16] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [17] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [18] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [19] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [20] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [21] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [22] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [23] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [24] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [25] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [26] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [27] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [28] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [29] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [30] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [31] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [32] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [33] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [34] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [35] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [36] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [37] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [38] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [39] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [40] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [41] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [42] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [43] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [44] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [45] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [46] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [47] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [48] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [49] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [50] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [51] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [52] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [53] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [54] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [55] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [56] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [57] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [58] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [59] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [60] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [61] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [62] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}}, /* initializing member [63] for Misra C standards */ \
{ {CHANNEL1, PRU1}, {CHANNEL2, PRU_EVTOUT0}, {CHANNEL3, PRU_EVTOUT1},\
{CHANNEL4, PRU_EVTOUT2}, {CHANNEL5, PRU_EVTOUT3}, {CHANNEL6, PRU_EVTOUT4}, {CHANNEL7, PRU_EVTOUT5},\
{0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF} }, /* Initializing members [7,8,9] of array for Misra C standards */ \
(PRU1_HOSTEN_MASK | PRU_EVTOUT0_HOSTEN_MASK | PRU_EVTOUT1_HOSTEN_MASK | PRU_EVTOUT2_HOSTEN_MASK | PRU_EVTOUT3_HOSTEN_MASK | PRU_EVTOUT4_HOSTEN_MASK | PRU_EVTOUT5_HOSTEN_MASK) /* PRU_EVTOUT0 */ \
}
#ifdef __cplusplus
}
#endif
#endif /* TI_UART_PRUSS_INTC_MAPPING_H */

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function getComponentProperty(device)
{
return require(`./project_${device}`).getComponentProperty();
};
function getComponentBuildProperty(buildOption)
{
return require(`./project_${buildOption.device}`).getComponentBuildProperty(buildOption);
};
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

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let path = require('path');
let device = "am243x";
const files = {
common: [
"app_sdfm.c",
"epwm_dc.c",
"epwm_drv_aux.c",
"epwm_mod.c",
"sdfm.c",
"cfg_pad.c",
"main.c",
],
};
/* Relative to where the makefile will be generated
* Typically at <example_folder>/<BOARD>/<core_os_combo>/<compiler>
*/
const filedirs = {
common: [
"..", /* core_os_combo base */
"../../..", /* Example base */
],
};
const libdirs_freertos = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib",
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib",
],
};
const includes_freertos_r5f = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f",
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include",
"${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_three_channel_single_pru_mode",
],
};
const libs_freertos_r5f = {
common: [
"freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
"drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
"board.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
"motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib",
],
};
const lnkfiles = {
common: [
"linker.cmd",
]
};
const syscfgfile = "../example.syscfg";
const readmeDoxygenPageTag = "EXAMPLE_MOTORCONTROL_SDFM";
const templates_freertos_r5f =
[
{
input: ".project/templates/am243x/freertos/main_freertos.c.xdt",
output: "../main.c",
options: {
entryFunction: "sdfm_main",
},
}
];
const buildOptionCombos = [
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"},
{ device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"},
];
function getComponentProperty() {
let property = {};
property.dirPath = path.resolve(__dirname, "..");
property.type = "executable";
property.name = "icss_sdfm_three_channel_single_pru_mode";
property.isInternal = false;
property.buildOptionCombos = buildOptionCombos;
property.isSkipTopLevelBuild = false;
return property;
}
function getComponentBuildProperty(buildOption) {
let build_property = {};
build_property.files = files;
build_property.filedirs = filedirs;
build_property.lnkfiles = lnkfiles;
build_property.syscfgfile = syscfgfile;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
if(buildOption.cpu.match(/r5f*/)) {
if(buildOption.os.match(/freertos*/) )
{
build_property.includes = includes_freertos_r5f;
build_property.libdirs = libdirs_freertos;
build_property.libs = libs_freertos_r5f;
build_property.templates = templates_freertos_r5f;
}
}
return build_property;
}
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00"
* @versions {"tool":"1.18.0+3266"}
*/
/**
* Import the modules used in this configuration.
*/
const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false);
const epwm1 = epwm.addInstance();
const gpio = scripting.addModule("/drivers/gpio/gpio", {}, false);
const gpio1 = gpio.addInstance();
const gpio2 = gpio.addInstance();
const gpio3 = gpio.addInstance();
const gpio4 = gpio.addInstance();
const gpio5 = gpio.addInstance();
const gpio6 = gpio.addInstance();
const gpio7 = gpio.addInstance();
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
const pruicss1 = pruicss.addInstance();
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
epwm1.$name = "CONFIG_EPWM0";
epwm1.EPWM.$assign = "EHRPWM0";
epwm1.EPWM.A.$assign = "ball.U20";
epwm1.EPWM.B.$assign = "ball.U18";
epwm1.EPWM.SYNCO.$assign = "ball.U21";
epwm1.EPWM.SYNCI.$used = false;
gpio1.$name = "GPIO_MTR_1_PWM_EN";
gpio1.pinDir = "OUTPUT";
gpio1.GPIO.$assign = "GPIO0";
gpio1.GPIO.gpioPin.rx = false;
gpio1.GPIO.gpioPin.$assign = "ball.Y20";
gpio2.$name = "GPIO_HIGH_TH_CH0";
gpio2.pinDir = "OUTPUT";
gpio2.useMcuDomainPeripherals = true;
gpio2.MCU_GPIO.$assign = "MCU_GPIO0";
gpio2.MCU_GPIO.gpioPin.rx = false;
gpio2.MCU_GPIO.gpioPin.$assign = "ball.B6";
gpio3.$name = "GPIO_LOW_TH_CH0";
gpio3.pinDir = "OUTPUT";
gpio3.useMcuDomainPeripherals = true;
gpio3.MCU_GPIO.gpioPin.rx = false;
gpio3.MCU_GPIO.gpioPin.$assign = "ball.C7";
gpio4.$name = "GPIO_HIGH_TH_CH1";
gpio4.pinDir = "OUTPUT";
gpio4.useMcuDomainPeripherals = true;
gpio4.MCU_GPIO.gpioPin.rx = false;
gpio4.MCU_GPIO.gpioPin.$assign = "ball.A7";
gpio5.$name = "GPIO_LOW_TH_CH1";
gpio5.pinDir = "OUTPUT";
gpio5.useMcuDomainPeripherals = true;
gpio5.MCU_GPIO.gpioPin.rx = false;
gpio5.MCU_GPIO.gpioPin.$assign = "ball.D7";
gpio6.$name = "GPIO_HIGH_TH_CH2";
gpio6.pinDir = "OUTPUT";
gpio6.useMcuDomainPeripherals = true;
gpio6.MCU_GPIO.gpioPin.$assign = "ball.C8";
gpio7.$name = "GPIO_LOW_TH_CH2";
gpio7.pinDir = "OUTPUT";
gpio7.useMcuDomainPeripherals = true;
gpio7.MCU_GPIO.gpioPin.rx = false;
gpio7.MCU_GPIO.gpioPin.$assign = "ball.E6";
pruicss1.$name = "CONFIG_PRU_ICSS0";
pruicss1.coreClk = 300000000;
pruicss1.iepClk = 300000000;
pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0";
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x80000000;
mpu_armv76.size = 31;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
gpio3.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
gpio4.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
gpio5.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
gpio6.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
gpio7.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
debug_log.uartLog.UART.RXD.$suggestSolution = "ball.D15";
debug_log.uartLog.UART.TXD.$suggestSolution = "ball.C16";

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@ -0,0 +1,84 @@
/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void sdfm_main(void *args);
void freertos_main(void *args)
{
sdfm_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM2434_ALV"
/>
</when>
</applicability>
<project
title="Icss Sdfm Three Channel Single Pru Mode"
name = "icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
Debug,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="3.2.0"
device="Cortex R.AM2434_ALV"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_three_channel_single_pru_mode
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib
-i${CG_TOOL_ROOT}/lib
-m=icss_sdfm_three_channel_single_pru_mode.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part ALV --package ALV
"
description="A Icss Sdfm Three Channel Single Pru Mode FREERTOS project">
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.release.lib
-ldrivers.am243x.r5f.ti-arm-clang.release.lib
-lboard.am243x.r5f.ti-arm-clang.release.lib
-lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.debug.lib
-ldrivers.am243x.r5f.ti-arm-clang.debug.lib
-lboard.am243x.r5f.ti-arm-clang.debug.lib
-lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../app_sdfm.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../epwm_dc.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../epwm_drv_aux.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../epwm_mod.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../sdfm.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../cfg_pad.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLE_MOTORCONTROL_SDFM.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

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/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is disabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > MSRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > MSRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > MSRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > MSRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > MSRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
/* TCM used by ICSS PRU to write sdfm sample output */
.gSdfmSampleOutput : {} align(4) > R5F_TCMB0
}
/*
NOTE: Below memory is reserved for DMSC usage
- During Boot till security handoff is complete
0x701E0000 - 0x701FFFFF (128KB)
- After "Security Handoff" is complete (i.e at run time)
0x701F4000 - 0x701FFFFF (48KB)
Security handoff is complete when this message is sent to the DMSC,
TISCI_MSG_SEC_HANDOVER
This should be sent once all cores are loaded and all application
specific firewall calls are setup.
*/
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memory segments */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

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@ -0,0 +1,314 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
app_sdfm.c \
epwm_dc.c \
epwm_drv_aux.c \
epwm_mod.c \
sdfm.c \
cfg_pad.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include \
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_three_channel_single_pru_mode \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm_three_channel_single_pru_mode ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

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#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

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#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

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/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"mcu_plus_sdk/kernel/freertos/rov/FreeRTOS.rov.js",
];

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/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00"
* @versions {"tool":"1.18.0+3266"}
*/
/**
* Import the modules used in this configuration.
*/
const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false);
const epwm1 = epwm.addInstance();
const epwm2 = epwm.addInstance();
const gpio = scripting.addModule("/drivers/gpio/gpio", {}, false);
const gpio1 = gpio.addInstance();
const gpio2 = gpio.addInstance();
const gpio3 = gpio.addInstance();
const gpio4 = gpio.addInstance();
const gpio5 = gpio.addInstance();
const gpio6 = gpio.addInstance();
const gpio7 = gpio.addInstance();
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
const pruicss1 = pruicss.addInstance();
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
/**
* Write custom configuration values to the imported modules.
*/
epwm1.$name = "CONFIG_EPWM0";
epwm1.EPWM.$assign = "EHRPWM0";
epwm1.EPWM.SYNCI.$used = false;
epwm2.$name = "CONFIG_EPWM1";
epwm2.EPWM.SYNCO.$assign = "GPMC0_AD1";
epwm2.EPWM.SYNCO.$used = false;
epwm2.EPWM.SYNCI.$used = false;
gpio1.$name = "GPIO_MTR_1_PWM_EN";
gpio1.pinDir = "OUTPUT";
gpio1.useMcuDomainPeripherals = true;
gpio1.MCU_GPIO.gpioPin.$assign = "MCU_UART0_RXD";
gpio2.pinDir = "OUTPUT";
gpio2.$name = "GPIO_HIGH_TH_CH0";
gpio2.GPIO.$assign = "GPIO0";
gpio2.GPIO.gpioPin.rx = false;
gpio2.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO18";
gpio3.$name = "GPIO_LOW_TH_CH0";
gpio3.pinDir = "OUTPUT";
gpio3.GPIO.gpioPin.rx = false;
gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO11";
gpio4.pinDir = "OUTPUT";
gpio4.$name = "GPIO_HIGH_TH_CH1";
gpio4.GPIO.$assign = "GPIO0";
gpio4.GPIO.gpioPin.rx = false;
gpio4.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO17";
gpio5.$name = "GPIO_LOW_TH_CH1";
gpio5.pinDir = "OUTPUT";
gpio5.GPIO.$assign = "GPIO0";
gpio5.GPIO.gpioPin.rx = false;
gpio5.GPIO.gpioPin.$assign = "PRG1_PRU0_GPO7";
gpio6.pinDir = "OUTPUT";
gpio6.$name = "GPIO_HIGH_TH_CH2";
gpio6.GPIO.gpioPin.rx = false;
gpio6.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO1";
gpio7.$name = "GPIO_LOW_TH_CH2";
gpio7.pinDir = "OUTPUT";
gpio7.GPIO.gpioPin.rx = false;
gpio7.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2";
pruicss1.$name = "CONFIG_PRU_ICSS0";
pruicss1.coreClk = 300000000;
pruicss1.iepClk = 300000000;
pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0";
debug_log.enableUartLog = true;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";
mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.allowExecute = false;
mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x60000000;
mpu_armv75.size = 28;
mpu_armv75.accessPermissions = "Supervisor RD, User RD";
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
epwm1.EPWM.A.$suggestSolution = "GPMC0_AD3";
epwm1.EPWM.B.$suggestSolution = "GPMC0_AD4";
epwm1.EPWM.SYNCO.$suggestSolution = "GPMC0_AD1";
epwm2.EPWM.$suggestSolution = "EHRPWM1";
epwm2.EPWM.A.$suggestSolution = "GPMC0_AD5";
epwm2.EPWM.B.$suggestSolution = "GPMC0_AD6";
gpio1.MCU_GPIO.$suggestSolution = "MCU_GPIO0";
gpio3.GPIO.$suggestSolution = "GPIO1";
gpio6.GPIO.$suggestSolution = "GPIO1";
gpio7.GPIO.$suggestSolution = "GPIO1";
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";

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@ -0,0 +1,84 @@
/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <kernel/dpl/DebugP.h>
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include "FreeRTOS.h"
#include "task.h"
#define MAIN_TASK_PRI (configMAX_PRIORITIES-1)
#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE))
StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32)));
StaticTask_t gMainTaskObj;
TaskHandle_t gMainTask;
void sdfm_main(void *args);
void freertos_main(void *args)
{
sdfm_main(NULL);
vTaskDelete(NULL);
}
int main(void)
{
/* init SOC specific modules */
System_init();
Board_init();
/* This task is created at highest priority, it should create more tasks and then delete itself */
gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */
"freertos_main", /* Text name for the task. This is to facilitate debugging only. */
MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */
NULL, /* We are not using the task parameter. */
MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */
gMainTaskStack, /* pointer to stack base */
&gMainTaskObj ); /* pointer to statically allocated task object memory */
configASSERT(gMainTask != NULL);
/* Start the scheduler to start the tasks executing. */
vTaskStartScheduler();
/* The following line should never be reached because vTaskStartScheduler()
will only return if there was not enough FreeRTOS heap memory available to
create the Idle and (if configured) Timer tasks. Heap management, and
techniques for trapping heap exhaustion, are described in the book text. */
DebugP_assertNoLog(0);
return 0;
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="ARM"
deviceId="Cortex R.AM2434_ALX"
/>
</when>
</applicability>
<project
title="Icss Sdfm Three Channel Single Pru Mode"
name = "icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang"
products="sysconfig;com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
Debug,
"
connection="TIXDS110_Connection.xml"
toolChain="TICLANG"
cgtVersion="3.2.0"
device="Cortex R.AM2434_ALX"
deviceCore="MAIN_PULSAR_Cortex_R5_0_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include/c
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_three_channel_single_pru_mode
-mcpu=cortex-r5
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
-Wall
-Werror
-g
-Wno-gnu-variable-sized-type-not-at-end
-Wno-unused-function
-DSOC_AM243X
"
linkerBuildOptions="
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib
-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib
-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib
-i${CG_TOOL_ROOT}/lib
-m=icss_sdfm_three_channel_single_pru_mode.${ConfigName}.map
--diag_suppress=10063
--ram_model
--reread_libs
"
postBuildStep="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_ccs_bootimage_gen OUTNAME=${BuildArtifactFileBaseName} PROFILE=${ConfigName} MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE} DEVICE=am243x"
enableSysConfigTool="true"
sysConfigBuildOptions="
--context r5fss0-0 --part ALX --package ALX
"
description="A Icss Sdfm Three Channel Single Pru Mode FREERTOS project">
<configuration name="Release"
compilerBuildOptions="
-Os
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.release.lib
-ldrivers.am243x.r5f.ti-arm-clang.release.lib
-lboard.am243x.r5f.ti-arm-clang.release.lib
-lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.release.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
-lfreertos.am243x.r5f.ti-arm-clang.debug.lib
-ldrivers.am243x.r5f.ti-arm-clang.debug.lib
-lboard.am243x.r5f.ti-arm-clang.debug.lib
-lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.debug.lib
-llibc.a
-llibsysbm.a
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../app_sdfm.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../epwm_dc.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../epwm_drv_aux.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../epwm_mod.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../sdfm.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../cfg_pad.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../example.syscfg" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/EXAMPLE_MOTORCONTROL_SDFM.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
<file path="syscfg_c.rov.xs" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="makefile_ccs_bootimage_gen" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
</project>
</projectSpec>

View File

@ -0,0 +1,151 @@
/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/
--stack_size=16384
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */
/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is disabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
SECTIONS
{
/* This has the R5F entry point and vector table, this MUST be at 0x0 */
.vectors:{} palign(8) > R5F_VECS
/* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000
* i.e this cannot be placed in DDR
*/
GROUP {
.text.hwi: palign(8)
.text.cache: palign(8)
.text.mpu: palign(8)
.text.boot: palign(8)
.text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
} > MSRAM
/* This is rest of code. This can be placed in DDR if DDR is available and needed */
GROUP {
.text: {} palign(8) /* This is where code resides */
.rodata: {} palign(8) /* This is where const's go */
} > MSRAM
/* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.data: {} palign(8) /* This is where initialized globals and static go */
} > MSRAM
/* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */
GROUP {
.bss: {} palign(8) /* This is where uninitialized globals go */
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem: {} palign(8) /* This is where the malloc heap goes */
.stack: {} palign(8) /* This is where the main() stack goes */
} > MSRAM
/* This is where the stacks for different R5F modes go */
GROUP {
.irqstack: {. = . + __IRQ_STACK_SIZE;} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack: {. = . + __SVC_STACK_SIZE;} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack: {. = . + __ABORT_STACK_SIZE;} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM
/* Sections needed for C++ projects */
GROUP {
.ARM.exidx: {} palign(8) /* Needed for C++ exception handling */
.init_array: {} palign(8) /* Contains function pointers called before main */
.fini_array: {} palign(8) /* Contains function pointers called after main */
} > MSRAM
/* General purpose user shared memory, used in some examples */
.bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM
/* this is used when Debug log's to shared memory are enabled, else this is not used */
.bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM
/* this is used only when IPC RPMessage is enabled, else this is not used */
.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
/* General purpose non cacheable memory, used in some examples */
.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
/* TCM used by ICSS PRU to write sdfm sample output */
.gSdfmSampleOutput : {} align(4) > R5F_TCMB0
}
/*
NOTE: Below memory is reserved for DMSC usage
- During Boot till security handoff is complete
0x701E0000 - 0x701FFFFF (128KB)
- After "Security Handoff" is complete (i.e at run time)
0x701F4000 - 0x701FFFFF (48KB)
Security handoff is complete when this message is sent to the DMSC,
TISCI_MSG_SEC_HANDOVER
This should be sent once all cores are loaded and all application
specific firewall calls are setup.
*/
MEMORY
{
R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
/* when using multi-core application's i.e more than one R5F/M4F active, make sure
* this memory does not overlap with other R5F's
*/
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000
/* This section can be used to put XIP section of the application in flash, make sure this does not overlap with
* other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable
*/
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000
/* shared memory segments */
/* On R5F,
* - make sure there is a MPU entry which maps below regions as non-cache
*/
USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
}

View File

@ -0,0 +1,314 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak
CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH)
CC=$(CG_TOOL_ROOT)/bin/tiarmclang
LNK=$(CG_TOOL_ROOT)/bin/tiarmclang
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
PROFILE?=release
ConfigName:=$(PROFILE)
OUTNAME:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).out
BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=icss_sdfm_three_channel_single_pru_mode.$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
TARGETS += $(BOOTIMAGE_NAME_HS)
endif
FILES_common := \
app_sdfm.c \
epwm_dc.c \
epwm_drv_aux.c \
epwm_mod.c \
sdfm.c \
cfg_pad.c \
main.c \
ti_drivers_config.c \
ti_drivers_open_close.c \
ti_board_config.c \
ti_board_open_close.c \
ti_dpl_config.c \
ti_pinmux_config.c \
ti_power_clock_config.c \
FILES_PATH_common = \
.. \
../../.. \
generated \
INCLUDES_common := \
-I${CG_TOOL_ROOT}/include/c \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \
-I${MOTOR_CONTROL_SDK_PATH}/source \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include \
-I${MOTOR_CONTROL_SDK_PATH}/examples/current_sense/icss_sdfm_three_channel_single_pru_mode \
-Igenerated \
DEFINES_common := \
-DSOC_AM243X \
CFLAGS_common := \
-mcpu=cortex-r5 \
-mfloat-abi=hard \
-mfpu=vfpv3-d16 \
-mthumb \
-Wall \
-Werror \
-g \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-unused-function \
CFLAGS_cpp_common := \
-Wno-c99-designator \
-Wno-extern-c-compat \
-Wno-c++11-narrowing \
-Wno-reorder-init-list \
-Wno-deprecated-register \
-Wno-writable-strings \
-Wno-enum-compare \
-Wno-reserved-user-defined-literal \
-Wno-unused-const-variable \
-x c++ \
CFLAGS_debug := \
-D_DEBUG_=1 \
CFLAGS_release := \
-Os \
LNK_FILES_common = \
linker.cmd \
LIBS_PATH_common = \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
-Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \
-Wl,-i${CG_TOOL_ROOT}/lib \
LIBS_common = \
-lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-lmotorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
-llibc.a \
-llibsysbm.a \
LFLAGS_common = \
-Wl,--diag_suppress=10063 \
-Wl,--ram_model \
-Wl,--reread_libs \
LIBS_NAME = \
freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
motorcontrol_sdfm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \
libc.a \
libsysbm.a \
LIBS_PATH_NAME = \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \
${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/lib \
${CG_TOOL_ROOT}/lib \
FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)
vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)
$(OBJDIR)/%.obj %.obj: %.c
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $<
$(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $<
$(OBJDIR)/%.obj %.obj: %.S
@echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $<
$(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $<
all: $(TARGETS)
SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h
$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
@echo .
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ...
$(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
@echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!!
@echo .
clean:
@echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ...
$(RMDIR) $(OBJDIR)
$(RM) $(OUTNAME)
$(RM) $(BOOTIMAGE_NAME)
$(RM) $(BOOTIMAGE_NAME_XIP)
$(RM) $(BOOTIMAGE_NAME_SIGNED)
$(RM) $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(RM) $(BOOTIMAGE_RPRC_NAME_XIP)
$(RMDIR) generated/
scrub:
@echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang icss_sdfm_three_channel_single_pru_mode ...
$(RMDIR) obj
ifeq ($(OS),Windows_NT)
$(RM) \*.out
$(RM) \*.map
$(RM) \*.appimage*
$(RM) \*.rprc*
$(RM) \*.tiimage*
$(RM) \*.bin
else
$(RM) *.out
$(RM) *.map
$(RM) *.appimage*
$(RM) *.rprc*
$(RM) *.tiimage*
$(RM) *.bin
endif
$(RMDIR) generated
$(OBJS): | $(OBJDIR)
$(OBJDIR):
$(MKDIR) $@
.NOTPARALLEL:
.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg
syscfg: ../example.syscfg
@echo Generating SysConfig files ...
$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
syscfg-gui:
$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt
BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
$(BOOTIMAGE_NAME): $(OUTNAME)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
$(CHMOD) a+x $(XIPGEN_CMD)
endif
$(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS)
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_TEMP_OUT_FILE)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!!
@echo .
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
@echo .
$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS)
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS)
$(RM) $(BOOTIMAGE_NAME)-enc
endif
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
@echo .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

View File

@ -0,0 +1,106 @@
#
# Auto generated makefile
#
# Below variables need to be defined outside this file or via command line
# - MOTOR_CONTROL_SDK_PATH
# - PROFILE
# - CG_TOOL_ROOT
# - OUTNAME
# - CCS_INSTALL_DIR
# - CCS_IDE_MODE
CCS_PATH=$(CCS_INSTALL_DIR)
include ${MOTOR_CONTROL_SDK_PATH}/imports.mak
include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak
STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip
OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy
ifeq ($(OS), Windows_NT)
PYTHON=python
else
PYTHON=python3
endif
OUTFILE=$(PROFILE)/$(OUTNAME).out
BOOTIMAGE_PATH=$(abspath ${PROFILE})
BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage
BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp
#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1
else
BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55
MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js
APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py
ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out
endif
MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \
all:
ifeq ($(CCS_IDE_MODE),cloud)
# No post build steps
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ...
$(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME)
$(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP)
$(RM) $(BOOTIMAGE_RPRC_NAME)
$(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE)
$(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE)
# Sign the appimage for HS-FS using appimage signing script
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs
ifeq ($(DEVICE_TYPE),HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
@echo Boot image signing: Encryption is disabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs
else
@echo Boot image signing: Encryption is enabled.
$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs
$(RM) $(BOOTIMAGE_NAME)-enc
endif
endif
$(RM) $(BOOTIMAGE_RPRC_NAME_TMP)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!!
@echo .
ifeq ($(DEVICE_TYPE),HS)
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!!
@echo .
else
@echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!!
@echo .
endif
endif

View File

@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

View File

@ -0,0 +1,8 @@
/*
* ======== syscfg_c.rov.xs ========
* This file contains the information needed by the Runtime Object
* View (ROV) tool.
*/
var crovFiles = [
"mcu_plus_sdk/kernel/freertos/rov/FreeRTOS.rov.js",
];

View File

@ -86,13 +86,9 @@
#define TEST_ICSSG_INST_ID ( CONFIG_PRU_ICSS0 )
/* Test ICSSG slice ID */
#define TEST_ICSSG_SLICE_ID ( ICSSG_SLICE_ID_0 )
/* Test PRU core instance IDs */
#define TEST_PRU_INST_ID ( PRUICSS_PRU0 )
#define TEST_RTU_INST_ID ( PRUICSS_RTU_PRU0 )
/* R5F interrupt settings for ICSSG */
#define ICSSG_PRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_0 ) /* VIM interrupt number */
#define ICSSG_RTU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_1 ) /* VIM interrupt number */
#define ICSSG_PRU_SDFM_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_3 ) /* VIM interrupt number */
/* EPWM0 IRQ handler */
static void epwmIrqHandler(void *handle);
@ -144,6 +140,8 @@ __attribute__((section(".gSdfmSampleOutput"))) uint32_t gSdfm_sampleOutput[NUM_C
/* Test Sdfm parameters */
SdfmPrms gTestSdfmPrms = {
PRUICSS_PRU0,
TEST_ICSSG_SLICE_ID,
300000000, /*Value of IEP clock*/
20000000, /*Value of SD clock (It should be exact equal to sd clock value)*/
0, /*enable double update*/
@ -160,7 +158,7 @@ SdfmPrms gTestSdfmPrms = {
128, /*Normal current osr */
1, /*comparator enable*/
(uint32_t)&gSdfm_sampleOutput, /*Output samples base address*/
1,
0, /*Fast Detect enable */
{{4, 18, 2},
{4, 18, 2},
{4, 18, 2}
@ -178,21 +176,17 @@ uint32_t gMtr1PwnEnGpioPinDir = GPIO_MTR_1_PWM_EN_DIR;
volatile Bool gRunFlag = TRUE;
/* SDFM Output sample for Channel 0 */
/* ICSS SDFM Output sample for Channel 0 */
/*Sample size*/
#define MAX_SAMPLES (128)
uint32_t sdfm_ch0_samples[MAX_SAMPLES] = {0};
uint32_t sdfm_ch0_idx = 0;
/* SDFM Output sample for Channel 1 */
uint32_t sdfm_ch1_samples[MAX_SAMPLES] = {0};
uint32_t sdfm_ch1_idx = 0;
/* SDFM Output sample for Channel 2 */
uint32_t sdfm_ch2_samples[MAX_SAMPLES] = {0};
uint32_t sdfm_ch2_idx = 0;
/* ICSS SDFM Output samples */
uint32_t sdfm_ch_samples[NUM_CH_SUPPORTED][MAX_SAMPLES] = {0};
uint32_t sdfmPruIdxCnt = 0;
/* IRQ counters */
volatile uint32_t gPruSdfmIrqCnt=0; /* PRU Sdfm FW IRQ count */
volatile uint32_t gPruSdfmIrqCnt=0; /* PRU ICSS SDFM FW IRQ count */
volatile uint32_t gEpwmIsrCnt=0; /* EPWM0 IRQ count */
volatile uint32_t gEpwmIsrCnt1=0;
/*PWM Parameters*/
@ -296,7 +290,7 @@ void init_sdfm()
DebugP_log("Error: initIcss() fail.\r\n");
return;
}
/* Register & enable ICSSG PRU SDFM FW interrupt */
HwiP_Params_init(&hwiPrms);
hwiPrms.intNum = ICSSG_PRU_SDFM_INT_NUM;
@ -307,14 +301,13 @@ void init_sdfm()
status = HwiP_construct(&gIcssgPruSdfmHwiObject, &hwiPrms);
DebugP_assert(status == SystemP_SUCCESS);
/* Initialize PRU core for SDFM */
status = initPruSdfm(gPruIcssHandle, TEST_PRU_INST_ID, &gTestSdfmPrms, &gHPruSdfm);
/* Initialize PRU cores for SDFM */
status = initPruSdfm(gPruIcssHandle, PRUICSS_PRU0, &gTestSdfmPrms, &gHPruSdfm);
if (status != SDFM_ERR_NERR)
{
DebugP_log("Error: initPruSdfm() fail.\r\n");
return;
}
}
void sdfm_main(void *args)
{
@ -391,19 +384,19 @@ void pruSdfmIrqHandler(void *args)
*/
PRUICSS_clearEvent(gPruIcssHandle, PRU_TRIGGER_HOST_SDFM_EVT);
/* SDFM Output sample for Channel 0 */
sdfm_ch0_samples[sdfm_ch0_idx++] = SDFM_getFilterData(gHPruSdfm, 0);
/* SDFM Output sample for Channel 1 */
sdfm_ch1_samples[sdfm_ch1_idx++] = SDFM_getFilterData(gHPruSdfm, 1);
/* SDFM Output sample for Channel 2 */
sdfm_ch2_samples[sdfm_ch2_idx++] = SDFM_getFilterData(gHPruSdfm, 2);
if(sdfm_ch0_idx >= MAX_SAMPLES)
if(sdfmPruIdxCnt >= MAX_SAMPLES)
{
sdfm_ch0_idx = 0;
sdfm_ch1_idx = 0;
sdfm_ch2_idx = 0;
sdfmPruIdxCnt = 0;
}
/* SDFM Output sample for Channel 0 */
sdfm_ch_samples[SDFM_CH0][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 0);
/* SDFM Output sample for Channel 1 */
sdfm_ch_samples[SDFM_CH1][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 1);
/* SDFM Output sample for Channel 2 */
sdfm_ch_samples[SDFM_CH2][sdfmPruIdxCnt] = SDFM_getFilterData(gHPruSdfm, 2);
sdfmPruIdxCnt++;
}
/* EPWM0 IRQ handler */

View File

@ -0,0 +1,42 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _CFG_PAD_H_
#define _CFG_PAD_H_
/* Configure SOC pads.
Normally handled via Pinmux_init(),
but currently no way to pads for ICSSG from Sysconfig. */
void cfgPad(void);
#endif /* _CFG_PAD_H_ */

View File

@ -0,0 +1,306 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include <math.h>
#include <drivers/epwm.h>
#include "epwm_drv_aux.h"
#include "epwm_mod.h"
#include "epwm_dc.h"
Epwm_Handle epwmInit(
EPwmCfgPrms_t *pEpwmCfgPrms,
EPwmObj_t *pEpwmObj
)
{
Epwm_Handle hEpwm; /* EPWM handle */
uint32_t epwmBaseAddr; /* EPWM base address */
uint32_t epwmOutChEn; /* EPWM output channel (A/B) enable bit mask */
uint32_t epwmTbFreq; /* EPWM time base clock */
uint32_t epwmOutFreq; /* EPWM output frequency */
uint32_t epwmTbCounterDir; /* EPWM TB counter direction */
uint32_t epwmPrdVal;
uint32_t epwmCmpAVal, epwmCmpBVal;
/* Get configuration parameters */
epwmBaseAddr = pEpwmCfgPrms->epwmBaseAddr;
epwmOutChEn = pEpwmCfgPrms->epwmOutChEn;
epwmTbFreq = pEpwmCfgPrms->epwmTbFreq;
epwmOutFreq = pEpwmCfgPrms->epwmOutFreq;
epwmTbCounterDir = pEpwmCfgPrms->epwmTbCounterDir;
/* Configure Time Base submodule */
writeTbClkDiv(epwmBaseAddr, pEpwmCfgPrms->hspClkDiv, pEpwmCfgPrms->clkDiv);
tbPwmFreqCfg(epwmBaseAddr, epwmTbFreq, epwmOutFreq,
epwmTbCounterDir, EPWM_SHADOW_REG_CTRL_ENABLE, &epwmPrdVal);
/* Configure TB Sync In Mode */
if (pEpwmCfgPrms->cfgTbSyncIn == FALSE) {
EPWM_tbSyncDisable(epwmBaseAddr);
}
else {
EPWM_tbSyncEnable(epwmBaseAddr, pEpwmCfgPrms->tbPhsValue, pEpwmCfgPrms->tbSyncInCounterDir);
}
/* Configure TB Sync Out Mode */
if (pEpwmCfgPrms->cfgTbSyncOut == FALSE) {
EPWM_tbSetSyncOutMode(epwmBaseAddr, EPWM_TB_SYNC_OUT_EVT_DISABLE );
}
else {
EPWM_tbSetSyncOutMode(epwmBaseAddr, pEpwmCfgPrms->tbSyncOutMode);
}
/* Configure emulation mode */
EPWM_tbSetEmulationMode(epwmBaseAddr, EPWM_TB_EMU_MODE_FREE_RUN);
if ((epwmOutChEn >> 0) & 0x1) {
/*
* COMPA value - this determines the duty cycle
* COMPA = (PRD - ((dutycycle * PRD) / 100)
*/
epwmCmpAVal = (epwmPrdVal - ((pEpwmCfgPrms->epwmDutyCycle[EPWM_OUTPUT_CH_A] * epwmPrdVal) / 100U));
//epwmCmpAVal = 1; // FL: force max duty cycle just before 100% DC to see where EPWM period occurs
/* Configure counter compare submodule */
EPWM_counterComparatorCfg(epwmBaseAddr, EPWM_CC_CMP_A,
epwmCmpAVal, EPWM_SHADOW_REG_CTRL_ENABLE,
EPWM_CC_CMP_LOAD_MODE_CNT_EQ_ZERO, TRUE);
/* Configure Action Qualifier Submodule */
EPWM_aqActionOnOutputCfg(epwmBaseAddr, EPWM_OUTPUT_CH_A,
&pEpwmCfgPrms->aqCfg[EPWM_OUTPUT_CH_A]);
}
if ((epwmOutChEn >> 1) & 0x1) {
/*
* COMPB value - this determines the duty cycle
* COMPB = (PRD - ((dutycycle * PRD) / 100)
*/
epwmCmpBVal = (epwmPrdVal - ((pEpwmCfgPrms->epwmDutyCycle[EPWM_OUTPUT_CH_B] * epwmPrdVal) / 100U));
/* Configure counter compare submodule */
EPWM_counterComparatorCfg(epwmBaseAddr, EPWM_CC_CMP_B,
epwmCmpBVal, EPWM_SHADOW_REG_CTRL_ENABLE,
EPWM_CC_CMP_LOAD_MODE_CNT_EQ_ZERO, TRUE);
/* Configure Action Qualifier Submodule */
EPWM_aqActionOnOutputCfg(epwmBaseAddr, EPWM_OUTPUT_CH_B,
&pEpwmCfgPrms->aqCfg[EPWM_OUTPUT_CH_B]);
}
if (pEpwmCfgPrms->cfgDb == TRUE) {
/* Configure Dead Band Submodule */
EPWM_deadbandCfg(epwmBaseAddr, &pEpwmCfgPrms->dbCfg);
}
else {
/* Configure Dead Band Submodule */
EPWM_deadbandBypass(epwmBaseAddr);
}
/* Configure Chopper Submodule */
EPWM_chopperEnable(epwmBaseAddr, FALSE);
/* Configure trip zone Submodule */
EPWM_tzTripEventDisable(epwmBaseAddr, EPWM_TZ_EVENT_ONE_SHOT, 0U);
EPWM_tzTripEventDisable(epwmBaseAddr, EPWM_TZ_EVENT_CYCLE_BY_CYCLE, 0U);
if (pEpwmCfgPrms->cfgEt == TRUE) {
/* Configure event trigger Submodule */
EPWM_etIntrCfg(epwmBaseAddr, pEpwmCfgPrms->intSel,
pEpwmCfgPrms->intPrd);
EPWM_etIntrEnable(epwmBaseAddr);
}
/* Init PWM object */
hEpwm = (Epwm_Handle)pEpwmObj;
hEpwm->epwmId = pEpwmCfgPrms->epwmId;
hEpwm->epwmBaseAddr = pEpwmCfgPrms->epwmBaseAddr;
hEpwm->epwmOutChEn = pEpwmCfgPrms->epwmOutChEn;
hEpwm->hspClkDiv = pEpwmCfgPrms->hspClkDiv;
hEpwm->clkDiv = pEpwmCfgPrms->clkDiv;
hEpwm->epwmTbFreq = pEpwmCfgPrms->epwmTbFreq;
hEpwm->epwmOutFreq = pEpwmCfgPrms->epwmOutFreq;
hEpwm->epwmPrdVal = epwmPrdVal;
hEpwm->toggleEpwmPrd = FALSE;
hEpwm->toggleEpwmPrdState = 0;
hEpwm->epwmPrdValL = 0;
hEpwm->epwmPrdValU = 0;
if ((epwmOutChEn >> 0) & 0x1) {
hEpwm->epwmDutyCycle[EPWM_OUTPUT_CH_A] = pEpwmCfgPrms->epwmDutyCycle[EPWM_OUTPUT_CH_A];
hEpwm->cmpAVal = epwmCmpAVal;
hEpwm->cmpANzToZ = FALSE;
hEpwm->cmpAZToNz = FALSE;
}
if ((epwmOutChEn >> 1) & 0x1) {
hEpwm->epwmDutyCycle[EPWM_OUTPUT_CH_B] = pEpwmCfgPrms->epwmDutyCycle[EPWM_OUTPUT_CH_B];
hEpwm->cmpBVal = epwmCmpBVal;
hEpwm->cmpBNzToZ = FALSE;
hEpwm->cmpBZToNz = FALSE;
}
return hEpwm;
}
/* Update EPWM period */
int32_t epwmUpdatePrd(
Epwm_Handle hEpwm,
uint32_t epwmOutFreqSet
)
{
float epwmPrdVal_f;
uint32_t epwmPrdVal;
uint32_t rem;
/* Check for EPWM period toggle */
if (hEpwm->toggleEpwmPrd == TRUE) {
hEpwm->epwmPrdVal = (hEpwm->toggleEpwmPrdState == 0) ? hEpwm->epwmPrdValL : hEpwm->epwmPrdValU;
hEpwm->toggleEpwmPrdState ^= 0x1;
/* Write next period count */
writeTbPrd(hEpwm->epwmBaseAddr, hEpwm->epwmPrdVal);
}
/* Check for PWM frequency change */
if (hEpwm->epwmOutFreq != epwmOutFreqSet) {
epwmPrdVal_f = (float)hEpwm->epwmTbFreq / epwmOutFreqSet;
epwmPrdVal_f = roundf(epwmPrdVal_f);
epwmPrdVal = (uint32_t)epwmPrdVal_f;
rem = epwmPrdVal - epwmPrdVal/2*2;
if (rem == 0) {
/* Period is divisible by 2,
alternating period not employed */
hEpwm->toggleEpwmPrd = FALSE;
hEpwm->toggleEpwmPrdState = 0;
hEpwm->epwmPrdValL = 0;
hEpwm->epwmPrdValU = 0;
hEpwm->epwmPrdVal = epwmPrdVal/2;
} else {
/* Period is not divisible by 2,
alternating period employed to provide correct average EPWM frequency:
EPWM period 2*n : TBPRD <- 'Lower' period
EPWM period 2*n+1 : TBPRD <- 'Upper' period
*/
hEpwm->toggleEpwmPrd = TRUE;
hEpwm->toggleEpwmPrdState = 1;
hEpwm->epwmPrdValL = epwmPrdVal/2;
hEpwm->epwmPrdValU = epwmPrdVal/2+1;
hEpwm->epwmPrdVal = hEpwm->epwmPrdValL;
}
/* Write next period count */
writeTbPrd(hEpwm->epwmBaseAddr, hEpwm->epwmPrdVal);
hEpwm->epwmOutFreq = epwmOutFreqSet;
}
return EPWM_DC_SOK;
}
/* Update EPWM A/B outputs */
int32_t epwmUpdateOut(
Epwm_Handle hEpwm,
float VrefA,
float VrefB
)
{
float dcVal; /* EPWM duty cycle value */
uint16_t cmpVal; /* EPWM CMP value */
if ((hEpwm->epwmOutChEn >> 0) & 0x1) {
/* Compute next Duty Cycle and CMP values */
computeCmpx(VrefA, hEpwm->epwmPrdVal, &dcVal, &cmpVal);
/* Write next CMPA value */
writeCmpA(hEpwm->epwmBaseAddr, cmpVal);
/* EPWM 100% Duty Cycle */
/* Handle transition to 100% Duty Cycle */
if (hEpwm->cmpANzToZ == TRUE) {
/* restore original AQ */
cfgOutChAAqZero(hEpwm->epwmBaseAddr, EPWM_AQ_ACTION_DONOTHING);
hEpwm->cmpANzToZ = FALSE;
}
if ((hEpwm->cmpAVal != 0) && (cmpVal == 0)) {
/* set AQ to set for next period */
cfgOutChAAqZero(hEpwm->epwmBaseAddr, EPWM_AQ_ACTION_HIGH);
hEpwm->cmpANzToZ = TRUE;
}
/* Handle transition from 100% Duty Cycle */
if (hEpwm->cmpAZToNz == TRUE) {
/* restore original AQ */
cfgOutChAAqZero(hEpwm->epwmBaseAddr, EPWM_AQ_ACTION_DONOTHING);
hEpwm->cmpAZToNz = FALSE;
}
if ((hEpwm->cmpAVal == 0) && (cmpVal != 0)) {
/* set AQ to clear for next period */
cfgOutChAAqZero(hEpwm->epwmBaseAddr, EPWM_AQ_ACTION_LOW);
hEpwm->cmpAZToNz = TRUE;
}
hEpwm->cmpAVal = cmpVal;
}
if ((hEpwm->epwmOutChEn >> 1) & 0x1) {
/* Compute next Duty Cycle and CMP values */
computeCmpx(VrefB, hEpwm->epwmPrdVal, &dcVal, &cmpVal);
/* Write next CMPB value */
writeCmpB(hEpwm->epwmBaseAddr, cmpVal);
/* EPWM 100% Duty Cycle */
/* Handle transition to 100% Duty Cycle */
if (hEpwm->cmpBNzToZ == TRUE) {
/* restore original AQ */
cfgOutChBAqZero(hEpwm->epwmBaseAddr, EPWM_AQ_ACTION_DONOTHING);
hEpwm->cmpBNzToZ = FALSE;
}
if ((hEpwm->cmpBVal != 0) && (cmpVal == 0)) {
/* set AQ to set for next period */
cfgOutChBAqZero(hEpwm->epwmBaseAddr, EPWM_AQ_ACTION_HIGH);
hEpwm->cmpBNzToZ = TRUE;
}
/* Handle transition from 100% Duty Cycle */
if (hEpwm->cmpBZToNz == TRUE) {
/* restore original AQ */
cfgOutChBAqZero(hEpwm->epwmBaseAddr, EPWM_AQ_ACTION_DONOTHING);
hEpwm->cmpBZToNz = FALSE;
}
if ((hEpwm->cmpBVal == 0) && (cmpVal != 0)) {
/* set AQ to clear for next period */
cfgOutChBAqZero(hEpwm->epwmBaseAddr, EPWM_AQ_ACTION_LOW);
hEpwm->cmpBZToNz = TRUE;
}
hEpwm->cmpBVal = cmpVal;
}
return EPWM_DC_SOK;
}

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@ -0,0 +1,86 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include <drivers/epwm.h>
#include <drivers/hw_include/hw_types.h>
#include <drivers/hw_include/csl_types.h>
#include "epwm_drv_aux.h"
#include <math.h>
/* Configure PWM Time base counter Frequency/Period */
void tbPwmFreqCfg(
uint32_t baseAddr,
uint32_t tbClk,
uint32_t pwmFreq,
uint32_t counterDir,
uint32_t enableShadowWrite,
uint32_t *pPeriodCount
)
{
uint32_t tbPeriodCount;
float tbPeriodCount_f;
uint32_t regVal = 0U;
regVal = HW_RD_REG16(baseAddr + PWMSS_EPWM_TBCTL);
HW_SET_FIELD32(regVal, PWMSS_EPWM_TBCTL_PRDLD, enableShadowWrite);
HW_SET_FIELD32(regVal, PWMSS_EPWM_TBCTL_CTRMODE, counterDir);
HW_WR_REG16((baseAddr + PWMSS_EPWM_TBCTL),
(uint16_t)regVal);
/* compute period using floating point */
tbPeriodCount_f = (float)tbClk / pwmFreq;
if (EPWM_TB_COUNTER_DIR_UP_DOWN == counterDir) {
tbPeriodCount_f = tbPeriodCount_f / 2.0;
}
tbPeriodCount_f = roundf(tbPeriodCount_f);
tbPeriodCount = (uint32_t)tbPeriodCount_f;
#if 0 /* use this in case there is some reason not to use floating point */
/* compute period using fixed point */
tbPeriodCount = tbClk << 4; /* U32Q4 */
tbPeriodCount /= pwmFreq;
if (EPWM_TB_COUNTER_DIR_UP_DOWN == counterDir) {
tbPeriodCount /= 2;
}
tbPeriodCount += 1<<3; /* biased rouding to 0.5 */
tbPeriodCount >>= 4; /* U32Q0 */
#endif
regVal = (counterDir == EPWM_TB_COUNTER_DIR_UP_DOWN) ?
tbPeriodCount : tbPeriodCount-1;
HW_WR_REG16((baseAddr + PWMSS_EPWM_TBPRD),
(uint16_t)regVal);
*pPeriodCount = tbPeriodCount;
}

View File

@ -0,0 +1,197 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _EPWM_DRV_AUX_H_
#define _EPWM_DRV_AUX_H_
#include <stdint.h>
#include <drivers/hw_include/hw_types.h>
#include <drivers/epwm.h>
/* Write EPWM CMPA */
static inline void writeCmpA(
uint32_t baseAddr,
uint32_t cmpVal
)
{
HW_WR_FIELD16((baseAddr + PWMSS_EPWM_CMPA), PWMSS_EPWM_CMPA,
(uint16_t)cmpVal);
}
/* Write EPWM CMPB */
static inline void writeCmpB(
uint32_t baseAddr,
uint32_t cmpVal
)
{
HW_WR_FIELD16((baseAddr + PWMSS_EPWM_CMPB), PWMSS_EPWM_CMPB,
(uint16_t)cmpVal);
}
/* Write EPWM CMPA/CMPB */
static inline void writeCmpAB(
uint32_t baseAddr,
uint32_t cmpAVal,
uint32_t cmpBVal
)
{
/* Write CMPA */
HW_WR_FIELD16((baseAddr + PWMSS_EPWM_CMPA), PWMSS_EPWM_CMPA,
(uint16_t)cmpAVal);
/* Write CMPB */
HW_WR_FIELD16((baseAddr + PWMSS_EPWM_CMPB), PWMSS_EPWM_CMPB,
(uint16_t)cmpBVal);
}
/* Configure Output ChannelA AQ Zero */
static inline void cfgOutChAAqZero(
uint32_t baseAddr,
uint32_t zeroAction
)
{
uint32_t regVal = 0U;
regVal = HW_RD_REG16(baseAddr + PWMSS_EPWM_AQCTLA);
HW_SET_FIELD32(regVal, PWMSS_EPWM_AQCTLA_ZRO, zeroAction);
HW_WR_REG16((baseAddr + PWMSS_EPWM_AQCTLA), (uint16_t)regVal);
}
/* Configure Output ChannelA AQ CMPA Up */
static inline void cfgOutChAAqCAU(
uint32_t baseAddr,
uint32_t cmpAUpAction
)
{
uint32_t regVal = 0U;
regVal = HW_RD_REG16(baseAddr + PWMSS_EPWM_AQCTLA);
HW_SET_FIELD32(regVal, PWMSS_EPWM_AQCTLA_CAU, cmpAUpAction);
HW_WR_REG16((baseAddr + PWMSS_EPWM_AQCTLA), (uint16_t)regVal);
};
/* Configure Output ChannelA AQ CMPA Down */
static inline void cfgOutChAAqCAD(
uint32_t baseAddr,
uint32_t cmpADownAction
)
{
uint32_t regVal = 0U;
regVal = HW_RD_REG16(baseAddr + PWMSS_EPWM_AQCTLA);
HW_SET_FIELD32(regVal, PWMSS_EPWM_AQCTLA_CAD, cmpADownAction);
HW_WR_REG16((baseAddr + PWMSS_EPWM_AQCTLA), (uint16_t)regVal);
}
/* Configure Output ChannelB AQ Zero */
static inline void cfgOutChBAqZero(
uint32_t baseAddr,
uint32_t zeroAction
)
{
uint32_t regVal = 0U;
regVal = HW_RD_REG16(baseAddr + PWMSS_EPWM_AQCTLB);
HW_SET_FIELD32(regVal, PWMSS_EPWM_AQCTLB_ZRO, zeroAction);
HW_WR_REG16((baseAddr + PWMSS_EPWM_AQCTLB), (uint16_t)regVal);
}
/* Configure Output ChannelA AQ CMPB Up */
static inline void cfgOutChAAqCBU(
uint32_t baseAddr,
uint32_t cmpBUpAction
)
{
uint32_t regVal = 0U;
regVal = HW_RD_REG16(baseAddr + PWMSS_EPWM_AQCTLA);
HW_SET_FIELD32(regVal, PWMSS_EPWM_AQCTLA_CBU, cmpBUpAction);
HW_WR_REG16((baseAddr + PWMSS_EPWM_AQCTLA), (uint16_t)regVal);
}
/* Write TB Period */
static inline void writeTbPrd(
uint32_t baseAddr,
uint32_t tbPeriodCount
)
{
HW_WR_REG16((baseAddr + PWMSS_EPWM_TBPRD), (uint16_t)tbPeriodCount);
}
/* Write TB Phase */
static inline void writeTbPhase(
uint32_t baseAddr,
uint32_t tbPhsValue
)
{
HW_WR_REG16((baseAddr + PWMSS_EPWM_TBPHS), (uint16_t)tbPhsValue);
}
/* Write TBCTL HSPDIV & CLKDIV */
static inline void writeTbClkDiv(
uint32_t baseAddr,
uint32_t hspClkDiv,
uint32_t clkDiv
)
{
uint32_t regVal = 0U;
regVal = HW_RD_REG16(baseAddr + PWMSS_EPWM_TBCTL);
HW_SET_FIELD32(regVal, PWMSS_EPWM_TBCTL_CLKDIV, clkDiv);
HW_SET_FIELD32(regVal, PWMSS_EPWM_TBCTL_HSPCLKDIV, hspClkDiv);
HW_WR_REG16((baseAddr + PWMSS_EPWM_TBCTL), (uint16_t)regVal);
}
/* Write TBCTL CTRMODE */
static inline void writeTbCtrMode(
uint32_t baseAddr,
uint32_t ctrMode
)
{
uint32_t regVal = 0U;
regVal = HW_RD_REG16(baseAddr + PWMSS_EPWM_TBCTL);
HW_SET_FIELD32(regVal, PWMSS_EPWM_TBCTL_CTRMODE, ctrMode);
HW_WR_REG16((baseAddr + PWMSS_EPWM_TBCTL), (uint16_t)regVal);
}
/* Configure PWM Time base counter Frequency/Period */
void tbPwmFreqCfg(
uint32_t baseAddr,
uint32_t tbClk,
uint32_t pwmFreq,
uint32_t counterDir,
uint32_t enableShadowWrite,
uint32_t *pPeriodCount
);
#endif /* _EPWM_DRV_AUX_H_ */

View File

@ -0,0 +1,75 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "epwm_mod.h"
#include <stdint.h>
#include <math.h>
/* Min / max output amplitude.
Waveform amplitude values beyond these thresholds are saturated. */
#define VREF_MAX ( 1.0f )
#define VREF_MIN ( -1.0f )
/* Compute Duty Cycle & CMPx given Vref & EPWM period */
void computeCmpx(
float Vref,
uint32_t epwmPrdVal,
float *pEpwmDutyCycle,
uint16_t *pEpwmCmpVal
)
{
float dc_f;
float cmp_f;
uint16_t cmp;
if (Vref >= VREF_MAX) {
/* 100% duty cycle */
dc_f = 1.0;
}
else if (Vref <= VREF_MIN) {
/* 0% duty cycle */
dc_f = 0.0;
}
else {
/* compute Duty Cycle */
dc_f = 0.5*(Vref + 1.0);
}
/* compute CMPx */
cmp_f = (1.0 - dc_f)*epwmPrdVal; /* up-down count */
cmp = (uint16_t)roundf(cmp_f);
*pEpwmDutyCycle = dc_f;
*pEpwmCmpVal = cmp;
}

View File

@ -0,0 +1,46 @@
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _EPWM_MOD_H_
#define _EPWM_MOD_H_
#include <stdint.h>
/* Compute Duty Cycle & CMPx given Vref */
void computeCmpx(
float Vref,
uint32_t epwmPrdVal,
float *pEpwmDutyCycle,
uint16_t *pEpwmCmpVal
);
#endif /* _EPWM_MOD_H_ */

View File

@ -43,22 +43,23 @@
#include "tisdfm_pruss_intc_mapping.h" /* INTC configuration */
#include "current_sense/sdfm/firmware/sdfm_bin.h" /* SDFM image data */
#include "sdfm.h"
#include "current_sense/sdfm/include/sdfm_api.h"
/* PRU SDFM FW image info */
typedef struct PRUSDFM_PruFwImageInfo_s {
typedef struct PRUSDFM_PruFwImageInfo_s
{
const uint32_t *pPruImemImg;
const uint32_t pruImemImgSz;
} PRUSDFM_PruFwImageInfo;
/* Number of PRU images */
#define PRU_SDFM_NUM_PRU_IMAGE ( 3 )
#define PRU_SDFM_NUM_PRU_IMAGE ( 1 )
/* PRU SDFM image info */
static PRUSDFM_PruFwImageInfo gPruFwImageInfo[PRU_SDFM_NUM_PRU_IMAGE] =
{
{pru_SDFM_PRU0_image_0, sizeof(pru_SDFM_PRU0_image_0)}, /* PRU FW */
{NULL, 0}
{SDFM_PRU0_image_0, sizeof(SDFM_PRU0_image_0)} /* single PRU FW binary */
};
/* ICSS INTC configuration */
@ -89,16 +90,20 @@ int32_t initIcss(
if (sliceId == ICSSG_SLICE_ID_0)
{
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_PRU0);
if (status != SystemP_SUCCESS) {
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_ICSSG;
}
}
else if (sliceId == ICSSG_SLICE_ID_1)
{
status = PRUICSS_disableCore(pruIcssHandle, PRUICSS_PRU1);
if (status != SystemP_SUCCESS) {
if (status != SystemP_SUCCESS)
{
return SDFM_ERR_INIT_ICSSG;
}
}
else
{
@ -111,6 +116,7 @@ int32_t initIcss(
{
return SDFM_ERR_INIT_ICSSG;
}
size = PRUICSS_initMemory(pruIcssHandle, PRUICSS_DATARAM(sliceId));
if (size == 0)
{
@ -172,11 +178,13 @@ void sdfm_configure_gpio_pin(sdfm_handle h_sdfm)
/* Initialize SDFM PRU FW */
int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm, void *pruss_cfg)
{
sdfm_handle hSdfm;
sdfm_handle hSdfm;
uint8_t SDFM_CH = 0;
/* Initialize SDFM instance */
hSdfm = SDFM_init(pruId);
hSdfm = SDFM_init(pruId, pSdfmPrms->pruInsId);
hSdfm->pruss_cfg = pruss_cfg;
uint32_t i;
i = SDFM_getFirmwareVersion(hSdfm);
DebugP_log("\n\n\n");
@ -187,16 +195,13 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm
return SDFM_ERR_INIT_SDFM;
}
uint8_t SDFM_CH;
hSdfm->iep_clock = pSdfmPrms->iep_clock;
hSdfm->sdfm_clock = pSdfmPrms->sd_clock;
hSdfm->sampleOutputInterface = (SDFM_SampleOutInterface *)(pSdfmPrms->samplesBaseAddress);
uint32_t sampleOutputInterfaceGlobalAddr = CPU0_BTCM_SOCVIEW(pSdfmPrms->samplesBaseAddress);
hSdfm->p_sdfm_interface->sampleBufferBaseAdd = sampleOutputInterfaceGlobalAddr;
hSdfm->iep_inc = 1; /* Default IEP increment 1 */
hSdfm->pruss_cfg = pruss_cfg;
uint8_t acc_filter = 0; //SINC3 filter
uint8_t ecap_divider = 0x0F; //IEP at 300MHz: SD clock = 300/15=20Mhz
@ -209,7 +214,6 @@ int32_t init_sdfm_pru_fw(uint8_t pruId, SdfmPrms *pSdfmPrms, sdfm_handle *pHSdfm
/*set Noraml current OSR */
SDFM_setFilterOverSamplingRatio(hSdfm, pSdfmPrms->FilterOsr);
/*below configuration for all three channel*/
for(SDFM_CH = 0; SDFM_CH < NUM_CH_SUPPORTED; SDFM_CH++)
{
@ -285,6 +289,7 @@ int32_t initPruSdfm(
void *pruss_cfg;
pruss_cfg = (void *)(((PRUICSS_HwAttrs *)(pruIcssHandle->hwAttrs))->cfgRegBase);
/* Reset PRU */
status = PRUICSS_resetCore(pruIcssHandle, pruInstId);
if (status != SystemP_SUCCESS) {
@ -296,21 +301,13 @@ int32_t initPruSdfm(
sliceId = pruInstId - (uint8_t)pruInstId/ICSSG_NUM_SLICE * ICSSG_NUM_SLICE;
/* Determine PRU DMEM address */
/* Determine PRU FW image and PRU IMEM address */
switch (pruInstId)
{
case PRUICSS_PRU0:
case PRUICSS_PRU1:
pPruFwImageInfo = &gPruFwImageInfo[0];
pruIMem = PRUICSS_IRAM_PRU(sliceId);
break;
case PRUICSS_RTU_PRU0:
case PRUICSS_RTU_PRU1:
pPruFwImageInfo = &gPruFwImageInfo[1];
pruIMem = PRUICSS_IRAM_RTU_PRU(sliceId);
break;
case PRUICSS_TX_PRU0:
case PRUICSS_TX_PRU1:
pPruFwImageInfo = NULL;
pPruFwImageInfo = &gPruFwImageInfo[0];
pruIMem = PRUICSS_IRAM_PRU(sliceId);
break;
default:
pPruFwImageInfo = NULL;
@ -339,10 +336,12 @@ int32_t initPruSdfm(
return SDFM_ERR_INIT_PRU_SDFM;
}
/* Translate PRU ID to SDFM API */
if (pruInstId == PRUICSS_PRU0) {
if (pruInstId == PRUICSS_PRU0)
{
pruId = PRU_ID_0;
}
else if (pruInstId == PRUICSS_PRU1) {
else if (pruInstId == PRUICSS_PRU1)
{
pruId = PRU_ID_1;
}
else {

View File

@ -110,7 +110,20 @@
#define ICSSG_SLICE_ID_0 ( 0 ) /* ICSSG slide ID 0 */
#define ICSSG_SLICE_ID_1 ( 1 ) /* ICSSG slide ID 1 */
#define ICSSG_NUM_SLICE ( 2 ) /* ICSSG number of slices */
#define NUM_FD_FIELD ( 3 )
#define NUM_FD_FIELD ( 3 )
#define NUM_CH_SUPPORTED ( 3 )
/* SDFM Channel IDs*/
#define SDFM_CH0 (0)
#define SDFM_CH1 (1)
#define SDFM_CH2 (2)
#define SDFM_CH3 (3)
#define SDFM_CH4 (4)
#define SDFM_CH5 (5)
#define SDFM_CH6 (6)
#define SDFM_CH7 (7)
#define SDFM_CH8 (8)
/*!
* @brief PRUICSS Instance IDs
*/
@ -122,7 +135,12 @@ typedef enum PRUICSS_MaxInstances_s
} PRUICSS_MaxInstances;
/* SDFM configuration parameters */
typedef struct SdfmPrms_s {
typedef struct SdfmPrms_s
{
/**<PRU core instance ID*/
uint8_t pruInsId;
/**<ICSSG pru Slice ID*/
uint8_t icssgSliceId;
/**< IEP clock value */
uint32_t iep_clock;
/**< Sigma delta input clock value */

View File

@ -118,16 +118,17 @@ extern "C" {
#define SYS_EVT_TYPE_EDGE 1
#define PRUICSS_INTC_INITDATA { \
{ IEP_TIM_CAP_CMP_EVENT, PRU_ARM_EVENT02, PRU_ARM_EVENT03, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [0-15] for Misra C standards */ \
{ IEP_TIM_CAP_CMP_EVENT, PRU_ARM_EVENT02, PRU_ARM_EVENT03, PRU_ARM_EVENT04, PRU_ARM_EVENT05, PRU_ARM_EVENT06, \
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [6-15] for Misra C standards */ \
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [16-31] for Misra C standards */ \
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [32-47] for Misra C standards */ \
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}, /* initializing member [48-63] for Misra C standards */ \
{ {IEP_TIM_CAP_CMP_EVENT, CHANNEL1, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT02, CHANNEL2, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT03, CHANNEL3, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [3] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [4] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [5] for Misra C standards */ \
{PRU_ARM_EVENT04, CHANNEL4, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT05, CHANNEL5, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{PRU_ARM_EVENT06, CHANNEL6, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [6] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [7] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [8] for Misra C standards */ \
@ -187,9 +188,9 @@ extern "C" {
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [62] for Misra C standards */ \
{0xFF,0xFF,0xFF,0xFF}}, /* initializing member [63] for Misra C standards */ \
{ {CHANNEL1, PRU1}, {CHANNEL2, PRU_EVTOUT0}, {CHANNEL3, PRU_EVTOUT1},\
{0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF}, /* Initializing members [3,4,5] of array for Misra C standards */ \
{CHANNEL4, PRU_EVTOUT2}, {CHANNEL5, PRU_EVTOUT3}, {CHANNEL6, PRU_EVTOUT4}, \
{0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF} }, /* Initializing members [6,7,8,9] of array for Misra C standards */ \
(PRU1_HOSTEN_MASK | PRU_EVTOUT0_HOSTEN_MASK | PRU_EVTOUT1_HOSTEN_MASK) \
(PRU1_HOSTEN_MASK | PRU_EVTOUT0_HOSTEN_MASK | PRU_EVTOUT1_HOSTEN_MASK | PRU_EVTOUT2_HOSTEN_MASK | PRU_EVTOUT3_HOSTEN_MASK | PRU_EVTOUT4_HOSTEN_MASK) /* PRU_EVTOUT0 */ \
}
#ifdef __cplusplus

View File

@ -122,7 +122,8 @@ typedef enum PRUICSS_MaxInstances_s
} PRUICSS_MaxInstances;
/* SDFM configuration parameters */
typedef struct SdfmPrms_s {
typedef struct SdfmPrms_s
{
/**< PRU_CORE_CLOCK*/
uint32_t pru_clock;
/**< IEP clock value */

View File

@ -75,14 +75,19 @@ help:
@echo $(MAKE) -s -C examples/position_sense/bissc_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-rtupru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-txpru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@ -250,8 +255,10 @@ BUILD_COMBO_EXAMPLE_ALL += tamagawa_diagnostic_single_channel_am243x-lp_r5fss0-0
BUILD_COMBO_EXAMPLE_ALL += bissc_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += bissc_diagnostic_multi_channel_load_share_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang
BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang
@ -261,6 +268,9 @@ BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-
BUILD_COMBO_EXAMPLE_PRIVATE_ALL =
# Various Private Example Targets
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt
@ -362,11 +372,17 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL)
bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all
icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all
icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all
icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all
icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
@ -383,8 +399,17 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile all
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile all
sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile all
@ -471,8 +496,10 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += tamagawa_diagnostic_single_channel_am243x-lp_r5
BUILD_COMBO_EXAMPLE_CLEAN_ALL += bissc_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += bissc_diagnostic_multi_channel_load_share_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
@ -482,6 +509,9 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freert
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL =
# Various Private Example Targets
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt_clean
@ -583,11 +613,17 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL)
bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean
icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean
icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean
icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean
icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
@ -604,8 +640,17 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile clean
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile clean
sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_clean:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile clean
@ -692,8 +737,10 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += tamagawa_diagnostic_single_channel_am243x-lp_r5
BUILD_COMBO_EXAMPLE_SCRUB_ALL += bissc_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += bissc_diagnostic_multi_channel_load_share_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub
BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub
@ -703,6 +750,9 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freert
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL =
# Various Private Example Targets
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt_scrub
@ -804,11 +854,17 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL)
bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
@ -825,8 +881,17 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile scrub
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile scrub
sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub
endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile scrub

View File

@ -56,7 +56,10 @@ help:
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-rtupru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-txpru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg]
@ -193,6 +196,9 @@ BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti
BUILD_COMBO_EXAMPLE_PRIVATE_ALL =
# Various Private Example Targets
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt
BUILD_COMBO_EXAMPLE_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt
@ -237,8 +243,17 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile all
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile all
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt:
$(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile all
@ -294,6 +309,9 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freer
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL =
# Various Private Example Targets
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_clean
@ -338,8 +356,17 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile clean
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile clean
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile clean
@ -395,6 +422,9 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freer
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL =
# Various Private Example Targets
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_scrub
BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_scrub
@ -439,8 +469,17 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile scrub
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile scrub
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_scrub:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile scrub

View File

@ -32,8 +32,10 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += tamagawa_diagnostic_single_channel_
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += bissc_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += bissc_diagnostic_multi_channel_load_share_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build
@ -43,6 +45,9 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5f
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL =
# Various Private Example Projectspec Build Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt_build
@ -144,11 +149,17 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL)
bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
@ -165,8 +176,17 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec all
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec all
sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_build:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec all
@ -254,8 +274,10 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += tamagawa_diagnostic_single_channel_
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += bissc_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += bissc_diagnostic_multi_channel_load_share_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean
@ -265,6 +287,9 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5f
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL =
# Various Private Example Projectspec Clean Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt_clean
@ -366,11 +391,17 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL)
bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
@ -387,8 +418,17 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec clean
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec clean
sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_clean:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec clean
@ -476,8 +516,10 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += tamagawa_diagnostic_single_channel
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += bissc_diagnostic_single_channel_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += bissc_diagnostic_multi_channel_load_share_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_three_channel_with_phase_compensation_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export
@ -487,6 +529,9 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_epwm_sync_am243x-lp_r5
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL =
# Various Private Example Projectspec Export Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt_export
@ -588,11 +633,17 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL)
bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
icss_sdfm_nine_channel_load_share_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
icss_sdfm_nine_channel_load_share_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
icss_sdfm_three_channel_single_pru_mode_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
icss_sdfm_three_channel_single_pru_mode_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
icss_sdfm_three_channel_with_phase_compensation_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
@ -609,8 +660,17 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL)
pruicss_pwm_epwm_sync_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec export
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec export
sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt_export:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec export
@ -723,14 +783,19 @@ help:
@echo $(MAKE) -s -C examples/position_sense/bissc_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_nine_channel_load_share_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_single_pru_mode/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/current_sense/icss_sdfm_three_channel_with_phase_compensation/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_epwm_sync/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-rtupru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-txpru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]

View File

@ -19,6 +19,9 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL =
# Various Private Example Projectspec Build Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_build
BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_build
@ -63,8 +66,17 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec all
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec all
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build:
$(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_build:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec all
@ -121,6 +133,9 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL =
# Various Private Example Projectspec Clean Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean
BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_clean
@ -165,8 +180,17 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec clean
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec clean
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean:
$(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_clean:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec clean
@ -223,6 +247,9 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am64x-evm_r
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL =
# Various Private Example Projectspec Export Targets
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_export
BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL += endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt_export
@ -267,8 +294,17 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL)
pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export:
$(MAKE) -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec export
sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec export
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export:
$(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
$(MAKE) -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export
endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt_export:
$(MAKE) -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec export
@ -346,7 +382,10 @@ help:
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C examples/pruicss_pwm/pruicss_pwm_duty_cycle/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-rtupru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/multi_axis_load_share/am64x-evm/icssg0-txpru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/current_sense/sdfm/firmware/single_axis_single_pru/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-rtupru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]
@echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-txpru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean]

View File

@ -1,53 +0,0 @@
let path = require('path');
let device = "am64x";
const files = {
common: [
"sdfm_drv.c",
],
};
const filedirs = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/driver",
],
};
const includes = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/include",
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware",
],
};
const buildOptionCombos = [
{ device: device, cpu: "r5f", cgt: "ti-arm-clang"},
];
function getComponentProperty() {
let property = {};
property.dirPath = path.resolve(__dirname, "..");
property.type = "library";
property.name = "motorcontrol_sdfm";
property.isInternal = false;
property.buildOptionCombos = buildOptionCombos;
return property;
}
function getComponentBuildProperty(buildOption) {
let build_property = {};
build_property.files = files;
build_property.filedirs = filedirs;
build_property.includes = includes;
return build_property;
}
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

View File

@ -41,96 +41,39 @@
#include <drivers/gpio.h>
#include <kernel/dpl/AddrTranslateP.h>
//*****************************************************************************
//
// Defines for the API.
//
//*****************************************************************************
//! Macro to get the low threshold
#define SDFM_GET_LOW_THRESHOLD(C) ((uint16_t)(C))
//! Macro to get the high threshold
#define SDFM_GET_HIGH_THRESHOLD(C) ((uint16_t)((uint32_t)(C) >> 16U))
//! Macro to get the high threshold 1 & 2 to be passed as lowThreshold
//! parameter to SDFM_setCompFilterLowThreshold().
#define SDFM_GET_LOW_THRESHOLD_BOTH(C1, C2) \
((((uint32_t)(SDFM_GET_LOW_THRESHOLD(C2))) << 16U) | \
((uint32_t)(SDFM_GET_LOW_THRESHOLD(C1))))
//! Macro to get the high threshold 1 & 2 to be passed as highThreshold
//! parameter to SDFM_setCompFilterHighThreshold().
#define SDFM_GET_HIGH_THRESHOLD_BOTH(C1, C2) \
((((uint32_t)(SDFM_GET_HIGH_THRESHOLD(C2))) << 16U) | \
((uint32_t)(SDFM_GET_HIGH_THRESHOLD(C1))))
//! Macro to convert comparator over sampling ratio to acceptable bit location
#define SDFM_SET_OSR(X) (((X) - 1) << 8U)
//! Macro to convert the data shift bit values to acceptable bit location
#define SDFM_SHIFT_VALUE(X) ((X) << 2U)
//! Macro to combine high threshold and low threshold values
#define SDFM_THRESHOLD(H, L) ((((uint32_t)(H)) << 16U) | (L))
//! Macro to set the FIFO level to acceptable bit location
#define SDFM_SET_FIFO_LEVEL(X) ((X) << 7U)
//! Macro to set and enable the zero cross threshold value.
#define SDFM_SET_ZERO_CROSS_THRESH_VALUE(X) (0x8000 | (X))
//! Macros to enable or disable filter.
#define SDFM_FILTER_DISABLE (0x0U)
#define SDFM_FILTER_ENABLE (0x2U)
//*****************************************************************************
//
//! Values that can be returned from SDFM_getThresholdStatus()
//
//*****************************************************************************
#define SDFM_OUTPUT_WITHIN_THRESHOLD (0) //!< SDFM output is within threshold
#define SDFM_OUTPUT_ABOVE_THRESHOLD (1) //!< SDFM output is above high threshold
#define SDFM_OUTPUT_BELOW_THRESHOLD (2) //!< SDFM output is below low threshold
//! Filter output is in 16 bits 2's complement format.
#define SDFM_DATA_FORMAT_16_BIT (0)
//! Filter output is in 32 bits 2's complement format.
#define SDFM_DATA_FORMAT_32_BIT (1)
//! Mask for Interrupt is generated if Modulator fails.
//!
#define SDFM_MODULATOR_FAILURE_INTERRUPT_MASK ( 0 )
//! Mask for Interrupt on Comparator low-level threshold.
//!
#define SDFM_LOW_LEVEL_THRESHOLD_INTERRUPT_MASK ( 1 )
//! Mask for Interrupt on Comparator high-level threshold.
//!
#define SDFM_HIGH_LEVEL_THRESHOLD_INTERRUPT_MASK ( 2 )
//! Mask for Interrupt on Acknowledge flag
//!
#define SDFM_DATA_FILTER_ACKNOWLEDGE_INTERRUPT_MASK ( 3 )
/* Internal structure for managing each PRU SD */
SDFM g_sdfm[NUM_PRU] = {
{PRU_ID_0,0,0,0,0, NULL},
{PRU_ID_1,0,0,0,0, NULL},
};
/* Initialize SDFM instance */
sdfm_handle SDFM_init(uint8_t pru_id)
sdfm_handle SDFM_init(uint8_t pru_id, uint8_t coreId)
{
SDFM *p_sdfm;
if (pru_id == PRU_ID_0)
{
/* Initialize PRU 0 SD */
p_sdfm = &g_sdfm[pru_id];
/* Initialize SDFM control address */
p_sdfm->p_sdfm_interface = (SDFM_Interface *)(PRU_ICSSG_DRAM0_SLV_RAM + 0x0);
if(coreId == PRUICSS_RTU_PRU0)
{
p_sdfm->p_sdfm_interface = (SDFM_Interface *)(PRU_ICSSG_DRAM0_SLV_RAM + RTUx_DMEM_BASE_ADD);
}
else if (coreId == PRUICSS_PRU0)
{
p_sdfm->p_sdfm_interface = (SDFM_Interface *)(PRU_ICSSG_DRAM0_SLV_RAM + PRUx_DMEM_BASE_ADD);
}
else if (coreId == PRUICSS_TX_PRU0)
{
p_sdfm->p_sdfm_interface = (SDFM_Interface *)(PRU_ICSSG_DRAM0_SLV_RAM + TXPRUx_DMEM_BASE_ADD);
}
else
{
p_sdfm->p_sdfm_interface = NULL;
}
/* Set FW PRU ID */
p_sdfm->p_sdfm_interface->sdfm_ctrl.sdfm_pru_id = pru_id;
@ -138,12 +81,25 @@ sdfm_handle SDFM_init(uint8_t pru_id)
else if (pru_id == PRU_ID_1)
{
/* Initialize PRU 1 SD */
p_sdfm = &g_sdfm[pru_id];
/* Initialize SDFM control address */
p_sdfm->p_sdfm_interface = (SDFM_Interface *)(PRU_ICSSG_DRAM0_SLV_RAM + 0x0);
if(coreId == PRUICSS_RTU_PRU1)
{
p_sdfm->p_sdfm_interface = (SDFM_Interface *)(PRU_ICSSG_DRAM1_SLV_RAM + RTUx_DMEM_BASE_ADD);
}
else if (coreId == PRUICSS_PRU1)
{
p_sdfm->p_sdfm_interface = (SDFM_Interface *)(PRU_ICSSG_DRAM1_SLV_RAM + PRUx_DMEM_BASE_ADD);
}
else if (coreId == PRUICSS_TX_PRU1)
{
p_sdfm->p_sdfm_interface = (SDFM_Interface *)(PRU_ICSSG_DRAM1_SLV_RAM + TXPRUx_DMEM_BASE_ADD);
}
else
{
p_sdfm->p_sdfm_interface = NULL;
}
/* Set FW PRU ID */
p_sdfm->p_sdfm_interface->sdfm_ctrl.sdfm_pru_id = pru_id;
}
@ -226,21 +182,22 @@ void SDFM_disableDoubleSampling(sdfm_handle h_sdfm)
/* Enable the channel specified by the channel number parameter*/
void SDFM_setEnableChannel(sdfm_handle h_sdfm, uint8_t channel_number)
{
if(channel_number == 0)
uint32_t temp;
temp = 1<< channel_number;
if(temp & SDFM_CH_MASK_FOR_CH0_CH3_CH6)
{
h_sdfm->p_sdfm_interface->sdfm_ch_ctrl.sdfm_ch_id |= (channel_number << SDFM_CFG_BF_SD_CH0_ID_SHIFT);
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[channel_number].ch_id = channel_number;
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[0].ch_id = channel_number;
}
else if(channel_number == 1)
else if(temp & SDFM_CH_MASK_FOR_CH1_CH4_CH7)
{
h_sdfm->p_sdfm_interface->sdfm_ch_ctrl.sdfm_ch_id |= (channel_number<< SDFM_CFG_BF_SD_CH1_ID_SHIFT);
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[channel_number].ch_id = channel_number;
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[1].ch_id = channel_number;
}
else
else
{
h_sdfm->p_sdfm_interface->sdfm_ch_ctrl.sdfm_ch_id |= (channel_number << SDFM_CFG_BF_SD_CH2_ID_SHIFT);
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[channel_number].ch_id = channel_number;
h_sdfm->p_sdfm_interface->sdfm_cfg_ptr[2].ch_id = channel_number;
}
}
/* set SDFM channel acc source */
@ -346,6 +303,26 @@ void SDFM_clearPwmTripStatus(sdfm_handle h_sdfm, uint8_t pwmIns)
regval = regval & (~ CSL_ICSSCFG_PWM0_PWM0_TRIP_RESET_MASK);
HW_WR_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_PWM0 + pwmIns * 4, regval);
}
/*Enable Load share mode*/
void SDFM_enableLoadShareMode(sdfm_handle h_sdfm, uint8_t sliceId)
{
void *pruss_cfg = h_sdfm->pruss_cfg;
uint32_t rgval;
if(sliceId)
{
rgval = HW_RD_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_SDPRU1CLKDIV);
rgval |= CSL_ICSSCFG_SDPRU1CLKDIV_PRU1_SD_SHARE_EN_MASK;
HW_WR_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_SDPRU1CLKDIV, rgval);
}
else
{
rgval = HW_RD_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_SDPRU0CLKDIV);
rgval |= CSL_ICSSCFG_SDPRU0CLKDIV_PRU0_SD_SHARE_EN_MASK;
HW_WR_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_SDPRU0CLKDIV, rgval);
}
}
/*Measure Phase delay*/
float SDFM_measureClockPhaseDelay(sdfm_handle h_sdfm, uint16_t clkEdg)

View File

@ -1,117 +0,0 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Required input arguments:
# MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} sdk_dir_path
# CCS_INSTALL_DIR=${CCS_INSTALL_DIR} ccs_dir_path
# CCS_PROJECT_DEBUG=${CWD} project_debug_dir_path
SHELL = cmd.exe
CCS_PATH?=$(CCS_INSTALL_DIR)/ccs_base/pru/include
CG_TOOL_ROOT := C:/ti/ti-cgt-pru_2.3.3
SYSCFG_DIR := $(CCS_PROJECT_DEBUG)/syscfg
GEN_OPTS__FLAG :=
GEN_CMDS__FLAG :=
ORDERED_OBJS += \
"./main.obj" \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt/linker.cmd" \
$(GEN_CMDS__FLAG) \
-llibc.a \
-include ../makefile.init
RM := DEL /F
RMDIR := RMDIR /S/Q
# Every subdirectory with source files must be described here
SUBDIRS := \
. \
# Add inputs and outputs from these tool invocations to the build variables
CMD_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt/linker.cmd \
ASM_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/main.asm
OBJS += \
./main.obj
ASM_DEPS += \
./main.d
OBJS__QUOTED += \
"main.obj"
ASM_DEPS__QUOTED += \
"main.d"
ASM_SRCS__QUOTED += \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/main.asm"
# Each subdirectory must supply rules for building sources it contributes
main.obj: ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/main.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
@echo 'Building file: "$<"'
@echo 'Invoking: PRU Compiler'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DPRU0 -DSLICE0 -v4 -v4 -DSDFM_PRU_CORE -o2 --display_error_number --hardware_mac=on --define=SOC_AM64X --include_path="$(CCS_PATH)" --include_path="$(SYSCFG_DIR)" --include_path="${CG_TOOL_ROOT}/include" --include_path="${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware" --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: "$<"'
@echo ' '
LIBS := -llibc.a
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
EXE_OUTPUTS += \
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out \
EXE_OUTPUTS__QUOTED += \
"sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out" \
BIN_OUTPUTS += \
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.hex \
BIN_OUTPUTS__QUOTED += \
"sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.hex" \
# All Target
all: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@$(MAKE) --no-print-directory -Onone "sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out"
# Tool invocations
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@echo 'Building target: "$@"'
@echo 'Invoking: PRU Linker'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DPRU0 -DSLICE0 -v4 -v4 -DSDFM_PRU_CORE -o2 --display_error_number --hardware_mac=on --define=SOC_AM64X --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little -z -m"sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.map" -i"$(CG_TOOL_ROOT)/lib" --diag_wrap=off --display_error_number --warn_sections --xml_link_info="sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_linkInfo.xml" --rom_model -o "sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out" $(ORDERED_OBJS)
@echo 'Finished building target: "$@"'
@echo ' '
@$(MAKE) --no-print-directory post-build
sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.hex: $(EXE_OUTPUTS)
@echo 'Building secondary target: "$@"'
@echo 'Invoking: PRU Hex Utility'
"$(CG_TOOL_ROOT)/bin/hexpru" -o "sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.hex" $(EXE_OUTPUTS__QUOTED)
@echo 'Finished building secondary target: "$@"'
@echo ' '
@$(MAKE) --no-print-directory post-build
# Other Targets
clean:
-$(RM) $(BIN_OUTPUTS__QUOTED)$(EXE_OUTPUTS__QUOTED)
-$(RM) "main.obj"
-$(RM) "main.d"
-@echo 'Finished clean'
-@echo ' '
post-build:
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h
-@echo ' '
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets

View File

@ -19,10 +19,12 @@ MEMORY
PAGE 1:
/* RAM */
PRU_FWREGS : org = 0x00000000 len = 0x00000080
RTU_FWREGS : org = 0x00000080 len = 0x00000080
PRU_DMEM_0_1_LOW : org = 0x00000200 len = 0x00000E00 /* 4kB ICSSG Data RAM 0_1 for PRU*/
PRU_DMEM_0_1_HIGH : org = 0x00001000 len = 0x00001000 /* 4kB ICSSG Data RAM 0_1 for RTU*/
PRU_FWREGS : org = 0x00000000 len = 0x00000200 /*800 byte */
RTU_FWREGS : org = 0x00000200 len = 0x00000200 /*800 byte */
TXPRU_FWREGS : org = 0x00000400 len = 0x00000200 /*800 byte */
PRU_DMEM_0_1_LOW : org = 0x00000600 len = 0x00000A00 /* 2.6kB ICSSG Data RAM 0_1 for PRU*/
PRU_DMEM_0_1_HIGH0 : org = 0x00001000 len = 0x0000800 /* 2kB ICSSG Data RAM 0_1 for RTU*/
PRU_DMEM_0_1_HIGH1 : org = 0x00001800 len = 0x0000800 /* 2KB ICSSG Data RAM 0_1 for TXPRU*/
PRU_DMEM_1_0 : org = 0x00002000 len = 0x00002000 /* 8kB ICSSG Data RAM 1_0 */
PAGE 2:
@ -85,9 +87,17 @@ SECTIONS {
.data > PRU_DMEM_0_1_LOW, PAGE 1
.outSamps > PRU_DMEM_0_1_LOW, PAGE 1
#else
#if defined (SDFM_RTU_CORE)
.fwRegs > RTU_FWREGS , PAGE 1
.data > PRU_DMEM_0_1_HIGH, PAGE 1
.outSamps > PRU_DMEM_0_1_HIGH, PAGE 1
.data > PRU_DMEM_0_1_HIGH0, PAGE 1
.outSamps > PRU_DMEM_0_1_HIGH0, PAGE 1
#else
#if defined (SDFM_TXPRU_CORE)
.fwRegs > TXPRU_FWREGS , PAGE 1
.data > PRU_DMEM_0_1_HIGH1, PAGE 1
.outSamps > PRU_DMEM_0_1_HIGH1, PAGE 1
#endif
#endif
#endif
.dbgBuf > PRU_SHAREDMEM, PAGE 2

View File

@ -41,24 +41,31 @@
/* ICSSG INTC events */
/* Compile-time Host event for SDFM samples available.
Ideally Host would provide this to FW via pseudo-register in DMEM. */
#define PRU_TRIGGER_HOST_SDFM_EVT ( 2+16 ) /* pr0_pru_mst_intr[2]_intr_req */
#define RTU_TRIGGER_HOST_SDFM_EVT ( 3+16 ) /* pr0_pru_mst_intr[3]_intr_req */
#define PRU_TRIGGER_HOST_SDFM_EVT ( 3+18 ) /* 18+3 (EVT) for 123 (INT#) pr0_pru_mst_intr[3]_intr_req */
#define RTU_TRIGGER_HOST_SDFM_EVT ( 4+18 ) /* 18+4 (EVT) for 124 (INT#) pr0_pru_mst_intr[4]_intr_req */
#define TXPRU_TRIGGER_HOST_SDFM_EVT ( 5+18 ) /* 18+5 (EVT) for 125 (INT#) pr0_pru_mst_intr[5]_intr_req*/
/*
Firmware registers
*/
/* FW register base addresses */
#define PRU0_DMEM ( 0x0000 )
#define PRU0_DMEM_START_ADDRESS ( 0x0000 )
#define RTU0_DMEM_START_ADDRESS ( 0x0200 )
#define TXPRU0_DMEM_START_ADDRESS ( 0x0400 )
#if defined (SDFM_PRU_CORE)
/* Base address for SDFM control parameters in DMEM */
#define ICSSG_SDFM_CTRL_BASE ( PRU0_DMEM )
/* Base address for SDFM Configuration parameters in DMEM */
#define ICSSG_SDFM_CFG_BASE ( PRU0_DMEM + 0x0002)
#define ICSSG_SDFM_CTRL_BASE ( PRU0_DMEM + PRU0_DMEM_START_ADDRESS)
#elif defined (SDFM_RTU_CORE)
/* Base address for SDFM control parameters in DMEM */
#define ICSSG_SDFM_CTRL_BASE ( PRU0_DMEM + RTU0_DMEM_START_ADDRESS)
#elif defined (SDFM_TXPRU_CORE)
/* Base address for SDFM control parameters in DMEM */
#define ICSSG_SDFM_CTRL_BASE ( PRU0_DMEM + TXPRU0_DMEM_START_ADDRESS)
#endif
/* FW register sizes (in bytes) */
/* SDFM ENABLE */
@ -213,6 +220,8 @@
/*Phase delay offset */
/*Local output sample buffer offset */
#define SDFM_LOCAL_OUTPUT_SAMPLE_BUFFER_OFFSET (0x104)
/*Debug */
#define SDFM_DUBUG_OFFSET ( 0x10F )

View File

@ -0,0 +1,144 @@
let path = require('path');
let device = "am243x";
const files = {
common: [
"sdfm.asm",
"icssg_pru.cmd",
],
};
/* Relative to where the makefile will be generated
* Typically at <example_folder>/<BOARD>/<core_os_combo>/<compiler>
*/
const filedirs = {
common: [
"..", /* core_os_combo base */
"../..", /* Example base */
"../../../..",
],
};
const includes = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware",
],
};
const defines_rtu = {
common: [
"SDFM_RTU_CORE",
"SDFM_LOAD_SHARE_MODE",
],
};
const defines_pru = {
common: [
"SDFM_PRU_CORE",
"SDFM_LOAD_SHARE_MODE",
],
};
const defines_txpru = {
common: [
"SDFM_TXPRU_CORE",
"SDFM_LOAD_SHARE_MODE",
],
};
const readmeDoxygenPageTag = "SDFM_DESIGN";
const cflags = {
common: [
"-v4",
"-o2",
"--display_error_number",
"--hardware_mac=on",
],
};
const lflags = {
common: [
"--warn_sections",
"--entry_point=SDFM_ENTRY",
"--zero_init=off",
"--disable_auto_rts",
"--define=SDFM_LOAD_SHARE_MODE=1",
],
};
const buildOptionCombos = [
{ device: device, cpu: "icssg0-pru0", cgt: "ti-pru-cgt", board: "am243x-evm", os: "fw"},
{ device: device, cpu: "icssg0-rtupru0", cgt: "ti-pru-cgt", board: "am243x-evm", os: "fw"},
{ device: device, cpu: "icssg0-txpru0", cgt: "ti-pru-cgt", board: "am243x-evm", os: "fw"},
];
let postBuildStepsPru0 = [
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_pru_bin.h;"
];
let postBuildStepsRtupru0 = [
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_RTU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_rtu_bin.h;"
];
let postBuildStepsTxpru0 = [
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_TXPRU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_txpru_bin.h;"
];
function getComponentProperty() {
let property = {};
property.dirPath = path.resolve(__dirname, "..");
property.type = "executable";
property.makefile = "pru";
property.name = "sdfm_firmware_multi_axis_load_share";
property.isInternal = false;
property.description = "ICSS SDFM"
property.buildOptionCombos = buildOptionCombos;
property.pru_main_file = "main";
property.pru_linker_file = "linker";
property.isSkipTopLevelBuild = true;
property.skipUpdatingTirex = true;
return property;
}
function getComponentBuildProperty(buildOption) {
let build_property = {};
build_property.files = files;
build_property.filedirs = filedirs;
build_property.includes = includes;
if(buildOption.cpu.match("icssg0-pru0"))
{
build_property.postBuildSteps = postBuildStepsPru0;
build_property.defines = defines_pru;
}
if(buildOption.cpu.match("icssg0-rtupru0"))
{
build_property.postBuildSteps = postBuildStepsRtupru0;
build_property.defines = defines_rtu;
}
if(buildOption.cpu.match("icssg0-txpru0"))
{
build_property.postBuildSteps = postBuildStepsTxpru0;
build_property.defines = defines_txpru;
}
build_property.cflags = cflags;
build_property.lflags = lflags;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
build_property.projecspecFileAction = "copy";
build_property.skipMakefileCcsBootimageGen = true;
return build_property;
}
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

View File

@ -0,0 +1,144 @@
let path = require('path');
let device = "am64x";
const files = {
common: [
"sdfm.asm",
"icssg_pru.cmd",
],
};
/* Relative to where the makefile will be generated
* Typically at <example_folder>/<BOARD>/<core_os_combo>/<compiler>
*/
const filedirs = {
common: [
"..", /* core_os_combo base */
"../..", /* Example base */
"../../../..",
],
};
const includes = {
common: [
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware",
],
};
const defines_rtu = {
common: [
"SDFM_RTU_CORE",
"SDFM_LOAD_SHARE_MODE",
],
};
const defines_pru = {
common: [
"SDFM_PRU_CORE",
"SDFM_LOAD_SHARE_MODE",
],
};
const defines_txpru = {
common: [
"SDFM_TXPRU_CORE",
"SDFM_LOAD_SHARE_MODE",
],
};
const readmeDoxygenPageTag = "SDFM_DESIGN";
const cflags = {
common: [
"-v4",
"-o2",
"--display_error_number",
"--hardware_mac=on",
],
};
const lflags = {
common: [
"--warn_sections",
"--entry_point=SDFM_ENTRY",
"--zero_init=off",
"--disable_auto_rts",
"--define=SDFM_LOAD_SHARE_MODE=1",
],
};
const buildOptionCombos = [
{ device: device, cpu: "icssg0-pru0", cgt: "ti-pru-cgt", board: "am64x-evm", os: "fw"},
{ device: device, cpu: "icssg0-rtupru0", cgt: "ti-pru-cgt", board: "am64x-evm", os: "fw"},
{ device: device, cpu: "icssg0-txpru0", cgt: "ti-pru-cgt", board: "am64x-evm", os: "fw"},
];
let postBuildStepsPru0 = [
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_pru_bin.h;"
];
let postBuildStepsRtupru0 = [
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_RTU0_image -o sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-rtupru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_rtu_bin.h;"
];
let postBuildStepsTxpru0 = [
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_TXPRU0_image -o sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am64x-evm_icssg0-txpru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_txpru_bin.h;"
];
function getComponentProperty() {
let property = {};
property.dirPath = path.resolve(__dirname, "..");
property.type = "executable";
property.makefile = "pru";
property.name = "sdfm_firmware_multi_axis_load_share";
property.isInternal = false;
property.description = "ICSS SDFM"
property.buildOptionCombos = buildOptionCombos;
property.pru_main_file = "main";
property.pru_linker_file = "linker";
property.isSkipTopLevelBuild = true;
property.skipUpdatingTirex = true;
return property;
}
function getComponentBuildProperty(buildOption) {
let build_property = {};
build_property.files = files;
build_property.filedirs = filedirs;
build_property.includes = includes;
if(buildOption.cpu.match("icssg0-pru0"))
{
build_property.postBuildSteps = postBuildStepsPru0;
build_property.defines = defines_pru;
}
if(buildOption.cpu.match("icssg0-rtupru0"))
{
build_property.postBuildSteps = postBuildStepsRtupru0;
build_property.defines = defines_rtu;
}
if(buildOption.cpu.match("icssg0-txpru0"))
{
build_property.postBuildSteps = postBuildStepsTxpru0;
build_property.defines = defines_txpru;
}
build_property.cflags = cflags;
build_property.lflags = lflags;
build_property.readmeDoxygenPageTag = readmeDoxygenPageTag;
build_property.projecspecFileAction = "copy";
build_property.skipMakefileCcsBootimageGen = true;
return build_property;
}
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

View File

@ -4,14 +4,14 @@
<when>
<context
deviceFamily="PRU"
deviceId="AM64x_GP_EVM"
deviceId="AM243x_GP_EVM"
/>
</when>
</applicability>
<project
title="Sdfm Firmware"
name = "sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt"
title="Sdfm Firmware Multi Axis Load Share"
name = "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt"
products="com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
@ -20,7 +20,7 @@
connection="TIXDS110_Connection.xml"
toolChain="TI"
cgtVersion="2.3.3"
device="AM64x_GP_EVM"
device="AM243x_GP_EVM"
deviceCore="ICSS_G0_PRU_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
@ -38,28 +38,29 @@
-DSLICE0
-v4
-v4
-DSDFM_PRU_CORE
-o2
--display_error_number
--hardware_mac=on
-DSOC_AM64X
-DSOC_AM243X
-DSDFM_PRU_CORE
-DSDFM_LOAD_SHARE_MODE
"
linkerBuildOptions="
-i${CG_TOOL_ROOT}/lib
-m=sdfm_firmware.${ConfigName}.map
-m=sdfm_firmware_multi_axis_load_share.${ConfigName}.map
-llibc.a
--disable_auto_rts
--define=SDFM_PRU_CORE=1
--warn_sections
--entry_point=SDFM_ENTRY
--zero_init=off
--disable_auto_rts
--define=SDFM_LOAD_SHARE_MODE=1
"
postBuildStep="
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h;
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_pru_bin.h;
"
description="A Sdfm Firmware FW project">
description="A Sdfm Firmware Multi Axis Load Share FW project">
<configuration name="Release"
compilerBuildOptions="
@ -76,11 +77,11 @@
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../sdfm.asm" openOnCreation="false" excludeFromBuild="false" action="copy">
<file path="../../../../sdfm.asm" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../icssg_pru.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
<file path="../../../../icssg_pru.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am64x/SDFM_DESIGN.html"
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/SDFM_DESIGN.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
</project>

View File

@ -0,0 +1,117 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Required input arguments:
# MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} sdk_dir_path
# CCS_INSTALL_DIR=${CCS_INSTALL_DIR} ccs_dir_path
# CCS_PROJECT_DEBUG=${CWD} project_debug_dir_path
SHELL = cmd.exe
CCS_PATH?=$(CCS_INSTALL_DIR)/ccs_base/pru/include
CG_TOOL_ROOT := C:/ti/ti-cgt-pru_2.3.3
SYSCFG_DIR := $(CCS_PROJECT_DEBUG)/syscfg
GEN_OPTS__FLAG :=
GEN_CMDS__FLAG :=
ORDERED_OBJS += \
"./main.obj" \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt/linker.cmd" \
$(GEN_CMDS__FLAG) \
-llibc.a \
-include ../makefile.init
RM := DEL /F
RMDIR := RMDIR /S/Q
# Every subdirectory with source files must be described here
SUBDIRS := \
. \
# Add inputs and outputs from these tool invocations to the build variables
CMD_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-pru0_fw/ti-pru-cgt/linker.cmd \
ASM_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm
OBJS += \
./main.obj
ASM_DEPS += \
./main.d
OBJS__QUOTED += \
"main.obj"
ASM_DEPS__QUOTED += \
"main.d"
ASM_SRCS__QUOTED += \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm"
# Each subdirectory must supply rules for building sources it contributes
main.obj: ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
@echo 'Building file: "$<"'
@echo 'Invoking: PRU Compiler'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DPRU0 -DSLICE0 -v4 -v4 -o2 --display_error_number --hardware_mac=on --define=SOC_AM243X --define=SDFM_PRU_CORE --define=SDFM_LOAD_SHARE_MODE --include_path="$(CCS_PATH)" --include_path="$(SYSCFG_DIR)" --include_path="${CG_TOOL_ROOT}/include" --include_path="${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware" --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: "$<"'
@echo ' '
LIBS := -llibc.a
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
EXE_OUTPUTS += \
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out \
EXE_OUTPUTS__QUOTED += \
"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out" \
BIN_OUTPUTS += \
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.hex \
BIN_OUTPUTS__QUOTED += \
"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.hex" \
# All Target
all: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@$(MAKE) --no-print-directory -Onone "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out"
# Tool invocations
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@echo 'Building target: "$@"'
@echo 'Invoking: PRU Linker'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DPRU0 -DSLICE0 -v4 -v4 -o2 --display_error_number --hardware_mac=on --define=SOC_AM243X --define=SDFM_PRU_CORE --define=SDFM_LOAD_SHARE_MODE --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little -z -m"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.map" -i"$(CG_TOOL_ROOT)/lib" --diag_wrap=off --display_error_number --warn_sections --xml_link_info="sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_linkInfo.xml" --rom_model -o "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out" $(ORDERED_OBJS)
@echo 'Finished building target: "$@"'
@echo ' '
@$(MAKE) --no-print-directory post-build
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.hex: $(EXE_OUTPUTS)
@echo 'Building secondary target: "$@"'
@echo 'Invoking: PRU Hex Utility'
"$(CG_TOOL_ROOT)/bin/hexpru" -o "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.hex" $(EXE_OUTPUTS__QUOTED)
@echo 'Finished building secondary target: "$@"'
@echo ' '
@$(MAKE) --no-print-directory post-build
# Other Targets
clean:
-$(RM) $(BIN_OUTPUTS__QUOTED)$(EXE_OUTPUTS__QUOTED)
-$(RM) "main.obj"
-$(RM) "main.d"
-@echo 'Finished clean'
-@echo ' '
post-build:
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_pru_bin.h
-@echo ' '
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets

View File

@ -2,12 +2,12 @@
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../..)
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt
PROJECT_NAME=sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-pru0_fw_ti-pru-cgt
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)

View File

@ -0,0 +1,88 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="PRU"
deviceId="AM243x_GP_EVM"
/>
</when>
</applicability>
<project
title="Sdfm Firmware Multi Axis Load Share"
name = "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt"
products="com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
Debug,
"
connection="TIXDS110_Connection.xml"
toolChain="TI"
cgtVersion="2.3.3"
device="AM243x_GP_EVM"
deviceCore="ICSS_G0_RTU_PRU_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware
-DICSSG0
-DPRU0
-DSLICE0
-v4
-v4
-o2
--display_error_number
--hardware_mac=on
-DSOC_AM243X
-DSDFM_RTU_CORE
-DSDFM_LOAD_SHARE_MODE
"
linkerBuildOptions="
-i${CG_TOOL_ROOT}/lib
-m=sdfm_firmware_multi_axis_load_share.${ConfigName}.map
-llibc.a
--warn_sections
--entry_point=SDFM_ENTRY
--zero_init=off
--disable_auto_rts
--define=SDFM_LOAD_SHARE_MODE=1
"
postBuildStep="
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_RTU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_rtu_bin.h;
"
description="A Sdfm Firmware Multi Axis Load Share FW project">
<configuration name="Release"
compilerBuildOptions="
-O3
"
linkerBuildOptions="
"
></configuration>
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../../sdfm.asm" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../../icssg_pru.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/SDFM_DESIGN.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
</project>
</projectSpec>

View File

@ -0,0 +1,117 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Required input arguments:
# MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} sdk_dir_path
# CCS_INSTALL_DIR=${CCS_INSTALL_DIR} ccs_dir_path
# CCS_PROJECT_DEBUG=${CWD} project_debug_dir_path
SHELL = cmd.exe
CCS_PATH?=$(CCS_INSTALL_DIR)/ccs_base/pru/include
CG_TOOL_ROOT := C:/ti/ti-cgt-pru_2.3.3
SYSCFG_DIR := $(CCS_PROJECT_DEBUG)/syscfg
GEN_OPTS__FLAG :=
GEN_CMDS__FLAG :=
ORDERED_OBJS += \
"./main.obj" \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt/linker.cmd" \
$(GEN_CMDS__FLAG) \
-llibc.a \
-include ../makefile.init
RM := DEL /F
RMDIR := RMDIR /S/Q
# Every subdirectory with source files must be described here
SUBDIRS := \
. \
# Add inputs and outputs from these tool invocations to the build variables
CMD_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-rtupru0_fw/ti-pru-cgt/linker.cmd \
ASM_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm
OBJS += \
./main.obj
ASM_DEPS += \
./main.d
OBJS__QUOTED += \
"main.obj"
ASM_DEPS__QUOTED += \
"main.d"
ASM_SRCS__QUOTED += \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm"
# Each subdirectory must supply rules for building sources it contributes
main.obj: ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
@echo 'Building file: "$<"'
@echo 'Invoking: PRU Compiler'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DPRU0 -DSLICE0 -v4 -v4 -o2 --display_error_number --hardware_mac=on --define=SOC_AM243X --define=SDFM_RTU_CORE --define=SDFM_LOAD_SHARE_MODE --include_path="$(CCS_PATH)" --include_path="$(SYSCFG_DIR)" --include_path="${CG_TOOL_ROOT}/include" --include_path="${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware" --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: "$<"'
@echo ' '
LIBS := -llibc.a
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
EXE_OUTPUTS += \
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out \
EXE_OUTPUTS__QUOTED += \
"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out" \
BIN_OUTPUTS += \
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.hex \
BIN_OUTPUTS__QUOTED += \
"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.hex" \
# All Target
all: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@$(MAKE) --no-print-directory -Onone "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out"
# Tool invocations
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@echo 'Building target: "$@"'
@echo 'Invoking: PRU Linker'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DPRU0 -DSLICE0 -v4 -v4 -o2 --display_error_number --hardware_mac=on --define=SOC_AM243X --define=SDFM_RTU_CORE --define=SDFM_LOAD_SHARE_MODE --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little -z -m"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.map" -i"$(CG_TOOL_ROOT)/lib" --diag_wrap=off --display_error_number --warn_sections --xml_link_info="sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt_linkInfo.xml" --rom_model -o "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out" $(ORDERED_OBJS)
@echo 'Finished building target: "$@"'
@echo ' '
@$(MAKE) --no-print-directory post-build
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.hex: $(EXE_OUTPUTS)
@echo 'Building secondary target: "$@"'
@echo 'Invoking: PRU Hex Utility'
"$(CG_TOOL_ROOT)/bin/hexpru" -o "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.hex" $(EXE_OUTPUTS__QUOTED)
@echo 'Finished building secondary target: "$@"'
@echo ' '
@$(MAKE) --no-print-directory post-build
# Other Targets
clean:
-$(RM) $(BIN_OUTPUTS__QUOTED)$(EXE_OUTPUTS__QUOTED)
-$(RM) "main.obj"
-$(RM) "main.d"
-@echo 'Finished clean'
-@echo ' '
post-build:
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_RTU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_rtu_bin.h
-@echo ' '
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets

View File

@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-rtupru0_fw_ti-pru-cgt
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

View File

@ -0,0 +1,90 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectSpec>
<applicability>
<when>
<context
deviceFamily="PRU"
deviceId="AM243x_GP_EVM"
/>
</when>
</applicability>
<project
title="Sdfm Firmware Multi Axis Load Share"
name = "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt"
products="com.ti.MOTOR_CONTROL_SDK_AMXXX;"
configurations="
Release,
Debug,
"
connection="TIXDS110_Connection.xml"
toolChain="TI"
cgtVersion="2.3.3"
device="AM243x_GP_EVM"
deviceCore="ICSS_G0_TX_PRU_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
endianness="little"
outputFormat="ELF"
outputType="executable"
compilerBuildOptions="
-I${CG_TOOL_ROOT}/include
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source
-I${MOTOR_CONTROL_SDK_PATH}/source
-I${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware
-DICSSG0
-DTX_PRU0
-DSLICE0
-DPRU0
-DSLICE0
-v4
-v4
-o2
--display_error_number
--hardware_mac=on
-DSOC_AM243X
-DSDFM_TXPRU_CORE
-DSDFM_LOAD_SHARE_MODE
"
linkerBuildOptions="
-i${CG_TOOL_ROOT}/lib
-m=sdfm_firmware_multi_axis_load_share.${ConfigName}.map
-llibc.a
--warn_sections
--entry_point=SDFM_ENTRY
--zero_init=off
--disable_auto_rts
--define=SDFM_LOAD_SHARE_MODE=1
"
postBuildStep="
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_TXPRU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_txpru_bin.h;
"
description="A Sdfm Firmware Multi Axis Load Share FW project">
<configuration name="Release"
compilerBuildOptions="
-O3
"
linkerBuildOptions="
"
></configuration>
<configuration name="Debug"
compilerBuildOptions="
-D_DEBUG_=1
"
linkerBuildOptions="
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../../sdfm.asm" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../../icssg_pru.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/SDFM_DESIGN.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">
</file>
</project>
</projectSpec>

View File

@ -0,0 +1,117 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Required input arguments:
# MOTOR_CONTROL_SDK_PATH=${MOTOR_CONTROL_SDK_PATH} sdk_dir_path
# CCS_INSTALL_DIR=${CCS_INSTALL_DIR} ccs_dir_path
# CCS_PROJECT_DEBUG=${CWD} project_debug_dir_path
SHELL = cmd.exe
CCS_PATH?=$(CCS_INSTALL_DIR)/ccs_base/pru/include
CG_TOOL_ROOT := C:/ti/ti-cgt-pru_2.3.3
SYSCFG_DIR := $(CCS_PROJECT_DEBUG)/syscfg
GEN_OPTS__FLAG :=
GEN_CMDS__FLAG :=
ORDERED_OBJS += \
"./main.obj" \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt/linker.cmd" \
$(GEN_CMDS__FLAG) \
-llibc.a \
-include ../makefile.init
RM := DEL /F
RMDIR := RMDIR /S/Q
# Every subdirectory with source files must be described here
SUBDIRS := \
. \
# Add inputs and outputs from these tool invocations to the build variables
CMD_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/am243x-evm/icssg0-txpru0_fw/ti-pru-cgt/linker.cmd \
ASM_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm
OBJS += \
./main.obj
ASM_DEPS += \
./main.d
OBJS__QUOTED += \
"main.obj"
ASM_DEPS__QUOTED += \
"main.d"
ASM_SRCS__QUOTED += \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm"
# Each subdirectory must supply rules for building sources it contributes
main.obj: ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/multi_axis_load_share/main.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
@echo 'Building file: "$<"'
@echo 'Invoking: PRU Compiler'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DTX_PRU0 -DSLICE0 -DPRU0 -DSLICE0 -v4 -v4 -o2 --display_error_number --hardware_mac=on --define=SOC_AM243X --define=SDFM_TXPRU_CORE --define=SDFM_LOAD_SHARE_MODE --include_path="$(CCS_PATH)" --include_path="$(SYSCFG_DIR)" --include_path="${CG_TOOL_ROOT}/include" --include_path="${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware" --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: "$<"'
@echo ' '
LIBS := -llibc.a
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
EXE_OUTPUTS += \
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.out \
EXE_OUTPUTS__QUOTED += \
"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.out" \
BIN_OUTPUTS += \
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.hex \
BIN_OUTPUTS__QUOTED += \
"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.hex" \
# All Target
all: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@$(MAKE) --no-print-directory -Onone "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.out"
# Tool invocations
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@echo 'Building target: "$@"'
@echo 'Invoking: PRU Linker'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DTX_PRU0 -DSLICE0 -DPRU0 -DSLICE0 -v4 -v4 -o2 --display_error_number --hardware_mac=on --define=SOC_AM243X --define=SDFM_TXPRU_CORE --define=SDFM_LOAD_SHARE_MODE --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little -z -m"sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.map" -i"$(CG_TOOL_ROOT)/lib" --diag_wrap=off --display_error_number --warn_sections --xml_link_info="sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt_linkInfo.xml" --rom_model -o "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.out" $(ORDERED_OBJS)
@echo 'Finished building target: "$@"'
@echo ' '
@$(MAKE) --no-print-directory post-build
sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.hex: $(EXE_OUTPUTS)
@echo 'Building secondary target: "$@"'
@echo 'Invoking: PRU Hex Utility'
"$(CG_TOOL_ROOT)/bin/hexpru" -o "sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.hex" $(EXE_OUTPUTS__QUOTED)
@echo 'Finished building secondary target: "$@"'
@echo ' '
@$(MAKE) --no-print-directory post-build
# Other Targets
clean:
-$(RM) $(BIN_OUTPUTS__QUOTED)$(EXE_OUTPUTS__QUOTED)
-$(RM) "main.obj"
-$(RM) "main.d"
-@echo 'Finished clean'
-@echo ' '
post-build:
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_TXPRU0_image -o sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.h sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.out; move sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_txpru_bin.h
-@echo ' '
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets

View File

@ -0,0 +1,20 @@
#
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release
PROJECT_NAME=sdfm_firmware_multi_axis_load_share_am243x-evm_icssg0-txpru0_fw_ti-pru-cgt
all:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE)
clean:
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean
export:
$(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects
$(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full

File diff suppressed because it is too large Load Diff

View File

@ -32,7 +32,7 @@
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
.if !$defined("__sdfm_h")
.if !$defined("__sdfm_h")
__sdfm_h .set 1
;
@ -151,7 +151,19 @@ ICSSG_CFG_GPCFG1 .set 0x000C ; GP IO Configuration Register 1
ICSSG_CFG_SPPC .set 0x0034 ; Scratch PAD priority and config
ICSSG_CFG_PRU0_SD0_CLK .set 0x48
ICSSG_CFG_PRU1_SD0_CLK .set 0x94
ICSSG_CFG_PWM0 .set 0x130 ; PWM0 configuration register offset
.if $isdefed("SDFM_LOAD_SHARE_MODE")
.if $isdefed("SDFM_RTU_CORE")
ICSSG_CFG_PWMx .set 0x130 ; PWM0 configuration register offset
.elseif $isdefed("SDFM_PRU_CORE")
ICSSG_CFG_PWMx .set 0x134 ; PWM1 configuration register offset
.elseif $isdefed("SDFM_TXPRU_CORE")
ICSSG_CFG_PWMx .set 0x138 ; PWM2 configuration register offset
.endif ; SDFM_TXPRU_CORE
.else
ICSSG_CFG_PWMx .set 0x130 ; PWM0 configuration register offset
.endif ;SDFM_LOAD_SHARE_MODE
;
; ICSSG_GPCFGn_REG:PR1_PRUn_GP_MUX_SEL, Controls the icss_wrap mux sel
@ -279,4 +291,27 @@ TM_YIELD_XID .set 252
;IEP_CFG
IEP_DEFAULT_INC .set 0x1
.endif ; __sdfm_h
;SD_CH_ID
.if $isdefed("SDFM_LOAD_SHARE_MODE")
.if $isdefed("SDFM_RTU_CORE")
; Load Sharing: RTUn
SD_CH0 .set 0000b
SD_CH1 .set 0001b
SD_CH2 .set 0010b
.elseif $isdefed("SDFM_PRU_CORE")
; Load Sharing: PRUn
SD_CH0 .set 0011b
SD_CH1 .set 0100b
SD_CH2 .set 0101b
.elseif $isdefed("SDFM_TXPRU_CORE")
SD_CH0 .set 00110b
SD_CH1 .set 0111b
SD_CH2 .set 1000b
.endif
.else
SD_CH0 .set 0000b
SD_CH1 .set 0001b
SD_CH2 .set 0010b
.endif
.endif ; __sdfm_h

View File

@ -1,10 +1,11 @@
const uint32_t pru_SDFM_PRU0_image_0[] = {
const uint32_t SDFM_PRU0_image_0[] = {
0x2effbd80,
0x240000f7,
0x240000c1,
0x24020981,
0x240100c2,
0x24000082,
0x81fc7881,
0xe1fc7781,
0x32000000,
0x240fff81,
0x81000a81,
@ -16,36 +17,34 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x10000000,
0x91171801,
0xc9000104,
0x2301b899,
0x2301c999,
0x1d00e1e1,
0x81171801,
0x91171801,
0xd70001fa,
0x91001801,
0xcf0001fd,
0xf1001701,
0xcf0001ff,
0x1f00e1e1,
0x81011801,
0xe1011701,
0x91340401,
0x1f01e1e1,
0x81340401,
0x23010b99,
0x23011c99,
0x32800000,
0x23011299,
0x23012399,
0x240c00c2,
0x24000082,
0x91021801,
0xf1021701,
0x51010103,
0x81082482,
0x79000002,
0x810c2482,
0x91021801,
0xf1021701,
0x51010104,
0x240002d8,
0x24604898,
0x79000003,
0x240002d8,
0x24609498,
0x91103881,
0xf1103781,
0x110fe1e2,
0x10020216,
0x0b04e1e1,
@ -54,29 +53,29 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x0b04e1e1,
0x110fe1e2,
0x10020256,
0x23012c99,
0x23024d99,
0x23013099,
0x23016099,
0x2301a599,
0x23013d99,
0x23025e99,
0x23014199,
0x23017199,
0x2301b699,
0x1f19fefe,
0x2301ae99,
0x2301bf99,
0x240fffd5,
0x24ffff95,
0x240000d4,
0x24020094,
0x24010494,
0x2400001c,
0x91ea187c,
0x91e81801,
0xf1ea177c,
0xf1e81701,
0x09010101,
0x12017c7c,
0x2400003c,
0x91001a01,
0x1f00e1e1,
0x81001a01,
0x9114189a,
0xf114179a,
0xd1009a02,
0x21004a00,
0x21004c00,
0xc9019a26,
0x10161602,
0x09020202,
@ -94,26 +93,26 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x10e7e7eb,
0x10f5e8e8,
0x10e8e8e3,
0x91203893,
0x9124389b,
0xf1203793,
0xf124379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0x9140389d,
0x913c3884,
0xf140379d,
0xf13c3784,
0xe1003d84,
0x7f0000fb,
0x9144389d,
0x913c3884,
0xf144379d,
0xf13c3784,
0xe1003d84,
0x7f0000f7,
0x9150389d,
0x91483884,
0xf150379d,
0xf1483784,
0xe1003d84,
0x79000004,
0x914c389d,
0x91483884,
0xf14c379d,
0xf1483784,
0xe1003d84,
0xc9029a26,
0x10363602,
@ -132,26 +131,26 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x10e7e7ee,
0x10f5e8e8,
0x10e8e8e3,
0x91643893,
0x9168389b,
0xf1643793,
0xf168379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0x9184389d,
0x91803884,
0xf184379d,
0xf1803784,
0xe1003d84,
0x7f0000fb,
0x9188389d,
0x91803884,
0xf188379d,
0xf1803784,
0xe1003d84,
0x7f0000f7,
0x9194389d,
0x918c3884,
0xf194379d,
0xf18c3784,
0xe1003d84,
0x79000004,
0x9190389d,
0x918c3884,
0xf190379d,
0xf18c3784,
0xe1003d84,
0xc9039a26,
0x10565682,
@ -170,26 +169,26 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x10e7e7f1,
0x10f5e8e8,
0x10e8e8e3,
0x91a83893,
0x91ac389b,
0xf1a83793,
0xf1ac379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0x91c8389d,
0x91c43884,
0xf1c8379d,
0xf1c43784,
0xe1003d84,
0x7f0000fb,
0x91cc389d,
0x91c43884,
0xf1cc379d,
0xf1c43784,
0xe1003d84,
0x7f0000f7,
0x91d8389d,
0x91d03884,
0xf1d8379d,
0xf1d03784,
0xe1003d84,
0x79000004,
0x91d4389d,
0x91d03884,
0xf1d4379d,
0xf1d03784,
0xe1003d84,
0x7f00008e,
0x24000000,
@ -221,7 +220,8 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x0ce7ebe8,
0x10e7e7eb,
0x10f5e8e8,
0xe1003488,
0x0100f4e1,
0xe0e13788,
0x10e2e2e5,
0x0ce5ece6,
0x10e5e5ec,
@ -230,7 +230,8 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x0ce7eee8,
0x10e7e7ee,
0x10f5e8e8,
0xe1043488,
0x0104f4e1,
0xe0e13788,
0x10e3e3e5,
0x0ce5efe6,
0x10e5e5ef,
@ -239,21 +240,22 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x0ce7f1e8,
0x10e7e7f1,
0x10f5e8e8,
0xe1083488,
0x0108f4e1,
0xe0e13788,
0xc9017c0c,
0x91f43881,
0xf1f43781,
0x91983a82,
0x00e1e2e1,
0x240000e2,
0x91083882,
0xf1083782,
0x58e2e103,
0x81983a81,
0x2100f400,
0x2100fe00,
0x04e2e1e1,
0x81983a81,
0x21010700,
0x21011100,
0x59031c07,
0x91f43881,
0xf1f43781,
0x91983a82,
0x00e1e2e1,
0x81983a81,
@ -261,20 +263,20 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x79000011,
0xd1003c07,
0xc9007c06,
0x91f03881,
0xf1f03781,
0x0501e1e1,
0x81983a81,
0x2400013c,
0x79000005,
0x91ec3881,
0xf1ec3781,
0x0501e1e1,
0x81983a81,
0x2400003c,
0x2400001c,
0xf100b484,
0x91f83881,
0xf0f4b784,
0xf1f83781,
0xe100a184,
0x2400229f,
0x2400259f,
0x24000000,
0x2f852381,
0x1012127e,
@ -283,7 +285,7 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x10000000,
0x24000b01,
0x81000a01,
0x2400be81,
0x2400c081,
0x810c0a81,
0x24140081,
0x81380a81,
@ -305,7 +307,7 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x81080801,
0x240000e1,
0x819c3a81,
0x91ec3881,
0xf1ec3781,
0x24ffffe2,
0x10e1e2e1,
0x0501e1e1,
@ -318,43 +320,43 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x2effa381,
0x2f052381,
0x20990000,
0x91161804,
0xf1161704,
0x240000e1,
0x91103882,
0xf1103782,
0x3102002c,
0x110f0203,
0x6816030d,
0x911e1801,
0xf11e1701,
0xc9000424,
0x912c1833,
0x91301873,
0x912f1853,
0xf12c1733,
0xf1301773,
0xf12f1753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x21015b00,
0x21016c00,
0x6836030d,
0x91621801,
0xf1621701,
0xc9010417,
0x91701833,
0x91741873,
0x91731853,
0xf1701733,
0xf1741773,
0xf1731753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x21015b00,
0x21016c00,
0x6856030c,
0x91a61801,
0xf1a61701,
0xc902040a,
0x91b41833,
0x91b81873,
0x91b71853,
0xf1b41733,
0xf1b81773,
0xf1b71753,
0x10333321,
0x09037341,
0x12214121,
@ -366,67 +368,67 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0xe0e33801,
0x0b04e2e2,
0x20990000,
0x91161804,
0xf1161704,
0x240000e1,
0x91103882,
0xf1103782,
0x31020041,
0x110f0203,
0x68160314,
0x24000081,
0x91381841,
0xf1381741,
0x09024141,
0x11044101,
0x91341841,
0xf1341741,
0x09004141,
0x11034141,
0x12410101,
0x911d1841,
0xf11d1741,
0x09044141,
0x11304141,
0x12410101,
0xc900042e,
0x912e183b,
0x912d181b,
0xf12e173b,
0xf12d171b,
0x09033b21,
0x09011b41,
0x13414141,
0x2101a000,
0x2101b100,
0x68360314,
0x24000081,
0x917c1841,
0xf17c1741,
0x09024141,
0x11044101,
0x91781841,
0xf1781741,
0x09004141,
0x11034141,
0x12410101,
0x91611841,
0xf1611741,
0x09044141,
0x11304141,
0x12410101,
0xc901041a,
0x9172183b,
0x9171181b,
0xf172173b,
0xf171171b,
0x09033b21,
0x09011b41,
0x13414141,
0x2101a000,
0x2101b100,
0x68560313,
0x24000081,
0x91c01841,
0xf1c01741,
0x09024141,
0x11044101,
0x91bc1841,
0xf1bc1741,
0x09004141,
0x11034141,
0x12410101,
0x91a51841,
0xf1a51741,
0x09044141,
0x11304141,
0x12410101,
0xc9020406,
0x91b6183b,
0x91b5181b,
0xf1b6173b,
0xf1b5171b,
0x09033b21,
0x09011b41,
0x13414141,
@ -435,7 +437,7 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0xe0e33801,
0x0b04e2e2,
0x20990000,
0x91103881,
0xf1103781,
0x31020007,
0x110f0102,
0x09020202,
@ -483,53 +485,53 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0xd1005f2e,
0x01018282,
0x1b01e3e3,
0x21020200,
0x21021300,
0x01028282,
0x1b02e3e3,
0x21020200,
0x21021300,
0x01038282,
0x1b03e3e3,
0x21020200,
0x21021300,
0x01048282,
0x1b04e3e3,
0x21020200,
0x21021300,
0x01058282,
0x1b05e3e3,
0x21020200,
0x21021300,
0x01068282,
0x1b06e3e3,
0x21020200,
0x21021300,
0x01078282,
0x1b07e3e3,
0x21020200,
0x21021300,
0x01088282,
0x1b08e3e3,
0x21020200,
0x21021300,
0x01098282,
0x1b09e3e3,
0x21020200,
0x21021300,
0x010a8282,
0x1b0ae3e3,
0x21020200,
0x21021300,
0x010b8282,
0x1b0be3e3,
0x21020200,
0x21021300,
0x010c8282,
0x1b0ce3e3,
0x21020200,
0x21021300,
0x010d8282,
0x1b0de3e3,
0x21020200,
0x21021300,
0x010e8282,
0x1b0ee3e3,
0x21020200,
0x21021300,
0x010f8282,
0x1b0fe3e3,
0x21020200,
0x21021300,
0x01108282,
0x1b10e3e3,
0x24000042,
0x21024800,
0x21025900,
0x240000e2,
0x31070043,
0xd1011f00,
@ -552,49 +554,49 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0xc9005f2e,
0x01018282,
0x1b01e3e3,
0x21024700,
0x21025800,
0x01028282,
0x1b02e3e3,
0x21024700,
0x21025800,
0x01038282,
0x1b03e3e3,
0x21024700,
0x21025800,
0x01048282,
0x1b04e3e3,
0x21024700,
0x21025800,
0x01058282,
0x1b05e3e3,
0x21024700,
0x21025800,
0x01068282,
0x1b06e3e3,
0x21024700,
0x21025800,
0x01078282,
0x1b07e3e3,
0x21024700,
0x21025800,
0x01088282,
0x1b08e3e3,
0x21024700,
0x21025800,
0x01098282,
0x1b09e3e3,
0x21024700,
0x21025800,
0x010a8282,
0x1b0ae3e3,
0x21024700,
0x21025800,
0x010b8282,
0x1b0be3e3,
0x21024700,
0x21025800,
0x010c8282,
0x1b0ce3e3,
0x21024700,
0x21025800,
0x010d8282,
0x1b0de3e3,
0x21024700,
0x21025800,
0x010e8282,
0x1b0ee3e3,
0x21024700,
0x21025800,
0x010f8282,
0x1b0fe3e3,
0x21024700,
0x21025800,
0x01108282,
0x1b10e3e3,
0x24000142,
@ -606,7 +608,7 @@ const uint32_t pru_SDFM_PRU0_image_0[] = {
0x240280c1,
0x24000081,
0x81282381,
0x910c1881,
0xf10c1781,
0x050101e2,
0x81082382,
0x010101e2,

View File

@ -1,6 +1,3 @@
;
; sdfm_macros.h
;
; Copyright (c) 2023, Texas Instruments Incorporated
; All rights reserved.
;
@ -31,88 +28,158 @@
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
.if !$defined("__sdfm_macros_h")
; file: sdfm_macros.h
;
;
.if !$defined("__sdfm_macros_h")
__sdfm_macros_h .set 1
.include "sdfm.h"
.include "sdfm.h"
;************************************************************************************
;
; Macros
; Macro: M_WRITE_C24_BLK_INDEX
;
; Write C24 block index for local PRU DMEM
;
; PEAK cycles:
; 3 cycles
; Pseudo code:
; ICSSG_PRU_CTBIR0[0-7] = blk_index;
;
; Parameters:
; blk_ind : local DMEM base address for pru constant entry 24 block index
;
; Returns:
; None
;
;************************************************************************************
M_WRITE_C24_BLK_INDEX .macro blk_index
; Set DMEM (C24) block offset
LDI TEMP_REG0.b0, blk_index
SBCO &TEMP_REG0.b0, CT_PRU_ICSSG_CTRL, PRUx_CNTLSELF_CONST_IDX0_REG, 1
; delay for update to land?
NOP
.endm
WRITE_C24_BLK_INDEX .macro blk_index
; Set DMEM (C24) block offset
LDI TEMP_REG0.b0, blk_index
SBCO &TEMP_REG0.b0, CT_PRU_ICSSG_CTRL, PRUx_CNTLSELF_CONST_IDX0_REG, 1
NOP ; delay for update to land?
.endm
; Set SD HW registers base pointer
SET_SD_HW_REG_BASE_PTR .macro base_ptr
; Load TR0.b0 <- FW_REG_SDFM_CTRL
LBCO &TEMP_REG0.b0, CT_PRU_ICSSG_LOC_DMEM, SDFM_PRU_ID_OFFSET, SDFM_PRU_ID_SZ
; Check PRU ID 0 or 1
QBEQ pru_id1?, TEMP_REG0.b0, 1
;************************************************************************************
;
; Macro: M_SET_SD_HW_REG_BASE_PTR
;
; Set SD HW registers base pointer
;
; PEAK cycles:
; 5 cycles
;
; Pseudo code:
; (start code)
; if(slice_id==0)
; {
; base_ptr = PRUx_CFG_BASE + 0x48;
; }
; else
; {
; base_ptr = PRUx_CFG_BASE + 0x94;
; }
; (endcode)
; Parameters:
; base_ptr : R24
;
; Returns:
; None
;
;************************************************************************************
M_SET_SD_HW_REG_BASE_PTR .macro base_ptr
;load PRU slice number
LBBO &TEMP_REG0.b0, SDFM_CFG_BASE_PTR_REG, SDFM_PRU_ID_OFFSET, SDFM_PRU_ID_SZ
; Check slice ID 0 or 1
QBEQ pru_id1?, TEMP_REG0.b0, 1
pru_id0?:
LDI32 base_ptr, PRUx_CFG_BASE+ICSSG_CFG_PRU0_SD0_CLK
QBA set_sd_hw_reg_base_ptr_end?
LDI32 base_ptr, PRUx_CFG_BASE+ICSSG_CFG_PRU0_SD0_CLK
QBA set_sd_hw_reg_base_ptr_end?
pru_id1?:
LDI32 base_ptr, PRUx_CFG_BASE+ICSSG_CFG_PRU1_SD0_CLK
LDI32 base_ptr, PRUx_CFG_BASE+ICSSG_CFG_PRU1_SD0_CLK
set_sd_hw_reg_base_ptr_end?:
.endm
.endm
; Configure Triggered mode sample count
;CFG_TRIG_MODE_SAMP_CNT .macro samp_cnt
; Load samp_cnt <- SDFM_CFG_TRIG_SAMPLE_CNT
; LBCO &samp_cnt, CT_PRU_ICSSG_LOC_DMEM, FW_REG_SDFM_CFG_TRIG_SAMPLE_CNT, FW_REG_SDFM_CFG_TRIG_SAMPLE_CNT_SZ
; .endm
; Wait until shadow flag of the channel is set & clear the flag
; args - ch_idx : SD channel index {0...ICSSG_NUM_SD_CH-1}
;; updates - TEMP_REG0.w2 : channel sample buffer offset
;************************************************************************************
; Macro: M_ACC3_PROCESS
;
M_WAIT_SHADOW_FLAG_AND_CLR .macro ch_idx
; Place ch_idx in R30[29-26], channel_select
LSL TEMP_REG1.b0, ch_idx, 2
SET TEMP_REG1.b0.t1
MOV R30.b3, TEMP_REG1.b0
NOP
wait_for_shadow_update_cont?:
; R31[24], shadow_update_flag for ICSS
; R31[28], shadow_update_flag for ICSSG
QBBC wait_for_shadow_update_cont?, R31, 28
; R31[24], shadow_update_flag_clr for ICSS/ICSSG
SET R31, R31.t24
.endm
.endif ; __sdfm_macros_h
; Calculates Sinc3 sample value from ACC3 & Sinc3 variables
; args - DN1, DN3, DN5 : Sinc3 differntiator state variables
; expects - ACC3 value in DN0, mask in MASK_REG
; uses - CN3, CN4, CN5
; result - CN5 : Output sample
; Calculates Sinc3 sample value from ACC3 & Sinc3 variables
;
; PEAK cycles:
; 7 cycles
;
; Pseudo code:
; (start code)
; cn3 = dn0 - dn1;
; dn1 = dn0;
; cn4 = cn3 - dn3;
; dn3 = cn3;
; cn5 = cn4 - dn5
; dn5 = cn4
; cn5 = cn5 & 0x0FFFFFFF
; (endcode)
; Parameters:
; DN1, DN3, DN5 : Sinc3 differntiator state variables
;
; Result:
; CN5 : Output sample
;
; Uses:
; CN3, CN4, CN5
;
;************************************************************************************
M_ACC3_PROCESS .macro DN1, DN3, DN5
RSB CN3, DN1, DN0
MOV DN1, DN0
RSB CN4, DN3, CN3
MOV DN3, CN3
RSB CN5, DN5, CN4
MOV DN5, CN4
AND CN5, CN5, MASK_REG ; apply limit
.endm
RSB CN3, DN1, DN0
MOV DN1, DN0
RSB CN4, DN3, CN3
MOV DN3, CN3
RSB CN5, DN5, CN4
MOV DN5, CN4
AND CN5, CN5, MASK_REG ; apply limit
.endm
;Enable task manager
;************************************************************************************
;
; Macro: M_PRU_TM_ENABLE
;
; Enable task manager
;
; PEAK cycles:
; 1 cycle
;
; Pseudo code:
; .word 0x32800000
; Parameters:
; None
;
; Returns:
; None
;
;************************************************************************************
M_PRU_TM_ENABLE .macro
tsen 1
.endm
;Disable task manager
;************************************************************************************
;
; Macro: M_PRU_TM_DISABLE
;
; Disable task manager
;
; PEAK cycles:
; 5 cycles
;
; Pseudo code:
; .word 0x32000000
; Parameters:
; None
;
; Returns:
; None
;
;************************************************************************************
M_PRU_TM_DISABLE .macro
tsen 0
.endm
@ -328,4 +395,6 @@ DELAY_16_PRU_CYCLE1:
MAX TEMP_REG2, TEMP_REG2, 16
DELAY_DONE1:
LDI TEMP_REG1.b2, 1 ; status of edge is 1 means falling edge
.endm
.endm
.endif ; __sdfm_macros_h

View File

@ -0,0 +1,624 @@
const uint32_t pru_SDFM_PRU0_image_0[] = {
0x2effbd80,
0x240000f7,
0x240000c1,
0x24020981,
0x240100c2,
0x24000082,
0xe1fc7781,
0x32000000,
0x240fff81,
0x81000a81,
0x2efe0060,
0x24000081,
0x81000a81,
0x24000001,
0x81200b01,
0x10000000,
0x91171801,
0xc9000104,
0x2301c999,
0x1d00e1e1,
0x81171801,
0xf1001701,
0xcf0001ff,
0x1f00e1e1,
0xe1011701,
0x91340401,
0x1f01e1e1,
0x81340401,
0x23011c99,
0x32800000,
0x23012399,
0x240c00c2,
0x24000082,
0xf1021701,
0x51010103,
0x81082482,
0x79000002,
0x810c2482,
0xf1021701,
0x51010104,
0x240002d8,
0x24604898,
0x79000003,
0x240002d8,
0x24609498,
0xf1103781,
0x110fe1e2,
0x10020216,
0x0b04e1e1,
0x110fe1e2,
0x10020236,
0x0b04e1e1,
0x110fe1e2,
0x10020256,
0x23013d99,
0x23025e99,
0x23014199,
0x23017199,
0x2301b699,
0x1f19fefe,
0x2301bf99,
0x240fffd5,
0x24ffff95,
0x240000d4,
0x24010494,
0x2400001c,
0xf1ea177c,
0xf1e81701,
0x09010101,
0x12017c7c,
0x2400003c,
0x91001a01,
0x1f00e1e1,
0x81001a01,
0xf114179a,
0xd1009a02,
0x21004c00,
0xc9019a26,
0x10161602,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xc91cff20,
0x1f18ffff,
0x10f5ffe5,
0x0ce5e9e6,
0x10e5e5e9,
0x0ce6eae7,
0x10e6e6ea,
0x0ce7ebe8,
0x10e7e7eb,
0x10f5e8e8,
0x10e8e8e3,
0xf1203793,
0xf124379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf140379d,
0xf13c3784,
0xe1003d84,
0x7f0000fb,
0xf144379d,
0xf13c3784,
0xe1003d84,
0x7f0000f7,
0xf150379d,
0xf1483784,
0xe1003d84,
0x79000004,
0xf14c379d,
0xf1483784,
0xe1003d84,
0xc9029a26,
0x10363602,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xc91cff20,
0x1f18ffff,
0x10f5ffe5,
0x0ce5ece6,
0x10e5e5ec,
0x0ce6ede7,
0x10e6e6ed,
0x0ce7eee8,
0x10e7e7ee,
0x10f5e8e8,
0x10e8e8e3,
0xf1643793,
0xf168379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf184379d,
0xf1803784,
0xe1003d84,
0x7f0000fb,
0xf188379d,
0xf1803784,
0xe1003d84,
0x7f0000f7,
0xf194379d,
0xf18c3784,
0xe1003d84,
0x79000004,
0xf190379d,
0xf18c3784,
0xe1003d84,
0xc9039a26,
0x10565682,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xcf1cffae,
0x1f18ffff,
0x10f5ffe5,
0x0ce5efe6,
0x10e5e5ef,
0x0ce6f0e7,
0x10e6e6f0,
0x0ce7f1e8,
0x10e7e7f1,
0x10f5e8e8,
0x10e8e8e3,
0xf1a83793,
0xf1ac379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf1c8379d,
0xf1c43784,
0xe1003d84,
0x7f0000fb,
0xf1cc379d,
0xf1c43784,
0xe1003d84,
0x7f0000f7,
0xf1d8379d,
0xf1d03784,
0xe1003d84,
0x79000004,
0xf1d4379d,
0xf1d03784,
0xe1003d84,
0x7f00008e,
0x24000000,
0x107e7e12,
0x2f852381,
0x24001001,
0x81741a01,
0x240e60de,
0x10000000,
0x11ffffe2,
0x11ffffe3,
0x56e2e3ff,
0x1d15fefe,
0x10000000,
0x10f5ffe5,
0x1d16fefe,
0x241240de,
0x10000000,
0x10f5ffe2,
0x1d16fefe,
0x241640de,
0x10000000,
0x10f5ffe3,
0x1d16fefe,
0x0ce5e9e6,
0x10e5e5e9,
0x0ce6eae7,
0x10e6e6ea,
0x0ce7ebe8,
0x10e7e7eb,
0x10f5e8e8,
0x0100f4e1,
0xe0e13788,
0x10e2e2e5,
0x0ce5ece6,
0x10e5e5ec,
0x0ce6ede7,
0x10e6e6ed,
0x0ce7eee8,
0x10e7e7ee,
0x10f5e8e8,
0x0104f4e1,
0xe0e13788,
0x10e3e3e5,
0x0ce5efe6,
0x10e5e5ef,
0x0ce6f0e7,
0x10e6e6f0,
0x0ce7f1e8,
0x10e7e7f1,
0x10f5e8e8,
0x0108f4e1,
0xe0e13788,
0xc9017c0c,
0xf1f43781,
0x91983a82,
0x00e1e2e1,
0x240000e2,
0xf1083782,
0x58e2e103,
0x81983a81,
0x2100fe00,
0x04e2e1e1,
0x81983a81,
0x21011100,
0x59031c07,
0xf1f43781,
0x91983a82,
0x00e1e2e1,
0x81983a81,
0x01011c1c,
0x79000011,
0xd1003c07,
0xc9007c06,
0xf1f03781,
0x0501e1e1,
0x81983a81,
0x2400013c,
0x79000005,
0xf1ec3781,
0x0501e1e1,
0x81983a81,
0x2400003c,
0x2400001c,
0xf0f4b784,
0xf1f83781,
0xe100a184,
0x2400259f,
0x24000000,
0x2f852381,
0x1012127e,
0x2efe0060,
0x10000000,
0x10000000,
0x24000b01,
0x81000a01,
0x2400c081,
0x810c0a81,
0x24140081,
0x81380a81,
0x20990000,
0x91001a01,
0x11fe0101,
0x81001a01,
0x240000e1,
0x81143a81,
0x81103a81,
0x24001001,
0x81741a01,
0x91001a01,
0x110f0101,
0x13100101,
0x81001a01,
0x91080801,
0x1f000101,
0x81080801,
0x240000e1,
0x819c3a81,
0xf1ec3781,
0x24ffffe2,
0x10e1e2e1,
0x0501e1e1,
0x81983a81,
0x91701a01,
0x1f05e1e1,
0x81701a01,
0x20990000,
0x24000000,
0x2effa381,
0x2f052381,
0x20990000,
0xf1161704,
0x240000e1,
0xf1103782,
0x3102002c,
0x110f0203,
0x6816030d,
0xf11e1701,
0xc9000424,
0xf12c1733,
0xf1301773,
0xf12f1753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x21016c00,
0x6836030d,
0xf1621701,
0xc9010417,
0xf1701733,
0xf1741773,
0xf1731753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x21016c00,
0x6856030c,
0xf1a61701,
0xc902040a,
0xf1b41733,
0xf1b81773,
0xf1b71753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x0903e3e3,
0x0104e3e3,
0xe0e33801,
0x0b04e2e2,
0x20990000,
0xf1161704,
0x240000e1,
0xf1103782,
0x31020041,
0x110f0203,
0x68160314,
0x24000081,
0xf1381741,
0x09024141,
0x11044101,
0xf1341741,
0x09004141,
0x11034141,
0x12410101,
0xf11d1741,
0x09044141,
0x11304141,
0x12410101,
0xc900042e,
0xf12e173b,
0xf12d171b,
0x09033b21,
0x09011b41,
0x13414141,
0x2101b100,
0x68360314,
0x24000081,
0xf17c1741,
0x09024141,
0x11044101,
0xf1781741,
0x09004141,
0x11034141,
0x12410101,
0xf1611741,
0x09044141,
0x11304141,
0x12410101,
0xc901041a,
0xf172173b,
0xf171171b,
0x09033b21,
0x09011b41,
0x13414141,
0x2101b100,
0x68560313,
0x24000081,
0xf1c01741,
0x09024141,
0x11044101,
0xf1bc1741,
0x09004141,
0x11034141,
0x12410101,
0xf1a51741,
0x09044141,
0x11304141,
0x12410101,
0xc9020406,
0xf1b6173b,
0xf1b5171b,
0x09033b21,
0x09011b41,
0x13414141,
0x0903e3e3,
0x0100e3e3,
0xe0e33801,
0x0b04e2e2,
0x20990000,
0xf1103781,
0x31020007,
0x110f0102,
0x09020202,
0x1f010202,
0x1002027e,
0x0b04e1e1,
0x1f17ffff,
0x20990000,
0x240134e2,
0x90e22481,
0x69001602,
0x13012121,
0x69013602,
0x13022121,
0x69025602,
0x13042121,
0x80e22481,
0x20990000,
0x240001c2,
0x24000282,
0xd1011f00,
0xc9011f00,
0x10e2ffe1,
0x240000e3,
0x50e2e146,
0x240000e2,
0x31070043,
0xd1011f00,
0xc9011f00,
0xd1005f10,
0xd1005f12,
0xd1005f14,
0xd1005f16,
0xd1005f18,
0xd1005f1a,
0xd1005f1c,
0xd1005f1e,
0xd1005f20,
0xd1005f22,
0xd1005f24,
0xd1005f26,
0xd1005f28,
0xd1005f2a,
0xd1005f2c,
0xd1005f2e,
0x01018282,
0x1b01e3e3,
0x21021300,
0x01028282,
0x1b02e3e3,
0x21021300,
0x01038282,
0x1b03e3e3,
0x21021300,
0x01048282,
0x1b04e3e3,
0x21021300,
0x01058282,
0x1b05e3e3,
0x21021300,
0x01068282,
0x1b06e3e3,
0x21021300,
0x01078282,
0x1b07e3e3,
0x21021300,
0x01088282,
0x1b08e3e3,
0x21021300,
0x01098282,
0x1b09e3e3,
0x21021300,
0x010a8282,
0x1b0ae3e3,
0x21021300,
0x010b8282,
0x1b0be3e3,
0x21021300,
0x010c8282,
0x1b0ce3e3,
0x21021300,
0x010d8282,
0x1b0de3e3,
0x21021300,
0x010e8282,
0x1b0ee3e3,
0x21021300,
0x010f8282,
0x1b0fe3e3,
0x21021300,
0x01108282,
0x1b10e3e3,
0x24000042,
0x21025900,
0x240000e2,
0x31070043,
0xd1011f00,
0xc9011f00,
0xc9005f10,
0xc9005f12,
0xc9005f14,
0xc9005f16,
0xc9005f18,
0xc9005f1a,
0xc9005f1c,
0xc9005f1e,
0xc9005f20,
0xc9005f22,
0xc9005f24,
0xc9005f26,
0xc9005f28,
0xc9005f2a,
0xc9005f2c,
0xc9005f2e,
0x01018282,
0x1b01e3e3,
0x21025800,
0x01028282,
0x1b02e3e3,
0x21025800,
0x01038282,
0x1b03e3e3,
0x21025800,
0x01048282,
0x1b04e3e3,
0x21025800,
0x01058282,
0x1b05e3e3,
0x21025800,
0x01068282,
0x1b06e3e3,
0x21025800,
0x01078282,
0x1b07e3e3,
0x21025800,
0x01088282,
0x1b08e3e3,
0x21025800,
0x01098282,
0x1b09e3e3,
0x21025800,
0x010a8282,
0x1b0ae3e3,
0x21025800,
0x010b8282,
0x1b0be3e3,
0x21025800,
0x010c8282,
0x1b0ce3e3,
0x21025800,
0x010d8282,
0x1b0de3e3,
0x21025800,
0x010e8282,
0x1b0ee3e3,
0x21025800,
0x010f8282,
0x1b0fe3e3,
0x21025800,
0x01108282,
0x1b10e3e3,
0x24000142,
0x0b0382e1,
0x04e1e3e1,
0x4f01e16e,
0x81183882,
0x20990000,
0x240280c1,
0x24000081,
0x81282381,
0xf10c1781,
0x050101e2,
0x81082382,
0x010101e2,
0x0b01e2e2,
0x810c2382,
0x240000e1,
0x81042381,
0x81002381,
0x91282381,
0x1f14e1e1,
0x81282381,
0x20990000};

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@ -0,0 +1,590 @@
const uint32_t pru_SDFM_RTU0_image_0[] = {
0x2effbd80,
0x240200f7,
0x240000c1,
0x24020981,
0x240100c2,
0x24000082,
0xe1fc7781,
0x32000000,
0x240fff81,
0x81000a81,
0x2efe0060,
0x24000081,
0x81000a81,
0x24000001,
0x81200b01,
0x10000000,
0x91171801,
0xc9000104,
0x2301a799,
0x1d00e1e1,
0x81171801,
0xf1001701,
0xcf0001ff,
0x1f00e1e1,
0xe1011701,
0x91340401,
0x1f03e1e1,
0x81340401,
0x2300fa99,
0x32800000,
0xf1021701,
0x51010104,
0x240002d8,
0x24604898,
0x79000003,
0x240002d8,
0x24609498,
0xf1103781,
0x110fe1e2,
0x10020216,
0x0b04e1e1,
0x110fe1e2,
0x10020236,
0x0b04e1e1,
0x110fe1e2,
0x10020256,
0x23011b99,
0x23011f99,
0x23014f99,
0x23019499,
0x1f19fefe,
0x23019d99,
0x240fffd5,
0x24ffff95,
0x240000d4,
0x24010494,
0x2400001c,
0xf1ea177c,
0xf1e81701,
0x09010101,
0x12017c7c,
0x2400003c,
0xf114179a,
0xd1009a02,
0x21004000,
0xc9019a26,
0x10161602,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xc91cff20,
0x1f18ffff,
0x10f5ffe5,
0x0ce5e9e6,
0x10e5e5e9,
0x0ce6eae7,
0x10e6e6ea,
0x0ce7ebe8,
0x10e7e7eb,
0x10f5e8e8,
0x10e8e8e3,
0xf1203793,
0xf124379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf140379d,
0xf13c3784,
0xe1003d84,
0x7f0000fb,
0xf144379d,
0xf13c3784,
0xe1003d84,
0x7f0000f7,
0xf150379d,
0xf1483784,
0xe1003d84,
0x79000004,
0xf14c379d,
0xf1483784,
0xe1003d84,
0xc9029a26,
0x10363602,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xc91cff20,
0x1f18ffff,
0x10f5ffe5,
0x0ce5ece6,
0x10e5e5ec,
0x0ce6ede7,
0x10e6e6ed,
0x0ce7eee8,
0x10e7e7ee,
0x10f5e8e8,
0x10e8e8e3,
0xf1643793,
0xf168379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf184379d,
0xf1803784,
0xe1003d84,
0x7f0000fb,
0xf188379d,
0xf1803784,
0xe1003d84,
0x7f0000f7,
0xf194379d,
0xf18c3784,
0xe1003d84,
0x79000004,
0xf190379d,
0xf18c3784,
0xe1003d84,
0xc9039a26,
0x10565682,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xcf1cffae,
0x1f18ffff,
0x10f5ffe5,
0x0ce5efe6,
0x10e5e5ef,
0x0ce6f0e7,
0x10e6e6f0,
0x0ce7f1e8,
0x10e7e7f1,
0x10f5e8e8,
0x10e8e8e3,
0xf1a83793,
0xf1ac379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf1c8379d,
0xf1c43784,
0xe1003d84,
0x7f0000fb,
0xf1cc379d,
0xf1c43784,
0xe1003d84,
0x7f0000f7,
0xf1d8379d,
0xf1d03784,
0xe1003d84,
0x79000004,
0xf1d4379d,
0xf1d03784,
0xe1003d84,
0x7f00008e,
0x24000000,
0x107e7e12,
0x2f852381,
0x240260de,
0x10000000,
0x11ffffe2,
0x11ffffe3,
0x56e2e3ff,
0x1d15fefe,
0x10000000,
0x10f5ffe5,
0x1d16fefe,
0x240640de,
0x10000000,
0x10f5ffe2,
0x1d16fefe,
0x240a40de,
0x10000000,
0x10f5ffe3,
0x1d16fefe,
0x0ce5e9e6,
0x10e5e5e9,
0x0ce6eae7,
0x10e6e6ea,
0x0ce7ebe8,
0x10e7e7eb,
0x10f5e8e8,
0x0100f4e1,
0xe0e13788,
0x10e2e2e5,
0x0ce5ece6,
0x10e5e5ec,
0x0ce6ede7,
0x10e6e6ed,
0x0ce7eee8,
0x10e7e7ee,
0x10f5e8e8,
0x0104f4e1,
0xe0e13788,
0x10e3e3e5,
0x0ce5efe6,
0x10e5e5ef,
0x0ce6f0e7,
0x10e6e6f0,
0x0ce7f1e8,
0x10e7e7f1,
0x10f5e8e8,
0x0108f4e1,
0xe0e13788,
0xc9017c02,
0x2100ef00,
0x59031c03,
0x01011c1c,
0x7900000b,
0xd1003c04,
0xc9007c03,
0x2400013c,
0x79000002,
0x2400003c,
0x2400001c,
0xf0f4b784,
0xf1f83781,
0xe100a184,
0x2400269f,
0x24000000,
0x2f852381,
0x1012127e,
0x2efe0060,
0x10000000,
0x10000000,
0x24000b01,
0x81000a01,
0x2400b481,
0x810c0a81,
0x24140081,
0x81380a81,
0x20990000,
0x91001a01,
0x11fe0101,
0x81001a01,
0x240000e1,
0x81143a81,
0x81103a81,
0x24001001,
0x81741a01,
0x91001a01,
0x110f0101,
0x13100101,
0x81001a01,
0x91080801,
0x1f000101,
0x81080801,
0x240000e1,
0x819c3a81,
0xf1ec3781,
0x24ffffe2,
0x10e1e2e1,
0x0501e1e1,
0x81983a81,
0x91701a01,
0x1f05e1e1,
0x81701a01,
0x20990000,
0x24000000,
0x2effa381,
0x2f052381,
0x20990000,
0xf1161704,
0x240000e1,
0xf1103782,
0x3102002c,
0x110f0203,
0x6816030d,
0xf11e1701,
0xc9000424,
0xf12c1733,
0xf1301773,
0xf12f1753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x21014a00,
0x6836030d,
0xf1621701,
0xc9010417,
0xf1701733,
0xf1741773,
0xf1731753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x21014a00,
0x6856030c,
0xf1a61701,
0xc902040a,
0xf1b41733,
0xf1b81773,
0xf1b71753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x0903e3e3,
0x0104e3e3,
0xe0e33801,
0x0b04e2e2,
0x20990000,
0xf1161704,
0x240000e1,
0xf1103782,
0x31020041,
0x110f0203,
0x68160314,
0x24000081,
0xf1381741,
0x09024141,
0x11044101,
0xf1341741,
0x09004141,
0x11034141,
0x12410101,
0xf11d1741,
0x09044141,
0x11304141,
0x12410101,
0xc900042e,
0xf12e173b,
0xf12d171b,
0x09033b21,
0x09011b41,
0x13414141,
0x21018f00,
0x68360314,
0x24000081,
0xf17c1741,
0x09024141,
0x11044101,
0xf1781741,
0x09004141,
0x11034141,
0x12410101,
0xf1611741,
0x09044141,
0x11304141,
0x12410101,
0xc901041a,
0xf172173b,
0xf171171b,
0x09033b21,
0x09011b41,
0x13414141,
0x21018f00,
0x68560313,
0x24000081,
0xf1c01741,
0x09024141,
0x11044101,
0xf1bc1741,
0x09004141,
0x11034141,
0x12410101,
0xf1a51741,
0x09044141,
0x11304141,
0x12410101,
0xc9020406,
0xf1b6173b,
0xf1b5171b,
0x09033b21,
0x09011b41,
0x13414141,
0x0903e3e3,
0x0100e3e3,
0xe0e33801,
0x0b04e2e2,
0x20990000,
0xf1103781,
0x31020007,
0x110f0102,
0x09020202,
0x1f010202,
0x1002027e,
0x0b04e1e1,
0x1f17ffff,
0x20990000,
0x240130e2,
0x90e22481,
0x69001602,
0x13012121,
0x69013602,
0x13022121,
0x69025602,
0x13042121,
0x80e22481,
0x20990000,
0x240001c2,
0x24000282,
0xd1011f00,
0xc9011f00,
0x10e2ffe1,
0x240000e3,
0x50e2e146,
0x240000e2,
0x31070043,
0xd1011f00,
0xc9011f00,
0xd1005f10,
0xd1005f12,
0xd1005f14,
0xd1005f16,
0xd1005f18,
0xd1005f1a,
0xd1005f1c,
0xd1005f1e,
0xd1005f20,
0xd1005f22,
0xd1005f24,
0xd1005f26,
0xd1005f28,
0xd1005f2a,
0xd1005f2c,
0xd1005f2e,
0x01018282,
0x1b01e3e3,
0x2101f100,
0x01028282,
0x1b02e3e3,
0x2101f100,
0x01038282,
0x1b03e3e3,
0x2101f100,
0x01048282,
0x1b04e3e3,
0x2101f100,
0x01058282,
0x1b05e3e3,
0x2101f100,
0x01068282,
0x1b06e3e3,
0x2101f100,
0x01078282,
0x1b07e3e3,
0x2101f100,
0x01088282,
0x1b08e3e3,
0x2101f100,
0x01098282,
0x1b09e3e3,
0x2101f100,
0x010a8282,
0x1b0ae3e3,
0x2101f100,
0x010b8282,
0x1b0be3e3,
0x2101f100,
0x010c8282,
0x1b0ce3e3,
0x2101f100,
0x010d8282,
0x1b0de3e3,
0x2101f100,
0x010e8282,
0x1b0ee3e3,
0x2101f100,
0x010f8282,
0x1b0fe3e3,
0x2101f100,
0x01108282,
0x1b10e3e3,
0x24000042,
0x21023700,
0x240000e2,
0x31070043,
0xd1011f00,
0xc9011f00,
0xc9005f10,
0xc9005f12,
0xc9005f14,
0xc9005f16,
0xc9005f18,
0xc9005f1a,
0xc9005f1c,
0xc9005f1e,
0xc9005f20,
0xc9005f22,
0xc9005f24,
0xc9005f26,
0xc9005f28,
0xc9005f2a,
0xc9005f2c,
0xc9005f2e,
0x01018282,
0x1b01e3e3,
0x21023600,
0x01028282,
0x1b02e3e3,
0x21023600,
0x01038282,
0x1b03e3e3,
0x21023600,
0x01048282,
0x1b04e3e3,
0x21023600,
0x01058282,
0x1b05e3e3,
0x21023600,
0x01068282,
0x1b06e3e3,
0x21023600,
0x01078282,
0x1b07e3e3,
0x21023600,
0x01088282,
0x1b08e3e3,
0x21023600,
0x01098282,
0x1b09e3e3,
0x21023600,
0x010a8282,
0x1b0ae3e3,
0x21023600,
0x010b8282,
0x1b0be3e3,
0x21023600,
0x010c8282,
0x1b0ce3e3,
0x21023600,
0x010d8282,
0x1b0de3e3,
0x21023600,
0x010e8282,
0x1b0ee3e3,
0x21023600,
0x010f8282,
0x1b0fe3e3,
0x21023600,
0x01108282,
0x1b10e3e3,
0x24000142,
0x0b0382e1,
0x04e1e3e1,
0x4f01e16e,
0x81183882,
0x20990000,
0x240280c1,
0x24000081,
0x81282381,
0xf10c1781,
0x050101e2,
0x81082382,
0x010101e2,
0x0b01e2e2,
0x810c2382,
0x240000e1,
0x81042381,
0x81002381,
0x91282381,
0x1f14e1e1,
0x81282381,
0x20990000};

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@ -0,0 +1,589 @@
const uint32_t pru_SDFM_TXPRU0_image_0[] = {
0x2effbd80,
0x240400f7,
0x240000c1,
0x24020981,
0x240100c2,
0x24000082,
0xe1fc7781,
0x32000000,
0x240fff81,
0x81001c81,
0x2efe0060,
0x24000081,
0x81001c81,
0x24000001,
0x81200b01,
0x10000000,
0x91171801,
0xc9000104,
0x2301a699,
0x1d00e1e1,
0x81171801,
0xf1001701,
0xcf0001ff,
0x1f00e1e1,
0xe1011701,
0x91340401,
0x81340401,
0x2300f999,
0x32800000,
0xf1021701,
0x51010104,
0x240002d8,
0x24604898,
0x79000003,
0x240002d8,
0x24609498,
0xf1103781,
0x110fe1e2,
0x10020216,
0x0b04e1e1,
0x110fe1e2,
0x10020236,
0x0b04e1e1,
0x110fe1e2,
0x10020256,
0x23011a99,
0x23011e99,
0x23014e99,
0x23019399,
0x1f19fefe,
0x23019c99,
0x240fffd5,
0x24ffff95,
0x240000d4,
0x24010494,
0x2400001c,
0xf1ea177c,
0xf1e81701,
0x09010101,
0x12017c7c,
0x2400003c,
0xf114179a,
0xd1009a02,
0x21003f00,
0xc9019a26,
0x10161602,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xc91cff20,
0x1f18ffff,
0x10f5ffe5,
0x0ce5e9e6,
0x10e5e5e9,
0x0ce6eae7,
0x10e6e6ea,
0x0ce7ebe8,
0x10e7e7eb,
0x10f5e8e8,
0x10e8e8e3,
0xf1203793,
0xf124379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf140379d,
0xf13c3784,
0xe1003d84,
0x7f0000fb,
0xf144379d,
0xf13c3784,
0xe1003d84,
0x7f0000f7,
0xf150379d,
0xf1483784,
0xe1003d84,
0x79000004,
0xf14c379d,
0xf1483784,
0xe1003d84,
0xc9029a26,
0x10363602,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xc91cff20,
0x1f18ffff,
0x10f5ffe5,
0x0ce5ece6,
0x10e5e5ec,
0x0ce6ede7,
0x10e6e6ed,
0x0ce7eee8,
0x10e7e7ee,
0x10f5e8e8,
0x10e8e8e3,
0xf1643793,
0xf168379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf184379d,
0xf1803784,
0xe1003d84,
0x7f0000fb,
0xf188379d,
0xf1803784,
0xe1003d84,
0x7f0000f7,
0xf194379d,
0xf18c3784,
0xe1003d84,
0x79000004,
0xf190379d,
0xf18c3784,
0xe1003d84,
0xc9039a26,
0x10565682,
0x09020202,
0x1f010202,
0x1002027e,
0x10000000,
0xcf1cffae,
0x1f18ffff,
0x10f5ffe5,
0x0ce5efe6,
0x10e5e5ef,
0x0ce6f0e7,
0x10e6e6f0,
0x0ce7f1e8,
0x10e7e7f1,
0x10f5e8e8,
0x10e8e8e3,
0xf1a83793,
0xf1ac379b,
0x70e3f304,
0x58e3f307,
0x70e3fb0a,
0x58e3fb0d,
0xf1c8379d,
0xf1c43784,
0xe1003d84,
0x7f0000fb,
0xf1cc379d,
0xf1c43784,
0xe1003d84,
0x7f0000f7,
0xf1d8379d,
0xf1d03784,
0xe1003d84,
0x79000004,
0xf1d4379d,
0xf1d03784,
0xe1003d84,
0x7f00008e,
0x24000000,
0x107e7e12,
0x2f852381,
0x241a60de,
0x10000000,
0x11ffffe2,
0x11ffffe3,
0x56e2e3ff,
0x1d15fefe,
0x10000000,
0x10f5ffe5,
0x1d16fefe,
0x241e40de,
0x10000000,
0x10f5ffe2,
0x1d16fefe,
0x242240de,
0x10000000,
0x10f5ffe3,
0x1d16fefe,
0x0ce5e9e6,
0x10e5e5e9,
0x0ce6eae7,
0x10e6e6ea,
0x0ce7ebe8,
0x10e7e7eb,
0x10f5e8e8,
0x0100f4e1,
0xe0e13788,
0x10e2e2e5,
0x0ce5ece6,
0x10e5e5ec,
0x0ce6ede7,
0x10e6e6ed,
0x0ce7eee8,
0x10e7e7ee,
0x10f5e8e8,
0x0104f4e1,
0xe0e13788,
0x10e3e3e5,
0x0ce5efe6,
0x10e5e5ef,
0x0ce6f0e7,
0x10e6e6f0,
0x0ce7f1e8,
0x10e7e7f1,
0x10f5e8e8,
0x0108f4e1,
0xe0e13788,
0xc9017c02,
0x2100ee00,
0x59031c03,
0x01011c1c,
0x7900000b,
0xd1003c04,
0xc9007c03,
0x2400013c,
0x79000002,
0x2400003c,
0x2400001c,
0xf0f4b784,
0xf1f83781,
0xe100a184,
0x2400279f,
0x24000000,
0x2f852381,
0x1012127e,
0x2efe0060,
0x10000000,
0x10000000,
0x24000b01,
0x81001c01,
0x2400b381,
0x810c1c81,
0x24140081,
0x81381c81,
0x20990000,
0x91001a01,
0x11fe0101,
0x81001a01,
0x240000e1,
0x81143a81,
0x81103a81,
0x24001001,
0x81741a01,
0x91001a01,
0x110f0101,
0x13100101,
0x81001a01,
0x91080801,
0x1f000101,
0x81080801,
0x240000e1,
0x819c3a81,
0xf1ec3781,
0x24ffffe2,
0x10e1e2e1,
0x0501e1e1,
0x81983a81,
0x91701a01,
0x1f05e1e1,
0x81701a01,
0x20990000,
0x24000000,
0x2effa381,
0x2f052381,
0x20990000,
0xf1161704,
0x240000e1,
0xf1103782,
0x3102002c,
0x110f0203,
0x6816030d,
0xf11e1701,
0xc9000424,
0xf12c1733,
0xf1301773,
0xf12f1753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x21014900,
0x6836030d,
0xf1621701,
0xc9010417,
0xf1701733,
0xf1741773,
0xf1731753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x21014900,
0x6856030c,
0xf1a61701,
0xc902040a,
0xf1b41733,
0xf1b81773,
0xf1b71753,
0x10333321,
0x09037341,
0x12214121,
0x09015341,
0x13414141,
0x13804141,
0x0903e3e3,
0x0104e3e3,
0xe0e33801,
0x0b04e2e2,
0x20990000,
0xf1161704,
0x240000e1,
0xf1103782,
0x31020041,
0x110f0203,
0x68160314,
0x24000081,
0xf1381741,
0x09024141,
0x11044101,
0xf1341741,
0x09004141,
0x11034141,
0x12410101,
0xf11d1741,
0x09044141,
0x11304141,
0x12410101,
0xc900042e,
0xf12e173b,
0xf12d171b,
0x09033b21,
0x09011b41,
0x13414141,
0x21018e00,
0x68360314,
0x24000081,
0xf17c1741,
0x09024141,
0x11044101,
0xf1781741,
0x09004141,
0x11034141,
0x12410101,
0xf1611741,
0x09044141,
0x11304141,
0x12410101,
0xc901041a,
0xf172173b,
0xf171171b,
0x09033b21,
0x09011b41,
0x13414141,
0x21018e00,
0x68560313,
0x24000081,
0xf1c01741,
0x09024141,
0x11044101,
0xf1bc1741,
0x09004141,
0x11034141,
0x12410101,
0xf1a51741,
0x09044141,
0x11304141,
0x12410101,
0xc9020406,
0xf1b6173b,
0xf1b5171b,
0x09033b21,
0x09011b41,
0x13414141,
0x0903e3e3,
0x0100e3e3,
0xe0e33801,
0x0b04e2e2,
0x20990000,
0xf1103781,
0x31020007,
0x110f0102,
0x09020202,
0x1f010202,
0x1002027e,
0x0b04e1e1,
0x1f17ffff,
0x20990000,
0x240138e2,
0x90e22481,
0x69001602,
0x13012121,
0x69013602,
0x13022121,
0x69025602,
0x13042121,
0x80e22481,
0x20990000,
0x240001c2,
0x24000282,
0xd1011f00,
0xc9011f00,
0x10e2ffe1,
0x240000e3,
0x50e2e146,
0x240000e2,
0x31070043,
0xd1011f00,
0xc9011f00,
0xd1005f10,
0xd1005f12,
0xd1005f14,
0xd1005f16,
0xd1005f18,
0xd1005f1a,
0xd1005f1c,
0xd1005f1e,
0xd1005f20,
0xd1005f22,
0xd1005f24,
0xd1005f26,
0xd1005f28,
0xd1005f2a,
0xd1005f2c,
0xd1005f2e,
0x01018282,
0x1b01e3e3,
0x2101f000,
0x01028282,
0x1b02e3e3,
0x2101f000,
0x01038282,
0x1b03e3e3,
0x2101f000,
0x01048282,
0x1b04e3e3,
0x2101f000,
0x01058282,
0x1b05e3e3,
0x2101f000,
0x01068282,
0x1b06e3e3,
0x2101f000,
0x01078282,
0x1b07e3e3,
0x2101f000,
0x01088282,
0x1b08e3e3,
0x2101f000,
0x01098282,
0x1b09e3e3,
0x2101f000,
0x010a8282,
0x1b0ae3e3,
0x2101f000,
0x010b8282,
0x1b0be3e3,
0x2101f000,
0x010c8282,
0x1b0ce3e3,
0x2101f000,
0x010d8282,
0x1b0de3e3,
0x2101f000,
0x010e8282,
0x1b0ee3e3,
0x2101f000,
0x010f8282,
0x1b0fe3e3,
0x2101f000,
0x01108282,
0x1b10e3e3,
0x24000042,
0x21023600,
0x240000e2,
0x31070043,
0xd1011f00,
0xc9011f00,
0xc9005f10,
0xc9005f12,
0xc9005f14,
0xc9005f16,
0xc9005f18,
0xc9005f1a,
0xc9005f1c,
0xc9005f1e,
0xc9005f20,
0xc9005f22,
0xc9005f24,
0xc9005f26,
0xc9005f28,
0xc9005f2a,
0xc9005f2c,
0xc9005f2e,
0x01018282,
0x1b01e3e3,
0x21023500,
0x01028282,
0x1b02e3e3,
0x21023500,
0x01038282,
0x1b03e3e3,
0x21023500,
0x01048282,
0x1b04e3e3,
0x21023500,
0x01058282,
0x1b05e3e3,
0x21023500,
0x01068282,
0x1b06e3e3,
0x21023500,
0x01078282,
0x1b07e3e3,
0x21023500,
0x01088282,
0x1b08e3e3,
0x21023500,
0x01098282,
0x1b09e3e3,
0x21023500,
0x010a8282,
0x1b0ae3e3,
0x21023500,
0x010b8282,
0x1b0be3e3,
0x21023500,
0x010c8282,
0x1b0ce3e3,
0x21023500,
0x010d8282,
0x1b0de3e3,
0x21023500,
0x010e8282,
0x1b0ee3e3,
0x21023500,
0x010f8282,
0x1b0fe3e3,
0x21023500,
0x01108282,
0x1b10e3e3,
0x24000142,
0x0b0382e1,
0x04e1e3e1,
0x4f01e16e,
0x81183882,
0x20990000,
0x240280c1,
0x24000081,
0x81282381,
0xf10c1781,
0x050101e2,
0x81082382,
0x010101e2,
0x0b01e2e2,
0x810c2382,
0x240000e1,
0x81042381,
0x81002381,
0x91282381,
0x1f14e1e1,
0x81282381,
0x20990000};

View File

@ -0,0 +1,14 @@
function getComponentProperty(device)
{
return require(`./project_${device}`).getComponentProperty();
};
function getComponentBuildProperty(buildOption)
{
return require(`./project_${buildOption.device}`).getComponentBuildProperty(buildOption);
};
module.exports = {
getComponentProperty,
getComponentBuildProperty,
};

View File

@ -12,7 +12,9 @@ const files = {
const filedirs = {
common: [
"..", /* core_os_combo base */
"../../..", /* Example base */
"../..",
"../../../..", /* Example base */
],
};
@ -53,7 +55,7 @@ const buildOptionCombos = [
let postBuildStepsPru = [
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h;"
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=SDFM_PRU0_image -o sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h;"
];

View File

@ -12,7 +12,8 @@ const files = {
const filedirs = {
common: [
"..", /* core_os_combo base */
"../../..", /* Example base */
"../..",
"../../../..", /* Example base */
],
};
@ -53,7 +54,7 @@ const buildOptionCombos = [
let postBuildStepsPru = [
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h;"
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=SDFM_PRU0_image -o sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h;"
];

View File

@ -56,7 +56,7 @@
"
postBuildStep="
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h;
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=SDFM_PRU0_image -o sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h;
"
description="A Sdfm Firmware FW project">
@ -76,9 +76,9 @@
"
></configuration>
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
<file path="../../../sdfm.asm" openOnCreation="false" excludeFromBuild="false" action="copy">
<file path="../../../../sdfm.asm" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="../../../icssg_pru.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
<file path="../../../../icssg_pru.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
</file>
<file path="${MOTOR_CONTROL_SDK_PATH}/docs/api_guide_am243x/SDFM_DESIGN.html"
openOnCreation="false" excludeFromBuild="false" targetName="README.html" action="link">

View File

@ -17,7 +17,7 @@ GEN_CMDS__FLAG :=
ORDERED_OBJS += \
"./main.obj" \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt/linker.cmd" \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt/linker.cmd" \
$(GEN_CMDS__FLAG) \
-llibc.a \
@ -32,10 +32,10 @@ SUBDIRS := \
# Add inputs and outputs from these tool invocations to the build variables
CMD_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt/linker.cmd \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/single_axis_single_pru/am243x-evm/icssg0-pru0_fw/ti-pru-cgt/linker.cmd \
ASM_SRCS += \
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/main.asm
${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/single_axis_single_pru/main.asm
OBJS += \
./main.obj
@ -50,10 +50,10 @@ ASM_DEPS__QUOTED += \
"main.d"
ASM_SRCS__QUOTED += \
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/main.asm"
"${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/single_axis_single_pru/main.asm"
# Each subdirectory must supply rules for building sources it contributes
main.obj: ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/main.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
main.obj: ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/single_axis_single_pru/main.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
@echo 'Building file: "$<"'
@echo 'Invoking: PRU Compiler'
"$(CG_TOOL_ROOT)/bin/clpru" -DICSSG0 -DPRU0 -DSLICE0 -v4 -v4 -DSDFM_PRU_CORE -o2 --display_error_number --hardware_mac=on --define=SOC_AM243X --include_path="$(CCS_PATH)" --include_path="$(SYSCFG_DIR)" --include_path="${CG_TOOL_ROOT}/include" --include_path="${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source" --include_path="${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware" --define=_DEBUG_=1 -g --diag_warning=225 --diag_wrap=off --display_error_number --endian=little --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
@ -108,7 +108,7 @@ clean:
-@echo ' '
post-build:
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=pru_SDFM_PRU0_image -o sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=SDFM_PRU0_image -o sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.out; move sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/current_sense/sdfm/firmware/sdfm_bin.h
-@echo ' '
.PHONY: all clean dependents

View File

@ -2,7 +2,7 @@
# Auto generated makefile
#
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../..)
export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../../..)
include $(MOTOR_CONTROL_SDK_PATH)/imports.mak
PROFILE?=Release

View File

@ -41,6 +41,7 @@ extern "C" {
#include <stdint.h>
#include "../firmware/icssg_sdfm.h"
#include <current_sense/sdfm/include/sdfm_drv.h>
#include <drivers/pruicss.h>
/**
* \defgroup CURRENT_SENSE_API APIs for Current Sense
@ -66,6 +67,9 @@ extern "C" {
#define PRU_ID_0 ( 0 ) /* PRU 0 ID */
#define PRU_ID_1 ( 1 ) /* PRU 1 ID */
#define PRUx_DMEM_BASE_ADD (0x00)
#define RTUx_DMEM_BASE_ADD (0x200)
#define TXPRUx_DMEM_BASE_ADD (0x400)
/* Number of SD channels */
#define NUM_SD_CH ( ICSSG_NUM_SD_CH )
/* ICSSG INTC event */
@ -83,7 +87,7 @@ typedef SDFM *sdfm_handle;
* \retval sdfm SDFM instance handle
*
*/
sdfm_handle SDFM_init(uint8_t pru_id);
sdfm_handle SDFM_init(uint8_t pru_id, uint8_t coreId);
/**
*
@ -326,41 +330,24 @@ uint32_t SDFM_getPwmTripStatus(sdfm_handle h_sdfm, uint8_t pwmIns);
*
*/
void SDFM_clearPwmTripStatus(sdfm_handle h_sdfm, uint8_t pwmIns);
/**
*
* \brief This API enbale continuous normal current sampling
* \brief This API enables continuous normal current sampling
*
* \param[in] h_sdfm SDFM handle
*
*
*/
void SDFM_enableContinuousNormalCurrent(sdfm_handle h_sdfm);
/**
*
* \brief This API enbale continuous normal current sampling
* \brief This API enables load share mode
*
* \param[in] h_sdfm SDFM handle
*
* \param[in] sliceID slice ID
*
*/
void SDFM_enableContinuousNormalCurrent(sdfm_handle h_sdfm);
/**
*
* \brief This API enbale continuous normal current sampling
*
* \param[in] h_sdfm SDFM handle
*
*
*/
void SDFM_enableContinuousNormalCurrent(sdfm_handle h_sdfm);
void SDFM_enableLoadShareMode(sdfm_handle h_sdfm, uint8_t sliceId);
/**
*
* \brief Measure Clock phase compensation

View File

@ -119,8 +119,12 @@ extern "C" {
/* SDFM output buffer size in 32-bit words */
#define ICSSG_SD_SAMP_CH_BUF_SZ ( 128 )
#define NUM_CH_SUPPORTED ( 3 )
#define ICSSG_SD_SAMP_CH_BUF_SZ ( 128 )
#define NUM_CH_SUPPORTED_PER_AXIS ( 3 )
#define SDFM_NINE_CH_MASK ( 0x1FF )
#define SDFM_CH_MASK_FOR_CH0_CH3_CH6 ( 0x49 )
#define SDFM_CH_MASK_FOR_CH1_CH4_CH7 ( 0x92 )
#define SDFM_CH_MASK_FOR_CH2_CH5_CH8 ( 0x124 )
#define SDFM_PHASE_DELAY_ACK_BIT_MASK (1)
#define SDFM_PHASE_DELAY_CAL_LOOP_SIZE (8)
@ -153,8 +157,9 @@ typedef struct SDFM_CfgSdClk_s
*/
typedef struct SDFM_CfgTrigger_s
{
/**< enable continuous mode */
volatile uint8_t en_continuous_mode;
/**< bit-field for enable double update */
/**< enable double update */
volatile uint8_t en_double_nc_sampling;
/**< First sample starting point */
volatile uint32_t first_samp_trig_time;
@ -305,7 +310,7 @@ typedef struct SDFM_Interface_s{
/**< channel control interface */
SDFM_ChCtrl sdfm_ch_ctrl;
/**< sdfm channel configuration interface pointer*/
SDFM_Cfg sdfm_cfg_ptr[NUM_CH_SUPPORTED];
SDFM_Cfg sdfm_cfg_ptr[NUM_CH_SUPPORTED_PER_AXIS];
/*<sdfm time sampling interface pointer */
SDFM_CfgTrigger sdfm_cfg_trigger;
/**< host output sample buffer base address */
@ -316,7 +321,7 @@ typedef struct SDFM_Interface_s{
typedef struct SDFM_SampleOutInterface_s
{
uint32_t sampleOutput[NUM_CH_SUPPORTED];
uint32_t sampleOutput[NUM_CH_SUPPORTED_PER_AXIS];
}SDFM_SampleOutInterface;
/**
* \brief Structure defining SDFM interface