diff --git a/.gitignore b/.gitignore index 87c1aaa..f07d620 100644 --- a/.gitignore +++ b/.gitignore @@ -54,6 +54,7 @@ source/usb/tinyusb/tinyusb-stack source/dsplib_c66x_3_4_0_0/ docs/industrial_protocol_docs mcusdk_tagfile +mcsdk_tagfile __pycache__/ source/position_sense/hdsl/firmware/*.lst source/position_sense/hdsl/firmware/*.obj @@ -66,4 +67,6 @@ source/position_sense/endat/firmware/*.b00 source/position_sense/endat/firmware/*.xml !*boardcfg_*.bin mcu_plus_sdk -ind_comms_sdk \ No newline at end of file +ind_comms_sdk +.repo/* +mcupsdk_setup \ No newline at end of file diff --git a/.metadata/.tirex/am243x.content.tirex.json b/.metadata/.tirex/am243x.content.tirex.json index 1abf736..9afa8fc 100644 --- a/.metadata/.tirex/am243x.content.tirex.json +++ b/.metadata/.tirex/am243x.content.tirex.json @@ -1,4 +1,260 @@ [ + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_GP_EVM" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_GP_EVM" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am243x-evm/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_GP_EVM" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_GP_EVM" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am243x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "project.ccs", "resourceClass": [ @@ -230,38 +486,6 @@ ] ] }, - { - "resourceType": "project.ccs", - "resourceClass": [ - "example" - ], - "resourceSubClass": [ - "example.general" - ], - "description": "A Hdsl Diagnostic Ddr Example. CPU is R5FSS0-0 running FREERTOS.", - "name": "hdsl_diagnostic_ddr", - "location": "../../examples/position_sense/hdsl_diagnostic_with_traces/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec", - "devtools": [ - "AM243x_GP_EVM" - ], - "kernel": [ - "freertos" - ], - "compiler": [ - "ticlang" - ], - "subCategories": [ - "position_sense", - "hdsl_diagnostic_with_traces", - "r5fss0-0_freertos" - ], - "mainCategories": [ - [ - "Examples", - "Development Tools" - ] - ] - }, { "resourceType": "project.ccs", "resourceClass": [ @@ -393,6 +617,38 @@ ] ] }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Icss Sdfm Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "icss_sdfm", + "location": "../../examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "current_sense", + "icss_sdfm", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "web.page", "resourceClass": [ diff --git a/.metadata/.tirex/am263x.content.tirex.json b/.metadata/.tirex/am263x.content.tirex.json index bc8b3c1..d8a821a 100644 --- a/.metadata/.tirex/am263x.content.tirex.json +++ b/.metadata/.tirex/am263x.content.tirex.json @@ -1,4 +1,260 @@ [ + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "TMDSCNCD263" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "TMDSCNCD263" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "LP-AM263" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A Direct Form 2 2nd order example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_df22", + "location": "../../examples/dcl/dcl_df22/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "LP-AM263" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_df22", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am263x-cc/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "TMDSCNCD263" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am263x-cc/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "TMDSCNCD263" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running NORTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am263x-lp/r5fss0-0_nortos/ti-arm-clang/example.projectspec", + "devtools": [ + "LP-AM263" + ], + "kernel": [ + "nortos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_nortos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.gettingstarted" + ], + "description": "A PI controller example demonstrating the digital control library (DCL). CPU is R5FSS0-0 running FREERTOS.", + "name": "dcl_pi", + "location": "../../examples/dcl/dcl_pi/am263x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "LP-AM263" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "dcl", + "dcl_pi", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "project.ccs", "resourceClass": [ @@ -39,6 +295,7 @@ "name": "User Guide", "location": "../../docs/api_guide_am263x/index.html", "devtools": [ + "TMDSCNCD263", "LP-AM263" ], "mainCategories": [ diff --git a/.metadata/.tirex/am64x.content.tirex.json b/.metadata/.tirex/am64x.content.tirex.json index dba7d00..5a0cfbd 100644 --- a/.metadata/.tirex/am64x.content.tirex.json +++ b/.metadata/.tirex/am64x.content.tirex.json @@ -164,38 +164,6 @@ ] ] }, - { - "resourceType": "project.ccs", - "resourceClass": [ - "example" - ], - "resourceSubClass": [ - "example.general" - ], - "description": "A Hdsl Diagnostic Ddr Example. CPU is R5FSS0-0 running FREERTOS.", - "name": "hdsl_diagnostic_ddr", - "location": "../../examples/position_sense/hdsl_diagnostic_with_traces/am64x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec", - "devtools": [ - "AM64x_GP_EVM" - ], - "kernel": [ - "freertos" - ], - "compiler": [ - "ticlang" - ], - "subCategories": [ - "position_sense", - "hdsl_diagnostic_with_traces", - "r5fss0-0_freertos" - ], - "mainCategories": [ - [ - "Examples", - "Development Tools" - ] - ] - }, { "resourceType": "project.ccs", "resourceClass": [ diff --git a/.metadata/.tirex/package.tirex.json b/.metadata/.tirex/package.tirex.json index 1fbbb5c..e96b9c1 100644 --- a/.metadata/.tirex/package.tirex.json +++ b/.metadata/.tirex/package.tirex.json @@ -6,7 +6,7 @@ "rootCategory": [ "MOTOR CONTROL SDK", "MOTOR CONTROL SDK for AMXXX" ], "version": "09.00.00.01", "type": "software", - "image": "./mcu_plus_sdk.png", + "image": "./motor_control_sdk.png", "license": "../../license.txt", "devices": ["AMXXX"], "tags": ["SDK", "Baremetal", "FreeRTOS"], diff --git a/.metadata/product.json b/.metadata/product.json index e06cf67..bd98a9e 100644 --- a/.metadata/product.json +++ b/.metadata/product.json @@ -12,11 +12,9 @@ "/kernel/dpl", "/drivers/drivers", "/board/board", - "/fs/fs", "/networking/networking", "/security/security", - "/usb/usb", - "/pru_io/pru_io", + "/xbar/xbar", ], "devices": [ "AM64x", diff --git a/.project/device/project_am243x.js b/.project/device/project_am243x.js index b8046be..acf00e9 100644 --- a/.project/device/project_am243x.js +++ b/.project/device/project_am243x.js @@ -14,12 +14,13 @@ const device_defines = { }; const example_file_list = [ + "examples/dcl/dcl_df22/.project/mcsdk_project.js", + "examples/dcl/dcl_pi/.project/mcsdk_project.js", "examples/position_sense/endat_diagnostic/single_channel/.project/project.js", "examples/position_sense/endat_diagnostic/multi_channel_load_share/.project/project.js", "examples/position_sense/endat_diagnostic/multi_channel_single_pru/.project/project.js", "examples/position_sense/hdsl_diagnostic/multi_channel/.project/project.js", "examples/position_sense/hdsl_diagnostic/single_channel/.project/project.js", - "examples/position_sense/hdsl_diagnostic_with_traces/.project/project.js", "examples/position_sense/tamagawa_diagnostic/multi_channel/.project/project.js", "examples/position_sense/tamagawa_diagnostic/single_channel/.project/project.js", "examples/current_sense/icss_sdfm/.project/project.js", @@ -28,9 +29,10 @@ const example_file_list = [ "source/position_sense/endat/firmware/single_channel/.project/project.js", "source/position_sense/endat/firmware/multi_channel_single_pru/.project/project.js", "source/position_sense/hdsl/firmware/freerun_225_mhz/.project/project.js", - "source/position_sense/hdsl/firmware/freerun_300_mhz/.project/project.js", "source/position_sense/hdsl/firmware/multichannel_ch0/.project/project.js", "source/position_sense/hdsl/firmware/multichannel_ch1/.project/project.js", + "source/position_sense/hdsl/firmware/multichannel_ch0_sync_mode/.project/project.js", + "source/position_sense/hdsl/firmware/multichannel_ch1_sync_mode/.project/project.js", "source/position_sense/hdsl/firmware/sync_225_mhz/.project/project.js", "source/position_sense/tamagawa/firmware/multi_channel/.project/project.js", "source/position_sense/tamagawa/firmware/single_channel/.project/project.js", diff --git a/.project/device/project_am263x.js b/.project/device/project_am263x.js index c04e672..0d39e30 100644 --- a/.project/device/project_am263x.js +++ b/.project/device/project_am263x.js @@ -11,6 +11,8 @@ const device_defines = { }; const example_file_list = [ + "examples/dcl/dcl_df22/.project/mcsdk_project.js", + "examples/dcl/dcl_pi/.project/mcsdk_project.js", "examples/position_sense/tamagawa_diagnostic_over_soc_uart/.project/project.js", ]; @@ -135,5 +137,6 @@ module.exports = { getDevToolTirex, getProperty, getLinuxFwName, + getProductNameProjectSpec, getFlashAddr, }; diff --git a/.project/device/project_am64x.js b/.project/device/project_am64x.js index a656523..e4d17ca 100644 --- a/.project/device/project_am64x.js +++ b/.project/device/project_am64x.js @@ -19,7 +19,6 @@ const example_file_list = [ "examples/position_sense/endat_diagnostic/multi_channel_single_pru/.project/project.js", "examples/position_sense/hdsl_diagnostic/multi_channel/.project/project.js", "examples/position_sense/hdsl_diagnostic/single_channel/.project/project.js", - "examples/position_sense/hdsl_diagnostic_with_traces/.project/project.js", "examples/position_sense/tamagawa_diagnostic/multi_channel/.project/project.js", "examples/position_sense/tamagawa_diagnostic/single_channel/.project/project.js", "examples/current_sense/icss_sdfm/.project/project.js", @@ -28,9 +27,10 @@ const example_file_list = [ "source/position_sense/endat/firmware/single_channel/.project/project.js", "source/position_sense/endat/firmware/multi_channel_single_pru/.project/project.js", "source/position_sense/hdsl/firmware/freerun_225_mhz/.project/project.js", - "source/position_sense/hdsl/firmware/freerun_300_mhz/.project/project.js", "source/position_sense/hdsl/firmware/multichannel_ch0/.project/project.js", "source/position_sense/hdsl/firmware/multichannel_ch1/.project/project.js", + "source/position_sense/hdsl/firmware/multichannel_ch0_sync_mode/.project/project.js", + "source/position_sense/hdsl/firmware/multichannel_ch1_sync_mode/.project/project.js", "source/position_sense/hdsl/firmware/sync_225_mhz/.project/project.js", "source/position_sense/tamagawa/firmware/multi_channel/.project/project.js", "source/position_sense/tamagawa/firmware/single_channel/.project/project.js", diff --git a/.project/templates/product.json.xdt b/.project/templates/product.json.xdt index dce432a..2c4795f 100644 --- a/.project/templates/product.json.xdt +++ b/.project/templates/product.json.xdt @@ -20,7 +20,7 @@ "../mcu_plus_sdk/source", ], "components": [ -% if((args.device == "am64x") || (args.device == "am243x") || (args.device == "am263x")) { +% if((args.device == "am64x") || (args.device == "am243x")) { "/motor_control", "/kernel/dpl", "/drivers/drivers", @@ -30,6 +30,15 @@ "/security/security", "/usb/usb", "/pru_io/pru_io", +% } +% if(args.device == "am263x") { + "/motor_control", + "/kernel/dpl", + "/drivers/drivers", + "/board/board", + "/networking/networking", + "/security/security", + "/xbar/xbar", % } ], "devices": [ diff --git a/.project/templates/projectspec_executable.xdt b/.project/templates/projectspec_executable.xdt index 798fbc0..36b150d 100644 --- a/.project/templates/projectspec_executable.xdt +++ b/.project/templates/projectspec_executable.xdt @@ -1,5 +1,5 @@ %%{ - let profile_list = ["debug", "release"]; + let profile_list = ["release", "debug"]; products = ""; if("syscfgfile" in args.project) { diff --git a/.project/templates/projectspec_system.xdt b/.project/templates/projectspec_system.xdt index 48171e2..0d0b1bc 100644 --- a/.project/templates/projectspec_system.xdt +++ b/.project/templates/projectspec_system.xdt @@ -12,8 +12,8 @@ name="`args.project.name`_`args.project.board`_system_`args.project.tag`" products="`products`" configurations=" - Debug, Release, + Debug, " connection="TIXDS110_Connection.xml" device="Cortex R.`args.device.getProjectSpecDevice(args.project.board)`" diff --git a/docs/HDSL_AM64xE1_Schematics.pdf b/docs/HDSL_AM64xE1_Schematics.pdf new file mode 100644 index 0000000..76bfc27 Binary files /dev/null and b/docs/HDSL_AM64xE1_Schematics.pdf differ diff --git a/docs/motor_control_sdk_am243x_manifest.html b/docs/motor_control_sdk_am243x_manifest.html new file mode 100644 index 0000000..f32982b --- /dev/null +++ b/docs/motor_control_sdk_am243x_manifest.html @@ -0,0 +1,1645 @@ + + + + + + + + + + + Manifest File + + + + + +
+
+ +
+
+
+
+
+ +

+Motor Control SDK AM243X Manifest +

+ +

+2023-01-09 +

+ +

+Manifest ID - SRAS00010218 +

+ +
+ +

Legend

+

(explanation of the fields in the Manifest Table below)

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+Software Name + +The name of the application or file +
+Version + +Version of the application or file +
+License Type + +Type of license(s) under which TI will be providing + +software to the licensee (e.g. BSD-3-Clause, GPL-2.0, TI TSPA License, TI + +Commercial License). The license could be under Commercial terms or Open Source. See Open Source Reference License Disclaimer in + +the Disclaimers Section. Whenever possible, TI will use an SPDX Short Identifier for an Open Source + +License. TI Commercial license terms are not usually included in the manifest and are conveyed through a variety + +of means such as a clickwrap license upon install, + +a signed license agreement and so forth. +
+Location + +The directory name and path on the media or a specific file where the Software is located. Typically fully qualified path names + +are not used and instead the relevant top level directory of the application is given. + +A notation often used in the manifests is [as installed]/directory/*. Note that the asterisk implies that all + +files under that directory are licensed as the License Type field denotes. Any exceptions to this will + +generally be denoted as [as installed]/directory/* except as noted below which means as shown in subsequent rows of + +the manifest. +
+Delivered As + +This field will either be “Source”, “Binary” or “Source + +and Binary” and is the primary form the content of the Software is delivered + +in. If the Software is delivered in an archive format, this field + +applies to the contents of the archive. If the word Limited is used + +with Source, as in “Limited Source” or “Limited Source and Binary” then + +only portions of the Source for the application are provided. +
+Modified by TI + +This field will either be “Yes” or “No”. A “Yes” means + +TI has made changes to the Software. A “No” means TI has not made any + +changes. Note: This field is not applicable for Software “Obtained + +from” TI. +
+Obtained from + +This field specifies from where or from whom TI obtained + +the Software. It may be a URL to an Open Source site, a 3rd + +party licensor, or TI. See Links Disclaimer in the Disclaimers + +Section. +
+ +
+ +

Disclaimers

+ +

Export Control Classification Number (ECCN)

+ +

Any use of ECCNs listed in the Manifest is at the user’s risk + +and without recourse to TI. Your + +company, as the exporter of record, is responsible for determining the + +correct classification of any item at + +the time of export. Any export classification by TI of Software is for + +TI’s internal use only and shall not be construed as a representation + +or warranty + +regarding the proper export classification for such Software or whether + +an export + +license or other documentation is required for exporting such Software

+ +

Links in the Manifest

+ +

Any + +links appearing on this Manifest + +(for example in the “Obtained from” field) were verified at the time + +the Manifest was created. TI makes no guarantee that any listed links + +will + +remain active in the future.

+ +

Open Source License References

+ +

Your company is responsible for confirming the + +applicable license terms for any open source Software + +listed in this Manifest that was not “Obtained from” TI. Any open + +source license + +specified in this Manifest for Software that was + +not “Obtained from” TI is for TI’s internal use only and shall not be + +construed as a representation or warranty regarding the proper open + +source license terms + +for such Software.

+ + +

Export Information

+ +

ECCN for Software included in this release:

+Publicly Available + +
+ + + + + + + +

+ Motor Control SDK AM243X Manifest Table +

+ +

+ See the Legend above for a description of these columns. +

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Software NameVersionLicense TypeDelivered AsModified by TI
+ Motor Control SDK + + 09.00.00 + + BSD-3-Clause + + Source and Binary + + N/A + Location + [as installed]/* +
Obtained from + Texas Instruments +
+ ICSS Firmware for HDSL + + 01.00.00 + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/position_sense/hdsl/firmware/hdsl_master_icssg*_bin.h +
Obtained from + Texas Instruments +
+ ICSS Firmware for EnDat + + 02.01.00 + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/position_sense/endat/firmware/endat_master*_bin.h +
Obtained from + Texas Instruments +
+ ICSS Firmware for Tamagawa + + 01.00.00 + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/position_sense/endat/firmware/tamagawa_master*_bin.h +
Obtained from + Texas Instruments +
+ ICSS Firmware for SDFM + + 01.00.00 + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/current_sense/sdfm/firmware/sdfm*_bin.h +
Obtained from + Texas Instruments +
+ +

+

+

+ + + + + + +

+ MCU PLUS SDK AM243x Manifest Table +

+ +

+ See the Legend above for a description of these columns. +

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Software NameVersionLicense TypeDelivered AsModified by TI
+ FreeRTOS FAT + + 2.3.3 + + MIT License + + Source + + No + Location + [as_installed]/source/fs/freertos_fat/FreeRTOS-FAT/* +
Obtained from + https://github.com/FreeRTOS/Lab-Project-FreeRTOS-FAT.git +
+ LWIP + + 2.1.2 + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/networking/lwip/lwip-stack/* +
Obtained from + git://git.savannah.gnu.org/lwip.git +
+ LWIP Contrib + + 2.1.0 + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/networking/lwip/lwip-contrib/* +
Obtained from + git://git.savannah.gnu.org/lwip/lwip-contrib.git +
+ TinyUSB + + 0.10.0 + + MIT License + + Source + + No + Location + [as_installed]/source/usb/tinyusb/tinyusb-stack/* +
Obtained from + https://github.com/hathach/tinyusb.git +
+ DDR Core driver + + 2.0.x + + BSD-3-Clause + + Source + + Yes + Location + [as_installed]/source/drivers/ddr/v0/cdn_drv/* +
Obtained from + Cadence Design Systems, Inc +
+ Tiny printf + + 4.0.0 + + MIT License + + Source + + No + Location + [as_installed]/source/kernel/nortos/dpl/common/printf.* +
Obtained from + https://github.com/mpaland/printf +
+ Xmodem + + 1.0.0 + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/drivers/bootloader/xmodem.c +
Obtained from + https://www.menie.org/georges/embedded +
+ FreeRTOS Posix Demo + + 1.0.0 + + MIT License + + Source + + Yes + Location + [as_installed]/examples/kernel/freertos/posix_demo/posix_demo.c +
Obtained from + https://github.com/FreeRTOS/FreeRTOS-Labs/blob/master/FreeRTOS-Labs/Demo/FreeRTOS_Plus_POSIX_with_actor_Windows_Simulator/posix_demo.c +
+ CRC16 CCITT + + 1.0.0 + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/drivers/bootloader/crc16.* +
Obtained from + https://www.menie.org/georges/embedded +
+ CMSIS ARM and DSP + + 5.1.0 + + Apache-2.0 + + Source and Binary + + No + Location + [as_installed]/source/cmsis +
Obtained from + https://github.com/ARM-software/CMSIS_5 +
+ Security PKA Firmware + + 1.1 + + TI Text File + + Binary + + No + Location + [as_installed]/source/security/crypto/pka/* +
Obtained from + Inside Secure B.V. +
+ mbedtls + + 2.13.1 + + Apache-2.0 + + Source + + No + Location + [as_installed]/source/networking/mbedtls_library/mbedtls/* +
Obtained from + https://github.com/Mbed-TLS/mbedtls/tree/mbedtls-2.13.1 +
+ ENET TSN Stack + + v09.00 + + TI Text File + + Binary + + N/A + Location + [as_installed]/source/networking/tsn/tsn-stack/* +
Obtained from + Texas Instruments +
+ USB Core driver + + 2.0.8 + + BSD-3-Clause + + Source + + Yes + Location + [as_installed]/source/usb/cdn/* +
Obtained from + Cadence Design Systems, Inc +
+ FreeRTOS Kernel + + 10.4.3 + + MIT License + + Source + + No + Location + [as_installed]/source/kernel/freertos/FreeRTOS-Kernel/* +
Obtained from + https://github.com/FreeRTOS/FreeRTOS-Kernel.git +
+ FreeRTOS Heap + + 10.4.3 + + MIT License + + Source + + Yes + Location + [as_installed]/source/kernel/nortos/dpl/common/HeapP_internal.* +
Obtained from + https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/portable/MemMang/heap_4.c +
+ FreeRTOS POSIX + + 1.1.0 + + MIT License + + Source + + No + Location + [as_installed]/source/kernel/freertos/FreeRTOS-POSIX/* +
Obtained from + https://github.com/FreeRTOS/Lab-Project-FreeRTOS-POSIX.git +
+ MCU+ SDK + + 09.00.00 + + BSD-3-Clause + + Source and Binary + + N/A + Location + [as installed]/* +
Obtained from + Texas Instruments +
+ TIFS, RM, PM for DMSC + + v09.00.07 + + TI Text File + + Binary + + N/A + Location + [as_installed]/source/drivers/sciclient/soc/am64x_am243x/* +
Obtained from + Texas Instruments +
+ +

+

+

+ + + + + + +

+ Industrial Communications SDK AM243x Manifest Table +

+ +

+ See the Legend above for a description of these columns. +

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Software NameVersionLicense TypeDelivered AsModified by TI
+ ICSS Firmware for Profinet Device + + 0.15.x + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/industrial_comms/profinet_device/icss_fwhal/firmware/* +
Obtained from + Texas Instruments +
+ ICSS Firmware for EtherCAT Slave + + 6.5.x + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/industrial_comms/ethercat_slave/icss_fwhal/firmware/* +
Obtained from + Texas Instruments +
+ ICSS Firmware for EthernetIP Adapter + + 5.3.x + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/industrial_comms/ethernetip_adapter/icss_fwhal/firmware/* +
Obtained from + Texas Instruments +
+ ICSS Firmware for HSR-PRP + + 2.20.x + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/industrial_comms/hsr_prp/icss_fwhal/firmware/* +
Obtained from + Texas Instruments +
+ EtherCAT Slave Examples + + 1.13.x + + BSD-3-Clause + + Source + + No + Location + [as_installed]/examples/industrial_comms/ethercat_slave_demo/* +
Obtained from + KUNBUS GmbH +
+ EtherNet/IP Adapter Examples + + 3.4.x + + BSD-3-Clause + + Source + + No + Location + [as_installed]/examples/industrial_comms/ethernetip_adapter_demo/* +
Obtained from + KUNBUS GmbH +
+ IO-Link Master Examples + + 1.9.x + + BSD-3-Clause + + Source + + No + Location + [as_installed]/examples/industrial_comms/iolink_master_demo/* +
Obtained from + KUNBUS GmbH +
+ EtherCAT-IOLink Gateway Examples + + 3.0.x + + BSD-3-Clause + + Source + + No + Location + [as_installed]/examples/industrial_comms/ethercat_iolink_gateway_demo/* +
Obtained from + KUNBUS GmbH +
+ Networking LwIP (enet) Examples + + 3.0.x + + BSD + + Source + + No + Location + [as_installed]/examples/networking/lwip/* +
Obtained from + Florian Schulze, Swedish Institute of Computer Science +
+ Industrial Communications SDK + + 09.00.00 + + BSD-3-Clause + + Source and Binary + + N/A + Location + [as installed]/* +
Obtained from + Texas Instruments +
+ EtherCAT Slave Stack Headers + + 1.13.x + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/industrial_comms/ethercat_slave/stack/*.h +
Obtained from + KUNBUS GmbH +
+ EtherNet/IP Adapter Stack Headers + + 3.4.x + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/industrial_comms/ethernetip_adapter/stack/*.h +
Obtained from + KUNBUS GmbH +
+ IO-Link Stack Headers + + 1.9.x + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/industrial_comms/iolink/*.h +
Obtained from + KUNBUS GmbH +
+ EtherCAT-IOLink Gateway Stack Headers + + 3.0.x + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/industrial_comms/ethercat_iolink_gateway/*.h +
Obtained from + KUNBUS GmbH +
+ Beckhoff EtherCAT SSC Library + + 5.13 + + TI Commercial + + Binary + + No + Location + [as_installed]/source/industrial_comms/ethercat_slave/stack/lib/ethercat_slave_bkhfSsc.* +
Obtained from + Beckhoff Automation Gmbh +
+ EtherCAT Slave Stack Library + + 1.13.x + + TI Commercial + + Binary + + No + Location + [as_installed]/source/industrial_comms/ethercat_slave/stack/lib/ethercat_slave.* +
Obtained from + KUNBUS GmbH +
+ EtherNet/IP Adapter Stack Library + + 3.4.x + + TI Commercial + + Binary + + No + Location + [as_installed]/source/industrial_comms/ethernetip_adapter/stack/lib/* +
Obtained from + KUNBUS GmbH +
+ IO-Link Stack + + 1.9.x + + TI Commercial + + Binary + + No + Location + [as_installed]/source/industrial_comms/iolink/stack/lib/* +
Obtained from + KUNBUS GmbH +
+ EtherCAT IO-Link Gateway Stack + + 2.2.x + + TI Commercial + + Binary + + No + Location + [as_installed]/source/industrial_comms/ethercat_iolink_gateway/stack/lib/* +
Obtained from + KUNBUS GmbH +
+ +

+

+

+ + +

+ +

Credits

+ + + +
+ +

Licenses

+
+

+ Motor Control SDK AM243X Licenses +


+
Motor Control SDK (BSD-3-Clause License)
-------------------------------
/*
* Copyright (C) 2021-23 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

ICSS Firmware (TI TEXT FILE License)
------------------------------------------------------------------
Copyright (C) 2017-2023 Texas Instruments Incorporated

All rights reserved not granted herein.

Limited License.

Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive license under copyrights and patents it now or hereafter owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") this software subject to the terms herein. With respect to the foregoing patent license, such license is granted solely to the extent that any such patent is necessary to Utilize the software alone. The patent license shall not apply to any combinations which include this software, other than combinations with devices manufactured by or for TI ("TI Devices"). No hardware patent is licensed hereunder.

Redistributions must preserve existing copyright notices and reproduce this license (including the above copyright notice and the disclaimer and (if applicable) source code license limitations below) in the documentation and/or other materials provided with the distribution

Redistribution and use in binary form, without modification, are permitted provided that the following conditions are met:

* No reverse engineering, decompilation, or disassembly of this software is permitted with respect to any software provided in binary form.

* any redistribution and use are licensed by TI for use only with TI Devices.

* Nothing shall obligate TI to provide you with source code for the software licensed and provided to you in object code.

If software source code is provided to you, modification and redistribution of the source code are permitted provided that the following conditions are met:

* any redistribution and use of the source code, including any resulting derivative works, are licensed by TI for use only with TI Devices.

* any redistribution and use of any object code compiled from the source code and any resulting derivative works, are licensed by TI for use only with TI Devices.

Neither the name of Texas Instruments Incorporated nor the names of its suppliers may be used to endorse or promote products derived from this software without specific prior written permission.

DISCLAIMER.

THIS SOFTWARE IS PROVIDED BY TI AND TI"S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI"S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+
+
+

+ MCU PLUS SDK AM243x Licenses +


+
MCU+ SDK (BSD-3-Clause License)
-------------------------------
/*
* Copyright (C) 2022 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/


TIFS, RM, PM for DMSC (TI TEXT FILE License)
------------------------------------------------------------------
Copyright (C) 2017-2023 Texas Instruments Incorporated

All rights reserved not granted herein.

Limited License.

Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive license under copyrights and patents it now or hereafter owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") this software subject to the terms herein. With respect to the foregoing patent license, such license is granted solely to the extent that any such patent is necessary to Utilize the software alone. The patent license shall not apply to any combinations which include this software, other than combinations with devices manufactured by or for TI ("TI Devices"). No hardware patent is licensed hereunder.

Redistributions must preserve existing copyright notices and reproduce this license (including the above copyright notice and the disclaimer and (if applicable) source code license limitations below) in the documentation and/or other materials provided with the distribution

Redistribution and use in binary form, without modification, are permitted provided that the following conditions are met:

* No reverse engineering, decompilation, or disassembly of this software is permitted with respect to any software provided in binary form.

* any redistribution and use are licensed by TI for use only with TI Devices.

* Nothing shall obligate TI to provide you with source code for the software licensed and provided to you in object code.

If software source code is provided to you, modification and redistribution of the source code are permitted provided that the following conditions are met:

* any redistribution and use of the source code, including any resulting derivative works, are licensed by TI for use only with TI Devices.

* any redistribution and use of any object code compiled from the source code and any resulting derivative works, are licensed by TI for use only with TI Devices.

Neither the name of Texas Instruments Incorporated nor the names of its suppliers may be used to endorse or promote products derived from this software without specific prior written permission.

DISCLAIMER.

THIS SOFTWARE IS PROVIDED BY TI AND TI"S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI"S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

ENET TSN Stack
---------------------------------------------------------------------
Copyright (C) 2023 Texas Instruments Incorporated
Copyright (c) 2023 Excelfore Corporation (https://excelfore.com)

All rights reserved not granted herein.

Limited License.

Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive license under copyrights and patents it now or hereafter owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") this software subject to the terms herein. With respect to the foregoing patent license, such license is granted solely to the extent that any such patent is necessary to Utilize the software alone. The patent license shall not apply to any combinations which include this software, other than combinations with devices manufactured by or for TI ("TI Devices"). No hardware patent is licensed hereunder.

Redistributions must preserve existing copyright notices and reproduce this license (including the above copyright notice and the disclaimer and (if applicable) source code license limitations below) in the documentation and/or other materials provided with the distribution

Redistribution and use in binary form, without modification, are permitted provided that the following conditions are met:

* No reverse engineering, decompilation, or disassembly of this software is permitted with respect to any software provided in binary form.

* any redistribution and use are licensed by TI for use only with TI Devices.

* Nothing shall obligate TI to provide you with source code for the software licensed and provided to you in object code.

If software source code is provided to you, modification and redistribution of the source code are permitted provided that the following conditions are met:

* any redistribution and use of the source code, including any resulting derivative works, are licensed by TI for use only with TI Devices.

* any redistribution and use of any object code compiled from the source code and any resulting derivative works, are licensed by TI for use only with TI Devices.

Neither the name of Texas Instruments Incorporated nor the names of its suppliers may be used to endorse or promote products derived from this software without specific prior written permission.

DISCLAIMER.

THIS SOFTWARE IS PROVIDED BY TI AND TI"S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI"S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


Cadence Design Systems DDR and USB Core Drivers (BSD-3-Clause License)
----------------------------------------------------------------------
/*
* Copyright (C) 2012-2020 Cadence Design Systems, Inc.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/


FreeRTOS Kernel, FreeRTOS Heap (MIT License)
--------------------------------------------
/*
* FreeRTOS Kernel V10.4.3
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/


FreeRTOS POSIX (MIT License)
----------------------------
/*
* Amazon FreeRTOS POSIX V1.1.0
* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://aws.amazon.com/freertos
* http://www.FreeRTOS.org
*/


FreeRTOS Posix Demo (MIT License)
---------------------------------
/*
* FreeRTOS POSIX Demo V1.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://aws.amazon.com/freertos
* http://www.FreeRTOS.org
*/


FreeRTOS FAT (MIT License)
--------------------------
/*
* FreeRTOS+FAT V2.3.3
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/


LWIP and LWIP Contrib (BSD-3-Clause License)
--------------------------------------------
/*
* Copyright (c) 2001, 2002 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS"" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*/

TinyUSB (MIT License)
---------------------
The MIT License (MIT)

Copyright (c) 2018, hathach (tinyusb.org)

Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.


Tiny printf (MIT License)
-------------------------
///////////////////////////////////////////////////////////////////////////////
// \author (c) Marco Paland (info@paland.com)
// 2014-2019, PALANDesign Hannover, Germany
//
// \license The MIT License (MIT)
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
// THE SOFTWARE.
//
// \brief Tiny printf, sprintf and (v)snprintf implementation, optimized for speed on
// embedded systems with a very limited resources. These routines are thread
// safe and reentrant!
// Use this instead of the bloated standard/newlib printf cause these use
// malloc for printf (and may not be thread safe).
//
///////////////////////////////////////////////////////////////////////////////


Xmodem, CRC16 CCITT (BSD-3-Clause License)
------------------------------------------
/*
* Copyright 2001-2021 Georges Menie (www.menie.org)
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the University of California, Berkeley nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS"" AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE REGENTS AND CONTRIBUTORS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

mbedtls (Apache-2.0 License)
----------------------------
/*
* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

CMSIS ARM and DSP (Apache-2.0 License)
--------------------------------------
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/


Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/

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+
+
+

+ Industrial Communications SDK AM243x Licenses +


+
Industrial Communications SDK (BSD-3-Clause License)
-------------------------------
/*
* Copyright (C) 2023 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/


ICSS Firmware (TI TEXT FILE License)
------------------------------------------------------------------
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Limited License.

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KUNBUS Sources (BSD-3-Clause License)
-------------------------------------
/*
* Copyright (c) 2020-2023, Kunbus GmbH
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

Networking LwIP (enet) Examples (BSD License)
---------------------------------------------
/*
* Copyright (c) 2001-2003 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
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* derived from this software without specific prior written permission.
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/*
* Copyright (c) 2001,2002 Florian Schulze.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
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* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
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* may be used to endorse or promote products derived from this software
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*
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/

+
+ + +
+ + + + diff --git a/docs/motor_control_sdk_am263x_manifest.html b/docs/motor_control_sdk_am263x_manifest.html new file mode 100644 index 0000000..9fe9869 --- /dev/null +++ b/docs/motor_control_sdk_am263x_manifest.html @@ -0,0 +1,775 @@ + + + + + + + + + + + Manifest File + + + + + +
+
+ +
+
+
+
+
+ +

+Motor Control SDK AM263X Manifest +

+ +

+2023-05-09 +

+ +

+Manifest ID - SRAS00010226 +

+ +
+ +

Legend

+

(explanation of the fields in the Manifest Table below)

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+Software Name + +The name of the application or file +
+Version + +Version of the application or file +
+License Type + +Type of license(s) under which TI will be providing + +software to the licensee (e.g. BSD-3-Clause, GPL-2.0, TI TSPA License, TI + +Commercial License). The license could be under Commercial terms or Open Source. See Open Source Reference License Disclaimer in + +the Disclaimers Section. Whenever possible, TI will use an SPDX Short Identifier for an Open Source + +License. TI Commercial license terms are not usually included in the manifest and are conveyed through a variety + +of means such as a clickwrap license upon install, + +a signed license agreement and so forth. +
+Location + +The directory name and path on the media or a specific file where the Software is located. Typically fully qualified path names + +are not used and instead the relevant top level directory of the application is given. + +A notation often used in the manifests is [as installed]/directory/*. Note that the asterisk implies that all + +files under that directory are licensed as the License Type field denotes. Any exceptions to this will + +generally be denoted as [as installed]/directory/* except as noted below which means as shown in subsequent rows of + +the manifest. +
+Delivered As + +This field will either be “Source”, “Binary” or “Source + +and Binary” and is the primary form the content of the Software is delivered + +in. If the Software is delivered in an archive format, this field + +applies to the contents of the archive. If the word Limited is used + +with Source, as in “Limited Source” or “Limited Source and Binary” then + +only portions of the Source for the application are provided. +
+Modified by TI + +This field will either be “Yes” or “No”. A “Yes” means + +TI has made changes to the Software. A “No” means TI has not made any + +changes. Note: This field is not applicable for Software “Obtained + +from” TI. +
+Obtained from + +This field specifies from where or from whom TI obtained + +the Software. It may be a URL to an Open Source site, a 3rd + +party licensor, or TI. See Links Disclaimer in the Disclaimers + +Section. +
+ +
+ +

Disclaimers

+ +

Export Control Classification Number (ECCN)

+ +

Any use of ECCNs listed in the Manifest is at the user’s risk + +and without recourse to TI. Your + +company, as the exporter of record, is responsible for determining the + +correct classification of any item at + +the time of export. Any export classification by TI of Software is for + +TI’s internal use only and shall not be construed as a representation + +or warranty + +regarding the proper export classification for such Software or whether + +an export + +license or other documentation is required for exporting such Software

+ +

Links in the Manifest

+ +

Any + +links appearing on this Manifest + +(for example in the “Obtained from” field) were verified at the time + +the Manifest was created. TI makes no guarantee that any listed links + +will + +remain active in the future.

+ +

Open Source License References

+ +

Your company is responsible for confirming the + +applicable license terms for any open source Software + +listed in this Manifest that was not “Obtained from” TI. Any open + +source license + +specified in this Manifest for Software that was + +not “Obtained from” TI is for TI’s internal use only and shall not be + +construed as a representation or warranty regarding the proper open + +source license terms + +for such Software.

+ + +

Export Information

+ +

ECCN for Software included in this release:

+Publicly Available + +
+ + + + + + + +

+ Motor Control SDK AM263X Manifest Table +

+ +

+ See the Legend above for a description of these columns. +

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + +
Software NameVersionLicense TypeDelivered AsModified by TI
+ Motor Control SDK + + 09.00.00 + + BSD-3-Clause + + Source and Binary + + N/A + Location + [as installed]/* +
Obtained from + Texas Instruments +
+ +

+

+

+ + + + + + +

+ MCU PLUS SDK AM263x Manifest Table +

+ +

+ See the Legend above for a description of these columns. +

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Software NameVersionLicense TypeDelivered AsModified by TI
+ MCU+ SDK + + 09.00.00 + + BSD-3-Clause + + Source and Binary + + N/A + Location + [as installed]/* +
Obtained from + Texas Instruments +
+ FreeRTOS Heap + + 10.4.3 + + MIT License + + Source + + Yes + Location + [as_installed]/source/kernel/nortos/dpl/common/HeapP_internal.* +
Obtained from + https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/portable/MemMang/heap_4.c +
+ FreeRTOS POSIX + + 1.1.0 + + MIT License + + Source + + No + Location + [as_installed]/source/kernel/freertos/FreeRTOS-POSIX/* +
Obtained from + https://github.com/FreeRTOS/Lab-Project-FreeRTOS-POSIX.git +
+ FreeRTOS Posix Demo + + 1.0.0 + + MIT License + + Source + + Yes + Location + [as_installed]/examples/kernel/freertos/posix_demo/posix_demo.c +
Obtained from + https://github.com/FreeRTOS/FreeRTOS-Labs/blob/master/FreeRTOS-Labs/Demo/FreeRTOS_Plus_POSIX_with_actor_Windows_Simulator/posix_demo.c +
+ LWIP + + 2.1.2 + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/networking/lwip/lwip-stack/* +
Obtained from + git://git.savannah.gnu.org/lwip.git +
+ LWIP Contrib + + 2.1.0 + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/networking/lwip/lwip-contrib/* +
Obtained from + git://git.savannah.gnu.org/lwip/lwip-contrib.git +
+ Tiny printf + + 4.0.0 + + MIT License + + Source + + No + Location + [as_installed]/source/kernel/nortos/dpl/common/printf.* +
Obtained from + https://github.com/mpaland/printf +
+ Xmodem + + 1.0.0 + + BSD-3-Clause + + Source + + No + Location + [as_installed]/source/drivers/bootloader/xmodem.c +
Obtained from + https://www.menie.org/georges/embedded +
+ Security PKA Firmware + + 1.1 + + TI Text File + + Binary + + No + Location + [as_installed]/source/security/crypto/pka/* +
Obtained from + Inside Secure B.V. +
+ TIFS Firmware + + 9.0.0 + + TI Text File + + Binary + + N/A + Location + [as_installed]/source/drivers/hsmclient/soc/am263x/hsmRtImg.h +
Obtained from + Texas Instruments +
+ mbedtls + + 2.13.1 + + Apache-2.0 + + Source + + No + Location + [as_installed]/source/networking/mbedtls_library/mbedtls/* +
Obtained from + https://github.com/Mbed-TLS/mbedtls/tree/mbedtls-2.13.1 +
+ +

+

+

+ + + + + + +

+ Industrial Communications SDK AM263x Manifest Table +

+ +

+ See the Legend above for a description of these columns. +

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Software NameVersionLicense TypeDelivered AsModified by TI
+ Industrial Communications SDK + + 09.00.00 + + BSD-3-Clause + + Source and Binary + + N/A + Location + [as installed]/* +
Obtained from + Texas Instruments +
+ ICSS Firmware for EtherCAT Slave + + 6.5.x + + TI Text File + + Binary as a C array in header file + + N/A + Location + [as_installed]/source/industrial_comms/ethercat_slave/icss_fwhal/firmware/* +
Obtained from + Texas Instruments +
+ +

+

+

+ + +

+ +

Credits

+ + + +
+ +

Licenses

+
+

+ Motor Control SDK AM263X Licenses +


+
Motor Control SDK (BSD-3-Clause License)
-------------------------------
/*
* Copyright (C) 2021-23 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

+
+
+

+ MCU PLUS SDK AM263x Licenses +


+
MCU+ SDK (BSD-3-Clause License)
-------------------------------
/*
* Copyright (C) 2021 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/


FreeRTOS Kernel, FreeRTOS Heap (MIT License)
--------------------------------------------
/*
* FreeRTOS Kernel V10.4.3
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/


FreeRTOS POSIX (MIT License)
----------------------------
/*
* Amazon FreeRTOS POSIX V1.1.0
* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://aws.amazon.com/freertos
* http://www.FreeRTOS.org
*/


FreeRTOS Posix Demo (MIT License)
---------------------------------
/*
* FreeRTOS POSIX Demo V1.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://aws.amazon.com/freertos
* http://www.FreeRTOS.org
*/


LWIP and LWIP Contrib (BSD-3-Clause License)
--------------------------------------------
/*
* Copyright (c) 2001, 2002 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS"" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*/
Tiny printf (MIT License)
-------------------------
///////////////////////////////////////////////////////////////////////////////
// \author (c) Marco Paland (info@paland.com)
// 2014-2019, PALANDesign Hannover, Germany
//
// \license The MIT License (MIT)
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
// THE SOFTWARE.
//
// \brief Tiny printf, sprintf and (v)snprintf implementation, optimized for speed on
// embedded systems with a very limited resources. These routines are thread
// safe and reentrant!
// Use this instead of the bloated standard/newlib printf cause these use
// malloc for printf (and may not be thread safe).
//
///////////////////////////////////////////////////////////////////////////////


Xmodem, CRC16 CCITT (BSD-3-Clause License)
------------------------------------------
/*
* Copyright 2001-2021 Georges Menie (www.menie.org)
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the University of California, Berkeley nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS"" AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE REGENTS AND CONTRIBUTORS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

TIFS Firmware (TI TEXT FILE License)
------------------------------------------------------------------
Copyright (C) 2022 Texas Instruments Incorporated

All rights reserved not granted herein.

Limited License.

Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive license under copyrights and patents it now or hereafter owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") this software subject to the terms herein. With respect to the foregoing patent license, such license is granted solely to the extent that any such patent is necessary to Utilize the software alone. The patent license shall not apply to any combinations which include this software, other than combinations with devices manufactured by or for TI ("TI Devices"). No hardware patent is licensed hereunder.

Redistributions must preserve existing copyright notices and reproduce this license (including the above copyright notice and the disclaimer and (if applicable) source code license limitations below) in the documentation and/or other materials provided with the distribution

Redistribution and use in binary form, without modification, are permitted provided that the following conditions are met:

* No reverse engineering, decompilation, or disassembly of this software is permitted with respect to any software provided in binary form.

* any redistribution and use are licensed by TI for use only with TI Devices.

* Nothing shall obligate TI to provide you with source code for the software licensed and provided to you in object code.

If software source code is provided to you, modification and redistribution of the source code are permitted provided that the following conditions are met:

* any redistribution and use of the source code, including any resulting derivative works, are licensed by TI for use only with TI Devices.

* any redistribution and use of any object code compiled from the source code and any resulting derivative works, are licensed by TI for use only with TI Devices.

Neither the name of Texas Instruments Incorporated nor the names of its suppliers may be used to endorse or promote products derived from this software without specific prior written permission.

DISCLAIMER.

THIS SOFTWARE IS PROVIDED BY TI AND TI"S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI"S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


mbedtls (Apache-2.0 License)
----------------------------
/*
* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/

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+ + + + diff --git a/docs_src/docs/api_guide/components/current_sense/current_sense.md b/docs_src/docs/api_guide/components/current_sense/current_sense.md new file mode 100644 index 0000000..164040d --- /dev/null +++ b/docs_src/docs/api_guide/components/current_sense/current_sense.md @@ -0,0 +1,34 @@ +# Current Sense {#CURRENT_SENSE} + +[TOC] + +Current sensing is handled by the Programmable Real-Time Unit Industrial Communication Subsystem (PRU-ICSS). The PRU-ICSS is a co-processor subsystem containing Programmable Real-Time (PRU) cores which implements the low level firmware. The PRU-ICSS frees up the main ARM cores in the device for other functions, such as control and data processing. + +## SDFM {#SDFM} + +ICSS %SDFM is a sigma delta interface for phase current measurement in high performance motor and servo drives. During Sigma delta decimation filtering (SDDF) the PRU hardware provides hardware integrators that do the accumulation part of Sinc filtering, while the ICSS %SDFM firmware does differentiation part. + +## Features Supported + - 3 %SDFM channels on single PRU core + - Normal current (NC) for data read: SINC3 filter with OSR 16 to 256 + - Overcurrent (OC) for comparator: free running SINC3 filter with OSR 16 to 256 + - Event generation(ARM interrupt for data read from DMEM, GPIO toggle for high and low thresholds) + - High and Low threshold comparator + - Trigger based normal current sampling + - Double update: Double normal current sampling per EPWM cycle + - %SDFM Sync with EPWM + +## Features Not Supported +- Zero cross comparator +- OSR below 16 +- Clock phase compensation +- Fast detect and trip generation + +## ICSS SDFM Design +\subpage SDFM_DESIGN explains the design in detail. + +## Example +\ref EXAMPLE_MOTORCONTROL_SDFM + +## API +\ref SDFM_API_MODULE \ No newline at end of file diff --git a/docs_src/docs/api_guide/components/current_sense/sdfm_design.md b/docs_src/docs/api_guide/components/current_sense/sdfm_design.md new file mode 100644 index 0000000..937e247 --- /dev/null +++ b/docs_src/docs/api_guide/components/current_sense/sdfm_design.md @@ -0,0 +1,239 @@ +# %SDFM Interface Design {#SDFM_DESIGN} + +[TOC] + +## Introduction +This design implements Sigma delta interface on TI Sitara™ AM64x/AM243x. +ICSS %SDFM is a Sigma delta filter for phase current measurement. +Only two lines are required for each channel, differential pair each for %SDFM clock & %SDFM data. +Clock is provided by external device or internal device and data comes from sigma delta modulator in form of digital bit stream. + + +## System Overview + + + +## Implementation +The Sigma delta filter is implemented on TI Sitara™ Devices. +Design is split into three parts – Sigma delta hardware support in PRU, firmware running in PRU and driver running in ARM. +Application is supposed to use the ICSS %SDFM driver APIs to leverage %SDFM functionality. +SDK example uses the %SDFM hardware capability in Slice 1 of PRU-ICSSG0. + + +### Specifications + + + + + + + + + + + + + +
Parameter + Default Value + Details +
Normal current OSR + 64 + Tested with 16, 32, 64, 128 and 256 +
Over current OSR + 16 + Tested with 16, 32, 64, 128 and 256 +
Sigma Delta Modulator Clock + 20 MHz + Tested with 5MHz, 10MHz and 20MHz from clock from PRU-ICSSG ECAP and 5MHz clock from SoC EPWM1 +
Simulated EPWM frequency + 8 KHz + Tested up to 20KHz +
IEP frequency + 300 MHz + Tested with 200MHz, 225MHz and 300MHz +
+ +### ICSS SDFM PRU hardware + +Refer section 6.4.5.2.2.3.5 Sigma Delta (SD) Decimation Filtering in Technical Reference Manual(TRM) of AM243x for details. + +### ICSS SDFM Firmware Implementation + +Following section describes the firmware implementation of Sigma Delta Decimation Filter on PRU-ICSS. + +#### Firmware Architecture + +\image html SDFM_FIRMWARE_FLOWCHART.png "Overall Block Diagram" + +- Firmware first clears the PRU registers and task manager. +- Then it waits for the ARM core to set %SDFM enable bit. After the enable bit is set, it sends an acknowledgement to ARM core. +- After this, the firmware does initialization of PRU-ICSSG's %SDFM hardware interface, task manager and IEP0. +- If threshold comparator is enabled, then a free run over current loop is setup, else it sets up an infinite waiting loop. In over current loop, the firmware reads sample data from the shadow copy register and does low and high theshold compersion with sample data, and depending on the configuration it toggles the GPIO pins. +- Time triggered normal current task is configured to be triggered based on IEP CMP4 event. When the CMP4 event hits, the task manager sets the program counter to normal current task. In normal current task, firmware reads sample data from accumulator and it checks for fourth normal current sample (for SINC3 filtering). If the current normal current sample belongs to fourth normal current sample, then it stores the same in data memory DMEM as normal current row data and trigger interrupt. +- At the end of normal current firmware task, execution flow comes into infinite waiting loop or over current loop. + +##### Normal Curent (NC) +This section describes normal current implementation. Its implementation is trigger based. It starts execution when the trigger point is acquired (first time CMP4 event hits) and performs four continuous samplings to bring the accumulator and differntiator registers to stable state for the configured normal current OSR. + +Initially the CMP4 register is configured with the first sample trigger start time and then until the next third continuous normal current sample it is updated with the normal current OSR sampling time. At the end of the fourth normal current sample again, it is updated with the second sample start time if double update is enabled otherwise with the first sample trigger start time. + +\image html SDFM_NC_FLOW_CHART.png "Normal Current" + +###### Single Update + +Normal current sampling is done per EPWM cycle. +\image html SDFM_single_update.PNG "Single Update" + +###### Double Update + +Normal current sampling is done twice in one EPWM cycle. + +\image html SDFM_Double_update.PNG "Double Update" + +##### Over Current (OC)/Threshold Comparator +This section describes the over current implementation. It performs continuous sampling (free run) and when the sample value crosses the high or low threshold, the corresponding GPIO pin goes high. + +\image html SDFM_OC_Flow_Chart.png "Over current" +\image html SDFM_GPIO_toggle.png "GPIOs behaviour for High and Low threshold" + +#### Sync with EPWM and trigger timing +This section describes the EPWM to %SDFM synchronization and trigger timing for each EPWM cycle. At the end of the every EPWM cycle, the EPWM generates a sync out event that resets the IEP timer. +The firmware initiates normal current sampling at the sample trigger point in each EPWM cycle. It takes four consecutive samples to bring the accumulator and differentiator registers to stable state. It takes the first sample at the trigger point and the next three samples, each after ONE_SAMPLE_TIME. +Here ONE_SAMPLE_TIME is: OSR*(1/SD_CLK) +\image html SDFM_epwm_sync_and_trigger_timing.png "Sync with EPWM and trigger timing" + +#### AM64x/AM243x EVM Pin-Multiplexing + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Pin name + Signal name + Function +
GPIO_HIGH_TH_CH0 + MCU_SPI0_D1/B6 + Ch0 High threshold output +
GPIO_LOW_TH_CH0 + MCU_SPI1_D0/C7 + Ch0 low threshold output +
GPIO_HIGH_TH_CH1 + MCU_SPI1_CS0/A7 + Ch1 High threshold output +
GPIO_LOW_TH_CH1 + MCU_SPI1_CLK/D7 + Ch1 low threshold output +
GPIO_HIGH_TH_CH2 + MCU_SPI1_D1/C8 + Ch2 High threshold output +
GPIO_LOW_TH_CH2 + MCU_SPI0_CLK/E6 + Ch2 Low threshold output +
SD0_D + PIN_PRG0_PRU0_GPO1 + Channel0 data input +
SD1_D + PIN_PRG0_PRU0_GPO3 + Channel1 data input +
SD2_D + PIN_PRG0_PRU0_GPO5 + Channel2 data input +
PRG0_ECAP0_IN_APWM_OUT + PIN_PRG0_PRU1_GPO15 + ECAP output frequency +
GPIO_MTR_1_PWM_EN + GPMC0_AD15/Y20 + Enable EPWM0 on 3-axis board +
SD8_CLK + PIN_PRG0_PRU0_GPO16 + Comman %SDFM clock input pin +
+ +\cond SOC_AM243X +#### AM243x LP Pin-Multiplexing + + + + + + + + + + + + + + + + + + + + + + + + + +
Pin name + Signal name + Function +
GPIO_HIGH_TH_CH0 + PRG1_PRU0_GPO18 + (J7.64)Ch0 High threshold output +
GPIO_LOW_TH_CH0 + PRG0_PRU1_GPO11 + (J7.70)Ch0 low threshold output +
GPIO_HIGH_TH_CH1 + PRG1_PRU0_GPO17 + (J7.65)Ch1 High threshold output +
GPIO_LOW_TH_CH1 + PRG1_PRU0_GPO7 + (J7.66)Ch1 low threshold output +
GPIO_HIGH_TH_CH2 + PRG0_PRU1_GPO1 + (J7.67)Ch2 High threshold output +
GPIO_LOW_TH_CH2 + PRG0_PRU1_GPO2 + (J7.68)Ch2 Low threshold output +
SD0_D + PIN_PRG0_PRU0_GPO1 + (J4.32)Channel0 data input +
SD1_D + PIN_PRG0_PRU0_GPO3 + (J2.19)Channel1 data input +
SD2_D + PIN_PRG0_PRU0_GPO5 + (J2.13)Channel2 data input +
PRG0_ECAP0_IN_APWM_OUT + PIN_PRG0_PRU1_GPO15 + (J6.59)ECAP output frequency +
SD8_CLK + PIN_PRG0_PRU0_GPO16 + (J1.7)Comman %SDFM clock input pin +
+\endcond \ No newline at end of file diff --git a/docs_src/docs/api_guide/components/dcl/dcl.cfg b/docs_src/docs/api_guide/components/dcl/dcl.cfg new file mode 100644 index 0000000..80a55d6 --- /dev/null +++ b/docs_src/docs/api_guide/components/dcl/dcl.cfg @@ -0,0 +1,18 @@ +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/dcl.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/dcl_common.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pi/dcl_pi.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pi/dcl_pi2.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pid/dcl_pid.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/pid/dcl_pidf64.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df11.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df13.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df22.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/df/dcl_df23.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_aux.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_clamp.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_css.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_stability.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/common/dcl_zpk3.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/misc/dcl_error.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/dcl/misc/dcl_fdlog.h \ No newline at end of file diff --git a/docs_src/docs/api_guide/components/dcl/dcl.md b/docs_src/docs/api_guide/components/dcl/dcl.md new file mode 100644 index 0000000..ea5cb29 --- /dev/null +++ b/docs_src/docs/api_guide/components/dcl/dcl.md @@ -0,0 +1,145 @@ +# Digital Control Library (DCL) {#DCL} + +[TOC] + +## Introduction + +The Sitara™ Digital Control Library (DCL) provides a suite of robust software functions for developers of digital +control applications using the Texas Instruments Sitara MCU. DCL is a header-only library, and all functions in +the library are provided in the form of C source-code. + +The DCL contains PI,PID and "Direct Form" controller types. The former are typically used to tune properties of +a transient response, while the latter are typically used to shape the open loop frequency response. + +In addintion, DCL contains functions to convert controller parameters from one type to the other. As well as +functions to parameterize the controller given a transfer function. + +Several utility modules such as error handling, data logging are also included as a supporting module. + +## Features Supported + +Supported controller modules (floating-point) + +- Linear PI +- Linear PID +- Linear PI with double integrator +- Direct Form 1 (first order) +- Direct Form 1 (third order) +- Direct Form 2 (second order) +- Direct Form 2 (third order) + +Other utility modules: + +- Error Handling +- Testpoints +- Data Logging + +## Features Not Supported + +(Compared with C2000Ware's DCL) +- Fix-point controller modules +- Non-linear PID controller +- Reference Generator and performance index +- Multi-channel data logs + +## Benchmark Results + +A benchmark on R5F core has been conducted to observe the following results when running controller arithmetic: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Controller Function + Cpu Cycles +
PI Controller
DCL_runPISeries49
DCL_runPIParallel50
DCL_runPISeriesTustin56
DCL_runPIParallelEnhanced62
PI2 Controller
DCL_runPI2Series74
PID Controller
DCL_runPIDSeries65
DCL_runPIDParallel65
DF11 Controller
DCL_runDF1124
DF13 Controller
DCL_runDF1343
DCL_runDF13Clamp53
DF22 Controller
DCL_runDF2227
DCL_runDF22Clamp41
DF23 Controller
DCL_runDF2329
DCL_runDF23Clamp45
PID 64bit Controller
DCL_runPIDF64Series185
DCL_runPIDF64Parallel174
+ +- Ran with TI Clang Compiler v2.1.3.LTS, with -Os flag and all DCL functions inlined, obtained the average result from 600 consecutive reading of running the controller with DPL CycleCountP. +- Simulated inputs are based on arbitrary sinusoidal waves and saturation condition that roughly clamps ~50% of the time. For functions with clamp (PI,PI2,PID and DF Clamps), clock cycle varies depending on clamping condition and provided inputs. +- Actual result may vary depending on provided datasets and memory configuration. For R5F, it is recommended for users to map control loops to TCM for the best performance. + +## Provided Examples + +The following examples has been provided to demonstrate the DCL library: + +- \ref EXAMPLES_DCL_PI +- \ref EXAMPLES_DCL_DF22 + +## Additional References {#DCL_ADDITIONAL_REFERENCES} + +N/A + +## API + +\ref DCL_API_MODULE diff --git a/docs_src/docs/api_guide/components/position_sense/endat.md b/docs_src/docs/api_guide/components/position_sense/endat.md new file mode 100644 index 0000000..410f872 --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/endat.md @@ -0,0 +1,60 @@ +# EnDat {#ENDAT} + +[TOC] + +## Introduction + +EnDat is a bidirectional interface for position encoders. During EnDat operation the EnDat receiver receives position information from the EnDat position encoder. + +## Features Supported + + - EnDat 2.2 command set + - EnDat 2.1 command set + - Interrupted and continuous clock mode + - Cable length up to 100m @8MHz + - Propagation delay compensation (capable of handling different propagation delay of different + propagation delay of different channels in concurrent multi + channel configuration) + - Automatic estimation of propagation delay + - Receive on-the-fly CRC verification of position, parameters and additional information + - Two modes of operation - host trigger and periodic trigger + - Channel select + - Concurrent multi channel support (up-to 3 encoders with identical part number @ 8MHz maximum) + - "Multi Channel with Encoders of Different Make" using load share mode (Each of PRU, RTU-PRU, and TX-PRU from one PRU-ICSSG slice handles one channel) + - Safety Readiness: Recovery time + - Clock up to 16MHz with single channel and load share mode (multi channel) + +## Features Not Supported + +In general, peripherals or features not mentioned as part of "Features Supported" section are not +supported in this release, including the below +- Independent clocks on multi channel mode. +- Continuous clock mode in Multi-channel single PRU mode + +### Limitations +This section describes known limitations of the current implementation in multi-channel single PRU mode. +- Clock above 8 MHz: it is not possible to over sample, downsample and store one bit for all three channels in one clock cycle time. +- Reset command CRC failure: The encoder which takes more time in reset operation will show CRC failure because the reset time is not the same for each encoder so the acknowledgment will not arrive on same time for all encoders at the master end. + +## SysConfig Features + +@VAR_SYSCFG_USAGE_NOTE + +SysConfig can be used to configure things mentioned below: +- Selecting the ICSSG instance. (Tested on ICSSG0) +- Selecting the ICSSG0PRUx instance.(Tested on ICSSG0-PRU1) +- Configuring PINMUX. +- Channel selection. +- Selecting Multi Channel with Encoders of Different Make" using load share mode. + + +## ENDAT Design + +\subpage ENDAT_DESIGN explains the design in detail. + +## Example +\ref EXAMPLE_MOTORCONTROL_ENDAT + +## API +\ref ENDAT_API_MODULE + diff --git a/docs_src/docs/api_guide/components/position_sense/endat_design.md b/docs_src/docs/api_guide/components/position_sense/endat_design.md new file mode 100644 index 0000000..4b8744f --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/endat_design.md @@ -0,0 +1,352 @@ +# EnDat Protocol Design {#ENDAT_DESIGN} + +[TOC] + +## Introduction + +This design implements EnDat Receiver (a.k.a subsequent electronics) on TI Sitara™ AM64x/AM243x EVM. +EnDat is a digital bidirectional serial interface for position encoders, also suited fo safety related applications. +Only four signal lines are required, differential pair each for clock and data. +Clock is provided by receiver and data is bidirectional. Data is transmitted in synchronism with clock. +Transfer between receiver and encoder at the physical layer is in accordance with RS485, with transceiver at both ends. + +## System Overview + +Position feedback system consists of a position encoder attached to a motor, up to 100 meter of cable which provides power and serial communication and the receiver interface for position encoder. +In case of Sitara™ AM64x/AM243x processor the receiver interface for position encoder is just one function of a connected drive controller. +The AM64x/AM243x provides in addition to the resources for Industrial Ethernet and motor control application including on-chip ADCs, Delta Sigma demodulator for current measurement. +EnDat Receiver on Sitara™AM64x/AM243x processor uses one ICSSGx Slice. +Clock, data transmit, data receive and receive enable signals from PRU1 of ICSS_G is available in AM64x/AM243x EVM. + +## Implementation + +The EnDat receiver function is implemented on TI Sitara™ Devices. +Encoder is connected to IDK via universal Digital Interface TIDA-00179(https://www.ti.com/tool/TIDA-00179), TIDEP-01015(3-axis board) and 3 Axis Interface card. +Design is split into three parts – EnDat hardware support in PRU, firmware running in PRU and driver running in ARM. +Application is supposed to use the EnDat driver APIs to leverage EnDat functionality. +SDK examples used the EnDat hardware capability in Slice 1 (either 1 core or 3 cores based ont the confiuration) of PRU-ICSSG0. +Remaining PRUs in the AM64x/AM243x EVM are available for Industrial Ethernet communication and/or motor control interfaces. + + +### Specifications + + + + + + + + + + + + + + + + +
Parameter + Value + Details +
Maximum Cable Length + 100m + Supports up-to 8MHz with delay compensation +
Maximum Frequency + 16 MHz + Supports up-to 20m cable +
Startup/Initialization Frequency + 200 KHz + After power on or reset +
Frequencies supported + Upto 8 MHz + Changeable at run-time +
CRC + 6 bits + Position/data verification +
Receive oversample ratio + 8 + +
+ +### EnDat PRU hardware + +Refer TRM for details + +### EnDat Firmware Implementation + +Following section describes the firmware implementation of EnDat receiver on PRU-ICSS. +Deterministic behavior of the 32 bit RISC core running upto 333MHz provides resolution on sampling external signals and generating external signals. +It makes uses of EnDat hardware support in PRU for data transmission. + +There are three different variations of PRU-ICSS firmware. +1. Single Channel +2. Multi Channel with Encoders of Same Make +3. Multi Channel with Encoders of Different Make +#### Implementation for Single Channel and Multi Channel with Encoders of Same Make +Single core of PRU-ICSSG slice used in this configuration. + +\image html endat_module_integration.png "ARM, PRU, EnDat module Integration for for "Single Channel" or "Multi Channel with Encoders of Same Make" configuration" + +#### Implementation for Multi Channel with Encoders of Different Make +Each of PRU, TX-PRU and RTU-PRU handle one channel in this configuration +Enbale load share mode in case of multi make encoders. + +\image html Endat_load_share_mode.png "PRU, EnDat module Integration for "Multi Channel with Encoders of Different Make" configuration" + + +#### Firmware Architecture + +\image html endat_overall_block_diagram.png "Overall Block Diagram" + +Firmware first does initialization of PRU-ICSSG's EnDat hardware interface and EnDat encoder. +Then it waits for the user to provide command (user after setting up the command, sets command trigger bit), upon detecting trigger, first it checks whether the command requested is a continuous mode or a normal command. + +If it is a normal command, reads command, it’s attribute like transmit bits, receive bits etc., then it transmits the data and collected the data sent by the encoder stored onto a buffer with one byte representing a bit (since oversample ration of 8 is used). +Next it checks whether there is 2.2 command supplement to be transmitted based on attributes, if so it transmits it. +The received data is now downsampled to extract bit from oversampled 8 bits and the result written to the defined PRU RAM locations. + +If command requested is continuous mode, 2.1 position command will be transmitted. During receive, it is different from the normal mode that downsampling is done on-the-fly, i.e. downsampling is done as soon as each bit is received. This is done due to the timing constraints with continuous mode, as data is continuously being received. + +At the end of transaction as requested by the user, trigger bit that is set by the user is unset. +User can wait on this bit to know that the command has been completed. +EnDat driver provides API to achieve this. + +##### Initialization +###### Initialization for "Single Channel" and "Multi Channel with Encoders of Same Make" configurations +\image html endat_initialization.png "Initilization for Single PRU mode" + +###### Initialization for "Single Channel" and "Multi Channel with Encoders of Different Make" configuration +\image html endat_load_share_mode_initialization.png "Initilization for Load share mode" + +Before executing the firmware, the ARM (R5) core needs to enable EnDat mode in PRU-ICSSG first, then configure the clock to 200KHz, with oversample ratio of 8 (hence receive clock would be 200 * 8 KHz). +The entire EnDat configuration MMRs are cleared. Through the defined interface (PRU RAM location), user requested channel is determined in Single pru configuration. +Then power-on-init as per specification is implemented, after which encoder is reset by sending reset command. +Firmware setups the command and it’s attribute for all the commands that are sent during initialization. Alarms, errors and warning are cleared. +Firmware then determines number of clock pulses for position and whether encoder supports EnDat 2.2. Propagation delay is then estimated. +If user has required for clock to be configured, it is obeyed, else it defaults to 8MHz. At the end of the initialization status is updated. + +###### Synchronization among PRU cores for "Multi Channel with Encoders of Different Make" configuration + +If using "Multi Channel with Encoders of Different Make" configuration where load share mode is enabled, one of the cores among enabled cores will be set as the primary core for performing global configurations of PRU-ICSSG's EnDat interface. These global configurations include clock frequency configuration and TX global re-initialization. + +There needs to be a synchronization between PRUs before changing any global configuration. For this purpose, each active PRU core sets synchronization bit before any operation needing synchronization and clears the synchronization bit when it is ready. The assigned primary core will wait for all active channel's synchronization bits to be cleared and then perform the global configuration. + + +##### Send and Receive + +\image html endat_send_receive.png "Send And Receive" + + +If requested command attribute indicates 2.2 command supplement, clock is configured to free run stop low mode, else to free run stop high. +Command is written to the transmit fifo and send routine followed by receive is invoked. + +###### Send + +\image html endat_send.png "Send" + +Transmit and receive frame sizes are configured in PRU EnDat hardware. +With long cables, it may be required to configure receive frame size lesser than receive bits so that extra clocks are not sent to the encoder. +If transmit was going on, it will till it has finished and then transmit GO bit is set, which would start the new transmission. + +###### Receive + +\image html endat_receive.png "Receive" + + +Receive bits obtained via command attribute is stored as header (initial 2 bytes) in the receive buffer. +Then wait’s till receive valid flag has been set, once set, 1 byte corresponding 1 bit (because of oversampling of 8) is read and stored in receive buffer and the flags are cleared. +Receive buffer pointer is incremented & receive bit count decremented. This continues till count is zero, once zero, it extracts receive data one more time to take care of SB (receive count excludes SB). +If 2.2 command supplement is not present, transmit re-init is done. +If using "Multi Channel with Encoders of Different Make" configuration where load share mode is enabled, the primary core waits for synchronization bits for active channels to be cleared before performing TX Global Init. + +\image html Endat_Load_share_receive.png "Receive In load share mode" + +###### EnDat 2.2 Command Supplement Send + +\image html endat_2_2_supplement_send.png "EnDAT 2.2 command supplement send" + +Clock mode is configured to stop low after transmit. 2.2 command supplement to transmitted is written to fifo preceded by 7 dummy bits & SB. +Transmission is configure to transmit till end of the fifo. Transmission is started after making sure that transmit module is not busy. + +###### Receive Downsample + +\image html endat_receive_downsampling.png "Downsampling" + +This is the most complex portion of the firmware. Received data is exposed through PRU interface in four bytes. +First two words (word = 4 bytes) holds the position data, third holds additional information 2 (if only second additional info is present or both present) or 1 (if only first additional info is present) & the last additional information 1 (if both present). +The order is as mentioned in EnDat 2.2 specification. Splitting the received data on word boundaries when additional info’s are present causes the complexity here. + +If command is neither 2.2 nor position request or if no additional info is present, handling is easy – just copy the received data into initial 2 words in the order it is received. +If command is 2.2 position command and depending on the number of additional info’s, markers (used in the downsampling loop) are set to write additional info’s to next word boundaries. +If only one addinfo is present, marker “rx pos bits” stores clocks required to receive position (inclusive of CRC, F1 & F2). +If both addinfo’s are present another marker is set to 2 words (first 2 words holds the position) plus 30 bit to account for addinfo. +If markers are not required, then their values are set so that it never matches the counting receive bits, hence the value “0xff”. + +After updating the marker, number of received bits is retrieved from the receive buffer header. SB is skipped for downsampling and the result registers are cleared. +Next, each byte (8 bit, oversample of 8) is read from the receive buffer, 4th bit of each decide the actual received bit. This is continued till the end of receive buffer. +If during the loop, receive bit count matches any of the marker, bit count is updated appropriately. This helps is naturally bringing the received data as per the word format specified by the interface. +In the loop, as the number of bits reaches word boundary, it will start saving received data to next word. At the end of the loop, the last word is copied to the result register. + +###### Continuous mode + +\image html endat_continuous_mode.png "Continuous Mode" + +2.1 position command as well as it’s attribute that been setup by the user is read first. Clock is configured for free run mode. Position command is written fifo and send routine is invoked. +Then receive is done along with on-the-fly downsampling, this is required as time between receipt of successive position data is less than the time that dowsampling routine (mentioned earlier) takes. +Once data is read and dowsampled on-the-fly, command trigger interface is read to see if user wants to stop continuous mode, if so, do transmit re-init, disable receive and wait till the end of re-init. + +###### Receive and On-The-Fly Downsample + +\image html endat_on_fly_downsampling.png "Endat on the fly Downsampling" + +Two registers (a word each) that hold the result are cleared initially. Upon receiving the first receive valid, it discards it and proceeds to wait for the next one as the first one is SB. +Thereafter for every valid flag set, 4th bit in the received byte is checked to find the actual received bit and it stored, word crossing is also taken care. +After all the bits for a position command is received, receive is disabled and is activated only after 2T clock cycles – this is to prevent falsely detecting SB immediately (upon calling this routine back-to-back as mentioned in previous section) after encoder has finished sending data as it can pull data line high for 2T more clock cycles. + +#### Recovery Time Measurement +Recovery Time is measured only for Type 2.2 commands. +The factory default settings for the Recovery Time is programmed to 10us <= RT <= 30us. It can only be changed to 1.25us <= RT <=3.75us for type 2.2 mode commands. For clock pulse frequence <= 1MHz, RT must be set to 10us <= RT <= 30us. +The User can set the function parameters in word 3 at "0xB9" memory area for RT range. If bit 0th is unset and 1st bit is set of word3 then RT will belong to large range(10us-30us) and if 0th bit is set and 1st bit is unset of word3 then RT will belong to short range(1.25us to 3.75us). + +##### Method for measuring the recovery time for position command +\image html Endat_Recovery_Time_For_Position.png "Endat Recovery time for Endat 2.2 position command " +\image html Endat_RT_FlowChart_for_position.png "Endat Recovery time flow-chart for Endat 2.2 position command" +1. After the CRC bits are received, there is a wait for rising clock edge. +2. Start the measurement of Recovery Time using PRU cycle counter (The cycle counter is set to zero). +3. Wait for falling edge of the data from encoder (RX). +4. Read the PRU cycle counter which gives the value of Recovery Time in PRU Clock Cycle units and store it to DMEM. + + +##### Method for measuring the recovery time for supplement command +\image html Endat_Recovery_Time_For_Supplement.PNG "Endat Recovery time for Endat 2.2 supplement command " +\image html Endat_RT_FlowChart_for_supplement.png "Endat Recovery time flow-chart for Endat 2.2 supplement command" +1. After TX_GO bit is set which starts the TX, wait for TX FIFO level to reach 0 +2. In case of Single Channel or Multi Channel with Encoders of Different Make mode, wait for RX enable. But In case of Multi Channel with Encoders of Same Make mode, wait for TX complete. +3. After the CRC bits are received, there is a wait for rising clock edge. +4. Start the measurement of Recovery Time using PRU cycle counter (The cycle counter is set to zero). +5. Wait for falling edge of the data from encoder (RX). +6. Read the PRU cycle counter which gives the value of Recovery Time in PRU Clock Cycle units and store it to DMEM. + +##### NOTE for Multi-channel Single PRU Mode + We can not measure the recovery time as accurately as single channel or multi channel load share, because same PRU has to poll for 3 channels. So we are doing a sequential polling for each channel. +1. Wait for rising edge in clock for all connected channels +2. Start the measurement of Recovery Time using PRU cycle counter (The cycle counter is set to zero). +3. Wait for RX completion on all connected channels. We start checking completion for all connected channels one by one. Whenever completion is detected for a channel, we save the PRU cycle counter value and continue the wait for remaining channels. + +### EnDat Hardware interface + +The physical data transmission in EnDat is done using RS-485 standard. The data is transmitted as differential signals using the RS485 between the EnDat Receiver and the Encoder. + +The Receiver sends the clock to the EnDat encoder, data transmission in either direction (one at a time) occurs in synchronism with the clock. The design uses two differential signals for each of the lines (clock and data). + +EnDat Receiver and the encoder is connected using the RS-485 transceiver. Data is transmitted differentially over RS-485. It has the advantages of high noise immunity and long distance transmission capabilities. + +#### AM64x/AM243x EVM Pin-Multiplexing + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Pin name + Signal name + Function +
PRG0_PRU1_GPO0 + pru1_endat0_clk + Channel 0 clock +
PRG0_PRU1_GPO1 + pru1_endat0_out + Channel 0 transmit +
PRG0_PRU1_GPO2 + pru1_endat0_outen + Channel 0 transmit enable +
PRG0_PRU1_GPI13 + pru1_endat0_in + Channel 0 receive +
PRG0_PRU1_GPO3 + pru1_endat1_clk + Channel 1 clock +
PRG0_PRU1_GPO4 + pru1_endat1_out + Channel 1 transmit +
PRG0_PRU1_GPO5 + pru1_endat1_outen + Channel 1 transmit enable +
PRG0_PRU1_GPI14 + pru1_endat1_in + Channel 1 receive +
PRG0_PRU1_GPO6 + pru1_endat2_clk + Channel 2 clock +
PRG0_PRU1_GPO12 + pru1_endat2_out + Channel 2 transmit +
PRG0_PRU1_GPO8 + pru1_endat2_outen + Channel 2 transmit enable +
PRG0_PRU1_GPI11 + pru1_endat2_in + Channel 2 receive +
GPIO42 + endat_en + Onboard RS485 receive enable +
+\cond SOC_AM243X +##### AM243x-LP Booster Pack Pin-Multiplexing + + + + + + + + + + + + + +
Pin name + Signal name + Function +
PRG0_PRU1_GPO0 + pru1_endat0_clk + Channel 0 clock +
PRG0_PRU1_GPO1 + pru1_endat0_out + Channel 0 transmit +
PRG0_PRU1_GPO2 + pru1_endat0_outen + Channel 0 transmit enable +
PRG0_PRU1_GPI13 + pru1_endat0_in + Channel 0 receive +
GPIO Pin(GPIO1_78) + ENC1_EN + Enbale endat mode in Axis 1 of BP (C16 GPIO pin) +
+\endcond \ No newline at end of file diff --git a/docs_src/docs/api_guide/components/position_sense/hdsl.md b/docs_src/docs/api_guide/components/position_sense/hdsl.md new file mode 100644 index 0000000..7c2db5f --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/hdsl.md @@ -0,0 +1,59 @@ +# HDSL {#HDSL} + +[TOC] + +## Introduction + +The HDSL firmware running on ICSS-PRU provides a defined well interface to execute the HDSL protocol. + +## Features Supported + +- Safe position +- Fast position, speed +- Communication status +- External pulse synchronization +- Register interface to be compatible with SICK HDSL FPGA IP Core (apart from the differences listed in \ref HDSL_EXCEPTIONS_LIST) +- Parameter channel communication + - Short message + - Long message +- Safety +- Two channels support on am243x-evm +- Single channel support on am243x-lp +- Tested with three different encoder makes (EDM35, EKS36, EKM36) + +## Features Not Supported + +In general, peripherals or features not mentioned as part of "Features Supported" section are not +supported, including the below + - 100m cable + - Three channel support using single PRU-ICSSG slice + - Pipeline Channel + ## SysConfig Features + +@VAR_SYSCFG_USAGE_NOTE + +SysConfig can be used to configure things mentioned below: +- Selecting the ICSSG0PRUx instance.(Tested on ICSSG0-PRU1) +- Configuring PINMUX +- Channel selection +- Mode Selection (Free run/Sync mode) +- Hardware selection (Booster Pack for am243x-lp) + +## HDSL Design + +\subpage HDSL_DESIGN explains the design in detail. + +## Register List + +\subpage HDSL_REGISTER_LIST contains the description of registers in TI's HDSL implementation. Please note that all the corresponding register fields are not implemented. + +## Exceptions + +\subpage HDSL_EXCEPTIONS_LIST lists the exceptions TI's HDSL implementation when compared with SICK HDSL FPGA IP Core. Please note that all the corresponding register fields are not implemented. + +## Example + +\ref EXAMPLE_MOTORCONTROL_HDSL + +## API +\ref HDSL_API_MODULE \ No newline at end of file diff --git a/docs_src/docs/api_guide/components/position_sense/hdsl_design.md b/docs_src/docs/api_guide/components/position_sense/hdsl_design.md new file mode 100644 index 0000000..6241868 --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/hdsl_design.md @@ -0,0 +1,143 @@ +# HDSL Protocol Design {#HDSL_DESIGN} + +[TOC] + +## Introduction + +This document presents the firmware implementation details of the Hiperface DSL protocol (SICK STEGMANN, 2010) for the PRU0 in ICSS0 on the AM64x/AM243x EVM. + +## System Overview + +### Sitara™ AM64x/AM243x Processor + +Refer TRM for details + +#### PRU-ICSS + +Refer PRU-ICSS chapter of AM64x/AM243x Technical Reference Manual + +## Software Architecture + +The firmware consists of two layers .On the one hand, there is the datalink layer, which is responsible for establishing a communication link to the encoder, monitoring the connection quality and preparing the data. +On the other hand, there is the transport layer that processes the data and determines what information is sent over the parameter channel. Figure "Layer Model" illustrates the relationship between the two layers. +The datalink layer assembles the information from the different channels and puts the data symbol by symbol to the channel buffers. The channel buffers are large enough to carry the data of a whole V-Frame for each channel. . +The transport layer controls the data sent over the parameter channel by setting the symbol to send for the next H-Frame in the parameter channel buffer. This buffer can carry only one symbol. +Both layers have direct access to the register interface that is provided to the higher layers. + + +\image html hdsl_layer_model.png "Layer Model " + +Hiperface DSL specifies a state machine for the Receiver. This implementation features an additional state for loading new firmware to the PRU. Figure "State Machine" depicts the modified state machine. +Furthermore, this implementation exhibits three code sections in the firmware. The first one is for initializing the state machine up to the LOADFW state. + +\image html hdsl_state_machine.png "State Machine" + +The second section contains datalink functionalities that are needed for the startup phase as well as for the normal workflow. The transport layer functionalities reside in the third section. + +### Datalink Layer + +The datalink layer is responsible for handling the communication link to the encoder. This includes the sampling, cable delay compensation, DC line balancing, encoding and decoding of data and the monitoring of the connection quality. + +#### Sampling +During the reception of the salve answer, the SCU oversamples the data by factor 8. This allows the firmware to compensate signal deficits, such as delay. During the LEARN state the receiver calculates the sample edge based on the first received bit. +Assuming the oversampled data is exactly aligned with one bit, the best position for the sample edge would be either bit 3 or bit 4. An unalignment of the oversampled data with the actual bit results in a shift of the sample edge. The unalignment can be measured by counting the number of ‘1’ in the data, whereas a count of 4 equals the worst alignment and a count of 0 or 8 equals perfect alignment. The number of ’1’ (n) in the oversampled data is determined using a LUT and the following calculation provides the position for the sample edge (E): + +E=(4+n)%8 + +\image html hdsl_sampling.png "Sampling" + +#### Delay Measurement and Compensation +During the LEARN state the encoder sends a test pattern to the receiver. This is used to determine the cable delay. While the test pattern is sent, the receiver records all incoming bits and searches for the beginning of the test pattern. The offset, where the test pattern starts, is the cable delay in units of bits. + +\image html hdsl_test_pattern.png "Test Pattern" + +After the cable delay is measured, the receiver uses this knowledge to compensate the cable delay in subsequent states. This is performed by waiting for the calculated amount of bits as soon as the encoder answer window starts. The next bit on the line is the first bit of the actual encoder answer. + +#### Data Encoding and Decoding +The datalink layer has the responsibility to decode and encode the data according to an 8b/10b scheme (Franaszek, 1983). The 8b/10b encoding/decoding is split into two parts, 3b/4b and 5b/6b encoding/decoding. Each of the encoding and decoding processes is performed by using a LUT. Hiperface DSL assumes a transmission with LSB first. Therefore, in the encoding procedure, the index of the LUT is in MSB first order, while the LUT entries are in LSB first order (and vice versa when decoding data). This way, the firmware does not need to handle the reversing of the bit order. When encoding the data, the firmware handles the sending of the correct polarity of the sub-blocks using the measured line disparity. +During receive, the firmware detects byte errors and special characters by checking the received encoded data according to the paper (Franaszek, 1983) + +#### Received Signal Strength Indication (RSSI) + +The RSSI is calculated by determining the number of samples between two edges during a bit period. The samples that form the longest sequence between two edges represent the stable bit period, which is used to calculate the RSSI. Instead of calculating the stable period in the firmware, a pre-calculated LUT is utilized to speed up the process. First, the edges in a bit period are determined, which is performed by a XOR operation (Figure: hdsl_rssi)]. The searched RSSI value is looked-up in the table by using the result of the XOR operation as the index. + +\image html hdsl_rssi.png "Test Pattern" + + +#### Cyclic Redundancy Check Algorithm + +A 16bit CRC verification of the data is used on multiple occasions. It is used for the vertical channel, secondary channel and messages. In order to distribute the computation load equally over all H-Frames, the firmware calculates a running CRC for those data (except for short messages). The algorithm uses a LUT with 256 entries and 2 bytes per entry, whereas each entry is the 16bit CRC for the corresponding LUT index. The basic approach for the calculation of the 16bit CRC is shown as C code in the following: + +uint16_t calc_crc(uint8_t *data, uint32_t size) { uint16_t crc = 0; uint32_t i; for(i = 0; i < size; ++i) { crc = ((*data) << 8) ^ crc; crc = lut[crc>>8] ^ (crc << 8); } return (crc ^ 0xff); } + +### Transport Layer + +The transport layer processes the channel information which was prepared by the datalink layer. This includes the calculation of the fast position as well as the handling of messages. + +#### ∆∆Position Estimation +During normal workflow, it can occur that the received ∆∆Position data cannot be used for calculations. This is the case on either a transmission error or an internal encoder error. In order to check for a transmission error, the transport layer checks if the datalink layer detected a byte error and verifies the CRC in the acceleration channel. If no transmission error occurred, the transport layer searches for the occurrence of two K29.7 to recognize an internal encoder error. In case one of the verification of the data fails, the estimation algorithm shown in Figure + +\image html hdsl_delta_pos.png "Estimation Algorithm for ∆∆Position" + + +## Messages +The transport layer handles the messaging. Since it is possible that the higher layers send a long and a short message at the same time, the transport layer has to decide which message to send first. In this implementation short messages are always favored over long messages. + + +### Short Message +Remote (DSL motor feedback system) registers that indicate interface information are mirrored in the DSL Receiver under register addresses 40h to 7Fh. These remote registers are addressed in the same way as DSL Receiver registers. As the values of remote registers are transmitted via the Parameters Channel and hence via the DSL cables, the delay between polling and answer for "short message" transactions depends on the connection cables of the systems in question. There is no delay, as this information is stored directly in the IP-Core S_PC_DATA.. The Parameters Channel can only transmit one "short message" at a time. Several remote registers can only be polled in sequence, i.e. after the previous answer has been received. + +Note: It should be noted that a "short message" can be triggered during a running "long message" transaction. + +## Synchronization with External Pulse {#HDSL_DESIGN_SYNC} +According to the Hiperface DSL specification, the falling edge inside the EXTRA window should coincide with the external synchronization pulse. +At the beginning of the startup phase, the firmware measures the time interval of the external pulse and calculates the required number of bits for the H-Frame. +Based on this number the stuffing length and EXTRA window size is derived. +Afterwards, the PRU waits to match its timing with the timing of the external synchronization pulse and starts the transmission. +Since it is possible to use time intervals for the external pulse that are not multiples of the bit duration, the firmware needs to adjust the H-Frame size on the fly. +Furthermore, during the EXTRA window the PRU transmits the data (sample edge) with a granularity of 13.3ns to increase the synchronization accuracy. Figure "Synchronization of External Pulse with Sample Edge in EXTRA Window" and "Illustration of Synchronization Algorithm" depict the concept. +The EXTRA_TIME_WINDOW is a fixed value that is calculated at startup to match the external pulse frequency. The TIME_REST value gives the number of overclocked ‘1’ that needs to be sent during the last bit of the EXTRA window. + +\imageStyle{hdsl_external_sync.png,width:40%} +\image html hdsl_external_sync.png "Synchronization of External Pulse with Sample Edge in EXTRA Window" + +In other words, the TIME_REST value represents the sample edge in a fine granularity dimension (13.3ns). While the sample edge can be send with a finer granularity, the granularity of the size of the EXTRA window is still in whole bit durations (106.67ns). +Consequently, there is an overhead, if the external pulse period is not a multiple of the bit duration. This overhead is compensated in the next H-Frame by changing the size of the EXTRA window. As a result, the size of the H-Frame is varying over time. +It is possible that these calculations lead to the excess of the maximum or minimum EXTRA window size. Therefore, the number of bits for the stuffing and EXTRA window is readjusted on a violation. + +\imageStyle{hdsl_sync_algo.png,width:40%} +\image html hdsl_sync_algo.png "Illustration of Synchronization Algorithm" + +The algorithm is given as C code in the following: + + /* EXTRA_SIZE equals the number of bits for the EXTRA window minus 1 */ + if(EXTRA_EDGE == 0) + TIME_REST += 8; + short b = (EXTRA_SIZE << 3) + TIME_REST; + short overhead = (EXTRA_SIZE << 3) + 8 - TIME_EXTRA_WINDOW; + EXTRA_SIZE = (b - overhead) >> 3; + TIME_REST = (b - overhead) - (EXTRA_SIZE << 3); + + if(EXTRA_SIZE < 3) { + EXTRA_SIZE += 6; + NUM_STUFFING -= 1; + TIME_EXTRA_WINDOW += (8*6); + } +if(EXTRA_SIZE > 8) { + EXTRA_SIZE -= 6; + NUM_STUFFING += 1; + TIME_EXTRA_WINDOW -= (8*6); + } + + +EXTRA_EDGE represents the TIME_REST value in a format that can be pushed to the TX FIFO for transmission. For instance, if TIME_REST is 4, EXTRA_EDGE is 0xf0. The edge would be in the middle of the bit duration. The value NUM_STUFFING gives the number of stuffing blocks (each block consist of 6 bits). + + +For further improvement of the synchronization, the time difference (∆t) between the external pulse and the sample edge we transmit is measured (Figure "Time difference between External Pulse and Sample Edge"). + +\imageStyle{hdsl_external_sync_sample_edge.png,width:40%} +\image html hdsl_external_sync_sample_edge.png "Time difference between External Pulse and Sample Edge" + +Sync pulse jitter is under 100ns. Please refer to the image below for jitter calculation waveforms. +\image html hdsl_sync_mode_waveforms.png "HDSL Sync mode waveforms for 2 channels" +\image html hdsl_sync_mode_jitter.jpg "HDSL Sync mode jitter analysis" diff --git a/docs_src/docs/api_guide/components/position_sense/hdsl_exceptions_list.md b/docs_src/docs/api_guide/components/position_sense/hdsl_exceptions_list.md new file mode 100644 index 0000000..9c105d3 --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/hdsl_exceptions_list.md @@ -0,0 +1,162 @@ +# TI HDSL Exceptions List {#HDSL_EXCEPTIONS_LIST} + +Notable exceptions in TI HDSL Solution when compared with SICK HDSL MASTER IP Core release version 1.07 are described below: + +1. SPI interface is not available to access the HDSL Master. Registers are present in Data Memory of Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS), which can be accessed directly by the ARM processor core. +2. Pipeline for SensorHub Channel Data is not available. +3. Control signals similar to SICK HDSL MASTER IP Core are not available, except SYNC signal. Instead of INTERRUPT signal, interrupts are triggered to ARM processor core. +4. Test signals similar to SICK HDSL MASTER IP Core are not available. +5. TI HDSL Solution's register map is register compatible with SICK HDSL MASTER IP Core release version 1.07, with few exceptions listed below: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Register(s) + Remarks +
SYS_CTRL Bits 5:0 (FRST, LOOP, PRDY, SPPE, SPOL, OEN) + **Not available in TI HDSL Solution** +
EVENT_H Bit 7 (INT) + **Not available in TI HDSL Solution** +
EVENT_H Bit 1 (DTE)
+ MASK_H Bit 1 (MDTE)
+ ONLINE_STATUS_D_H Bit 1 (DTE) + 		**Not available in TI HDSL Solution** +
EDGES + **Not available in TI HDSL Solution in this release**
+ This will be available in future releases. +
VERSION
+ VERSION2 + 		**Different implementation from SICK HDSL MASTER IP Core**
+ "Major Release Number" field is 4 bits wide instead of 2 bits. "Coding" field is not available. +
RELEASE + **Not available in TI HDSL Solution** +
MIR_SUM + **Not available in TI HDSL Solution**
+ Please see SAFE_SUM (0x36) for getting summary information. +
PIPE_S
+ PIPE_D + 		**Not available in TI HDSL Solution** +
PC_DATA + **Not available in TI HDSL Solution**
+ Please see S_PC_DATA (0x37) for “short message” transactions. +
ACC_ERR_CNT + **Different implementation from SICK HDSL MASTER IP Core**
+ - This register gives the count of transmitted fast position values with consecutive transmission errors. + - Writing to this register does not set any threshold for setting an error signal. ACC_ERR_CNT_TRESH (0x41) register allows triggering protocol reset if ACC_ERR_CNT crosses a threshold. + - This count is a 8 bit value. +
MAXACC
+ MAXDEV + 		**Not available in TI HDSL Solution** +
ENC2_ID + **Not available in TI HDSL Solution** +
EVENT_S Bit 7 (SINT) + **Not available in TI HDSL Solution** +
POSTX
+ ONLINE_STATUS_D_L Bits 7:6 (POSTX)
+ ONLINE_STATUS_1_L Bits 7:6 (POSTX)
+ ONLINE_STATUS_2_L Bits 7:6 (POSTX) + 		**Different implementation from SICK HDSL MASTER IP Core**
+ POSTX bits are available in a separate register POSTX register (0x4F) instead of ONLINE_STATUS_D_L, ONLINE_STATUS_1_L and ONLINE_STATUS_2_L registers. +
ONLINE_STATUS_D_H Bit 7 (INT)
+ ONLINE_STATUS_1_H Bit 7 (SINT) + 		**Not available in TI HDSL Solution** +
ONLINE_STATUS_D_H Bit 6 (SUM) + **Different implementation from SICK HDSL MASTER IP Core**
+ SAFE_SUM is used instead of MIR_SUM. +
VERSION2
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x44 instead of 0x0B +
+ ENC2_ID
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x45 instead of 0x0F +
+ STATUS2
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x46 instead of 0x18 +
+ VPOS24
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x47 instead of 0x19 +
+ VPOS23
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x48 instead of 0x1A +
+ VPOS22
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x49 instead of 0x1B +
+ VPOS21
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x4A instead of 0x1C +
+ VPOS20
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x4B instead of 0x1D +
+ VPOSCRC2_H
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x4C instead of 0x1E +
+ VPOSCRC2_L
+ 		**Register address is different from SICK HDSL MASTER IP Core**
+ TI implementation uses 0x4D instead of 0x1F +
+ +6. Reset values of registers are not same as SICK HDSL MASTER IP Core. +7. As registers are implemented using Data Memory of Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS), the application has a read-write access for all registers. +8. When safe position is invalid (VPOS bit is set in EVENT_S), 0xFDFDFDFDFD value is not set in fast and safe position registers. + diff --git a/docs_src/docs/api_guide/components/position_sense/hdsl_registers_list.md b/docs_src/docs/api_guide/components/position_sense/hdsl_registers_list.md new file mode 100644 index 0000000..952ad3c --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/hdsl_registers_list.md @@ -0,0 +1,1924 @@ +# TI HDSL Register List {#HDSL_REGISTER_LIST} + +TI HDSL Solution's register map is compatible with SICK HDSL MASTER IP Core release version 1.07, with few exceptions marked with "Not available in TI HDSL Solution", or "Different implementation from SICK HDSL MASTER IP Core", or "Register address is different from SICK HDSL MASTER IP Core" in below table. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Register name + Register offset + Bit/s + Description +
SYS_CTRL + 0x00 + + System Control +
+ + 7 + PRST: Protocol reset + - 0 = Normal protocol action + - 1 = A forced reset of the protocol status will be initiated. If the bit is deleted, a restart of the connection is triggered. +
+ + 6 + MRST: Messages reset + - 0 = Normal Parameters Channel action + - 1 = The Parameters Channel is reset. Current short and long messages are discarded. +
+ + 5 + FRST: Pipeline FIFO, reset
**NOTE : Not available in TI HDSL Solution** +
+ + 4 + LOOP: Test drive interface
**NOTE : Not available in TI HDSL Solution** +
+ + 3 + PRDY: POS_READY mode
**NOTE : Not available in TI HDSL Solution** +
+ + 2 + SPPE: SPI-PIPE activation
**NOTE : Not available in TI HDSL Solution** +
+ + 1 + SPOL: Polarity of the synchronization pulse
**NOTE : Not available in TI HDSL Solution** +
+ + 0 + OEN: Activation of the output
**NOTE : Not available in TI HDSL Solution** +
SYNC_CTRL + 0x01 + + Synchronization Control +
+ + 7:0 + ES: External synchronization + - 0 = Position sampling during free running at the shortest cycle time. + - All other values = Position sampling with the sync signal synchronized. The value from ES determines the number of position samplings carried out in one sync cycle. +
MASTER_QM + 0x03 + + Quality Monitoring +
+ + 7 + LINK: DSL protocol connection status + - 0 = No connection present or connection error due to a communications error. + - 1 = Protocol connection between DSL Master and Slave was established. +
+ + 6:4 + **NOTE** : Reserved (Read as \"0\") +
+ + 3:0 + Quality monitoring value + - Quality monitoring is initiated with the value "8". + - The maximum quality monitoring value is "15". This is the standard value during operation. + - Higher values indicate a better connection. +
EVENT_H + 0x04 + + Events (High Byte) + - It contains the messaging bits for warning and error modes of the DSL system. + - All messaging bits are set by the DSL Master if a corresponding status is determined. + - An event bit that has been set is not reset by the DSL Master. + - It should be noted that all event register bits are also transferred to ONLINE_STATUS_D register. The event bits are not static there and contain the actual status of each individual event. +
+ + 7 + INT: Interrupt status
**NOTE : Not available in TI HDSL Solution** +
+ + 6 + SUM: Remote event monitoring + - 0 = All DSL Slave events are deleted. + - 1 = The DSL Slave has signaled an event and the summary mask is set accordingly (see registers MASK_SUM and SUMMARY). + + When the SUM bit is set, an error or a warning has been transmitted from the DSL Slave. The application must check the SUMMARY register to obtain a detailed description. +
+ + 5:4 + **NOTE** : Reserved (Read as \"0\") +
+ + 3 + POS: Estimator turned on + - 0 = The data for the fast position was correctly transmitted. + - 1 = Fast position data consistency error. The fast position read through drive interface is supplied by the estimator. + This error usually indicates a transmission error on the DSL connection. If this error occurs frequently, the wiring of the DSL connection should be checked. If this error occurs continuously, there is probably an error in the motor feedback system. +
+ + 2 + **NOTE** : Reserved (Read as \"0\") +
+ + 1 + DTE: Estimator Deviation Threshold Error + - 0 = Current value of deviation smaller than the specified maximum. + - 1 = Current value of deviation greater than the specified maximum. +
**NOTE : Not available in TI HDSL Solution.** +
+ + 0 + PRST: Protocol reset warning + - 0 = Normal protocol action + - 1 = The forced protocol reset was triggered. +
EVENT_L + 0x05 + + Events (Low Byte) + - It contains the messaging bits for warning and error modes of the DSL system. + - All messaging bits are set by the DSL Master if a corresponding status is determined. + - An event bit that has been set is not reset by the DSL Master. + - It should be noted that all event register bits are also transferred to ONLINE_STATUS_D register. The event bits are not static there and contain the actual status of each individual event. +
+ + 7:6 + **NOTE** : Reserved (Read as \"0\") +
+ + 5 + MIN: Message initialization + - 0 = No acknowledgment for the initialization received. + - 1 = An acknowledgment was received from the Slave for the initialization of a message. + + When this warning is displayed, the Parameters Channel is still in the initialization status and no "short message" or "long message" can be triggered. +
+ + 4 + ANS: Erroneous answer to "long message" + - 0 = The last answers to "long messages" were error free. + - 1 = An error occurred during the answer to a long message. The effectiveness of the previous transaction is not known. + + This error indicates that the transmission of an answer from the DSL Slave to the last "long message" failed. The application must send the "long message" again. +
+ + 3 + **NOTE** : Reserved (Read as \"0\") +
+ + 2 + QMLW: Quality monitoring low value warning + - 0 = Quality monitoring value greater than or equal to "14" + - 1 = Quality monitoring value (see register 03h) below "14" +
+ + 1 + FREL: Channel free for "long message" + - 1 = A "long message" can be sent on the Parameters Channel. + - 0 = No "long message" can be sent. + + If the bit is set, the application can trigger a "long message". Provided no answer has been received from the DSL Slave, this bit remains deleted. As the processing duration of a "long message" in the motor feedback system is not specified, a user time limit condition should be installed via the application. When a time limit is exceeded, the MRST bit in the SYS_CTRL register is set, which causes the Parameters Channel to be reset. +
+ + 0 + **NOTE** : Reserved (Read as \"0\") +
MASK_H + 0x06 + + Event mask (High Byte) + - In the event mask registers MASK_H/MASK_L, the events are set with which the event interrupt is set. + - Several events can be masked to trigger an event interrupt. +
+ + 7 + **NOTE** : Reserved (Read as \"0\") +
+ + 6 + MSUM: Mask for remote event monitoring + - 0 = DSL Slave events that are masked in the SUMMARY register do not set the event interrupt. + - 1 = DSL Slave events that are masked in the SUMMARY register set the event interrupt. +
+ + 5:4 + **NOTE** : Reserved (Read as \"0\") +
+ + 3 + MPOS: Mask for fast position error + - 0 = An error in the fast position does not set the event interrupt. + - 1 = An error in the fast position sets the event interrupt. +
+ + 2 + **NOTE** : Reserved (Read as \"0\") +
+ + 1 + MDTE: Mask for estimator deviation threshold error warning + - 0 = A high deviation threshold error value does not set the event interrupt. + - 1 = A high estimator deviation threshold error sets the event interrupt. +
**NOTE : Not available in TI HDSL Solution.** +
+ + 0 + MPRST: Mask for protocol reset warning + - 0 = A protocol reset does not set the event interrupt. + - 1 = A protocol reset sets the event interrupt. +
MASK_L + 0x07 + + Event mask (Low Byte) + - In the event mask registers MASK_H/MASK_L, the events are set with which the event interrupt is set. + - Several events can be masked to trigger an event interrupt. +
+ + 7:6 + **NOTE** : Reserved (Read as \"0\") +
+ + 5 + MMIN: Mask for message initialization confirmation + - 0 = The acknowledgment for the initialization of a DSL Slave message does not set the event interrupt. + - 1 = The acknowledgment for the initialization of a DSL Slave message sets the event interrupt. +
+ + 4 + MANS: Mask for erroneous answer to long message + - 0 = A transmission error during the answer to a long message does not set the event interrupt. + - 1 = A transmission error during the answer to a long message sets the event interrupt. +
+ + 3 + **NOTE** : Reserved (Read as \"0\") +
+ + 2 + MQMLW: Mask for low quality monitoring value warning + - 0 = A low quality monitoring value does not set the event interrupt. + - 1 = A low quality monitoring value (see registers MASTER_QM and EVENT_L) sets the event interrupt. +
+ + 1 + MFREL: Mask for "channel free for "long message" + - 0 = If a "long message" can be sent on the Parameters Channel, the event interrupt is not set. + - 1 = If a "long message" can be sent on the Parameters Channel, the event interrupt is set. +
+ + 0 + **NOTE** : Reserved (Read as \"0\") +
MASK_SUM + 0x08 + + Summary mask + - In this register, the DSL Slave collective events are determined with which the SUM event monitoring in the event register as well as the signal to the interrupt pin are set (interrupt). +
+ + 7:0 + MSUM7:MSUM0: Mask for status summary bits + - 0 = In the set status, the corresponding status summary bit does not set the SUM event monitoring and the signal at the interrupt pin. + - 1 = In the set status, the corresponding status summary bit sets the SUM event monitoring and the signal at the interrupt pin. +
EDGES + 0x09 + + Edges + - This register contains the time control for the DSL cable bit sampling and can be used to monitor the connection quality. + - Each individual edge register bit is set if, at system start-up, an edge of the test signal is detected during the time period of the corresponding bit. An edge is defined as a change in cable value between successive detections. + - The sampling is carried out eight times as fast as the cable bit rate. + - Clean cable signals mean that only a few bits are set in the edge register, whilst noisy cable signals set a large number of bits. +
**NOTE : Not available in TI HDSL Solution in this release** +
+ + 7:0 + Bit sampling pattern: Identification of edges in the cable signal + - 0 = No edge was detected in the time period of the corresponding bit. + - 1 = An edge was detected in the time period of the corresponding bit. +
DELAY + 0x0A + + Run time delay / RSSI +
+ + 7:4 + Cable delay + - 4 bit value for cable delay, which gives the cable signal round trip delay of cable and transceivers in bits. + - This value enables a rough estimate of cable length to be made. + - The value for Line Delay does not change after the start-up phase. A fresh value for Line Delay is only measured after a forced reset of the protocol. + + + + + + + + + + + + + + + + + + + + + + + +
Cable Delay + DSL Connection Cable Delay (ns) + DSL Connection Cable Length (m) +
0 + < 100 + < 10 +
1 + 100-200 + 10-20 +
2 + 200-300 + 20-30 +
3 + 300-400 + 30-40 +
4 + 400-500 + 40-50 +
5 + 500-600 + 50-60 +
6 + 600-700 + 60-70 +
7 + 700-800 + 70-80 +
8 + 800-900 + 80-90 +
9 + 900-1000 + 90-100 +
+
+ + 3:0 + RSSI: Indication of the received signal strength + - 4 bit value for the cable signal strength, from "0" to "12". + - Higher values indicate better connection quality. + - RSSI is continuously updated during operation and used for signal monitoring during run time. +
VERSION + 0x0B + + Version +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** +
+ + 7:4 + Major Release Number +
+ + 3:0 + Minor Release Number +
RELEASE + 0x0C + + Release Date +
**NOTE : Not available in TI HDSL Solution** +
ENC_ID2 + 0x0D + + Encoder ID (Byte 2)
+ The ENC_ID registers (ENC_ID2, ENC_ID1 and ENC_ID0) contain the designation code of the motor feedback system connected to the DSL Master. In the current protocol specification, the designation code is 20 bits long. +
+ + 7 + **NOTE** : Reserved (Read as \"0\") +
+ + 6:4 + SCI: Indication of special characters +
+ + 3 + Continue + - 1 = ENC_ID is longer than 20 bits (for future use). +
+ + 2:0 + **NOTE** : Reserved (Read as \"0\") +
ENC_ID1 + 0x0E + + Encoder ID (Byte 1) +
+ + 7:4 + User defined encoder index +
+ + 3 + **NOTE** : Reserved (Read as \"0\") +
+ + 2 + Sign + - 0 = Position value is signed. + - 1 = Position value is not signed. +
+ + 1:0 + Higher 2 bits of length of position information minus length of the acceleration value transmitted. +
ENC_ID0 + 0x0F + + Encoder ID (Byte 0) +
+ + 7:4 + Lower 4 bits of length of position information minus length of the acceleration value transmitted. +
+ + 3:0 + Length of the acceleration value transmitted minus 8. +
POS4 + 0x10 + + Fast Position (Byte 4)
+ - The POS registers for the fast position contain the value of the motor feedback system connected. + - This position is generated incrementally from the safe position at start-up and is updated with every protocol frame. + - After every eight protocol frames, the fast position is checked against the safe position (see registers 0x18 to 0x1C). + - The position sampling point is determined by the ES value of the synchronization control register. + - Only those POS bits are activated that lie within the range that the motor feedback system has actually measured. All other higher value bits are read as "0". + - The number of measurable bits can be taken from ENC_ID bits 9 to 0 in the ENC_ID0 and ENC_ID1 registers. + - If Sign is set in the ENC_ID1 register, the value of the fast position is given signed in the two's complement. + - The units of the position value are (steps). + + **NOTE** : The fast position must not be used for safety functions. +
+ + 7:0 + Byte 4 of fast position value of the motor feedback system (length: 40 bits), incrementally generated +
POS3 + 0x11 + + Fast Position (Byte 3) +
+ + 7:0 + Byte 3 of fast position value of the motor feedback system (length: 40 bits), incrementally generated +
POS2 + 0x12 + + Fast Position (Byte 2) +
+ + 7:0 + Byte 2 of fast position value of the motor feedback system (length: 40 bits), incrementally generated +
POS1 + 0x13 + + Fast Position (Byte 1) +
+ + 7:0 + Byte 1 of fast position value of the motor feedback system (length: 40 bits), incrementally generated +
POS0 + 0x14 + + Fast Position (Byte 0) +
+ + 7:0 + Byte 0 of fast position value of the motor feedback system (length: 40 bits), incrementally generated +
VEL2 + 0x15 + + Speed (Byte 2)
+ - The VEL speed registers contain the speed values of the connected motor feedback system. + - This value is calculated as a delta position from the acceleration value (delta-delta position) transmitted on the process data channel and the currently updated protocol frame. + - The speed sampling point is determined by the ES value of the SYNC_CTRL register. + - The units of the speed value are (steps/frame cycle time). + + **NOTE** : The speed value must not be used for safety functions. +
+ + 7:0 + Byte 2 of speed of the motor feedback system (length: 24 bits) +
VEL1 + 0x16 + + Speed (Byte 1) +
+ + 7:0 + Byte 1 of speed of the motor feedback system (length: 24 bits) +
VEL0 + 0x17 + + Speed (Byte 0) +
+ + 7:0 + Byte 0 of speed of the motor feedback system (length: 24 bits) +
MIR_SUM + 0x18 + + Mirror Summary +
**NOTE : Not available in TI HDSL Solution. Please see SAFE_SUM (0x36) for getting summary information** +
VPOS4 + 0x19 + + Safe Position, Channel 1 (Byte 4) + - The VPOS registers for the safe position contain the position value from the primary channel of the motor feedback system connected. + - This safe position is transmitted in every eighth protocol frame. + - Only those VPOS bits are activated that lie within the range that the motor feedback system has actually measured. All other higher value bits are read as "0". + - The number of measurable bits can be taken from ENC_ID bits 9 to 0 in the ENC_ID0 and ENC_ID1 registers. + - If Sign is set in the ENC_ID1 register, the value of the fast position is given signed in the two's complement. + - The units of the position value are (steps). + - The safe position will have the same data format as the fast position. +
+ + 7:0 + Byte 4 of position value transmitted through Safe Channel 1 (length: 40 bits), absolute value. +
VPOS3 + 0x1A + + Safe Position, Channel 1 (Byte 3) +
+ + 7:0 + Byte 3 of position value transmitted through Safe Channel 1 (length: 40 bits), absolute value. +
VPOS2 + 0x1B + + Safe Position, Channel 1 (Byte 2) +
+ + 7:0 + Byte 2 of position value transmitted through Safe Channel 1 (length: 40 bits), absolute value. +
VPOS1 + 0x1C + + Safe Position, Channel 1 (Byte 1) +
+ + 7:0 + Byte 1 of position value transmitted through Safe Channel 1 (length: 40 bits), absolute value. +
VPOS0 + 0x1D + + Safe Position, Channel 1 (Byte 0) +
+ + 7:0 + Byte 0 of position value transmitted through Safe Channel 1 (length: 40 bits), absolute value. +
VPOSCRC_H + 0x1E + + Position checksum, Channel 1 (High Byte) + - The VPOSCRC registers for the position checksum contain the CRC checksum of the safe position VPOS and the SUMMARY status. + - The CRC is checked in the DSL Master IP Core. + - In order to guarantee, in a safety related application, that the CRC machine in the IP Core is functioning, these registers can be checked with an external cross check in the diagnostics test interval. + - The CRC is generated with the following CRC parameters: + - CRC Sequence : 16 Bit + - CRC Polynomial : 0xC86C (x16 + x15 + x12 + x7 + x6 + x4 + x3 + 1), Normal representation: 0x90D9 + - Starting Value : 0x0000 + - Closing XOR Value : 0x00FF + - Reverse Data Bytes : No + - Reverse CRC before closing XOR : No + - Sequence of the bytes for calculation : SAFE_SUM, VPOS4, VPOS3, VPOS2, VPOS1, VPOS0 +
+ + 7:0 + Byte 1 of 16 bit CRC checksum (CRC 16) of the safe position and status summary in Safe Channel 1. +
VPOSCRC_L + 0x1F + + Position checksum, Channel 1 (Low Byte) +
+ + 7:0 + Byte 0 of 16 bit CRC checksum (CRC 16) of the safe position and status summary in Safe Channel 1. +
PC_BUFFER0 + 0x20 + + Parameters Channel Buffer (Byte 0) + - The eight PC_BUFFER registers of the Parameters Channel buffer contain the answer to the last "long message" request or the data for a "long message" write operation. + - Depending on the length of the "long message" answer, the registers are used as follows: + + + + + + + + + + + +
Length of the "long message" + Registers used +
8 bytes + 0x20 to 0x27 +
4 bytes + 0x20 to 0x23 +
2 bytes + 0x20 to 0x21 +
0 bytes + None +
+ - These registers are also for the reporting of error conditions arising from a "long message" operation. If, when accessing a resource, an error due to a "long message" arises (e.g. invalid data, error in the A/D conversion), after the answering message has been received the LOFF bit in the PC_ADD_H register (28h) is set. In this case the Parameters Channel buffer bytes 0 and 1 contain an error code. + - The meaning of the error code depends on the particular encoder. +
+ + 7:0 + Byte 0 of 8 bytes for the answer to a long message (read operation) or for a "long message" write operation; or
+ Byte 0 of 2 bytes for reports about errors in encoder resources arising from the previous "long message" operation. +
PC_BUFFER1 + 0x21 + + Parameters Channel Buffer (Byte 1) +
+ + 7:0 + Byte 1 of 8 bytes for the answer to a long message (read operation) or for a "long message" write operation; or
+ Byte 1 of 2 bytes for reports about errors in encoder resources arising from the previous "long message" operation. +
PC_BUFFER2 + 0x22 + + Parameters Channel Buffer (Byte 2) +
+ + 7:0 + Byte 2 of 8 bytes for the answer to a long message (read operation) or for a "long message" write operation. +
PC_BUFFER3 + 0x23 + + Parameters Channel Buffer (Byte 3) +
+ + 7:0 + Byte 3 of 8 bytes for the answer to a long message (read operation) or for a "long message" write operation. +
PC_BUFFER4 + 0x24 + + Parameters Channel Buffer (Byte 4) +
+ + 7:0 + Byte 4 of 8 bytes for the answer to a long message (read operation) or for a "long message" write operation. +
PC_BUFFER5 + 0x25 + + Parameters Channel Buffer (Byte 5) +
+ + 7:0 + Byte 5 of 8 bytes for the answer to a long message (read operation) or for a "long message" write operation. +
PC_BUFFER6 + 0x26 + + Parameters Channel Buffer (Byte 6) +
+ + 7:0 + Byte 6 of 8 bytes for the answer to a long message (read operation) or for a "long message" write operation. +
PC_BUFFER7 + 0x27 + + Parameters Channel Buffer (Byte 7) +
+ + 7:0 + Byte 7 of 8 bytes for the answer to a long message (read operation) or for a "long message" write operation. +
PC_ADD_H + 0x28 + + Long message address (High Byte) + - The addresses and the addressing mode for "long messages" sent over the Parameters Channel are determined in the PC_ADD_H/PC_ADD_L long message address registers. + - In addition, the long message address register 0x28 (PC_ADD_H) contains indications of errors arising from "long message" operations. For this sort of error, the Parameters Channel buffer contains the error code in bytes 0 and 1 associated with this status. +
+ + 7 + **NOTE** : Reserved (Read as \"0\") +
+ + 6 + LRW: Long message, read/write mode + - 0 = "Long message" write operation + - 1 = "Long message" read operation +
+ + 5 + LOFF: Long message addressing mode/long message error + - Write Access + - 0 = Addressing of "long messages" without offset. The offset value from the PC_OFF_H/PC_OFF_Lregisters is not used. + - 1 = Offset addressing of "long messages". The offset value from the PC_OFF_H/PC_OFF_L registers is used in the resource of the selected database entry as a sub-address. + - Read Access + - 0 = The last "long message" was correctly processed. + - 1 = The last "long message" caused an error. +
+ + 4 + LIND: Indirect addressing of long messages + - 0 = Direct addressing of "long messages". The operation affects the database entry given in the current address. + - 1 = Indirect addressing of "long messages". During this operation, the stored address content in the given database entry is evaluated. +
+ + 3:2 + LLEN: Data length of the "long message" + - 00 = No data bytes + - 01 = 2 data bytes + - 10 = 4 data bytes + - 11 = 8 data bytes +
+ + 1:0 + Bits 9:8 of 10 bit address for a "long message" operation +
PC_ADD_H + 0x29 + + Long message address (Low Byte) +
+ + 7:0 + Bits 7:0 of 10 bit address for a "long message" operation +
PC_OFF_H + 0x2A + + Long message address offset (High Byte) + - The PC_OFF_H/PC_OFF_L address offset registers for long messages are used in "long message" operations, if LOFF is set in the register 0x28. + - In this case the LOFFADD value from these registers is used to communicate with the sub-address of a multiple byte encoder resource. +
+ + 7 + LID: Long message identification. + The value must be "1". +
+ + 6:0 + LOFFADD (14:8) : Long message offset value + Bits 14:8 of the 15 bit offset value of the "long message" address offset is stored in these bits. +
PC_OFF_L + 0x2B + + Long message address offset (Low Byte) +
+ + 7:0 + LOFFADD (7:0) : Long message offset value + Bits 7:0 of the 15 bit offset value of the "long message" address offset is stored in these bits. +
PC_CTRL + 0x2C + + Parameters Channel Control + - This register for the Parameters Channel handles the start of "long message" transactions. After setting all "long message" registers (registers PC_BUFFER0 to 7, PC_ADD_H/PC_ADD_L and PC_OFF_H/L), the "long message" is transmitted to the DSL Slave by setting the LSTA bit. +
+ + 7:1 + **NOTE** : Reserved (Read as \"0\") +
+ + 0 + LSTA: Control of the long message start + - 0 = No effect. + - 1 = A "long message" transaction is started with the values currently stored in the "long message" registers. +
PIPE_S + 0x2D + + SensorHub Channel Status +
**NOTE : Not available in TI HDSL Solution** +
PIPE_D + 0x2E + + SensorHub Channel Data +
**NOTE : Not available in TI HDSL Solution** +
PC_DATA + 0x2F + + "Short message" Mirror Register +
**NOTE : Not available in TI HDSL Solution. Please see S_PC_DATA (0x37) for “short message” transactions.** +
RESERVED + 0x34, 0x33, 0x32, 0x31, 0x30 + + **NOTE** : Reserved for future use +
SAFE_CTRL + 0x35 + + Safe System Control +
+ + 7 + PRST: Protocol reset + - 0 = Normal protocol action. + - 1 = A forced reset of the protocol status will be initiated. If the bit is deleted, a restart of the connection is triggered. +
+ + 6 + MRST: Messages reset + - 0 = Normal Parameters Channel action. + - 1 = The Parameters Channel is reset. Current short and long messages are discarded. +
+ + 5:0 + **NOTE** : Reserved (Read as \"0\") +
SAFE_SUM + 0x36 + + Safe Summary + - This register contains the summarized DSL Slave status information for the safety related application. + - It is based on the encoder status ENC_ST7:0. + - Each status summary bit contains the summarized information from 8 error, warning and event modes of the DSL Slave. +
+ + 7:1 + SSUM7:SSUM1: Status Summary bit (external resource) + - 0 = The corresponding error, warning or event is not active. + - 1 = An error, a warning or an event associated with DSL Slave external resources was triggered. +
+ + 0 + SSUM0: Status summary bit (interface) + - 0 = The DSL Slave protocol has not triggered an error, a warning or event. + - 1 = An error, a warning or an event associated with the DSL Slave protocol interface was triggered. +
S_PC_DATA + 0x37 + + "Short message" Parameters Channel Data + - This register for the Parameters Channel short message contains the results of “short message” transactions. + - “Short message” transactions are generated if operations are carried out with remote registers (DSL Slave). + - Generally, FRES (in the EVENT_S register) must be set after a transaction is started. Only then will S_PC_DATA contain valid information. +
+ + 7:0 + 8 bit value of the requested remote register. +
ACC_ERR_CNT + 0x38 + + Fast Position Error Counter +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** + - This register gives the count of transmitted fast position values with consecutive transmission errors. + - Writing to this register does not set any threshold for setting an error signal. +
+ + 7:0 + 8 bit value of count of transmitted fast position values with consecutive transmission errors. +
MAXACC + 0x39 + + Fast Position Acceleration Boundary +
**NOTE : Not available in TI HDSL Solution.** +
MAXDEV + 0x3A, 0x3B + + Fast Position Estimator Deviation +
**NOTE : Not available in TI HDSL Solution.** +
RESERVED + 0x3C + + **NOTE** : Reserved for future use +
EVENT_S + 0x3D + + Safe Events + - It contains the messaging bits for warning and error modes of the DSL system. + - All messaging bits are set by the DSL Master if a corresponding status is determined. + - An event bit that has been set is not reset by the DSL Master. + - The safety related application must delete bits that have been set. + - It should be noted that all event register bits are also transferred to Online Status 1. The event bits are not static there and contain the actual status of each individual event. + - The following bit description lists the effects of warning and error conditions as well as the reactions to errors that must be installed in the safety related application. +
+ + 7 + SINT: Safe Interrupt status +
**NOTE** : Not available in TI HDSL Solution. +
+ + 6 + SSUM: Remote event monitoring + - 0 = All DSL Slave events are deleted. + - 1 = The DSL Slave has signaled an event. + + When the bit is set, an error or a warning has been transmitted from the DSL Slave. The safety related application must check the SAFE_SUM register to obtain a detailed description. +
+ + 5 + SCE: Error on the Safe Channel + - 0 = Safe Channel data was correctly transmitted. + - 1 = Data consistency error on the Safe Channel. + + This error usually indicates a transmission error on the DSL connection. If this error occurs frequently, the wiring of the DSL connection should be checked. If this error occurs continuously, there is probably an error in the motor feedback system. This error affects quality monitoring and produces the QMLW warning or a protocol reset. +
+ + 4 + VPOS: Safe position error + - 0 = The safe position is correct. + - 1 = Sensor error. + + This error usually indicates an encoder sensor error. If this error occurs continuously, there is probably an error in the motor feedback system. +
+ + 3 + QMLW: Quality monitoring low value warning + - 0 = Quality monitoring value greater than or equal to “14” + - 1 = Quality monitoring value (see register 0x03) below “14” + + This warning indicates that a transmission error occurred. If this error occurs frequently, the wiring of the DSL connection should be checked. +
+ + 2 + PRST: Protocol reset warning + - 0 = Normal protocol action. + - 1 = The forced protocol reset was triggered. + + This error message indicates that the protocol connection to the DSL Slave has been re-initialized. This error message can be caused by a frequency inverter application request (PRST bit in SYS_CTRL), a safety related application request (PRST bit in SAFE_CTRL), or generated by the DSL Master itself. The DSL Master causes a protocol reset if too many transmission errors indicate a connection problem. A protocol reset causes a re-synchronization with the DSL Slave that can improve the connection quality. +
+ + 1 + MIN: Message init + - 0 = No acknowledgment for the initialization received. + - 1 = An acknowledgment was received from the Slave for the initialization of a message. + + When this warning is displayed, the Parameters Channel is still in the initialization status and no “short message” or “long message” can be triggered. +
+ + 0 + FRES: Channel free for “short message” + - 0 = No “short message” can be sent. + - 1 = A “short message” can be sent on the Parameters Channel. + + If the bit is set, the frequency inverter application can trigger a “short message”. Provided no answer has been received from the DSL Slave, this bit remains deleted. As the processing duration of a “short message” in the motor feedback system is not specified, a time limit condition is installed in the DSL Master. If the time limit is exceeded, attempts are made again automatically. +
MASK_S + 0x3E + + Safe Event Mask + - In the safe event mask register, the events are set with which the safe event interrupt is set. + - Several events can be masked to trigger an safe event interrupt. +
+ + 7 + **NOTE** : Reserved (Read as \"0\") +
+ + 6 + MSSUM: Mask for remote event monitoring + - 0 = DSL Slave events that are set in the SAFE_SUM register do not set the safe event interrupt. + - 1 = DSL Slave events that are set in the SAFE_SUM register set the safe event interrupt. +
+ + 5 + MSCE: Mask for transmission errors on the Safe Channel + - 0 = A transmission error on the Safe Channel does not set the safe event interrupt. + - 1 = A transmission error on the Safe Channel sets the safe event interrupt. +
+ + 4 + MVPOS: Mask for safe position error + - 0 = An error in the safe position does not set the safe event interrupt. + - 1 = An error in the safe position sets the safe event interrupt. +
+ + 3 + MQMLW: Mask for low quality monitoring value warning + - 0 = A low quality monitoring value does not set the safe event interrupt. + - 1 = A low quality monitoring value (see registers 03h and 05h) sets the safe event interrupt. +
+ + 2 + MPRST: Mask for protocol reset warning + - 0 = A protocol reset does not set the safe event interrupt. + - 1 = A protocol reset sets the safe event interrupt. +
+ + 1 + MMIN: Mask for message initialization confirmation + - 0 = The acknowledgment for the initialization of a DSL Slave message does not set the safe event interrupt. + - 1 = The acknowledgment for the initialization of a DSL Slave message sets the safe event interrupt. +
+ + 0 + MFRES: Mask for channel free for “short message” + - 0 = If a “short message” can be sent on the Parameters Channel, the safe event interrupt is not set. + - 1 = If a “short message” can be sent on the Parameters Channel, the safe event interrupt is set. +
RESERVED + 0x3F + + **NOTE** : Reserved for future use +
SLAVE_REG_CTRL + 0x40 + + Short Message Control +
+ + 7 + Short message, read/write mode + - 0 = "Short message" write operation + - 1 = "Short message" read operation +
+ + 6 + **NOTE** : Reserved (Read as \"0\") +
+ + 5:0 + 6 bit address for a “short message” operation +
ACC_ERR_CNT_TRESH + 0x41 + + Fast Position Error Counter Threshold +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** +
+ + 7:0 + 8 bit threshold value for triggering a protocol reset when ACC_ERR_CNT crosses this threshold. +
RESERVED + 0x43, 0x42 + + **NOTE** : Reserved for future use +
VERSION2 + 0x44 + + Version in Safe Channel 2 (Identical to VERSION register) +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x44 instead of 0x0B)** +
+ + 7:4 + Major Release Number +
+ + 3:0 + Minor Release Number +
ENC2_ID + 0x45 + + Encoder ID in Safe Channel 2 +
**NOTE : Not available in TI HDSL Solution** +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x45 instead of 0x0F)** +
STATUS2 + 0x46 + + Safe Channel 2 Status + - This register contains the status information for Safe Channel 2 of the HDSL motor feedback system. + - A summary of the contents is also available in the SUM2 bit of Online Status 2. +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x46 instead of 0x18)** +
+ + 7 + TOG2: Safe Channel 2 toggle bit + For successive position transmissions on Safe Channel 2, TOG2 must always toggle between “0” and “1”. The starting value for TOG2 is “0”. If the toggle bit does not change its value, it is probable that a transmission error occurred and the transmitted absolute value for Safe Channel 2 is invalid. Suitable measures must be installed in the user application. +
+ + 6 + TEST2: Safe Channel 2 has just been tested + TEST2 is set if a test is carried out during the currently available Safe Channel 2 status and position values.TEST2 can only be valid if the user application has previously requested a test. Corresponding error indications for TEST2 are either the ERR2 bit or a discrepancy between the position and the CRC of Safe Channel 2. +
+ + 5 + ERR2: Safe Channel 2, position error + - 0 = The last safe position received in Safe Channel 2 is correct. + - 1 = The last safe position received in Safe Channel 2 is invalid. Suitable measures must be installed in the user application. +
+ + 4:0 + FIX2: Safe Channel 2, fixed bit pattern + The standard value of the fixed bit pattern is “11100”. All other values indicate an error on Safe Channel 2 of the DSL system. Suitable measures must be installed in the user application. +
VPOS24 + 0x47 + + Safe Position, Channel 2 (Byte 4) + - The VPOS2 registers for the safe position contain the position value from the secondary channel of the motor feedback system connected. + - This safe position is transmitted in every eighth protocol frame if the validity of the data transfer has been checked. + - Only those VPOS2 bits are relevant that lie within the range that the motor feedback system has actually measured. + - Also, typically channel 2 has a lower resolution than channel 1. + - The units of the position value are (steps). +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x47 instead of 0x19)** +
+ + 7:0 + Byte 4 of position value at motor feedback system Safe Channel 2 (length: 40 bits), as an absolute value complement. +
VPOS23 + 0x48 + + Safe Position, Channel 2 (Byte 3) +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x48 instead of 0x1A)** +
+ + 7:0 + Byte 3 of position value at motor feedback system Safe Channel 2 (length: 40 bits), as an absolute value complement. +
VPOS22 + 0x49 + + Safe Position, Channel 2 (Byte 2) +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x49 instead of 0x1B)** +
+ + 7:0 + Byte 2 of position value at motor feedback system Safe Channel 2 (length: 40 bits), as an absolute value complement. +
VPOS21 + 0x4A + + Safe Position, Channel 2 (Byte 1) +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x4A instead of 0x1C)** +
+ + 7:0 + Byte 1 of position value at motor feedback system Safe Channel 2 (length: 40 bits), as an absolute value complement. +
VPOS20 + 0x4B + + Safe Position, Channel 2 (Byte 0) +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x4B instead of 0x1D)** +
+ + 7:0 + Byte 0 of position value at motor feedback system Safe Channel 2 (length: 40 bits), as an absolute value complement. +
VPOSCRC2_H + 0x4C + + Position checksum, Channel 2 (High Byte) + - The VPOSCRC2 registers for the position checksum contain the CRC checksum of the safe position VPOS2 and STATUS2. + - The CRC is checked in the DSL Master IP Core. + - In order to guarantee, in a safety related application, that the CRC machine in the IP Core is functioning, these registers can be checked with an external cross check in the diagnostics test interval. + - The CRC is generated with the following CRC parameters: + - CRC Sequence : 16 Bit + - CRC Polynomial : 0xC86C (x16 + x15 + x12 + x7 + x6 + x4 + x3 + 1), Normal representation: 0x90D9 + - Starting Value : 0x0000 + - Closing XOR Value : 0x00FF + - Reverse Data Bytes : No + - Reverse CRC before closing XOR : No + - Sequence of the bytes for calculation : STATUS2, VPOS24, VPOS23, VPOS22, VPOS21, VPOS20 +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x4C instead of 0x1E)** +
+ + 7:0 + Byte 1 of 16 bit CRC checksum (CRC 16)of the safe position and status summary in Safe Channel 2. +
VPOSCRC2_L + 0x4D + + Position checksum, Channel 2 (Low Byte) +
**NOTE : Register address is different from SICK HDSL MASTER IP Core (TI implementation uses 0x4D instead of 0x1F)** +
+ + 7:0 + Byte 0 of 16 bit CRC checksum (CRC 16) of the safe position and status summary in Safe Channel 2. +
POSTX + 0x4E + + Position Transmission Status +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** +
+ + 7:2 + **NOTE** : Reserved (Read as \"0\") +
+ + 1:0 + - 0: Position request is transmitted to the DSL encoder + - 1: Reserved + - 2: Fast position was received or position newly updated by estimator + - 3: Safe position 1 and 2 were received +
RESERVED + 0x4F + + **NOTE** : Reserved for future use +
ONLINE_STATUS_D_H + 0x50 + + Online Status D (High Byte) + - The Online Status D is a non-storing copy of registers EVENT_H and EVENT_L. The static information in these event registers must be deleted by the user after the read process, by writing the value "0" to the corresponding bit in the register, whilst the Online Status D only shows the current status without storing previous indications. +
+ + 7 + INT: Status of the Interrupt output +
**NOTE : Not available in TI HDSL Solution** +
+ + 6 + SUM: Summary byte + - 0 = The last valid value from SAFE_SUM was zero. + - 1 = The last valid value from SAFE_SUM was not zero. The importance of this flag depends on the particular error source that leads to a set SAFE_SUM. +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** +
SAFE_SUM is used instead of MIR_SUM. +
+ + 5 + FIX0: This bit always gives a “0”. +
+ + 4 + FIX1: This bit always gives a “1”. +
+ + 3 + POS: Estimator turned on + - 0 = No fast position error. + - 1 = A source of an error in the fast position was identified or an alignment procedure is currently being carried out. It is probable that the last fast position is invalid. +
+ + 2 + FIX0: This bit always gives a “0”. +
+ + 1 + DTE: Estimator Deviation Threshold Error + - 0 = Current value of deviation smaller than the specified maximum. + - 1 = Current value of deviation greater than the specified maximum. +
**NOTE : Not available in TI HDSL Solution.** +
+ + 0 + PRST: Protocol reset + - 0 = Normal protocol action + - 1 = The forced protocol reset was triggered +
ONLINE_STATUS_D_L + 0x51 + + Online Status D (Low Byte) +
+ + 7:6 + FIX0: This bit always gives a “0”. +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** +
+ + 5 + MIN: Acknowledgment of message initialization + - 0 = Parameter Channel not functioning. + - 1 = The DSL encoder sends a figure by which the initialization of the Parameter Channel is acknowledged. +
+ + 4 + ANS: Incorrect answer detected. + - 0 = No error detected in the last answer to a long message. + - 1 = The last answer to a long message was damaged. +
+ + 3 + FIX0: This bit always gives a “0”. +
+ + 2 + QMLW: Quality monitoring at Low level + - 0 = Current value of quality monitoring greater than or equal to 14. + - 1 = Current value of quality monitoring less than 14. +
+ + 1 + FREL: Channel status for “long message”. + - 0 = The channel for the “long message” is in use. + - 1 = The channel for the “long message” is free. +
+ + 0 + FIX0: This bit always gives a “0”. +
ONLINE_STATUS_1_H + 0x52 + + Online Status 1 (High Byte) + - The Online Status D is a non-storing copy of registers EVENT_S. The static information in the event register must be deleted by the user after the read process, by writing the value "0" to the corresponding bit in the register, whilst the Online Status 1 only shows the current status without storing previous indications. + - All fault indications in Online Status 1 are potentially critical and safety-related. Suitable measures must be installed in the user application. +
+ + 7 + SINT: Status of the Interrupt output +
**NOTE : Not available in TI HDSL Solution** +
+ + 6 + SSUM: Safe Summary bit + - 0 = The last valid value from SAFE_SUM was zero. + - 1 = The last valid value from SAFE_SUM was not zero. The importance of this flag depends on the particular error source that leads to a set SAFE_SUM. +
+ + 5 + SCE: CRC error on the Safe Channel + - 0 = The last Safe Channel 1 CRC received was correct. + - 1 = The last Safe Channel 1 CRC received was wrong. It is expected that the last safe position 1 transmitted is invalid. +
+ + 4 + FIX1: This bit always gives a “1”. +
+ + 3 + FIX0: This bit always gives a “0”. +
+ + 2 + VPOS: Safe position invalid + - 0 = The last safe position received was correct. + - 1 = An error in the safe position was identified. It is expected that the safe position transmitted from the encoder is invalid. +
+ + 1 + FIX0: This bit always gives a “0”. +
+ + 0 + PRST: Protocol reset + - 0 = Normal protocol action + - 1 = The forced protocol reset was triggered +
ONLINE_STATUS_1_L + 0x53 + + Online Status 1 (Low Byte) +
+ + 7:6 + FIX0: This bit always gives a “0”. +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** +
+ + 5 + MIN: Acknowledgment of message initialization + - 0 = Parameter Channel not functioning. + - 1 = The DSL encoder sends a figure by which the initialization of the Parameter Channel is acknowledged. +
+ + 4:3 + FIX0: This bit always gives a “0”. +
+ + 2 + QMLW: Quality monitoring at Low level + - 0 = Current value of quality monitoring greater than or equal to 14. + - 1 = Current value of quality monitoring less than 14. +
+ + 1 + FIX0: This bit always gives a “0”. +
+ + 0 + FRES: Channel status for the “short message”. + - 0 = The channel for the “short message” is in use. + - 1 = The channel for the “short message” is free. +
ONLINE_STATUS_2_H + 0x54 + + Online Status 2 (High Byte) + - Online Status 2 provides information about Safe Channel 2 of the DSL encoder. + - The data always indicate the current status, with previous indications not being stored. + - All fault indications in Online Status 2 are potentially critical and safety-related. Suitable measures must be installed in the user application. +
+ + 7 + FIX0: This bit always gives a “0”. +
+ + 6 + SUM2: Summary byte Channel 2 + - 0 = Neither TEST2 nor ERR2 is set. + - 1 = One of the indications TEST2 or ERR2 is set. The error reaction to this flag depends on the meaning of the bit they are based on. +
+ + 5 + SCE2: Transmission error Channel 2 + - 0 = The last data received in Channel 2 was correct. + - 1 = The last Safe Channel 2 CRC received was wrong. It is expected that the last safe position 2 transmitted is invalid. Suitable measures must be installed in the user application. +
+ + 4 + FIX1: This bit always gives a “1”. +
+ + 3 + FIX0: This bit always gives a “0”. +
+ + 2 + VPOS2: Safe position Channel 2 invalid + - 0 = The last safe position received in Channel 2 was correct. + - 1 = A source of an error in the safe position in Channel 2 was identified. It is probable that the safe position transmitted from Channel 2 is invalid. Suitable measures must be installed in the user application. +
+ + 1 + FIX0: This bit always gives a “0”. +
+ + 0 + PRST: Protocol reset + - 0 = Normal protocol action + - 1 = The forced protocol reset was triggered +
ONLINE_STATUS_2_L + 0x55 + + Online Status 2 (Low Byte) +
+ + 7:3 + FIX0: These bits always gives a “0”. +
**NOTE : Different implementation from SICK HDSL MASTER IP Core** +
+ + 2 + QMLW: Quality monitoring at Low level + - 0 = Current value of quality monitoring greater than or equal to 14. + - 1 = Current value of quality monitoring less than 14. +
+ + 1:0 + FIX0: These bits always gives a “0”. +
diff --git a/docs_src/docs/api_guide/components/position_sense/position_sense.md b/docs_src/docs/api_guide/components/position_sense/position_sense.md new file mode 100644 index 0000000..2193ace --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/position_sense.md @@ -0,0 +1,23 @@ +# Position Sense {#POSITION_SENSE} + +[TOC] + +\cond SOC_AM64X || SOC_AM243X + +Real-time communication with encoders and current sensing is typically handled by the Programmable Real-Time Unit Industrial Communication Subsystem (PRU-ICSS). The PRU-ICSS is a co-processor subsystem containing Programmable Real-Time (PRU) cores which implement the low level firmware. The PRU-ICSS frees up the main ARM cores in the device for other functions, such as control and data processing. + +Applications and PRU-ICSS firmwares for following position sense encoders are provided in the SDK. + +- \subpage ENDAT +- \subpage HDSL +- \subpage TAMAGAWA + +\endcond + +\cond SOC_AM263X + +Application for following position sense encoder is provided in the SDK. + +- \subpage TAMAGAWA_OVER_UART + +\endcond \ No newline at end of file diff --git a/docs_src/docs/api_guide/components/position_sense/tamagawa.md b/docs_src/docs/api_guide/components/position_sense/tamagawa.md new file mode 100644 index 0000000..63206d6 --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/tamagawa.md @@ -0,0 +1,42 @@ +# Tamagawa {#TAMAGAWA} + +[TOC] + +## Introduction + +The Tamagawa receiver firmware running on PRU-ICSS provides a defined well interface to execute the Tamagawa protocol. The Tamagawa diagnostic application interacts with the Tamagawa receiver firmware interface. + +\note +Tamagawa firmware and examples are based on EnDAT hardware interface from PRU-ICSSG. + +## Features Supported + +- Supports full-absolute SmartAbs & SmartInc encoders compatible with Smartceiver AU5561N1 +- Channel selection +- Baud rate selection +- 2.5 Mbps and 5 Mbps encoder support +- Supports all Data Readout, Reset and EEPROM commands + +## Features Not Supported + +In general, peripherals or features not mentioned as part of "Features Supported" section are not supported, including the below +- Other baud rates. + +## SysConfig Features + +@VAR_SYSCFG_USAGE_NOTE + +SysConfig can be used to configure things mentioned below: +- Selecting the ICSSG instance +- Selecting the PRUx slice (Tested on ICSSG0-PRU1) +- Configuring PINMUX, GPIO and ICSS clock to 200MHz +- Channel selection +- Baud rate selection + +## Tamagawa Design + +\subpage TAMAGAWA_DESIGN explains the design in detail. + +## Example + +- \ref EXAMPLE_MOTORCONTROL_TAMAGAWA diff --git a/docs_src/docs/api_guide/components/position_sense/tamagawa_design.md b/docs_src/docs/api_guide/components/position_sense/tamagawa_design.md new file mode 100644 index 0000000..7206952 --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/tamagawa_design.md @@ -0,0 +1,68 @@ +# Tamagawa Protocol Design {#TAMAGAWA_DESIGN} + +[TOC] + +## Introduction + +This document presents the firmware implementation details of the Tamagawa receiver protocol. + +## Tamagawa encoder receiver + +It is an encoder technology used for obtaining high-precision position information in machine tools, robotics, and so forth. Tamagawa rotary encoders consist broadly of two types: incremental or absolute. Incremental encoders provide a train of pulses, while the absolute-type provides digital values. The absolute encoder group contains the single-turn types that provide outputs which can be open collector or emitter follower. The absolute encoder types include the pure digital encoder types, which provide a digital word output through a line driver such as an RS485, or a semi-absolute encoder, which provides both digital word and pulse train outputs. Of the RS485 line-driver output absolute encoders that provide only digital output, another classification is the full absolute encoder. A full absolute encoder provides multi-turn digital data, which is known as SmartAbs, and is compatible with the Tamagawa Smartceiver AU5561N1. Another type of encoders, known as SmartInc, provide single-turn information in digital format with an RS485 line driver output. The AM64x/AM243x Tamagawa receiver implementation is equivalent to the Smartceiver AU5561N1, which can communicate with Tamagawa SmartAbs as well as SmartInc encoders. + +The AM64x/AM243x Tamagawa receiver communicates with Tamagawa SmartAbs and SmartInc encoders and provides drive control with digital information to and from the encoder. Tamagawa communication is broadly classified into three types: data readout, reset, and EEPROM transactions. Four data readout transactions occur: absolute data in one revolution, multi-turn data, encoder ID, and a combination of all of these along with the encoder error status. The reset transaction always returns the absolute data in one revolution while performing different types of resets. Three types of reset are available: reset of absolute data in one revolution, reset of multi-turn data, and error reset. The EEPROM transaction allows the system to read and write to the EEPROM in the encoder. Each transaction has a unique data ID and consists of different fields, namely control, status, data, cyclic redundancy check (CRC), EEPROM address, and EEPROM data depending on the type of transaction, that is, data ID. + +Each field is 10-bits long, beginning with a start bit and ending with a delimiter. The 8 bits between these start bits and delimiters depends on the field type. The control field contains the data ID information. Data, status, and CRC fields similarly contain data, status, and CRC in those 8 bits. The receiver initially sends the control field to start the communication. This action indicates the type of transaction to the encoder and the encoder returns this information based on the data ID, as the previous paragraph explains. The encoder always returns the control field back to the receiver. In the case of data readout and reset transactions, the encoder returns the control field followed by the status, data, and ending with the CRC field at the end. In the case of an EEPROM read or write, the receiver, in addition to the control field, sends the EEPROM address field (and EEPROM data field for write) followed by the CRC. The encoder returns the control field, followed by the EEPROM address, EEPROM data, and CRC fields. The physical layer communication is RS422/RS485 based. + +## System Overview + +### Sitara™ AM64x/AM243x Processor + +Refer TRM for details + +#### PRU-ICSS + +Refer PRU-ICSS chapter of AM64x/AM243x Technical Reference Manual + +## Software Description + +At start-up, the application running on the ARM Cortex-R5 initializes the module clocks and configures the pinmux. The PRU is initialized and the PRU firmware is loaded on PRU slice of choice for a chosen ICSS instance (tested on PRU1 on ICSSG0). After the PRU1 starts executing, the Tamagawa interface is operational and the application can use it to communicate with an encoder. Use the Tamagawa diagnostic example to learn more about initialization and communication with the Tamagawa interface. This Tamagawa diagnostic example, also provides an easy way to validate the Tamagawa transactions. The diagnostic example provides menu options on the host PC in a serial terminal application, where the user can select the data ID code to be sent. Based on the data ID code, the application updates the Tamagwa interface with the data ID code and trigger transaction. The application then waits until it receives an indication of complete transaction by the firmware through the interface before displaying the result. + +### PRU Firmware Design +The firmware first initializes the PRU hardware, after which it waits until a command has been triggered through the interface. Upon triggering, the transmit data is set up based on the data ID code and the data is transmitted. The data ID code then waits until receiving all the data that depends on the data ID. The parsing over the received data then commences, which is again based on the data ID, and the interface is updated with the result. The CRC verification occurs next and the interface indicates command completion. The firmware then waits for the next command trigger from the interface. + +\image html Tamagawa_flowchart.JPG "Overview Flow Chart" + +### Initialization +PRU is set to EnDat mode first. The entire EnDat configuration MMR’s are cleared(CFG registers). Tx global reinit bit in R31 is set to put all channels in default mode. The clock source is selected (ICSSG clock is selected with 200MHZ frequency). In Tx mode, the output data is read from the Tx FIFO at this 1x clock rate. In Rx mode, the input data is sampled at the Oversampling (OS) clock rate. Hence, Tx clock(1x clock) and Rx clock(Oversampling (OS) clock) are setup by selecting oversampling factor(x8). At the end of the initialization status is updated and wait until trigger from user occurs for tamagawa commands. + +\image html Tamagawa_initialization_flow_chart.JPG "Initialization Flow Chart" + +### Setup Transmit Data +The transmit and receive sizes are determined based on the data ID in the interface. + +\image html Tamagawa_setup_tx_data.png "Setup Transmit Data Flow Chart" + +### Transmit and Receive +In the current implementation, the Transmit data is loaded into the Tx FIFO byte wise. For data readout and reset commands, the requirement is to send 1 frame of 10 bits. So, 2 bytes of data is first loaded into the Tx FIFO and Tx frame size is set to 10 bits to send right data to Encoder. Similarly, for EEPROM Read command, the requirement is to send 3 frames of 10 bits each, so 30 bits in total. For this, 4 byes of data is first loaded into the Tx FIFO and then Tx frame size is set to 30 bits to send right data to Encoder. This is done by using the Tx - Single Shot mode. + +\image html Tamagawa_tx_flow_chart.png "Transmit Flow Chart for data readout, reset and EEPROM Read commands" + +In case of EEPROM Write command, the requirement is to send 4 frames of 10 bits each - 40 bits in total. For this, 4 bytes of data is first loaded into the Tx FIFO and then transmission is started in Tx - Continuous FIFO loading mode. FIFO byte level is constantly monitored and the FIFO is reloaded with the last byte when the FIFO level reaches 3 bytes. + +\image html Tamagawa_eeprom_write_flow_chart.png "Transmit Flow Chart for EEPROM Write command" + +Once the Transmission is complete, the encoder starts sending the data and the firmware copies the receive FIFO contents onto the receive buffer, individually, until all the data has been received. + +\image html Tamagawa_rx_flow_chart.png "Receive Flow Chart" + +### Receive Data Parse +Depending on the data ID used for initiating the transfer, the firmware parses the received data and copies it onto relevant fields in the interface, accordingly. + +\image html Tamagawa_parse_data.png "Receive Data Parse Flow Chart" + +### Verify CRC +The CRC is the last byte of the received data. The firmware then calculates the CRC of the received data excluding the last byte, compares it with the received CRC value, and updates the CRC status in the interface. + +\image html Tamagawa_verify_crc.png "Verify CRC Flow Chart" + diff --git a/docs_src/docs/api_guide/components/position_sense/tamagawa_uart.md b/docs_src/docs/api_guide/components/position_sense/tamagawa_uart.md new file mode 100644 index 0000000..f3b9994 --- /dev/null +++ b/docs_src/docs/api_guide/components/position_sense/tamagawa_uart.md @@ -0,0 +1,33 @@ +# TAMAGAWA OVER UART {#TAMAGAWA_OVER_UART} + +[TOC] + +## Introduction +The Tamagawa over UART module provides a support for SoC UART instance to execute the Tamagawa protocol. +## Features Supported + +- Single channel +- Baud rate selection +- 2.5 Mbps and 5 Mbps encoder support +- Supports all Data Readout, Reset and EEPROM commands + + +## Features Not Supported + +- Other baud rates +- Long cable length + +## SysConfig Features + +@VAR_SYSCFG_USAGE_NOTE + +SysConfig can be used to configure things mentioned below: +- Baud rate selection(2461538 bps for 2.5 Mbps encoder, 4923076 bps for 5Mbps encoder) +- Communication mode selection (Tested on polling mode) +- Configuring GPIO62 signal with J2 pin (RTSn pin for software based flow control) +- UART instance selection + + +## Example + +- \ref EXAMPLE_MOTORCONTROL_TAMAGAWA_OVER_UART diff --git a/docs_src/docs/api_guide/device/am243x/components.cfg b/docs_src/docs/api_guide/device/am243x/components.cfg new file mode 100644 index 0000000..ee6c538 --- /dev/null +++ b/docs_src/docs/api_guide/device/am243x/components.cfg @@ -0,0 +1,19 @@ +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/position_sense.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/endat.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/endat_design.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/hdsl.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/hdsl_design.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/hdsl_registers_list.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/hdsl_exceptions_list.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/tamagawa.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/tamagawa_design.md + +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/current_sense/current_sense.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/current_sense/sdfm_design.md + +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/endat/include/endat_api.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/endat/include/endat_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/hdsl/include/hdsl_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/tamagawa/include/tamagawa_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_api.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_drv.h diff --git a/docs_src/docs/api_guide/device/am243x/examples.cfg b/docs_src/docs/api_guide/device/am243x/examples.cfg new file mode 100644 index 0000000..6a45b03 --- /dev/null +++ b/docs_src/docs/api_guide/device/am243x/examples.cfg @@ -0,0 +1,7 @@ +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/examples.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/hdsl_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/endat_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md diff --git a/docs_src/docs/api_guide/device/am243x/includes.cfg b/docs_src/docs/api_guide/device/am243x/includes.cfg new file mode 100644 index 0000000..a515d42 --- /dev/null +++ b/docs_src/docs/api_guide/device/am243x/includes.cfg @@ -0,0 +1,30 @@ + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by +# double-quotes, unless you are using Doxywizard) that should identify the +# project for which the documentation is generated. This name is used in the +# title of most generated pages and in a few other places. +# The default value is: My Project. + +PROJECT_NAME = "AM243x Motor Control SDK" + +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/main_page/main_page.md +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/migration_guides/mcusdk_migration_guide.md +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/release_notes.md +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/release_notes_09_00_00.md +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.cfg + +# Used to selectively pick DEVICE specific sections within .md files +ENABLED_SECTIONS = SOC_AM243X + +# SOC specific aliases +ALIASES+=VAR_SOC_NAME="AM243X" +ALIASES+=VAR_SOC_NAME_LOWER="am243x" +ALIASES+=VAR_BOARD_NAME="AM243X-EVM" +ALIASES+=VAR_BOARD_NAME_LOWER="am243x-evm" +ALIASES+=VAR_LP_BOARD_NAME="AM243X-LP" +ALIASES+=VAR_LP_BOARD_NAME_LOWER="am243x-lp" +ALIASES+=VAR_SOC_MANIFEST="motor_control_sdk_am243x_manifest.html" +ALIASES+=VAR_MCU_SDK_DOCS_PATH="../../mcu_plus_sdk/docs/api_guide_am243x" +ALIASES+=VAR_IC_SDK_DOCS_PATH="../../ind_comms_sdk/docs/api_guide_am243x" \ No newline at end of file diff --git a/docs_src/docs/api_guide/device/am243x/release_notes.md b/docs_src/docs/api_guide/device/am243x/release_notes.md new file mode 100644 index 0000000..d4c7104 --- /dev/null +++ b/docs_src/docs/api_guide/device/am243x/release_notes.md @@ -0,0 +1,8 @@ +# Release Notes {#RELEASE_NOTES_PAGE} + +[TOC] + +Refer the below pages for release specific information + +- \subpage RELEASE_NOTES_09_00_00_PAGE + diff --git a/docs_src/docs/api_guide/device/am243x/release_notes_09_00_00.md b/docs_src/docs/api_guide/device/am243x/release_notes_09_00_00.md new file mode 100644 index 0000000..6e3232c --- /dev/null +++ b/docs_src/docs/api_guide/device/am243x/release_notes_09_00_00.md @@ -0,0 +1,428 @@ +# Release Notes 09.00.00 {#RELEASE_NOTES_09_00_00_PAGE} + +[TOC] + +\attention Also refer to individual module pages for more details on each feature, unsupported features, important usage guidelines. + +\attention For release notes of Industrial Communications SDK and MCU+ SDK, please refer to @VAR_SOC_NAME Industrial Communications SDK Release Notes 09.00.00 and @VAR_SOC_NAME MCU+ SDK Release Notes 09.00.00 respectively. + +\note The examples will show usage of SW modules and APIs on a specific CPU instance and OS combination. \n + Unless noted otherwise, the SW modules would work in both FreeRTOS and NORTOS environment. \n + Unless noted otherwise, the SW modules would work on any of the R5F's present on the SOC. \n + Unless noted otherwise, the SW modules would work on all supported EVMs \n + +\note Tamagawa over SoC UART example is not supported for AM243x + +## New in this Release + +Feature | Module +------------------------------------------------------------------------------------------------|----------------------------------- +SYNC Mode Support with 2 channels | Position Sense HDSL +16 MHz EnDat clock frequency support | Position Sense EnDat +Long cable support | Position Sense EnDat +Trigger based normal current sampling | Current Sense %SDFM +Double sampling per PWM cycle | Current Sense %SDFM +Digital Control Library | Real Time Libraries + +## Device and Validation Information + +SOC | Supported CPUs | Boards | Host PC +-------|-----------------|-------------------------------------------------------------------------------------------------------------|----------------------------------- +AM243x | R5F | AM243x GP EVM (referred to as am243x-evm in code), \n AM243x LAUNCHPAD (referred to as am243x-lp in code) | Windows 10 64b or Ubuntu 18.04 64b + +## Tools, Compiler and Other Open Source SW Module Information + +Tools / SW module | Supported CPUs | Version +------------------------|----------------|----------------------- +Code Composer Studio | R5F, M4F, A53 | @VAR_CCS_VERSION +SysConfig | R5F, M4F, A53 | @VAR_SYSCFG_VERSION, build @VAR_SYSCFG_BUILD +TI ARM CLANG | R5F, M4F | @VAR_TI_ARM_CLANG_VERSION +FreeRTOS Kernel | R5F, M4F, A53 | @VAR_FREERTOS_KERNEL_VERSION +FreeRTOS SMP Kernel | A53 | @VAR_FREERTOS_SMP_KERNEL_VERSION + +## Key Features + + + + + + + + + +### Position Sense + +Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested +-------------|----------------|-------------------|-------------------|----------------------------------------------------------------------------------------------------------------------------------------------------------------|----------------------------------------------------------------------------------- +EnDat | R5F | YES | FreeRTOS, NORTOS | Single channel, Multi channel, Continuous mode for single channel, Load share mode, Recovery Time for 2.2 command set, Boosterpack with AM243x-LP | Encoder receive communication command +HDSL | R5F | YES | FreeRTOS, NORTOS | Freerun mode(300MHz,225MHz), Sync mode(225MHz), Short Message Read & Write, Long Message Read & Write, Boosterpack with AM243x-LP | Long cables +Tamagawa | R5F | YES | FreeRTOS, NORTOS | Absolute position, Encoder ID, Reset, EEPROM Read, EEPROM Write, 2.5 Mbps and 5 Mbps Encoder Support, Boosterpack with AM243x-LP | - + +### Current Sense + + +Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested +-------------|----------------|-------------------|-------------------|----------------------------------------------------------------------------------------------------------------------------------------------------------------|----------------------------------------------------------------------------------- +%SDFM | R5F | YES | FreeRTOS, NORTOS | 3 %SDFM channels on single PRU core, %SDFM Sync with EPWM, Overcurrent, single normal current sampling per PWM cycle, Double normal current sampling per PWM cycle, High and Low threshold comparator, Tested with SDFM clock from ECAP, Tested with 5MHz Clock from EPWM | - + + +## Fixed Issues + + + + + + + + + + + + + + + + + + + + + + + + + + +
ID + Head Line + Module + Applicable Releases + Resolution/Comments +
PINDSW-5538 + HDSL: Long message not working with multi-channel application + Position Sense HDSL + - + - +
PINDSW-5651 + HDSL: Multi-turn bits of fast position do not contain correct data + Position Sense HDSL + - + - +
PINDSW-5681 + EnDat: Recovery Time not correct for 2.1 commands + Position Sense EnDat + - + - +
PINDSW-5689 + HDSL: High deviation in fast position when encoder shaft is fixed + Position Sense HDSL + - + - +
PINDSW-6487 + HDSL: FIX bits in ONLINE STATUS 1 register are losing the expected fix value + Position Sense HDSL + - + - +
PINDSW-6488 + HDSL: SUM/SSUM bit not working in ONLINE STATUS registers + Position Sense HDSL + - + - +
PINDSW-6489 + HDSL: Offsets for ONLINE STATUS registers in C structure are not correct + Position Sense HDSL + - + - +
PINDSW-6492 + HDSL: Protocol reset is not working + Position Sense HDSL + - + - +
PINDSW-6526 + HDSL: FREL/FRES bits in EVENT/EVENT_S registers are not sticky + Position Sense HDSL + - + - +
PINDSW-6530 + HDSL: QMLW bit not working in ONLINE STATUS registers + Position Sense HDSL + - + - +
PINDSW-6607 + %SDFM: NULL pointer dereferenced in \ref SDFM_getFilterData + Current Sense %SDFM + - + - +
+ +## Known Issues + + + + + + + + + + + + + + + + + + + + + +
ID + Head Line + Module + Applicable Releases + Workaround +
PINDSW-5537 + HDSL not working with 225 MHz PRU-ICSSG Core Clock Frequency + Position Sense HDSL + 9.0 onwards + Use 300 MHz frequency for PRU-ICSSG Core Clock +
PINDSW-5690 + HDSL: EDGE register is not updated + Position Sense HDSL + 9.0 onwards + - +
PINDSW-6486 + HDSL: RSSI register shows higher values than expected for a non-noisy setup + Position Sense HDSL + 9.0 onwards + - +
PINDSW-6544 + %SDFM: Incorrect samples seen intermittently with EPWM as %SDFM clock + Current Sense %SDFM + 9.0 onwards + Use 5MHz %SDFM clock from EPWM1 (tested with 5MHz clock from EPWM) or use PRU-ICSSG ECAP as %SDFM clock source +
PINDSW-6628 + HDSL: Reset value of PRST bit is not correct + Position Sense HDSL + 9.0 onwards + - +
PINDSW-6629 + HDSL: SSUM bit in EVENT_S is not set when SUMMARY is non-zero + Position Sense HDSL + 9.0 onwards + - +
PINDSW-6630 + HDSL: POS bit is not set during initial fast position alignment + Position Sense HDSL + 9.0 onwards + - +
PINDSW-6931 + Tamagawa: Firmware build failing + Position Sense Tamagawa + 9.0 onwards + 1. Update include path of icss_regs.inc and icss_cfg_regs.inc files to `../../../../mcu_plus_sdk/source/pru_io/firmware/common/ ` path in `tamagawa_main.asm` and `tamagawa_icss_reg_defs.h` files.
2. Replace ED with ENDAT in symbol definitions in tamagawa_main.asm file's lines 101 to 122. (For example, update `ICSS_CFG_PRU0_ED_CH0_CFG1` to `ICSS_CFG_PRU0_ENDAT_CH0_CFG1` )
+ + + +## Limitations + + + + + +
ID + Head Line + Module + Reported in Release + Applicable Devices + Workaround +
MCUSDK-208 + gmake with -j can sometimes lock up Windows command prompt + Build + 7.3.0 + AM64x, AM243x + Use bash for windows as part of git for windows or don't use -j option +
+ +## Upgrade and Compatibility Information {#UPGRADE_AND_COMPATIBILITY_INFORMATION_9_0_0} + + + +This section lists changes which could affect user applications developed using older SDK versions. +Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to +previous SDK version. Also refer to older SDK version release notes to see changes in +earlier SDKs. + + + +### Examples + + + + + + +
Module + Affected API + Change + Additional Remarks +
Current Sense %SDFM + Structure `SdfmPrms_s` + Added variables `iep_clock`, `sd_clock`, `en_second_update`, `firstSampTrigTime` and `secondSampTrigTime` + +
+ +### Drivers + + + + + + + + + + + + + + + + + + + + + + +
Module + Affected API + Change + Additional Remarks +
Position Sense EnDat + \ref endat_init + Added API parameter `pruss_iep` + Needed for periodic mode +
Position Sense EnDat + Structure \ref endat_priv + Added variables `pruss_iep`, `cmp3`, `cmp5` and `cmp6` + Needed for periodic mode +
Position Sense EnDat + Structure \ref cmd_supplement + Added variables `cmp3`, `cmp5` and `cmp6` + Needed for periodic mode +
Current Sense %SDFM + `SDFM_setSampleReadingTime` + Changed name of API \ref SDFM_setSampleTriggerTime and updated a parameter name `samp_trig_time` + - +
Current Sense %SDFM + \ref SDFM_setFilterOverSamplingRatio + Removed `oc_osr` parameter + - +
Current Sense %SDFM + \ref SDFM_setCompFilterOverSamplingRatio + Changed type of osr parameter + uint8_t to uint16_t +
Current Sense %SDFM + `SDFM_setAccOverSamplingRatio` + Removed this API + - +
Current Sense %SDFM + Structure \ref SDFM_Ctrl + Removed variables: `ctrl` and `stat`, and added variables `sdfm_en`, `sdfm_en_ack` and `sdfm_pru_id` + - +
Current Sense %SDFM + Structure \ref SDFM_CfgTrigger + Removed variables `trig_samp_time`, `oc_prd_iep_cnt` and `sample_count`, and added variables `en_double_nc_sampling`, `first_samp_trig_time` and `second_samp_trig_time` + - +
diff --git a/docs_src/docs/api_guide/device/am263x/components.cfg b/docs_src/docs/api_guide/device/am263x/components.cfg new file mode 100644 index 0000000..baac63a --- /dev/null +++ b/docs_src/docs/api_guide/device/am263x/components.cfg @@ -0,0 +1,4 @@ +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/position_sense.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/tamagawa_uart.md + +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/tamagawa_over_soc_uart/include/tamagawa_soc_uart_interface.h \ No newline at end of file diff --git a/docs_src/docs/api_guide/device/am263x/examples.cfg b/docs_src/docs/api_guide/device/am263x/examples.cfg new file mode 100644 index 0000000..00a46fe --- /dev/null +++ b/docs_src/docs/api_guide/device/am263x/examples.cfg @@ -0,0 +1,4 @@ +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/examples.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_uart_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_pi/dcl_pi.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/dcl/dcl_df22/dcl_df22.md \ No newline at end of file diff --git a/docs_src/docs/api_guide/device/am263x/includes.cfg b/docs_src/docs/api_guide/device/am263x/includes.cfg new file mode 100644 index 0000000..b0b26e9 --- /dev/null +++ b/docs_src/docs/api_guide/device/am263x/includes.cfg @@ -0,0 +1,30 @@ + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by +# double-quotes, unless you are using Doxywizard) that should identify the +# project for which the documentation is generated. This name is used in the +# title of most generated pages and in a few other places. +# The default value is: My Project. + +PROJECT_NAME = "AM263x Motor Control SDK" + +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/main_page/main_page.md +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/migration_guides/mcusdk_migration_guide.md +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/release_notes.md +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/release_notes_09_00_00.md +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/dcl/dcl.cfg + +# Used to selectively pick DEVICE specific sections within .md files +ENABLED_SECTIONS = SOC_AM263X + +# SOC specific aliases +ALIASES+=VAR_SOC_NAME="AM263X" +ALIASES+=VAR_SOC_NAME_LOWER="am263x" +ALIASES+=VAR_BOARD_NAME="AM263X-CC" +ALIASES+=VAR_BOARD_NAME_LOWER="am263x-cc" +ALIASES+=VAR_LP_BOARD_NAME="AM263X-LP" +ALIASES+=VAR_LP_BOARD_NAME_LOWER="am263x-lp" +ALIASES+=VAR_SOC_MANIFEST="motor_control_sdk_am263x_manifest.html" +ALIASES+=VAR_MCU_SDK_DOCS_PATH="../../mcu_plus_sdk/docs/api_guide_am263x" +ALIASES+=VAR_IC_SDK_DOCS_PATH="../../ind_comms_sdk/docs/api_guide_am263x" \ No newline at end of file diff --git a/docs_src/docs/api_guide/device/am263x/release_notes.md b/docs_src/docs/api_guide/device/am263x/release_notes.md new file mode 100644 index 0000000..d4c7104 --- /dev/null +++ b/docs_src/docs/api_guide/device/am263x/release_notes.md @@ -0,0 +1,8 @@ +# Release Notes {#RELEASE_NOTES_PAGE} + +[TOC] + +Refer the below pages for release specific information + +- \subpage RELEASE_NOTES_09_00_00_PAGE + diff --git a/docs_src/docs/api_guide/device/am263x/release_notes_09_00_00.md b/docs_src/docs/api_guide/device/am263x/release_notes_09_00_00.md new file mode 100644 index 0000000..261acb9 --- /dev/null +++ b/docs_src/docs/api_guide/device/am263x/release_notes_09_00_00.md @@ -0,0 +1,198 @@ +# Release Notes 09.00.00 {#RELEASE_NOTES_09_00_00_PAGE} + +[TOC] + +\attention Also refer to individual module pages for more details on each feature, unsupported features, important usage guidelines. + +\attention For release notes of Industrial Communications SDK and MCU+ SDK, please refer to @VAR_SOC_NAME Industrial Communications SDK Release Notes 09.00.00 and @VAR_SOC_NAME MCU+ SDK Release Notes 09.00.00 respectively. + +\note The examples will show usage of SW modules and APIs on a specific CPU instance and OS combination. \n + Unless noted otherwise, the SW modules would work in both FreeRTOS and NORTOS environment. \n + Unless noted otherwise, the SW modules would work on any of the R5F's present on the SOC. \n + Unless noted otherwise, the SW modules would work on all supported EVMs \n + +## New in this Release + +Feature | Module +------------------------------------------------------------------------------------------------|----------------------------------- +Digital Control Library | Real Time Libraries + +## Device and Validation Information + +SOC | Supported CPUs | EVM | Host PC +------|-----------------|------------------------------------------------------------------------------|----------------------------------------- +AM263x| R5F | AM263x ControlCard Revision E1 (referred to as am263x-cc in code). \n | Windows 10 64b or Ubuntu 18.04 64b +AM263x| R5F | AM263x LaunchPad Revision E2 (referred to as am263x-lp in code) | Windows 10 64b or Ubuntu 18.04 64b + +## Tools, Compiler and Other Open Source SW Module Information + +Tools | Supported CPUs | Version +------------------------|----------------|-------------------------------------------------------------- +Code Composer Studio | R5F | @VAR_CCS_VERSION_AM263X +SysConfig | R5F | @VAR_SYSCFG_VERSION_AM263X, build @VAR_SYSCFG_BUILD_AM263X +TI ARM CLANG | R5F | @VAR_TI_ARM_CLANG_VERSION +FreeRTOS Kernel | R5F | @VAR_FREERTOS_KERNEL_VERSION + +## Key Features + +### Position Sense + +Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested +-------------|----------------|-------------------|-------------------|----------------------------------------------------------------------------------------------------------------------------------------------------------------|----------------------------------------------------------------------------------- +Tamagawa | R5F | YES | FreeRTOS | Absolute position, Encoder ID, Reset, EEPROM Read, EEPROM Write, 2.5 Mbps and 5 Mbps Encoder Support | - + + + + + + + +## Limitations + + + + + +
ID + Head Line + Module + Reported in Release + Applicable Devices + Workaround +
MCUSDK-208 + gmake with -j can sometimes lock up Windows command prompt + Build + 7.3.0 + AM64x, AM243x + Use bash for windows as part of git for windows or don't use -j option +
+ + + + + + + + + + diff --git a/docs_src/docs/api_guide/device/am64x/components.cfg b/docs_src/docs/api_guide/device/am64x/components.cfg new file mode 100644 index 0000000..ee6c538 --- /dev/null +++ b/docs_src/docs/api_guide/device/am64x/components.cfg @@ -0,0 +1,19 @@ +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/position_sense.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/endat.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/endat_design.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/hdsl.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/hdsl_design.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/hdsl_registers_list.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/hdsl_exceptions_list.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/tamagawa.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/position_sense/tamagawa_design.md + +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/current_sense/current_sense.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/components/current_sense/sdfm_design.md + +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/endat/include/endat_api.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/endat/include/endat_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/hdsl/include/hdsl_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/tamagawa/include/tamagawa_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_api.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_drv.h diff --git a/docs_src/docs/api_guide/device/am64x/examples.cfg b/docs_src/docs/api_guide/device/am64x/examples.cfg new file mode 100644 index 0000000..532c41e --- /dev/null +++ b/docs_src/docs/api_guide/device/am64x/examples.cfg @@ -0,0 +1,5 @@ +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/examples.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/hdsl_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/endat_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/tamagawa_example.md +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/examples/sdfm_example.md diff --git a/docs_src/docs/api_guide/device/am64x/includes.cfg b/docs_src/docs/api_guide/device/am64x/includes.cfg new file mode 100644 index 0000000..fe94c59 --- /dev/null +++ b/docs_src/docs/api_guide/device/am64x/includes.cfg @@ -0,0 +1,26 @@ + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by +# double-quotes, unless you are using Doxywizard) that should identify the +# project for which the documentation is generated. This name is used in the +# title of most generated pages and in a few other places. +# The default value is: My Project. + +PROJECT_NAME = "AM64x Motor Control SDK" + +INPUT += $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/main_page/main_page.md +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/examples.cfg +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/components.cfg + +# Used to selectively pick DEVICE specific sections within .md files +ENABLED_SECTIONS = SOC_AM64X + +# SOC specific aliases +ALIASES+=VAR_SOC_NAME="AM64X" +ALIASES+=VAR_SOC_NAME_LOWER="am64x" +ALIASES+=VAR_BOARD_NAME="AM64X-EVM" +ALIASES+=VAR_BOARD_NAME_LOWER="am64x-evm" +ALIASES+=VAR_SK_BOARD_NAME="AM64X-SK" +ALIASES+=VAR_SK_BOARD_NAME_LOWER="am64x-sk" +ALIASES+=VAR_SOC_MANIFEST="motor_control_sdk_am64x_manifest.html" +ALIASES+=VAR_MCU_SDK_DOCS_PATH="../../mcu_plus_sdk/docs/api_guide_am64x" +ALIASES+=VAR_IC_SDK_DOCS_PATH="../../ind_comms_sdk/docs/api_guide_am64x" \ No newline at end of file diff --git a/docs_src/docs/api_guide/doxy_warnings_am243x.txt b/docs_src/docs/api_guide/doxy_warnings_am243x.txt new file mode 100644 index 0000000..e69de29 diff --git a/docs_src/docs/api_guide/doxy_warnings_am263x.txt b/docs_src/docs/api_guide/doxy_warnings_am263x.txt new file mode 100644 index 0000000..e69de29 diff --git a/docs_src/docs/api_guide/doxy_warnings_am64x.txt b/docs_src/docs/api_guide/doxy_warnings_am64x.txt new file mode 100644 index 0000000..e69de29 diff --git a/docs_src/docs/api_guide/doxygen.cfg b/docs_src/docs/api_guide/doxygen.cfg new file mode 100644 index 0000000..344cff3 --- /dev/null +++ b/docs_src/docs/api_guide/doxygen.cfg @@ -0,0 +1,2303 @@ +# Doxyfile 1.8.6 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project. +# +# All text after a double hash (##) is considered a comment and is placed in +# front of the TAG it is preceding. +# +# All text after a single hash (#) is considered a comment and will be ignored. +# The format is: +# TAG = value [value, ...] +# For lists, items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (\" \"). + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. This +# could be handy for archiving the generated documentation or if some version +# control system is used. + +PROJECT_NUMBER = 09.00.00 + +# Using the PROJECT_BRIEF tag one can provide an optional one line description +# for a project that appears at the top of each page and should give viewer a +# quick idea about the purpose of the project. Keep the description short. + +PROJECT_BRIEF = + +# This tag specifies the encoding used for all characters in the config file +# that follow. The default is UTF-8 which is also the encoding used for all text +# before the first occurrence of this tag. Doxygen uses libiconv (or the iconv +# built into libc) for the transcoding. See http://www.gnu.org/software/libiconv +# for the list of possible encodings. +# The default value is: UTF-8. + +DOXYFILE_ENCODING = UTF-8 + + +# With the PROJECT_LOGO tag one can specify an logo or icon that is included in +# the documentation. The maximum height of the logo should not exceed 55 pixels +# and the maximum width should not exceed 200 pixels. Doxygen will copy the logo +# to the output directory. + +PROJECT_LOGO = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/theme/ti_logo.svg + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path +# into which the generated documentation will be written. If a relative path is +# entered, it will be relative to the location where doxygen was started. If +# left blank the current directory will be used. + +OUTPUT_DIRECTORY = $(API_GUIDE_OUT_DIR) + +# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create 4096 sub- +# directories (in 2 levels) under the output directory of each output format and +# will distribute the generated files over these directories. Enabling this +# option can be useful when feeding doxygen a huge amount of source files, where +# putting all generated files in the same directory would otherwise causes +# performance problems for the file system. +# The default value is: NO. + +CREATE_SUBDIRS = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese, +# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States), +# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian, +# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages), +# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian, +# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian, +# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish, +# Ukrainian and Vietnamese. +# The default value is: English. + +OUTPUT_LANGUAGE = English + +# If the BRIEF_MEMBER_DESC tag is set to YES doxygen will include brief member +# descriptions after the members that are listed in the file and class +# documentation (similar to Javadoc). Set to NO to disable this. +# The default value is: YES. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES doxygen will prepend the brief +# description of a member or function before the detailed description +# +# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. +# The default value is: YES. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator that is +# used to form the text in various listings. Each string in this list, if found +# as the leading text of the brief description, will be stripped from the text +# and the result, after processing the whole list, is used as the annotated +# text. Otherwise, the brief description is used as-is. If left blank, the +# following values are used ($name is automatically replaced with the name of +# the entity):The $name class, The $name widget, The $name file, is, provides, +# specifies, contains, represents, a, an and the. + +ABBREVIATE_BRIEF = NO + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# doxygen will generate a detailed section even if there is only a brief +# description. +# The default value is: NO. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all +# inherited members of a class in the documentation of that class as if those +# members were ordinary class members. Constructors, destructors and assignment +# operators of the base classes will not be shown. +# The default value is: NO. + +INLINE_INHERITED_MEMB = YES + +# If the FULL_PATH_NAMES tag is set to YES doxygen will prepend the full path +# before files name in the file list and in the header files. If set to NO the +# shortest path that makes the file name unique will be used +# The default value is: YES. + +FULL_PATH_NAMES = NO + +# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path. +# Stripping is only done if one of the specified strings matches the left-hand +# part of the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the path to +# strip. +# +# Note that you can specify absolute paths here, but also relative paths, which +# will be relative from the directory where doxygen is started. +# This tag requires that the tag FULL_PATH_NAMES is set to YES. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the +# path mentioned in the documentation of a class, which tells the reader which +# header file to include in order to use a class. If left blank only the name of +# the header file containing the class definition is used. Otherwise one should +# specify the list of include paths that are normally passed to the compiler +# using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but +# less readable) file names. This can be useful is your file systems doesn't +# support long names like on DOS, Mac, or CD-ROM. +# The default value is: NO. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the +# first line (until the first dot) of a Javadoc-style comment as the brief +# description. If set to NO, the Javadoc-style will behave just like regular Qt- +# style comments (thus requiring an explicit @brief command for a brief +# description.) +# The default value is: NO. + +JAVADOC_AUTOBRIEF = NO + +# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first +# line (until the first dot) of a Qt-style comment as the brief description. If +# set to NO, the Qt-style will behave just like regular Qt-style comments (thus +# requiring an explicit \brief command for a brief description.) +# The default value is: NO. + +QT_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a +# multi-line C++ special comment block (i.e. a block of //! or /// comments) as +# a brief description. This used to be the default behavior. The new default is +# to treat a multi-line C++ comment block as a detailed description. Set this +# tag to YES if you prefer the old behavior instead. +# +# Note that setting this tag to YES also means that rational rose comments are +# not recognized any more. +# The default value is: NO. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the +# documentation from any documented member that it re-implements. +# The default value is: YES. + +INHERIT_DOCS = YES + +# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce a +# new page for each member. If set to NO, the documentation of a member will be +# part of the file/class/namespace that contains it. +# The default value is: NO. + +SEPARATE_MEMBER_PAGES = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen +# uses this value to replace tabs by spaces in code fragments. +# Minimum value: 1, maximum value: 16, default value: 4. + +TAB_SIZE = 4 + +# This tag can be used to specify a number of aliases that act as commands in +# the documentation. An alias has the form: +# name=value +# For example adding +# "sideeffect=@par Side Effects:\n" +# will allow you to put the command \sideeffect (or @sideeffect) in the +# documentation, which will result in a user-defined paragraph with heading +# "Side Effects:". You can put \n's in the value part of an alias to insert +# newlines. + +ALIASES+=htmllink{2}="\2" +ALIASES+=imageStyle{2}="\htmlonly \endhtmlonly" +ALIASES+=inlineVideo{3}="\htmlonly

\2

\endhtmlonly" +ALIASES+=VAR_MY_NAME="my_value" +ALIASES+=VAR_TI_HOME_PAGE="\htmllink{https://www.ti.com,TI}" +ALIASES+=VAR_SDK_NAME="Motor Control SDK" +ALIASES+=VAR_CCS_VERSION="12.4.0" +ALIASES+=VAR_CCS_FOLDER_VERSION="1240" +ALIASES+=VAR_CCS_VERSION_AM263X="12.4.0" +ALIASES+=VAR_CCS_FOLDER_VERSION_AM263X="1240" +ALIASES+=VAR_SYSCFG_VERSION="1.17.0" +ALIASES+=VAR_SYSCFG_BUILD="3128" +ALIASES+=VAR_SYSCFG_VERSION_FULL="1.17.0_3128" +ALIASES+=VAR_SYSCFG_VERSION_AM273X="1.17.0" +ALIASES+=VAR_SYSCFG_BUILD_AM273X="3128" +ALIASES+=VAR_SYSCFG_VERSION_FULL_AM273X="1.17.0_3128" +ALIASES+=VAR_SYSCFG_VERSION_AM263X="1.17.0" +ALIASES+=VAR_SYSCFG_BUILD_AM263X="3128" +ALIASES+=VAR_SYSCFG_VERSION_FULL_AM263X="1.17.0_3128" +ALIASES+=VAR_TI_ARM_CLANG_VERSION="2.1.3.LTS" +ALIASES+=VAR_TI_C6000_CGT_VERSION="8.3.12" +ALIASES+=VAR_GCC_AARCH64_VERSION="9.2-2019.12" +ALIASES+=VAR_GCC_ARM_VERSION="7-2017-q4-major" +ALIASES+=VAR_FREERTOS_KERNEL_VERSION="10.4.3" +ALIASES+=VAR_FREERTOS_SMP_KERNEL_VERSION="202110.00-SMP" +ALIASES+=VAR_DSPLIB_VERSION="3.4.0.0" +ALIASES+=VAR_TINYUSB_VERSION="0.14.0" +ALIASES+=VAR_LWIP_VERSION="STABLE-2_1_2_RELEASE" +ALIASES+=VAR_SECURITY_MBEDTLS_VERSION="mbedtls-3.0.0" +ALIASES+=VAR_MBEDTLS_VERSION="mbedtls-2.13.1" +ALIASES+=VAR_SYSCFG_USAGE_NOTE="\note It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle." + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. For +# instance, some of the names that are used will be different. The list of all +# members will be omitted, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_FOR_C = YES + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or +# Python sources only. Doxygen will then generate output that is more tailored +# for that language. For instance, namespaces will be presented as packages, +# qualified scopes will look different, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran +# sources. Doxygen will then generate output that is tailored for Fortran. +# The default value is: NO. + +OPTIMIZE_FOR_FORTRAN = NO + +# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL +# sources. Doxygen will then generate output that is tailored for VHDL. +# The default value is: NO. + +OPTIMIZE_OUTPUT_VHDL = NO + +# Doxygen selects the parser to use depending on the extension of the files it +# parses. With this tag you can assign which parser to use for a given +# extension. Doxygen has a built-in mapping, but you can override or extend it +# using this tag. The format is ext=language, where ext is a file extension, and +# language is one of the parsers supported by doxygen: IDL, Java, Javascript, +# C#, C, C++, D, PHP, Objective-C, Python, Fortran, VHDL. For instance to make +# doxygen treat .inc files as Fortran files (default is PHP), and .f files as C +# (default is Fortran), use: inc=Fortran f=C. +# +# Note For files without extension you can use no_extension as a placeholder. +# +# Note that for custom extensions you also need to set FILE_PATTERNS otherwise +# the files are not read by doxygen. + +EXTENSION_MAPPING = + +# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments +# according to the Markdown format, which allows for more readable +# documentation. See http://daringfireball.net/projects/markdown/ for details. +# The output of markdown processing is further processed by doxygen, so you can +# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in +# case of backward compatibilities issues. +# The default value is: YES. + +MARKDOWN_SUPPORT = YES + +# When enabled doxygen tries to link words that correspond to documented +# classes, or namespaces to their corresponding documentation. Such a link can +# be prevented in individual cases by by putting a % sign in front of the word +# or globally by setting AUTOLINK_SUPPORT to NO. +# The default value is: YES. + +AUTOLINK_SUPPORT = YES + +# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want +# to include (a tag file for) the STL sources as input, then you should set this +# tag to YES in order to let doxygen match functions declarations and +# definitions whose arguments contain STL classes (e.g. func(std::string); +# versus func(std::string) {}). This also make the inheritance and collaboration +# diagrams that involve STL classes more complete and accurate. +# The default value is: NO. + +BUILTIN_STL_SUPPORT = NO + +# If you use Microsoft's C++/CLI language, you should set this option to YES to +# enable parsing support. +# The default value is: NO. + +CPP_CLI_SUPPORT = NO + +# Set the SIP_SUPPORT tag to YES if your project consists of sip (see: +# http://www.riverbankcomputing.co.uk/software/sip/intro) sources only. Doxygen +# will parse them like normal C++ but will assume all classes use public instead +# of private inheritance when no explicit protection keyword is present. +# The default value is: NO. + +SIP_SUPPORT = NO + +# For Microsoft's IDL there are propget and propput attributes to indicate +# getter and setter methods for a property. Setting this option to YES will make +# doxygen to replace the get and set methods by a property in the documentation. +# This will only work if the methods are indeed getting or setting a simple +# type. If this is not the case, or you want to show the methods anyway, you +# should set this option to NO. +# The default value is: YES. + +IDL_PROPERTY_SUPPORT = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES, then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. +# The default value is: NO. + +DISTRIBUTE_GROUP_DOC = NO + +# Set the SUBGROUPING tag to YES to allow class member groups of the same type +# (for instance a group of public functions) to be put as a subgroup of that +# type (e.g. under the Public Functions section). Set it to NO to prevent +# subgrouping. Alternatively, this can be done per class using the +# \nosubgrouping command. +# The default value is: YES. + +SUBGROUPING = YES + +# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions +# are shown inside the group in which they are included (e.g. using \ingroup) +# instead of on a separate page (for HTML and Man pages) or section (for LaTeX +# and RTF). +# +# Note that this feature does not work in combination with +# SEPARATE_MEMBER_PAGES. +# The default value is: NO. + +INLINE_GROUPED_CLASSES = NO + +# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions +# with only public data fields or simple typedef fields will be shown inline in +# the documentation of the scope in which they are defined (i.e. file, +# namespace, or group documentation), provided this scope is documented. If set +# to NO, structs, classes, and unions are shown on a separate page (for HTML and +# Man pages) or section (for LaTeX and RTF). +# The default value is: NO. + +INLINE_SIMPLE_STRUCTS = NO + +# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or +# enum is documented as struct, union, or enum with the name of the typedef. So +# typedef struct TypeS {} TypeT, will appear in the documentation as a struct +# with name TypeT. When disabled the typedef will appear as a member of a file, +# namespace, or class. And the struct will be named TypeS. This can typically be +# useful for C code in case the coding convention dictates that all compound +# types are typedef'ed and only the typedef is referenced, never the tag name. +# The default value is: NO. + +TYPEDEF_HIDES_STRUCT = YES + +# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This +# cache is used to resolve symbols given their name and scope. Since this can be +# an expensive process and often the same symbol appears multiple times in the +# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small +# doxygen will become slower. If the cache is too large, memory is wasted. The +# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range +# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536 +# symbols. At the end of a run doxygen will report the cache usage and suggest +# the optimal cache size from a speed point of view. +# Minimum value: 0, maximum value: 9, default value: 0. + +LOOKUP_CACHE_SIZE = 0 + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in +# documentation are documented, even if no documentation was available. Private +# class members and static file members will be hidden unless the +# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES. +# Note: This will also disable the warnings about undocumented members that are +# normally produced when WARNINGS is set to YES. +# The default value is: NO. + +EXTRACT_ALL = YES + +# If the EXTRACT_PRIVATE tag is set to YES all private members of a class will +# be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIVATE = YES + +# If the EXTRACT_PACKAGE tag is set to YES all members with package or internal +# scope will be included in the documentation. +# The default value is: NO. + +EXTRACT_PACKAGE = NO + +# If the EXTRACT_STATIC tag is set to YES all static members of a file will be +# included in the documentation. +# The default value is: NO. + +EXTRACT_STATIC = YES + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) defined +# locally in source files will be included in the documentation. If set to NO +# only classes defined in header files are included. Does not have any effect +# for Java sources. +# The default value is: YES. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. When set to YES local methods, +# which are defined in the implementation section but not in the interface are +# included in the documentation. If set to NO only methods in the interface are +# included. +# The default value is: NO. + +EXTRACT_LOCAL_METHODS = YES + +# If this flag is set to YES, the members of anonymous namespaces will be +# extracted and appear in the documentation as a namespace called +# 'anonymous_namespace{file}', where file will be replaced with the base name of +# the file that contains the anonymous namespace. By default anonymous namespace +# are hidden. +# The default value is: NO. + +EXTRACT_ANON_NSPACES = YES + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all +# undocumented members inside documented classes or files. If set to NO these +# members will be included in the various overviews, but no documentation +# section is generated. This option has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. If set +# to NO these classes will be included in the various overviews. This option has +# no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend +# (class|struct|union) declarations. If set to NO these declarations will be +# included in the documentation. +# The default value is: NO. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any +# documentation blocks found inside the body of a function. If set to NO these +# blocks will be appended to the function's detailed documentation block. +# The default value is: NO. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation that is typed after a +# \internal command is included. If the tag is set to NO then the documentation +# will be excluded. Set it to YES to include the internal documentation. +# The default value is: NO. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file +# names in lower-case letters. If set to YES upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# and Mac users are advised to set this option to NO. +# The default value is: system dependent. + +CASE_SENSE_NAMES = YES + +# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with +# their full class and namespace scopes in the documentation. If set to YES the +# scope will be hidden. +# The default value is: NO. + +HIDE_SCOPE_NAMES = NO + +# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of +# the files that are included by a file in the documentation of that file. +# The default value is: YES. + +SHOW_INCLUDE_FILES = YES + +# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each +# grouped member an include statement to the documentation, telling the reader +# which file to include in order to use the member. +# The default value is: NO. + +SHOW_GROUPED_MEMB_INC = NO + +# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include +# files with double quotes in the documentation rather than with sharp brackets. +# The default value is: NO. + +FORCE_LOCAL_INCLUDES = NO + +# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the +# documentation for inline members. +# The default value is: YES. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the +# (detailed) documentation of file and class members alphabetically by member +# name. If set to NO the members will appear in declaration order. +# The default value is: YES. + +SORT_MEMBER_DOCS = NO + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief +# descriptions of file, namespace and class members alphabetically by member +# name. If set to NO the members will appear in declaration order. Note that +# this will also influence the order of the classes in the class list. +# The default value is: NO. + +SORT_BRIEF_DOCS = NO + +# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the +# (brief and detailed) documentation of class members so that constructors and +# destructors are listed first. If set to NO the constructors will appear in the +# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS. +# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief +# member documentation. +# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting +# detailed member documentation. +# The default value is: NO. + +SORT_MEMBERS_CTORS_1ST = NO + +# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy +# of group names into alphabetical order. If set to NO the group names will +# appear in their defined order. +# The default value is: NO. + +SORT_GROUP_NAMES = YES + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by +# fully-qualified names, including namespaces. If set to NO, the class list will +# be sorted only by class name, not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the alphabetical +# list. +# The default value is: NO. + +SORT_BY_SCOPE_NAME = NO + +# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper +# type resolution of all parameters of a function it will reject a match between +# the prototype and the implementation of a member function even if there is +# only one candidate or it is obvious which candidate to choose by doing a +# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still +# accept a match between prototype and implementation in such cases. +# The default value is: NO. + +STRICT_PROTO_MATCHING = NO + +# The GENERATE_TODOLIST tag can be used to enable ( YES) or disable ( NO) the +# todo list. This list is created by putting \todo commands in the +# documentation. +# The default value is: YES. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable ( YES) or disable ( NO) the +# test list. This list is created by putting \test commands in the +# documentation. +# The default value is: YES. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable ( YES) or disable ( NO) the bug +# list. This list is created by putting \bug commands in the documentation. +# The default value is: YES. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable ( YES) or disable ( NO) +# the deprecated list. This list is created by putting \deprecated commands in +# the documentation. +# The default value is: YES. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional documentation +# sections, marked by \if ... \endif and \cond +# ... \endcond blocks. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the +# initial value of a variable or macro / define can have for it to appear in the +# documentation. If the initializer consists of more lines than specified here +# it will be hidden. Use a value of 0 to hide initializers completely. The +# appearance of the value of individual variables and macros / defines can be +# controlled using \showinitializer or \hideinitializer command in the +# documentation regardless of this setting. +# Minimum value: 0, maximum value: 10000, default value: 30. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at +# the bottom of the documentation of classes and structs. If set to YES the list +# will mention the files that were used to generate the documentation. +# The default value is: YES. + +SHOW_USED_FILES = YES + +# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This +# will remove the Files entry from the Quick Index and from the Folder Tree View +# (if specified). +# The default value is: YES. + +SHOW_FILES = YES + +# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces +# page. This will remove the Namespaces entry from the Quick Index and from the +# Folder Tree View (if specified). +# The default value is: YES. + +SHOW_NAMESPACES = YES + +# The FILE_VERSION_FILTER tag can be used to specify a program or script that +# doxygen should invoke to get the current version for each file (typically from +# the version control system). Doxygen will invoke the program by executing (via +# popen()) the command command input-file, where command is the value of the +# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided +# by doxygen. Whatever the program writes to standard output is used as the file +# version. For an example see the documentation. + +FILE_VERSION_FILTER = + +# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed +# by doxygen. The layout file controls the global structure of the generated +# output files in an output format independent way. To create the layout file +# that represents doxygen's defaults, run doxygen with the -l option. You can +# optionally specify a file name after the option, if omitted DoxygenLayout.xml +# will be used as the name of the layout file. +# +# Note that if you run doxygen from a directory containing a file called +# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE +# tag is left empty. + +LAYOUT_FILE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/theme/layout.xml + +# The CITE_BIB_FILES tag can be used to specify one or more bib files containing +# the reference definitions. This must be a list of .bib files. The .bib +# extension is automatically appended if omitted. This requires the bibtex tool +# to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info. +# For LaTeX the style of the bibliography can be controlled using +# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the +# search path. Do not use file names with spaces, bibtex cannot handle them. See +# also \cite for info how to create references. + +CITE_BIB_FILES = + +#--------------------------------------------------------------------------- +# Configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated to +# standard output by doxygen. If QUIET is set to YES this implies that the +# messages are off. +# The default value is: NO. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated to standard error ( stderr) by doxygen. If WARNINGS is set to YES +# this implies that the warnings are on. +# +# Tip: Turn warnings on while writing the documentation. +# The default value is: YES. + +WARNINGS = YES + +# If the WARN_IF_UNDOCUMENTED tag is set to YES, then doxygen will generate +# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag +# will automatically be disabled. +# The default value is: YES. + +WARN_IF_UNDOCUMENTED = YES + +# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some parameters +# in a documented function, or documenting parameters that don't exist or using +# markup commands wrongly. +# The default value is: YES. + +WARN_IF_DOC_ERROR = YES + +# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that +# are documented, but have no documentation for their parameters or return +# value. If set to NO doxygen will only warn about wrong or incomplete parameter +# documentation, but not about the absence of documentation. +# The default value is: NO. + +WARN_NO_PARAMDOC = YES + +# The WARN_FORMAT tag determines the format of the warning messages that doxygen +# can produce. The string should contain the $file, $line, and $text tags, which +# will be replaced by the file and line number from which the warning originated +# and the warning text. Optionally the format may contain $version, which will +# be replaced by the version of the file (if it could be obtained via +# FILE_VERSION_FILTER) +# The default value is: $file:$line: $text. + +WARN_FORMAT = "$file:$line: $text " + +# The WARN_LOGFILE tag can be used to specify a file to which warning and error +# messages should be written. If left blank the output is written to standard +# error (stderr). + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# Configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag is used to specify the files and/or directories that contain +# documented source files. You may enter file names like myfile.cpp or +# directories like /usr/src/myproject. Separate the files or directories with +# spaces. +# Note: If this tag is empty the current directory is searched. + +INPUT = +@INCLUDE = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/device/$(DEVICE)/includes.cfg + +# This tag can be used to specify the character encoding of the source files +# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses +# libiconv (or the iconv built into libc) for the transcoding. See the libiconv +# documentation (see: http://www.gnu.org/software/libiconv) for the list of +# possible encodings. +# The default value is: UTF-8. + +INPUT_ENCODING = UTF-8 + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and +# *.h) to filter out the source-files in the directories. If left blank the +# following patterns are tested:*.c, *.cc, *.cxx, *.cpp, *.c++, *.java, *.ii, +# *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, *.hh, *.hxx, *.hpp, +# *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, *.m, *.markdown, +# *.md, *.mm, *.dox, *.py, *.f90, *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf, +# *.qsf, *.as and *.js. + +FILE_PATTERNS = *.h \ + *.c \ + *.html \ + *.md + +# The RECURSIVE tag can be used to specify whether or not subdirectories should +# be searched for input files as well. +# The default value is: NO. + +RECURSIVE = NO + +# The EXCLUDE tag can be used to specify files and/or directories that should be +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. +# +# Note that relative paths are relative to the directory from which doxygen is +# run. + +EXCLUDE = + +# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or +# directories that are symbolic links (a Unix file system feature) are excluded +# from the input. +# The default value is: NO. + +EXCLUDE_SYMLINKS = YES + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories for example use the pattern */test/* + +EXCLUDE_PATTERNS = + +# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names +# (namespaces, classes, functions, etc.) that should be excluded from the +# output. The symbol name can be a fully qualified name, a word, or if the +# wildcard * is used, a substring. Examples: ANamespace, AClass, +# AClass::ANamespace, ANamespace::*Test +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories use the pattern */test/* + +EXCLUDE_SYMBOLS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or directories +# that contain example code fragments that are included (see the \include +# command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and +# *.h) to filter out the source-files in the directories. If left blank all +# files are included. + +EXAMPLE_PATTERNS = + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude commands +# irrespective of the value of the RECURSIVE tag. +# The default value is: NO. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or directories +# that contain images that are to be included in the documentation (see the +# \image command). + +IMAGE_PATH+=$(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/images/ +IMAGE_PATH+=$(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/images/$(DEVICE)/ +IMAGE_PATH+=$(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/images/position_sense +IMAGE_PATH+=$(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/images/current_sense + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command: +# +# +# +# where is the value of the INPUT_FILTER tag, and is the +# name of an input file. Doxygen will then use the output that the filter +# program writes to standard output. If FILTER_PATTERNS is specified, this tag +# will be ignored. +# +# Note that the filter must not add or remove lines; it is applied before the +# code is scanned, but not when the output code is generated. If lines are added +# or removed, the anchors will not be placed correctly. + +INPUT_FILTER = + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: pattern=filter +# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how +# filters are used. If the FILTER_PATTERNS tag is empty or if none of the +# patterns match the file name, INPUT_FILTER is applied. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER ) will also be used to filter the input files that are used for +# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES). +# The default value is: NO. + +FILTER_SOURCE_FILES = NO + +# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file +# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and +# it is also possible to disable source filtering for a specific pattern using +# *.ext= (so without naming a filter). +# This tag requires that the tag FILTER_SOURCE_FILES is set to YES. + +FILTER_SOURCE_PATTERNS = + +# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that +# is part of the input, its contents will be placed on the main page +# (index.html). This can be useful if you have a project on for instance GitHub +# and want to reuse the introduction page also for the doxygen output. + +USE_MDFILE_AS_MAINPAGE = + +#--------------------------------------------------------------------------- +# Configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will be +# generated. Documented entities will be cross-referenced with these sources. +# +# Note: To get rid of all source code in the generated output, make sure that +# also VERBATIM_HEADERS is set to NO. +# The default value is: NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body of functions, +# classes and enums directly into the documentation. +# The default value is: NO. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any +# special comment blocks from generated source code fragments. Normal C, C++ and +# Fortran comments will always remain visible. +# The default value is: YES. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES then for each documented +# function all documented functions referencing it will be listed. +# The default value is: NO. + +REFERENCED_BY_RELATION = NO + +# If the REFERENCES_RELATION tag is set to YES then for each documented function +# all documented entities called/used by that function will be listed. +# The default value is: NO. + +REFERENCES_RELATION = NO + +# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set +# to YES, then the hyperlinks from functions in REFERENCES_RELATION and +# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will +# link to the documentation. +# The default value is: YES. + +REFERENCES_LINK_SOURCE = YES + +# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the +# source code will show a tooltip with additional information such as prototype, +# brief description and links to the definition and documentation. Since this +# will make the HTML file larger and loading of large files a bit slower, you +# can opt to disable this feature. +# The default value is: YES. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +SOURCE_TOOLTIPS = YES + +# If the USE_HTAGS tag is set to YES then the references to source code will +# point to the HTML generated by the htags(1) tool instead of doxygen built-in +# source browser. The htags tool is part of GNU's global source tagging system +# (see http://www.gnu.org/software/global/global.html). You will need version +# 4.8.6 or higher. +# +# To use it do the following: +# - Install the latest version of global +# - Enable SOURCE_BROWSER and USE_HTAGS in the config file +# - Make sure the INPUT points to the root of the source tree +# - Run doxygen as normal +# +# Doxygen will invoke htags (and that will in turn invoke gtags), so these +# tools must be available from the command line (i.e. in the search path). +# +# The result: instead of the source browser generated by doxygen, the links to +# source code will now point to the output of htags. +# The default value is: NO. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +USE_HTAGS = NO + +# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a +# verbatim copy of the header file for each class for which an include is +# specified. Set to NO to disable this. +# See also: Section \class. +# The default value is: YES. + +VERBATIM_HEADERS = YES + +#--------------------------------------------------------------------------- +# Configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all +# compounds will be generated. Enable this if the project contains a lot of +# classes, structs, unions or interfaces. +# The default value is: YES. + +ALPHABETICAL_INDEX = NO + +# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in +# which the alphabetical index list will be split. +# Minimum value: 1, maximum value: 20, default value: 5. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all classes will +# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag +# can be used to specify a prefix (or a list of prefixes) that should be ignored +# while generating the index headers. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES doxygen will generate HTML output +# The default value is: YES. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_OUTPUT = . + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each +# generated HTML page (for example: .htm, .php, .asp). +# The default value is: .html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a user-defined HTML header file for +# each generated HTML page. If the tag is left blank doxygen will generate a +# standard header. +# +# To get valid HTML the header file that includes any scripts and style sheets +# that doxygen needs, which is dependent on the configuration options used (e.g. +# the setting GENERATE_TREEVIEW). It is highly recommended to start with a +# default header using +# doxygen -w html new_header.html new_footer.html new_stylesheet.css +# YourConfigFile +# and then modify the file new_header.html. See also section "Doxygen usage" +# for information on how to generate the default header that doxygen normally +# uses. +# Note: The header is subject to change so you typically have to regenerate the +# default header when upgrading to a newer version of doxygen. For a description +# of the possible markers and block names see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_HEADER = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/theme/header.html + +# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each +# generated HTML page. If the tag is left blank doxygen will generate a standard +# footer. See HTML_HEADER for more information on how to generate a default +# footer and what special commands can be used inside the footer. See also +# section "Doxygen usage" for information on how to generate the default footer +# that doxygen normally uses. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FOOTER = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/theme/footer.html + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style +# sheet that is used by each HTML page. It can be used to fine-tune the look of +# the HTML output. If left blank doxygen will generate a default style sheet. +# See also section "Doxygen usage" for information on how to generate the style +# sheet that doxygen normally uses. +# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as +# it is more robust and this tag (HTML_STYLESHEET) will in the future become +# obsolete. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_STYLESHEET = + +# The HTML_EXTRA_STYLESHEET tag can be used to specify an additional user- +# defined cascading style sheet that is included after the standard style sheets +# created by doxygen. Using this option one can overrule certain style aspects. +# This is preferred over using HTML_STYLESHEET since it does not replace the +# standard style sheet and is therefor more robust against future updates. +# Doxygen will copy the style sheet file to the output directory. For an example +# see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_STYLESHEET = $(MOTOR_CONTROL_SDK_PATH)/docs_src/docs/api_guide/theme/stylesheet.css + +# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or +# other source files which should be copied to the HTML output directory. Note +# that these files will be copied to the base HTML output directory. Use the +# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these +# files. In the HTML_STYLESHEET file, use the file name only. Also note that the +# files will be copied as-is; there are no commands or markers available. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_FILES = + +# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen +# will adjust the colors in the stylesheet and background images according to +# this color. Hue is specified as an angle on a colorwheel, see +# http://en.wikipedia.org/wiki/Hue for more information. For instance the value +# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300 +# purple, and 360 is red again. +# Minimum value: 0, maximum value: 359, default value: 220. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_HUE = 0 + +# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors +# in the HTML output. For a value of 0 the output will use grayscales only. A +# value of 255 will produce the most vivid colors. +# Minimum value: 0, maximum value: 255, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_SAT = 0 + +# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the +# luminance component of the colors in the HTML output. Values below 100 +# gradually make the output lighter, whereas values above 100 make the output +# darker. The value divided by 100 is the actual gamma applied, so 80 represents +# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not +# change the gamma. +# Minimum value: 40, maximum value: 240, default value: 80. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_GAMMA = 100 + +# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML +# page will contain the date and time when the page was generated. Setting this +# to NO can help when comparing the output of multiple runs. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_TIMESTAMP = NO + +# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML +# documentation will contain sections that can be hidden and shown after the +# page has loaded. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_SECTIONS = NO + +# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries +# shown in the various tree structured indices initially; the user can expand +# and collapse entries dynamically later on. Doxygen will expand the tree to +# such a level that at most the specified number of entries are visible (unless +# a fully collapsed tree already exceeds this amount). So setting the number of +# entries 1 will produce a full collapsed tree by default. 0 is a special value +# representing an infinite number of entries and will result in a full expanded +# tree by default. +# Minimum value: 0, maximum value: 9999, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_INDEX_NUM_ENTRIES = 100 + +# If the GENERATE_DOCSET tag is set to YES, additional index files will be +# generated that can be used as input for Apple's Xcode 3 integrated development +# environment (see: http://developer.apple.com/tools/xcode/), introduced with +# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a +# Makefile in the HTML output directory. Running make will produce the docset in +# that directory and running make install will install the docset in +# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at +# startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html +# for more information. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_DOCSET = NO + +# This tag determines the name of the docset feed. A documentation feed provides +# an umbrella under which multiple documentation sets from a single provider +# (such as a company or product suite) can be grouped. +# The default value is: Doxygen generated docs. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_FEEDNAME = "Doxygen generated docs" + +# This tag specifies a string that should uniquely identify the documentation +# set bundle. This should be a reverse domain-name style string, e.g. +# com.mycompany.MyDocSet. Doxygen will append .docset to the name. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_BUNDLE_ID = org.doxygen.Project + +# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify +# the documentation publisher. This should be a reverse domain-name style +# string, e.g. com.mycompany.MyDocSet.documentation. +# The default value is: org.doxygen.Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_ID = org.doxygen.Publisher + +# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher. +# The default value is: Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_NAME = Publisher + +# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three +# additional HTML index files: index.hhp, index.hhc, and index.hhk. The +# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop +# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on +# Windows. +# +# The HTML Help Workshop contains a compiler that can convert all HTML output +# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML +# files are now used as the Windows 98 help format, and will replace the old +# Windows help format (.hlp) on all Windows platforms in the future. Compressed +# HTML files also contain an index, a table of contents, and you can search for +# words in the documentation. The HTML workshop also contains a viewer for +# compressed HTML files. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_HTMLHELP = NO + +# The CHM_FILE tag can be used to specify the file name of the resulting .chm +# file. You can add a path in front of the file if the result should not be +# written to the html output directory. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_FILE = + +# The HHC_LOCATION tag can be used to specify the location (absolute path +# including file name) of the HTML help compiler ( hhc.exe). If non-empty +# doxygen will try to run the HTML help compiler on the generated index.hhp. +# The file has to be specified with full path. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +HHC_LOCATION = "c:\Program Files (x86)\HTML Help Workshop\hhc.exe " + +# The GENERATE_CHI flag controls if a separate .chi index file is generated ( +# YES) or that it should be included in the master .chm file ( NO). +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +GENERATE_CHI = NO + +# The CHM_INDEX_ENCODING is used to encode HtmlHelp index ( hhk), content ( hhc) +# and project file content. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_INDEX_ENCODING = + +# The BINARY_TOC flag controls whether a binary table of contents is generated ( +# YES) or a normal table of contents ( NO) in the .chm file. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members to +# the table of contents of the HTML help documentation and to the tree view. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +TOC_EXPAND = YES + +# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and +# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that +# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help +# (.qch) of the generated HTML documentation. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_QHP = NO + +# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify +# the file name of the resulting .qch file. The path specified is relative to +# the HTML output folder. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QCH_FILE = + +# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help +# Project output. For more information please see Qt Help Project / Namespace +# (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace). +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_NAMESPACE = + +# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt +# Help Project output. For more information please see Qt Help Project / Virtual +# Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual- +# folders). +# The default value is: doc. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_VIRTUAL_FOLDER = doc + +# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom +# filter to add. For more information please see Qt Help Project / Custom +# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_NAME = + +# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the +# custom filter to add. For more information please see Qt Help Project / Custom +# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_ATTRS = + +# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this +# project's filter section matches. Qt Help Project / Filter Attributes (see: +# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_SECT_FILTER_ATTRS = + +# The QHG_LOCATION tag can be used to specify the location of Qt's +# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the +# generated .qhp file. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHG_LOCATION = + +# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be +# generated, together with the HTML files, they form an Eclipse help plugin. To +# install this plugin and make it available under the help contents menu in +# Eclipse, the contents of the directory containing the HTML and XML files needs +# to be copied into the plugins directory of eclipse. The name of the directory +# within the plugins directory should be the same as the ECLIPSE_DOC_ID value. +# After copying Eclipse needs to be restarted before the help appears. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_ECLIPSEHELP = NO + +# A unique identifier for the Eclipse help plugin. When installing the plugin +# the directory name containing the HTML and XML files should also have this +# name. Each documentation set should have its own identifier. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES. + +ECLIPSE_DOC_ID = org.doxygen.Project + +# If you want full control over the layout of the generated HTML pages it might +# be necessary to disable the index and replace it with your own. The +# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top +# of each HTML page. A value of NO enables the index and the value YES disables +# it. Since the tabs in the index contain the same information as the navigation +# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +DISABLE_INDEX = YES + +# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index +# structure should be generated to display hierarchical information. If the tag +# value is set to YES, a side panel will be generated containing a tree-like +# index structure (just like the one that is generated for HTML Help). For this +# to work a browser that supports JavaScript, DHTML, CSS and frames is required +# (i.e. any modern browser). Windows users are probably better off using the +# HTML help feature. Via custom stylesheets (see HTML_EXTRA_STYLESHEET) one can +# further fine-tune the look of the index. As an example, the default style +# sheet generated by doxygen has an example that shows how to put an image at +# the root of the tree instead of the PROJECT_NAME. Since the tree basically has +# the same information as the tab index, you could consider setting +# DISABLE_INDEX to YES when enabling this option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_TREEVIEW = YES + +# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that +# doxygen will group on one line in the generated HTML documentation. +# +# Note that a value of 0 will completely suppress the enum values from appearing +# in the overview section. +# Minimum value: 0, maximum value: 20, default value: 4. +# This tag requires that the tag GENERATE_HTML is set to YES. + +ENUM_VALUES_PER_LINE = 4 + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used +# to set the initial width (in pixels) of the frame in which the tree is shown. +# Minimum value: 0, maximum value: 1500, default value: 250. +# This tag requires that the tag GENERATE_HTML is set to YES. + +TREEVIEW_WIDTH = 250 + +# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open links to +# external symbols imported via tag files in a separate window. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +EXT_LINKS_IN_WINDOW = NO + +# Use this tag to change the font size of LaTeX formulas included as images in +# the HTML documentation. When you change the font size after a successful +# doxygen run you need to manually remove any form_*.png images from the HTML +# output directory to force them to be regenerated. +# Minimum value: 8, maximum value: 50, default value: 10. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_FONTSIZE = 10 + +# Use the FORMULA_TRANPARENT tag to determine whether or not the images +# generated for formulas are transparent PNGs. Transparent PNGs are not +# supported properly for IE 6.0, but are supported on all modern browsers. +# +# Note that when changing this option you need to delete any form_*.png files in +# the HTML output directory before the changes have effect. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_TRANSPARENT = YES + +# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see +# http://www.mathjax.org) which uses client side Javascript for the rendering +# instead of using prerendered bitmaps. Use this if you do not have LaTeX +# installed or if you want to formulas look prettier in the HTML output. When +# enabled you may also need to install MathJax separately and configure the path +# to it using the MATHJAX_RELPATH option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +USE_MATHJAX = NO + +# When MathJax is enabled you can set the default output format to be used for +# the MathJax output. See the MathJax site (see: +# http://docs.mathjax.org/en/latest/output.html) for more details. +# Possible values are: HTML-CSS (which is slower, but has the best +# compatibility), NativeMML (i.e. MathML) and SVG. +# The default value is: HTML-CSS. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_FORMAT = HTML-CSS + +# When MathJax is enabled you need to specify the location relative to the HTML +# output directory using the MATHJAX_RELPATH option. The destination directory +# should contain the MathJax.js script. For instance, if the mathjax directory +# is located at the same level as the HTML output directory, then +# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax +# Content Delivery Network so you can quickly see the result without installing +# MathJax. However, it is strongly recommended to install a local copy of +# MathJax from http://www.mathjax.org before deployment. +# The default value is: http://cdn.mathjax.org/mathjax/latest. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest + +# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax +# extension names that should be enabled during MathJax rendering. For example +# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_EXTENSIONS = + +# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces +# of code that will be used on startup of the MathJax code. See the MathJax site +# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an +# example see the documentation. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_CODEFILE = + +# When the SEARCHENGINE tag is enabled doxygen will generate a search box for +# the HTML output. The underlying search engine uses javascript and DHTML and +# should work on any modern browser. Note that when using HTML help +# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET) +# there is already a search function so this one should typically be disabled. +# For large projects the javascript based search engine can be slow, then +# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to +# search using the keyboard; to jump to the search box use + S +# (what the is depends on the OS and browser, but it is typically +# , /