diff --git a/.metadata/.tirex/am243x.content.tirex.json b/.metadata/.tirex/am243x.content.tirex.json index a19613d..0d8d844 100644 --- a/.metadata/.tirex/am243x.content.tirex.json +++ b/.metadata/.tirex/am243x.content.tirex.json @@ -748,6 +748,68 @@ ] ] }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Pruicss Pwm Duty Cycle Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "pruicss_pwm_duty_cycle", + "location": "../../examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_GP_EVM" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "pruicss_pwm", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Pruicss Pwm Duty Cycle Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "pruicss_pwm_duty_cycle", + "location": "../../examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM243x_LAUNCHPAD" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "pruicss_pwm", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "web.page", "resourceClass": [ diff --git a/.metadata/.tirex/am64x.content.tirex.json b/.metadata/.tirex/am64x.content.tirex.json index 5a0cfbd..7cd7b7a 100644 --- a/.metadata/.tirex/am64x.content.tirex.json +++ b/.metadata/.tirex/am64x.content.tirex.json @@ -262,6 +262,37 @@ ] ] }, + { + "resourceType": "project.ccs", + "resourceClass": [ + "example" + ], + "resourceSubClass": [ + "example.general" + ], + "description": "A Pruicss Pwm Duty Cycle Example. CPU is R5FSS0-0 running FREERTOS.", + "name": "pruicss_pwm_duty_cycle", + "location": "../../examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec", + "devtools": [ + "AM64x_GP_EVM" + ], + "kernel": [ + "freertos" + ], + "compiler": [ + "ticlang" + ], + "subCategories": [ + "pruicss_pwm", + "r5fss0-0_freertos" + ], + "mainCategories": [ + [ + "Examples", + "Development Tools" + ] + ] + }, { "resourceType": "web.page", "resourceClass": [ diff --git a/.project/device/project_am243x.js b/.project/device/project_am243x.js index ea835cd..7bc157e 100644 --- a/.project/device/project_am243x.js +++ b/.project/device/project_am243x.js @@ -6,6 +6,7 @@ const component_file_list = [ "source/position_sense/hdsl/.project/project.js", "source/position_sense/tamagawa/.project/project.js", "source/position_sense/bissc/.project/project.js", + "source/pruicss_pwm/.project/project.js" ]; const device_defines = { @@ -28,6 +29,7 @@ const example_file_list = [ "examples/position_sense/bissc_diagnostic/multi_channel_load_share/.project/project.js", "examples/position_sense/bissc_diagnostic/multi_channel_single_pru/.project/project.js", "examples/current_sense/icss_sdfm/.project/project.js", + "examples/pruicss_pwm/.project/project.js", "source/current_sense/sdfm/firmware/.project/project.js", "source/position_sense/endat/firmware/multi_channel_load_share/.project/project.js", "source/position_sense/endat/firmware/single_channel/.project/project.js", diff --git a/.project/device/project_am64x.js b/.project/device/project_am64x.js index e4d17ca..fdd4ab3 100644 --- a/.project/device/project_am64x.js +++ b/.project/device/project_am64x.js @@ -5,6 +5,7 @@ const component_file_list = [ "source/position_sense/endat/.project/project.js", "source/position_sense/hdsl/.project/project.js", "source/position_sense/tamagawa/.project/project.js", + "source/pruicss_pwm/.project/project.js" ]; const device_defines = { @@ -22,6 +23,7 @@ const example_file_list = [ "examples/position_sense/tamagawa_diagnostic/multi_channel/.project/project.js", "examples/position_sense/tamagawa_diagnostic/single_channel/.project/project.js", "examples/current_sense/icss_sdfm/.project/project.js", + "examples/pruicss_pwm/.project/project.js", "source/current_sense/sdfm/firmware/.project/project.js", "source/position_sense/endat/firmware/multi_channel_load_share/.project/project.js", "source/position_sense/endat/firmware/single_channel/.project/project.js", diff --git a/docs_src/docs/api_guide/device/am243x/components.cfg b/docs_src/docs/api_guide/device/am243x/components.cfg index d1bcb68..5d53f9a 100644 --- a/docs_src/docs/api_guide/device/am243x/components.cfg +++ b/docs_src/docs/api_guide/device/am243x/components.cfg @@ -22,3 +22,4 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/bissc/include/bissc_drv. INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/bissc/include/bissc_interface.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_api.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/pruicss_pwm/include/pruicss_pwm.h diff --git a/docs_src/docs/api_guide/device/am64x/components.cfg b/docs_src/docs/api_guide/device/am64x/components.cfg index ee6c538..2b7e387 100644 --- a/docs_src/docs/api_guide/device/am64x/components.cfg +++ b/docs_src/docs/api_guide/device/am64x/components.cfg @@ -17,3 +17,4 @@ INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/hdsl/include/hdsl_drv.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/position_sense/tamagawa/include/tamagawa_drv.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_api.h INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/current_sense/sdfm/include/sdfm_drv.h +INPUT+= $(MOTOR_CONTROL_SDK_PATH)/source/pruicss_pwm/include/pruicss_pwm.h diff --git a/examples/pruicss_pwm/.project/project.js b/examples/pruicss_pwm/.project/project.js new file mode 100644 index 0000000..f6c2d16 --- /dev/null +++ b/examples/pruicss_pwm/.project/project.js @@ -0,0 +1,14 @@ +function getComponentProperty(device) +{ + return require(`./project_${device}`).getComponentProperty(); +}; + +function getComponentBuildProperty(buildOption) +{ + return require(`./project_${buildOption.device}`).getComponentBuildProperty(buildOption); +}; + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/pruicss_pwm/.project/project_am243x.js b/examples/pruicss_pwm/.project/project_am243x.js new file mode 100644 index 0000000..c8b7974 --- /dev/null +++ b/examples/pruicss_pwm/.project/project_am243x.js @@ -0,0 +1,122 @@ +let path = require('path'); + +let device = "am243x"; + +const files = { + common: [ + "main.c", + "pruicss_pwm_dutycycle.c" + ], +}; + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", /* Example base */ + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib" + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include" + + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + "pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + + + +const lnkfiles = { + common: [ + "linker.cmd", + ] +}; + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLE_PRUICSS_PWM_DUTY_CYCLE"; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am243x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am243x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "pruicss_pwm_duty_cycle_main", + }, + } +]; + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-evm", os: "freertos"}, + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am243x-lp", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "pruicss_pwm_duty_cycle"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + property.isSkipTopLevelBuild = false; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.lnkfiles = lnkfiles; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + + if(buildOption.cpu.match(/r5f*/)) { + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/pruicss_pwm/.project/project_am64x.js b/examples/pruicss_pwm/.project/project_am64x.js new file mode 100644 index 0000000..38cef09 --- /dev/null +++ b/examples/pruicss_pwm/.project/project_am64x.js @@ -0,0 +1,121 @@ +let path = require('path'); + +let device = "am64x"; + +const files = { + common: [ + "main.c", + "pruicss_pwm_dutycycle.c" + ], +}; + +/* Relative to where the makefile will be generated + * Typically at /// + */ +const filedirs = { + common: [ + "..", /* core_os_combo base */ + "../../..", /* Example base */ + ], +}; + +const libdirs_freertos = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib" + ], +}; + +const includes_freertos_r5f = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f", + "${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0", + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include" + + ], +}; + +const libs_freertos_r5f = { + common: [ + "freertos.am64x.r5f.ti-arm-clang.${ConfigName}.lib", + "drivers.am64x.r5f.ti-arm-clang.${ConfigName}.lib", + "board.am64x.r5f.ti-arm-clang.${ConfigName}.lib", + "pruicss_pwm.am64x.r5f.ti-arm-clang.${ConfigName}.lib", + ], +}; + + + +const lnkfiles = { + common: [ + "linker.cmd", + ] +}; + +const syscfgfile = "../example.syscfg"; + +const readmeDoxygenPageTag = "EXAMPLE_PRUICSS_PWM_DUTY_CYCLE"; + +const templates_freertos_r5f = +[ + { + input: ".project/templates/am64x/common/linker_r5f.cmd.xdt", + output: "linker.cmd", + }, + { + input: ".project/templates/am64x/freertos/main_freertos.c.xdt", + output: "../main.c", + options: { + entryFunction: "pruicss_pwm_duty_cycle_main", + }, + } +]; + +const buildOptionCombos = [ + { device: device, cpu: "r5fss0-0", cgt: "ti-arm-clang", board: "am64x-evm", os: "freertos"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "executable"; + property.name = "pruicss_pwm_duty_cycle"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + property.isSkipTopLevelBuild = false; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.lnkfiles = lnkfiles; + build_property.syscfgfile = syscfgfile; + build_property.readmeDoxygenPageTag = readmeDoxygenPageTag; + + if(buildOption.cpu.match(/r5f*/)) { + if(buildOption.os.match(/freertos*/) ) + { + build_property.includes = includes_freertos_r5f; + build_property.libdirs = libdirs_freertos; + build_property.libs = libs_freertos_r5f; + build_property.templates = templates_freertos_r5f; + + } + } + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..75ae209 --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,73 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" + * @versions {"tool":"1.18.0+3266"} + */ + +/** + * Import the modules used in this configuration. + */ +const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); +const pruicss1 = pruicss.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +pruicss1.$name = "CONFIG_PRU_ICSS0"; +pruicss1.instance = "ICSSG1"; +pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false); +const uart_v0_template1 = uart_v0_template.addInstance({}, false); +uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0"; +debug_log.uartLog.child = uart_v0_template1; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x80000000; +mpu_armv76.size = 31; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/main.c b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..c01144a --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void pruicss_pwm_duty_cycle_main(void *args); + +void freertos_main(void *args) +{ + pruicss_pwm_duty_cycle_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/pruicss_pwm_dutycycle.c b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/pruicss_pwm_dutycycle.c new file mode 100644 index 0000000..3710b35 --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/pruicss_pwm_dutycycle.c @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_drivers_open_close.h" +#include "ti_board_open_close.h" +#include +#include +#include + +/** \brief Global Structure pointer holding PRUICSSG1 memory Map. */ + +PRUICSS_Handle gPruIcssHandle; + +/* + * This example uses the PRUICSS PWM module to generate a signal + * with a specified duty cycle. + * + * The default parameters are : Frequency : 1kHz, Duty cycle : 25%, + * All these parameters are configurable. + * + * In this example PWM0_2_NEG(alias signal B2) is used to generate the signal, the user can also + * select a different one. + * + * PWM0_2_NEG(alias signal B2) uses IEP0 CMP6 EVENT to control Duty cycle + * & IEP0 CMP0 to control output Frequency + * This example also showcases how to configure and use the PRUICSS PWM module. + */ + +/*FIXME: IEP0_CLK_FREQ macro to be included in driver_config.h sysconfig generated file*/ +#define PRUICSS_IEP0_CLK_FREQ (200000000U) +/* Modify this to change the IEP counter increment value*/ +#define PRUICSS_IEP_COUNT_INCREMENT_VALUE (1U) +/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */ +#define APP_PRUICSS_PWM_DUTY_CYCLE (25U) +/* Frequency of PWM output signal in Hz - 1 KHz is selected */ +#define APP_PRUICSS_PWM_OUTPUT_FREQ (1U * 1000U) +/* PRD value - this determines the period */ +#define APP_PRUICSS_PWM_PRD_VAL (((PRUICSS_IEP0_CLK_FREQ / APP_PRUICSS_PWM_OUTPUT_FREQ))*(PRUICSS_IEP_COUNT_INCREMENT_VALUE)) +/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/ +#define APP_PRUICSS_IEP0_COMP6_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100)) + +Pinmux_PerCfg_t gPinMuxMainDomainCfg1[] = { + + /* PRU_ICSSG1_PWM0 pin config */ + /* PRG1_PWM0_B2 -> PRG1_PRU0_GPO17 (U7) */ + { + PIN_PRG1_PRU0_GPO17, + ( PIN_MODE(3) | PIN_PULL_DISABLE ) + }, + + {PINMUX_END, PINMUX_END} +}; +void pruicss_iep_init(void *args) +{ + int32_t status; + /*Disable IEP0 counter*/ + status= PRUICSS_controlIepCounter(gPruIcssHandle,0,0); + DebugP_assert(SystemP_SUCCESS == status); + + Pinmux_config(gPinMuxMainDomainCfg1, PINMUX_DOMAIN_ID_MAIN); + + /*Intialize IEP0 count value*/ + PRUICSS_PWM_setIepCounterLower_32bitValue(gPruIcssHandle,0,0xFFFFFFFF); + PRUICSS_PWM_setIepCounterUpper_32bitValue(gPruIcssHandle,0,0xFFFFFFFF); + + /*configure cmp 0 value with APP_PRUICSS_PWM_PRD_VAL*/ + status=PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle,0,0,(APP_PRUICSS_PWM_PRD_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure cmp 6 value with APP_PRUICSS_IEP0_COMP6_VAL*/ + status=PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle,0,6,(APP_PRUICSS_IEP0_COMP6_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp 0 and cmp 6*/ + status=PRUICSS_PWM_configureIepCompareEnable(gPruIcssHandle,0,0x41); + DebugP_assert(SystemP_SUCCESS == status); + + /*Set IEP0 counter Increment value*/ + status=PRUICSS_setIepCounterIncrementValue(gPruIcssHandle,0,PRUICSS_IEP_COUNT_INCREMENT_VALUE); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp 0 reset of counter*/ + PRUICSS_PWM_configureIepCmp0ResetEnable(gPruIcssHandle,0,0x1); + + /*Enable IEP0 counter*/ + status=PRUICSS_controlIepCounter(gPruIcssHandle,0,1); + DebugP_assert(SystemP_SUCCESS == status); + +} + +void pruicss_pwm_init(void *args) +{ + int32_t status; + /*Enable IEP CMP flags to auto clear after state transition*/ + status=PRUICSS_PWM_configurePwmEfficiencyModeEnable(gPruIcssHandle, 1); + DebugP_assert(SystemP_SUCCESS == status); + /*Enable compare0 trip reset */ + PRUICSS_PWM_configurePwmCmp0TripResetEnable(gPruIcssHandle,0,1); + /*configure PWM B2 signal of set 0, intial state to low*/ + status=PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle,0,0,1); + DebugP_assert(SystemP_SUCCESS == status); + /*configure PWM B2 signal of set 0, active state to high*/ + status=PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle,0,1,2); + DebugP_assert(SystemP_SUCCESS == status); +} + +void pruicss_pwm_duty_cycle_main(void *args) +{ + + int32_t status; + + Drivers_open(); // check return status + + status = Board_driversOpen(); + DebugP_assert(SystemP_SUCCESS == status); + + gPruIcssHandle = PRUICSS_open(CONFIG_PRU_ICSS0); + DebugP_assert(gPruIcssHandle != NULL); + + pruicss_pwm_init(NULL); + + pruicss_iep_init(NULL); + + while (1) + { + ClockP_usleep(1); + } + + Board_driversClose(); + Drivers_close(); +} diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..98b8b4b --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,115 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..70fe610 --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,309 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=pruicss_pwm_duty_cycle.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=pruicss_pwm_duty_cycle.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=pruicss_pwm_duty_cycle.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=pruicss_pwm_duty_cycle.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=pruicss_pwm_duty_cycle.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=pruicss_pwm_duty_cycle.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + main.c \ + pruicss_pwm_dutycycle.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0 \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lpruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang pruicss_pwm_duty_cycle ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..71c14a4 --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..0edc809 --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,62 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM243x_ALX_beta" --package "ALX" --part "ALX" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.01" + * @versions {"tool":"1.18.0+3266"} + */ + +/** + * Import the modules used in this configuration. + */ +const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); +const pruicss1 = pruicss.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +pruicss1.$name = "CONFIG_PRU_ICSS0"; +pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/main.c b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..c01144a --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void pruicss_pwm_duty_cycle_main(void *args); + +void freertos_main(void *args) +{ + pruicss_pwm_duty_cycle_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/pruicss_pwm_dutycycle.c b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/pruicss_pwm_dutycycle.c new file mode 100644 index 0000000..559a3d6 --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/pruicss_pwm_dutycycle.c @@ -0,0 +1,210 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_drivers_open_close.h" +#include "ti_board_open_close.h" +#include +#include +#include + +/** \brief Global Structure pointer holding PRUICSSG0 memory Map. */ + +PRUICSS_Handle gPruIcssHandle; + +/* + * This example uses the PRUICSS PWM module to generate a signal + * with a specified duty cycle. + * + * The default parameters are : Frequency : 1kHz, Duty cycle : 25%, + * All these parameters are configurable. + * + * In this example PWM0_0_POS(alias signal PWM0_A0),PWM3_2_NEG(alias signal PWM3_B2) is used to generate the signal, the user can also + * select a different one. + * + * PWM0_0_POS(alias signal PWM0_A0) uses IEP0 CMP1 EVENT to control Duty cycle + * & IEP0 CMP0 to control output Frequency + * + * PWM3_2_NEG(alias signal PWM3_B2) uses IEP1 CMP12 EVENT to control Duty cycle + * & IEP0 CMP0 to control output Frequency + * + * This example also showcases how to configure and use the PRUICSS PWM module. + */ + +/*FIXME: IEP0_CLK_FREQ macro to be included in driver_config.h sysconfig generated file*/ +#define PRUICSS_IEP0_CLK_FREQ (200000000U) +/* Modify this to change the IEP counter increment value*/ +#define PRUICSS_IEP_COUNT_INCREMENT_VALUE (1U) +/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */ +#define APP_PRUICSS_PWM3_B2_DUTY_CYCLE (25U) +/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */ +#define APP_PRUICSS_PWM0_A0_DUTY_CYCLE (25U) +/* Frequency of PWM output signal in Hz - 1 KHz is selected */ +#define APP_PRUICSS_PWM_OUTPUT_FREQ (1U * 1000U) +/* PRD value - this determines the period */ +#define APP_PRUICSS_PWM_PRD_VAL (((PRUICSS_IEP0_CLK_FREQ / APP_PRUICSS_PWM_OUTPUT_FREQ))*(PRUICSS_IEP_COUNT_INCREMENT_VALUE)) +/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/ +#define APP_PRUICSS_IEP0_COMP1_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM0_A0_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100)) +/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/ +#define APP_PRUICSS_IEP1_COMP12_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM3_B2_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100)) + +/*FIXME: Add pinmux in sysconfig generated file*/ +Pinmux_PerCfg_t gPinMuxMainDomainCfg1[] = { + + /* PRU_ICSSG0_PWM0 pin config */ + /* PRG0_PWM0_A0 -> PRG0_PRU0_GPO12 (K1) */ + { + PIN_PRG0_PRU0_GPO12, + ( PIN_MODE(3) | PIN_PULL_DISABLE ) + }, + /* PRU_ICSSG0_PWM3 pin config */ + /* PRG0_PWM3_B2 -> PRG0_PRU0_GPO5 (F2) */ + { + PIN_PRG0_PRU0_GPO5, + ( PIN_MODE(3) | PIN_PULL_DISABLE ) + }, + {PINMUX_END, PINMUX_END} + +}; + + +void pruicss_iep_init(void *args) +{ + + int status; + /*Disable IEP0 counter*/ + status= PRUICSS_controlIepCounter(gPruIcssHandle,0,0); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable IEP1 slave mode*/ + status=PRUICSS_PWM_enableIEP1Slave(gPruIcssHandle,1); + DebugP_assert(SystemP_SUCCESS == status); + + /*Intialize IEP0 count value*/ + PRUICSS_PWM_setIepCounterLower_32bitValue(gPruIcssHandle,0,0xFFFFFFFF); + PRUICSS_PWM_setIepCounterUpper_32bitValue(gPruIcssHandle,0,0xFFFFFFFF); + + /*configure cmp 0 value of IEP0 with APP_PRUICSS_PWM_PRD_VAL*/ + status=PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle,0,0,(APP_PRUICSS_PWM_PRD_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure cmp 1 value with APP_PRUICSS_IEP0_COMP1_VAL*/ + status=PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle,0,1,(APP_PRUICSS_IEP0_COMP1_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure cmp 11 value with APP_PRUICSS_IEP1_COMP11_VAL*/ + status=PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle,1,12,(APP_PRUICSS_IEP1_COMP12_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp 0 and cmp 1 of IEP0*/ + status=PRUICSS_PWM_configureIepCompareEnable(gPruIcssHandle,0,0x3); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp12 of IEP1*/ + status=PRUICSS_PWM_configureIepCompareEnable(gPruIcssHandle,1,0x1000); + DebugP_assert(SystemP_SUCCESS == status); + + /*Set IEP0 counter Increment value*/ + status=PRUICSS_setIepCounterIncrementValue(gPruIcssHandle,0,PRUICSS_IEP_COUNT_INCREMENT_VALUE); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp 0 reset of IEP0 counter*/ + status=PRUICSS_PWM_configureIepCmp0ResetEnable(gPruIcssHandle,0,0x1); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable IEP0 counter*/ + status=PRUICSS_controlIepCounter(gPruIcssHandle,0,1); + DebugP_assert(SystemP_SUCCESS == status); + +} + +void pruicss_pwm_init(void *args){ + + int status; + /*Enable IEP CMP flags to auto clear after state transition*/ + status=PRUICSS_PWM_configurePwmEfficiencyModeEnable(gPruIcssHandle, 1); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable compare0 trip reset of set 0*/ + status=PRUICSS_PWM_configurePwmCmp0TripResetEnable(gPruIcssHandle,0,1); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable compare0 trip reset of set 3 */ + status=PRUICSS_PWM_configurePwmCmp0TripResetEnable(gPruIcssHandle,3,1); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure PWM B2 signal of set 0, intial state to low*/ + status=PRUICSS_PWM_actionOnOutputCfgPwmSignalA0(gPruIcssHandle,0,0,1); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure PWM B2 signal of set 0, active state to high*/ + status=PRUICSS_PWM_actionOnOutputCfgPwmSignalA0(gPruIcssHandle,0,1,2); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure PWM B2 signal of set 0, intial state to low*/ + status=PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle,3,0,1); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure PWM B2 signal of set 0, active state to high*/ + status=PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle,3,1,2); + DebugP_assert(SystemP_SUCCESS == status); +} + +void pruicss_pwm_duty_cycle_main(void *args) +{ + + int32_t status; + + Drivers_open(); // check return status + + status = Board_driversOpen(); + DebugP_assert(SystemP_SUCCESS == status); + + gPruIcssHandle = PRUICSS_open(CONFIG_PRU_ICSS0); + DebugP_assert(gPruIcssHandle != NULL); + + Pinmux_config(gPinMuxMainDomainCfg1, PINMUX_DOMAIN_ID_MAIN); + + pruicss_pwm_init(NULL); + + pruicss_iep_init(NULL); + + while (1) + { + ClockP_usleep(1); + } + + Board_driversClose(); + Drivers_close(); +} diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..718b305 --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,115 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..69640f4 --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..955d77a --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,309 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=pruicss_pwm_duty_cycle.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=pruicss_pwm_duty_cycle.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=pruicss_pwm_duty_cycle.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=pruicss_pwm_duty_cycle.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=pruicss_pwm_duty_cycle.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=pruicss_pwm_duty_cycle.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + main.c \ + pruicss_pwm_dutycycle.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0 \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lpruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + pruicss_pwm.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang pruicss_pwm_duty_cycle ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALX_beta --context r5fss0-0 --part ALX --package ALX --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..8666cfd --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,106 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..54a0879 --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/example.syscfg b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/example.syscfg new file mode 100644 index 0000000..7f5f8f6 --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/example.syscfg @@ -0,0 +1,73 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM64x" --package "ALV" --part "Default" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK@09.01.00" + * @versions {"tool":"1.18.0+3266"} + */ + +/** + * Import the modules used in this configuration. + */ +const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); +const pruicss1 = pruicss.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const mpu_armv76 = mpu_armv7.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +pruicss1.$name = "CONFIG_PRU_ICSS0"; +pruicss1.instance = "ICSSG1"; +pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false); +const uart_v0_template1 = uart_v0_template.addInstance({}, false); +uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0"; +debug_log.uartLog.child = uart_v0_template1; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x60000000; +mpu_armv75.size = 28; +mpu_armv75.accessPermissions = "Supervisor RD, User RD"; + +mpu_armv76.$name = "CONFIG_MPU_REGION5"; +mpu_armv76.baseAddr = 0x80000000; +mpu_armv76.size = 31; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/main.c b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/main.c new file mode 100644 index 0000000..c01144a --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/main.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2021 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_board_config.h" +#include "FreeRTOS.h" +#include "task.h" + +#define MAIN_TASK_PRI (configMAX_PRIORITIES-1) + +#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) +StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); + +StaticTask_t gMainTaskObj; +TaskHandle_t gMainTask; + +void pruicss_pwm_duty_cycle_main(void *args); + +void freertos_main(void *args) +{ + pruicss_pwm_duty_cycle_main(NULL); + + vTaskDelete(NULL); +} + + +int main(void) +{ + /* init SOC specific modules */ + System_init(); + Board_init(); + + /* This task is created at highest priority, it should create more tasks and then delete itself */ + gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ + "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ + MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ + NULL, /* We are not using the task parameter. */ + MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ + gMainTaskStack, /* pointer to stack base */ + &gMainTaskObj ); /* pointer to statically allocated task object memory */ + configASSERT(gMainTask != NULL); + + /* Start the scheduler to start the tasks executing. */ + vTaskStartScheduler(); + + /* The following line should never be reached because vTaskStartScheduler() + will only return if there was not enough FreeRTOS heap memory available to + create the Idle and (if configured) Timer tasks. Heap management, and + techniques for trapping heap exhaustion, are described in the book text. */ + DebugP_assertNoLog(0); + + return 0; +} diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/pruicss_pwm_dutycycle.c b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/pruicss_pwm_dutycycle.c new file mode 100644 index 0000000..3710b35 --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/pruicss_pwm_dutycycle.c @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include "ti_drivers_config.h" +#include "ti_drivers_open_close.h" +#include "ti_board_open_close.h" +#include +#include +#include + +/** \brief Global Structure pointer holding PRUICSSG1 memory Map. */ + +PRUICSS_Handle gPruIcssHandle; + +/* + * This example uses the PRUICSS PWM module to generate a signal + * with a specified duty cycle. + * + * The default parameters are : Frequency : 1kHz, Duty cycle : 25%, + * All these parameters are configurable. + * + * In this example PWM0_2_NEG(alias signal B2) is used to generate the signal, the user can also + * select a different one. + * + * PWM0_2_NEG(alias signal B2) uses IEP0 CMP6 EVENT to control Duty cycle + * & IEP0 CMP0 to control output Frequency + * This example also showcases how to configure and use the PRUICSS PWM module. + */ + +/*FIXME: IEP0_CLK_FREQ macro to be included in driver_config.h sysconfig generated file*/ +#define PRUICSS_IEP0_CLK_FREQ (200000000U) +/* Modify this to change the IEP counter increment value*/ +#define PRUICSS_IEP_COUNT_INCREMENT_VALUE (1U) +/* Duty Cycle of PWM output signal in % - give value from 1 to 99 */ +#define APP_PRUICSS_PWM_DUTY_CYCLE (25U) +/* Frequency of PWM output signal in Hz - 1 KHz is selected */ +#define APP_PRUICSS_PWM_OUTPUT_FREQ (1U * 1000U) +/* PRD value - this determines the period */ +#define APP_PRUICSS_PWM_PRD_VAL (((PRUICSS_IEP0_CLK_FREQ / APP_PRUICSS_PWM_OUTPUT_FREQ))*(PRUICSS_IEP_COUNT_INCREMENT_VALUE)) +/* DUTY CYCLE width - this determines width of PWM output signal duty cycle*/ +#define APP_PRUICSS_IEP0_COMP6_VAL (APP_PRUICSS_PWM_PRD_VAL-((APP_PRUICSS_PWM_DUTY_CYCLE*APP_PRUICSS_PWM_PRD_VAL)/100)) + +Pinmux_PerCfg_t gPinMuxMainDomainCfg1[] = { + + /* PRU_ICSSG1_PWM0 pin config */ + /* PRG1_PWM0_B2 -> PRG1_PRU0_GPO17 (U7) */ + { + PIN_PRG1_PRU0_GPO17, + ( PIN_MODE(3) | PIN_PULL_DISABLE ) + }, + + {PINMUX_END, PINMUX_END} +}; +void pruicss_iep_init(void *args) +{ + int32_t status; + /*Disable IEP0 counter*/ + status= PRUICSS_controlIepCounter(gPruIcssHandle,0,0); + DebugP_assert(SystemP_SUCCESS == status); + + Pinmux_config(gPinMuxMainDomainCfg1, PINMUX_DOMAIN_ID_MAIN); + + /*Intialize IEP0 count value*/ + PRUICSS_PWM_setIepCounterLower_32bitValue(gPruIcssHandle,0,0xFFFFFFFF); + PRUICSS_PWM_setIepCounterUpper_32bitValue(gPruIcssHandle,0,0xFFFFFFFF); + + /*configure cmp 0 value with APP_PRUICSS_PWM_PRD_VAL*/ + status=PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle,0,0,(APP_PRUICSS_PWM_PRD_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*configure cmp 6 value with APP_PRUICSS_IEP0_COMP6_VAL*/ + status=PRUICSS_PWM_setIepCompareEventLower_32bitValue(gPruIcssHandle,0,6,(APP_PRUICSS_IEP0_COMP6_VAL & 0xFFFFFFFF)); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp 0 and cmp 6*/ + status=PRUICSS_PWM_configureIepCompareEnable(gPruIcssHandle,0,0x41); + DebugP_assert(SystemP_SUCCESS == status); + + /*Set IEP0 counter Increment value*/ + status=PRUICSS_setIepCounterIncrementValue(gPruIcssHandle,0,PRUICSS_IEP_COUNT_INCREMENT_VALUE); + DebugP_assert(SystemP_SUCCESS == status); + + /*Enable cmp 0 reset of counter*/ + PRUICSS_PWM_configureIepCmp0ResetEnable(gPruIcssHandle,0,0x1); + + /*Enable IEP0 counter*/ + status=PRUICSS_controlIepCounter(gPruIcssHandle,0,1); + DebugP_assert(SystemP_SUCCESS == status); + +} + +void pruicss_pwm_init(void *args) +{ + int32_t status; + /*Enable IEP CMP flags to auto clear after state transition*/ + status=PRUICSS_PWM_configurePwmEfficiencyModeEnable(gPruIcssHandle, 1); + DebugP_assert(SystemP_SUCCESS == status); + /*Enable compare0 trip reset */ + PRUICSS_PWM_configurePwmCmp0TripResetEnable(gPruIcssHandle,0,1); + /*configure PWM B2 signal of set 0, intial state to low*/ + status=PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle,0,0,1); + DebugP_assert(SystemP_SUCCESS == status); + /*configure PWM B2 signal of set 0, active state to high*/ + status=PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(gPruIcssHandle,0,1,2); + DebugP_assert(SystemP_SUCCESS == status); +} + +void pruicss_pwm_duty_cycle_main(void *args) +{ + + int32_t status; + + Drivers_open(); // check return status + + status = Board_driversOpen(); + DebugP_assert(SystemP_SUCCESS == status); + + gPruIcssHandle = PRUICSS_open(CONFIG_PRU_ICSS0); + DebugP_assert(gPruIcssHandle != NULL); + + pruicss_pwm_init(NULL); + + pruicss_iep_init(NULL); + + while (1) + { + ClockP_usleep(1); + } + + Board_driversClose(); + Drivers_close(); +} diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec new file mode 100644 index 0000000..cd122fb --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec @@ -0,0 +1,115 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd new file mode 100644 index 0000000..c4848c3 --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd @@ -0,0 +1,148 @@ + +/* This is the stack that is used by code running within main() + * In case of NORTOS, + * - This means all the code outside of ISR uses this stack + * In case of FreeRTOS + * - This means all the code until vTaskStartScheduler() is called in main() + * uses this stack. + * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack + */ +--stack_size=16384 +/* This is the heap size for malloc() API in NORTOS and FreeRTOS + * This is also the heap used by pvPortMalloc in FreeRTOS + */ +--heap_size=32768 +-e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ + +/* This is the size of stack when R5 is in IRQ mode + * In NORTOS, + * - Here interrupt nesting is enabled + * - This is the stack used by ISRs registered as type IRQ + * In FreeRTOS, + * - Here interrupt nesting is disabled + * - This is stack that is used initally when a IRQ is received + * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks + * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more + */ +__IRQ_STACK_SIZE = 256; +/* This is the size of stack when R5 is in IRQ mode + * - In both NORTOS and FreeRTOS nesting is disabled for FIQ + */ +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ +__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ +__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ + +SECTIONS +{ + /* This has the R5F entry point and vector table, this MUST be at 0x0 */ + .vectors:{} palign(8) > R5F_VECS + + /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 + * i.e this cannot be placed in DDR + */ + GROUP { + .text.hwi: palign(8) + .text.cache: palign(8) + .text.mpu: palign(8) + .text.boot: palign(8) + .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ + } > MSRAM + + /* This is rest of code. This can be placed in DDR if DDR is available and needed */ + GROUP { + .text: {} palign(8) /* This is where code resides */ + .rodata: {} palign(8) /* This is where const's go */ + } > MSRAM + + /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .data: {} palign(8) /* This is where initialized globals and static go */ + } > MSRAM + + /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ + GROUP { + .bss: {} palign(8) /* This is where uninitialized globals go */ + RUN_START(__BSS_START) + RUN_END(__BSS_END) + .sysmem: {} palign(8) /* This is where the malloc heap goes */ + .stack: {} palign(8) /* This is where the main() stack goes */ + } > MSRAM + + /* This is where the stacks for different R5F modes go */ + GROUP { + .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM + + /* Sections needed for C++ projects */ + GROUP { + .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ + .init_array: {} palign(8) /* Contains function pointers called before main */ + .fini_array: {} palign(8) /* Contains function pointers called after main */ + } > MSRAM + + /* General purpose user shared memory, used in some examples */ + .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM + /* this is used when Debug log's to shared memory are enabled, else this is not used */ + .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM + /* this is used only when IPC RPMessage is enabled, else this is not used */ + .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM + /* General purpose non cacheable memory, used in some examples */ + .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM +} + +/* +NOTE: Below memory is reserved for DMSC usage + - During Boot till security handoff is complete + 0x701E0000 - 0x701FFFFF (128KB) + - After "Security Handoff" is complete (i.e at run time) + 0x701F4000 - 0x701FFFFF (48KB) + + Security handoff is complete when this message is sent to the DMSC, + TISCI_MSG_SEC_HANDOVER + + This should be sent once all cores are loaded and all application + specific firewall calls are setup. +*/ + +MEMORY +{ + R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 + R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 + R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 + + /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ + NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 + + /* when using multi-core application's i.e more than one R5F/M4F active, make sure + * this memory does not overlap with other R5F's + */ + MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 + + /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with + * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable + */ + FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 + + /* shared memory segments */ + /* On R5F, + * - make sure there is a MPU entry which maps below regions as non-cache + */ + USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x80 + LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x80, LENGTH = 0x00004000 - 0x80 + RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 +} diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile new file mode 100644 index 0000000..0586c53 --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile @@ -0,0 +1,310 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak +include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CG_TOOL_ROOT)/bin/tiarmclang +LNK=$(CG_TOOL_ROOT)/bin/tiarmclang +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +PROFILE?=release +ConfigName:=$(PROFILE) + +OUTNAME:=pruicss_pwm_duty_cycle.$(PROFILE).out + +BOOTIMAGE_PATH=$(abspath .) +BOOTIMAGE_NAME:=pruicss_pwm_duty_cycle.$(PROFILE).appimage +BOOTIMAGE_NAME_XIP:=pruicss_pwm_duty_cycle.$(PROFILE).appimage_xip +BOOTIMAGE_NAME_SIGNED:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.signed +BOOTIMAGE_RPRC_NAME:=pruicss_pwm_duty_cycle.$(PROFILE).rprc +BOOTIMAGE_RPRC_NAME_XIP:=pruicss_pwm_duty_cycle.$(PROFILE).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=pruicss_pwm_duty_cycle.$(PROFILE).rprc_tmp +BOOTIMAGE_NAME_HS:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.hs +BOOTIMAGE_NAME_HS_FS:=pruicss_pwm_duty_cycle.$(PROFILE).appimage.hs_fs +TARGETS := $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) + TARGETS += $(BOOTIMAGE_NAME_HS) +endif + +FILES_common := \ + main.c \ + pruicss_pwm_dutycycle.c \ + ti_drivers_config.c \ + ti_drivers_open_close.c \ + ti_board_config.c \ + ti_board_open_close.c \ + ti_dpl_config.c \ + ti_pinmux_config.c \ + ti_power_clock_config.c \ + +FILES_PATH_common = \ + .. \ + ../../.. \ + generated \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/pruicss/g_v0 \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + -Igenerated \ + +DEFINES_common := \ + -DSOC_AM64X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +LNK_FILES_common = \ + linker.cmd \ + +LIBS_PATH_common = \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + -Wl,-i${CG_TOOL_ROOT}/lib \ + +LIBS_common = \ + -lfreertos.am64x.r5f.ti-arm-clang.${ConfigName}.lib \ + -ldrivers.am64x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lboard.am64x.r5f.ti-arm-clang.${ConfigName}.lib \ + -lpruicss_pwm.am64x.r5f.ti-arm-clang.${ConfigName}.lib \ + -llibc.a \ + -llibsysbm.a \ + +LFLAGS_common = \ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + + +LIBS_NAME = \ + freertos.am64x.r5f.ti-arm-clang.${ConfigName}.lib \ + drivers.am64x.r5f.ti-arm-clang.${ConfigName}.lib \ + board.am64x.r5f.ti-arm-clang.${ConfigName}.lib \ + pruicss_pwm.am64x.r5f.ti-arm-clang.${ConfigName}.lib \ + libc.a \ + libsysbm.a \ + +LIBS_PATH_NAME = \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ + ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/lib \ + ${CG_TOOL_ROOT}/lib \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) +LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) +LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) +LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) +LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) + +OBJDIR := obj/$(PROFILE)/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) +vpath %.lib $(LIBS_PATH_NAME) +vpath %.a $(LIBS_PATH_NAME) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: am64x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: am64x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< + $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< + +all: $(TARGETS) + +SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h +SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h +SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h +SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c +SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h +SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h + +$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) + @echo . + @echo Linking: am64x:r5fss0-0:freertos:ti-arm-clang $@ ... + $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) + @echo Linking: am64x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! + @echo . + +clean: + @echo Cleaning: am64x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(OUTNAME) + $(RM) $(BOOTIMAGE_NAME) + $(RM) $(BOOTIMAGE_NAME_XIP) + $(RM) $(BOOTIMAGE_NAME_SIGNED) + $(RM) $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) + $(RMDIR) generated/ + +scrub: + @echo Scrubing: am64x:r5fss0-0:freertos:ti-arm-clang pruicss_pwm_duty_cycle ... + $(RMDIR) obj +ifeq ($(OS),Windows_NT) + $(RM) \*.out + $(RM) \*.map + $(RM) \*.appimage* + $(RM) \*.rprc* + $(RM) \*.tiimage* + $(RM) \*.bin +else + $(RM) *.out + $(RM) *.map + $(RM) *.appimage* + $(RM) *.rprc* + $(RM) *.tiimage* + $(RM) *.bin +endif + $(RMDIR) generated + +$(OBJS): | $(OBJDIR) + +$(OBJDIR): + $(MKDIR) $@ + + +.NOTPARALLEL: + +.INTERMEDIATE: syscfg +$(SYSCFG_GEN_FILES): syscfg + +syscfg: ../example.syscfg + @echo Generating SysConfig files ... + $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part Default --package ALV --output generated/ ../example.syscfg + +syscfg-gui: + $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM64x --context r5fss0-0 --part Default --package ALV --output generated/ ../example.syscfg + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) + +BOOTIMAGE_CORE_ID_a53ss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +$(BOOTIMAGE_NAME): $(OUTNAME) + @echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... +ifneq ($(OS),Windows_NT) + $(CHMOD) a+x $(XIPGEN_CMD) +endif + $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) + @echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! + @echo . + @echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! + @echo . + +$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) +ifeq ($(DEVICE_TYPE), HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) + $(RM) $(BOOTIMAGE_NAME)-enc +endif + @echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! + @echo . +endif +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen new file mode 100644 index 0000000..a314cd1 --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen @@ -0,0 +1,107 @@ +# +# Auto generated makefile +# + +# Below variables need to be defined outside this file or via command line +# - MOTOR_CONTROL_SDK_PATH +# - PROFILE +# - CG_TOOL_ROOT +# - OUTNAME +# - CCS_INSTALL_DIR +# - CCS_IDE_MODE + +CCS_PATH=$(CCS_INSTALL_DIR) +include ${MOTOR_CONTROL_SDK_PATH}/imports.mak +include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak + +STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip +OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy +ifeq ($(OS), Windows_NT) + PYTHON=python +else + PYTHON=python3 +endif + +OUTFILE=$(PROFILE)/$(OUTNAME).out +BOOTIMAGE_PATH=$(abspath ${PROFILE}) +BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage +BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip +BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed +BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc +BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip +BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp + +# +# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) +# +ifeq ($(OS),Windows_NT) +EXE_EXT=.exe +endif +ifeq ($(OS),Windows_NT) + BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 +else + BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh +endif +BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt + +BOOTIMAGE_CORE_ID_a53ss0-0 = 0 +BOOTIMAGE_CORE_ID_r5fss0-0 = 4 +BOOTIMAGE_CORE_ID_r5fss0-1 = 5 +BOOTIMAGE_CORE_ID_r5fss1-0 = 6 +BOOTIMAGE_CORE_ID_r5fss1-1 = 7 +BOOTIMAGE_CORE_ID_m4fss0-0 = 14 +SBL_RUN_ADDRESS=0x70000000 +SBL_DEV_ID=55 + +MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js +OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js +APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py + +ifeq ($(OS),Windows_NT) + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe +else + XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out +endif + +MULTI_CORE_IMAGE_PARAMS = \ + $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +MULTI_CORE_IMAGE_PARAMS_XIP = \ + $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ + +all: +ifeq ($(CCS_IDE_MODE),cloud) +# No post build steps +else + @echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... + $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) + $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) + $(RM) $(BOOTIMAGE_RPRC_NAME) + $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) + $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) +# Sign the appimage for HS-FS using appimage signing script + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs +ifeq ($(DEVICE_TYPE),HS) +# Sign the appimage using appimage signing script +ifeq ($(ENC_ENABLED),no) + @echo Boot image signing: Encryption is disabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs +else + @echo Boot image signing: Encryption is enabled. + $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs + $(RM) $(BOOTIMAGE_NAME)-enc +endif +endif + $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) + @echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! + @echo . +ifeq ($(DEVICE_TYPE),HS) + @echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! + @echo . +else + @echo Boot image: am64x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! + @echo . +endif +endif diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec new file mode 100644 index 0000000..cf79b29 --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec @@ -0,0 +1,20 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +PROFILE?=Release + +PROJECT_NAME=pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang + +all: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) + +clean: + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean + +export: + $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects + $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs new file mode 100644 index 0000000..472ab38 --- /dev/null +++ b/examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs @@ -0,0 +1,8 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + */ +var crovFiles = [ + "kernel/freertos/rov/FreeRTOS.rov.js", +]; diff --git a/makefile.am243x b/makefile.am243x index b82783e..852d71d 100644 --- a/makefile.am243x +++ b/makefile.am243x @@ -37,6 +37,7 @@ help: @echo $(MAKE) -s -f makefile.am243x motorcontrol_hdsl_r5f.ti-arm-clang @echo $(MAKE) -s -f makefile.am243x motorcontrol_tamagawa_r5f.ti-arm-clang @echo $(MAKE) -s -f makefile.am243x motorcontrol_bissc_r5f.ti-arm-clang + @echo $(MAKE) -s -f makefile.am243x pruicss_pwm_r5f.ti-arm-clang @echo . @echo Library clean targets, @echo ====================== @@ -45,6 +46,7 @@ help: @echo $(MAKE) -s -f makefile.am243x motorcontrol_hdsl_r5f.ti-arm-clang_clean @echo $(MAKE) -s -f makefile.am243x motorcontrol_tamagawa_r5f.ti-arm-clang_clean @echo $(MAKE) -s -f makefile.am243x motorcontrol_bissc_r5f.ti-arm-clang_clean + @echo $(MAKE) -s -f makefile.am243x pruicss_pwm_r5f.ti-arm-clang_clean @echo . @echo Example build targets, @echo ====================== @@ -71,6 +73,8 @@ help: @echo $(MAKE) -s -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-rtupru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @@ -102,9 +106,10 @@ BUILD_COMBO_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_bissc = motorcontrol_bissc_r5f.ti-arm-clang +BUILD_COMBO_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang # Combine all Components -BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) $(BUILD_COMBO_motorcontrol_bissc) +BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) $(BUILD_COMBO_motorcontrol_bissc) $(BUILD_COMBO_pruicss_pwm) # Combine all Pre-built Components BUILD_COMBO_PREBUILT_ALL = @@ -133,6 +138,9 @@ $(BUILD_COMBO_motorcontrol_tamagawa): $(BUILD_COMBO_motorcontrol_bissc): $(MAKE) -C source/position_sense/bissc -f makefile.am243x.$(subst motorcontrol_bissc_,,$@) all +$(BUILD_COMBO_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am243x.$(subst pruicss_pwm_,,$@) all + # Various Component Clean Targets BUILD_COMBO_CLEAN_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_clean @@ -140,9 +148,10 @@ BUILD_COMBO_CLEAN_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_bissc = motorcontrol_bissc_r5f.ti-arm-clang_clean +BUILD_COMBO_CLEAN_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_clean # Combine all Components Clean -BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) $(BUILD_COMBO_CLEAN_motorcontrol_bissc) +BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) $(BUILD_COMBO_CLEAN_motorcontrol_bissc) $(BUILD_COMBO_CLEAN_pruicss_pwm) # Combine all Pre-built Components Clean BUILD_COMBO_PREBUILT_CLEAN_ALL = @@ -166,6 +175,9 @@ $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa): $(BUILD_COMBO_CLEAN_motorcontrol_bissc): $(MAKE) -C source/position_sense/bissc -f makefile.am243x.$(subst motorcontrol_bissc_,,$(subst _clean,,$@)) clean +$(BUILD_COMBO_CLEAN_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am243x.$(subst pruicss_pwm_,,$(subst _clean,,$@)) clean + # Various Component Scrub Targets BUILD_COMBO_SCRUB_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_scrub_scrub @@ -173,9 +185,10 @@ BUILD_COMBO_SCRUB_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_scrub BUILD_COMBO_SCRUB_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_bissc = motorcontrol_bissc_r5f.ti-arm-clang_scrub_scrub +BUILD_COMBO_SCRUB_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_scrub_scrub # Combine all Components Scrub Targets -BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) $(BUILD_COMBO_SCRUB_motorcontrol_bissc) +BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) $(BUILD_COMBO_SCRUB_motorcontrol_bissc) $(BUILD_COMBO_SCRUB_pruicss_pwm) # Combine all Pre-built Components Scrub Targets BUILD_COMBO_PREBUILT_SCRUB_ALL = @@ -199,6 +212,9 @@ $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa): $(BUILD_COMBO_SCRUB_motorcontrol_bissc): $(MAKE) -C source/position_sense/bissc -f makefile.am243x.$(subst motorcontrol_bissc_,,$(subst _scrub,,$@)) scrub +$(BUILD_COMBO_SCRUB_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am243x.$(subst pruicss_pwm_,,$(subst _scrub,,$@)) scrub + BUILD_COMBO_EXAMPLE_ALL = # Various Example Targets @@ -225,6 +241,8 @@ BUILD_COMBO_EXAMPLE_ALL += bissc_diagnostic_multi_channel_load_share_am243x-lp_r BUILD_COMBO_EXAMPLE_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang # Various System Example Targets BUILD_COMBO_EXAMPLE_PRIVATE_ALL = @@ -324,6 +342,12 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL) icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang: $(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all + pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all + + pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile all + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all @@ -410,6 +434,8 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += bissc_diagnostic_multi_channel_load_share_am243 BUILD_COMBO_EXAMPLE_CLEAN_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean # Various System Example Clean Targets BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL = @@ -509,6 +535,12 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL) icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean + pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean + + pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile clean + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean @@ -595,6 +627,8 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += bissc_diagnostic_multi_channel_load_share_am243 BUILD_COMBO_EXAMPLE_SCRUB_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub # Various System Example Scrub Targets BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL = @@ -694,6 +728,12 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL) icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: $(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + + pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub diff --git a/makefile.am64x b/makefile.am64x index 5f5b2a4..df8688a 100644 --- a/makefile.am64x +++ b/makefile.am64x @@ -36,6 +36,7 @@ help: @echo $(MAKE) -s -f makefile.am64x motorcontrol_endat_r5f.ti-arm-clang @echo $(MAKE) -s -f makefile.am64x motorcontrol_hdsl_r5f.ti-arm-clang @echo $(MAKE) -s -f makefile.am64x motorcontrol_tamagawa_r5f.ti-arm-clang + @echo $(MAKE) -s -f makefile.am64x pruicss_pwm_r5f.ti-arm-clang @echo . @echo Library clean targets, @echo ====================== @@ -43,6 +44,7 @@ help: @echo $(MAKE) -s -f makefile.am64x motorcontrol_endat_r5f.ti-arm-clang_clean @echo $(MAKE) -s -f makefile.am64x motorcontrol_hdsl_r5f.ti-arm-clang_clean @echo $(MAKE) -s -f makefile.am64x motorcontrol_tamagawa_r5f.ti-arm-clang_clean + @echo $(MAKE) -s -f makefile.am64x pruicss_pwm_r5f.ti-arm-clang_clean @echo . @echo Example build targets, @echo ====================== @@ -54,6 +56,7 @@ help: @echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] + @echo $(MAKE) -s -C examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-rtupru1_fw/ti-pru-cgt [all clean syscfg-gui syscfg] @@ -78,9 +81,10 @@ BUILD_COMBO_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang BUILD_COMBO_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang +BUILD_COMBO_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang # Combine all Components -BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) +BUILD_COMBO_ALL = $(BUILD_COMBO_motorcontrol_sdfm) $(BUILD_COMBO_motorcontrol_endat) $(BUILD_COMBO_motorcontrol_hdsl) $(BUILD_COMBO_motorcontrol_tamagawa) $(BUILD_COMBO_pruicss_pwm) # Combine all Pre-built Components BUILD_COMBO_PREBUILT_ALL = @@ -106,15 +110,19 @@ $(BUILD_COMBO_motorcontrol_hdsl): $(BUILD_COMBO_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am64x.$(subst motorcontrol_tamagawa_,,$@) all +$(BUILD_COMBO_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am64x.$(subst pruicss_pwm_,,$@) all + # Various Component Clean Targets BUILD_COMBO_CLEAN_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_clean BUILD_COMBO_CLEAN_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_clean +BUILD_COMBO_CLEAN_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_clean # Combine all Components Clean -BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) +BUILD_COMBO_CLEAN_ALL = $(BUILD_COMBO_CLEAN_motorcontrol_sdfm) $(BUILD_COMBO_CLEAN_motorcontrol_endat) $(BUILD_COMBO_CLEAN_motorcontrol_hdsl) $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa) $(BUILD_COMBO_CLEAN_pruicss_pwm) # Combine all Pre-built Components Clean BUILD_COMBO_PREBUILT_CLEAN_ALL = @@ -135,15 +143,19 @@ $(BUILD_COMBO_CLEAN_motorcontrol_hdsl): $(BUILD_COMBO_CLEAN_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am64x.$(subst motorcontrol_tamagawa_,,$(subst _clean,,$@)) clean +$(BUILD_COMBO_CLEAN_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am64x.$(subst pruicss_pwm_,,$(subst _clean,,$@)) clean + # Various Component Scrub Targets BUILD_COMBO_SCRUB_motorcontrol_sdfm = motorcontrol_sdfm_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_endat = motorcontrol_endat_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_hdsl = motorcontrol_hdsl_r5f.ti-arm-clang_scrub_scrub BUILD_COMBO_SCRUB_motorcontrol_tamagawa = motorcontrol_tamagawa_r5f.ti-arm-clang_scrub_scrub +BUILD_COMBO_SCRUB_pruicss_pwm = pruicss_pwm_r5f.ti-arm-clang_scrub_scrub # Combine all Components Scrub Targets -BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) +BUILD_COMBO_SCRUB_ALL = $(BUILD_COMBO_SCRUB_motorcontrol_sdfm) $(BUILD_COMBO_SCRUB_motorcontrol_endat) $(BUILD_COMBO_SCRUB_motorcontrol_hdsl) $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa) $(BUILD_COMBO_SCRUB_pruicss_pwm) # Combine all Pre-built Components Scrub Targets BUILD_COMBO_PREBUILT_SCRUB_ALL = @@ -164,6 +176,9 @@ $(BUILD_COMBO_SCRUB_motorcontrol_hdsl): $(BUILD_COMBO_SCRUB_motorcontrol_tamagawa): $(MAKE) -C source/position_sense/tamagawa -f makefile.am64x.$(subst motorcontrol_tamagawa_,,$(subst _scrub,,$@)) scrub +$(BUILD_COMBO_SCRUB_pruicss_pwm): + $(MAKE) -C source/pruicss_pwm -f makefile.am64x.$(subst pruicss_pwm_,,$(subst _scrub,,$@)) scrub + BUILD_COMBO_EXAMPLE_ALL = # Various Example Targets @@ -175,6 +190,7 @@ BUILD_COMBO_EXAMPLE_ALL += hdsl_diagnostic_single_channel_am64x-evm_r5fss0-0_fre BUILD_COMBO_EXAMPLE_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang BUILD_COMBO_EXAMPLE_ALL += icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang +BUILD_COMBO_EXAMPLE_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang # Various System Example Targets BUILD_COMBO_EXAMPLE_PRIVATE_ALL = @@ -223,6 +239,9 @@ examples-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_ALL) icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang: $(MAKE) -C examples/current_sense/icss_sdfm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all + pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang: + $(MAKE) -C examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile all + sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt: $(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile all @@ -276,6 +295,7 @@ BUILD_COMBO_EXAMPLE_CLEAN_ALL += hdsl_diagnostic_single_channel_am64x-evm_r5fss0 BUILD_COMBO_EXAMPLE_CLEAN_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_CLEAN_ALL += icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_CLEAN_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean # Various System Example Clean Targets BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL = @@ -324,6 +344,9 @@ examples-private-clean: $(BUILD_COMBO_EXAMPLE_PRIVATE_CLEAN_ALL) icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/current_sense/icss_sdfm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean + pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile clean + sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean: $(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile clean @@ -377,6 +400,7 @@ BUILD_COMBO_EXAMPLE_SCRUB_ALL += hdsl_diagnostic_single_channel_am64x-evm_r5fss0 BUILD_COMBO_EXAMPLE_SCRUB_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub BUILD_COMBO_EXAMPLE_SCRUB_ALL += icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub +BUILD_COMBO_EXAMPLE_SCRUB_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub # Various System Example Scrub Targets BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL = @@ -425,6 +449,9 @@ examples-scrub-private: $(BUILD_COMBO_EXAMPLE_PRIVATE_SCRUB_ALL) icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub: $(MAKE) -C examples/current_sense/icss_sdfm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_scrub: + $(MAKE) -C examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile scrub + sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_scrub: $(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile scrub diff --git a/makefile_projectspec.am243x b/makefile_projectspec.am243x index 8fad01a..2a42308 100644 --- a/makefile_projectspec.am243x +++ b/makefile_projectspec.am243x @@ -30,6 +30,8 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += bissc_diagnostic_multi_channel_load BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build # Various System Example Projectspec Build Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL = @@ -129,6 +131,12 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL) icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build: $(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + + pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_build: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all @@ -216,6 +224,8 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += bissc_diagnostic_multi_channel_load BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean # Various System Example Projectspec Clean Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL = @@ -315,6 +325,12 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL) icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + + pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_clean: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean @@ -402,6 +418,8 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += bissc_diagnostic_multi_channel_loa BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += bissc_diagnostic_multi_channel_single_pru_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export # Various System Example Projectspec Export Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL = @@ -501,6 +519,12 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL) icss_sdfm_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export: $(MAKE) -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + pruicss_pwm_duty_cycle_am243x-evm_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + + pruicss_pwm_duty_cycle_am243x-lp_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + sdfm_firmware_am243x-evm_icssg0-pru0_fw_ti-pru-cgt_export: $(MAKE) -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export @@ -613,6 +637,8 @@ help: @echo $(MAKE) -s -C examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/pruicss_pwm/am243x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/pruicss_pwm/am243x-lp/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am243x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am243x-evm/icssg0-rtupru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean] diff --git a/makefile_projectspec.am64x b/makefile_projectspec.am64x index d386e79..2de52dd 100644 --- a/makefile_projectspec.am64x +++ b/makefile_projectspec.am64x @@ -15,6 +15,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += hdsl_diagnostic_single_channel_am64 BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build +BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build # Various System Example Projectspec Build Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL = @@ -63,6 +64,9 @@ all-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_BUILD_PRIVATE_ALL) icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build: $(MAKE) -C examples/current_sense/icss_sdfm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_build: + $(MAKE) -C examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec all + sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_build: $(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec all @@ -117,6 +121,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += hdsl_diagnostic_single_channel_am64 BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean +BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean # Various System Example Projectspec Clean Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL = @@ -165,6 +170,9 @@ clean-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_CLEAN_PRIVATE_ALL) icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean: $(MAKE) -C examples/current_sense/icss_sdfm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_clean: + $(MAKE) -C examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec clean + sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_clean: $(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec clean @@ -219,6 +227,7 @@ BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += hdsl_diagnostic_single_channel_am6 BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += tamagawa_diagnostic_multi_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += tamagawa_diagnostic_single_channel_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export +BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_ALL += pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export # Various System Example Projectspec Export Targets BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL = @@ -267,6 +276,9 @@ export-private: $(BUILD_COMBO_EXAMPLE_PROJECTSPEC_EXPORT_PRIVATE_ALL) icss_sdfm_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export: $(MAKE) -C examples/current_sense/icss_sdfm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + pruicss_pwm_duty_cycle_am64x-evm_r5fss0-0_freertos_ti-arm-clang_export: + $(MAKE) -C examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec export + sdfm_firmware_am64x-evm_icssg0-pru0_fw_ti-pru-cgt_export: $(MAKE) -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec export @@ -346,6 +358,7 @@ help: @echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/multi_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/position_sense/tamagawa_diagnostic/single_channel/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C examples/current_sense/icss_sdfm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] + @echo $(MAKE) -s -C examples/pruicss_pwm/am64x-evm/r5fss0-0_freertos/ti-arm-clang -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/current_sense/sdfm/firmware/am64x-evm/icssg0-pru0_fw/ti-pru-cgt -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-pru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean] @echo $(MAKE) -s -C source/position_sense/endat/firmware/multi_channel_load_share/am64x-evm/icssg0-rtupru1_fw/ti-pru-cgt -f makefile_projectspec [export all clean] diff --git a/source/pruicss_pwm/.project/project.js b/source/pruicss_pwm/.project/project.js new file mode 100644 index 0000000..f6c2d16 --- /dev/null +++ b/source/pruicss_pwm/.project/project.js @@ -0,0 +1,14 @@ +function getComponentProperty(device) +{ + return require(`./project_${device}`).getComponentProperty(); +}; + +function getComponentBuildProperty(buildOption) +{ + return require(`./project_${buildOption.device}`).getComponentBuildProperty(buildOption); +}; + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; diff --git a/source/pruicss_pwm/.project/project_am243x.js b/source/pruicss_pwm/.project/project_am243x.js new file mode 100644 index 0000000..4f95f7a --- /dev/null +++ b/source/pruicss_pwm/.project/project_am243x.js @@ -0,0 +1,52 @@ +let path = require('path'); + +let device = "am243x"; + +const files = { + common: [ + "pruicss_pwm.c", + ], +}; + +const filedirs = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/driver", + ], +}; + +const includes = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include", + ], +}; + +const buildOptionCombos = [ + { device: device, cpu: "r5f", cgt: "ti-arm-clang"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "library"; + property.name = "pruicss_pwm"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.includes = includes; + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; \ No newline at end of file diff --git a/source/pruicss_pwm/.project/project_am64x.js b/source/pruicss_pwm/.project/project_am64x.js new file mode 100644 index 0000000..c9f1b32 --- /dev/null +++ b/source/pruicss_pwm/.project/project_am64x.js @@ -0,0 +1,52 @@ +let path = require('path'); + +let device = "am64x"; + +const files = { + common: [ + "pruicss_pwm.c", + ], +}; + +const filedirs = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/driver", + ], +}; + +const includes = { + common: [ + "${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include", + ], +}; + +const buildOptionCombos = [ + { device: device, cpu: "r5f", cgt: "ti-arm-clang"}, +]; + +function getComponentProperty() { + let property = {}; + + property.dirPath = path.resolve(__dirname, ".."); + property.type = "library"; + property.name = "pruicss_pwm"; + property.isInternal = false; + property.buildOptionCombos = buildOptionCombos; + + return property; +} + +function getComponentBuildProperty(buildOption) { + let build_property = {}; + + build_property.files = files; + build_property.filedirs = filedirs; + build_property.includes = includes; + + return build_property; +} + +module.exports = { + getComponentProperty, + getComponentBuildProperty, +}; \ No newline at end of file diff --git a/source/pruicss_pwm/driver/pruicss_pwm.c b/source/pruicss_pwm/driver/pruicss_pwm.c new file mode 100644 index 0000000..ec0a709 --- /dev/null +++ b/source/pruicss_pwm/driver/pruicss_pwm.c @@ -0,0 +1,1397 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* ========================================================================== */ +/* Include Files */ +/* ========================================================================== */ + +#include +#include +#include +#include +#include +#include + +int32_t PRUICSS_PWM_setIepCounterLower_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint32_t value) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < PRUICSS_NUM_IEP_INSTANCES) && (value <= PRUICSS_IEP_COUNT_REG_MAX)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_COUNT_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_COUNT_REG0_COUNT_LO, value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG0_COUNT_LO, value); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_setIepCounterUpper_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint32_t value) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < PRUICSS_NUM_IEP_INSTANCES) && (value <= PRUICSS_IEP_COUNT_REG_MAX)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_COUNT_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_COUNT_REG1_COUNT_HI, value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG1_COUNT_HI, value); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_configureIepCmp0ResetEnable(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t enable) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < PRUICSS_NUM_IEP_INSTANCES) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP_CFG_REG ), + CSL_ICSS_G_PR1_IEP0_SLV_CMP_CFG_REG_CMP0_RST_CNT_EN, enable); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG ), + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG_CMP0_RST_CNT_EN, enable); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_configureIepCompareEnable(PRUICSS_Handle handle, uint8_t iepInstance, uint16_t value) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < PRUICSS_NUM_IEP_INSTANCES) && (value <= PRUICSS_IEP_CMP_EVENTS_ENABLE_MAX_VALUE)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP_CFG_REG), + CSL_ICSS_G_PR1_IEP0_SLV_CMP_CFG_REG_CMP_EN, value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG), + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG_CMP_EN, value); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_setIepCompareEventLower_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t cmpEvent, uint32_t value) +{ + + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < PRUICSS_NUM_IEP_INSTANCES) && (cmpEvent < PRUICSS_NUM_IEP_CMP_EVENTS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + switch (cmpEvent) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP0_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP0_REG0_CMP0_0,(uint32_t)value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP1_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP1_REG0_CMP1_0,(uint32_t)value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP2_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP2_REG0_CMP2_0,(uint32_t)value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP3_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP3_REG0_CMP3_0,(uint32_t)value); + break; + case 4: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP4_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP4_REG0_CMP4_0,(uint32_t)value); + break; + case 5: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP5_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP5_REG0_CMP5_0,(uint32_t)value); + break; + case 6: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP6_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP6_REG0_CMP6_0,(uint32_t)value); + break; + case 7: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP7_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP7_REG0_CMP7_0,(uint32_t)value); + break; + case 8: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP8_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP8_REG0_CMP8_0,(uint32_t)value); + break; + case 9: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP9_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP9_REG0_CMP9_0,(uint32_t)value); + break; + case 10: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP10_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP10_REG0_CMP10_0,(uint32_t)value); + break; + case 11: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP11_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP11_REG0_CMP11_0,(uint32_t)value); + break; + case 12: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP12_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP12_REG0_CMP12_0,(uint32_t)value); + break; + case 13: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP13_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP13_REG0_CMP13_0,(uint32_t)value); + break; + case 14: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP14_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP14_REG0_CMP14_0,(uint32_t)value); + break; + case 15: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP15_REG0), + CSL_ICSS_G_PR1_IEP0_SLV_CMP15_REG0_CMP15_0,(uint32_t)value); + break; + } + break; + case 1: + switch (cmpEvent) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG0_CMP0_0,(uint32_t)value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP1_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP1_REG0_CMP1_0,(uint32_t)value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP2_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP2_REG0_CMP2_0,(uint32_t)value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG0_CMP3_0,(uint32_t)value); + break; + case 4: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP4_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP4_REG0_CMP4_0,(uint32_t)value); + break; + case 5: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG0_CMP5_0,(uint32_t)value); + break; + case 6: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG0_CMP6_0,(uint32_t)value); + break; + case 7: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP7_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP7_REG0_CMP7_0,(uint32_t)value); + break; + case 8: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP8_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP8_REG0_CMP8_0,(uint32_t)value); + break; + case 9: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP9_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP9_REG0_CMP9_0,(uint32_t)value); + break; + case 10: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP10_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP10_REG0_CMP10_0,(uint32_t)value); + break; + case 11: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP11_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP11_REG0_CMP11_0,(uint32_t)value); + break; + case 12: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP12_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP12_REG0_CMP12_0,(uint32_t)value); + break; + case 13: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP13_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP13_REG0_CMP13_0,(uint32_t)value); + break; + case 14: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP14_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP14_REG0_CMP14_0,(uint32_t)value); + break; + case 15: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP15_REG0), + CSL_ICSS_G_PR1_IEP1_SLV_CMP15_REG0_CMP15_0,(uint32_t)value); + break; + } + break; + } + + } + + return retVal; +} + + + +int32_t PRUICSS_PWM_setIepCompareEventUpper_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t cmpEvent, uint32_t value) +{ + + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (iepInstance < PRUICSS_NUM_IEP_INSTANCES) && (cmpEvent < PRUICSS_NUM_IEP_CMP_EVENTS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (iepInstance) + { + case 0: + switch (cmpEvent) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP0_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP0_REG1_CMP0_1,(uint32_t)value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP1_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP1_REG1_CMP1_1,(uint32_t)value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP2_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP2_REG1_CMP2_1,(uint32_t)value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP3_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP3_REG1_CMP3_1,(uint32_t)value); + break; + case 4: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP4_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP4_REG1_CMP4_1,(uint32_t)value); + break; + case 5: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP5_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP5_REG1_CMP5_1,(uint32_t)value); + break; + case 6: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP6_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP6_REG1_CMP6_1,(uint32_t)value); + break; + case 7: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP7_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP7_REG1_CMP7_1,(uint32_t)value); + break; + case 8: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP8_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP8_REG1_CMP8_1,(uint32_t)value); + break; + case 9: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP9_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP9_REG1_CMP9_1,(uint32_t)value); + break; + case 10: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP10_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP10_REG1_CMP10_1,(uint32_t)value); + break; + case 11: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP11_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP11_REG1_CMP11_1,(uint32_t)value); + break; + case 12: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP12_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP12_REG1_CMP12_1,(uint32_t)value); + break; + case 13: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP13_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP13_REG1_CMP13_1,(uint32_t)value); + break; + case 14: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP14_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP14_REG1_CMP14_1,(uint32_t)value); + break; + case 15: + HW_WR_FIELD32((hwAttrs->iep0RegBase + CSL_ICSS_G_PR1_IEP0_SLV_CMP15_REG1), + CSL_ICSS_G_PR1_IEP0_SLV_CMP15_REG1_CMP15_1,(uint32_t)value); + break; + } + break; + case 1: + switch (cmpEvent) + { + case 0: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG1_CMP0_1,(uint32_t)value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP1_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP1_REG1_CMP1_1,(uint32_t)value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP2_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP2_REG1_CMP2_1,(uint32_t)value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG1_CMP3_1,(uint32_t)value); + break; + case 4: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP4_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP4_REG1_CMP4_1,(uint32_t)value); + break; + case 5: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG1_CMP5_1,(uint32_t)value); + break; + case 6: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG1_CMP6_1,(uint32_t)value); + break; + case 7: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP7_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP7_REG1_CMP7_1,(uint32_t)value); + break; + case 8: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP8_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP8_REG1_CMP8_1,(uint32_t)value); + break; + case 9: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP9_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP9_REG1_CMP9_1,(uint32_t)value); + break; + case 10: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP10_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP10_REG1_CMP10_1,(uint32_t)value); + break; + case 11: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP11_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP11_REG1_CMP11_1,(uint32_t)value); + break; + case 12: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP12_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP12_REG1_CMP12_1,(uint32_t)value); + break; + case 13: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP13_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP13_REG1_CMP13_1,(uint32_t)value); + break; + case 14: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP14_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP14_REG1_CMP14_1,(uint32_t)value); + break; + case 15: + HW_WR_FIELD32((hwAttrs->iep1RegBase + CSL_ICSS_G_PR1_IEP1_SLV_CMP15_REG1), + CSL_ICSS_G_PR1_IEP1_SLV_CMP15_REG1_CMP15_1,(uint32_t)value); + break; + } + break; + } + + } + + return retVal; +} + +int32_t PRUICSS_PWM_setPwmDebounceValue(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t value) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (value <= PRUICSS_PWM_DEBOUNCE_MAX_VALUE)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_DEBOUNCE_VALUE, value); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_DEBOUNCE_VALUE, value); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_DEBOUNCE_VALUE, value); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_DEBOUNCE_VALUE, value); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_setPwmTripMask(PRUICSS_Handle handle, uint8_t pwmSet, uint16_t maskvalue) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (maskvalue <= PRUICSS_PWM_TRIP_MASK_MAX_VALUE)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_MASK, maskvalue); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_MASK, maskvalue); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_MASK, maskvalue); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_MASK, maskvalue); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_configurePwmCmp0TripResetEnable(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t enable) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_CMP0_EN, enable); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_CMP0_EN, enable); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_CMP0_EN, enable); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_CMP0_EN, enable); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_generatePwmTripReset(PRUICSS_Handle handle, uint8_t pwmSet) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_RESET, 1); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_RESET, 1); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_RESET, 1); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_RESET, 1); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_generatePwmOverCurrentErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_OVER_ERR_TRIP, 1); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_OVER_ERR_TRIP, 1); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_OVER_ERR_TRIP, 1); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_OVER_ERR_TRIP, 1); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_generatePwmPositionFeedbackErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_POS_ERR_TRIP, 1); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_POS_ERR_TRIP, 1); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_POS_ERR_TRIP, 1); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_POS_ERR_TRIP, 1); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_clearPwmTripResetStatus(PRUICSS_Handle handle, uint8_t pwmSet) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_RESET, 0); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_RESET, 0); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_RESET, 0); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_RESET, 0); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_clearPwmOverCurrentErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_OVER_ERR_TRIP, 0); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_OVER_ERR_TRIP, 0); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_OVER_ERR_TRIP, 0); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_OVER_ERR_TRIP, 0); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_clearPwmPositionFeedbackErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_POS_ERR_TRIP, 0); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_POS_ERR_TRIP, 0); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_POS_ERR_TRIP, 0); + break; + case 3: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_POS_ERR_TRIP, 0); + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_getPwmTripTriggerCauseVector(PRUICSS_Handle handle, uint8_t pwmSet) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_VEC); + case 1: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_VEC); + case 2: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_VEC); + case 3: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_VEC); + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_getPwmTripStatus(PRUICSS_Handle handle, uint8_t pwmSet) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch (pwmSet) + { + case 0: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0), + CSL_ICSSCFG_PWM0_PWM0_TRIP_MASK); + case 1: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1), + CSL_ICSSCFG_PWM1_PWM1_TRIP_MASK); + case 2: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2), + CSL_ICSSCFG_PWM2_PWM2_TRIP_MASK); + case 3: + return HW_RD_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3), + CSL_ICSSCFG_PWM3_PWM3_TRIP_MASK); + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_clearPwmTripStatus(PRUICSS_Handle handle, uint8_t pwmSet) +{ + + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS)) + { + retVal = SystemP_SUCCESS; + retVal= PRUICSS_PWM_generatePwmTripReset(handle,pwmSet); + if(retVal == SystemP_SUCCESS) + { + PRUICSS_PWM_clearPwmTripResetStatus(handle,pwmSet); + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalA0(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (state < PRUICSS_NUM_PWM_STATES)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_POS_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_POS_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_POS_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_POS_TRIP, action); + break; + } + break; + + + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalA1(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (state < PRUICSS_NUM_PWM_STATES)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_0), + CSL_ICSSCFG_PWM0_0_PWM0_0_NEG_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_0), + CSL_ICSSCFG_PWM1_0_PWM1_0_NEG_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_0), + CSL_ICSSCFG_PWM2_0_PWM2_0_NEG_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_0), + CSL_ICSSCFG_PWM3_0_PWM3_0_NEG_TRIP, action); + break; + } + break; + + + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalA2(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (state < PRUICSS_NUM_PWM_STATES)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_POS_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_POS_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_POS_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_POS_TRIP, action); + break; + } + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalB0(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (state < PRUICSS_NUM_PWM_STATES)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_1), + CSL_ICSSCFG_PWM0_1_PWM0_1_NEG_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_1), + CSL_ICSSCFG_PWM1_1_PWM1_1_NEG_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_1), + CSL_ICSSCFG_PWM2_1_PWM2_1_NEG_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_1), + CSL_ICSSCFG_PWM3_1_PWM3_1_NEG_TRIP, action); + break; + } + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalB1(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (state < PRUICSS_NUM_PWM_STATES)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_POS_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_POS_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_POS_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_POS_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_POS_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_POS_TRIP, action); + break; + } + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (pwmSet < PRUICSS_NUM_PWM_SETS) && (state < PRUICSS_NUM_PWM_STATES)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + switch(pwmSet) + { + case 0: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM0_2), + CSL_ICSSCFG_PWM0_2_PWM0_2_NEG_TRIP, action); + break; + } + break; + case 1: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM1_2), + CSL_ICSSCFG_PWM1_2_PWM1_2_NEG_TRIP, action); + break; + } + break; + case 2: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM2_2), + CSL_ICSSCFG_PWM2_2_PWM2_2_NEG_TRIP, action); + break; + } + break; + case 3: + switch (state) + { + case 0: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_NEG_INIT, action); + break; + case 1: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_NEG_ACT, action); + break; + case 2: + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PWM3_2), + CSL_ICSSCFG_PWM3_2_PWM3_2_NEG_TRIP, action); + break; + } + break; + } + } + + return retVal; +} + +int32_t PRUICSS_PWM_configurePwmEfficiencyModeEnable(PRUICSS_Handle handle, uint8_t enable) +{ + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_PIN_MX),CSL_ICSSCFG_PIN_MX_PWM_EFC_EN, enable); + } + return retVal; +} + +int32_t PRUICSS_PWM_enableIEP1Slave(PRUICSS_Handle handle, uint8_t enable) +{ + + PRUICSS_HwAttrs const *hwAttrs; + int32_t retVal = SystemP_FAILURE; + + if ((handle != NULL) && (enable < 2)) + { + retVal = SystemP_SUCCESS; + hwAttrs = (PRUICSS_HwAttrs const *)handle->hwAttrs; + + HW_WR_FIELD32((hwAttrs->cfgRegBase + CSL_ICSSCFG_IEPCLK), + CSL_ICSSCFG_IEPCLK_IEP1_SLV_EN, 1); + } + return retVal; + +} + diff --git a/source/pruicss_pwm/include/pruicss_pwm.h b/source/pruicss_pwm/include/pruicss_pwm.h new file mode 100644 index 0000000..1d8cc47 --- /dev/null +++ b/source/pruicss_pwm/include/pruicss_pwm.h @@ -0,0 +1,449 @@ +/* + * Copyright (C) 2023 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + * \defgroup PRUICSS_PWM_API APIs for PruIcss_pwm + * + * This module contains APIs for device driver pruicss_pwm supported in this SDK. + * + * PRUICSS has one pwm module, which has four pwm sets (PWM0, PWM1, PWM2, PWM3) + * Each Set has six signals (A0,A1,A2,B0,B1,B2) + * With Reference to Technical Reference Manual, Pwm six signals(A0,A1,A2,B0,B1,B2) Naming convention is slightly different + * + * PWMn==============>PWMn_0=========>PWMn_0_POS (alias signal A0) + * | |=====>PWMn_0_NEG (alias signal A1) + * | + * | + * | + * |=========>PWMn_1=========>PWMn_1_POS (alias signal A2) + * | |=====>PWMn_1_NEG (alias signal B0) + * | + * | + * | + * |=========>PWMn_2=========>PWMn_2_POS (alias signal B1) + * |=====>PWMn_2_NEG (alias signal B2) + * + * Each Set has one trip zone output OR logic block + * Each trip zone block has nine trip_error signals (trip_e1_[0:2], trip_e2, trip_e3[0:2], trip_e4, trip_e5) as input + * And one PWMn_TZ_OUT output signal which makes transition to safe or trip state from current state + * + * ________________ + * tripn_e1_[2:0](Debounce Trip)----------------------->| | + * | | + * tripn_e2(Debounce Error Trip_in)-------------------->| | _____________ + * | | | | + * trip_e3[2:0](SD Fast detect Error Trip)------------->| Tripzone |------------->|PWMn_TZ_OUT| + * | output | |___________| + * | logic | + * trip_e4(SD over current Error Trip)----------------->| | + * | | + * trip_e5(Position Error trip)------------------------>| | + * |________________| + * + * + * + * @{ + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* ========================================================================== */ +/* Include Files */ +/* ========================================================================== */ + +#ifndef PRUICSS_PWM_H_ +#define PRUICSS_PWM_H_ + +#include +#include +#include +#include +#include +#include + +/* ========================================================================== */ +/* Macros & Typedefs */ +/* ========================================================================== */ + +/** + * \brief Number of PRUICSS IEP Instances + */ +#define PRUICSS_NUM_IEP_INSTANCES (0x2U) + +/** + * \brief PRUICSS IEP count register maximum value + */ +#define PRUICSS_IEP_COUNT_REG_MAX (0xFFFFFFFFU) + +/** + * \brief Number of PRUICSS IEP compare events + */ +#define PRUICSS_NUM_IEP_CMP_EVENTS (0x10U) + +/** + * \brief Number of PRUICSS IEP compare events enable field maximum value + */ +#define PRUICSS_IEP_CMP_EVENTS_ENABLE_MAX_VALUE (0x0000FFFFU) + +/** + * \brief Number of PRUICSS PWM Sets + */ +#define PRUICSS_NUM_PWM_SETS (0x4U) + +/** + * \brief Number of PRUICSS PWM number of states + */ +#define PRUICSS_NUM_PWM_STATES (0x3U) + +/** + * \brief PRUICSS PWM Debounce maximum value + */ +#define PRUICSS_PWM_DEBOUNCE_MAX_VALUE (0xFFU) + +/** + * \brief Number of PRUICSS PWM Sets + */ +#define PRUICSS_PWM_TRIP_MASK_MAX_VALUE (0x000001FFU) + + + +/* ========================================================================== */ +/* Function Declarations */ +/* ========================================================================== */ + +/** + * \brief This API writes Lower_32bit Value of IEP counter in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value iep count register Lower 32bit Value + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * + */ +int32_t PRUICSS_PWM_setIepCounterLower_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint32_t value); + +/** + * \brief This API writes Upper_32bit Value of IEP counter in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value iep count register Upper 32bit Value + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * + */ +int32_t PRUICSS_PWM_setIepCounterUpper_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint32_t value); + +/** + * \brief This API sets enables/disables of IEP counter reset on compare 0 event in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param enable enable 0 for disable, 1 for enable + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * + */ +int32_t PRUICSS_PWM_configureIepCmp0ResetEnable(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t enable); + +/** + * \brief This API sets enables/disables compare events in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value Value to store in compare enable field of compare config register + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * + */ +int32_t PRUICSS_PWM_configureIepCompareEnable(PRUICSS_Handle handle, uint8_t iepInstance, uint16_t value); + +/** + * \brief This API writes Lower_32bit Value of compare event in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value compare register Lower 32bit Value + * \param cmpEvent compare Event number. Maximum value allowed is 15 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * + */ +int32_t PRUICSS_PWM_setIepCompareEventLower_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t cmpEvent, uint32_t value); + +/** + * \brief This API writes Upper_32bit Value of compare event in IEP module. + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param iepInstance 0 for IEP0, 1 for IEP1 + * \param value compare register Upper 32bit Value + * \param cmpEvent compare Event number. Maximum value allowed is 15 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * + */ +int32_t PRUICSS_PWM_setIepCompareEventUpper_32bitValue(PRUICSS_Handle handle, uint8_t iepInstance, uint8_t cmpEvent, uint32_t value); + +/** + * \brief This API updates Debounce Value for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param value pwmSet Debounce Value + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_setPwmDebounceValue(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t value); + +/** + * \brief This API updates TripMask Value for specified pwm set + * + * \brief Software TripMask + * \brief 0x0: PWM0_POS_ERR_TRIP (trip_e5) + * \brief 0x1: PWM0_OVER_ERR_TRIP (trip_e4) + * \brief 0x2: PWM0_0_SD_SHORT_ERR_TRIP (trip_e3_0) + * \brief 0x3: PWM0_1_SD_SHORT_ERR_TRIP (trip_e3_1) + * \brief 0x4: PWM0_2_SD_SHORT_ERR_TRIP (trip_e3_2) + * \brief 0x5: PWM0_DEBOUNCE_TRIP_IN (trip_e2) + * \brief 0x6: PWM0_0_DEBOUNCE_TRIP (trip_e1_0) + * \brief 0x7: PWM0_1_DEBOUNCE_TRIP (trip_e1_1) + * \brief 0x8: PWM0_2_DEBOUNCE_TRIP (trip_e1_2) + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param maskvalue pwmSet maskValue + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_setPwmTripMask(PRUICSS_Handle handle, uint8_t pwmSet, uint16_t maskvalue); + +/** + * \brief This API enables/disables TripReset on Compare_0 Event for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param enable 0 for disable, 1 for enable + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_configurePwmCmp0TripResetEnable(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t enable); + +/** + * \brief This API generates Software Trip Reset by writing 1 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_generatePwmTripReset(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API generates Software Over current error trip by writing 1 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_generatePwmOverCurrentErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API generates Software Position Feedback Error Trip by writing 1 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_generatePwmPositionFeedbackErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API clears Software Trip Reset by writing 0 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_clearPwmTripResetStatus(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API clears Software Over current error trip by writing 0 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_clearPwmOverCurrentErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API clears Software Position Feedback Error Trip by writing 0 to bit field for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_clearPwmPositionFeedbackErrorTrip(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API returns Trip trigger cause vector for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return Trip trigger cause vector on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_getPwmTripTriggerCauseVector(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API returns Trip status for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return Trip status on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_getPwmTripStatus(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API clears Trip status and makes state transition to Intial state as follows (Active->Intial) + * or (Trip->Intial) for specified pwm set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_clearPwmTripStatus(PRUICSS_Handle handle, uint8_t pwmSet); + +/** + * \brief This API updates output action for specified state of A0 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalA0(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of A1 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalA1(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of A2 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalA2(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of B0 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalB0(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of B1 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalB1(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API updates output action for specified state of B2 signal for specified PWM set + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param pwmSet 0 for PWM0, 1 for PWM1, 2 for PWM2, 3 for PWM3 + * \param state 0 for Intial, 1 for Active, 2 for Safe(alias Trip) state + * \param action 0 for Toggle, 1 for Low, 2 for High + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_actionOnOutputCfgPwmSignalB2(PRUICSS_Handle handle, uint8_t pwmSet, uint8_t state, uint8_t action); + +/** + * \brief This API enables Efficiency mode + * In Efficiency mode Pwm state machine will go from Idle to + * Active and the same time Pwm output will get updated during this + * state transition And Iep Cmp flags will get auto HW cleared + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param enable 0 for disable, 1 for enable + * \return SystemP_SUCCESS on success, SystemP_FAILURE on error + * +*/ +int32_t PRUICSS_PWM_configurePwmEfficiencyModeEnable(PRUICSS_Handle handle, uint8_t enable); + +/** + * \brief This function enables IEP1 counter follow IEP0 counter + * when Enabled IEP1 counter acts as slave + * IEP1 counter[63:0] is from IEP0 during 64-bit mode + * IEP1 counter[31:0] is from IEP0 during 32-bit mode + * + * \param handle PRUICSS_Handle returned from PRUICSS_open() + * \param enable 0 for disable, 1 for enable + * \return SystemP_SUCCESS in case of success, SystemP_FAILURE otherwise + */ +int32_t PRUICSS_PWM_enableIEP1Slave(PRUICSS_Handle handle, uint8_t enable); + +#ifdef __cplusplus +} +#endif + +#endif/* #ifndef PRUICSS_PWM_H_ */ \ No newline at end of file diff --git a/source/pruicss_pwm/makefile.am243x.r5f.ti-arm-clang b/source/pruicss_pwm/makefile.am243x.r5f.ti-arm-clang new file mode 100644 index 0000000..98cc215 --- /dev/null +++ b/source/pruicss_pwm/makefile.am243x.r5f.ti-arm-clang @@ -0,0 +1,119 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CGT_TI_ARM_CLANG_PATH)/bin/tiarmclang +AR=$(CGT_TI_ARM_CLANG_PATH)/bin/tiarmar + +PROFILE?=release +ConfigName:=$(PROFILE) + +LIBNAME:=pruicss_pwm.am243x.r5f.ti-arm-clang.$(PROFILE).lib + +FILES_common := \ + pruicss_pwm.c \ + +FILES_PATH_common = \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/driver \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + +DEFINES_common := \ + -DSOC_AM243X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +ARFLAGS_common := \ + rc \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +ASMFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +ifeq ($(CPLUSPLUS_BUILD), yes) +CFLAGS += $(CFLAGS_cpp_common) +endif +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +ARFLAGS := $(ARFLAGS_common) $(ARFLAGS_$(PROFILE)) + +LIBDIR := lib +OBJDIR := obj/am243x/ti-arm-clang/$(PROFILE)/r5f/pruicss_pwm/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: $(LIBNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: $(LIBNAME): $< + $(CC) -c $(ASMFLAGS) -o $(OBJDIR)/$@ $< + +all: $(LIBDIR)/$(LIBNAME) + +$(LIBDIR)/$(LIBNAME): $(OBJS) | $(LIBDIR) + @echo . + @echo Archiving: $(LIBNAME) to $@ ... + $(AR) $(ARFLAGS) $@ $(addprefix $(OBJDIR), $(OBJS)) + @echo Archiving: $(LIBNAME) Done !!! + @echo . + +clean: + @echo Cleaning: $(LIBNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(LIBDIR)/$(LIBNAME) + +scrub: + @echo Scrubing: $(LIBNAME) ... + -$(RMDIR) obj/ + -$(RMDIR) lib/ + +$(OBJS): | $(OBJDIR) + +$(LIBDIR) $(OBJDIR): + $(MKDIR) $@ + +-include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/source/pruicss_pwm/makefile.am64x.r5f.ti-arm-clang b/source/pruicss_pwm/makefile.am64x.r5f.ti-arm-clang new file mode 100644 index 0000000..f0e4101 --- /dev/null +++ b/source/pruicss_pwm/makefile.am64x.r5f.ti-arm-clang @@ -0,0 +1,119 @@ +# +# Auto generated makefile +# + +export MOTOR_CONTROL_SDK_PATH?=$(abspath ../..) +include $(MOTOR_CONTROL_SDK_PATH)/imports.mak + +CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) + +CC=$(CGT_TI_ARM_CLANG_PATH)/bin/tiarmclang +AR=$(CGT_TI_ARM_CLANG_PATH)/bin/tiarmar + +PROFILE?=release +ConfigName:=$(PROFILE) + +LIBNAME:=pruicss_pwm.am64x.r5f.ti-arm-clang.$(PROFILE).lib + +FILES_common := \ + pruicss_pwm.c \ + +FILES_PATH_common = \ + ${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/driver \ + +INCLUDES_common := \ + -I${CG_TOOL_ROOT}/include/c \ + -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source \ + -I${MOTOR_CONTROL_SDK_PATH}/source/pruicss_pwm/include \ + +DEFINES_common := \ + -DSOC_AM64X \ + +CFLAGS_common := \ + -mcpu=cortex-r5 \ + -mfloat-abi=hard \ + -mfpu=vfpv3-d16 \ + -mthumb \ + -Wall \ + -Werror \ + -g \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-unused-function \ + +CFLAGS_cpp_common := \ + -Wno-c99-designator \ + -Wno-extern-c-compat \ + -Wno-c++11-narrowing \ + -Wno-reorder-init-list \ + -Wno-deprecated-register \ + -Wno-writable-strings \ + -Wno-enum-compare \ + -Wno-reserved-user-defined-literal \ + -Wno-unused-const-variable \ + -x c++ \ + +CFLAGS_debug := \ + -D_DEBUG_=1 \ + +CFLAGS_release := \ + -Os \ + +ARFLAGS_common := \ + rc \ + +FILES := $(FILES_common) $(FILES_$(PROFILE)) +ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) +FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) +CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +ASMFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) +ifeq ($(CPLUSPLUS_BUILD), yes) +CFLAGS += $(CFLAGS_cpp_common) +endif +DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) +INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) +ARFLAGS := $(ARFLAGS_common) $(ARFLAGS_$(PROFILE)) + +LIBDIR := lib +OBJDIR := obj/am64x/ti-arm-clang/$(PROFILE)/r5f/pruicss_pwm/ +OBJS := $(FILES:%.c=%.obj) +OBJS += $(ASMFILES:%.S=%.obj) +DEPS := $(FILES:%.c=%.d) + +vpath %.obj $(OBJDIR) +vpath %.c $(FILES_PATH) +vpath %.S $(FILES_PATH) + +$(OBJDIR)/%.obj %.obj: %.c + @echo Compiling: $(LIBNAME): $< + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< + +$(OBJDIR)/%.obj %.obj: %.S + @echo Compiling: $(LIBNAME): $< + $(CC) -c $(ASMFLAGS) -o $(OBJDIR)/$@ $< + +all: $(LIBDIR)/$(LIBNAME) + +$(LIBDIR)/$(LIBNAME): $(OBJS) | $(LIBDIR) + @echo . + @echo Archiving: $(LIBNAME) to $@ ... + $(AR) $(ARFLAGS) $@ $(addprefix $(OBJDIR), $(OBJS)) + @echo Archiving: $(LIBNAME) Done !!! + @echo . + +clean: + @echo Cleaning: $(LIBNAME) ... + $(RMDIR) $(OBJDIR) + $(RM) $(LIBDIR)/$(LIBNAME) + +scrub: + @echo Scrubing: $(LIBNAME) ... + -$(RMDIR) obj/ + -$(RMDIR) lib/ + +$(OBJS): | $(OBJDIR) + +$(LIBDIR) $(OBJDIR): + $(MKDIR) $@ + +-include $(addprefix $(OBJDIR)/, $(DEPS))