Pull request #57: am64x/am243x: EnDat: Add configurable memory support
Merge in PINDSW/motor_control_sdk from a0502729_PINDSW-7015_endat_move_data_to_tcm to next * commit 'e30404858c1acc7d0243db3f5d38194beaac8855': am64x/am243x: EnDat: Add configurable memory support
This commit is contained in:
commit
2445bf051e
@ -95,6 +95,12 @@
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#define MRS_POS_VAL2_WORD2 0x43
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#define MRS_POS_VAL2_WORD3 0x44
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/* Translate the TCM local view addr to SoC view addr */
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#define CPU0_ATCM_SOCVIEW(x) (CSL_R5FSS0_CORE0_ATCM_BASE+(x))
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#define CPU1_ATCM_SOCVIEW(x) (CSL_R5FSS1_CORE0_ATCM_BASE+(x))
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#define CPU0_BTCM_SOCVIEW(x) (CSL_R5FSS0_CORE0_BTCM_BASE+(x - CSL_R5FSS0_BTCM_BASE))
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#define CPU1_BTCM_SOCVIEW(x) (CSL_R5FSS1_CORE0_BTCM_BASE+(x - CSL_R5FSS1_BTCM_BASE))
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static union endat_format_data gEndat_format_data_mtrctrl[3];
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static uint32_t gEndat_mtrctrl_crc_err[3];
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@ -153,6 +159,9 @@ char gPrintf_dump_buffer[21];
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* variable tp a string as printf doesn't support
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* printing 64-bit variables
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*/
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/* EnDat channel Info, written by PRU cores */
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__attribute__((section(".gEnDatChInfo"))) struct endatChRxInfo gEndatChInfo;
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char * uint64_to_str (uint64_t x)
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{
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char *b = gPrintf_dump_buffer + sizeof(gPrintf_dump_buffer);
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@ -192,6 +201,7 @@ static void endat_pruss_init(void)
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}
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PRUICSS_disableCore(gPruIcssXHandle, PRUICSS_PRUx);
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}
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void endat_pre_init(void)
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@ -523,7 +533,7 @@ static void endat_recvd_print(int32_t cmd, struct endat_priv *priv,
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static void endat_display_raw_data(int32_t cmd, struct endat_priv *priv)
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{
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int32_t ch = priv->channel;
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struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
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struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
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switch(cmd)
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{
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@ -542,8 +552,8 @@ static void endat_display_raw_data(int32_t cmd, struct endat_priv *priv)
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case 13:
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case 14:
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DebugP_log("\r|\n| raw data: %x %x %x %x\n|\n",
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pruss_xchg->ch[ch].pos_word0, pruss_xchg->ch[ch].pos_word1,
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pruss_xchg->ch[ch].pos_word2, pruss_xchg->ch[ch].pos_word3);
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endatChRxInfo->ch[ch].posWord0, endatChRxInfo->ch[ch].posWord1,
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endatChRxInfo->ch[ch].posWord2, endatChRxInfo->ch[ch].posWord3);
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break;
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default:
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@ -2133,16 +2143,20 @@ void endat_main(void *args)
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DebugP_log("\r\n\n");
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/*Translate the TCM local view addr to globel view addr */
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uint64_t gEndatChInfoGlobalAddr = CPU0_BTCM_SOCVIEW((uint64_t)&gEndatChInfo);
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pruss_cfg = (void *)(((PRUICSS_HwAttrs *)(gPruIcssXHandle->hwAttrs))->cfgRegBase);
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pruss_iep = (void *)(((PRUICSS_HwAttrs *)(gPruIcssXHandle->hwAttrs))->iep0RegBase);
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#if PRU_ICSSGx_PRU_SLICE
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priv = endat_init((struct endat_pruss_xchg *)((PRUICSS_HwAttrs *)(
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gPruIcssXHandle->hwAttrs))->pru1DramBase, pruss_cfg, pruss_iep, PRUICSS_SLICEx);
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gPruIcssXHandle->hwAttrs))->pru1DramBase, &gEndatChInfo, gEndatChInfoGlobalAddr, pruss_cfg, pruss_iep, PRUICSS_SLICEx);
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#else
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priv = endat_init((struct endat_pruss_xchg *)((PRUICSS_HwAttrs *)(
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gPruIcssXHandle->hwAttrs))->pru0DramBase, pruss_cfg, pruss_iep, PRUICSS_SLICEx);
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gPruIcssXHandle->hwAttrs))->pru0DramBase, &gEndatChInfo, gEndatChInfoGlobalAddr, pruss_cfg, pruss_iep, PRUICSS_SLICEx);
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#endif
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@ -2180,7 +2194,7 @@ void endat_main(void *args)
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priv->pruss_xchg->endat_delay_380ms = ((icssgclk/1000) * 380);
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priv->pruss_xchg->endat_delay_900ms = ((icssgclk/1000) * 900);
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priv->pruss_xchg->icssg_clk = icssgclk;
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i = endat_pruss_load_run_fw(priv);
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@ -103,6 +103,9 @@ SECTIONS
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.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
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/* General purpose non cacheable memory, used in some examples */
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.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
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/* TCM used by ICSS PRU to write endat channel Info */
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.gEnDatChInfo : {} align(4) > R5F_TCMB0
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}
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/*
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@ -103,6 +103,10 @@ SECTIONS
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.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
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/* General purpose non cacheable memory, used in some examples */
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.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
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/* TCM used by ICSS PRU to write endat channel Info */
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.gEnDatChInfo : {} align(4) > R5F_TCMB0
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}
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/*
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@ -146,3 +150,5 @@ MEMORY
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LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x80, LENGTH = 0x00004000 - 0x80
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RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000
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}
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@ -103,6 +103,9 @@ SECTIONS
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.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
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/* General purpose non cacheable memory, used in some examples */
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.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
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/* TCM used by ICSS PRU to write endat channel Info */
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.gEnDatChInfo : {} align(4) > R5F_TCMB0
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}
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/*
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@ -103,6 +103,9 @@ SECTIONS
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.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
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/* General purpose non cacheable memory, used in some examples */
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.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
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/* TCM used by ICSS PRU to write endat channel Info */
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.gEnDatChInfo : {} align(4) > R5F_TCMB0
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}
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/*
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@ -124,7 +127,7 @@ MEMORY
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R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
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R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
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R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
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/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
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NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
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@ -103,6 +103,9 @@ SECTIONS
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.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
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/* General purpose non cacheable memory, used in some examples */
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.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
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/* TCM used by ICSS PRU to write endat channel Info */
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.gEnDatChInfo : {} align(4) > R5F_TCMB0
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}
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/*
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@ -103,6 +103,9 @@ SECTIONS
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.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
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/* General purpose non cacheable memory, used in some examples */
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.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
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/* TCM used by ICSS PRU to write endat channel Info */
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.gEnDatChInfo : {} align(4) > R5F_TCMB0
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}
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/*
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@ -124,6 +127,7 @@ MEMORY
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R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
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R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
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R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
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/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
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NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
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@ -103,6 +103,9 @@ SECTIONS
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.bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM
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/* General purpose non cacheable memory, used in some examples */
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.bss.nocache (NOLOAD) : {} > NON_CACHE_MEM
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/* TCM used by ICSS PRU to write endat channel Info */
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.gEnDatChInfo : {} align(4) > R5F_TCMB0
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}
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/*
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@ -124,6 +127,7 @@ MEMORY
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R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
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R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0
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R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000
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/* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */
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NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
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@ -50,14 +50,13 @@ static int32_t endat_recvd_organize(int32_t cmd, struct endat_priv *priv,
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{
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uint32_t word0, word1, word2, word3;
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uint32_t pos_bits, shift;
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struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
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struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
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memset(endat_data, 0, sizeof(*endat_data));
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word0 = pruss_xchg->ch[priv->channel].pos_word0;
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word1 = pruss_xchg->ch[priv->channel].pos_word1;
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word2 = pruss_xchg->ch[priv->channel].pos_word2;
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word3 = pruss_xchg->ch[priv->channel].pos_word3;
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word0 = endatChRxInfo->ch[priv->channel].posWord0;
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word1 = endatChRxInfo->ch[priv->channel].posWord1;
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word2 = endatChRxInfo->ch[priv->channel].posWord2;
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word3 = endatChRxInfo->ch[priv->channel].posWord3;
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switch(cmd)
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{
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@ -404,7 +403,7 @@ uint32_t endat_recvd_validate(struct endat_priv *priv, int32_t cmd,
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#endif
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#ifdef ENDAT_USE_OTF_CRC_STATUS
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val = priv->pruss_xchg->ch[priv->channel].crc.status;
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val = priv->endatChRxInfo->ch[priv->channel].crcStatus;
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if(priv->flags.info2)
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{
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@ -1120,9 +1119,9 @@ void endat_command_wait(struct endat_priv *priv)
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void endat_recovery_time_conversion(struct endat_priv *priv)
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{
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/* RT: convert cycle to ns */
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priv->pruss_xchg->endat_ch0_rt = priv->pruss_xchg->endat_ch0_rt * ((float)(1000000000)/priv->pruss_xchg->icssg_clk);
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priv->pruss_xchg->endat_ch1_rt = priv->pruss_xchg->endat_ch1_rt * ((float)(1000000000)/priv->pruss_xchg->icssg_clk);
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priv->pruss_xchg->endat_ch2_rt = priv->pruss_xchg->endat_ch2_rt * ((float)(1000000000)/priv->pruss_xchg->icssg_clk);
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priv->endatChRxInfo->ch[0].recoveryTime = priv->endatChRxInfo->ch[0].recoveryTime * ((float)(1000000000)/priv->pruss_xchg->icssg_clk);
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priv->endatChRxInfo->ch[1].recoveryTime = priv->endatChRxInfo->ch[1].recoveryTime * ((float)(1000000000)/priv->pruss_xchg->icssg_clk);
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priv->endatChRxInfo->ch[2].recoveryTime = priv->endatChRxInfo->ch[2].recoveryTime * ((float)(1000000000)/priv->pruss_xchg->icssg_clk);
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}
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@ -1149,16 +1148,16 @@ int32_t endat_command_process(struct endat_priv *priv, int32_t cmd,
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int32_t endat_get_2_2_angle(struct endat_priv *priv)
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{
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int32_t pos;
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struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
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struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
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int32_t ch = priv->channel;
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if(!(pruss_xchg->ch[ch].crc.status & ENDAT_CRC_DATA))
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if(!(endatChRxInfo->ch[ch].crcStatus & ENDAT_CRC_DATA))
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{
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return -1;
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}
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pos = pruss_xchg->ch[ch].pos_word0;
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pos = endatChRxInfo->ch[ch].posWord0;
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#ifdef __TI_ARM__
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pos = __rbit(pos);
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@ -1186,7 +1185,7 @@ static int32_t endat_get_pos_res(struct endat_priv *priv)
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struct cmd_supplement cmd_supplement;
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uint32_t word;
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int32_t ch = priv->channel;
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struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
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struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
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/* select memory area encoder manufacturer page 0 */
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cmd = 2, cmd_supplement.address = MRS_CODE_PARAM_ENCODER_MANUFACTURER_PAGE0;
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@ -1210,7 +1209,7 @@ static int32_t endat_get_pos_res(struct endat_priv *priv)
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/* delay copied from fw */
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ClockP_usleep(1000 * 2);
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word = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
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word = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
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1 << ENDAT_NUM_BITS_PARAMETER) - 1);
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return word &= (1 << ENDAT_NUM_BITS_VALID_PAGE0_WORD13) - 1;
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}
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@ -1221,7 +1220,7 @@ static int32_t endat_get_multi_turn_res(struct endat_priv *priv)
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struct cmd_supplement cmd_supplement;
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uint32_t word;
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int32_t ch = priv->channel;
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struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
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struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
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/* select memory area encoder manufacturer page 0 */
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cmd = 2, cmd_supplement.address = MRS_CODE_PARAM_ENCODER_MANUFACTURER_PAGE1;
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@ -1245,7 +1244,7 @@ static int32_t endat_get_multi_turn_res(struct endat_priv *priv)
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/* delay copied from fw */
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ClockP_usleep(1000 * 2);
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word = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
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word = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
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1 << ENDAT_NUM_BITS_PARAMETER) - 1);
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return word &= (1 << ENDAT_NUM_BITS_VALID_PAGE1_WORD1) - 1;
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}
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@ -1256,7 +1255,7 @@ static int32_t endat_get_id(struct endat_priv *priv)
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struct cmd_supplement cmd_supplement;
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uint32_t word0, word1, word2;
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int32_t ch = priv->channel;
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struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
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struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
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/* select memory area encoder manufacturer page 1 */
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cmd = 2, cmd_supplement.address = MRS_CODE_PARAM_ENCODER_MANUFACTURER_PAGE1;
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@ -1277,7 +1276,7 @@ static int32_t endat_get_id(struct endat_priv *priv)
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return -EINVAL;
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}
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word0 = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC))
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word0 = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC))
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& ((1 << ENDAT_NUM_BITS_PARAMETER) - 1);
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/* delay copied from fw */
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ClockP_usleep(1000 * 2);
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@ -1290,7 +1289,7 @@ static int32_t endat_get_id(struct endat_priv *priv)
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return -EINVAL;
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}
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word1 = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC))
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word1 = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC))
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& ((1 << ENDAT_NUM_BITS_PARAMETER) - 1);
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/* delay copied from fw */
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ClockP_usleep(1000 * 2);
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@ -1303,7 +1302,7 @@ static int32_t endat_get_id(struct endat_priv *priv)
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return -EINVAL;
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}
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word2 = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC))
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word2 = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC))
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& ((1 << ENDAT_NUM_BITS_PARAMETER) - 1);
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/* delay copied from fw */
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ClockP_usleep(1000 * 2);
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@ -1321,7 +1320,7 @@ static int32_t endat_get_sn(struct endat_priv *priv)
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struct cmd_supplement cmd_supplement;
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uint32_t word0, word1, word2;
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int32_t ch = priv->channel;
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struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
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struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
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/* select memory area encoder manufacturer page 1 */
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cmd = 2, cmd_supplement.address = MRS_CODE_PARAM_ENCODER_MANUFACTURER_PAGE1;
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@ -1342,7 +1341,7 @@ static int32_t endat_get_sn(struct endat_priv *priv)
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return -EINVAL;
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}
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word0 = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC))
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word0 = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC))
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& ((1 << ENDAT_NUM_BITS_PARAMETER) - 1);
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/* delay copied from fw */
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ClockP_usleep(1000 * 2);
|
||||
@ -1355,7 +1354,7 @@ static int32_t endat_get_sn(struct endat_priv *priv)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
word1 = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC))
|
||||
word1 = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC))
|
||||
& ((1 << ENDAT_NUM_BITS_PARAMETER) - 1);
|
||||
/* delay copied from fw */
|
||||
ClockP_usleep(1000 * 2);
|
||||
@ -1368,7 +1367,7 @@ static int32_t endat_get_sn(struct endat_priv *priv)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
word2 = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC))
|
||||
word2 = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC))
|
||||
& ((1 << ENDAT_NUM_BITS_PARAMETER) - 1);
|
||||
/* delay copied from fw */
|
||||
ClockP_usleep(1000 * 2);
|
||||
@ -1387,7 +1386,7 @@ static int32_t endat_get_command_set(struct endat_priv *priv)
|
||||
struct cmd_supplement cmd_supplement;
|
||||
uint32_t word;
|
||||
int32_t ch = priv->channel;
|
||||
struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
|
||||
struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
|
||||
|
||||
/* select memory area encoder manufacturer page 2 */
|
||||
cmd = 2, cmd_supplement.address = MRS_CODE_PARAM_ENCODER_MANUFACTURER_PAGE2;
|
||||
@ -1411,7 +1410,7 @@ static int32_t endat_get_command_set(struct endat_priv *priv)
|
||||
/* delay copied from fw */
|
||||
ClockP_usleep(1000 * 2);
|
||||
|
||||
word = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
|
||||
word = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
|
||||
1 << ENDAT_NUM_BITS_PARAMETER) - 1);
|
||||
priv->cmd_set_2_2 = (word & 0x1) && !(word & 0x2);
|
||||
priv->has_safety = (word & 0x4) && !(word & 0x8);
|
||||
@ -1425,7 +1424,7 @@ static int32_t endat_get_type(struct endat_priv *priv)
|
||||
struct cmd_supplement cmd_supplement;
|
||||
uint32_t word;
|
||||
int32_t ch = priv->channel;
|
||||
struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
|
||||
struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
|
||||
|
||||
/* select memory area encoder manufacturer page 0 */
|
||||
cmd = 2, cmd_supplement.address = MRS_CODE_PARAM_ENCODER_MANUFACTURER_PAGE0;
|
||||
@ -1449,7 +1448,7 @@ static int32_t endat_get_type(struct endat_priv *priv)
|
||||
/* delay copied from fw */
|
||||
ClockP_usleep(1000 * 2);
|
||||
|
||||
word = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
|
||||
word = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
|
||||
1 << ENDAT_NUM_BITS_PARAMETER) - 1);
|
||||
priv->type = (word & (1 << 15)) ? rotary : linear;
|
||||
|
||||
@ -1462,7 +1461,7 @@ static int32_t endat_get_step(struct endat_priv *priv)
|
||||
struct cmd_supplement cmd_supplement;
|
||||
uint32_t word;
|
||||
int32_t ch = priv->channel;
|
||||
struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
|
||||
struct endatChRxInfo *endatChRxInfo = priv->endatChRxInfo;
|
||||
|
||||
/* select memory area encoder manufacturer page 0 */
|
||||
cmd = 2, cmd_supplement.address = MRS_CODE_PARAM_ENCODER_MANUFACTURER_PAGE1;
|
||||
@ -1485,7 +1484,7 @@ static int32_t endat_get_step(struct endat_priv *priv)
|
||||
|
||||
/* delay copied from fw */
|
||||
ClockP_usleep(1000 * 2);
|
||||
word = (pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
|
||||
word = (endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC)) & ((
|
||||
1 << ENDAT_NUM_BITS_PARAMETER) - 1);
|
||||
|
||||
/* send parameter for word5 */
|
||||
@ -1498,7 +1497,7 @@ static int32_t endat_get_step(struct endat_priv *priv)
|
||||
|
||||
/* delay copied from fw */
|
||||
ClockP_usleep(1000 * 2);
|
||||
word |= ((pruss_xchg->ch[ch].pos_word0 >> (ENDAT_NUM_BITS_POSITION_CRC))
|
||||
word |= ((endatChRxInfo->ch[ch].posWord0 >> (ENDAT_NUM_BITS_POSITION_CRC))
|
||||
& ((1 << ENDAT_NUM_BITS_PARAMETER) - 1)) << 16;
|
||||
|
||||
return word;
|
||||
@ -1598,7 +1597,7 @@ int32_t endat_get_encoder_info(struct endat_priv *priv)
|
||||
|
||||
uint32_t endat_get_prop_delay(struct endat_priv *priv)
|
||||
{
|
||||
return priv->pruss_xchg->ch[priv->channel].prop_delay;
|
||||
return priv->pruss_xchg->ch[priv->channel].propDelay;
|
||||
}
|
||||
|
||||
void endat_addinfo_track(struct endat_priv *priv, int32_t cmd,
|
||||
@ -1757,8 +1756,7 @@ void endat_config_rx_clock_disable(struct endat_priv *priv,
|
||||
{
|
||||
struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
|
||||
int32_t ch = priv->channel;
|
||||
|
||||
pruss_xchg->ch[ch].rx_clk_less = val;
|
||||
pruss_xchg->ch[ch].rxClkLess = val;
|
||||
}
|
||||
|
||||
static void endat_set_continuous_mode(struct endat_priv *priv)
|
||||
@ -2079,30 +2077,21 @@ static void endat_hw_init(struct endat_priv *priv)
|
||||
endat_config_clr_cfg0(priv);
|
||||
}
|
||||
|
||||
struct endat_priv *endat_init(struct endat_pruss_xchg *pruss_xchg,
|
||||
struct endat_priv *endat_init(struct endat_pruss_xchg *pruss_xchg, struct endatChRxInfo *endatRxInfo, uint64_t endatChInfoGlobalAddr,
|
||||
void *pruss_cfg, void* pruss_iep, int32_t slice)
|
||||
{
|
||||
|
||||
endat_priv.pruss_xchg = pruss_xchg;
|
||||
endat_priv.pruss_cfg = pruss_cfg;
|
||||
endat_priv.pruicss_slicex = slice;
|
||||
endat_priv.pruss_iep = pruss_iep;
|
||||
endat_priv.endatChRxInfo = endatRxInfo;
|
||||
/*Write Configured memory address to DMEM */
|
||||
endat_priv.pruss_xchg->endatChInfoMemoryAdd = endatChInfoGlobalAddr;
|
||||
endat_hw_init(&endat_priv);
|
||||
return &endat_priv;
|
||||
}
|
||||
|
||||
uint32_t endat_get_recovery_time(struct endat_priv *priv)
|
||||
{
|
||||
if(priv->channel == 0)
|
||||
{
|
||||
return priv->pruss_xchg->endat_ch0_rt;
|
||||
}
|
||||
else if (priv->channel == 1)
|
||||
{
|
||||
return priv->pruss_xchg->endat_ch1_rt;
|
||||
}
|
||||
else
|
||||
{
|
||||
return priv->pruss_xchg->endat_ch2_rt;
|
||||
}
|
||||
return priv->endatChRxInfo->ch[priv->channel].recoveryTime;
|
||||
}
|
||||
|
||||
@ -99,69 +99,81 @@ ENDAT_CH2_CMD_WORD_2_ADDR_OFFSET .set 0x2C ; 8-bit address
|
||||
ENDAT_CH2_CMD_WORD_2_PARAM_OFFSET .set 0x2D ; 16-bit data
|
||||
ENDAT_CH2_CMD_WORD_2_BLKADDR_OFFSET .set 0x2F ; 8-bit optional block address
|
||||
|
||||
;;;;;;;;;;;;; EnDat Channel info offset ;;;;;;;;;;;;;;;;;;;;;
|
||||
;CH0 registers
|
||||
ENDAT_CH0_NUM_CLOCK_PULSES_OFFSET .set 0X30
|
||||
ENDAT_CH0_ENDAT22_STAT_OFFSET .set 0x31
|
||||
ENDAT_CH0_CLOCK_LESS_FOR_TD .set 0x32
|
||||
ENDAT_CH0_MEAS_PROPDELAY_OFFSET .set 0x34
|
||||
ENDAT_CH0_CRC_ERR_COUNTER_OFFSET .set 0X38 ; CRC error count
|
||||
|
||||
; NOTE: For ENDAT_CHx_POSITION_DATA_LSW_OFFSET: Bit0 is Error flag (EnDat2.1) and Bit0,Bit1 are Error flags (EnDat2.2)
|
||||
; CH0 registers
|
||||
ENDAT_CH0_POSITION_DATA_WORD0_OFFSET .set 0x30
|
||||
ENDAT_CH0_POSITION_DATA_WORD1_OFFSET .set 0x34
|
||||
ENDAT_CH0_POSITION_DATA_WORD2_OFFSET .set 0x38
|
||||
ENDAT_CH0_POSITION_DATA_WORD3_OFFSET .set 0x3C
|
||||
ENDAT_CH0_CRC_ERR_COUNTER_OFFSET .set 0X40 ; CRC error count
|
||||
ENDAT_CH0_NUM_CLOCK_PULSES_OFFSET .set 0X44
|
||||
ENDAT_CH0_ENDAT22_STAT_OFFSET .set 0x45
|
||||
ENDAT_CH0_CLOCK_LESS_FOR_TD .set 0x46
|
||||
ENDAT_CH0_MEAS_PROPDELAY_OFFSET .set 0x48
|
||||
;CH1 registers
|
||||
ENDAT_CH1_NUM_CLOCK_PULSES_OFFSET .set 0x40
|
||||
ENDAT_CH1_ENDAT22_STAT_OFFSET .set 0x41
|
||||
ENDAT_CH1_CLOCK_LESS_FOR_TD .set 0x42
|
||||
ENDAT_CH1_MEAS_PROPDELAY_OFFSET .set 0x44
|
||||
ENDAT_CH1_CRC_ERR_COUNTER_OFFSET .set 0x48 ; CRC error count
|
||||
|
||||
; CH1 registers
|
||||
ENDAT_CH1_POSITION_DATA_WORD0_OFFSET .set 0x50
|
||||
ENDAT_CH1_POSITION_DATA_WORD1_OFFSET .set 0x54
|
||||
ENDAT_CH1_POSITION_DATA_WORD2_OFFSET .set 0x58
|
||||
ENDAT_CH1_POSITION_DATA_WORD3_OFFSET .set 0X5C
|
||||
ENDAT_CH1_CRC_ERR_COUNTER_OFFSET .set 0x60 ; CRC error count
|
||||
ENDAT_CH1_NUM_CLOCK_PULSES_OFFSET .set 0x64
|
||||
ENDAT_CH1_ENDAT22_STAT_OFFSET .set 0x65
|
||||
ENDAT_CH1_CLOCK_LESS_FOR_TD .set 0x66
|
||||
ENDAT_CH1_MEAS_PROPDELAY_OFFSET .set 0x68
|
||||
;CH2 registers
|
||||
ENDAT_CH2_NUM_CLOCK_PULSES_OFFSET .set 0x50
|
||||
ENDAT_CH2_ENDAT22_STAT_OFFSET .set 0x51
|
||||
ENDAT_CH2_CLOCK_LESS_FOR_TD .set 0x52
|
||||
ENDAT_CH2_MEAS_PROPDELAY_OFFSET .set 0x54
|
||||
ENDAT_CH2_CRC_ERR_COUNTER_OFFSET .set 0x58 ; CRC error count
|
||||
|
||||
; CH2 registers
|
||||
ENDAT_CH2_POSITION_DATA_WORD0_OFFSET .set 0x70
|
||||
ENDAT_CH2_POSITION_DATA_WORD1_OFFSET .set 0x74
|
||||
ENDAT_CH2_POSITION_DATA_WORD2_OFFSET .set 0x78
|
||||
ENDAT_CH2_POSITION_DATA_WORD3_OFFSET .set 0x7C
|
||||
ENDAT_CH2_CRC_ERR_COUNTER_OFFSET .set 0x80 ; CRC error count
|
||||
ENDAT_CH2_NUM_CLOCK_PULSES_OFFSET .set 0x84
|
||||
ENDAT_CH2_ENDAT22_STAT_OFFSET .set 0x85
|
||||
ENDAT_CH2_CLOCK_LESS_FOR_TD .set 0x86
|
||||
ENDAT_CH2_MEAS_PROPDELAY_OFFSET .set 0x88
|
||||
;;;;;;;;;;Configured memory address offset ;;;;;;;;;;;
|
||||
ENDAT_CONFIG_CH_INFO_MEMORY_ADDRESS .set 0x60 ;64 bit data store memory address
|
||||
|
||||
; clock configuration
|
||||
ENDAT_CONFIG_CLOCK_RX_OFFSET .set 0x90 ; clock to be configure for rx = tx * oversample rate
|
||||
ENDAT_CONFIG_CLOCK_TX_OFFSET .set 0x92 ; clock to be configure for tx
|
||||
ENDAT_CONFIG_CLOCK_RX_EN_CNT_OFFSET .set 0x94 ; rx arm delay
|
||||
|
||||
;;;;;;;;;; clock configuration ;;;;;;;;;
|
||||
ENDAT_CONFIG_CLOCK_RX_OFFSET .set 0x68 ; clock to be configure for rx = tx * oversample rate
|
||||
ENDAT_CONFIG_CLOCK_TX_OFFSET .set 0x6A ; clock to be configure for tx
|
||||
ENDAT_CONFIG_CLOCK_RX_EN_CNT_OFFSET .set 0x6C ; rx arm delay
|
||||
|
||||
; Delay Configuration
|
||||
ENDAT_CONFIG_DELAY_125NS_OFFSET .set 0x98
|
||||
ENDAT_CONFIG_DELAY_5US_OFFSET .set 0x9C
|
||||
ENDAT_CONFIG_DELAY_51US_OFFSET .set 0xA0
|
||||
ENDAT_CONFIG_DELAY_1MS_OFFSET .set 0xA4
|
||||
ENDAT_CONFIG_DELAY_2MS_OFFSET .set 0xA8 ; delay for 2ms counter
|
||||
ENDAT_CONFIG_DELAY_12MS_OFFSET .set 0xAC ; delay for 12ms counter
|
||||
ENDAT_CONFIG_DELAY_50MS_OFFSET .set 0xB0 ; delay for 20ms counter
|
||||
ENDAT_CONFIG_DELAY_380MS_OFFSET .set 0xB4
|
||||
ENDAT_CONFIG_DELAY_900MS_OFFSET .set 0XB8
|
||||
ENDAT_CONFIG_DELAY_125NS_OFFSET .set 0x70
|
||||
ENDAT_CONFIG_DELAY_5US_OFFSET .set 0x74
|
||||
ENDAT_CONFIG_DELAY_51US_OFFSET .set 0x78
|
||||
ENDAT_CONFIG_DELAY_1MS_OFFSET .set 0x7C
|
||||
ENDAT_CONFIG_DELAY_2MS_OFFSET .set 0x80 ; delay for 2ms counter
|
||||
ENDAT_CONFIG_DELAY_12MS_OFFSET .set 0x84 ; delay for 12ms counter
|
||||
ENDAT_CONFIG_DELAY_50MS_OFFSET .set 0x88 ; delay for 20ms counter
|
||||
ENDAT_CONFIG_DELAY_380MS_OFFSET .set 0x8C
|
||||
ENDAT_CONFIG_DELAY_900MS_OFFSET .set 0X90
|
||||
|
||||
; mask for core set
|
||||
MASK_FOR_PRIMARY_CORE .set 0xBC
|
||||
;;;;;;;;; mask for core set ;;;;;;;;
|
||||
MASK_FOR_PRIMARY_CORE .set 0x94
|
||||
;rx complete status
|
||||
ENDAT_CH0_CONFIG_SYN_BIT .set 0xBD ;0th bit for ch0
|
||||
ENDAT_CH1_CONFIG_SYN_BIT .set 0xBE ;0th bit for ch0
|
||||
ENDAT_CH2_CONFIG_SYN_BIT .set 0xBF ;0th bit for ch0
|
||||
; Recovery Time
|
||||
ENDAT_CH0_RT_OFFSET .set 0xC0 ;
|
||||
ENDAT_CH1_RT_OFFSET .set 0xC4 ;
|
||||
ENDAT_CH2_RT_OFFSET .set 0xC8 ;
|
||||
ENDAT_CH0_CONFIG_SYN_BIT .set 0x95 ;0th bit for ch0
|
||||
ENDAT_CH1_CONFIG_SYN_BIT .set 0x96 ;0th bit for ch0
|
||||
ENDAT_CH2_CONFIG_SYN_BIT .set 0x97 ;0th bit for ch0
|
||||
|
||||
;icssgclock
|
||||
PRUICSSG_CLOCK .set 0xCD;
|
||||
;;;;;;; icssgclock ;;;;;;;;;;;;;;
|
||||
PRUICSSG_CLOCK .set 0x98;
|
||||
|
||||
;;;;;;;;;; EnDat channel Rx info offset ;;;;;;;;
|
||||
; NOTE: For ENDAT_CHx_POSITION_DATA_LSW_OFFSET: Bit0 is Error flag (EnDat2.1) and Bit0,Bit1 are Error flags (EnDat2.2)
|
||||
; CH0 registers
|
||||
ENDAT_CH0_POSITION_DATA_WORD0_OFFSET .set 0x00
|
||||
ENDAT_CH0_POSITION_DATA_WORD1_OFFSET .set 0x04
|
||||
ENDAT_CH0_POSITION_DATA_WORD2_OFFSET .set 0x08
|
||||
ENDAT_CH0_POSITION_DATA_WORD3_OFFSET .set 0x0C
|
||||
ENDAT_CH0_CRC_STATUS_OFFSET .set 0x10
|
||||
ENDAT_CH0_RT_OFFSET .set 0x14
|
||||
|
||||
; CH1 registers
|
||||
ENDAT_CH1_POSITION_DATA_WORD0_OFFSET .set 0x18
|
||||
ENDAT_CH1_POSITION_DATA_WORD1_OFFSET .set 0x1C
|
||||
ENDAT_CH1_POSITION_DATA_WORD2_OFFSET .set 0x20
|
||||
ENDAT_CH1_POSITION_DATA_WORD3_OFFSET .set 0X24
|
||||
ENDAT_CH1_CRC_STATUS_OFFSET .set 0x28
|
||||
ENDAT_CH1_RT_OFFSET .set 0x2C
|
||||
|
||||
; CH2 registers
|
||||
ENDAT_CH2_POSITION_DATA_WORD0_OFFSET .set 0x30
|
||||
ENDAT_CH2_POSITION_DATA_WORD1_OFFSET .set 0x34
|
||||
ENDAT_CH2_POSITION_DATA_WORD2_OFFSET .set 0x38
|
||||
ENDAT_CH2_POSITION_DATA_WORD3_OFFSET .set 0x3C
|
||||
ENDAT_CH2_CRC_STATUS_OFFSET .set 0x40
|
||||
ENDAT_CH2_RT_OFFSET .set 0x44
|
||||
|
||||
|
||||
@ -280,7 +280,7 @@ ENDAT_SKIP_DEFAULT_CH:
|
||||
LDI R1.b2, ENDAT_CMDTYP_2_1
|
||||
CALL FN_SEND_RECEIVE_ENDAT
|
||||
; Need to save the response and extract the clock pulses info
|
||||
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
LSL R15, R15, 3
|
||||
LSL R19, R19, 3
|
||||
@ -349,7 +349,6 @@ ENDAT_SKIP2_CH2:
|
||||
LDI R1.b2, ENDAT_CMDTYP_2_1
|
||||
CALL FN_SEND_RECEIVE_ENDAT
|
||||
; Need to save the response and extract the clock pulses info
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
LSL R15, R15, 3
|
||||
LSL R19, R19, 3
|
||||
@ -489,7 +488,7 @@ PROP_DELAY_MULTI_END:
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU") ;ch0: R3.b0 - ENDAT_TX_CHx_SEL, R2.b1 - clock plus for position, R3.b2 - ENDAT_CHx_SB, R3.b3 - ENDAT_CHx_TX_REINIT
|
||||
LDI R3.w0, 0 | 8 << 8
|
||||
LDI R3.w2, 24 | 5 << 8
|
||||
LBCO &R2.b1, PRUx_DMEM, ENDAT_CH0_NUM_CLOCK_PULSES_OFFSET, 1
|
||||
LBCO &R2.b1, PRUx_DMEM, ENDAT_CH0_NUM_CLOCK_PULSES_OFFSET, 1
|
||||
CALL FN_PROP_DELAY_CALC
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU") ;ch1 : R3.b0 - ENDAT_TX_CHx_SEL, R2.b1 - clock plus for position, R3.b2 - ENDAT_CHx_SB, R3.b3 - ENDAT_CHx_TX_REINIT
|
||||
LDI R3.w0, 1 | 9 << 8
|
||||
@ -521,7 +520,7 @@ ENDAT_SKIP5A_CH2:
|
||||
.endif
|
||||
|
||||
|
||||
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU") ;store prop_delay value in DMEM for ch0
|
||||
SBCO &R9, PRUx_DMEM, ENDAT_CH0_MEAS_PROPDELAY_OFFSET, 4
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU") ;store prop_delay value in DMEM for ch1
|
||||
@ -744,10 +743,12 @@ ENDAT_SKIP_CONTINUOUS_MODE:
|
||||
CALL FN_SEND_ENDAT22_COMMAND_SUPPLEMENT
|
||||
ENDAT_HOST_CMD_DONE:
|
||||
; result in R15-R18, R0.b0 holds CRC status, R2.b0 indicates addinfo presence
|
||||
;R14 contain address of TCM
|
||||
LBCO &R14, PRUx_DMEM, ENDAT_CONFIG_CH_INFO_MEMORY_ADDRESS, 4
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU") ;ch0: store encoder response and crc in DMEM
|
||||
; R0.b0 has CRC status
|
||||
MOV SCRATCH.b0, R0.b0
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET + 1, 3
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
QBBS ENDAT_SKIP14A_RTU_CH0, SCRATCH.b0, 0 ; pos/data CRC check
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
ZERO &R15, 8
|
||||
@ -765,11 +766,12 @@ ENDAT_SKIP14E_RTU_CH0:
|
||||
ZERO &R18, 4
|
||||
ENDAT_SKIP14C_RTU_CH0:
|
||||
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &R15, R14, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH0_CRC_STATUS_OFFSET, 1
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU") ;ch1 store encoder response and crc in DMEM
|
||||
MOV SCRATCH.b0, R0.b0
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET + 1, 3
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
QBBS ENDAT_SKIP14A_PRU_CH1, SCRATCH.b0, 0 ; pos/data CRC check
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
ZERO &R15, 8
|
||||
@ -787,11 +789,12 @@ ENDAT_SKIP14E_PRU_CH1:
|
||||
ZERO &R18, 4
|
||||
ENDAT_SKIP14C_PRU_CH1:
|
||||
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &R15, R14, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH1_CRC_STATUS_OFFSET, 1
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU");ch2 store encoder response and crc in DMEM
|
||||
MOV SCRATCH.b0, R0.b0
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET + 1, 3
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
QBBS ENDAT_SKIP14A_TXPRU_CH2, SCRATCH.b0, 0 ; pos/data CRC check
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
ZERO &R15, 8
|
||||
@ -809,15 +812,16 @@ ENDAT_SKIP14E_TXPRU_CH2:
|
||||
ZERO &R18, 4
|
||||
ENDAT_SKIP14C_TXPRU_CH2:
|
||||
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &R15, R14, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH2_CRC_STATUS_OFFSET, 1
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
|
||||
|
||||
.else ;store store encoder response and crc when load share mode is not enabled
|
||||
QBBC ENDAT_SKIP14_CH0, ENDAT_ENABLE_CHx, 0
|
||||
; R0.b0 has CRC status
|
||||
MOV SCRATCH.b0, R0.b0
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET + 1, 3
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
QBBS ENDAT_SKIP14A_CH0, SCRATCH.b0, 0 ; pos/data CRC check
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
ZERO &R15, 8
|
||||
@ -835,8 +839,9 @@ ENDAT_SKIP14E_CH0:
|
||||
ZERO &R18, 4
|
||||
ENDAT_SKIP14C_CH0:
|
||||
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &R15, R14, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH0_CRC_STATUS_OFFSET, 1
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
ENDAT_SKIP14_CH0:
|
||||
|
||||
QBBC ENDAT_SKIP14_CH1, ENDAT_ENABLE_CHx, 1
|
||||
@ -846,7 +851,7 @@ ENDAT_SKIP14_CH0:
|
||||
.else
|
||||
MOV SCRATCH.b0, R0.b0
|
||||
.endif
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET + 1, 3
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
QBBS ENDAT_SKIP14A_CH1, SCRATCH.b0, 0 ; pos/data CRC check
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
@ -876,11 +881,12 @@ ENDAT_SKIP14E_CH1:
|
||||
.endif
|
||||
ENDAT_SKIP14C_CH1:
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
SBCO &R19, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBBO &R19, R14, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 16
|
||||
.else
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBBO &R15, R14, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 16
|
||||
.endif
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH1_CRC_STATUS_OFFSET, 1
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
ENDAT_SKIP14_CH1:
|
||||
|
||||
QBBC ENDAT_SKIP14_CH2, ENDAT_ENABLE_CHx, 2
|
||||
@ -890,7 +896,7 @@ ENDAT_SKIP14_CH1:
|
||||
.else
|
||||
MOV SCRATCH.b0, R0.b0
|
||||
.endif
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET + 1, 3
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
QBBS ENDAT_SKIP14A_CH2, SCRATCH.b0, 0 ; pos/data CRC check
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
@ -920,11 +926,12 @@ ENDAT_SKIP14E_CH2:
|
||||
.endif
|
||||
ENDAT_SKIP14C_CH2:
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
SBCO &R23, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBBO &R23, R14, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 16
|
||||
.else
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 16
|
||||
SBBO &R15, R14, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 16
|
||||
.endif
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH2_CRC_STATUS_OFFSET, 1
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
ENDAT_SKIP14_CH2:
|
||||
.endif
|
||||
|
||||
@ -965,6 +972,8 @@ M_CALC_RECOV_TIME_MULTI_CH .macro
|
||||
;enable PRU cycle counter
|
||||
M_ENABLE_PRU_CYCLE_COUNTER
|
||||
ZERO &R14, 4
|
||||
;Load memory base address
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CONFIG_CH_INFO_MEMORY_ADDRESS, 4
|
||||
; waiting for raising edge of clock for all connected channels
|
||||
ENDAT_TD_LAST_RISING_CLOCK_MULTI_CH?:
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_TXCFG ;read clcok_status
|
||||
@ -982,7 +991,7 @@ W_RX_MULTI?:
|
||||
LBCO &R27, ICSS_CFG, SCRATCH1.w0, 4
|
||||
QBBS ENDAT_SKIP_MULTI_WRX_CH0?, R27, 28
|
||||
LBCO &R27, c11, PRUx_CNTL_CYCLE_COUNT_OFFSET, 4
|
||||
SBCO &R27, PRUx_DMEM, ENDAT_CH0_RT_OFFSET, 4
|
||||
SBBO &R27, SCRATCH, ENDAT_CH0_RT_OFFSET, 4
|
||||
SET R28.b1, R28.b1, 0
|
||||
ENDAT_SKIP_MULTI_WRX_CH0?:
|
||||
|
||||
@ -993,7 +1002,7 @@ ENDAT_SKIP_MULTI_WRX_CH0?:
|
||||
LBCO &R27, ICSS_CFG, SCRATCH1.w0, 4
|
||||
QBBS ENDAT_SKIP_MULTI_WRX_CH1?, R27, 28
|
||||
LBCO &R27, c11, PRUx_CNTL_CYCLE_COUNT_OFFSET, 4
|
||||
SBCO &R27, PRUx_DMEM, ENDAT_CH1_RT_OFFSET, 4
|
||||
SBBO &R27, SCRATCH, ENDAT_CH1_RT_OFFSET, 4
|
||||
SET R28.b1, R28.b1, 1
|
||||
ENDAT_SKIP_MULTI_WRX_CH1?:
|
||||
;ch2 waiting for RX complete
|
||||
@ -1003,7 +1012,7 @@ ENDAT_SKIP_MULTI_WRX_CH1?:
|
||||
LBCO &R27, ICSS_CFG, SCRATCH1.w0, 4
|
||||
QBBS ENDAT_SKIP_MULTI_WRX_CH2?, R27, 28
|
||||
LBCO &R27, c11, PRUx_CNTL_CYCLE_COUNT_OFFSET, 4
|
||||
SBCO &R27, PRUx_DMEM, ENDAT_CH2_RT_OFFSET, 4
|
||||
SBBO &R27, SCRATCH, ENDAT_CH2_RT_OFFSET, 4
|
||||
SET R28.b1, R28.b1, 2
|
||||
ENDAT_SKIP_MULTI_WRX_CH2?:
|
||||
AND R28.b0, R28.b1, ENDAT_ENABLE_CHx_IN_USE
|
||||
@ -1235,7 +1244,9 @@ WRXCH0?:
|
||||
|
||||
LBCO &R27, c11, PRUx_CNTL_CYCLE_COUNT_OFFSET, 4
|
||||
; store in DMEM
|
||||
SBCO &R27, PRUx_DMEM, ENDAT_CH0_RT_OFFSET, 4
|
||||
;Load memory address
|
||||
LBCO &R14, PRUx_DMEM, ENDAT_CONFIG_CH_INFO_MEMORY_ADDRESS, 4
|
||||
SBBO &R27, R14, ENDAT_CH0_RT_OFFSET, 4
|
||||
|
||||
.endm
|
||||
;macro for channel 1
|
||||
@ -1260,8 +1271,10 @@ WRXCH1?:
|
||||
; read pru counter at time when rx start
|
||||
LBCO &R27, c11, PRUx_CNTL_CYCLE_COUNT_OFFSET, 4
|
||||
|
||||
;Load memory address
|
||||
LBCO &R14, PRUx_DMEM, ENDAT_CONFIG_CH_INFO_MEMORY_ADDRESS, 4
|
||||
; store in DMEM
|
||||
SBCO &R27, PRUx_DMEM, ENDAT_CH1_RT_OFFSET, 4
|
||||
SBBO &R27, R14, ENDAT_CH1_RT_OFFSET, 4
|
||||
|
||||
.endm
|
||||
;macro for ch2
|
||||
@ -1297,7 +1310,9 @@ WRXCH2?:
|
||||
.endif
|
||||
|
||||
; store in DMEM
|
||||
SBCO &R27, PRUx_DMEM, ENDAT_CH2_RT_OFFSET, 4
|
||||
;Load memory address
|
||||
LBCO &R14, PRUx_DMEM, ENDAT_CONFIG_CH_INFO_MEMORY_ADDRESS, 4
|
||||
SBBO &R27, R14, ENDAT_CH2_RT_OFFSET, 4
|
||||
.endm
|
||||
|
||||
;macro for RT
|
||||
@ -1578,57 +1593,70 @@ ENDAT_SKIP35_CH1:
|
||||
CLR R30.b3, R30.b3.t2 ; disable rx
|
||||
ENDAT_SKIP35_CH2:
|
||||
.endif
|
||||
|
||||
|
||||
|
||||
;load memory address inot R14
|
||||
LBCO &R14, PRUx_DMEM, ENDAT_CONFIG_CH_INFO_MEMORY_ADDRESS, 4
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
LBBO &SCRATCH.b0, R14, ENDAT_CH0_CRC_STATUS_OFFSET, 1
|
||||
QBBC ENDAT_RTU_SKIP36A_CH0, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &R15, R14, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH0_CRC_STATUS_OFFSET, 1
|
||||
ENDAT_RTU_SKIP36A_CH0:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH0_CRC_STATUS_OFFSET, 1
|
||||
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
LBBO &SCRATCH.b0, R14, ENDAT_CH1_CRC_STATUS_OFFSET, 1
|
||||
QBBC ENDAT_PRU_SKIP36A_CH1, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &R15, R14, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH1_CRC_STATUS_OFFSET, 1
|
||||
ENDAT_PRU_SKIP36A_CH1:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH1_CRC_STATUS_OFFSET, 1
|
||||
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
LBBO &SCRATCH.b0, R14, ENDAT_CH2_CRC_STATUS_OFFSET, 1
|
||||
QBBC ENDAT_TX_SKIP36A_CH2, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
|
||||
SBBO &R15, R14, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH2_CRC_STATUS_OFFSET, 1
|
||||
ENDAT_TX_SKIP36A_CH2:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH2_CRC_STATUS_OFFSET, 1
|
||||
.else
|
||||
; Update CRC status. Update i/f buffer iff CRC success, if failure increment error count
|
||||
QBBC ENDAT_SKIP36_CH0, ENDAT_ENABLE_CHx, 0
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
LBBO &SCRATCH.b0, R14, ENDAT_CH0_CRC_STATUS_OFFSET, 1
|
||||
QBBC ENDAT_SKIP36A_CH0, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBBO &R15, R14, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH0_CRC_STATUS_OFFSET, 1
|
||||
JMP ENDAT_SKIP36_CH0
|
||||
ENDAT_SKIP36A_CH0:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH0_CRC_STATUS_OFFSET, 1
|
||||
ENDAT_SKIP36_CH0:
|
||||
QBBC ENDAT_SKIP36_CH1, ENDAT_ENABLE_CHx, 1
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
LBBO &SCRATCH.b0, R14, ENDAT_CH1_CRC_STATUS_OFFSET, 1
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
QBBC ENDAT_SKIP36A_CH1, R0.b1, 0
|
||||
.else
|
||||
@ -1638,21 +1666,24 @@ ENDAT_SKIP36_CH0:
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
SBCO &R19, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBBO &R19, R14, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
.else
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBBO &R15, R14, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
.endif
|
||||
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH1_CRC_STATUS_OFFSET, 1
|
||||
JMP ENDAT_SKIP36_CH1
|
||||
ENDAT_SKIP36A_CH1:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH1_CRC_STATUS_OFFSET, 1
|
||||
ENDAT_SKIP36_CH1:
|
||||
|
||||
QBBC ENDAT_SKIP36_CH2, ENDAT_ENABLE_CHx, 2
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
LBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
LBBO &SCRATCH.b0, R14, ENDAT_CH2_CRC_STATUS_OFFSET, 1
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
QBBC ENDAT_SKIP36A_CH2, R0.b2, 0
|
||||
.else
|
||||
@ -1661,16 +1692,18 @@ ENDAT_SKIP36_CH1:
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
SBCO &R23, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBBO &R23, R14, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
.else
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBBO &R15, R14, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
.endif
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH2_CRC_STATUS_OFFSET, 1
|
||||
JMP ENDAT_SKIP36_CH2
|
||||
ENDAT_SKIP36A_CH2:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
SBCO &SCRATCH.b1, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 3
|
||||
SBBO &SCRATCH.b0, R14, ENDAT_CH2_CRC_STATUS_OFFSET, 1
|
||||
ENDAT_SKIP36_CH2:
|
||||
|
||||
.endif
|
||||
|
||||
@ -12,121 +12,121 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x51000502,
|
||||
0x21000d00,
|
||||
0x24000105,
|
||||
0x2304309d,
|
||||
0x23044d9d,
|
||||
0x24005480,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023f9d,
|
||||
0x91b03880,
|
||||
0x23042bdd,
|
||||
0x2302539d,
|
||||
0x91883880,
|
||||
0x230448dd,
|
||||
0x24721d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x23042bdd,
|
||||
0x2302539d,
|
||||
0x91843880,
|
||||
0x230448dd,
|
||||
0x24003880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x23042bdd,
|
||||
0x2302539d,
|
||||
0x91843880,
|
||||
0x230448dd,
|
||||
0x24023880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x23042bdd,
|
||||
0x2302539d,
|
||||
0x91843880,
|
||||
0x230448dd,
|
||||
0x24421d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x23042bdd,
|
||||
0x2302539d,
|
||||
0x91843880,
|
||||
0x230448dd,
|
||||
0x241a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023f9d,
|
||||
0x2302539d,
|
||||
0x0903efef,
|
||||
0xc9000502,
|
||||
0x8144182f,
|
||||
0x8130182f,
|
||||
0xc9010502,
|
||||
0x8164182f,
|
||||
0x8140182f,
|
||||
0xc9020502,
|
||||
0x8184182f,
|
||||
0x91a83880,
|
||||
0x23042bdd,
|
||||
0x8150182f,
|
||||
0x91803880,
|
||||
0x230448dd,
|
||||
0x244a1d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x23042bdd,
|
||||
0x2302539d,
|
||||
0x91843880,
|
||||
0x230448dd,
|
||||
0x240a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023f9d,
|
||||
0x2302539d,
|
||||
0x0903efef,
|
||||
0xc9000502,
|
||||
0x8145182f,
|
||||
0x8131182f,
|
||||
0xc9010502,
|
||||
0x8165182f,
|
||||
0x8141182f,
|
||||
0xc9020502,
|
||||
0x8185182f,
|
||||
0x91ac3880,
|
||||
0x23042bdd,
|
||||
0x8151182f,
|
||||
0x91843880,
|
||||
0x230448dd,
|
||||
0x24000180,
|
||||
0x2403bfc0,
|
||||
0x24271081,
|
||||
0x23048d9d,
|
||||
0x2304aa9d,
|
||||
0xc9000504,
|
||||
0x24080083,
|
||||
0x240518c3,
|
||||
0x91441822,
|
||||
0x91301822,
|
||||
0xc9010504,
|
||||
0x24090183,
|
||||
0x240d19c3,
|
||||
0x91641822,
|
||||
0x91401822,
|
||||
0xc9020504,
|
||||
0x240a0283,
|
||||
0x24151ac3,
|
||||
0x91841822,
|
||||
0x2304989d,
|
||||
0x91501822,
|
||||
0x2304b59d,
|
||||
0xc9000502,
|
||||
0x81483889,
|
||||
0x81343889,
|
||||
0xc9010502,
|
||||
0x81683889,
|
||||
0x81443889,
|
||||
0xc9020502,
|
||||
0x81883889,
|
||||
0x91905880,
|
||||
0x81543889,
|
||||
0x91685880,
|
||||
0x6900e004,
|
||||
0x24000280,
|
||||
0x240017c0,
|
||||
0x2400fa81,
|
||||
0x23048d9d,
|
||||
0x2304aa9d,
|
||||
0x24000020,
|
||||
0xc9000502,
|
||||
0x91441800,
|
||||
0x91301800,
|
||||
0xc9010502,
|
||||
0x91641800,
|
||||
0x91401800,
|
||||
0xc9020502,
|
||||
0x91841800,
|
||||
0x91501800,
|
||||
0x51000002,
|
||||
0x24000100,
|
||||
0x81031800,
|
||||
@ -141,16 +141,17 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x91021800,
|
||||
0xcf0000ff,
|
||||
0xc9070003,
|
||||
0x2300cc9d,
|
||||
0x2100c500,
|
||||
0x2300d09d,
|
||||
0x2100c900,
|
||||
0x910c7880,
|
||||
0x23023f9d,
|
||||
0x2302539d,
|
||||
0xd1004103,
|
||||
0x91143881,
|
||||
0x2302339d,
|
||||
0xc9000510,
|
||||
0x2302479d,
|
||||
0x9160388e,
|
||||
0xc9000511,
|
||||
0x10000004,
|
||||
0x91413824,
|
||||
0x91383824,
|
||||
0xd1000403,
|
||||
0x01012424,
|
||||
0x2eff838f,
|
||||
@ -162,11 +163,12 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xd1020403,
|
||||
0x01016464,
|
||||
0x2eff8192,
|
||||
0x8130f88f,
|
||||
0x81403884,
|
||||
0xc9010510,
|
||||
0xe100ee8f,
|
||||
0xe1100e04,
|
||||
0x81383824,
|
||||
0xc9010511,
|
||||
0x10000004,
|
||||
0x91613824,
|
||||
0x91483824,
|
||||
0xd1000403,
|
||||
0x01012424,
|
||||
0x2eff838f,
|
||||
@ -178,11 +180,12 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xd1020403,
|
||||
0x01016464,
|
||||
0x2eff8192,
|
||||
0x8150f88f,
|
||||
0x81603884,
|
||||
0xc9020510,
|
||||
0xe118ee8f,
|
||||
0xe1280e04,
|
||||
0x81483824,
|
||||
0xc9020511,
|
||||
0x10000004,
|
||||
0x91813824,
|
||||
0x91583824,
|
||||
0xd1000403,
|
||||
0x01012424,
|
||||
0x2eff838f,
|
||||
@ -194,14 +197,15 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xd1020403,
|
||||
0x01016464,
|
||||
0x2eff8192,
|
||||
0x8170f88f,
|
||||
0x81803884,
|
||||
0xe130ee8f,
|
||||
0xe1400e04,
|
||||
0x81583824,
|
||||
0x24000083,
|
||||
0x81021803,
|
||||
0x91001804,
|
||||
0x69000402,
|
||||
0x2400229f,
|
||||
0x570004b9,
|
||||
0x570004b5,
|
||||
0x21008b00,
|
||||
0x910c7880,
|
||||
0xc9000502,
|
||||
@ -213,7 +217,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x1000001e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x2301b5dd,
|
||||
0x2301c6dd,
|
||||
0x240000cf,
|
||||
0x2400008f,
|
||||
0x240000d0,
|
||||
@ -244,7 +248,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100f800,
|
||||
0x2100fc00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -259,7 +263,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21010700,
|
||||
0x21010b00,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -275,17 +279,17 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011700,
|
||||
0x21011b00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21013e00,
|
||||
0x21014200,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21012100,
|
||||
0x21012500,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -302,7 +306,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21013200,
|
||||
0x21013600,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -313,13 +317,13 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21013d00,
|
||||
0x21014100,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b2c,
|
||||
0xc9001b2b,
|
||||
0xc900050e,
|
||||
0x51001b2f,
|
||||
0xc9001b2e,
|
||||
0xc900050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -332,8 +336,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0xc901050e,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0xc901050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -346,8 +351,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0xc902050e,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0xc902050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -360,7 +366,8 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -374,7 +381,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21017900,
|
||||
0x21018000,
|
||||
0x1f000000,
|
||||
0xc9000502,
|
||||
0x1d007e7e,
|
||||
@ -382,36 +389,46 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x1d017e7e,
|
||||
0xc9020502,
|
||||
0x1d027e7e,
|
||||
0xc900050a,
|
||||
0x91403884,
|
||||
0xc900e005,
|
||||
0x9160388e,
|
||||
0xc900050d,
|
||||
0x91383824,
|
||||
0xf1100e04,
|
||||
0xc900e006,
|
||||
0x1f000404,
|
||||
0x8130788f,
|
||||
0x81403884,
|
||||
0x21018900,
|
||||
0xe1006e8f,
|
||||
0x81383824,
|
||||
0xe1100e04,
|
||||
0x21019400,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81403884,
|
||||
0xc901050a,
|
||||
0x91603884,
|
||||
0xc9000005,
|
||||
0x81383824,
|
||||
0xe1100e04,
|
||||
0xc901050d,
|
||||
0x91483824,
|
||||
0xf1280e04,
|
||||
0xc9000006,
|
||||
0x1f000404,
|
||||
0x8150788f,
|
||||
0x81603884,
|
||||
0x21019300,
|
||||
0xe1186e8f,
|
||||
0x81483824,
|
||||
0xe1280e04,
|
||||
0x2101a100,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81603884,
|
||||
0xc902050a,
|
||||
0x91803884,
|
||||
0xc9000005,
|
||||
0x81483824,
|
||||
0xe1280e04,
|
||||
0xc902050d,
|
||||
0x91583824,
|
||||
0xf1400e04,
|
||||
0xc9000006,
|
||||
0x1f000404,
|
||||
0x8170788f,
|
||||
0x81803884,
|
||||
0x21019d00,
|
||||
0xe1306e8f,
|
||||
0x81583824,
|
||||
0xe1400e04,
|
||||
0x2101ae00,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81803884,
|
||||
0x81583824,
|
||||
0xe1400e04,
|
||||
0x24010e8d,
|
||||
0x908d0480,
|
||||
0x0b028080,
|
||||
@ -424,7 +441,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc9020502,
|
||||
0x1f027e7e,
|
||||
0x91021800,
|
||||
0xd707002e,
|
||||
0xd7070021,
|
||||
0x1f13ffff,
|
||||
0xc9000503,
|
||||
0x1d007e7e,
|
||||
@ -443,7 +460,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x12010202,
|
||||
0x2401098d,
|
||||
0x808d0402,
|
||||
0x914618c4,
|
||||
0x913218c4,
|
||||
0x04c4a284,
|
||||
0x24010a8d,
|
||||
0x808d0484,
|
||||
@ -454,7 +471,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x12010202,
|
||||
0x2401118d,
|
||||
0x808d0402,
|
||||
0x916618c4,
|
||||
0x914218c4,
|
||||
0x04c4a284,
|
||||
0x2401128d,
|
||||
0x808d0484,
|
||||
@ -465,7 +482,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x12010202,
|
||||
0x2401198d,
|
||||
0x808d0402,
|
||||
0x918618c4,
|
||||
0x915218c4,
|
||||
0x04c4a284,
|
||||
0x24011a8d,
|
||||
0x808d0484,
|
||||
@ -504,7 +521,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc9020502,
|
||||
0xd70762f9,
|
||||
0x1f12ffff,
|
||||
0xc9000513,
|
||||
0xc9000514,
|
||||
0x111c1f1c,
|
||||
0x6f001cff,
|
||||
0x2401088d,
|
||||
@ -522,8 +539,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0xc9010513,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0xc9010514,
|
||||
0x111c3f1c,
|
||||
0x6f001cff,
|
||||
0x2401108d,
|
||||
@ -541,8 +559,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0xc9020513,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0xc9020514,
|
||||
0x111c5f1c,
|
||||
0x6f001cff,
|
||||
0x2401188d,
|
||||
@ -560,7 +579,8 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x20dd0000,
|
||||
0xc9000502,
|
||||
0x240018de,
|
||||
@ -572,7 +592,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x1001011e,
|
||||
0x1021211e,
|
||||
0x1041411e,
|
||||
0x2301e0dd,
|
||||
0x2301f1dd,
|
||||
0x209d0000,
|
||||
0xc9004108,
|
||||
0xc9000502,
|
||||
@ -581,7 +601,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x240009de,
|
||||
0xc9020502,
|
||||
0x24000ade,
|
||||
0x21024d00,
|
||||
0x21026100,
|
||||
0xc9000502,
|
||||
0x240000de,
|
||||
0xc9010502,
|
||||
@ -595,7 +615,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x1060601e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x2301b5dd,
|
||||
0x2301c6dd,
|
||||
0x2eff818f,
|
||||
0x2eff8190,
|
||||
0xc9000503,
|
||||
@ -632,7 +652,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21027c00,
|
||||
0x21029000,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -647,7 +667,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21028b00,
|
||||
0x21029f00,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -663,17 +683,17 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21029b00,
|
||||
0x2102af00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x2102c200,
|
||||
0x2102d600,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102a500,
|
||||
0x2102b900,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -690,7 +710,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102b600,
|
||||
0x2102ca00,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -701,13 +721,13 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102c100,
|
||||
0x2102d500,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b2c,
|
||||
0xc9001b2b,
|
||||
0xc900050e,
|
||||
0x51001b2f,
|
||||
0xc9001b2e,
|
||||
0xc900050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -720,8 +740,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0xc901050e,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0xc901050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -734,8 +755,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0xc902050e,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0xc902050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -748,7 +770,8 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -762,9 +785,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x2102fd00,
|
||||
0x21031400,
|
||||
0x1f000000,
|
||||
0x53000225,
|
||||
0x5300022b,
|
||||
0x24001da2,
|
||||
0x240101cc,
|
||||
0x2401018c,
|
||||
@ -779,7 +802,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21030f00,
|
||||
0x21032600,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -794,7 +817,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21031e00,
|
||||
0x21033500,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -810,17 +833,17 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21032e00,
|
||||
0x21034500,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21035500,
|
||||
0x21036c00,
|
||||
0x3062000e,
|
||||
0x0901f1f1,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21033800,
|
||||
0x21034f00,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -837,7 +860,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21034900,
|
||||
0x21036000,
|
||||
0x1301f1f1,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -848,13 +871,13 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21035400,
|
||||
0x21036b00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b2c,
|
||||
0xc9011b2b,
|
||||
0xc900050e,
|
||||
0x51001b2f,
|
||||
0xc9011b2e,
|
||||
0xc900050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -867,8 +890,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0xc901050e,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0xc901050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -881,8 +905,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0xc902050e,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0xc902050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -895,7 +920,8 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -909,9 +935,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d010000,
|
||||
0x21039000,
|
||||
0x2103aa00,
|
||||
0x1f010000,
|
||||
0x69180292,
|
||||
0x69180295,
|
||||
0x240101cc,
|
||||
0x2401018c,
|
||||
0x24000143,
|
||||
@ -925,7 +951,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2103a100,
|
||||
0x2103bb00,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -940,7 +966,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2103b000,
|
||||
0x2103ca00,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -956,17 +982,17 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2103c000,
|
||||
0x2103da00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x2103e700,
|
||||
0x21040100,
|
||||
0x3062000e,
|
||||
0x0901f2f2,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2103ca00,
|
||||
0x2103e400,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -983,7 +1009,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2103db00,
|
||||
0x2103f500,
|
||||
0x1301f2f2,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -994,13 +1020,13 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2103e600,
|
||||
0x21040000,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b2c,
|
||||
0xc9021b2b,
|
||||
0xc900050e,
|
||||
0x51001b2f,
|
||||
0xc9021b2e,
|
||||
0xc900050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -1013,8 +1039,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0xc901050e,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0xc901050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -1027,8 +1054,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0xc902050e,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0xc902050f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -1041,7 +1069,8 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -1055,7 +1084,7 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d020000,
|
||||
0x21042200,
|
||||
0x21043f00,
|
||||
0x1f020000,
|
||||
0xc9004108,
|
||||
0x1f13ffff,
|
||||
@ -1085,8 +1114,8 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x808d0400,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91b83880,
|
||||
0x23042bdd,
|
||||
0x91903880,
|
||||
0x230448dd,
|
||||
0x24002000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
@ -1094,8 +1123,8 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x808d0400,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91983880,
|
||||
0x23042bdd,
|
||||
0x91703880,
|
||||
0x230448dd,
|
||||
0x24006000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
@ -1103,8 +1132,8 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x808d0400,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91b43880,
|
||||
0x23042bdd,
|
||||
0x918c3880,
|
||||
0x230448dd,
|
||||
0x24000000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
@ -1179,11 +1208,11 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x130803de,
|
||||
0x24000e1e,
|
||||
0xc9000502,
|
||||
0x91441822,
|
||||
0x91301822,
|
||||
0xc9010502,
|
||||
0x91641822,
|
||||
0x91401822,
|
||||
0xc9020502,
|
||||
0x91841822,
|
||||
0x91501822,
|
||||
0x24000042,
|
||||
0x0106a2a2,
|
||||
0x0906a280,
|
||||
@ -1191,9 +1220,9 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x04a280a2,
|
||||
0x24003801,
|
||||
0x24000141,
|
||||
0x2301b5dd,
|
||||
0x91a03880,
|
||||
0x23042bdd,
|
||||
0x2301c6dd,
|
||||
0x91783880,
|
||||
0x230448dd,
|
||||
0x2401048d,
|
||||
0x908d0480,
|
||||
0xce2380fe,
|
||||
@ -1201,10 +1230,10 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x810c2b80,
|
||||
0x69000303,
|
||||
0x2401088d,
|
||||
0x2104b800,
|
||||
0x2104d500,
|
||||
0x69010303,
|
||||
0x2401108d,
|
||||
0x2104b800,
|
||||
0x2104d500,
|
||||
0x69020302,
|
||||
0x2401188d,
|
||||
0x908d2480,
|
||||
@ -1212,18 +1241,18 @@ const uint32_t EnDatFirmware_0[] = {
|
||||
0x910c2b80,
|
||||
0x2400007e,
|
||||
0x00e0e9e9,
|
||||
0x91a43880,
|
||||
0x23042bdd,
|
||||
0x917c3880,
|
||||
0x230448dd,
|
||||
0x1f13ffff,
|
||||
0xd063ff00,
|
||||
0x91a83880,
|
||||
0x23042bdd,
|
||||
0x91803880,
|
||||
0x230448dd,
|
||||
0x0101c8c8,
|
||||
0x6708c8d5,
|
||||
0x0b03e9e9,
|
||||
0x919c389b,
|
||||
0x9174389b,
|
||||
0x60fbe903,
|
||||
0x04fbe9e9,
|
||||
0x2104c700,
|
||||
0x2104e400,
|
||||
0x209d0000};
|
||||
|
||||
|
||||
@ -12,132 +12,132 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x51000502,
|
||||
0x21000d00,
|
||||
0x24000105,
|
||||
0x23032e9d,
|
||||
0x2303399d,
|
||||
0x24005480,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91b03880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91883880,
|
||||
0x230334dd,
|
||||
0x24721d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24003880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24023880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24421d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x241a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0x0903efef,
|
||||
0x8164182f,
|
||||
0x91a83880,
|
||||
0x230329dd,
|
||||
0x8140182f,
|
||||
0x91803880,
|
||||
0x230334dd,
|
||||
0x244a1d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x240a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0x0903efef,
|
||||
0x8165182f,
|
||||
0x8141182f,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x8196180e,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24000180,
|
||||
0x2403bfc0,
|
||||
0x24271081,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9014e02,
|
||||
0x2303989d,
|
||||
0x2303a39d,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x24090183,
|
||||
0x240d19c3,
|
||||
0x91641822,
|
||||
0x2303a39d,
|
||||
0x81683889,
|
||||
0x91905880,
|
||||
0x91401822,
|
||||
0x2303ae9d,
|
||||
0x81443889,
|
||||
0x91685880,
|
||||
0x6900e004,
|
||||
0x24000280,
|
||||
0x240017c0,
|
||||
0x2400fa81,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9014e02,
|
||||
0x2303989d,
|
||||
0x2303a39d,
|
||||
0x24000020,
|
||||
0x91641800,
|
||||
0x91401800,
|
||||
0x51000002,
|
||||
0x24000100,
|
||||
0x81071800,
|
||||
@ -152,15 +152,16 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x91061800,
|
||||
0xcf0000ff,
|
||||
0xc9070003,
|
||||
0x2300b69d,
|
||||
0x2100af00,
|
||||
0x2300b89d,
|
||||
0x2100b100,
|
||||
0x91187880,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0xd1004103,
|
||||
0x91203881,
|
||||
0x23018f9d,
|
||||
0x2301979d,
|
||||
0x9160388e,
|
||||
0x10000004,
|
||||
0x91613824,
|
||||
0x91483824,
|
||||
0xd1000403,
|
||||
0x01012424,
|
||||
0x2eff838f,
|
||||
@ -172,23 +173,24 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xd1020403,
|
||||
0x01016464,
|
||||
0x2eff8192,
|
||||
0x8150f88f,
|
||||
0x81603884,
|
||||
0xe118ee8f,
|
||||
0xe1280e04,
|
||||
0x81483824,
|
||||
0x24000083,
|
||||
0x81061803,
|
||||
0x91041804,
|
||||
0x69000402,
|
||||
0x2400239f,
|
||||
0x570004da,
|
||||
0x570004d8,
|
||||
0x21009600,
|
||||
0x91187880,
|
||||
0x240011de,
|
||||
0x1000001e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x230163dd,
|
||||
0x23016add,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x240000cf,
|
||||
0x2400008f,
|
||||
0x240000d0,
|
||||
@ -212,7 +214,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100d800,
|
||||
0x2100da00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -227,7 +229,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100e700,
|
||||
0x2100e900,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -243,17 +245,17 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2100f700,
|
||||
0x2100f900,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21011e00,
|
||||
0x21012000,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21010100,
|
||||
0x21010300,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -270,7 +272,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011200,
|
||||
0x21011400,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -281,12 +283,12 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011d00,
|
||||
0x21011f00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9001b0e,
|
||||
0x51001b10,
|
||||
0xc9001b0f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -299,7 +301,8 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -313,17 +316,21 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21013c00,
|
||||
0x21013f00,
|
||||
0x1f000000,
|
||||
0x1d017e7e,
|
||||
0x91603884,
|
||||
0xc900e004,
|
||||
0x9160388e,
|
||||
0x91483824,
|
||||
0xf1280e04,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8150788f,
|
||||
0x81603884,
|
||||
0xe1186e8f,
|
||||
0x81483824,
|
||||
0xe1280e04,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81603884,
|
||||
0x81483824,
|
||||
0xe1280e04,
|
||||
0x24010e8d,
|
||||
0x908d0480,
|
||||
0x0b028080,
|
||||
@ -331,24 +338,24 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x10e0e0e0,
|
||||
0x1f017e7e,
|
||||
0x91061800,
|
||||
0xd7070070,
|
||||
0xd707006b,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9014e02,
|
||||
0x1f13ffff,
|
||||
0x1d017e7e,
|
||||
@ -360,7 +367,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x12010202,
|
||||
0x2401118d,
|
||||
0x808d0402,
|
||||
0x916618c4,
|
||||
0x914218c4,
|
||||
0x04c4a284,
|
||||
0x2401128d,
|
||||
0x808d0484,
|
||||
@ -396,18 +403,19 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0x20dd0000,
|
||||
0x240019de,
|
||||
0x2400011e,
|
||||
0x1001011e,
|
||||
0x1021211e,
|
||||
0x1041411e,
|
||||
0x230172dd,
|
||||
0x230179dd,
|
||||
0x209d0000,
|
||||
0xc9004103,
|
||||
0x240009de,
|
||||
0x21019a00,
|
||||
0x2101a200,
|
||||
0x240001de,
|
||||
0x1000001e,
|
||||
0x71082104,
|
||||
@ -416,9 +424,9 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x1060601e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x230163dd,
|
||||
0x23016add,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2eff818f,
|
||||
0x2eff8190,
|
||||
0x24001903,
|
||||
@ -448,7 +456,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101c400,
|
||||
0x2101cc00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -463,7 +471,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101d300,
|
||||
0x2101db00,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -479,17 +487,17 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101e300,
|
||||
0x2101eb00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21020a00,
|
||||
0x21021200,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101ed00,
|
||||
0x2101f500,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -506,7 +514,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101fe00,
|
||||
0x21020600,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -517,12 +525,12 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21020900,
|
||||
0x21021100,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9001b0e,
|
||||
0x51001b10,
|
||||
0xc9001b0f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -535,7 +543,8 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -549,9 +558,9 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21022800,
|
||||
0x21023100,
|
||||
0x1f000000,
|
||||
0x510002eb,
|
||||
0x510002ed,
|
||||
0x24001da2,
|
||||
0x240101cc,
|
||||
0x2401018c,
|
||||
@ -566,7 +575,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21023a00,
|
||||
0x21024300,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -581,7 +590,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21024900,
|
||||
0x21025200,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -597,17 +606,17 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21025900,
|
||||
0x21026200,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21028000,
|
||||
0x21028900,
|
||||
0x3062000e,
|
||||
0x0901f1f1,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21026300,
|
||||
0x21026c00,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -624,7 +633,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027400,
|
||||
0x21027d00,
|
||||
0x1301f1f1,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -635,12 +644,12 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027f00,
|
||||
0x21028800,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9011b0e,
|
||||
0x51001b10,
|
||||
0xc9011b0f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -653,7 +662,8 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -667,9 +677,9 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d010000,
|
||||
0x21029e00,
|
||||
0x2102a800,
|
||||
0x1f010000,
|
||||
0x69180275,
|
||||
0x69180276,
|
||||
0x240101cc,
|
||||
0x2401018c,
|
||||
0x24000143,
|
||||
@ -683,7 +693,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102af00,
|
||||
0x2102b900,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -698,7 +708,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102be00,
|
||||
0x2102c800,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -714,17 +724,17 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102ce00,
|
||||
0x2102d800,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x2102f500,
|
||||
0x2102ff00,
|
||||
0x3062000e,
|
||||
0x0901f2f2,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102d800,
|
||||
0x2102e200,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -741,7 +751,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102e900,
|
||||
0x2102f300,
|
||||
0x1301f2f2,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -752,12 +762,12 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102f400,
|
||||
0x2102fe00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9021b0e,
|
||||
0x51001b10,
|
||||
0xc9021b0f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -770,7 +780,8 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c4389b,
|
||||
0x9160388e,
|
||||
0xe12c2e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -784,26 +795,26 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d020000,
|
||||
0x21031300,
|
||||
0x21031e00,
|
||||
0x1f020000,
|
||||
0xc9004115,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9014e02,
|
||||
0x1f13ffff,
|
||||
0xd10dff00,
|
||||
@ -814,66 +825,66 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x4ee2e0ff,
|
||||
0x20dd0000,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9014e02,
|
||||
0x1f13ffff,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0xd10dff00,
|
||||
0x24006000,
|
||||
0x2401138d,
|
||||
0x808d0400,
|
||||
0x91b83880,
|
||||
0x230329dd,
|
||||
0x91903880,
|
||||
0x230334dd,
|
||||
0x24002000,
|
||||
0x2401138d,
|
||||
0x808d0400,
|
||||
0x91983880,
|
||||
0x230329dd,
|
||||
0x91703880,
|
||||
0x230334dd,
|
||||
0x24006000,
|
||||
0x2401138d,
|
||||
0x808d0400,
|
||||
0x91b43880,
|
||||
0x230329dd,
|
||||
0x918c3880,
|
||||
0x230334dd,
|
||||
0x24000000,
|
||||
0x2401138d,
|
||||
0x808d0400,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9014e02,
|
||||
0x1f13ffff,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0xd10dff00,
|
||||
0x240011de,
|
||||
0x2400001e,
|
||||
@ -886,26 +897,26 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x1f1cffff,
|
||||
0x1d19fefe,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9014e02,
|
||||
0x1f13ffff,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0xd10dff00,
|
||||
0x209d0000,
|
||||
0x24000081,
|
||||
@ -933,7 +944,7 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x2eff82c8,
|
||||
0x130803de,
|
||||
0x24000e1e,
|
||||
0x91641822,
|
||||
0x91401822,
|
||||
0x24000042,
|
||||
0x0106a2a2,
|
||||
0x0906a280,
|
||||
@ -941,9 +952,9 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x04a280a2,
|
||||
0x24003801,
|
||||
0x24000141,
|
||||
0x230163dd,
|
||||
0x91a03880,
|
||||
0x230329dd,
|
||||
0x23016add,
|
||||
0x91783880,
|
||||
0x230334dd,
|
||||
0x2401048d,
|
||||
0x908d0480,
|
||||
0xce2380fe,
|
||||
@ -955,38 +966,38 @@ const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x910c2b80,
|
||||
0x2400007e,
|
||||
0x00e0e9e9,
|
||||
0x91a43880,
|
||||
0x230329dd,
|
||||
0x917c3880,
|
||||
0x230334dd,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9014e02,
|
||||
0x1f13ffff,
|
||||
0xd063ff00,
|
||||
0x91a83880,
|
||||
0x230329dd,
|
||||
0x91803880,
|
||||
0x230334dd,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x8196180e,
|
||||
0x0101c8c8,
|
||||
0x6708c8cd,
|
||||
0x0b03e9e9,
|
||||
0x919c389b,
|
||||
0x9174389b,
|
||||
0x60fbe903,
|
||||
0x04fbe9e9,
|
||||
0x2103da00,
|
||||
0x2103e500,
|
||||
0x209d0000};
|
||||
|
||||
|
||||
@ -12,132 +12,132 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x51000502,
|
||||
0x21000d00,
|
||||
0x24000105,
|
||||
0x23032e9d,
|
||||
0x2303399d,
|
||||
0x24005480,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91b03880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91883880,
|
||||
0x230334dd,
|
||||
0x24721d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24003880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24023880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24421d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x241a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0x0903efef,
|
||||
0x8144182f,
|
||||
0x91a83880,
|
||||
0x230329dd,
|
||||
0x8130182f,
|
||||
0x91803880,
|
||||
0x230334dd,
|
||||
0x244a1d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x240a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0x0903efef,
|
||||
0x8145182f,
|
||||
0x8131182f,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x8195180e,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24000180,
|
||||
0x2403bfc0,
|
||||
0x24271081,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9004e02,
|
||||
0x2303989d,
|
||||
0x2303a39d,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x24080083,
|
||||
0x240518c3,
|
||||
0x91441822,
|
||||
0x2303a39d,
|
||||
0x81483889,
|
||||
0x91905880,
|
||||
0x91301822,
|
||||
0x2303ae9d,
|
||||
0x81343889,
|
||||
0x91685880,
|
||||
0x6900e004,
|
||||
0x24000280,
|
||||
0x240017c0,
|
||||
0x2400fa81,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9004e02,
|
||||
0x2303989d,
|
||||
0x2303a39d,
|
||||
0x24000020,
|
||||
0x91441800,
|
||||
0x91301800,
|
||||
0x51000002,
|
||||
0x24000100,
|
||||
0x81031800,
|
||||
@ -152,15 +152,16 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x91021800,
|
||||
0xcf0000ff,
|
||||
0xc9070003,
|
||||
0x2300b69d,
|
||||
0x2100af00,
|
||||
0x2300b89d,
|
||||
0x2100b100,
|
||||
0x910c7880,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0xd1004103,
|
||||
0x91143881,
|
||||
0x23018f9d,
|
||||
0x2301979d,
|
||||
0x9160388e,
|
||||
0x10000004,
|
||||
0x91413824,
|
||||
0x91383824,
|
||||
0xd1000403,
|
||||
0x01012424,
|
||||
0x2eff838f,
|
||||
@ -172,23 +173,24 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xd1020403,
|
||||
0x01016464,
|
||||
0x2eff8192,
|
||||
0x8130f88f,
|
||||
0x81403884,
|
||||
0xe100ee8f,
|
||||
0xe1100e04,
|
||||
0x81383824,
|
||||
0x24000083,
|
||||
0x81021803,
|
||||
0x91001804,
|
||||
0x69000402,
|
||||
0x2400229f,
|
||||
0x570004da,
|
||||
0x570004d8,
|
||||
0x21009600,
|
||||
0x910c7880,
|
||||
0x240010de,
|
||||
0x1000001e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x230163dd,
|
||||
0x23016add,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x240000cf,
|
||||
0x2400008f,
|
||||
0x240000d0,
|
||||
@ -212,7 +214,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100d800,
|
||||
0x2100da00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -227,7 +229,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100e700,
|
||||
0x2100e900,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -243,17 +245,17 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2100f700,
|
||||
0x2100f900,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21011e00,
|
||||
0x21012000,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21010100,
|
||||
0x21010300,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -270,7 +272,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011200,
|
||||
0x21011400,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -281,12 +283,12 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011d00,
|
||||
0x21011f00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9001b0e,
|
||||
0x51001b10,
|
||||
0xc9001b0f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -299,7 +301,8 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -313,17 +316,21 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21013c00,
|
||||
0x21013f00,
|
||||
0x1f000000,
|
||||
0x1d007e7e,
|
||||
0x91403884,
|
||||
0xc900e004,
|
||||
0x9160388e,
|
||||
0x91383824,
|
||||
0xf1100e04,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8130788f,
|
||||
0x81403884,
|
||||
0xe1006e8f,
|
||||
0x81383824,
|
||||
0xe1100e04,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81403884,
|
||||
0x81383824,
|
||||
0xe1100e04,
|
||||
0x24010e8d,
|
||||
0x908d0480,
|
||||
0x0b028080,
|
||||
@ -331,24 +338,24 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x10e0e0e0,
|
||||
0x1f007e7e,
|
||||
0x91021800,
|
||||
0xd7070070,
|
||||
0xd707006b,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9004e02,
|
||||
0x1f13ffff,
|
||||
0x1d007e7e,
|
||||
@ -360,7 +367,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x12010202,
|
||||
0x2401098d,
|
||||
0x808d0402,
|
||||
0x914618c4,
|
||||
0x913218c4,
|
||||
0x04c4a284,
|
||||
0x24010a8d,
|
||||
0x808d0484,
|
||||
@ -396,18 +403,19 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0x20dd0000,
|
||||
0x240018de,
|
||||
0x2400011e,
|
||||
0x1001011e,
|
||||
0x1021211e,
|
||||
0x1041411e,
|
||||
0x230172dd,
|
||||
0x230179dd,
|
||||
0x209d0000,
|
||||
0xc9004103,
|
||||
0x240008de,
|
||||
0x21019a00,
|
||||
0x2101a200,
|
||||
0x240000de,
|
||||
0x1000001e,
|
||||
0x71082104,
|
||||
@ -416,9 +424,9 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x1060601e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x230163dd,
|
||||
0x23016add,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2eff818f,
|
||||
0x2eff8190,
|
||||
0x24001803,
|
||||
@ -448,7 +456,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101c400,
|
||||
0x2101cc00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -463,7 +471,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101d300,
|
||||
0x2101db00,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -479,17 +487,17 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101e300,
|
||||
0x2101eb00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21020a00,
|
||||
0x21021200,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101ed00,
|
||||
0x2101f500,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -506,7 +514,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101fe00,
|
||||
0x21020600,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -517,12 +525,12 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21020900,
|
||||
0x21021100,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9001b0e,
|
||||
0x51001b10,
|
||||
0xc9001b0f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -535,7 +543,8 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -549,9 +558,9 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21022800,
|
||||
0x21023100,
|
||||
0x1f000000,
|
||||
0x510002eb,
|
||||
0x510002ed,
|
||||
0x24001da2,
|
||||
0x240101cc,
|
||||
0x2401018c,
|
||||
@ -566,7 +575,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21023a00,
|
||||
0x21024300,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -581,7 +590,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21024900,
|
||||
0x21025200,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -597,17 +606,17 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21025900,
|
||||
0x21026200,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21028000,
|
||||
0x21028900,
|
||||
0x3062000e,
|
||||
0x0901f1f1,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21026300,
|
||||
0x21026c00,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -624,7 +633,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027400,
|
||||
0x21027d00,
|
||||
0x1301f1f1,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -635,12 +644,12 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027f00,
|
||||
0x21028800,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9011b0e,
|
||||
0x51001b10,
|
||||
0xc9011b0f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -653,7 +662,8 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -667,9 +677,9 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d010000,
|
||||
0x21029e00,
|
||||
0x2102a800,
|
||||
0x1f010000,
|
||||
0x69180275,
|
||||
0x69180276,
|
||||
0x240101cc,
|
||||
0x2401018c,
|
||||
0x24000143,
|
||||
@ -683,7 +693,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102af00,
|
||||
0x2102b900,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -698,7 +708,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102be00,
|
||||
0x2102c800,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -714,17 +724,17 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102ce00,
|
||||
0x2102d800,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x2102f500,
|
||||
0x2102ff00,
|
||||
0x3062000e,
|
||||
0x0901f2f2,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102d800,
|
||||
0x2102e200,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -741,7 +751,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102e900,
|
||||
0x2102f300,
|
||||
0x1301f2f2,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -752,12 +762,12 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102f400,
|
||||
0x2102fe00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9021b0e,
|
||||
0x51001b10,
|
||||
0xc9021b0f,
|
||||
0x91002b8e,
|
||||
0x1f03eeee,
|
||||
0x81002b8e,
|
||||
@ -770,7 +780,8 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c2b9b,
|
||||
0x81c0389b,
|
||||
0x9160388e,
|
||||
0xe1142e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -784,26 +795,26 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d020000,
|
||||
0x21031300,
|
||||
0x21031e00,
|
||||
0x1f020000,
|
||||
0xc9004115,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9004e02,
|
||||
0x1f13ffff,
|
||||
0xd105ff00,
|
||||
@ -814,66 +825,66 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x4ee2e0ff,
|
||||
0x20dd0000,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9004e02,
|
||||
0x1f13ffff,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0xd105ff00,
|
||||
0x24006000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
0x91b83880,
|
||||
0x230329dd,
|
||||
0x91903880,
|
||||
0x230334dd,
|
||||
0x24002000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
0x91983880,
|
||||
0x230329dd,
|
||||
0x91703880,
|
||||
0x230334dd,
|
||||
0x24006000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
0x91b43880,
|
||||
0x230329dd,
|
||||
0x918c3880,
|
||||
0x230334dd,
|
||||
0x24000000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9004e02,
|
||||
0x1f13ffff,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0xd105ff00,
|
||||
0x240010de,
|
||||
0x2400001e,
|
||||
@ -886,26 +897,26 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x1f1bffff,
|
||||
0x1d18fefe,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9004e02,
|
||||
0x1f13ffff,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0xd105ff00,
|
||||
0x209d0000,
|
||||
0x24000081,
|
||||
@ -933,7 +944,7 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x2eff82c8,
|
||||
0x130803de,
|
||||
0x24000e1e,
|
||||
0x91441822,
|
||||
0x91301822,
|
||||
0x24000042,
|
||||
0x0106a2a2,
|
||||
0x0906a280,
|
||||
@ -941,9 +952,9 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x04a280a2,
|
||||
0x24003801,
|
||||
0x24000141,
|
||||
0x230163dd,
|
||||
0x91a03880,
|
||||
0x230329dd,
|
||||
0x23016add,
|
||||
0x91783880,
|
||||
0x230334dd,
|
||||
0x2401048d,
|
||||
0x908d0480,
|
||||
0xce2380fe,
|
||||
@ -955,38 +966,38 @@ const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x910c2b80,
|
||||
0x2400007e,
|
||||
0x00e0e9e9,
|
||||
0x91a43880,
|
||||
0x230329dd,
|
||||
0x917c3880,
|
||||
0x230334dd,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9004e02,
|
||||
0x1f13ffff,
|
||||
0xd063ff00,
|
||||
0x91a83880,
|
||||
0x230329dd,
|
||||
0x91803880,
|
||||
0x230334dd,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x8195180e,
|
||||
0x0101c8c8,
|
||||
0x6708c8cd,
|
||||
0x0b03e9e9,
|
||||
0x919c389b,
|
||||
0x9174389b,
|
||||
0x60fbe903,
|
||||
0x04fbe9e9,
|
||||
0x2103da00,
|
||||
0x2103e500,
|
||||
0x209d0000};
|
||||
|
||||
|
||||
@ -12,132 +12,132 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x51000502,
|
||||
0x21000d00,
|
||||
0x24000105,
|
||||
0x23032e9d,
|
||||
0x2303399d,
|
||||
0x24005480,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91b03880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91883880,
|
||||
0x230334dd,
|
||||
0x24721d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24003880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24023880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24421d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x241a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0x0903efef,
|
||||
0x8184182f,
|
||||
0x91a83880,
|
||||
0x230329dd,
|
||||
0x8150182f,
|
||||
0x91803880,
|
||||
0x230334dd,
|
||||
0x244a1d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x23019e9d,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x240a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0x0903efef,
|
||||
0x8185182f,
|
||||
0x8151182f,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x91ac3880,
|
||||
0x230329dd,
|
||||
0x8197180e,
|
||||
0x91843880,
|
||||
0x230334dd,
|
||||
0x24000180,
|
||||
0x2403bfc0,
|
||||
0x24271081,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9024e02,
|
||||
0x2303989d,
|
||||
0x2303a39d,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x240a0283,
|
||||
0x24151ac3,
|
||||
0x91841822,
|
||||
0x2303a39d,
|
||||
0x81883889,
|
||||
0x91905880,
|
||||
0x91501822,
|
||||
0x2303ae9d,
|
||||
0x81543889,
|
||||
0x91685880,
|
||||
0x6900e004,
|
||||
0x24000280,
|
||||
0x240017c0,
|
||||
0x2400fa81,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9024e02,
|
||||
0x2303989d,
|
||||
0x2303a39d,
|
||||
0x24000020,
|
||||
0x91841800,
|
||||
0x91501800,
|
||||
0x51000002,
|
||||
0x24000100,
|
||||
0x810b1800,
|
||||
@ -152,15 +152,16 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x910a1800,
|
||||
0xcf0000ff,
|
||||
0xc9070003,
|
||||
0x2300b69d,
|
||||
0x2100af00,
|
||||
0x2300b89d,
|
||||
0x2100b100,
|
||||
0x91247880,
|
||||
0x2301969d,
|
||||
0x23019e9d,
|
||||
0xd1004103,
|
||||
0x912c3881,
|
||||
0x23018f9d,
|
||||
0x2301979d,
|
||||
0x9160388e,
|
||||
0x10000004,
|
||||
0x91813824,
|
||||
0x91583824,
|
||||
0xd1000403,
|
||||
0x01012424,
|
||||
0x2eff838f,
|
||||
@ -172,23 +173,24 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xd1020403,
|
||||
0x01016464,
|
||||
0x2eff8192,
|
||||
0x8170f88f,
|
||||
0x81803884,
|
||||
0xe130ee8f,
|
||||
0xe1400e04,
|
||||
0x81583824,
|
||||
0x24000083,
|
||||
0x810a1803,
|
||||
0x91081804,
|
||||
0x69000402,
|
||||
0x2400249f,
|
||||
0x570004da,
|
||||
0x570004d8,
|
||||
0x21009600,
|
||||
0x91247880,
|
||||
0x240012de,
|
||||
0x1000001e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x230163dd,
|
||||
0x23016add,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x240000cf,
|
||||
0x2400008f,
|
||||
0x240000d0,
|
||||
@ -212,7 +214,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100d800,
|
||||
0x2100da00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -227,7 +229,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100e700,
|
||||
0x2100e900,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -243,17 +245,17 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2100f700,
|
||||
0x2100f900,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21011e00,
|
||||
0x21012000,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21010100,
|
||||
0x21010300,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -270,7 +272,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011200,
|
||||
0x21011400,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -281,12 +283,12 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011d00,
|
||||
0x21011f00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9001b0e,
|
||||
0x51001b10,
|
||||
0xc9001b0f,
|
||||
0x91003c8e,
|
||||
0x1f03eeee,
|
||||
0x81003c8e,
|
||||
@ -299,7 +301,8 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c3c9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -313,17 +316,21 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21013c00,
|
||||
0x21013f00,
|
||||
0x1f000000,
|
||||
0x1d027e7e,
|
||||
0x91803884,
|
||||
0xc900e004,
|
||||
0x9160388e,
|
||||
0x91583824,
|
||||
0xf1400e04,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8170788f,
|
||||
0x81803884,
|
||||
0xe1306e8f,
|
||||
0x81583824,
|
||||
0xe1400e04,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81803884,
|
||||
0x81583824,
|
||||
0xe1400e04,
|
||||
0x24010e8d,
|
||||
0x908d0480,
|
||||
0x0b028080,
|
||||
@ -331,24 +338,24 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x10e0e0e0,
|
||||
0x1f027e7e,
|
||||
0x910a1800,
|
||||
0xd7070070,
|
||||
0xd707006b,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9024e02,
|
||||
0x1f13ffff,
|
||||
0x1d027e7e,
|
||||
@ -360,7 +367,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x12010202,
|
||||
0x2401198d,
|
||||
0x808d0402,
|
||||
0x918618c4,
|
||||
0x915218c4,
|
||||
0x04c4a284,
|
||||
0x24011a8d,
|
||||
0x808d0484,
|
||||
@ -396,18 +403,19 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c3c9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x20dd0000,
|
||||
0x24001ade,
|
||||
0x2400011e,
|
||||
0x1001011e,
|
||||
0x1021211e,
|
||||
0x1041411e,
|
||||
0x230172dd,
|
||||
0x230179dd,
|
||||
0x209d0000,
|
||||
0xc9004103,
|
||||
0x24000ade,
|
||||
0x21019a00,
|
||||
0x2101a200,
|
||||
0x240002de,
|
||||
0x1000001e,
|
||||
0x71082104,
|
||||
@ -416,9 +424,9 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x1060601e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x230163dd,
|
||||
0x23016add,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2eff818f,
|
||||
0x2eff8190,
|
||||
0x24001a03,
|
||||
@ -448,7 +456,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101c400,
|
||||
0x2101cc00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -463,7 +471,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101d300,
|
||||
0x2101db00,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -479,17 +487,17 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101e300,
|
||||
0x2101eb00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21020a00,
|
||||
0x21021200,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101ed00,
|
||||
0x2101f500,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -506,7 +514,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101fe00,
|
||||
0x21020600,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -517,12 +525,12 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21020900,
|
||||
0x21021100,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9001b0e,
|
||||
0x51001b10,
|
||||
0xc9001b0f,
|
||||
0x91003c8e,
|
||||
0x1f03eeee,
|
||||
0x81003c8e,
|
||||
@ -535,7 +543,8 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c3c9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -549,9 +558,9 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21022800,
|
||||
0x21023100,
|
||||
0x1f000000,
|
||||
0x510002eb,
|
||||
0x510002ed,
|
||||
0x24001da2,
|
||||
0x240101cc,
|
||||
0x2401018c,
|
||||
@ -566,7 +575,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21023a00,
|
||||
0x21024300,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -581,7 +590,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21024900,
|
||||
0x21025200,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -597,17 +606,17 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21025900,
|
||||
0x21026200,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21028000,
|
||||
0x21028900,
|
||||
0x3062000e,
|
||||
0x0901f1f1,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21026300,
|
||||
0x21026c00,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -624,7 +633,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027400,
|
||||
0x21027d00,
|
||||
0x1301f1f1,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -635,12 +644,12 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027f00,
|
||||
0x21028800,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9011b0e,
|
||||
0x51001b10,
|
||||
0xc9011b0f,
|
||||
0x91003c8e,
|
||||
0x1f03eeee,
|
||||
0x81003c8e,
|
||||
@ -653,7 +662,8 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c3c9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -667,9 +677,9 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d010000,
|
||||
0x21029e00,
|
||||
0x2102a800,
|
||||
0x1f010000,
|
||||
0x69180275,
|
||||
0x69180276,
|
||||
0x240101cc,
|
||||
0x2401018c,
|
||||
0x24000143,
|
||||
@ -683,7 +693,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102af00,
|
||||
0x2102b900,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -698,7 +708,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102be00,
|
||||
0x2102c800,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -714,17 +724,17 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102ce00,
|
||||
0x2102d800,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x2102f500,
|
||||
0x2102ff00,
|
||||
0x3062000e,
|
||||
0x0901f2f2,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102d800,
|
||||
0x2102e200,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -741,7 +751,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102e900,
|
||||
0x2102f300,
|
||||
0x1301f2f2,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -752,12 +762,12 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102f400,
|
||||
0x2102fe00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x51001b0f,
|
||||
0xc9021b0e,
|
||||
0x51001b10,
|
||||
0xc9021b0f,
|
||||
0x91003c8e,
|
||||
0x1f03eeee,
|
||||
0x81003c8e,
|
||||
@ -770,7 +780,8 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x908d249b,
|
||||
0xd71cfbfe,
|
||||
0x910c3c9b,
|
||||
0x81c8389b,
|
||||
0x9160388e,
|
||||
0xe1442e9b,
|
||||
0x24000062,
|
||||
0xd1000c02,
|
||||
0x1f006262,
|
||||
@ -784,26 +795,26 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d020000,
|
||||
0x21031300,
|
||||
0x21031e00,
|
||||
0x1f020000,
|
||||
0xc9004115,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9024e02,
|
||||
0x1f13ffff,
|
||||
0xd115ff00,
|
||||
@ -814,66 +825,66 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x4ee2e0ff,
|
||||
0x20dd0000,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9024e02,
|
||||
0x1f13ffff,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0xd115ff00,
|
||||
0x24006000,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91b83880,
|
||||
0x230329dd,
|
||||
0x91903880,
|
||||
0x230334dd,
|
||||
0x24002000,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91983880,
|
||||
0x230329dd,
|
||||
0x91703880,
|
||||
0x230334dd,
|
||||
0x24006000,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91b43880,
|
||||
0x230329dd,
|
||||
0x918c3880,
|
||||
0x230334dd,
|
||||
0x24000000,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9024e02,
|
||||
0x1f13ffff,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0xd115ff00,
|
||||
0x240012de,
|
||||
0x2400001e,
|
||||
@ -886,26 +897,26 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x1f1dffff,
|
||||
0x1d1afefe,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9024e02,
|
||||
0x1f13ffff,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0xd115ff00,
|
||||
0x209d0000,
|
||||
0x24000081,
|
||||
@ -933,7 +944,7 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x2eff82c8,
|
||||
0x130803de,
|
||||
0x24000e1e,
|
||||
0x91841822,
|
||||
0x91501822,
|
||||
0x24000042,
|
||||
0x0106a2a2,
|
||||
0x0906a280,
|
||||
@ -941,9 +952,9 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x04a280a2,
|
||||
0x24003801,
|
||||
0x24000141,
|
||||
0x230163dd,
|
||||
0x91a03880,
|
||||
0x230329dd,
|
||||
0x23016add,
|
||||
0x91783880,
|
||||
0x230334dd,
|
||||
0x2401048d,
|
||||
0x908d0480,
|
||||
0xce2380fe,
|
||||
@ -955,38 +966,38 @@ const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x910c3c80,
|
||||
0x2400007e,
|
||||
0x00e0e9e9,
|
||||
0x91a43880,
|
||||
0x230329dd,
|
||||
0x917c3880,
|
||||
0x230334dd,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9195180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9196180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9197180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0x9194184e,
|
||||
0xc9024e02,
|
||||
0x1f13ffff,
|
||||
0xd063ff00,
|
||||
0x91a83880,
|
||||
0x230329dd,
|
||||
0x91803880,
|
||||
0x230334dd,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x8197180e,
|
||||
0x0101c8c8,
|
||||
0x6708c8cd,
|
||||
0x0b03e9e9,
|
||||
0x919c389b,
|
||||
0x9174389b,
|
||||
0x60fbe903,
|
||||
0x04fbe9e9,
|
||||
0x2103da00,
|
||||
0x2103e500,
|
||||
0x209d0000};
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -343,6 +343,8 @@ int32_t endat_wait_initialization(struct endat_priv *priv, uint32_t timeout, uin
|
||||
* to struct endat_priv instance
|
||||
*
|
||||
* \param[in] pruss_xchg EnDat firmware interface address
|
||||
* \param[in] endatRxInfo EnDat Rx interface
|
||||
* \param[in] endatChInfoGlobalAddr global address for endatRxInfo
|
||||
* \param[in] pruss_cfg ICSS PRU config base address
|
||||
* \param[in] pruss_iep ICSS PRU iep base address
|
||||
* \param[in] slice ICSS PRU SLICE
|
||||
@ -350,7 +352,7 @@ int32_t endat_wait_initialization(struct endat_priv *priv, uint32_t timeout, uin
|
||||
* \retval priv pointer to struct endat_priv instance
|
||||
*
|
||||
*/
|
||||
struct endat_priv *endat_init(struct endat_pruss_xchg *pruss_xchg,
|
||||
struct endat_priv *endat_init(struct endat_pruss_xchg *pruss_xchg, struct endatChRxInfo *endatRxInfo, uint64_t endatChInfoGlobalAddr,
|
||||
void *pruss_cfg, void *pruss_iep, int32_t slice);
|
||||
|
||||
/**
|
||||
|
||||
@ -149,6 +149,7 @@ struct endat_priv
|
||||
int32_t channel;
|
||||
uint16_t rx_en_cnt;
|
||||
struct endat_pruss_xchg *pruss_xchg;
|
||||
struct endatChRxInfo *endatChRxInfo;
|
||||
int32_t has_safety;
|
||||
void *pruss_cfg;
|
||||
void *pruss_iep;
|
||||
|
||||
@ -90,6 +90,7 @@ extern "C" {
|
||||
/** \brief additional info 1 CRC status mask (if both present) */
|
||||
#define ENDAT_CRC_ADDINFO1 (0x1 << 2)
|
||||
|
||||
|
||||
/* ========================================================================== */
|
||||
/* Structures */
|
||||
/* ========================================================================== */
|
||||
@ -99,51 +100,72 @@ extern "C" {
|
||||
*
|
||||
* \details Firmware per channel CRC information interface
|
||||
*/
|
||||
struct crc
|
||||
typedef struct Endat_CrcInfo_s
|
||||
{
|
||||
volatile uint8_t status;
|
||||
/**< CRC status,
|
||||
volatile uint8_t errCntData;
|
||||
/**< CRC position/data error count (will wraparound after 255) */
|
||||
volatile uint8_t errCntAddinfox;
|
||||
/**< CRC additional info1/2 error count (will wraparound after 255) */
|
||||
volatile uint8_t errCntAddinfo1;
|
||||
/**< CRC additional info1 error count (will wraparound after 255) <br>
|
||||
applicable only when both additional info's are present */
|
||||
volatile uint8_t resvdInt1;
|
||||
/**< reserved */
|
||||
}Endat_CrcInfo;
|
||||
/**
|
||||
* \brief Structure defining EnDat channel Info
|
||||
* \details Firmware per channel interface
|
||||
*
|
||||
*
|
||||
*/
|
||||
typedef struct Endat_ChInfo_s
|
||||
{
|
||||
volatile uint8_t numClkPulse;
|
||||
/**< position bits excluding SB, error, CRC (updated upon initialization) */
|
||||
volatile uint8_t endat22Stat;
|
||||
/**< encoder command set type, 1 - 2.2 supported, 0 - 2.2 not supported */
|
||||
volatile uint16_t rxClkLess;
|
||||
/**< receive clocks to be reduced to handle propagation delay (to be <br>
|
||||
updated by host, if applicable) */
|
||||
volatile uint32_t propDelay;
|
||||
/**< automatically estimated propagation delay */
|
||||
Endat_CrcInfo crc;
|
||||
/**<Crc information*/
|
||||
volatile uint32_t resvdInt0;
|
||||
/**< reserved */
|
||||
|
||||
}Endat_ChInfo;
|
||||
/**
|
||||
* \brief Structure defining EnDat channel Rx Info
|
||||
* \details Firmware per channel interface for store Rx data (command response)
|
||||
*
|
||||
*
|
||||
*
|
||||
*/
|
||||
typedef struct Endat_ChRXInfo_s
|
||||
{
|
||||
volatile uint32_t posWord0;
|
||||
/**< Initial (<=32) position bits received including error bits */
|
||||
volatile uint32_t posWord1;
|
||||
/**< position bits received after the initial 32 bits (if applicable) */
|
||||
volatile uint32_t posWord2;
|
||||
/**< additional info 1/2 (will be additional info 2 if both present) */
|
||||
volatile uint32_t posWord3;
|
||||
/**< additional info 1 (if both additional 1 & 2 present) */
|
||||
volatile uint8_t crcStatus;
|
||||
/**< CRC status,
|
||||
bit0: 1 - position/data success, 0 - position/data failure <br>
|
||||
bit1: 1 - additional info1 success, 0 - additioanl info1 failure <br>
|
||||
bit2: 1 - additional info2 success, 0 - additioanl info2 failure */
|
||||
volatile uint8_t err_cnt_data;
|
||||
/**< CRC position/data error count (will wraparound after 255) */
|
||||
volatile uint8_t err_cnt_addinfox;
|
||||
/**< CRC additional info1/2 error count (will wraparound after 255) */
|
||||
volatile uint8_t err_cnt_addinfo1;
|
||||
/**< CRC additional info1 error count (will wraparound after 255) <br>
|
||||
applicable only when both additional info's are present */
|
||||
};
|
||||
volatile uint8_t resvdInt2;
|
||||
/**< reserved */
|
||||
volatile uint16_t resvdInt3;
|
||||
/**< reserved */
|
||||
volatile uint32_t recoveryTime;
|
||||
/*< Recovery Time */
|
||||
|
||||
|
||||
/**
|
||||
* \brief Structure defining EnDat per channel interface
|
||||
*
|
||||
* \details Firmware per channel interface
|
||||
*/
|
||||
struct endat_pruss_ch_info
|
||||
{
|
||||
volatile uint32_t pos_word0;
|
||||
/**< Initial (<=32) position bits received including error bits */
|
||||
volatile uint32_t pos_word1;
|
||||
/**< position bits received after the initial 32 bits (if applicable) */
|
||||
volatile uint32_t pos_word2;
|
||||
/**< additional info 1/2 (will be additional info 2 if both present) */
|
||||
volatile uint32_t pos_word3;
|
||||
/**< additional info 1 (if both additional 1 & 2 present) */
|
||||
struct crc crc;
|
||||
/**< crc information */
|
||||
volatile uint8_t num_clk_pulse;
|
||||
/**< position bits excluding SB, error, CRC (updated upon initialization) */
|
||||
volatile uint8_t endat22_stat;
|
||||
/**< encoder command set type, 1 - 2.2 supported, 0 - 2.2 not supported */
|
||||
volatile uint16_t rx_clk_less;
|
||||
/**< receive clocks to be reduced to handle propagation delay (to be <br>
|
||||
updated by host, if applicable) */
|
||||
volatile uint32_t prop_delay;
|
||||
/**< automatically estimated propagation delay */
|
||||
volatile uint32_t resvd_int0;
|
||||
/**< reserved */
|
||||
};
|
||||
}Endat_ChRxInfo;
|
||||
|
||||
/**
|
||||
* \brief Structure defining EnDat command interface
|
||||
@ -205,39 +227,46 @@ struct endat_pruss_config
|
||||
/**
|
||||
* \brief Structure defining EnDat interface
|
||||
*
|
||||
* \details Firmware config, command and channel interface
|
||||
* \details Firmware config, command interface
|
||||
*
|
||||
*/
|
||||
struct endat_pruss_xchg
|
||||
{
|
||||
struct endat_pruss_config config[3];
|
||||
/**< config interface */
|
||||
struct endat_pruss_cmd cmd[3];
|
||||
/**< command interface */
|
||||
struct endat_pruss_ch_info ch[3];
|
||||
/**< per channel interface */
|
||||
uint16_t endat_rx_clk_config;
|
||||
uint16_t endat_tx_clk_config;
|
||||
uint32_t endat_rx_clk_cnten;
|
||||
uint32_t endat_delay_125ns;
|
||||
uint32_t endat_delay_5us;
|
||||
uint32_t endat_delay_51us;
|
||||
uint32_t endat_delay_1ms;
|
||||
uint32_t endat_delay_2ms;
|
||||
uint32_t endat_delay_12ms;
|
||||
uint32_t endat_delay_50ms;
|
||||
uint32_t endat_delay_380ms;
|
||||
uint32_t endat_delay_900ms;
|
||||
volatile uint8_t endat_primary_core_mask;
|
||||
volatile uint8_t endat_ch0_syn_bit;
|
||||
volatile uint8_t endat_ch1_syn_bit;
|
||||
volatile uint8_t endat_ch2_syn_bit;
|
||||
uint32_t endat_ch0_rt;
|
||||
uint32_t endat_ch1_rt;
|
||||
uint32_t endat_ch2_rt;
|
||||
uint64_t icssg_clk;
|
||||
struct endat_pruss_config config[3];
|
||||
/**< config interface */
|
||||
struct endat_pruss_cmd cmd[3];
|
||||
/**< command interface */
|
||||
Endat_ChInfo ch[3];
|
||||
/**<channel interface */
|
||||
uint64_t endatChInfoMemoryAdd;
|
||||
uint16_t endat_rx_clk_config;
|
||||
uint16_t endat_tx_clk_config;
|
||||
uint32_t endat_rx_clk_cnten;
|
||||
uint32_t endat_delay_125ns;
|
||||
uint32_t endat_delay_5us;
|
||||
uint32_t endat_delay_51us;
|
||||
uint32_t endat_delay_1ms;
|
||||
uint32_t endat_delay_2ms;
|
||||
uint32_t endat_delay_12ms;
|
||||
uint32_t endat_delay_50ms;
|
||||
uint32_t endat_delay_380ms;
|
||||
uint32_t endat_delay_900ms;
|
||||
volatile uint8_t endat_primary_core_mask;
|
||||
volatile uint8_t endat_ch0_syn_bit;
|
||||
volatile uint8_t endat_ch1_syn_bit;
|
||||
volatile uint8_t endat_ch2_syn_bit;
|
||||
uint64_t icssg_clk;
|
||||
};
|
||||
/**
|
||||
* \brief Structure defining EnDat channel Rx information
|
||||
*
|
||||
* \details
|
||||
*
|
||||
*/
|
||||
struct endatChRxInfo
|
||||
{
|
||||
Endat_ChRxInfo ch[3];
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user