From c5bc321959da60d80ded93ea4a9ce96514edd614 Mon Sep 17 00:00:00 2001 From: Dhaval Khandla Date: Thu, 14 Dec 2023 18:05:14 +0530 Subject: [PATCH] am243x: bissc: Refactor the code - Align to coding guidelines - Remove am243x-evm examples Fixes: PINDSW-5479 Signed-off-by: Dhaval Khandla --- .../components/position_sense/biss_c.md | 9 +- .../position_sense/biss_c_design.md | 34 +- .../bissc_diagnostic/bissc_diagnostic.c | 259 +++++++++------ .../r5fss0-0_freertos/example.syscfg | 102 ------ .../am243x-evm/r5fss0-0_freertos/main.c | 84 ----- .../ti-arm-clang/example.projectspec | 114 ------- .../r5fss0-0_freertos/ti-arm-clang/linker.cmd | 148 --------- .../r5fss0-0_freertos/ti-arm-clang/makefile | 308 ------------------ .../ti-arm-clang/makefile_ccs_bootimage_gen | 106 ------ .../ti-arm-clang/makefile_projectspec | 20 -- .../ti-arm-clang/syscfg_c.rov.xs | 8 - .../r5fss0-0_freertos/example.syscfg | 51 ++- .../r5fss0-0_freertos/example.syscfg | 101 ------ .../am243x-evm/r5fss0-0_freertos/main.c | 84 ----- .../ti-arm-clang/example.projectspec | 114 ------- .../r5fss0-0_freertos/ti-arm-clang/linker.cmd | 148 --------- .../r5fss0-0_freertos/ti-arm-clang/makefile | 308 ------------------ .../ti-arm-clang/makefile_ccs_bootimage_gen | 106 ------ .../ti-arm-clang/makefile_projectspec | 20 -- .../ti-arm-clang/syscfg_c.rov.xs | 8 - .../r5fss0-0_freertos/example.syscfg | 51 ++- .../r5fss0-0_freertos/example.syscfg | 76 ----- .../am243x-evm/r5fss0-0_freertos/main.c | 84 ----- .../ti-arm-clang/example.projectspec | 114 ------- .../r5fss0-0_freertos/ti-arm-clang/linker.cmd | 148 --------- .../r5fss0-0_freertos/ti-arm-clang/makefile | 308 ------------------ .../ti-arm-clang/makefile_ccs_bootimage_gen | 106 ------ .../ti-arm-clang/makefile_projectspec | 20 -- .../ti-arm-clang/syscfg_c.rov.xs | 8 - .../r5fss0-0_freertos/example.syscfg | 49 +-- source/.meta/position_sense/bissc.syscfg.js | 25 +- .../position_sense/bissc/driver/bissc_drv.c | 270 ++++++++------- .../bissc/firmware/bissc_interface.h | 124 +++---- .../bissc/firmware/bissc_macros.h | 77 ++--- .../bissc/firmware/bissc_main.asm | 48 +-- .../bissc/firmware/bissc_params.h | 42 +-- .../bissc/firmware/firmware_version.h | 8 +- .../position_sense/bissc/include/bissc_api.h | 118 ++++--- .../position_sense/bissc/include/bissc_drv.h | 92 +++--- .../bissc/include/bissc_interface.h | 13 +- 40 files changed, 668 insertions(+), 3245 deletions(-) delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/example.syscfg delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/main.c delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/example.syscfg delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/main.c delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec delete mode 100644 examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs delete mode 100644 examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/example.syscfg delete mode 100644 examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/main.c delete mode 100644 examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec delete mode 100644 examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd delete mode 100644 examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile delete mode 100644 examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen delete mode 100644 examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec delete mode 100644 examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs diff --git a/docs_src/docs/api_guide/components/position_sense/biss_c.md b/docs_src/docs/api_guide/components/position_sense/biss_c.md index b31baf1..1899166 100644 --- a/docs_src/docs/api_guide/components/position_sense/biss_c.md +++ b/docs_src/docs/api_guide/components/position_sense/biss_c.md @@ -4,12 +4,12 @@ ## Introduction -BiSS is an open-source digital interface for sensors and actuators. BiSS stands for bidirectional serial synchronous. The BiSS interface was introduced by iC-Haus GmbH as an open-source protocol in 2002. BiSS-C mode is the continuous mode in which the BiSS-C interface master reads out the position data cyclically. Control communication is available for the master to send commands to the slaves and to read and write the slave local registers. The BiSS interface is used in position-control applications. The interface enables a complete closed-loop position control system by providing the real-time position feedback to the master to control the motor. +BiSS is an open-source digital interface for sensors and actuators. BiSS stands for bidirectional serial synchronous. The BiSS interface was introduced by iC-Haus GmbH as an open-source protocol in 2002. BiSS-C mode is the continuous mode in which the BiSS-C interface master reads out the position data cyclically. Control communication is available for the master to send commands to the encoders and to read and write the encoder local registers. The BiSS interface is used in position-control applications. The interface enables a complete closed-loop position control system by providing the real-time position feedback to the master to control the motor. ## Features Supported - BiSS-C Interface Master for point-to-point communication - - Support for single channel implementation with one slave + - Support for single channel implementation with one encoder - Receive on-the-fly CRC verification of position and control data - Interface speed of 1, 2, 5, 8, and 10 MHz - Support for control communication @@ -17,13 +17,14 @@ BiSS is an open-source digital interface for sensors and actuators. BiSS stands - Support for multiple encoders connected via daisy-chain configuration (up-to 3 encoders) - Support for concurrent multi-channel support on a single PRU (up-to 3 identical encoders) - Support for multi-channel encoders of different make under load share model (each of PRU, RTU-PRU, and TX-PRU from one PRU-ICSSG slice handles one channel) - - Support for up to 100-m cable + - Support for up to 100 mtr cable ## Features Not Supported In general, peripherals or features not mentioned as part of "Features Supported" section are not supported in this release, including the below - Safety +- BISS Line - Independent clocks on multi channel mode. ## SysConfig Features @@ -36,7 +37,7 @@ SysConfig can be used to configure things mentioned below: - Configuring PINMUX. - Frequency selection. - Channel selection. -- Selecting Multi Channel with Encoders of Different Make" using load share mode. +- Selecting Multi Channel with Encoders of Different Make using load share mode. ## BISS-C Design diff --git a/docs_src/docs/api_guide/components/position_sense/biss_c_design.md b/docs_src/docs/api_guide/components/position_sense/biss_c_design.md index 01d4830..41e3f84 100644 --- a/docs_src/docs/api_guide/components/position_sense/biss_c_design.md +++ b/docs_src/docs/api_guide/components/position_sense/biss_c_design.md @@ -4,7 +4,7 @@ ## Introduction -This design implements BISS-C Receiver (a.k.a subsequent electronics) using the EnDAT hardware interface available on the TI Sitara™ AM64x/AM243x EVM. The EnDat hardware interface is a digital bidirectional serial interface for position encoders, also suited fo safety related applications. Only four signal lines are required, differential pair each for clock and data. +This design implements BISS-C Receiver (a.k.a subsequent electronics) using the 3 channel peripheral interface available on the TI Sitara™ AM64x/AM243x EVM. The 3 channel peripheral interface is a digital bidirectional serial interface for position encoders, also suited fo safety related applications. Only four signal lines are required, differential pair each for clock and data. In BISS-C, clock is provided by receiver and data is provided by the encoder. Data is transmitted in synchronism with clock. Transfer between receiver and encoder at the physical layer is in accordance with RS485, with transceiver at both ends. @@ -13,15 +13,15 @@ Transfer between receiver and encoder at the physical layer is in accordance wit Position feedback system consists of a position encoder attached to a motor, up to 100 meter of cable which provides power and serial communication and the receiver interface for position encoder. In case of Sitara™ AM64x/AM243x processor the receiver interface for position encoder is just one function of a connected drive controller. The AM64x/AM243x provides in addition to the resources for Industrial Ethernet and motor control application including on-chip ADCs, Delta Sigma demodulator for current measurement. -EnDat Receiver on Sitara™AM64x/AM243x processor uses one ICSSGx Slice. +BISS-C Receiver on Sitara™AM64x/AM243x processor uses one ICSSGx Slice. Clock, data transmit, data receive and receive enable signals from PRU1 of ICSS_G is available in AM64x/AM243x EVM. ## Implementation The BISS-C receiver function is implemented on TI Sitara™ Devices. Encoder is connected to IDK via universal Digital Interface TIDA-00179(https://www.ti.com/tool/TIDA-00179), TIDEP-01015(3-axis board) and 3 Axis Interface card. -Design is split into three parts – EnDat hardware interface support in PRU, firmware running in PRU and driver running in ARM. -Application is supposed to use the BISS-C driver APIs to leverage EnDat hardware interface functionality. +Design is split into three parts – 3 channel peripheral interface support in PRU, firmware running in PRU and driver running in ARM. +Application is supposed to use the BISS-C driver APIs to leverage 3 channel peripheral interface functionality. SDK examples used the BISS-C hardware capability in Slice 1 (either 1 core or 3 cores based on the confiuration) of PRU-ICSSG0. Remaining PRUs in the AM64x/AM243x EVM are available for Industrial Ethernet communication and/or motor control interfaces. @@ -66,7 +66,7 @@ Remaining PRUs in the AM64x/AM243x EVM are available for Industrial Ethernet com -### EnDat PRU hardware interface +### 3 Channel Peripheral Interface PRU hardware interface Refer TRM for details @@ -74,7 +74,7 @@ Refer TRM for details Following section describes the firmware implementation of BISS-C receiver on PRU-ICSS. Deterministic behavior of the 32 bit RISC core running upto 333MHz provides resolution on sampling external signals and generating external signals. -It makes uses of EnDat hardware interface support in PRU for data transmission. +It makes uses of 3 channel peripheral interface support in PRU for data transmission. There are three different variations of PRU-ICSS firmware. 1. Single Channel @@ -89,7 +89,7 @@ Single core of PRU-ICSSG slice is used in this configuration. #### Implementation for Multi Channel with Encoders of Different Make Each of PRU, TX-PRU and RTU-PRU handle one channel in this configuration Enbale load share mode in case of multi make encoders. -\image html biss_multichannel_different_make.png "PRU, EnDat module Integration for 'Multi Channel with Encoders of Different Make' configuration" +\image html biss_multichannel_different_make.png "PRU, BiSS-C module Integration for 'Multi Channel with Encoders of Different Make' configuration" #### Firmware Architecture @@ -99,12 +99,14 @@ Firmware first detects and estimates the processing delay of the encoder as part Then it reads the position data and check if a control communication is in process. It verifies the position data CRC by comparing it with the on-the-fly computation of CRC. In case of control communication mode, it backs up the CDS bit and transmits the CDM bit by overriding the clock pulse during the BISS-C cycle timeout phase. If the control communication is in progress it goes back to read the position data for the next cycle. If the control communication is completed, it updates the control command status, position data status and returns to wait for the next trigger command from ARM. +\note Firmware running on PRU-ICSS will be remain HALTED if encoder is not detected and application will wait for 5 seconds and exit with error code. + ##### Initialization \image html biss_initialization.png "Initilization for All Modes" Initialization is performed both on the ARM and PRU as shown in the figure above. During the initialization, based on the clock frequency selected the PRU detects the Encoder and estimates its processing delay in terms of clock cycles. The processing delay is measured 8 times and an average value is used for compensation. Note that whenever the user changes the clock frequency, the initialization routine on the PRU is executed to estimate the processing delay. -If using "Multi Channel with Encoders of Different Make" configuration where load share mode is enabled, one of the cores among enabled cores will be set as the primary core for performing global configurations of PRU-ICSSG's EnDat interface. These global configurations include clock frequency configuration and TX global re-initialization. +If using "Multi Channel with Encoders of Different Make" configuration where load share mode is enabled, one of the cores among enabled cores will be set as the primary core for performing global configurations of PRU-ICSSG's BISS-C interface. These global configurations include clock frequency configuration and TX global re-initialization. There needs to be a synchronization between PRUs before changing any global configuration. For this purpose, each active PRU core sets synchronization bit before any operation needing synchronization and clears the synchronization bit when it is ready. The assigned primary core will wait for all active channel's synchronization bits to be cleared and then perform the global configuration. @@ -124,13 +126,13 @@ BISS-c control communication is performed over multiple cycles. Refer to the sta \image html bissc_hex_control_commands.png "BISS-C hex commands" -### EnDat Hardware interface +### 3 Channel Peripheral Interface -The physical data transmission in EnDat is done using RS-485 standard. The data is transmitted as differential signals using the RS485 between the EnDat Receiver and the Encoder. +The physical data transmission in 3 channel peripheral interface is done using RS-485 standard. The data is transmitted as differential signals using the RS485 between the 3 channel peripheral interface Receiver and the Encoder. -The Receiver sends the clock to the EnDat encoder, data transmission in either direction (one at a time) occurs in synchronism with the clock. The design uses two differential signals for each of the lines (clock and data). +The Receiver sends the clock to the BISS-C encoder, data transmission in either direction (one at a time) occurs in synchronism with the clock. The design uses two differential signals for each of the lines (clock and data). -EnDat Receiver and the encoder is connected using the RS-485 transceiver. Data is transmitted differentially over RS-485. It has the advantages of high noise immunity and long distance transmission capabilities. +BISS-C Receiver and the encoder is connected using the RS-485 transceiver. Data is transmitted differentially over RS-485. It has the advantages of high noise immunity and long distance transmission capabilities. \cond SOC_AM243X ##### AM243x-LP Booster Pack Pin-Multiplexing @@ -142,12 +144,12 @@ EnDat Receiver and the encoder is connected using the RS-485 transceiver. Data i PRG0_PRU1_GPO0 - pru1_endat0_clk + pru1_bissc0_clk Channel 0 clock PRG0_PRU1_GPO1 - pru1_endat0_out + pru1_bissc0_out Channel 0 transmit @@ -157,13 +159,13 @@ EnDat Receiver and the encoder is connected using the RS-485 transceiver. Data i PRG0_PRU1_GPI13 - pru1_endat0_in + pru1_bissc0_in Channel 0 receive GPIO Pin(GPIO1_78) ENC0_EN - Enbale endat mode in Axis 1 of BP (C16 GPIO pin) + Enbale 3 channel peripheral interface mode in Axis 1 of BP (C16 GPIO pin) \endcond diff --git a/examples/position_sense/bissc_diagnostic/bissc_diagnostic.c b/examples/position_sense/bissc_diagnostic/bissc_diagnostic.c index fde45e2..2230627 100644 --- a/examples/position_sense/bissc_diagnostic/bissc_diagnostic.c +++ b/examples/position_sense/bissc_diagnostic/bissc_diagnostic.c @@ -48,6 +48,7 @@ #include "ti_drivers_open_close.h" #include "ti_board_open_close.h" #include +#include #define PRUICSS_SLICEx PRUICSS_PRUx #if PRUICSS_SLICEx #define PRUICSS_TXPRUx PRUICSS_TX_PRU1 @@ -82,12 +83,21 @@ #define WAIT_5_SECOND (5000) #define WAIT_2_SECOND (2000) +#define BISSC_CMD_EXIT_APP (0) +#define BISSC_CMD_ENC_LEN_UPDATE (1) +#define BISSC_CMD_ENC_FREQ_UPDATE (2) +#define BISSC_CMD_ENC_SEND_POS (3) +#define BISSC_CMD_ENC_CTRL_CMD (4) +#define BISSC_CMD_ENC_LOOP_OVER_CYC (5) + +#define BISSC_INPUT_CLOCK_UART_FREQUENCY 192000000 + struct bissc_priv *priv; -/** \brief Global Structure pointer holding PRUICSS1 memory Map. */ +/** \brief Global Structure pointer holding PRU-ICSSG memory Map. */ PRUICSS_Handle gPruIcssXHandle; -int32_t multichannel = 0, totalchannels = 0, mask = 0, loadshare = 0; +int32_t totalchannels = 0, mask = 0; static void bissc_pruicss_init(void) { @@ -100,7 +110,7 @@ static void bissc_pruicss_init(void) /* clear ICSS0 PRUx data RAM */ size = PRUICSS_initMemory(gPruIcssXHandle, PRUICSS_DATARAM(PRUICSS_PRUx)); DebugP_assert(size); - if(loadshare) + if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU) { status = PRUICSS_disableCore(gPruIcssXHandle, PRUICSS_RTUPRUx); DebugP_assert(SystemP_SUCCESS == status); @@ -114,7 +124,7 @@ static void bissc_pruicss_init(void) int32_t bissc_pruicss_load_run_fw(struct bissc_priv *priv, uint8_t mask) { int32_t status = SystemP_FAILURE, size; -#if (CONFIG_BISSC0_LOAD_SHARE_MODE) /*enable loadshare mode*/ +#if (CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU) /*enable loadshare mode*/ #if(CONFIG_BISSC0_CHANNEL0) status = PRUICSS_disableCore(gPruIcssXHandle, PRUICSS_RTUPRUx); DebugP_assert(SystemP_SUCCESS == status); @@ -198,16 +208,16 @@ static int32_t bissc_clock_config(uint32_t frequency, struct bissc_priv *priv) { struct bissc_clk_cfg clk_cfg; int32_t status = SystemP_FAILURE; - if(bissc_calc_clock(frequency, &clk_cfg) < 0) + priv->baud_rate = frequency; + if(bissc_calc_clock(priv, &clk_cfg) < 0) { return SystemP_FAILURE; } DebugP_logInfo("\r| clock config values - tx_div: %u\trx_div: %u\trx_div_attr: %x\n", clk_cfg.tx_div, clk_cfg.rx_div, clk_cfg.rx_div_attr); - bissc_update_max_proc_delay(priv, frequency); - bissc_config_endat_mode(priv); - bissc_config_clock(priv, &clk_cfg); - bissc_config_clr_cfg0(priv); + + bissc_update_max_proc_delay(priv); + bissc_hw_init(priv); status = bissc_wait_measure_proc_delay(priv, WAIT_5_SECOND); return status; } @@ -226,37 +236,43 @@ static void bissc_display_menu(void) DebugP_log("\r\n|------------------------------------------------------------------------------|"); DebugP_log("\r\n| enter value:\r\n"); } -void bissc_get_enc_data_len(struct bissc_priv *priv){ +void bissc_get_enc_data_len(struct bissc_priv *priv) +{ int32_t pru_num, totalprus; uint32_t single_turn_len[3] = {0}, multi_turn_len[3] = {0}; - priv->num_slaves[0] = 0; - priv->num_slaves[1] = 0; - priv->num_slaves[2] = 0; + priv->num_encoders[0] = 0; + priv->num_encoders[1] = 0; + priv->num_encoders[2] = 0; if(priv->load_share) totalprus = priv->totalchannels; else totalprus = 1; - for(pru_num = 0; pru_num < totalprus; pru_num++){ - DebugP_log("\r\nPlease enter encoder lengths connected to Ch %d:\n", priv->channel[pru_num]); + for(pru_num = 0; pru_num < totalprus; pru_num++) + { + DebugP_log("\r\nPlease enter encoder lengths connected to Channel %d:\n", priv->channel[pru_num]); DebugP_log("\r\nPlease enter 1st encoder single turn length\n"); DebugP_scanf("%u\n", &single_turn_len[0]); - if(single_turn_len[0]){ + if(single_turn_len[0]) + { DebugP_log("\r\nPlease enter 1st encoder multiturn length, 0 if not multiturn\n"); DebugP_scanf("%u\n", &multi_turn_len[0]); } DebugP_log("\r\nPlease enter 0 as data length if daisy chain is not used\n"); DebugP_log("\r\nPlease enter 2nd encoder single turn length\n"); DebugP_scanf("%u\n", &single_turn_len[1]); - if(single_turn_len[1]){ + if(single_turn_len[1]) + { DebugP_log("\r\nPlease enter 2nd encoder multiturn length, 0 if not multiturn\n"); DebugP_scanf("%u\n", &multi_turn_len[1]); } - if(single_turn_len[1]){ + if(single_turn_len[1]) + { DebugP_log("\r\nPlease enter 3rd encoder single turn length\n"); DebugP_scanf("%u\n", &single_turn_len[2]); - if(single_turn_len[2]){ + if(single_turn_len[2]) + { DebugP_log("\r\nPlease enter 3rd encoder multiturn length, 0 if not multiturn\n"); DebugP_scanf("%u\n", &multi_turn_len[2]); } @@ -269,7 +285,7 @@ static int bissc_get_command() uint32_t cmd; DebugP_scanf("%d\n", &cmd); /* Check to make sure that the command issued is correct */ - if( cmd < 0 || cmd > 5) + if( cmd < BISSC_CMD_EXIT_APP || cmd > BISSC_CMD_ENC_LOOP_OVER_CYC) { DebugP_log("\r\n| WARNING: invalid option try again\n"); return SystemP_FAILURE; @@ -282,9 +298,7 @@ void bissc_main(void *args) int32_t i, totalprus, ch_num, ls_ch = 0, pru_num; uint64_t icssgclk; int32_t ch = 0; - if(CONFIG_BISSC0_LOAD_SHARE_MODE){ - loadshare = 1; - } + /* Open drivers to open the UART driver for console */ Drivers_open(); Board_driversOpen(); @@ -294,10 +308,6 @@ void bissc_main(void *args) GPIO_setDirMode(ENC0_EN_BASE_ADDR, ENC0_EN_PIN, ENC0_EN_DIR); GPIO_pinWriteHigh(ENC0_EN_BASE_ADDR, ENC0_EN_PIN); #endif -#if (CONFIG_BISSC0_CHANNEL1) - GPIO_setDirMode(ENC1_EN_BASE_ADDR, ENC1_EN_PIN, ENC1_EN_DIR); - GPIO_pinWriteHigh(ENC1_EN_BASE_ADDR, ENC1_EN_PIN); -#endif #if (CONFIG_BISSC0_CHANNEL2) GPIO_setDirMode(ENC2_EN_BASE_ADDR, ENC2_EN_PIN, ENC2_EN_DIR); GPIO_pinWriteHigh(ENC2_EN_BASE_ADDR, ENC2_EN_PIN); @@ -328,18 +338,8 @@ void bissc_main(void *args) totalchannels = (CONFIG_BISSC0_CHANNEL0 + CONFIG_BISSC0_CHANNEL1 + CONFIG_BISSC0_CHANNEL2); - if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_SINGLE_PRU){ - - multichannel = 1; - } - DebugP_log("\r\n\n"); + DebugP_log("\r\n"); - priv = bissc_init(gPruIcssXHandle, PRUICSS_PRUx, CONFIG_BISSC0_BAUDRATE); - bissc_config_channel(priv, mask, totalchannels); - if(loadshare){ - bissc_config_load_share(priv, mask, loadshare); - } - /* Read the ICSSG configured clock frequency. */ if(gPruIcssXHandle->hwAttrs->instance) { @@ -349,18 +349,33 @@ void bissc_main(void *args) { SOC_moduleGetClockFrequency(TISCI_DEV_PRU_ICSSG0, TISCI_DEV_PRU_ICSSG0_CORE_CLK, &icssgclk); } - bissc_set_default_initialization(priv,CONFIG_BISSC0_BAUDRATE, icssgclk); - if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU){ + + priv = bissc_init(gPruIcssXHandle, PRUICSS_PRUx, CONFIG_BISSC0_BAUDRATE, (uint32_t)icssgclk, BISSC_INPUT_CLOCK_UART_FREQUENCY); + bissc_config_channel(priv, mask, totalchannels); + if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU) + { + bissc_config_load_share(priv, mask); + } + + bissc_set_default_initialization(priv, icssgclk); + if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU) + { DebugP_log("\r\nBiSS-C Load Share Demo application is running......\n"); for(pru_num = 0; pru_num < totalchannels; pru_num++) + { DebugP_log("\r\nChannel %d is enabled\n", priv->channel[pru_num]); + } } - else if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_SINGLE_PRU){ + else if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_SINGLE_PRU) + { DebugP_log("\r\nBiSS-C Multi channel, Single PRU Demo application is running......\n"); for(ch_num = 0; ch_num < totalchannels; ch_num++) + { DebugP_log("\r\nChannel %d is enabled\n", priv->channel[ch_num]); + } } - else{ + else + { DebugP_log("\r\nBiSS-C Single channel, Single PRU Demo application is running......\n"); DebugP_log("\r\nChannel %d is enabled\n", priv->channel[0]); } @@ -374,25 +389,34 @@ void bissc_main(void *args) goto deinit; } - if(!loadshare && multichannel){ - if(priv->pruicss_xchg->proc_delay[priv->channel[0]] == priv->pruicss_xchg->proc_delay[priv->channel[1]]){ - if(priv->totalchannels > 2){ - if(priv->pruicss_xchg->proc_delay[priv->channel[1]] != priv->pruicss_xchg->proc_delay[priv->channel[2]]) + bissc_get_enc_proc_delay(priv); + if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_SINGLE_PRU) + { + if(priv->totalchannels > 1) + { + if(priv->proc_delay[priv->channel[0]] == priv->proc_delay[priv->channel[1]]) + { + if(priv->totalchannels > 2) { - DebugP_log("\r\n Encoders connected accross channels have different processing delays, multi channel configuration is not supported\n"); - goto deinit; + if(priv->proc_delay[priv->channel[1]] != priv->proc_delay[priv->channel[2]]) + { + DebugP_log("\r\n Encoders connected accross channels have different processing delays, multi channel configuration is not supported\n"); + goto deinit; + } } } - } - else{ - DebugP_log("\r\n Encoders connected accross channels have different processing delays, multi channel configuration is not supported\n"); - goto deinit; + else + { + DebugP_log("\r\n Encoders connected accross channels have different processing delays, multi channel configuration is not supported\n"); + goto deinit; + } } } DebugP_log("\r\nBiSS-C encoder/encoders detected and running at frequency %dMHz\n", CONFIG_BISSC0_BAUDRATE); - for( ch_num = 0; ch_num < totalchannels; ch_num++){ - DebugP_log("\r\nProcessing Delay for Ch %d : %u\n",priv->channel[ch_num], priv->pruicss_xchg->proc_delay[priv->channel[ch_num]]); + for( ch_num = 0; ch_num < totalchannels; ch_num++) + { + DebugP_log("\r\nProcessing Delay in clock cycles for Channel %d : %u\n",priv->channel[ch_num], priv->proc_delay[priv->channel[ch_num]]); } while(1) @@ -402,24 +426,24 @@ void bissc_main(void *args) uint32_t loop_cnt; bissc_display_menu(); cmd = bissc_get_command(); - if(cmd < 0) + if(cmd < BISSC_CMD_EXIT_APP) { continue; } - else if(cmd == 0) + else if(cmd == BISSC_CMD_EXIT_APP) { DebugP_log("\r\tGood bye!\n"); break; } - else if(cmd == 1) + else if(cmd == BISSC_CMD_ENC_LEN_UPDATE) { bissc_get_enc_data_len(priv); } - else if(cmd == 2) + else if(cmd == BISSC_CMD_ENC_FREQ_UPDATE) { DebugP_log("\r\nPlease enter frequency in MHz:\n"); DebugP_scanf("%u\n", &freq); - if(!((freq == 1) || (freq == 2) || (freq == 5) || (freq == 8) || (freq == 10))) + if(!((freq == BISSC_FREQ_1MHZ) || (freq == BISSC_FREQ_2MHZ) || (freq == BISSC_FREQ_5MHZ) || (freq == BISSC_FREQ_8MHZ) || (freq == BISSC_FREQ_10MHZ))) { DebugP_log("\r\n CLK divisors will not be possible. Please provide valid freq: 1/2/5/8/10 \n"); continue; @@ -434,9 +458,9 @@ void bissc_main(void *args) } ClockP_sleep(2); } - else if(cmd == 3) + else if(cmd == BISSC_CMD_ENC_SEND_POS) { - ret = bissc_get_pos_res(priv); + ret = bissc_get_pos(priv); if(ret < 0) { DebugP_log("\r\n ERROR: Position data measurement failed \n"); @@ -444,61 +468,72 @@ void bissc_main(void *args) for(ch_num = 0; ch_num < priv->totalchannels; ch_num++) { ch = priv->channel[ch_num]; - if(loadshare) + if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU) ls_ch = ch; else ls_ch = 0; DebugP_log("\r\n Channel %d:\n", ch); - if(priv->multi_turn_len[ls_ch][0]){ + if(priv->multi_turn_len[ls_ch][0]) + { DebugP_log("\r\n Encoder-1 Multiturn rev: %u, Angle: %.12f, crc: %x, otf crc: %x, e_w: %x\n", priv->enc_pos_data[ch].num_of_turns[0], priv->enc_pos_data[ch].angle[0], priv->enc_pos_data[ch].rcv_crc[0], priv->enc_pos_data[ch].otf_crc[0], priv->enc_pos_data[ch].ew[0]); } - else{ + else + { DebugP_log("\r\n Encoder-1 Singleturn Angle: %.12f, crc: %x, otf crc: %x, e_w: %x\n", priv->enc_pos_data[ch].angle[0], priv->enc_pos_data[ch].rcv_crc[0], priv->enc_pos_data[ch].otf_crc[0], priv->enc_pos_data[ch].ew[0]); } DebugP_log("\r\n CRC Status: %s, crc error count: %u\n", (priv->enc_pos_data[ch].rcv_crc[0] == priv->enc_pos_data[ch].otf_crc[0]) ? "success" : "failure" , priv->pd_crc_err_cnt[ch][0]); - if(priv->data_len[ls_ch][1]){ - if(priv->multi_turn_len[1]){ + if(priv->data_len[ls_ch][1]) + { + if(priv->multi_turn_len[ls_ch][1]) + { DebugP_log("\r\n Encoder-2 Multiturn rev: %u, Angle: %.12f, crc: %x, otf crc: %x, e_w: %x\n", priv->enc_pos_data[ch].num_of_turns[1], priv->enc_pos_data[ch].angle[1], priv->enc_pos_data[ch].rcv_crc[1], priv->enc_pos_data[ch].otf_crc[1], priv->enc_pos_data[ch].ew[1]); } - else{ + else + { DebugP_log("\r\n Encoder-2 Singleturn Angle: %.12f, crc: %x, otf crc: %x, e_w: %x\n", priv->enc_pos_data[ch].angle[1], priv->enc_pos_data[ch].rcv_crc[1], priv->enc_pos_data[ch].otf_crc[1], priv->enc_pos_data[ch].ew[1]); } DebugP_log("\r\n CRC Status: %s, crc error count: %u\n", (priv->enc_pos_data[ch].rcv_crc[1] == priv->enc_pos_data[ch].otf_crc[1]) ? "success" : "failure" , priv->pd_crc_err_cnt[ch][1]); - if(priv->data_len[ls_ch][2]){ - if(priv->multi_turn_len[2]){ + if(priv->data_len[ls_ch][2]) + { + if(priv->multi_turn_len[ls_ch][2]) + { DebugP_log("\r\n Encoder-3 Multiturn rev: %u, Angle: %.12f, crc: %x, otf crc: %x, e_w: %x\n", priv->enc_pos_data[ch].num_of_turns[2], priv->enc_pos_data[ch].angle[2], priv->enc_pos_data[ch].rcv_crc[2], priv->enc_pos_data[ch].otf_crc[2], priv->enc_pos_data[ch].ew[2]); } - else{ + else + { DebugP_log("\r\n Encoder-3 Singleturn Angle: %.12f, crc: %x, otf crc: %x, e_w: %x\n", priv->enc_pos_data[ch].angle[2], priv->enc_pos_data[ch].rcv_crc[2], priv->enc_pos_data[ch].otf_crc[2], priv->enc_pos_data[ch].ew[2]); } - DebugP_log("\r\n CRC Status: %s, crc error count: %u\n", (priv->enc_pos_data[ch].rcv_crc[2] == priv->enc_pos_data[ch].otf_crc[2]) ? "success" : "failure" , - priv->pd_crc_err_cnt[ch][2]); + DebugP_log("\r\n CRC Status: %s, crc error count: %u\n", (priv->enc_pos_data[ch].rcv_crc[2] == priv->enc_pos_data[ch].otf_crc[2]) ? "success" : "failure" , + priv->pd_crc_err_cnt[ch][2]); } } } } - else if(cmd == 4) + else if(cmd == BISSC_CMD_ENC_CTRL_CMD) { DebugP_log("\r\nPlease enter control command in Hex:\n"); - if(loadshare){ + if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU) + { totalprus = priv->totalchannels; - for(pru_num = 0; pru_num < totalprus; pru_num++){ + for(pru_num = 0; pru_num < totalprus; pru_num++) + { ls_ch = priv->channel[pru_num]; - DebugP_log("\r\nCh %d: ",ls_ch); + DebugP_log("\r\n Channel %d: ",ls_ch); DebugP_scanf("%x\n", &ctrl_cmd[ls_ch]); } } - else{ + else + { DebugP_scanf("%x\n", &ctrl_cmd[0]); } ret = bissc_set_ctrl_cmd_and_process(priv, ctrl_cmd); @@ -517,7 +552,7 @@ void bissc_main(void *args) DebugP_log("\r\n CTRL CRC error count: %u\n", priv->ctrl_crc_err_cnt[ch]); } } - else if(cmd == 5) + else if(cmd == BISSC_CMD_ENC_LOOP_OVER_CYC) { DebugP_log("\r\nEnter number of BiSS-C cycles:\n"); DebugP_scanf("%u\n", &loop_cnt); @@ -525,52 +560,61 @@ void bissc_main(void *args) { do { - ret = bissc_get_pos_res(priv); + ret = bissc_get_pos(priv); if(ret < 0) { DebugP_log("\r\n ERROR: Position data measurement for first encoder failed \n"); } - for( ch_num = 0; ch_num < totalchannels; ch_num++ ){ + for( ch_num = 0; ch_num < totalchannels; ch_num++) + { ch = priv->channel[ch_num]; - if(loadshare) + if(CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU) ls_ch = ch; else ls_ch = 0; - if(multichannel || loadshare) + if((CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_SINGLE_PRU) || (CONFIG_BISSC0_MODE == BISSC_MODE_MULTI_CHANNEL_MULTI_PRU)) DebugP_log("%s", (ch_num != (totalchannels-1))?"\r":" & "); else DebugP_log("\r"); if(priv->data_len[ls_ch][1]) + { + if(priv->data_len[ls_ch][2]) { - if(priv->data_len[ls_ch][2]) + if(priv->multi_turn_len[ls_ch][2]) { - if(priv->multi_turn_len[ls_ch][2]){ - DebugP_log("Ch:%d - Enc3: MT rev:%u, Angle:%.12f, Enc2: MT rev:%u, Angle:%.12f, Enc1: MT rev:%u, Angle:%.12f, crc error count enc3:%u, crc error count enc2:%u, crc error count enc_1:%u ",ch, priv->enc_pos_data[ch].num_of_turns[2], priv->enc_pos_data[ch].angle[2],priv->enc_pos_data[ch].num_of_turns[1], priv->enc_pos_data[ch].angle[1], - priv->enc_pos_data[ch].num_of_turns[0], priv->enc_pos_data[ch].angle[0], priv->pd_crc_err_cnt[ch][2], priv->pd_crc_err_cnt[ch][1], priv->pd_crc_err_cnt[ch][0]); - } - else{ - DebugP_log("Ch:%d - Enc3: Angle:%.12f, Enc2: Angle:%.12f, Enc1: Angle:%.12f, crc error count enc3:%u, crc error count enc2:%u, crc error count enc1:%u ",ch, priv->enc_pos_data[ch].angle[2], priv->enc_pos_data[ch].angle[1], - priv->enc_pos_data[ch].angle[0], priv->pd_crc_err_cnt[ch][2], priv->pd_crc_err_cnt[ch][1], priv->pd_crc_err_cnt[ch][0]); - } + DebugP_log("Channel:%d - Enc3: MT rev:%u, Angle:%.12f, Enc2: MT rev:%u, Angle:%.12f, Enc1: MT rev:%u, Angle:%.12f, crc error count enc3:%u, crc error count enc2:%u, crc error count enc_1:%u ",ch, priv->enc_pos_data[ch].num_of_turns[2], priv->enc_pos_data[ch].angle[2],priv->enc_pos_data[ch].num_of_turns[1], priv->enc_pos_data[ch].angle[1], + priv->enc_pos_data[ch].num_of_turns[0], priv->enc_pos_data[ch].angle[0], priv->pd_crc_err_cnt[ch][2], priv->pd_crc_err_cnt[ch][1], priv->pd_crc_err_cnt[ch][0]); } - else{ - if(priv->multi_turn_len[ls_ch][1]){ - DebugP_log("Ch:%d - Enc2: MT rev:%u, Angle:%.12f, Enc1: MT rev:%u, Angle:%.12f, crc error count enc2:%u, crc error count enc1:%u ",ch,priv->enc_pos_data[ch].num_of_turns[1], priv->enc_pos_data[ch].angle[1], - priv->enc_pos_data[ch].num_of_turns[0], priv->enc_pos_data[ch].angle[0],priv->pd_crc_err_cnt[ch][1], priv->pd_crc_err_cnt[ch][0]); - } - else{ - DebugP_log("Ch:%d - Enc2: Angle:%.12f, Enc1: Angle:%.12f, crc error count enc2:%u, crc error count enc1:%u ",ch, priv->enc_pos_data[ch].angle[1], priv->enc_pos_data[ch].angle[0], priv->pd_crc_err_cnt[ch][1], - priv->pd_crc_err_cnt[ch][0]); - } + else + { + DebugP_log("Channel:%d - Enc3: Angle:%.12f, Enc2: Angle:%.12f, Enc1: Angle:%.12f, crc error count enc3:%u, crc error count enc2:%u, crc error count enc1:%u ",ch, priv->enc_pos_data[ch].angle[2], priv->enc_pos_data[ch].angle[1], + priv->enc_pos_data[ch].angle[0], priv->pd_crc_err_cnt[ch][2], priv->pd_crc_err_cnt[ch][1], priv->pd_crc_err_cnt[ch][0]); } } - else{ - if(priv->multi_turn_len[ls_ch][0]){ - DebugP_log("Ch:%d - Enc1: MT rev:%u, Angle:%.12f, crc error count enc1:%u ",ch, priv->enc_pos_data[ch].num_of_turns[0], priv->enc_pos_data[ch].angle[0], - priv->pd_crc_err_cnt[ch][0]); + else + { + if(priv->multi_turn_len[ls_ch][1]) + { + DebugP_log("Channel:%d - Enc2: MT rev:%u, Angle:%.12f, Enc1: MT rev:%u, Angle:%.12f, crc error count enc2:%u, crc error count enc1:%u ",ch,priv->enc_pos_data[ch].num_of_turns[1], priv->enc_pos_data[ch].angle[1], + priv->enc_pos_data[ch].num_of_turns[0], priv->enc_pos_data[ch].angle[0],priv->pd_crc_err_cnt[ch][1], priv->pd_crc_err_cnt[ch][0]); } - else{ - DebugP_log("Ch:%d - Enc1: Angle:%.12f, crc error count enc1:%u ",ch, priv->enc_pos_data[ch].angle[0], + else + { + DebugP_log("Channel:%d - Enc2: Angle:%.12f, Enc1: Angle:%.12f, crc error count enc2:%u, crc error count enc1:%u ",ch, priv->enc_pos_data[ch].angle[1], priv->enc_pos_data[ch].angle[0], priv->pd_crc_err_cnt[ch][1], + priv->pd_crc_err_cnt[ch][0]); + } + } + } + else + { + if(priv->multi_turn_len[ls_ch][0]) + { + DebugP_log("Channel:%d - Enc1: MT rev:%u, Angle:%.12f, crc error count enc1:%u ",ch, priv->enc_pos_data[ch].num_of_turns[0], priv->enc_pos_data[ch].angle[0], + priv->pd_crc_err_cnt[ch][0]); + } + else + { + DebugP_log("Channel:%d - Enc1: Angle:%.12f, crc error count enc1:%u ",ch, priv->enc_pos_data[ch].angle[0], priv->pd_crc_err_cnt[ch][0]); } } @@ -578,7 +622,8 @@ void bissc_main(void *args) loop_cnt--; }while(loop_cnt); } - else{ + else + { DebugP_log("Please enter non-zero value\n"); } } diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/example.syscfg deleted file mode 100644 index a979eca..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/example.syscfg +++ /dev/null @@ -1,102 +0,0 @@ -/** - * These arguments were used when this file was generated. They will be automatically applied on subsequent loads - * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. - * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00" - * @versions {"tool":"1.18.0+3266"} - */ - -/** - * Import the modules used in this configuration. - */ -const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false); -const i2c1 = i2c.addInstance(); -const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); -const pruicss1 = pruicss.addInstance(); -const debug_log = scripting.addModule("/kernel/dpl/debug_log"); -const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); -const mpu_armv71 = mpu_armv7.addInstance(); -const mpu_armv72 = mpu_armv7.addInstance(); -const mpu_armv73 = mpu_armv7.addInstance(); -const mpu_armv74 = mpu_armv7.addInstance(); -const mpu_armv75 = mpu_armv7.addInstance(); -const mpu_armv76 = mpu_armv7.addInstance(); -const timer = scripting.addModule("/kernel/dpl/timer", {}, false); -const timer1 = timer.addInstance(); -const endat = scripting.addModule("/position_sense/endat", {}, false); -const endat1 = endat.addInstance(); - -/** - * Write custom configuration values to the imported modules. - */ -i2c1.$name = "CONFIG_I2C0"; -i2c1.I2C.$assign = "I2C1"; - -debug_log.enableCssLog = false; -debug_log.enableUartLog = true; -debug_log.uartLog.$name = "CONFIG_UART0"; - -mpu_armv71.$name = "CONFIG_MPU_REGION0"; -mpu_armv71.size = 31; -mpu_armv71.attributes = "Device"; -mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv72.$name = "CONFIG_MPU_REGION1"; -mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; -mpu_armv72.size = 15; - -mpu_armv73.$name = "CONFIG_MPU_REGION2"; -mpu_armv73.size = 15; -mpu_armv73.baseAddr = 0x41010000; -mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv74.$name = "CONFIG_MPU_REGION3"; -mpu_armv74.size = 21; -mpu_armv74.baseAddr = 0x70000000; -mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv75.$name = "CONFIG_MPU_REGION4"; -mpu_armv75.size = 28; -mpu_armv75.baseAddr = 0x60000000; -mpu_armv75.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv76.$name = "CONFIG_MPU_REGION5"; -mpu_armv76.size = 31; -mpu_armv76.baseAddr = 0x80000000; - -timer1.$name = "CONFIG_TIMER0"; -timer1.timerCallback = "endat_position_loop"; -timer1.intrPriority = 0; -timer1.TIMER.$assign = "DMTIMER0"; - -endat1.$name = "CONFIG_ENDAT0"; -endat1.Channel_1 = true; -endat1.Channel_2 = true; -endat1.Multi_Channel_Load_Share = true; -endat1.PRU_ICSSG0_PRU.$assign = "PRU_ICSSG0_PRU1"; - -pruicss1.$name = "CONFIG_PRU_ICSS0"; -endat1.pru = pruicss1; -pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; - -/** - * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future - * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to - * re-solve from scratch. - */ -i2c1.I2C.SCL.$suggestSolution = "I2C1_SCL"; -i2c1.I2C.SDA.$suggestSolution = "I2C1_SDA"; -debug_log.uartLog.UART.$suggestSolution = "USART0"; -debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; -debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; -endat1.PRU_ICSSG0_PRU.GPO2.$suggestSolution = "PRG0_PRU1_GPO2"; -endat1.PRU_ICSSG0_PRU.GPO1.$suggestSolution = "PRG0_PRU1_GPO1"; -endat1.PRU_ICSSG0_PRU.GPO0.$suggestSolution = "PRG0_PRU1_GPO0"; -endat1.PRU_ICSSG0_PRU.GPI13.$suggestSolution = "PRG0_PRU1_GPO13"; -endat1.PRU_ICSSG0_PRU.GPO5.$suggestSolution = "PRG0_PRU1_GPO5"; -endat1.PRU_ICSSG0_PRU.GPO4.$suggestSolution = "PRG0_PRU1_GPO4"; -endat1.PRU_ICSSG0_PRU.GPO3.$suggestSolution = "PRG0_PRU1_GPO3"; -endat1.PRU_ICSSG0_PRU.GPI14.$suggestSolution = "PRG0_PRU1_GPO14"; -endat1.PRU_ICSSG0_PRU.GPO8.$suggestSolution = "PRG0_PRU1_GPO8"; -endat1.PRU_ICSSG0_PRU.GPO12.$suggestSolution = "PRG0_PRU1_GPO12"; -endat1.PRU_ICSSG0_PRU.GPO6.$suggestSolution = "PRG0_PRU1_GPO6"; -endat1.PRU_ICSSG0_PRU.GPI11.$suggestSolution = "PRG0_PRU1_GPO11"; diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/main.c b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/main.c deleted file mode 100644 index de5e3bb..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/main.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (C) 2018-2021 Texas Instruments Incorporated - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * Neither the name of Texas Instruments Incorporated nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include "ti_drivers_config.h" -#include "ti_board_config.h" -#include "FreeRTOS.h" -#include "task.h" - -#define MAIN_TASK_PRI (5) - -#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) -StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); - -StaticTask_t gMainTaskObj; -TaskHandle_t gMainTask; - -void bissc_main(void *args); - -void freertos_main(void *args) -{ - bissc_main(NULL); - - vTaskDelete(NULL); -} - - -int main(void) -{ - /* init SOC specific modules */ - System_init(); - Board_init(); - - /* This task is created at highest priority, it should create more tasks and then delete itself */ - gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ - "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ - MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ - NULL, /* We are not using the task parameter. */ - MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ - gMainTaskStack, /* pointer to stack base */ - &gMainTaskObj ); /* pointer to statically allocated task object memory */ - configASSERT(gMainTask != NULL); - - /* Start the scheduler to start the tasks executing. */ - vTaskStartScheduler(); - - /* The following line should never be reached because vTaskStartScheduler() - will only return if there was not enough FreeRTOS heap memory available to - create the Idle and (if configured) Timer tasks. Heap management, and - techniques for trapping heap exhaustion, are described in the book text. */ - DebugP_assertNoLog(0); - - return 0; -} diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec deleted file mode 100644 index 16d1992..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec +++ /dev/null @@ -1,114 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd deleted file mode 100644 index 69640f4..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ /dev/null @@ -1,148 +0,0 @@ - -/* This is the stack that is used by code running within main() - * In case of NORTOS, - * - This means all the code outside of ISR uses this stack - * In case of FreeRTOS - * - This means all the code until vTaskStartScheduler() is called in main() - * uses this stack. - * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack - */ ---stack_size=16384 -/* This is the heap size for malloc() API in NORTOS and FreeRTOS - * This is also the heap used by pvPortMalloc in FreeRTOS - */ ---heap_size=32768 --e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ - -/* This is the size of stack when R5 is in IRQ mode - * In NORTOS, - * - Here interrupt nesting is enabled - * - This is the stack used by ISRs registered as type IRQ - * In FreeRTOS, - * - Here interrupt nesting is disabled - * - This is stack that is used initally when a IRQ is received - * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks - * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more - */ -__IRQ_STACK_SIZE = 256; -/* This is the size of stack when R5 is in IRQ mode - * - In both NORTOS and FreeRTOS nesting is disabled for FIQ - */ -__FIQ_STACK_SIZE = 256; -__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ -__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ -__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ - -SECTIONS -{ - /* This has the R5F entry point and vector table, this MUST be at 0x0 */ - .vectors:{} palign(8) > R5F_VECS - - /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 - * i.e this cannot be placed in DDR - */ - GROUP { - .text.hwi: palign(8) - .text.cache: palign(8) - .text.mpu: palign(8) - .text.boot: palign(8) - .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ - } > MSRAM - - /* This is rest of code. This can be placed in DDR if DDR is available and needed */ - GROUP { - .text: {} palign(8) /* This is where code resides */ - .rodata: {} palign(8) /* This is where const's go */ - } > MSRAM - - /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ - GROUP { - .data: {} palign(8) /* This is where initialized globals and static go */ - } > MSRAM - - /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ - GROUP { - .bss: {} palign(8) /* This is where uninitialized globals go */ - RUN_START(__BSS_START) - RUN_END(__BSS_END) - .sysmem: {} palign(8) /* This is where the malloc heap goes */ - .stack: {} palign(8) /* This is where the main() stack goes */ - } > MSRAM - - /* This is where the stacks for different R5F modes go */ - GROUP { - .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) - RUN_START(__IRQ_STACK_START) - RUN_END(__IRQ_STACK_END) - .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) - RUN_START(__FIQ_STACK_START) - RUN_END(__FIQ_STACK_END) - .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) - RUN_START(__SVC_STACK_START) - RUN_END(__SVC_STACK_END) - .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) - RUN_START(__ABORT_STACK_START) - RUN_END(__ABORT_STACK_END) - .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) - RUN_START(__UNDEFINED_STACK_START) - RUN_END(__UNDEFINED_STACK_END) - } > MSRAM - - /* Sections needed for C++ projects */ - GROUP { - .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ - .init_array: {} palign(8) /* Contains function pointers called before main */ - .fini_array: {} palign(8) /* Contains function pointers called after main */ - } > MSRAM - - /* General purpose user shared memory, used in some examples */ - .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM - /* this is used when Debug log's to shared memory are enabled, else this is not used */ - .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM - /* this is used only when IPC RPMessage is enabled, else this is not used */ - .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM - /* General purpose non cacheable memory, used in some examples */ - .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM -} - -/* -NOTE: Below memory is reserved for DMSC usage - - During Boot till security handoff is complete - 0x701E0000 - 0x701FFFFF (128KB) - - After "Security Handoff" is complete (i.e at run time) - 0x701F4000 - 0x701FFFFF (48KB) - - Security handoff is complete when this message is sent to the DMSC, - TISCI_MSG_SEC_HANDOVER - - This should be sent once all cores are loaded and all application - specific firewall calls are setup. -*/ - -MEMORY -{ - R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 - R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 - R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 - - /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ - NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 - - /* when using multi-core application's i.e more than one R5F/M4F active, make sure - * this memory does not overlap with other R5F's - */ - MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 - - /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with - * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable - */ - FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 - - /* shared memory segments */ - /* On R5F, - * - make sure there is a MPU entry which maps below regions as non-cache - */ - USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 - LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 - RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 -} diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile deleted file mode 100644 index 0d2e157..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile +++ /dev/null @@ -1,308 +0,0 @@ -# -# Auto generated makefile -# - -export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../..) -include $(MOTOR_CONTROL_SDK_PATH)/imports.mak -include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak - -CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) - -CC=$(CG_TOOL_ROOT)/bin/tiarmclang -LNK=$(CG_TOOL_ROOT)/bin/tiarmclang -STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip -OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy -ifeq ($(OS), Windows_NT) - PYTHON=python -else - PYTHON=python3 -endif - -PROFILE?=release -ConfigName:=$(PROFILE) - -OUTNAME:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).out - -BOOTIMAGE_PATH=$(abspath .) -BOOTIMAGE_NAME:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).appimage -BOOTIMAGE_NAME_XIP:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).appimage_xip -BOOTIMAGE_NAME_SIGNED:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).appimage.signed -BOOTIMAGE_RPRC_NAME:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).rprc -BOOTIMAGE_RPRC_NAME_XIP:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).rprc_xip -BOOTIMAGE_RPRC_NAME_TMP:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).rprc_tmp -BOOTIMAGE_NAME_HS:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).appimage.hs -BOOTIMAGE_NAME_HS_FS:=bissc_diagnostic_multi_channel_load_share.$(PROFILE).appimage.hs_fs -TARGETS := $(BOOTIMAGE_NAME) -ifeq ($(DEVICE_TYPE), HS) - TARGETS += $(BOOTIMAGE_NAME_HS) -endif - -FILES_common := \ - bissc_diagnostic.c \ - main.c \ - ti_drivers_config.c \ - ti_drivers_open_close.c \ - ti_board_config.c \ - ti_board_open_close.c \ - ti_dpl_config.c \ - ti_pinmux_config.c \ - ti_power_clock_config.c \ - -FILES_PATH_common = \ - .. \ - ../../../.. \ - generated \ - -INCLUDES_common := \ - -I${CG_TOOL_ROOT}/include/c \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ - -I${MOTOR_CONTROL_SDK_PATH}/source \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ - -Igenerated \ - -DEFINES_common := \ - -DSOC_AM243X \ - -DSOC_AM243X \ - -CFLAGS_common := \ - -mcpu=cortex-r5 \ - -mfloat-abi=hard \ - -mfpu=vfpv3-d16 \ - -mthumb \ - -Wall \ - -Werror \ - -g \ - -Wno-gnu-variable-sized-type-not-at-end \ - -Wno-unused-function \ - -CFLAGS_cpp_common := \ - -Wno-c99-designator \ - -Wno-extern-c-compat \ - -Wno-c++11-narrowing \ - -Wno-reorder-init-list \ - -Wno-deprecated-register \ - -Wno-writable-strings \ - -Wno-enum-compare \ - -Wno-reserved-user-defined-literal \ - -Wno-unused-const-variable \ - -x c++ \ - -CFLAGS_debug := \ - -D_DEBUG_=1 \ - -CFLAGS_release := \ - -Os \ - -LNK_FILES_common = \ - linker.cmd \ - -LIBS_PATH_common = \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/position_sense/bissc/lib \ - -Wl,-i${CG_TOOL_ROOT}/lib \ - -LIBS_common = \ - -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -lmotorcontrol_bissc.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -llibc.a \ - -llibsysbm.a \ - -LFLAGS_common = \ - -Wl,--diag_suppress=10063 \ - -Wl,--ram_model \ - -Wl,--reread_libs \ - - -LIBS_NAME = \ - freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - motorcontrol_bissc.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - libc.a \ - libsysbm.a \ - -LIBS_PATH_NAME = \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ - ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/bissc/lib \ - ${CG_TOOL_ROOT}/lib \ - -FILES := $(FILES_common) $(FILES_$(PROFILE)) -ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) -FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) -CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) -DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) -INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) -LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) -LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) -LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) -LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) -LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) - -OBJDIR := obj/$(PROFILE)/ -OBJS := $(FILES:%.c=%.obj) -OBJS += $(ASMFILES:%.S=%.obj) -DEPS := $(FILES:%.c=%.d) - -vpath %.obj $(OBJDIR) -vpath %.c $(FILES_PATH) -vpath %.S $(FILES_PATH) -vpath %.lib $(LIBS_PATH_NAME) -vpath %.a $(LIBS_PATH_NAME) - -$(OBJDIR)/%.obj %.obj: %.c - @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< - $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< - -$(OBJDIR)/%.obj %.obj: %.S - @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< - $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< - -all: $(TARGETS) - -SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h -SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h -SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h -SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c -SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h -SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h - -$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) - @echo . - @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... - $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) - @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! - @echo . - -clean: - @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... - $(RMDIR) $(OBJDIR) - $(RM) $(OUTNAME) - $(RM) $(BOOTIMAGE_NAME) - $(RM) $(BOOTIMAGE_NAME_XIP) - $(RM) $(BOOTIMAGE_NAME_SIGNED) - $(RM) $(BOOTIMAGE_NAME_HS) - $(RM) $(BOOTIMAGE_NAME_HS_FS) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) - $(RMDIR) generated/ - -scrub: - @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang bissc_diagnostic_multi_channel_load_share ... - $(RMDIR) obj -ifeq ($(OS),Windows_NT) - $(RM) \*.out - $(RM) \*.map - $(RM) \*.appimage* - $(RM) \*.rprc* - $(RM) \*.tiimage* - $(RM) \*.bin -else - $(RM) *.out - $(RM) *.map - $(RM) *.appimage* - $(RM) *.rprc* - $(RM) *.tiimage* - $(RM) *.bin -endif - $(RMDIR) generated - -$(OBJS): | $(OBJDIR) - -$(OBJDIR): - $(MKDIR) $@ - - -.NOTPARALLEL: - -.INTERMEDIATE: syscfg -$(SYSCFG_GEN_FILES): syscfg - -syscfg: ../example.syscfg - @echo Generating SysConfig files ... - $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg - -syscfg-gui: - $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg - -# -# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) -# -ifeq ($(OS),Windows_NT) -EXE_EXT=.exe -endif -ifeq ($(OS),Windows_NT) - BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 -else - BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh -endif -BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt - -BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) - -BOOTIMAGE_CORE_ID_r5fss0-0 = 4 -BOOTIMAGE_CORE_ID_r5fss0-1 = 5 -BOOTIMAGE_CORE_ID_r5fss1-0 = 6 -BOOTIMAGE_CORE_ID_r5fss1-1 = 7 -BOOTIMAGE_CORE_ID_m4fss0-0 = 14 -SBL_RUN_ADDRESS=0x70000000 -SBL_DEV_ID=55 - -MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js -OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js -APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py - -ifeq ($(OS),Windows_NT) - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe -else - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out -endif - -MULTI_CORE_IMAGE_PARAMS = \ - $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -MULTI_CORE_IMAGE_PARAMS_XIP = \ - $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -$(BOOTIMAGE_NAME): $(OUTNAME) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... -ifneq ($(OS),Windows_NT) - $(CHMOD) a+x $(XIPGEN_CMD) -endif - $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) -# Sign the appimage for HS-FS using appimage signing script - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) - $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! - @echo . - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! - @echo . - -$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) -ifeq ($(DEVICE_TYPE), HS) -# Sign the appimage using appimage signing script -ifeq ($(ENC_ENABLED),no) - @echo Boot image signing: Encryption is disabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) -else - @echo Boot image signing: Encryption is enabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) - $(RM) $(BOOTIMAGE_NAME)-enc -endif - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! - @echo . -endif --include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen deleted file mode 100644 index 8666cfd..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen +++ /dev/null @@ -1,106 +0,0 @@ -# -# Auto generated makefile -# - -# Below variables need to be defined outside this file or via command line -# - MOTOR_CONTROL_SDK_PATH -# - PROFILE -# - CG_TOOL_ROOT -# - OUTNAME -# - CCS_INSTALL_DIR -# - CCS_IDE_MODE - -CCS_PATH=$(CCS_INSTALL_DIR) -include ${MOTOR_CONTROL_SDK_PATH}/imports.mak -include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak - -STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip -OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy -ifeq ($(OS), Windows_NT) - PYTHON=python -else - PYTHON=python3 -endif - -OUTFILE=$(PROFILE)/$(OUTNAME).out -BOOTIMAGE_PATH=$(abspath ${PROFILE}) -BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage -BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip -BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed -BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc -BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip -BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp - -# -# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) -# -ifeq ($(OS),Windows_NT) -EXE_EXT=.exe -endif -ifeq ($(OS),Windows_NT) - BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 -else - BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh -endif -BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt - -BOOTIMAGE_CORE_ID_r5fss0-0 = 4 -BOOTIMAGE_CORE_ID_r5fss0-1 = 5 -BOOTIMAGE_CORE_ID_r5fss1-0 = 6 -BOOTIMAGE_CORE_ID_r5fss1-1 = 7 -BOOTIMAGE_CORE_ID_m4fss0-0 = 14 -SBL_RUN_ADDRESS=0x70000000 -SBL_DEV_ID=55 - -MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js -OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js -APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py - -ifeq ($(OS),Windows_NT) - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe -else - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out -endif - -MULTI_CORE_IMAGE_PARAMS = \ - $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -MULTI_CORE_IMAGE_PARAMS_XIP = \ - $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -all: -ifeq ($(CCS_IDE_MODE),cloud) -# No post build steps -else - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... - $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) - $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) -# Sign the appimage for HS-FS using appimage signing script - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs -ifeq ($(DEVICE_TYPE),HS) -# Sign the appimage using appimage signing script -ifeq ($(ENC_ENABLED),no) - @echo Boot image signing: Encryption is disabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs -else - @echo Boot image signing: Encryption is enabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs - $(RM) $(BOOTIMAGE_NAME)-enc -endif -endif - $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! - @echo . -ifeq ($(DEVICE_TYPE),HS) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! - @echo . -else - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! - @echo . -endif -endif diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec deleted file mode 100644 index f640159..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec +++ /dev/null @@ -1,20 +0,0 @@ -# -# Auto generated makefile -# - -export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../..) -include $(MOTOR_CONTROL_SDK_PATH)/imports.mak - -PROFILE?=Release - -PROJECT_NAME=bissc_diagnostic_multi_channel_load_share_am243x-evm_r5fss0-0_freertos_ti-arm-clang - -all: - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) - -clean: - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean - -export: - $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs deleted file mode 100644 index c2be5da..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs +++ /dev/null @@ -1,8 +0,0 @@ -/* - * ======== syscfg_c.rov.xs ======== - * This file contains the information needed by the Runtime Object - * View (ROV) tool. - */ -var crovFiles = [ - "mcu_plus_sdk/kernel/freertos/rov/FreeRTOS.rov.js", -]; diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-lp/r5fss0-0_freertos/example.syscfg index 879ae4d..fdddb21 100644 --- a/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-lp/r5fss0-0_freertos/example.syscfg +++ b/examples/position_sense/bissc_diagnostic/multi_channel_load_share/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -13,8 +13,6 @@ const gpio1 = gpio.addInstance(); const gpio2 = gpio.addInstance(); const gpio3 = gpio.addInstance(); const gpio4 = gpio.addInstance(); -const gpio5 = gpio.addInstance(); -const gpio6 = gpio.addInstance(); const debug_log = scripting.addModule("/kernel/dpl/debug_log"); const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); const mpu_armv71 = mpu_armv7.addInstance(); @@ -59,45 +57,36 @@ mpu_armv75.size = 28; mpu_armv75.accessPermissions = "Supervisor RD, User RD"; bissc1.$name = "CONFIG_BISSC0"; +bissc1.Multi_Channel_Load_Share = true; bissc1.Booster_Pack = true; bissc1.channel_2 = true; -bissc1.Multi_Channel_Load_Share = true; bissc1.PRU_ICSSG0_PRU.$assign = "PRU_ICSSG0_PRU1"; bissc1.PRU_ICSSG0_PRU.GPO4.$used = false; bissc1.PRU_ICSSG0_PRU.GPO3.$used = false; bissc1.PRU_ICSSG0_PRU.GPI14.$used = false; -bissc1.ENC1_EN = gpio1; -gpio1.$name = "ENC1_EN"; -gpio1.GPIO.$assign = "GPIO1"; -gpio1.GPIO.gpioPin.pu_pd = "pu"; -gpio1.GPIO.gpioPin.rx = false; +gpio1.$name = "BISSC_CH0_OUT_EN"; +bissc1.BISSC_CH0_OUT_EN = gpio1; +gpio1.GPIO.gpioPin.rx = false; +gpio1.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; -bissc1.BISSC_CH0_OUT_EN = gpio2; -gpio2.$name = "BISSC_CH0_OUT_EN"; +gpio2.pinDir = "OUTPUT"; +gpio2.$name = "BISSC_CH2_OUT_EN"; +bissc1.BISSC_CH2_OUT_EN = gpio2; gpio2.GPIO.gpioPin.rx = false; -gpio2.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; +gpio2.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO8"; -bissc1.BISSC_CH2_OUT_EN = gpio3; -gpio3.$name = "BISSC_CH2_OUT_EN"; +gpio3.pinDir = "OUTPUT"; +gpio3.$name = "ENC2_EN"; +bissc1.ENC2_EN = gpio3; +gpio3.GPIO.gpioPin.pu_pd = "pu"; gpio3.GPIO.gpioPin.rx = false; -gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO8"; +gpio3.GPIO.gpioPin.$assign = "MMC1_SDCD"; -bissc1.ENC2_EN = gpio4; -gpio4.$name = "ENC2_EN"; -gpio4.GPIO.gpioPin.pu_pd = "pu"; -gpio4.GPIO.gpioPin.rx = false; -gpio4.GPIO.gpioPin.$assign = "MMC1_SDCD"; - -bissc1.BISSC_CH1_OUT_EN = gpio5; -gpio5.$name = "BISSC_CH1_OUT_EN"; -gpio5.GPIO.gpioPin.rx = false; -gpio5.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO5"; - -gpio6.$name = "ENC0_EN"; -gpio6.pinDir = "OUTPUT"; -bissc1.ENC0_EN = gpio6; -gpio6.GPIO.gpioPin.$assign = "MMC1_SDWP"; +gpio4.$name = "ENC0_EN"; +gpio4.pinDir = "OUTPUT"; +bissc1.ENC0_EN = gpio4; +gpio4.GPIO.gpioPin.$assign = "MMC1_SDWP"; const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); const pruicss1 = pruicss.addInstance({}, false); @@ -118,9 +107,7 @@ bissc1.PRU_ICSSG0_PRU.GPI13.$suggestSolution = "PRG0_PRU1_GPO13"; bissc1.PRU_ICSSG0_PRU.GPO12.$suggestSolution = "PRG0_PRU1_GPO12"; bissc1.PRU_ICSSG0_PRU.GPO6.$suggestSolution = "PRG0_PRU1_GPO6"; bissc1.PRU_ICSSG0_PRU.GPI11.$suggestSolution = "PRG0_PRU1_GPO11"; -gpio1.GPIO.gpioPin.$suggestSolution = "PRG0_PRU0_GPO0"; +gpio1.GPIO.$suggestSolution = "GPIO1"; gpio2.GPIO.$suggestSolution = "GPIO1"; gpio3.GPIO.$suggestSolution = "GPIO1"; gpio4.GPIO.$suggestSolution = "GPIO1"; -gpio5.GPIO.$suggestSolution = "GPIO1"; -gpio6.GPIO.$suggestSolution = "GPIO1"; diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/example.syscfg deleted file mode 100644 index 86efa4a..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/example.syscfg +++ /dev/null @@ -1,101 +0,0 @@ -/** - * These arguments were used when this file was generated. They will be automatically applied on subsequent loads - * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. - * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00" - * @versions {"tool":"1.18.0+3266"} - */ - -/** - * Import the modules used in this configuration. - */ -const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false); -const i2c1 = i2c.addInstance(); -const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); -const pruicss1 = pruicss.addInstance(); -const debug_log = scripting.addModule("/kernel/dpl/debug_log"); -const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); -const mpu_armv71 = mpu_armv7.addInstance(); -const mpu_armv72 = mpu_armv7.addInstance(); -const mpu_armv73 = mpu_armv7.addInstance(); -const mpu_armv74 = mpu_armv7.addInstance(); -const mpu_armv75 = mpu_armv7.addInstance(); -const mpu_armv76 = mpu_armv7.addInstance(); -const timer = scripting.addModule("/kernel/dpl/timer", {}, false); -const timer1 = timer.addInstance(); -const endat = scripting.addModule("/position_sense/endat", {}, false); -const endat1 = endat.addInstance(); - -/** - * Write custom configuration values to the imported modules. - */ -i2c1.$name = "CONFIG_I2C0"; -i2c1.I2C.$assign = "I2C1"; - -debug_log.enableCssLog = false; -debug_log.enableUartLog = true; -debug_log.uartLog.$name = "CONFIG_UART0"; - -mpu_armv71.$name = "CONFIG_MPU_REGION0"; -mpu_armv71.size = 31; -mpu_armv71.attributes = "Device"; -mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv72.$name = "CONFIG_MPU_REGION1"; -mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; -mpu_armv72.size = 15; - -mpu_armv73.$name = "CONFIG_MPU_REGION2"; -mpu_armv73.size = 15; -mpu_armv73.baseAddr = 0x41010000; -mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv74.$name = "CONFIG_MPU_REGION3"; -mpu_armv74.size = 21; -mpu_armv74.baseAddr = 0x70000000; -mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv75.$name = "CONFIG_MPU_REGION4"; -mpu_armv75.size = 28; -mpu_armv75.baseAddr = 0x60000000; -mpu_armv75.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv76.$name = "CONFIG_MPU_REGION5"; -mpu_armv76.size = 31; -mpu_armv76.baseAddr = 0x80000000; - -timer1.$name = "CONFIG_TIMER0"; -timer1.timerCallback = "endat_position_loop"; -timer1.intrPriority = 0; -timer1.TIMER.$assign = "DMTIMER0"; - -endat1.$name = "CONFIG_ENDAT0"; -endat1.Channel_1 = true; -endat1.Channel_2 = true; -endat1.PRU_ICSSG0_PRU.$assign = "PRU_ICSSG0_PRU1"; - -pruicss1.$name = "CONFIG_PRU_ICSS0"; -endat1.pru = pruicss1; -pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; - -/** - * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future - * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to - * re-solve from scratch. - */ -i2c1.I2C.SCL.$suggestSolution = "I2C1_SCL"; -i2c1.I2C.SDA.$suggestSolution = "I2C1_SDA"; -debug_log.uartLog.UART.$suggestSolution = "USART0"; -debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; -debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; -endat1.PRU_ICSSG0_PRU.GPO2.$suggestSolution = "PRG0_PRU1_GPO2"; -endat1.PRU_ICSSG0_PRU.GPO1.$suggestSolution = "PRG0_PRU1_GPO1"; -endat1.PRU_ICSSG0_PRU.GPO0.$suggestSolution = "PRG0_PRU1_GPO0"; -endat1.PRU_ICSSG0_PRU.GPI13.$suggestSolution = "PRG0_PRU1_GPO13"; -endat1.PRU_ICSSG0_PRU.GPO5.$suggestSolution = "PRG0_PRU1_GPO5"; -endat1.PRU_ICSSG0_PRU.GPO4.$suggestSolution = "PRG0_PRU1_GPO4"; -endat1.PRU_ICSSG0_PRU.GPO3.$suggestSolution = "PRG0_PRU1_GPO3"; -endat1.PRU_ICSSG0_PRU.GPI14.$suggestSolution = "PRG0_PRU1_GPO14"; -endat1.PRU_ICSSG0_PRU.GPO8.$suggestSolution = "PRG0_PRU1_GPO8"; -endat1.PRU_ICSSG0_PRU.GPO12.$suggestSolution = "PRG0_PRU1_GPO12"; -endat1.PRU_ICSSG0_PRU.GPO6.$suggestSolution = "PRG0_PRU1_GPO6"; -endat1.PRU_ICSSG0_PRU.GPI11.$suggestSolution = "PRG0_PRU1_GPO11"; diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/main.c b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/main.c deleted file mode 100644 index de5e3bb..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/main.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (C) 2018-2021 Texas Instruments Incorporated - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * Neither the name of Texas Instruments Incorporated nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include "ti_drivers_config.h" -#include "ti_board_config.h" -#include "FreeRTOS.h" -#include "task.h" - -#define MAIN_TASK_PRI (5) - -#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) -StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); - -StaticTask_t gMainTaskObj; -TaskHandle_t gMainTask; - -void bissc_main(void *args); - -void freertos_main(void *args) -{ - bissc_main(NULL); - - vTaskDelete(NULL); -} - - -int main(void) -{ - /* init SOC specific modules */ - System_init(); - Board_init(); - - /* This task is created at highest priority, it should create more tasks and then delete itself */ - gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ - "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ - MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ - NULL, /* We are not using the task parameter. */ - MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ - gMainTaskStack, /* pointer to stack base */ - &gMainTaskObj ); /* pointer to statically allocated task object memory */ - configASSERT(gMainTask != NULL); - - /* Start the scheduler to start the tasks executing. */ - vTaskStartScheduler(); - - /* The following line should never be reached because vTaskStartScheduler() - will only return if there was not enough FreeRTOS heap memory available to - create the Idle and (if configured) Timer tasks. Heap management, and - techniques for trapping heap exhaustion, are described in the book text. */ - DebugP_assertNoLog(0); - - return 0; -} diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec deleted file mode 100644 index 33ef666..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec +++ /dev/null @@ -1,114 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd deleted file mode 100644 index 69640f4..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ /dev/null @@ -1,148 +0,0 @@ - -/* This is the stack that is used by code running within main() - * In case of NORTOS, - * - This means all the code outside of ISR uses this stack - * In case of FreeRTOS - * - This means all the code until vTaskStartScheduler() is called in main() - * uses this stack. - * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack - */ ---stack_size=16384 -/* This is the heap size for malloc() API in NORTOS and FreeRTOS - * This is also the heap used by pvPortMalloc in FreeRTOS - */ ---heap_size=32768 --e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ - -/* This is the size of stack when R5 is in IRQ mode - * In NORTOS, - * - Here interrupt nesting is enabled - * - This is the stack used by ISRs registered as type IRQ - * In FreeRTOS, - * - Here interrupt nesting is disabled - * - This is stack that is used initally when a IRQ is received - * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks - * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more - */ -__IRQ_STACK_SIZE = 256; -/* This is the size of stack when R5 is in IRQ mode - * - In both NORTOS and FreeRTOS nesting is disabled for FIQ - */ -__FIQ_STACK_SIZE = 256; -__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ -__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ -__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ - -SECTIONS -{ - /* This has the R5F entry point and vector table, this MUST be at 0x0 */ - .vectors:{} palign(8) > R5F_VECS - - /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 - * i.e this cannot be placed in DDR - */ - GROUP { - .text.hwi: palign(8) - .text.cache: palign(8) - .text.mpu: palign(8) - .text.boot: palign(8) - .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ - } > MSRAM - - /* This is rest of code. This can be placed in DDR if DDR is available and needed */ - GROUP { - .text: {} palign(8) /* This is where code resides */ - .rodata: {} palign(8) /* This is where const's go */ - } > MSRAM - - /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ - GROUP { - .data: {} palign(8) /* This is where initialized globals and static go */ - } > MSRAM - - /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ - GROUP { - .bss: {} palign(8) /* This is where uninitialized globals go */ - RUN_START(__BSS_START) - RUN_END(__BSS_END) - .sysmem: {} palign(8) /* This is where the malloc heap goes */ - .stack: {} palign(8) /* This is where the main() stack goes */ - } > MSRAM - - /* This is where the stacks for different R5F modes go */ - GROUP { - .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) - RUN_START(__IRQ_STACK_START) - RUN_END(__IRQ_STACK_END) - .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) - RUN_START(__FIQ_STACK_START) - RUN_END(__FIQ_STACK_END) - .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) - RUN_START(__SVC_STACK_START) - RUN_END(__SVC_STACK_END) - .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) - RUN_START(__ABORT_STACK_START) - RUN_END(__ABORT_STACK_END) - .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) - RUN_START(__UNDEFINED_STACK_START) - RUN_END(__UNDEFINED_STACK_END) - } > MSRAM - - /* Sections needed for C++ projects */ - GROUP { - .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ - .init_array: {} palign(8) /* Contains function pointers called before main */ - .fini_array: {} palign(8) /* Contains function pointers called after main */ - } > MSRAM - - /* General purpose user shared memory, used in some examples */ - .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM - /* this is used when Debug log's to shared memory are enabled, else this is not used */ - .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM - /* this is used only when IPC RPMessage is enabled, else this is not used */ - .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM - /* General purpose non cacheable memory, used in some examples */ - .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM -} - -/* -NOTE: Below memory is reserved for DMSC usage - - During Boot till security handoff is complete - 0x701E0000 - 0x701FFFFF (128KB) - - After "Security Handoff" is complete (i.e at run time) - 0x701F4000 - 0x701FFFFF (48KB) - - Security handoff is complete when this message is sent to the DMSC, - TISCI_MSG_SEC_HANDOVER - - This should be sent once all cores are loaded and all application - specific firewall calls are setup. -*/ - -MEMORY -{ - R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 - R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 - R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 - - /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ - NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 - - /* when using multi-core application's i.e more than one R5F/M4F active, make sure - * this memory does not overlap with other R5F's - */ - MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 - - /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with - * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable - */ - FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 - - /* shared memory segments */ - /* On R5F, - * - make sure there is a MPU entry which maps below regions as non-cache - */ - USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 - LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 - RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 -} diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile deleted file mode 100644 index 72d8220..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile +++ /dev/null @@ -1,308 +0,0 @@ -# -# Auto generated makefile -# - -export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../..) -include $(MOTOR_CONTROL_SDK_PATH)/imports.mak -include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak - -CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) - -CC=$(CG_TOOL_ROOT)/bin/tiarmclang -LNK=$(CG_TOOL_ROOT)/bin/tiarmclang -STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip -OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy -ifeq ($(OS), Windows_NT) - PYTHON=python -else - PYTHON=python3 -endif - -PROFILE?=release -ConfigName:=$(PROFILE) - -OUTNAME:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).out - -BOOTIMAGE_PATH=$(abspath .) -BOOTIMAGE_NAME:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).appimage -BOOTIMAGE_NAME_XIP:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).appimage_xip -BOOTIMAGE_NAME_SIGNED:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).appimage.signed -BOOTIMAGE_RPRC_NAME:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).rprc -BOOTIMAGE_RPRC_NAME_XIP:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).rprc_xip -BOOTIMAGE_RPRC_NAME_TMP:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).rprc_tmp -BOOTIMAGE_NAME_HS:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).appimage.hs -BOOTIMAGE_NAME_HS_FS:=bissc_diagnostic_multi_channel_single_pru.$(PROFILE).appimage.hs_fs -TARGETS := $(BOOTIMAGE_NAME) -ifeq ($(DEVICE_TYPE), HS) - TARGETS += $(BOOTIMAGE_NAME_HS) -endif - -FILES_common := \ - bissc_diagnostic.c \ - main.c \ - ti_drivers_config.c \ - ti_drivers_open_close.c \ - ti_board_config.c \ - ti_board_open_close.c \ - ti_dpl_config.c \ - ti_pinmux_config.c \ - ti_power_clock_config.c \ - -FILES_PATH_common = \ - .. \ - ../../../.. \ - generated \ - -INCLUDES_common := \ - -I${CG_TOOL_ROOT}/include/c \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ - -I${MOTOR_CONTROL_SDK_PATH}/source \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ - -Igenerated \ - -DEFINES_common := \ - -DSOC_AM243X \ - -DSOC_AM243X \ - -CFLAGS_common := \ - -mcpu=cortex-r5 \ - -mfloat-abi=hard \ - -mfpu=vfpv3-d16 \ - -mthumb \ - -Wall \ - -Werror \ - -g \ - -Wno-gnu-variable-sized-type-not-at-end \ - -Wno-unused-function \ - -CFLAGS_cpp_common := \ - -Wno-c99-designator \ - -Wno-extern-c-compat \ - -Wno-c++11-narrowing \ - -Wno-reorder-init-list \ - -Wno-deprecated-register \ - -Wno-writable-strings \ - -Wno-enum-compare \ - -Wno-reserved-user-defined-literal \ - -Wno-unused-const-variable \ - -x c++ \ - -CFLAGS_debug := \ - -D_DEBUG_=1 \ - -CFLAGS_release := \ - -Os \ - -LNK_FILES_common = \ - linker.cmd \ - -LIBS_PATH_common = \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/position_sense/bissc/lib \ - -Wl,-i${CG_TOOL_ROOT}/lib \ - -LIBS_common = \ - -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -lmotorcontrol_bissc.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -llibc.a \ - -llibsysbm.a \ - -LFLAGS_common = \ - -Wl,--diag_suppress=10063 \ - -Wl,--ram_model \ - -Wl,--reread_libs \ - - -LIBS_NAME = \ - freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - motorcontrol_bissc.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - libc.a \ - libsysbm.a \ - -LIBS_PATH_NAME = \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ - ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/bissc/lib \ - ${CG_TOOL_ROOT}/lib \ - -FILES := $(FILES_common) $(FILES_$(PROFILE)) -ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) -FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) -CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) -DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) -INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) -LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) -LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) -LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) -LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) -LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) - -OBJDIR := obj/$(PROFILE)/ -OBJS := $(FILES:%.c=%.obj) -OBJS += $(ASMFILES:%.S=%.obj) -DEPS := $(FILES:%.c=%.d) - -vpath %.obj $(OBJDIR) -vpath %.c $(FILES_PATH) -vpath %.S $(FILES_PATH) -vpath %.lib $(LIBS_PATH_NAME) -vpath %.a $(LIBS_PATH_NAME) - -$(OBJDIR)/%.obj %.obj: %.c - @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< - $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< - -$(OBJDIR)/%.obj %.obj: %.S - @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< - $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< - -all: $(TARGETS) - -SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h -SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h -SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h -SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c -SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h -SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h - -$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) - @echo . - @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... - $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) - @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! - @echo . - -clean: - @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... - $(RMDIR) $(OBJDIR) - $(RM) $(OUTNAME) - $(RM) $(BOOTIMAGE_NAME) - $(RM) $(BOOTIMAGE_NAME_XIP) - $(RM) $(BOOTIMAGE_NAME_SIGNED) - $(RM) $(BOOTIMAGE_NAME_HS) - $(RM) $(BOOTIMAGE_NAME_HS_FS) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) - $(RMDIR) generated/ - -scrub: - @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang bissc_diagnostic_multi_channel_single_pru ... - $(RMDIR) obj -ifeq ($(OS),Windows_NT) - $(RM) \*.out - $(RM) \*.map - $(RM) \*.appimage* - $(RM) \*.rprc* - $(RM) \*.tiimage* - $(RM) \*.bin -else - $(RM) *.out - $(RM) *.map - $(RM) *.appimage* - $(RM) *.rprc* - $(RM) *.tiimage* - $(RM) *.bin -endif - $(RMDIR) generated - -$(OBJS): | $(OBJDIR) - -$(OBJDIR): - $(MKDIR) $@ - - -.NOTPARALLEL: - -.INTERMEDIATE: syscfg -$(SYSCFG_GEN_FILES): syscfg - -syscfg: ../example.syscfg - @echo Generating SysConfig files ... - $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg - -syscfg-gui: - $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg - -# -# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) -# -ifeq ($(OS),Windows_NT) -EXE_EXT=.exe -endif -ifeq ($(OS),Windows_NT) - BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 -else - BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh -endif -BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt - -BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) - -BOOTIMAGE_CORE_ID_r5fss0-0 = 4 -BOOTIMAGE_CORE_ID_r5fss0-1 = 5 -BOOTIMAGE_CORE_ID_r5fss1-0 = 6 -BOOTIMAGE_CORE_ID_r5fss1-1 = 7 -BOOTIMAGE_CORE_ID_m4fss0-0 = 14 -SBL_RUN_ADDRESS=0x70000000 -SBL_DEV_ID=55 - -MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js -OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js -APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py - -ifeq ($(OS),Windows_NT) - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe -else - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out -endif - -MULTI_CORE_IMAGE_PARAMS = \ - $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -MULTI_CORE_IMAGE_PARAMS_XIP = \ - $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -$(BOOTIMAGE_NAME): $(OUTNAME) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... -ifneq ($(OS),Windows_NT) - $(CHMOD) a+x $(XIPGEN_CMD) -endif - $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) -# Sign the appimage for HS-FS using appimage signing script - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) - $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! - @echo . - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! - @echo . - -$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) -ifeq ($(DEVICE_TYPE), HS) -# Sign the appimage using appimage signing script -ifeq ($(ENC_ENABLED),no) - @echo Boot image signing: Encryption is disabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) -else - @echo Boot image signing: Encryption is enabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) - $(RM) $(BOOTIMAGE_NAME)-enc -endif - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! - @echo . -endif --include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen deleted file mode 100644 index 8666cfd..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen +++ /dev/null @@ -1,106 +0,0 @@ -# -# Auto generated makefile -# - -# Below variables need to be defined outside this file or via command line -# - MOTOR_CONTROL_SDK_PATH -# - PROFILE -# - CG_TOOL_ROOT -# - OUTNAME -# - CCS_INSTALL_DIR -# - CCS_IDE_MODE - -CCS_PATH=$(CCS_INSTALL_DIR) -include ${MOTOR_CONTROL_SDK_PATH}/imports.mak -include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak - -STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip -OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy -ifeq ($(OS), Windows_NT) - PYTHON=python -else - PYTHON=python3 -endif - -OUTFILE=$(PROFILE)/$(OUTNAME).out -BOOTIMAGE_PATH=$(abspath ${PROFILE}) -BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage -BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip -BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed -BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc -BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip -BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp - -# -# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) -# -ifeq ($(OS),Windows_NT) -EXE_EXT=.exe -endif -ifeq ($(OS),Windows_NT) - BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 -else - BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh -endif -BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt - -BOOTIMAGE_CORE_ID_r5fss0-0 = 4 -BOOTIMAGE_CORE_ID_r5fss0-1 = 5 -BOOTIMAGE_CORE_ID_r5fss1-0 = 6 -BOOTIMAGE_CORE_ID_r5fss1-1 = 7 -BOOTIMAGE_CORE_ID_m4fss0-0 = 14 -SBL_RUN_ADDRESS=0x70000000 -SBL_DEV_ID=55 - -MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js -OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js -APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py - -ifeq ($(OS),Windows_NT) - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe -else - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out -endif - -MULTI_CORE_IMAGE_PARAMS = \ - $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -MULTI_CORE_IMAGE_PARAMS_XIP = \ - $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -all: -ifeq ($(CCS_IDE_MODE),cloud) -# No post build steps -else - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... - $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) - $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) -# Sign the appimage for HS-FS using appimage signing script - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs -ifeq ($(DEVICE_TYPE),HS) -# Sign the appimage using appimage signing script -ifeq ($(ENC_ENABLED),no) - @echo Boot image signing: Encryption is disabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs -else - @echo Boot image signing: Encryption is enabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs - $(RM) $(BOOTIMAGE_NAME)-enc -endif -endif - $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! - @echo . -ifeq ($(DEVICE_TYPE),HS) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! - @echo . -else - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! - @echo . -endif -endif diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec deleted file mode 100644 index bedcefa..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec +++ /dev/null @@ -1,20 +0,0 @@ -# -# Auto generated makefile -# - -export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../..) -include $(MOTOR_CONTROL_SDK_PATH)/imports.mak - -PROFILE?=Release - -PROJECT_NAME=bissc_diagnostic_multi_channel_single_pru_am243x-evm_r5fss0-0_freertos_ti-arm-clang - -all: - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) - -clean: - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean - -export: - $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs deleted file mode 100644 index c2be5da..0000000 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs +++ /dev/null @@ -1,8 +0,0 @@ -/* - * ======== syscfg_c.rov.xs ======== - * This file contains the information needed by the Runtime Object - * View (ROV) tool. - */ -var crovFiles = [ - "mcu_plus_sdk/kernel/freertos/rov/FreeRTOS.rov.js", -]; diff --git a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/example.syscfg index 607338e..c796802 100644 --- a/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/example.syscfg +++ b/examples/position_sense/bissc_diagnostic/multi_channel_single_pru/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -13,8 +13,6 @@ const gpio1 = gpio.addInstance(); const gpio2 = gpio.addInstance(); const gpio3 = gpio.addInstance(); const gpio4 = gpio.addInstance(); -const gpio5 = gpio.addInstance(); -const gpio6 = gpio.addInstance(); const debug_log = scripting.addModule("/kernel/dpl/debug_log"); const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); const mpu_armv71 = mpu_armv7.addInstance(); @@ -59,44 +57,35 @@ mpu_armv75.size = 28; mpu_armv75.accessPermissions = "Supervisor RD, User RD"; bissc1.$name = "CONFIG_BISSC0"; -bissc1.Booster_Pack = true; bissc1.channel_2 = true; +bissc1.Booster_Pack = true; bissc1.PRU_ICSSG0_PRU.$assign = "PRU_ICSSG0_PRU1"; bissc1.PRU_ICSSG0_PRU.GPO4.$used = false; bissc1.PRU_ICSSG0_PRU.GPO3.$used = false; bissc1.PRU_ICSSG0_PRU.GPI14.$used = false; -bissc1.ENC1_EN = gpio1; -gpio1.$name = "ENC1_EN"; -gpio1.GPIO.$assign = "GPIO1"; -gpio1.GPIO.gpioPin.pu_pd = "pu"; -gpio1.GPIO.gpioPin.rx = false; +gpio1.$name = "BISSC_CH0_OUT_EN"; +bissc1.BISSC_CH0_OUT_EN = gpio1; +gpio1.GPIO.gpioPin.rx = false; +gpio1.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; -bissc1.BISSC_CH0_OUT_EN = gpio2; -gpio2.$name = "BISSC_CH0_OUT_EN"; +gpio2.pinDir = "OUTPUT"; +gpio2.$name = "BISSC_CH2_OUT_EN"; +bissc1.BISSC_CH2_OUT_EN = gpio2; gpio2.GPIO.gpioPin.rx = false; -gpio2.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; +gpio2.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO8"; -bissc1.BISSC_CH2_OUT_EN = gpio3; -gpio3.$name = "BISSC_CH2_OUT_EN"; +gpio3.pinDir = "OUTPUT"; +gpio3.$name = "ENC2_EN"; +bissc1.ENC2_EN = gpio3; +gpio3.GPIO.gpioPin.pu_pd = "pu"; gpio3.GPIO.gpioPin.rx = false; -gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO8"; +gpio3.GPIO.gpioPin.$assign = "MMC1_SDCD"; -bissc1.ENC2_EN = gpio4; -gpio4.$name = "ENC2_EN"; -gpio4.GPIO.gpioPin.pu_pd = "pu"; -gpio4.GPIO.gpioPin.rx = false; -gpio4.GPIO.gpioPin.$assign = "MMC1_SDCD"; - -bissc1.BISSC_CH1_OUT_EN = gpio5; -gpio5.$name = "BISSC_CH1_OUT_EN"; -gpio5.GPIO.gpioPin.rx = false; -gpio5.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO5"; - -gpio6.$name = "ENC0_EN"; -gpio6.pinDir = "OUTPUT"; -bissc1.ENC0_EN = gpio6; -gpio6.GPIO.gpioPin.$assign = "MMC1_SDWP"; +gpio4.$name = "ENC0_EN"; +gpio4.pinDir = "OUTPUT"; +bissc1.ENC0_EN = gpio4; +gpio4.GPIO.gpioPin.$assign = "MMC1_SDWP"; const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); const pruicss1 = pruicss.addInstance({}, false); @@ -117,9 +106,7 @@ bissc1.PRU_ICSSG0_PRU.GPI13.$suggestSolution = "PRG0_PRU1_GPO13"; bissc1.PRU_ICSSG0_PRU.GPO12.$suggestSolution = "PRG0_PRU1_GPO12"; bissc1.PRU_ICSSG0_PRU.GPO6.$suggestSolution = "PRG0_PRU1_GPO6"; bissc1.PRU_ICSSG0_PRU.GPI11.$suggestSolution = "PRG0_PRU1_GPO11"; -gpio1.GPIO.gpioPin.$suggestSolution = "PRG0_PRU0_GPO0"; +gpio1.GPIO.$suggestSolution = "GPIO1"; gpio2.GPIO.$suggestSolution = "GPIO1"; gpio3.GPIO.$suggestSolution = "GPIO1"; gpio4.GPIO.$suggestSolution = "GPIO1"; -gpio5.GPIO.$suggestSolution = "GPIO1"; -gpio6.GPIO.$suggestSolution = "GPIO1"; diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/example.syscfg b/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/example.syscfg deleted file mode 100644 index 2d7389b..0000000 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/example.syscfg +++ /dev/null @@ -1,76 +0,0 @@ -/** - * These arguments were used when this file was generated. They will be automatically applied on subsequent loads - * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. - * @cliArgs --device "AM243x_ALV_beta" --package "ALV" --part "ALV" --context "r5fss0-0" --product "MOTOR_CONTROL_SDK_AM243X@09.01.00" - * @versions {"tool":"1.18.0+3266"} - */ - -/** - * Import the modules used in this configuration. - */ -const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); -const pruicss1 = pruicss.addInstance(); -const debug_log = scripting.addModule("/kernel/dpl/debug_log"); -const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); -const mpu_armv71 = mpu_armv7.addInstance(); -const mpu_armv72 = mpu_armv7.addInstance(); -const mpu_armv73 = mpu_armv7.addInstance(); -const mpu_armv74 = mpu_armv7.addInstance(); -const mpu_armv75 = mpu_armv7.addInstance(); -const mpu_armv76 = mpu_armv7.addInstance(); -const bissc = scripting.addModule("/position_sense/bissc", {}, false); -const bissc1 = bissc.addInstance(); - -/** - * Write custom configuration values to the imported modules. - */ -debug_log.enableCssLog = false; -debug_log.enableUartLog = true; -debug_log.uartLog.$name = "CONFIG_UART0"; - -mpu_armv71.$name = "CONFIG_MPU_REGION0"; -mpu_armv71.size = 31; -mpu_armv71.attributes = "Device"; -mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv72.$name = "CONFIG_MPU_REGION1"; -mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; -mpu_armv72.size = 15; - -mpu_armv73.$name = "CONFIG_MPU_REGION2"; -mpu_armv73.size = 15; -mpu_armv73.baseAddr = 0x41010000; -mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv74.$name = "CONFIG_MPU_REGION3"; -mpu_armv74.size = 21; -mpu_armv74.baseAddr = 0x70000000; -mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv75.$name = "CONFIG_MPU_REGION4"; -mpu_armv75.size = 28; -mpu_armv75.baseAddr = 0x60000000; -mpu_armv75.accessPermissions = "Supervisor RD+WR, User RD"; - -mpu_armv76.$name = "CONFIG_MPU_REGION5"; -mpu_armv76.size = 31; -mpu_armv76.baseAddr = 0x80000000; - -bissc1.$name = "CONFIG_BISSC0"; - -pruicss1.$name = "CONFIG_PRU_ICSS0"; -bissc1.pru = pruicss1; -pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0"; - -/** - * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future - * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to - * re-solve from scratch. - */ -debug_log.uartLog.UART.$suggestSolution = "USART0"; -debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; -debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; -bissc1.PRU_ICSSG0_PRU.$suggestSolution = "PRU_ICSSG0_PRU1"; -bissc1.PRU_ICSSG0_PRU.GPO1.$suggestSolution = "PRG0_PRU1_GPO1"; -bissc1.PRU_ICSSG0_PRU.GPO0.$suggestSolution = "PRG0_PRU1_GPO0"; -bissc1.PRU_ICSSG0_PRU.GPI13.$suggestSolution = "PRG0_PRU1_GPO13"; diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/main.c b/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/main.c deleted file mode 100644 index de5e3bb..0000000 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/main.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (C) 2018-2021 Texas Instruments Incorporated - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * Neither the name of Texas Instruments Incorporated nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include "ti_drivers_config.h" -#include "ti_board_config.h" -#include "FreeRTOS.h" -#include "task.h" - -#define MAIN_TASK_PRI (5) - -#define MAIN_TASK_SIZE (16384U/sizeof(configSTACK_DEPTH_TYPE)) -StackType_t gMainTaskStack[MAIN_TASK_SIZE] __attribute__((aligned(32))); - -StaticTask_t gMainTaskObj; -TaskHandle_t gMainTask; - -void bissc_main(void *args); - -void freertos_main(void *args) -{ - bissc_main(NULL); - - vTaskDelete(NULL); -} - - -int main(void) -{ - /* init SOC specific modules */ - System_init(); - Board_init(); - - /* This task is created at highest priority, it should create more tasks and then delete itself */ - gMainTask = xTaskCreateStatic( freertos_main, /* Pointer to the function that implements the task. */ - "freertos_main", /* Text name for the task. This is to facilitate debugging only. */ - MAIN_TASK_SIZE, /* Stack depth in units of StackType_t typically uint32_t on 32b CPUs */ - NULL, /* We are not using the task parameter. */ - MAIN_TASK_PRI, /* task priority, 0 is lowest priority, configMAX_PRIORITIES-1 is highest */ - gMainTaskStack, /* pointer to stack base */ - &gMainTaskObj ); /* pointer to statically allocated task object memory */ - configASSERT(gMainTask != NULL); - - /* Start the scheduler to start the tasks executing. */ - vTaskStartScheduler(); - - /* The following line should never be reached because vTaskStartScheduler() - will only return if there was not enough FreeRTOS heap memory available to - create the Idle and (if configured) Timer tasks. Heap management, and - techniques for trapping heap exhaustion, are described in the book text. */ - DebugP_assertNoLog(0); - - return 0; -} diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec b/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec deleted file mode 100644 index beab966..0000000 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/example.projectspec +++ /dev/null @@ -1,114 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd b/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd deleted file mode 100644 index 69640f4..0000000 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/linker.cmd +++ /dev/null @@ -1,148 +0,0 @@ - -/* This is the stack that is used by code running within main() - * In case of NORTOS, - * - This means all the code outside of ISR uses this stack - * In case of FreeRTOS - * - This means all the code until vTaskStartScheduler() is called in main() - * uses this stack. - * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack - */ ---stack_size=16384 -/* This is the heap size for malloc() API in NORTOS and FreeRTOS - * This is also the heap used by pvPortMalloc in FreeRTOS - */ ---heap_size=32768 --e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ - -/* This is the size of stack when R5 is in IRQ mode - * In NORTOS, - * - Here interrupt nesting is enabled - * - This is the stack used by ISRs registered as type IRQ - * In FreeRTOS, - * - Here interrupt nesting is disabled - * - This is stack that is used initally when a IRQ is received - * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks - * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more - */ -__IRQ_STACK_SIZE = 256; -/* This is the size of stack when R5 is in IRQ mode - * - In both NORTOS and FreeRTOS nesting is disabled for FIQ - */ -__FIQ_STACK_SIZE = 256; -__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ -__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ -__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ - -SECTIONS -{ - /* This has the R5F entry point and vector table, this MUST be at 0x0 */ - .vectors:{} palign(8) > R5F_VECS - - /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 - * i.e this cannot be placed in DDR - */ - GROUP { - .text.hwi: palign(8) - .text.cache: palign(8) - .text.mpu: palign(8) - .text.boot: palign(8) - .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ - } > MSRAM - - /* This is rest of code. This can be placed in DDR if DDR is available and needed */ - GROUP { - .text: {} palign(8) /* This is where code resides */ - .rodata: {} palign(8) /* This is where const's go */ - } > MSRAM - - /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ - GROUP { - .data: {} palign(8) /* This is where initialized globals and static go */ - } > MSRAM - - /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ - GROUP { - .bss: {} palign(8) /* This is where uninitialized globals go */ - RUN_START(__BSS_START) - RUN_END(__BSS_END) - .sysmem: {} palign(8) /* This is where the malloc heap goes */ - .stack: {} palign(8) /* This is where the main() stack goes */ - } > MSRAM - - /* This is where the stacks for different R5F modes go */ - GROUP { - .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) - RUN_START(__IRQ_STACK_START) - RUN_END(__IRQ_STACK_END) - .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) - RUN_START(__FIQ_STACK_START) - RUN_END(__FIQ_STACK_END) - .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) - RUN_START(__SVC_STACK_START) - RUN_END(__SVC_STACK_END) - .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) - RUN_START(__ABORT_STACK_START) - RUN_END(__ABORT_STACK_END) - .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) - RUN_START(__UNDEFINED_STACK_START) - RUN_END(__UNDEFINED_STACK_END) - } > MSRAM - - /* Sections needed for C++ projects */ - GROUP { - .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ - .init_array: {} palign(8) /* Contains function pointers called before main */ - .fini_array: {} palign(8) /* Contains function pointers called after main */ - } > MSRAM - - /* General purpose user shared memory, used in some examples */ - .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM - /* this is used when Debug log's to shared memory are enabled, else this is not used */ - .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM - /* this is used only when IPC RPMessage is enabled, else this is not used */ - .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM - /* General purpose non cacheable memory, used in some examples */ - .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM -} - -/* -NOTE: Below memory is reserved for DMSC usage - - During Boot till security handoff is complete - 0x701E0000 - 0x701FFFFF (128KB) - - After "Security Handoff" is complete (i.e at run time) - 0x701F4000 - 0x701FFFFF (48KB) - - Security handoff is complete when this message is sent to the DMSC, - TISCI_MSG_SEC_HANDOVER - - This should be sent once all cores are loaded and all application - specific firewall calls are setup. -*/ - -MEMORY -{ - R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 - R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 - R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 - - /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ - NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 - - /* when using multi-core application's i.e more than one R5F/M4F active, make sure - * this memory does not overlap with other R5F's - */ - MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 - - /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with - * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable - */ - FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 - - /* shared memory segments */ - /* On R5F, - * - make sure there is a MPU entry which maps below regions as non-cache - */ - USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 - LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 - RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 -} diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile b/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile deleted file mode 100644 index eac23e4..0000000 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile +++ /dev/null @@ -1,308 +0,0 @@ -# -# Auto generated makefile -# - -export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../..) -include $(MOTOR_CONTROL_SDK_PATH)/imports.mak -include $(MOTOR_CONTROL_SDK_PATH)/devconfig/devconfig.mak - -CG_TOOL_ROOT=$(CGT_TI_ARM_CLANG_PATH) - -CC=$(CG_TOOL_ROOT)/bin/tiarmclang -LNK=$(CG_TOOL_ROOT)/bin/tiarmclang -STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip -OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy -ifeq ($(OS), Windows_NT) - PYTHON=python -else - PYTHON=python3 -endif - -PROFILE?=release -ConfigName:=$(PROFILE) - -OUTNAME:=bissc_diagnostic_single_channel.$(PROFILE).out - -BOOTIMAGE_PATH=$(abspath .) -BOOTIMAGE_NAME:=bissc_diagnostic_single_channel.$(PROFILE).appimage -BOOTIMAGE_NAME_XIP:=bissc_diagnostic_single_channel.$(PROFILE).appimage_xip -BOOTIMAGE_NAME_SIGNED:=bissc_diagnostic_single_channel.$(PROFILE).appimage.signed -BOOTIMAGE_RPRC_NAME:=bissc_diagnostic_single_channel.$(PROFILE).rprc -BOOTIMAGE_RPRC_NAME_XIP:=bissc_diagnostic_single_channel.$(PROFILE).rprc_xip -BOOTIMAGE_RPRC_NAME_TMP:=bissc_diagnostic_single_channel.$(PROFILE).rprc_tmp -BOOTIMAGE_NAME_HS:=bissc_diagnostic_single_channel.$(PROFILE).appimage.hs -BOOTIMAGE_NAME_HS_FS:=bissc_diagnostic_single_channel.$(PROFILE).appimage.hs_fs -TARGETS := $(BOOTIMAGE_NAME) -ifeq ($(DEVICE_TYPE), HS) - TARGETS += $(BOOTIMAGE_NAME_HS) -endif - -FILES_common := \ - bissc_diagnostic.c \ - main.c \ - ti_drivers_config.c \ - ti_drivers_open_close.c \ - ti_board_config.c \ - ti_board_open_close.c \ - ti_dpl_config.c \ - ti_pinmux_config.c \ - ti_power_clock_config.c \ - -FILES_PATH_common = \ - .. \ - ../../../.. \ - generated \ - -INCLUDES_common := \ - -I${CG_TOOL_ROOT}/include/c \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source \ - -I${MOTOR_CONTROL_SDK_PATH}/source \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \ - -I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \ - -Igenerated \ - -DEFINES_common := \ - -DSOC_AM243X \ - -DSOC_AM243X \ - -CFLAGS_common := \ - -mcpu=cortex-r5 \ - -mfloat-abi=hard \ - -mfpu=vfpv3-d16 \ - -mthumb \ - -Wall \ - -Werror \ - -g \ - -Wno-gnu-variable-sized-type-not-at-end \ - -Wno-unused-function \ - -CFLAGS_cpp_common := \ - -Wno-c99-designator \ - -Wno-extern-c-compat \ - -Wno-c++11-narrowing \ - -Wno-reorder-init-list \ - -Wno-deprecated-register \ - -Wno-writable-strings \ - -Wno-enum-compare \ - -Wno-reserved-user-defined-literal \ - -Wno-unused-const-variable \ - -x c++ \ - -CFLAGS_debug := \ - -D_DEBUG_=1 \ - -CFLAGS_release := \ - -Os \ - -LNK_FILES_common = \ - linker.cmd \ - -LIBS_PATH_common = \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ - -Wl,-i${MOTOR_CONTROL_SDK_PATH}/source/position_sense/bissc/lib \ - -Wl,-i${CG_TOOL_ROOT}/lib \ - -LIBS_common = \ - -lfreertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -ldrivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -lboard.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -lmotorcontrol_bissc.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - -llibc.a \ - -llibsysbm.a \ - -LFLAGS_common = \ - -Wl,--diag_suppress=10063 \ - -Wl,--ram_model \ - -Wl,--reread_libs \ - - -LIBS_NAME = \ - freertos.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - drivers.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - board.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - motorcontrol_bissc.am243x.r5f.ti-arm-clang.${ConfigName}.lib \ - libc.a \ - libsysbm.a \ - -LIBS_PATH_NAME = \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/drivers/lib \ - ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/board/lib \ - ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/bissc/lib \ - ${CG_TOOL_ROOT}/lib \ - -FILES := $(FILES_common) $(FILES_$(PROFILE)) -ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE)) -FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE)) -CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE)) -DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE)) -INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE)) -LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) -LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE)) -LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE)) -LNKOPTFLAGS := $(LNKOPTFLAGS_common) $(LNKOPTFLAGS_$(PROFILE)) -LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE)) - -OBJDIR := obj/$(PROFILE)/ -OBJS := $(FILES:%.c=%.obj) -OBJS += $(ASMFILES:%.S=%.obj) -DEPS := $(FILES:%.c=%.d) - -vpath %.obj $(OBJDIR) -vpath %.c $(FILES_PATH) -vpath %.S $(FILES_PATH) -vpath %.lib $(LIBS_PATH_NAME) -vpath %.a $(LIBS_PATH_NAME) - -$(OBJDIR)/%.obj %.obj: %.c - @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME): $< - $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) -MMD -o $(OBJDIR)/$@ $< - -$(OBJDIR)/%.obj %.obj: %.S - @echo Compiling: am243x:r5fss0-0:freertos:ti-arm-clang $(LIBNAME): $< - $(CC) -c $(CFLAGS) -o $(OBJDIR)/$@ $< - -all: $(TARGETS) - -SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h -SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h -SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h -SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c -SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h -SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h - -$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME) - @echo . - @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ ... - $(LNK) $(LNKOPTFLAGS) $(LFLAGS) $(LIBS_PATH) -Wl,-m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES) - @echo Linking: am243x:r5fss0-0:freertos:ti-arm-clang $@ Done !!! - @echo . - -clean: - @echo Cleaning: am243x:r5fss0-0:freertos:ti-arm-clang $(OUTNAME) ... - $(RMDIR) $(OBJDIR) - $(RM) $(OUTNAME) - $(RM) $(BOOTIMAGE_NAME) - $(RM) $(BOOTIMAGE_NAME_XIP) - $(RM) $(BOOTIMAGE_NAME_SIGNED) - $(RM) $(BOOTIMAGE_NAME_HS) - $(RM) $(BOOTIMAGE_NAME_HS_FS) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(RM) $(BOOTIMAGE_RPRC_NAME_XIP) - $(RMDIR) generated/ - -scrub: - @echo Scrubing: am243x:r5fss0-0:freertos:ti-arm-clang bissc_diagnostic_single_channel ... - $(RMDIR) obj -ifeq ($(OS),Windows_NT) - $(RM) \*.out - $(RM) \*.map - $(RM) \*.appimage* - $(RM) \*.rprc* - $(RM) \*.tiimage* - $(RM) \*.bin -else - $(RM) *.out - $(RM) *.map - $(RM) *.appimage* - $(RM) *.rprc* - $(RM) *.tiimage* - $(RM) *.bin -endif - $(RMDIR) generated - -$(OBJS): | $(OBJDIR) - -$(OBJDIR): - $(MKDIR) $@ - - -.NOTPARALLEL: - -.INTERMEDIATE: syscfg -$(SYSCFG_GEN_FILES): syscfg - -syscfg: ../example.syscfg - @echo Generating SysConfig files ... - $(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg - -syscfg-gui: - $(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM243x_ALV_beta --context r5fss0-0 --part ALV --package ALV --output generated/ ../example.syscfg - -# -# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) -# -ifeq ($(OS),Windows_NT) -EXE_EXT=.exe -endif -ifeq ($(OS),Windows_NT) - BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 -else - BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh -endif -BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt - -BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY) - -BOOTIMAGE_CORE_ID_r5fss0-0 = 4 -BOOTIMAGE_CORE_ID_r5fss0-1 = 5 -BOOTIMAGE_CORE_ID_r5fss1-0 = 6 -BOOTIMAGE_CORE_ID_r5fss1-1 = 7 -BOOTIMAGE_CORE_ID_m4fss0-0 = 14 -SBL_RUN_ADDRESS=0x70000000 -SBL_DEV_ID=55 - -MULTI_CORE_IMAGE_GEN = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js -OUTRPRC_CMD = $(SYSCFG_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js -APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py - -ifeq ($(OS),Windows_NT) - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe -else - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out -endif - -MULTI_CORE_IMAGE_PARAMS = \ - $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -MULTI_CORE_IMAGE_PARAMS_XIP = \ - $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -$(BOOTIMAGE_NAME): $(OUTNAME) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ ... -ifneq ($(OS),Windows_NT) - $(CHMOD) a+x $(XIPGEN_CMD) -endif - $(OUTRPRC_CMD) $(OUTNAME) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) -# Sign the appimage for HS-FS using appimage signing script - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) - $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_TEMP_OUT_FILE) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$@ Done !!! - @echo . - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!! - @echo . - -$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME) -ifeq ($(DEVICE_TYPE), HS) -# Sign the appimage using appimage signing script -ifeq ($(ENC_ENABLED),no) - @echo Boot image signing: Encryption is disabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) -else - @echo Boot image signing: Encryption is enabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) - $(RM) $(BOOTIMAGE_NAME)-enc -endif - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!! - @echo . -endif --include $(addprefix $(OBJDIR)/, $(DEPS)) diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen b/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen deleted file mode 100644 index 8666cfd..0000000 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen +++ /dev/null @@ -1,106 +0,0 @@ -# -# Auto generated makefile -# - -# Below variables need to be defined outside this file or via command line -# - MOTOR_CONTROL_SDK_PATH -# - PROFILE -# - CG_TOOL_ROOT -# - OUTNAME -# - CCS_INSTALL_DIR -# - CCS_IDE_MODE - -CCS_PATH=$(CCS_INSTALL_DIR) -include ${MOTOR_CONTROL_SDK_PATH}/imports.mak -include ${MOTOR_CONTROL_SDK_PATH}/devconfig/devconfig.mak - -STRIP=$(CG_TOOL_ROOT)/bin/tiarmstrip -OBJCOPY=$(CG_TOOL_ROOT)/bin/tiarmobjcopy -ifeq ($(OS), Windows_NT) - PYTHON=python -else - PYTHON=python3 -endif - -OUTFILE=$(PROFILE)/$(OUTNAME).out -BOOTIMAGE_PATH=$(abspath ${PROFILE}) -BOOTIMAGE_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage -BOOTIMAGE_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage_xip -BOOTIMAGE_NAME_SIGNED:=$(BOOTIMAGE_PATH)/$(OUTNAME).appimage.signed -BOOTIMAGE_RPRC_NAME:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc -BOOTIMAGE_RPRC_NAME_XIP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_xip -BOOTIMAGE_RPRC_NAME_TMP:=$(BOOTIMAGE_PATH)/$(OUTNAME).rprc_tmp - -# -# Generation of boot image which can be loaded by Secondary Boot Loader (SBL) -# -ifeq ($(OS),Windows_NT) -EXE_EXT=.exe -endif -ifeq ($(OS),Windows_NT) - BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.ps1 -else - BOOTIMAGE_CERT_GEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/x509CertificateGen.sh -endif -BOOTIMAGE_TEMP_OUT_FILE=$(PROFILE)/temp_stdout_$(PROFILE).txt - -BOOTIMAGE_CORE_ID_r5fss0-0 = 4 -BOOTIMAGE_CORE_ID_r5fss0-1 = 5 -BOOTIMAGE_CORE_ID_r5fss1-0 = 6 -BOOTIMAGE_CORE_ID_r5fss1-1 = 7 -BOOTIMAGE_CORE_ID_m4fss0-0 = 14 -SBL_RUN_ADDRESS=0x70000000 -SBL_DEV_ID=55 - -MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/multicoreImageGen/multicoreImageGen.js -OUTRPRC_CMD = $(CCS_NODE) $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/out2rprc/elf2rprc.js -APP_IMAGE_SIGN_CMD = $(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/signing/appimage_x509_cert_gen.py - -ifeq ($(OS),Windows_NT) - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.exe -else - XIPGEN_CMD=$(MOTOR_CONTROL_SDK_PATH)/mcu_plus_sdk/tools/boot/xipGen/xipGen.out -endif - -MULTI_CORE_IMAGE_PARAMS = \ - $(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -MULTI_CORE_IMAGE_PARAMS_XIP = \ - $(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \ - -all: -ifeq ($(CCS_IDE_MODE),cloud) -# No post build steps -else - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) ... - $(OUTRPRC_CMD) $(OUTFILE) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(COPY) $(OUTNAME).rprc $(BOOTIMAGE_RPRC_NAME) - $(COPY) $(BOOTIMAGE_RPRC_NAME) $(BOOTIMAGE_RPRC_NAME_TMP) - $(RM) $(BOOTIMAGE_RPRC_NAME) - $(XIPGEN_CMD) -i $(BOOTIMAGE_RPRC_NAME_TMP) -o $(BOOTIMAGE_RPRC_NAME) -x $(BOOTIMAGE_RPRC_NAME_XIP) --flash-start-addr 0x60000000 -v > $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME) $(MULTI_CORE_IMAGE_PARAMS) >> $(BOOTIMAGE_TEMP_OUT_FILE) - $(MULTI_CORE_IMAGE_GEN) --devID $(SBL_DEV_ID) --out $(BOOTIMAGE_NAME_XIP) $(MULTI_CORE_IMAGE_PARAMS_XIP) >> $(BOOTIMAGE_TEMP_OUT_FILE) -# Sign the appimage for HS-FS using appimage signing script - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs_fs -ifeq ($(DEVICE_TYPE),HS) -# Sign the appimage using appimage signing script -ifeq ($(ENC_ENABLED),no) - @echo Boot image signing: Encryption is disabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME).hs -else - @echo Boot image signing: Encryption is enabled. - $(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 1 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME).hs - $(RM) $(BOOTIMAGE_NAME)-enc -endif -endif - $(RM) $(BOOTIMAGE_RPRC_NAME_TMP) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME) Done !!! - @echo . -ifeq ($(DEVICE_TYPE),HS) - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs Done !!! - @echo . -else - @echo Boot image: am243x:r5fss0-0:freertos:ti-arm-clang $(BOOTIMAGE_NAME).hs_fs Done !!! - @echo . -endif -endif diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec b/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec deleted file mode 100644 index c62927a..0000000 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec +++ /dev/null @@ -1,20 +0,0 @@ -# -# Auto generated makefile -# - -export MOTOR_CONTROL_SDK_PATH?=$(abspath ../../../../../../..) -include $(MOTOR_CONTROL_SDK_PATH)/imports.mak - -PROFILE?=Release - -PROJECT_NAME=bissc_diagnostic_single_channel_am243x-evm_r5fss0-0_freertos_ti-arm-clang - -all: - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) - -clean: - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectBuild -ccs.projects $(PROJECT_NAME) -ccs.configuration $(PROFILE) -ccs.clean - -export: - $(MKDIR) $(MOTOR_CONTROL_SDK_PATH)/ccs_projects - $(CCS_ECLIPSE) -noSplash -data $(MOTOR_CONTROL_SDK_PATH)/ccs_projects -application com.ti.ccstudio.apps.projectCreate -ccs.projectSpec example.projectspec -ccs.overwrite full diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs b/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs deleted file mode 100644 index c2be5da..0000000 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-evm/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs +++ /dev/null @@ -1,8 +0,0 @@ -/* - * ======== syscfg_c.rov.xs ======== - * This file contains the information needed by the Runtime Object - * View (ROV) tool. - */ -var crovFiles = [ - "mcu_plus_sdk/kernel/freertos/rov/FreeRTOS.rov.js", -]; diff --git a/examples/position_sense/bissc_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/example.syscfg b/examples/position_sense/bissc_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/example.syscfg index 1387048..ad28932 100644 --- a/examples/position_sense/bissc_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/example.syscfg +++ b/examples/position_sense/bissc_diagnostic/single_channel/am243x-lp/r5fss0-0_freertos/example.syscfg @@ -13,8 +13,6 @@ const gpio1 = gpio.addInstance(); const gpio2 = gpio.addInstance(); const gpio3 = gpio.addInstance(); const gpio4 = gpio.addInstance(); -const gpio5 = gpio.addInstance(); -const gpio6 = gpio.addInstance(); const debug_log = scripting.addModule("/kernel/dpl/debug_log"); const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); const mpu_armv71 = mpu_armv7.addInstance(); @@ -65,37 +63,28 @@ bissc1.PRU_ICSSG0_PRU.GPO4.$used = false; bissc1.PRU_ICSSG0_PRU.GPO3.$used = false; bissc1.PRU_ICSSG0_PRU.GPI14.$used = false; -bissc1.ENC1_EN = gpio1; -gpio1.$name = "ENC1_EN"; -gpio1.GPIO.$assign = "GPIO1"; -gpio1.GPIO.gpioPin.pu_pd = "pu"; -gpio1.GPIO.gpioPin.rx = false; +gpio1.$name = "BISSC_CH0_OUT_EN"; +bissc1.BISSC_CH0_OUT_EN = gpio1; +gpio1.GPIO.gpioPin.rx = false; +gpio1.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; -bissc1.BISSC_CH0_OUT_EN = gpio2; -gpio2.$name = "BISSC_CH0_OUT_EN"; +gpio2.pinDir = "OUTPUT"; +gpio2.$name = "BISSC_CH2_OUT_EN"; +bissc1.BISSC_CH2_OUT_EN = gpio2; gpio2.GPIO.gpioPin.rx = false; -gpio2.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO2"; +gpio2.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO8"; -bissc1.BISSC_CH2_OUT_EN = gpio3; -gpio3.$name = "BISSC_CH2_OUT_EN"; +gpio3.pinDir = "OUTPUT"; +gpio3.$name = "ENC2_EN"; +bissc1.ENC2_EN = gpio3; +gpio3.GPIO.gpioPin.pu_pd = "pu"; gpio3.GPIO.gpioPin.rx = false; -gpio3.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO8"; +gpio3.GPIO.gpioPin.$assign = "MMC1_SDCD"; -bissc1.ENC2_EN = gpio4; -gpio4.$name = "ENC2_EN"; -gpio4.GPIO.gpioPin.pu_pd = "pu"; -gpio4.GPIO.gpioPin.rx = false; -gpio4.GPIO.gpioPin.$assign = "MMC1_SDCD"; - -bissc1.BISSC_CH1_OUT_EN = gpio5; -gpio5.$name = "BISSC_CH1_OUT_EN"; -gpio5.GPIO.gpioPin.rx = false; -gpio5.GPIO.gpioPin.$assign = "PRG0_PRU1_GPO5"; - -gpio6.$name = "ENC0_EN"; -gpio6.pinDir = "OUTPUT"; -bissc1.ENC0_EN = gpio6; -gpio6.GPIO.gpioPin.$assign = "MMC1_SDWP"; +gpio4.$name = "ENC0_EN"; +gpio4.pinDir = "OUTPUT"; +bissc1.ENC0_EN = gpio4; +gpio4.GPIO.gpioPin.$assign = "MMC1_SDWP"; const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false); const pruicss1 = pruicss.addInstance({}, false); @@ -116,9 +105,7 @@ bissc1.PRU_ICSSG0_PRU.GPI13.$suggestSolution = "PRG0_PRU1_GPO13"; bissc1.PRU_ICSSG0_PRU.GPO12.$suggestSolution = "PRG0_PRU1_GPO12"; bissc1.PRU_ICSSG0_PRU.GPO6.$suggestSolution = "PRG0_PRU1_GPO6"; bissc1.PRU_ICSSG0_PRU.GPI11.$suggestSolution = "PRG0_PRU1_GPO11"; -gpio1.GPIO.gpioPin.$suggestSolution = "PRG0_PRU0_GPO0"; +gpio1.GPIO.$suggestSolution = "GPIO1"; gpio2.GPIO.$suggestSolution = "GPIO1"; gpio3.GPIO.$suggestSolution = "GPIO1"; gpio4.GPIO.$suggestSolution = "GPIO1"; -gpio5.GPIO.$suggestSolution = "GPIO1"; -gpio6.GPIO.$suggestSolution = "GPIO1"; diff --git a/source/.meta/position_sense/bissc.syscfg.js b/source/.meta/position_sense/bissc.syscfg.js index e39d496..8f31135 100644 --- a/source/.meta/position_sense/bissc.syscfg.js +++ b/source/.meta/position_sense/bissc.syscfg.js @@ -13,7 +13,10 @@ function onValidate(inst, validation) { if ((!instance.channel_0)&&(!instance.channel_1)&&(!instance.channel_2)) validation.logError("Select atleast one channel",inst,"channel_0" ); - + if(is_am243x_lp_device && (instance.channel_1 )) + validation.logError( + "On AM243x-LP, Channel 1 is not supported",inst,"channel_1" + ); /* validation for booster pack */ if((device!="am243x-lp")&&(instance.Booster_Pack)) { @@ -144,14 +147,6 @@ function sharedModuleInstances(instance) { pinDir: "OUTPUT" }, }); - modInstances.push({ - name: "ENC1_EN", - displayName: "Booster Pack Ch1 Enable Pin", - moduleName: "/drivers/gpio/gpio", - requiredArgs: { - pinDir: "OUTPUT" - }, - }); modInstances.push({ name: "ENC2_EN", displayName: "Booster Pack Ch2 Enable Pin", @@ -162,15 +157,7 @@ function sharedModuleInstances(instance) { }); modInstances.push({ name: "BISSC_CH0_OUT_EN", - displayName: "ENDAT Ch0 TX Enable Pin", - moduleName: "/drivers/gpio/gpio", - requiredArgs: { - pinDir: "OUTPUT" - }, - }); - modInstances.push({ - name: "BISSC_CH1_OUT_EN", - displayName: "ENDAT Ch1 TX Enable Pin", + displayName: "BISSC Ch0 TX Enable Pin", moduleName: "/drivers/gpio/gpio", requiredArgs: { pinDir: "OUTPUT" @@ -178,7 +165,7 @@ function sharedModuleInstances(instance) { }); modInstances.push({ name: "BISSC_CH2_OUT_EN", - displayName: "ENDAT Ch2 TX Enable Pin", + displayName: "BISSC Ch2 TX Enable Pin", moduleName: "/drivers/gpio/gpio", requiredArgs: { pinDir: "OUTPUT" diff --git a/source/position_sense/bissc/driver/bissc_drv.c b/source/position_sense/bissc/driver/bissc_drv.c index 10ef985..0a16413 100644 --- a/source/position_sense/bissc/driver/bissc_drv.c +++ b/source/position_sense/bissc/driver/bissc_drv.c @@ -57,12 +57,17 @@ int32_t bissc_command_wait(struct bissc_priv *priv) { struct bissc_pruicss_xchg *pruicss_xchg = priv->pruicss_xchg; uint32_t timeout; - /*Wait for max of 5 ms*/ + /* Minimum and Maximum BiSSC cycle time depends on various params as below: + TCycle_min = TMA ∗ (5 + DLEN + CRCLEN) + tLineDelay + tbusy_max + busy_s_max + tTO + Instead wait for max of 5 ms as this can vary for different encoders and for daisy chain + */ timeout = BISSC_MAX_CYCLE_TIMEOUT; while(1) { - if(priv->load_share){ - if((pruicss_xchg->cycle_trigger[0] == 0 ) && (pruicss_xchg->cycle_trigger[1] == 0) && (pruicss_xchg->cycle_trigger[2] == 0)){ + if(priv->load_share) + { + if((pruicss_xchg->cycle_trigger[0] == 0 ) && (pruicss_xchg->cycle_trigger[1] == 0) && (pruicss_xchg->cycle_trigger[2] == 0)) + { break; } } @@ -88,9 +93,54 @@ int32_t bissc_command_process(struct bissc_priv *priv) return ret; } -int32_t bissc_get_pos_res(struct bissc_priv *priv) +void bissc_enable_load_share_mode(struct bissc_priv *priv) { - uint32_t raw_data0, raw_data1, shift, sl_num, max, ch_num, numslaves, ls_ch; + void *pruss_cfg = priv->pruicss_cfg; + uint32_t rgval; + if(priv->pruicss_slicex) + { + rgval = HW_RD_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_EDPRU1TXCFGREGISTER); + rgval |= CSL_ICSSCFG_EDPRU1TXCFGREGISTER_PRU1_ENDAT_SHARE_EN_MASK; + HW_WR_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_EDPRU1TXCFGREGISTER, rgval); + } + else + { + rgval = HW_RD_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_EDPRU0TXCFGREGISTER); + rgval |= CSL_ICSSCFG_EDPRU0TXCFGREGISTER_PRU0_ENDAT_SHARE_EN_MASK; + HW_WR_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_EDPRU0TXCFGREGISTER, rgval); + } +} +void bissc_config_primary_core_mask(struct bissc_priv *priv, uint8_t mask) +{ + switch (mask) + { + case 1: /*only channel0 connected*/ + priv->pruicss_xchg->primary_core_mask=0x1; + break; + case 2: /*channel1 connected*/ + priv->pruicss_xchg->primary_core_mask=0x2; + break; + case 3: /*channel0 and channel1 connected*/ + priv->pruicss_xchg->primary_core_mask=0x1; + break; + case 4: /*channel2 connected*/ + priv->pruicss_xchg->primary_core_mask=0x4; + break; + case 5: /*channel0 and channel2 connnected*/ + priv->pruicss_xchg->primary_core_mask=0x4; + break; + case 6: /*channel1 and channel2 connected*/ + priv->pruicss_xchg->primary_core_mask=0X4; + break; + case 7: /*all three channel connected*/ + priv->pruicss_xchg->primary_core_mask=0x4; + break; + } +} + +int32_t bissc_get_pos(struct bissc_priv *priv) +{ + uint32_t raw_data0, raw_data1, shift, sl_num, max, ch_num, numencoders, ls_ch; int32_t ch = 0; if(bissc_command_process(priv) < 0) { @@ -101,15 +151,15 @@ int32_t bissc_get_pos_res(struct bissc_priv *priv) ch = priv->channel[ch_num]; if(priv->load_share) { - numslaves = priv->num_slaves[ch]; + numencoders = priv->num_encoders[ch]; ls_ch = ch; } else { - numslaves = priv->num_slaves[0]; + numencoders = priv->num_encoders[0]; ls_ch = 0; } - for(sl_num = 0; sl_num < numslaves; sl_num++) + for(sl_num = 0; sl_num < numencoders; sl_num++) { raw_data0 = priv->pruicss_xchg->pos_data_res[sl_num].raw_data[ch].pos_data_word0; raw_data1 = priv->pruicss_xchg->pos_data_res[sl_num].raw_data[ch].pos_data_word1; @@ -150,16 +200,16 @@ void bissc_config_clock(struct bissc_priv *priv, if(priv->pruicss_slicex) { HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU1RXCFGREGISTER, ((clk_cfg->rx_div << 16) | - (clk_cfg->is_ocp << 4) | (clk_cfg->rx_div_attr))); + (clk_cfg->is_core_clk << 4) | (clk_cfg->rx_div_attr))); HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU1TXCFGREGISTER, clk_cfg->tx_div << 16 | - (clk_cfg->is_ocp << 4)); + (clk_cfg->is_core_clk << 4)); } else { HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU0RXCFGREGISTER, ((clk_cfg->rx_div << 16) | - (clk_cfg->is_ocp << 4) | (clk_cfg->rx_div_attr))); + (clk_cfg->is_core_clk << 4) | (clk_cfg->rx_div_attr))); HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU0TXCFGREGISTER, clk_cfg->tx_div << 16 | - (clk_cfg->is_ocp << 4)); + (clk_cfg->is_core_clk << 4)); } if(priv->load_share) bissc_enable_load_share_mode(priv); @@ -174,7 +224,18 @@ void bissc_config_channel(struct bissc_priv *priv, int32_t mask, int32_t totalch int32_t ch_num; pruicss_xchg->channel = mask; priv->totalchannels = totalch; - for(ch_num = 0; ch_num < totalch; ch_num++){ + /* Below for loop iterates for enabled channel number of times. + Updates channel in this manner: + if ch0 only selected --> priv->channel[0] = 0; + if ch1 only selected --> priv->channel[0] = 1; + if ch2 only selected --> priv->channel[0] = 2; + if ch0 & ch1 are selected --> priv->channel[0] = 0, priv->channel[1] = 1; + if ch0 & ch2 are selected --> priv->channel[0] = 0, priv->channel[1] = 2; + if ch1 & ch2 are selected --> priv->channel[0] = 1, priv->channel[1] = 2; + if ch0, ch1 & ch2 are selected --> priv->channel[0] = 0, priv->channel[1] = 1, priv->channel[1] = 2; + */ + for(ch_num = 0; ch_num < totalch; ch_num++) + { if((mask & 1) && ch_num == 0) priv->channel[ch_num] = 0; else if((mask & 2) && (ch_num == 0 || ch_num == 1)) @@ -183,57 +244,12 @@ void bissc_config_channel(struct bissc_priv *priv, int32_t mask, int32_t totalch priv->channel[ch_num] = 2; } } -void bissc_config_load_share(struct bissc_priv *priv, int32_t mask, int32_t loadshare) +void bissc_config_load_share(struct bissc_priv *priv, int32_t mask) { - priv->load_share = loadshare; + priv->load_share = 1; /*Enable load-share*/ bissc_config_primary_core_mask(priv, mask); bissc_enable_load_share_mode(priv); } -void bissc_enable_load_share_mode(struct bissc_priv *priv) -{ - void *pruss_cfg = priv->pruicss_cfg; - //HW_WR_REG32(0x30026104) |= 0x0800; - uint32_t rgval; - if(priv->pruicss_slicex) - { - rgval = HW_RD_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_EDPRU1TXCFGREGISTER); - rgval |= CSL_ICSSCFG_EDPRU1TXCFGREGISTER_PRU1_ENDAT_SHARE_EN_MASK; - HW_WR_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_EDPRU1TXCFGREGISTER, rgval); - } - else - { - rgval = HW_RD_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_EDPRU0TXCFGREGISTER); - rgval |= CSL_ICSSCFG_EDPRU0TXCFGREGISTER_PRU0_ENDAT_SHARE_EN_MASK; - HW_WR_REG32((uint8_t *)pruss_cfg + CSL_ICSSCFG_EDPRU0TXCFGREGISTER, rgval); - } -} -void bissc_config_primary_core_mask(struct bissc_priv *priv, uint8_t mask) -{ - switch (mask) - { - case 1: /*only channel0 connected*/ - priv->pruicss_xchg->primary_core_mask=0x1; - break; - case 2: /*channel1 connected*/ - priv->pruicss_xchg->primary_core_mask=0x2; - break; - case 3: /*channel0 and channel1 connected*/ - priv->pruicss_xchg->primary_core_mask=0x1; - break; - case 4: /*channel2 connected*/ - priv->pruicss_xchg->primary_core_mask=0x4; - break; - case 5: /*channel0 and channel2 connnected*/ - priv->pruicss_xchg->primary_core_mask=0x4; - break; - case 6: /*channel1 and channel2 connected*/ - priv->pruicss_xchg->primary_core_mask=0X4; - break; - case 7: /*all three channel connected*/ - priv->pruicss_xchg->primary_core_mask=0x4; - break; - } -} int32_t bissc_wait_for_fw_initialization(struct bissc_priv *priv, uint32_t timeout, uint8_t mask) { int32_t i; @@ -243,7 +259,7 @@ int32_t bissc_wait_for_fw_initialization(struct bissc_priv *priv, uint32_t timeo if(priv->load_share) /* for loadshare mode*/ { switch (mask) { - case 1: /*channel 0 connected*/ + case 1: /*channel 0 connected*/ if((pruicss_xchg->status[0] & 1)) return SystemP_SUCCESS; break; @@ -251,23 +267,23 @@ int32_t bissc_wait_for_fw_initialization(struct bissc_priv *priv, uint32_t timeo if((pruicss_xchg->status[1] & 1)) return SystemP_SUCCESS; break; - case 3: /*channel 0 and 1 connected*/ + case 3: /*channel 0 and 1 connected*/ if((pruicss_xchg->status[0] & 1) && (pruicss_xchg->status[1] & 1)) return SystemP_SUCCESS; break; - case 4: /*channel 2 connected*/ + case 4: /*channel 2 connected*/ if((pruicss_xchg->status[2] & 1)) return SystemP_SUCCESS; break; - case 5: /*channel 0 and 2 connnected*/ + case 5: /*channel 0 and 2 connnected*/ if((pruicss_xchg->status[0] & 1) && (pruicss_xchg->status[2] & 1)) return SystemP_SUCCESS; break; - case 6: /*channel 1 and 2 connected*/ + case 6: /*channel 1 and 2 connected*/ if((pruicss_xchg->status[1] & 1) && (pruicss_xchg->status[2] & 1)) return SystemP_SUCCESS; break; - case 7: /*all three channel connected*/ + case 7: /*all three channel connected*/ if((pruicss_xchg->status[0] & 1) && (pruicss_xchg->status[1] & 1) && ( pruicss_xchg->status[2] & 1)) return SystemP_SUCCESS; break; @@ -278,7 +294,7 @@ int32_t bissc_wait_for_fw_initialization(struct bissc_priv *priv, uint32_t timeo { break; } - else + else { ClockP_usleep(1000 * 1); } @@ -290,20 +306,30 @@ int32_t bissc_wait_for_fw_initialization(struct bissc_priv *priv, uint32_t timeo return SystemP_SUCCESS; } +void bissc_get_enc_proc_delay(struct bissc_priv *priv) +{ + int32_t i; + struct bissc_pruicss_xchg *pruicss_xchg = priv->pruicss_xchg; + for(i = 0; i < NUM_ED_CH_MAX; i++) + { + priv->proc_delay[i] = pruicss_xchg->proc_delay[i]; + } +} + void bissc_config_clr_cfg0(struct bissc_priv *priv) { void *pruicss_cfg = priv->pruicss_cfg; if(priv->pruicss_slicex) { - HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU1CH0CFG0REGISTER, 0); - HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU1CH1CFG0REGISTER, 0); - HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU1CH2CFG0REGISTER, 0); + HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU1CH0CFG0REGISTER, 0); + HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU1CH1CFG0REGISTER, 0); + HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU1CH2CFG0REGISTER, 0); } else { - HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU0CH0CFG0REGISTER, 0); - HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU0CH1CFG0REGISTER, 0); - HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU0CH2CFG0REGISTER, 0); + HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU0CH0CFG0REGISTER, 0); + HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU0CH1CFG0REGISTER, 0); + HW_WR_REG32((uint8_t *)pruicss_cfg + CSL_ICSSCFG_EDPRU0CH2CFG0REGISTER, 0); } } @@ -312,36 +338,37 @@ void bissc_config_endat_mode(struct bissc_priv *priv) void *pruicss_cfg = priv->pruicss_cfg; if(priv->pruicss_slicex) { - HW_WR_REG8((uint8_t *)pruicss_cfg + CSL_ICSSCFG_GPCFG1 + 3, 4); + HW_WR_REG8((uint8_t *)pruicss_cfg + CSL_ICSSCFG_GPCFG1 + 3, 4); } else { - HW_WR_REG8((uint8_t *)pruicss_cfg + CSL_ICSSCFG_GPCFG0 + 3, 4); + HW_WR_REG8((uint8_t *)pruicss_cfg + CSL_ICSSCFG_GPCFG0 + 3, 4); } } -int32_t bissc_calc_clock(uint32_t freq, struct bissc_clk_cfg *clk_cfg) +int32_t bissc_calc_clock(struct bissc_priv *priv, struct bissc_clk_cfg *clk_cfg) { + uint32_t freq = priv->baud_rate; clk_cfg->rx_div_attr = BISSC_RX_SAMPLE_SIZE; - if((freq == 1) || (freq == 5)) + if((freq == BISSC_FREQ_1MHZ) || (freq == BISSC_FREQ_5MHZ)) { freq = freq * 1000 * 1000; - clk_cfg->tx_div = (BISSC_INPUT_CLOCK_OCP_FREQUENCY / freq) - 1; - clk_cfg->rx_div = (BISSC_INPUT_CLOCK_OCP_FREQUENCY / (freq * 8)) - 1; - clk_cfg->is_ocp = 1; + clk_cfg->tx_div = (priv->core_clk_freq / freq) - 1; + clk_cfg->rx_div = (priv->core_clk_freq / (freq * 8)) - 1; + clk_cfg->is_core_clk = 1; } - else if((freq == 2) || (freq == 8)) + else if((freq == BISSC_FREQ_2MHZ) || (freq == BISSC_FREQ_8MHZ)) { freq = freq * 1000 * 1000; - clk_cfg->tx_div = (BISSC_INPUT_CLOCK_FREQUENCY_UART / freq) - 1; - clk_cfg->rx_div = (BISSC_INPUT_CLOCK_FREQUENCY_UART / (freq * 8)) - 1; - clk_cfg->is_ocp = 0; + clk_cfg->tx_div = (priv->uart_clk_freq / freq) - 1; + clk_cfg->rx_div = (priv->uart_clk_freq / (freq * 8)) - 1; + clk_cfg->is_core_clk = 0; } - else if(freq == 10) + else if(freq == BISSC_FREQ_10MHZ) { freq = freq* 1000 * 1000; - clk_cfg->tx_div = (BISSC_INPUT_CLOCK_OCP_FREQUENCY / freq) - 1; - clk_cfg->rx_div = (BISSC_INPUT_CLOCK_OCP_FREQUENCY / (freq * 4)) - 1; - clk_cfg->is_ocp = 1; + clk_cfg->tx_div = (priv->core_clk_freq / freq) - 1; + clk_cfg->rx_div = (priv->core_clk_freq / (freq * 4)) - 1; + clk_cfg->is_core_clk = 1; clk_cfg->rx_div_attr = BISSC_RX_SAMPLE_SIZE_10MHZ; } else @@ -351,17 +378,21 @@ int32_t bissc_calc_clock(uint32_t freq, struct bissc_clk_cfg *clk_cfg) return SystemP_SUCCESS; } -static void bissc_hw_init(struct bissc_priv *priv, uint32_t frequency) +void bissc_hw_init(struct bissc_priv *priv) { struct bissc_clk_cfg clk_cfg; - bissc_calc_clock(frequency, &clk_cfg); + bissc_calc_clock(priv, &clk_cfg); bissc_config_endat_mode(priv); bissc_config_clock(priv, &clk_cfg); bissc_config_clr_cfg0(priv); } -struct bissc_priv *bissc_init(PRUICSS_Handle gPruIcssXHandle, int32_t slice, uint32_t frequency) +struct bissc_priv *bissc_init(PRUICSS_Handle gPruIcssXHandle, + int32_t slice, + uint32_t frequency, + uint32_t core_clk_freq, + uint32_t uart_clk_freq) { struct bissc_pruicss_xchg *pruicss_xchg; void *pruicss_cfg; @@ -369,27 +400,30 @@ struct bissc_priv *bissc_init(PRUICSS_Handle gPruIcssXHandle, int32_t slice, uin if(slice) pruicss_xchg = (struct bissc_pruicss_xchg *)((PRUICSS_HwAttrs *)(gPruIcssXHandle->hwAttrs))->pru1DramBase; else - pruicss_xchg = (struct bissc_pruicss_xchg *)((PRUICSS_HwAttrs *)(gPruIcssXHandle->hwAttrs))->pru0DramBase; + pruicss_xchg = (struct bissc_pruicss_xchg *)((PRUICSS_HwAttrs *)(gPruIcssXHandle->hwAttrs))->pru0DramBase; bissc_priv.pruicss_xchg = pruicss_xchg; bissc_priv.pruicss_cfg = pruicss_cfg; bissc_priv.pruicss_slicex = slice; - bissc_hw_init(&bissc_priv, frequency); + bissc_priv.baud_rate = frequency; + bissc_priv.core_clk_freq = core_clk_freq; + bissc_priv.uart_clk_freq = uart_clk_freq; + bissc_hw_init(&bissc_priv); return &bissc_priv; } -void bissc_update_max_proc_delay(struct bissc_priv *priv, uint32_t frequency) +void bissc_update_max_proc_delay(struct bissc_priv *priv) { struct bissc_pruicss_xchg *pruicss_xchg = priv->pruicss_xchg; pruicss_xchg->fifo_bit_idx = 4; /* 8x over clock - middle bit*/ - if(frequency == 1) + if(priv->baud_rate == BISSC_FREQ_1MHZ) pruicss_xchg->max_proc_delay = BISSC_MAX_PROC_DELAY_1MHZ; - else if(frequency == 2) + else if(priv->baud_rate == BISSC_FREQ_2MHZ) pruicss_xchg->max_proc_delay = BISSC_MAX_PROC_DELAY_2MHZ; - else if(frequency == 5) + else if(priv->baud_rate == BISSC_FREQ_5MHZ) pruicss_xchg->max_proc_delay = BISSC_MAX_PROC_DELAY_5MHZ; - else if(frequency == 8) + else if(priv->baud_rate == BISSC_FREQ_8MHZ) pruicss_xchg->max_proc_delay = BISSC_MAX_PROC_DELAY_8MHZ; - else if(frequency == 10) + else if(priv->baud_rate == BISSC_FREQ_10MHZ) { pruicss_xchg->max_proc_delay = BISSC_MAX_PROC_DELAY_10MHZ; pruicss_xchg->fifo_bit_idx = 2; /* 4x over clock - middle bit*/ @@ -418,7 +452,7 @@ int32_t bissc_wait_measure_proc_delay(struct bissc_priv *priv, uint32_t timeout) return SystemP_SUCCESS; } -void bissc_set_default_initialization(struct bissc_priv *priv, uint32_t frequency, uint64_t icssgclk) +void bissc_set_default_initialization(struct bissc_priv *priv, uint64_t icssgclk) { int8_t pru_num, totalprus, ls_ch; struct bissc_pruicss_xchg *pruicss_xchg = priv->pruicss_xchg; @@ -436,15 +470,15 @@ void bissc_set_default_initialization(struct bissc_priv *priv, uint32_t frequenc pruicss_xchg->enc_len[ls_ch].data_len[0] = BISSC_POS_DATA_LEN_DEFAULT; priv->data_len[ls_ch][0] = BISSC_POS_DATA_LEN_DEFAULT; priv->single_turn_len[ls_ch][0] = BISSC_POS_DATA_LEN_DEFAULT; - pruicss_xchg->enc_len[ls_ch].num_slaves = 1; - priv->num_slaves[ls_ch] = 1; + pruicss_xchg->enc_len[ls_ch].num_encoders = 1; + priv->num_encoders[ls_ch] = 1; priv->multi_turn_len[ls_ch][0] = 0; pruicss_xchg->ctrl_cmd[ls_ch] = 0; } pruicss_xchg->pos_crc_len = BISSC_POS_CRC_LEN; pruicss_xchg->ctrl_cmd_crc_len = BISSC_CTRL_CMD_CRC_LEN; - pruicss_xchg->rx_clk_freq = frequency; - bissc_update_max_proc_delay(priv, frequency); + pruicss_xchg->rx_clk_freq = priv->baud_rate; + bissc_update_max_proc_delay(priv); pruicss_xchg->delay_40us = ((icssgclk*40)/1000000); pruicss_xchg->delay_100ms = (icssgclk / 10); /*((icssgclk*100000) / 1000000)*/ pruicss_xchg->icssg_clk = icssgclk; @@ -463,7 +497,7 @@ void bissc_update_data_len(struct bissc_priv *priv, uint32_t single_turn_len[], ls_ch = priv->channel[pru_num]; else ls_ch = 0; - for( sl_num = 0; sl_num < NUM_SLAVE_MAX; sl_num++) + for( sl_num = 0; sl_num < NUM_ENCODERS_MAX; sl_num++) { if(single_turn_len[sl_num]) { @@ -471,12 +505,12 @@ void bissc_update_data_len(struct bissc_priv *priv, uint32_t single_turn_len[], priv->multi_turn_len[ls_ch][sl_num] = multi_turn_len[sl_num]; priv->data_len[ls_ch][sl_num] = single_turn_len[sl_num] + multi_turn_len[sl_num]; pruicss_xchg->enc_len[ls_ch].data_len[sl_num] = single_turn_len[sl_num] + multi_turn_len[sl_num]; - priv->num_slaves[ls_ch]++; + priv->num_encoders[ls_ch]++; } } - pruicss_xchg->enc_len[0].num_slaves = priv->num_slaves[0]; - pruicss_xchg->enc_len[1].num_slaves = priv->num_slaves[1]; - pruicss_xchg->enc_len[2].num_slaves = priv->num_slaves[2]; + pruicss_xchg->enc_len[0].num_encoders = priv->num_encoders[0]; + pruicss_xchg->enc_len[1].num_encoders = priv->num_encoders[1]; + pruicss_xchg->enc_len[2].num_encoders = priv->num_encoders[2]; } int32_t bissc_set_ctrl_cmd_and_process(struct bissc_priv *priv, uint32_t ctrl_cmd[]) @@ -486,20 +520,22 @@ int32_t bissc_set_ctrl_cmd_and_process(struct bissc_priv *priv, uint32_t ctrl_cm pruicss_xchg->ctrl_cmd[1] = ctrl_cmd[1]; pruicss_xchg->ctrl_cmd[2] = ctrl_cmd[2]; int32_t ch = 0, ch_num; - if(priv->load_share){ + if(priv->load_share) + { pruicss_xchg->ctrl_cmd_status[0] = (pruicss_xchg->channel & 0x1)?1:0; pruicss_xchg->ctrl_cmd_status[1] = (pruicss_xchg->channel & 0x2)?1:0; pruicss_xchg->ctrl_cmd_status[2] = (pruicss_xchg->channel & 0x4)?1:0; - while(pruicss_xchg->ctrl_cmd_status[0] + pruicss_xchg->ctrl_cmd_status[1] + pruicss_xchg->ctrl_cmd_status[2]) + while(pruicss_xchg->ctrl_cmd_status[0] + pruicss_xchg->ctrl_cmd_status[1] + pruicss_xchg->ctrl_cmd_status[2]) { - if(bissc_command_process(priv) < 0) - { - return SystemP_FAILURE; - } - ClockP_usleep(1000); + if(bissc_command_process(priv) < 0) + { + return SystemP_FAILURE; + } + ClockP_usleep(1000); } } - else{ + else + { pruicss_xchg->ctrl_cmd_status[0] = 1; while(pruicss_xchg->ctrl_cmd_status[0] & 1) { diff --git a/source/position_sense/bissc/firmware/bissc_interface.h b/source/position_sense/bissc/firmware/bissc_interface.h index 698ac81..0276f98 100644 --- a/source/position_sense/bissc/firmware/bissc_interface.h +++ b/source/position_sense/bissc/firmware/bissc_interface.h @@ -37,57 +37,57 @@ ;* Brief: Defining Data Memory Offsets * ;************************************************************************************ -BISSC_POS_CRC_LEN_CONFIG_OFFSET .set 0x0 ;slave data crc length +BISSC_POS_CRC_LEN_CONFIG_OFFSET .set 0x0 ;encoder data crc length BISSC_RX_CLK_FREQ_CONFIG_OFFSET .set 0x1 ;clock freq BISSC_CTRL_CMD_CRC_LEN_CONFIG_OFFSET .set 0x2 ;register access crc length BISSC_CHANNEL_CONFIG_OFFSET .set 0x3 ;channel config BISSC_STATUS_CH0_CONFIG_OFFSET .set 0x4 ;Firmware init status for RTU BISSC_STATUS_CH1_CONFIG_OFFSET .set 0x5 ;Firmware init status for PRU -BISSC_STATUS_CH2_CONFIG_OFFSET .set 0x6 ;Firmware init status for TXPRU -BISSC_MASK_FOR_PRIMARY_CORE .set 0x7 ;mask for core set +BISSC_STATUS_CH2_CONFIG_OFFSET .set 0x6 ;Firmware init status for TXPRU +BISSC_MASK_FOR_PRIMARY_CORE .set 0x7 ;mask for core set BISSC_CYCLE_TRIGGER_CH0_STATUS_OFFSET .set 0x8 ;Status of current cycle for RTU BISSC_CYCLE_TRIGGER_CH1_STATUS_OFFSET .set 0x9 ;Status of current cycle for PRU -BISSC_CYCLE_TRIGGER_CH2_STATUS_OFFSET .set 0xA ;Status of current cycle for TXPRU +BISSC_CYCLE_TRIGGER_CH2_STATUS_OFFSET .set 0xA ;Status of current cycle for TXPRU BISSC_MEAS_PROC_DELAY_OFFSET .set 0xB ;Measure proc delay and line delay, set when there is a change in config -BISSC_NUM_SLAVE_CH0_CONFIG_OFFSET .set 0xC ;number of slaves connected in daisy chain -BISSC_DATA_LEN_CH0_CONFIG_OFFSET .set 0xD ;slave 0 data length -BISSC_DATA_LEN_SLAVE1_CH0_CONFIG_OFFSET .set 0xE ;slave 1 data length -BISSC_DATA_LEN_SLAVE2_CH0_CONFIG_OFFSET .set 0xF ;slave 2 data length +BISSC_NUM_ENCODER_CH0_CONFIG_OFFSET .set 0xC ;number of encoders connected in daisy chain +BISSC_DATA_LEN_CH0_CONFIG_OFFSET .set 0xD ;encoder 0 data length +BISSC_DATA_LEN_ENCODER1_CH0_CONFIG_OFFSET .set 0xE ;encoder 1 data length +BISSC_DATA_LEN_ENCODER2_CH0_CONFIG_OFFSET .set 0xF ;encoder 2 data length -BISSC_NUM_SLAVE_CH1_CONFIG_OFFSET .set 0x10 ;number of slaves connected in daisy chain -BISSC_DATA_LEN_CH1_CONFIG_OFFSET .set 0x11 ;slave 0 data length -BISSC_DATA_LEN_SLAVE1_CH1_CONFIG_OFFSET .set 0x12 ;slave 1 data length -BISSC_DATA_LEN_SLAVE2_CH1_CONFIG_OFFSET .set 0x13 ;slave 2 data length +BISSC_NUM_ENCODER_CH1_CONFIG_OFFSET .set 0x10 ;number of encoders connected in daisy chain +BISSC_DATA_LEN_CH1_CONFIG_OFFSET .set 0x11 ;encoder 0 data length +BISSC_DATA_LEN_ENCODER1_CH1_CONFIG_OFFSET .set 0x12 ;encoder 1 data length +BISSC_DATA_LEN_ENCODER2_CH1_CONFIG_OFFSET .set 0x13 ;encoder 2 data length -BISSC_NUM_SLAVE_CH2_CONFIG_OFFSET .set 0x14 ;number of slaves connected in daisy chain -BISSC_DATA_LEN_CH2_CONFIG_OFFSET .set 0x15 ;slave 0 data length -BISSC_DATA_LEN_SLAVE1_CH2_CONFIG_OFFSET .set 0x16 ;slave 1 data length -BISSC_DATA_LEN_SLAVE2_CH2_CONFIG_OFFSET .set 0x17 ;slave 2 data length +BISSC_NUM_ENCODER_CH2_CONFIG_OFFSET .set 0x14 ;number of encoders connected in daisy chain +BISSC_DATA_LEN_CH2_CONFIG_OFFSET .set 0x15 ;encoder 0 data length +BISSC_DATA_LEN_ENCODER1_CH2_CONFIG_OFFSET .set 0x16 ;encoder 1 data length +BISSC_DATA_LEN_ENCODER2_CH2_CONFIG_OFFSET .set 0x17 ;encoder 2 data length BISSC_VALID_BIT_IDX_OFFSET .set 0x18 ;offset for valid bit index BISSC_FIFO_BIT_IDX_OFFSET .set 0x19 ;offset for fifo bit index -BISSC_CTRL_CMD_CH0_STATUS_OFFSET .set 0x1A ;control command complete status; 1 - pending; 0 - completed -BISSC_CTRL_CMD_CH1_STATUS_OFFSET .set 0x1B ;control command complete status; 1 - pending; 0 - completed -BISSC_CTRL_CMD_CH2_STATUS_OFFSET .set 0x1C ;control command complete status; 1 - pending; 0 - completed +BISSC_CTRL_CMD_CH0_STATUS_OFFSET .set 0x1A ;control command complete status; 1 - pending; 0 - completed +BISSC_CTRL_CMD_CH1_STATUS_OFFSET .set 0x1B ;control command complete status; 1 - pending; 0 - completed +BISSC_CTRL_CMD_CH2_STATUS_OFFSET .set 0x1C ;control command complete status; 1 - pending; 0 - completed BISSC_CH0_PROC_DELAY_OFFSET .set 0x1E ;Measured Processing delay for ch0 BISSC_CH1_PROC_DELAY_OFFSET .set 0x20 ;Measured Processing delay for ch1 BISSC_CH2_PROC_DELAY_OFFSET .set 0x22 ;Measured Processing delay for ch2 -BISSC_CTRL_CMD_CH0_CONFIG_OFFSET .set 0x24 ;register access commad +BISSC_CTRL_CMD_CH0_CONFIG_OFFSET .set 0x24 ;register access commad -BISSC_CTRL_CMD_CH1_CONFIG_OFFSET .set 0x28 ;register access commad +BISSC_CTRL_CMD_CH1_CONFIG_OFFSET .set 0x28 ;register access commad -BISSC_CTRL_CMD_CH2_CONFIG_OFFSET .set 0x2C ;register access commad +BISSC_CTRL_CMD_CH2_CONFIG_OFFSET .set 0x2C ;register access commad BISSC_MAX_PROC_DELAY_OFFSET .set 0x30 ;Max Processing delay -BISSC_POS_DATA_RES_SLAVE0_OFFSET .set 0x34 ;position data results offset for slave 0 -BISSC_POS_DATA_RES_SLAVE1_OFFSET .set 0x5C ;position data results offset for slave 1 -BISSC_POS_DATA_RES_SLAVE2_OFFSET .set 0X84 ;position data results offset for slave 2 +BISSC_POS_DATA_RES_ENCODER0_OFFSET .set 0x34 ;position data results offset for encoder 0 +BISSC_POS_DATA_RES_ENCODER1_OFFSET .set 0x5C ;position data results offset for encoder 1 +BISSC_POS_DATA_RES_ENCODER2_OFFSET .set 0X84 ;position data results offset for encoder 2 BISSC_POS_DATA_WORD_CH0_OFFSET .set 0x0 ;position data results offset for ch 0 BISSC_POS_DATA_WORD_CH1_OFFSET .set 0x8 ;position data results offset for ch 1 @@ -100,45 +100,45 @@ BISSC_POS_OTF_CRC_CH1_OFFSET .set 0x25 ;positio BISSC_POS_OTF_CRC_CH2_OFFSET .set 0x26 ;position data otf crc for ch 2 -BISSC_POSITION_DATA_WORD0_CH0_SLAVE0_OFFSET .set 0X34 ;Lower word of position data from ch0 slave 0 -BISSC_POSITION_DATA_WORD1_CH0_SLAVE0_OFFSET .set 0x38 ;Upper word of position data(0 if length < 32) from ch0 slave 0 -BISSC_POSITION_DATA_WORD0_CH1_SLAVE0_OFFSET .set 0X3C ;Lower word of position data from ch1 slave 0 -BISSC_POSITION_DATA_WORD1_CH1_SLAVE0_OFFSET .set 0x40 ;Upper word of position data(0 if length < 32) from ch1 slave 0 -BISSC_POSITION_DATA_WORD0_CH2_SLAVE0_OFFSET .set 0X44 ;Lower word of position data from ch2 slave 0 -BISSC_POSITION_DATA_WORD1_CH2_SLAVE0_OFFSET .set 0x48 ;Upper word of position data(0 if length < 32) from ch2 slave 0 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH0_SLAVE0_OFFSET .set 0x4C ;offset for position data crc errors of ch0 slave 0 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH1_SLAVE0_OFFSET .set 0x50 ;offset for position data crc errors of ch1 slave 0 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH2_SLAVE0_OFFSET .set 0x54 ;offset for position data crc errors of ch2 slave 0 -BISSC_POS_DATA_OTF_CRC_CH0_SLAVE0_OFFSET .set 0x58 ;6-bit calculated otf pos data CRC of ch0 slave 0 -BISSC_POS_DATA_OTF_CRC_CH1_SLAVE0_OFFSET .set 0x59 ;6-bit calculated otf pos data CRC of ch1 slave 0 -BISSC_POS_DATA_OTF_CRC_CH2_SLAVE0_OFFSET .set 0x5A ;6-bit calculated otf pos data CRC of ch2 slave 0 +BISSC_POSITION_DATA_WORD0_CH0_ENCODER0_OFFSET .set 0X34 ;Lower word of position data from ch0 encoder 0 +BISSC_POSITION_DATA_WORD1_CH0_ENCODER0_OFFSET .set 0x38 ;Upper word of position data(0 if length < 32) from ch0 encoder 0 +BISSC_POSITION_DATA_WORD0_CH1_ENCODER0_OFFSET .set 0X3C ;Lower word of position data from ch1 encoder 0 +BISSC_POSITION_DATA_WORD1_CH1_ENCODER0_OFFSET .set 0x40 ;Upper word of position data(0 if length < 32) from ch1 encoder 0 +BISSC_POSITION_DATA_WORD0_CH2_ENCODER0_OFFSET .set 0X44 ;Lower word of position data from ch2 encoder 0 +BISSC_POSITION_DATA_WORD1_CH2_ENCODER0_OFFSET .set 0x48 ;Upper word of position data(0 if length < 32) from ch2 encoder 0 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH0_ENCODER0_OFFSET .set 0x4C ;offset for position data crc errors of ch0 encoder 0 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH1_ENCODER0_OFFSET .set 0x50 ;offset for position data crc errors of ch1 encoder 0 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH2_ENCODER0_OFFSET .set 0x54 ;offset for position data crc errors of ch2 encoder 0 +BISSC_POS_DATA_OTF_CRC_CH0_ENCODER0_OFFSET .set 0x58 ;6-bit calculated otf pos data CRC of ch0 encoder 0 +BISSC_POS_DATA_OTF_CRC_CH1_ENCODER0_OFFSET .set 0x59 ;6-bit calculated otf pos data CRC of ch1 encoder 0 +BISSC_POS_DATA_OTF_CRC_CH2_ENCODER0_OFFSET .set 0x5A ;6-bit calculated otf pos data CRC of ch2 encoder 0 -BISSC_POSITION_DATA_WORD0_CH0_SLAVE1_OFFSET .set 0X5C ;Lower word of position data from ch0 slave 1 -BISSC_POSITION_DATA_WORD1_CH0_SLAVE1_OFFSET .set 0x60 ;Upper word of position data(0 if length < 32) from ch0 slave 1 -BISSC_POSITION_DATA_WORD0_CH1_SLAVE1_OFFSET .set 0X64 ;Lower word of position data from ch1 slave 1 -BISSC_POSITION_DATA_WORD1_CH1_SLAVE1_OFFSET .set 0x68 ;Upper word of position data(0 if length < 32) from ch1 slave 1 -BISSC_POSITION_DATA_WORD0_CH2_SLAVE1_OFFSET .set 0X6C ;Lower word of position data from ch2 slave 1 -BISSC_POSITION_DATA_WORD1_CH2_SLAVE1_OFFSET .set 0x70 ;Upper word of position data(0 if length < 32) from ch2 slave 1 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH0_SLAVE1_OFFSET .set 0x74 ;offset for position data crc errors of ch0 slave 1 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH1_SLAVE1_OFFSET .set 0x78 ;offset for position data crc errors of ch1 slave 1 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH2_SLAVE1_OFFSET .set 0x7C ;offset for position data crc errors of ch2 slave 1 -BISSC_POS_DATA_OTF_CRC_CH0_SLAVE1_OFFSET .set 0x80 ;6-bit calculated otf pos data CRC of ch0 slave 1 -BISSC_POS_DATA_OTF_CRC_CH1_SLAVE1_OFFSET .set 0x81 ;6-bit calculated otf pos data CRC of ch1 slave 1 -BISSC_POS_DATA_OTF_CRC_CH2_SLAVE1_OFFSET .set 0x82 ;6-bit calculated otf pos data CRC of ch2 slave 1 +BISSC_POSITION_DATA_WORD0_CH0_ENCODER1_OFFSET .set 0X5C ;Lower word of position data from ch0 encoder 1 +BISSC_POSITION_DATA_WORD1_CH0_ENCODER1_OFFSET .set 0x60 ;Upper word of position data(0 if length < 32) from ch0 encoder 1 +BISSC_POSITION_DATA_WORD0_CH1_ENCODER1_OFFSET .set 0X64 ;Lower word of position data from ch1 encoder 1 +BISSC_POSITION_DATA_WORD1_CH1_ENCODER1_OFFSET .set 0x68 ;Upper word of position data(0 if length < 32) from ch1 encoder 1 +BISSC_POSITION_DATA_WORD0_CH2_ENCODER1_OFFSET .set 0X6C ;Lower word of position data from ch2 encoder 1 +BISSC_POSITION_DATA_WORD1_CH2_ENCODER1_OFFSET .set 0x70 ;Upper word of position data(0 if length < 32) from ch2 encoder 1 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH0_ENCODER1_OFFSET .set 0x74 ;offset for position data crc errors of ch0 encoder 1 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH1_ENCODER1_OFFSET .set 0x78 ;offset for position data crc errors of ch1 encoder 1 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH2_ENCODER1_OFFSET .set 0x7C ;offset for position data crc errors of ch2 encoder 1 +BISSC_POS_DATA_OTF_CRC_CH0_ENCODER1_OFFSET .set 0x80 ;6-bit calculated otf pos data CRC of ch0 encoder 1 +BISSC_POS_DATA_OTF_CRC_CH1_ENCODER1_OFFSET .set 0x81 ;6-bit calculated otf pos data CRC of ch1 encoder 1 +BISSC_POS_DATA_OTF_CRC_CH2_ENCODER1_OFFSET .set 0x82 ;6-bit calculated otf pos data CRC of ch2 encoder 1 -BISSC_POSITION_DATA_WORD0_CH0_SLAVE2_OFFSET .set 0X84 ;Lower word of position data from ch0 slave 2 -BISSC_POSITION_DATA_WORD1_CH0_SLAVE2_OFFSET .set 0x88 ;Upper word of position data(0 if length < 32) from ch0 slave 2 -BISSC_POSITION_DATA_WORD0_CH1_SLAVE2_OFFSET .set 0X8C ;Lower word of position data from ch1 slave 2 -BISSC_POSITION_DATA_WORD1_CH1_SLAVE2_OFFSET .set 0x90 ;Upper word of position data(0 if length < 32) from ch1 slave 2 -BISSC_POSITION_DATA_WORD0_CH2_SLAVE2_OFFSET .set 0X94 ;Lower word of position data from ch2 slave 2 -BISSC_POSITION_DATA_WORD1_CH2_SLAVE2_OFFSET .set 0x98 ;Upper word of position data(0 if length < 32) from ch2 slave 2 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH0_SLAVE2_OFFSET .set 0x9C ;offset for position data crc errors of ch0 slave 2 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH1_SLAVE2_OFFSET .set 0xA0 ;offset for position data crc errors of ch1 slave 2 -BISSC_POS_DATA_CRC_ERROR_COUNT_CH2_SLAVE2_OFFSET .set 0xA4 ;offset for position data crc errors of ch2 slave 2 -BISSC_POS_DATA_OTF_CRC_CH0_SLAVE2_OFFSET .set 0xA8 ;6-bit calculated otf pos data CRC of ch0 slave 2 -BISSC_POS_DATA_OTF_CRC_CH1_SLAVE2_OFFSET .set 0xA9 ;6-bit calculated otf pos data CRC of ch1 slave 2 -BISSC_POS_DATA_OTF_CRC_CH2_SLAVE2_OFFSET .set 0xAA ;6-bit calculated otf pos data CRC of ch2 slave 2 +BISSC_POSITION_DATA_WORD0_CH0_ENCODER2_OFFSET .set 0X84 ;Lower word of position data from ch0 encoder 2 +BISSC_POSITION_DATA_WORD1_CH0_ENCODER2_OFFSET .set 0x88 ;Upper word of position data(0 if length < 32) from ch0 encoder 2 +BISSC_POSITION_DATA_WORD0_CH1_ENCODER2_OFFSET .set 0X8C ;Lower word of position data from ch1 encoder 2 +BISSC_POSITION_DATA_WORD1_CH1_ENCODER2_OFFSET .set 0x90 ;Upper word of position data(0 if length < 32) from ch1 encoder 2 +BISSC_POSITION_DATA_WORD0_CH2_ENCODER2_OFFSET .set 0X94 ;Lower word of position data from ch2 encoder 2 +BISSC_POSITION_DATA_WORD1_CH2_ENCODER2_OFFSET .set 0x98 ;Upper word of position data(0 if length < 32) from ch2 encoder 2 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH0_ENCODER2_OFFSET .set 0x9C ;offset for position data crc errors of ch0 encoder 2 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH1_ENCODER2_OFFSET .set 0xA0 ;offset for position data crc errors of ch1 encoder 2 +BISSC_POS_DATA_CRC_ERROR_COUNT_CH2_ENCODER2_OFFSET .set 0xA4 ;offset for position data crc errors of ch2 encoder 2 +BISSC_POS_DATA_OTF_CRC_CH0_ENCODER2_OFFSET .set 0xA8 ;6-bit calculated otf pos data CRC of ch0 encoder 2 +BISSC_POS_DATA_OTF_CRC_CH1_ENCODER2_OFFSET .set 0xA9 ;6-bit calculated otf pos data CRC of ch1 encoder 2 +BISSC_POS_DATA_OTF_CRC_CH2_ENCODER2_OFFSET .set 0xAA ;6-bit calculated otf pos data CRC of ch2 encoder 2 BISSC_CH0_CTRL_BASE_OFFSET .set 0xAC ;channel 0 control communication base offset @@ -158,7 +158,7 @@ BISSC_LS_EXEC_TXPRU_STATE .set 0xC6 ;TXPRU e BISSC_REG_BACKUP .set 0xC8 ;register backup for different channels -BISSC_RE_MEASURE_PROC_DELAY .set 0xE0 +BISSC_RE_MEASURE_PROC_DELAY .set 0xE0 ;Flag used to indicate remeasure proc delay BISSC_CONFIG_DELAY_40US_OFFSET .set 0xE4 ;40 micro second delay offest diff --git a/source/position_sense/bissc/firmware/bissc_macros.h b/source/position_sense/bissc/firmware/bissc_macros.h index b047a61..47b4bcf 100644 --- a/source/position_sense/bissc/firmware/bissc_macros.h +++ b/source/position_sense/bissc/firmware/bissc_macros.h @@ -234,18 +234,18 @@ BISSC_PROC_MEASURE_AGAIN?: .endif QBNE BISSC_IS_CH1_SEL?, BISSC_ENABLE_CHx_IN_USE, 0 LDI R30.w2, (BISSC_TX_CLK_MODE_FREERUN_STOPHIGH | BISSC_TX_CH0_SEL) - LDI R30.b0, 0 ;Not needed? + LDI R30.b0, 0 BISSC_IS_CH1_SEL?: QBNE BISSC_IS_CH2_SEL?, BISSC_ENABLE_CHx_IN_USE, 1 LDI R30.w2, (BISSC_TX_CLK_MODE_FREERUN_STOPHIGH | BISSC_TX_CH1_SEL) - LDI R30.b0, 0 ;Not needed? + LDI R30.b0, 0 BISSC_IS_CH2_SEL?: QBNE BISSC_SKIP_CH_SEL?, BISSC_ENABLE_CHx_IN_USE, 2 LDI R30.w2, (BISSC_TX_CLK_MODE_FREERUN_STOPHIGH | BISSC_TX_CH2_SEL) - LDI R30.b0, 0 ;Not needed? + LDI R30.b0, 0 BISSC_SKIP_CH_SEL?: ; loading rx frame size to maximum bits we can receive from BiSSC encoder - LDI SCRATCH3.w2, 256 + LDI SCRATCH3.w2, BISSC_MAX_FRAME_SIZE LDI SCRATCH3.w0, 0 ; store Rx and Tx frame size to ICSS_CFG_PRUx_ED_CHx for all configured channels SBCO &SCRATCH3, ICSS_CFG, BISSC_ICSSG_CHx_CFG0, 4 @@ -286,8 +286,10 @@ BISSC_PROC_WAIT_TILL_TX_CH_BUSY? .endif BISSC_SKIP_TX_CH_BUSY?: SET R30, R30, BISSC_RX_EN - LDI SCRATCH.w0,10000 - LDI SCRATCH.w2,0 + ;Max number to come out of infinite loop of waiting for encoder detected. + ;Using emperical number as spec did not mentioned about anything + LDI SCRATCH.w0, BISSC_MAX_WAIT_FOR_ENC_DETECT + LDI SCRATCH.w2, 0 BISSC_ACK_BIT?: ; wait for valid bit @@ -340,7 +342,7 @@ BISSC_PROC_WAIT_FOR_ALL_CORES?: QBNE BISSC_PROC_WAIT_FOR_ALL_CORES?, SCRATCH3.b0, 0 M_BISSC_LS_WAIT_FOR_SYNC QBBC BISSC_SKIP_GLOBAL_REINIT1?, PRIMARY_CORE, 0 - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 BISSC_SKIP_GLOBAL_REINIT1?: @@ -351,7 +353,7 @@ BISSC_SKIP_GLOBAL_REINIT1?: QBNE BISSC_PROC_WAIT_FOR_ALL_CORES?, SCRATCH3.b0, 0 M_BISSC_LS_WAIT_FOR_SYNC QBBC BISSC_SKIP_GLOBAL_REINIT1?, PRIMARY_CORE, 1 - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 BISSC_SKIP_GLOBAL_REINIT1?: @@ -362,14 +364,14 @@ BISSC_SKIP_GLOBAL_REINIT1?: QBNE BISSC_PROC_WAIT_FOR_ALL_CORES?, SCRATCH3.b0, 0 M_BISSC_LS_WAIT_FOR_SYNC QBBC BISSC_SKIP_GLOBAL_REINIT1?, PRIMARY_CORE, 2 - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 BISSC_SKIP_GLOBAL_REINIT1?: LBCO &SCRATCH2.b3, PRUx_DMEM, BISSC_RE_MEASURE_PROC_DELAY, 1 QBEQ BISSC_PROC_MEASURE_AGAIN?, SCRATCH2.b3, 1 .else - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .endif @@ -389,27 +391,28 @@ BISSC_END_PROC_ENC_NOT_DETECTED?: .if $isdefed("ENABLE_MULTI_MAKE_RTU") M_BISSC_LS_WAIT_FOR_SYNC QBBC BISSC_SKIP_GLOBAL_REINIT2?, PRIMARY_CORE, 0 - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .elseif $isdefed("ENABLE_MULTI_MAKE_PRU") M_BISSC_LS_WAIT_FOR_SYNC QBBC BISSC_SKIP_GLOBAL_REINIT2?, PRIMARY_CORE, 1 - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU") M_BISSC_LS_WAIT_FOR_SYNC QBBC BISSC_SKIP_GLOBAL_REINIT2?, PRIMARY_CORE, 2 - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .else - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .endif BISSC_SKIP_GLOBAL_REINIT2?: + ;Incase encoder is not detected you will reach here. HALT BISSC_END_PROC_MAX_PROC_TIME_EXCEEDED?: @@ -438,7 +441,7 @@ BISSC_DELAY_LOOP4?: SBCO &SCRATCH2.b3, PRUx_DMEM, BISSC_RE_MEASURE_PROC_DELAY, 1 QBA BISSC_PROC_WAIT_FOR_ALL_CORES? .else - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 LDI SCRATCH2.w0, 0 @@ -616,7 +619,7 @@ BISSC_CRC_END?: ; REVISIT: More optimization may be required or can be done at least in M_INIT_CRC_FLIP_FLOPS - defer those till a requirement comes ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; -M_OTF_RECEIVE .macro Ra, Rb, slave_offset +M_OTF_RECEIVE .macro Ra, Rb, encoder_offset ZERO &FF0, 6 ; initialize CRC flip-flops, i.e. ff[0-5] = 0 SUB SCRATCH3.b3, RAW_DATA_LEN, 6 ; pos data + e+ w @@ -641,19 +644,19 @@ BISSC_RX_LE_32_BITS?: M_OTF_RECEIVE_AND_DOWNSAMPLE Rb, BISSC_RCV_CRC.b0, SCRATCH3.b3, FIFO_BIT_IDX BISSC_RX_CRC?: - ADD SLAVE_OFFSET, SCRATCH2.b0, SCRATCH2.b3 - SBCO &Ra, PRUx_DMEM, SLAVE_OFFSET, 8 - ADD SLAVE_OFFSET, SCRATCH2.b0, SCRATCH2.b1 + ADD ENCODER_OFFSET, SCRATCH2.b0, SCRATCH2.b3 + SBCO &Ra, PRUx_DMEM, ENCODER_OFFSET, 8 + ADD ENCODER_OFFSET, SCRATCH2.b0, SCRATCH2.b1 M_CALC_CRC SCRATCH3.b3, FF0.b0, FF0.b1, FF0.b2, FF0.b3, FF1.b0, FF1.b1 QBEQ BISSC_CRC_SUCCESS?, SCRATCH3.b3, BISSC_RCV_CRC.b0 ; crc: calculated - SCRATCH3.b3, received - BISSC_RCV_CRC_0 - LBCO &SCRATCH, PRUx_DMEM, SLAVE_OFFSET, 4 + LBCO &SCRATCH, PRUx_DMEM, ENCODER_OFFSET, 4 ADD SCRATCH, SCRATCH, 1 - SBCO &SCRATCH, PRUx_DMEM, SLAVE_OFFSET , 4 + SBCO &SCRATCH, PRUx_DMEM, ENCODER_OFFSET , 4 BISSC_CRC_SUCCESS?: - ADD SLAVE_OFFSET, SCRATCH2.b0, SCRATCH2.b2 - SBCO &SCRATCH3.b3, PRUx_DMEM, SLAVE_OFFSET , 1 + ADD ENCODER_OFFSET, SCRATCH2.b0, SCRATCH2.b2 + SBCO &SCRATCH3.b3, PRUx_DMEM, ENCODER_OFFSET , 1 .endm @@ -779,7 +782,7 @@ BISSC_RX_RECEIVE_DOWNSAMPLE_LOOP?: ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; -; Macro: M_CALC_CRC +; Macro: M_CALC_CRC_MC ; Store and return the calculated CRC for all channels. ; Registers: ; ff[0-5]: Holds calculated CRC bits separately for all channels. @@ -859,7 +862,7 @@ BISSC_CRC_CH0_END?: ; REVISIT: More optimization may be required or can be done at least in M_INIT_CRC_FLIP_FLOPS - defer those till a requirement comes ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; -M_OTF_RECEIVE_MC .macro Ra, Rb, Rc, Rd, Re, Rf, slave_offset +M_OTF_RECEIVE_MC .macro Ra, Rb, Rc, Rd, Re, Rf, encoder_offset ; initialize CRC flip-flops, i.e. ff[0-5] = 0 ZERO &FF0, 24 @@ -884,27 +887,27 @@ BISSC_RX_LE_32_BITS?: M_OTF_RECEIVE_AND_DOWNSAMPLE_MC Rb, Rd, Rf, BISSC_RCV_CRC, SCRATCH3.b3, FIFO_BIT_IDX BISSC_RX_CRC?: - SBCO &Ra, PRUx_DMEM, slave_offset, 24 - ADD slave_offset, slave_offset, 24 + SBCO &Ra, PRUx_DMEM, encoder_offset, 24 + ADD encoder_offset, encoder_offset, 24 M_CALC_CRC_MC SCRATCH, FF0, FF1, FF2, FF3, FF4, FF5 QBEQ BISSC_CH0_CRC_SUCCESS?, SCRATCH.b0, BISSC_RCV_CRC.b0 ; crc: calculated - SCRATCH, received - BISSC_RCV_CRC - LBCO &SCRATCH3, PRUx_DMEM, slave_offset, 4 + LBCO &SCRATCH3, PRUx_DMEM, encoder_offset, 4 ADD SCRATCH3, SCRATCH3, 1 - SBCO &SCRATCH3, PRUx_DMEM, slave_offset , 4 + SBCO &SCRATCH3, PRUx_DMEM, encoder_offset , 4 BISSC_CH0_CRC_SUCCESS?: - ADD slave_offset, slave_offset, 4 + ADD encoder_offset, encoder_offset, 4 QBEQ BISSC_CH2_CRC_SUCCESS?, SCRATCH.b1, BISSC_RCV_CRC.b1 ; crc: calculated - SCRATCH, received - BISSC_RCV_CRC - LBCO &SCRATCH3, PRUx_DMEM, slave_offset, 4 + LBCO &SCRATCH3, PRUx_DMEM, encoder_offset, 4 ADD SCRATCH3, SCRATCH3, 1 - SBCO &SCRATCH3, PRUx_DMEM, slave_offset , 4 + SBCO &SCRATCH3, PRUx_DMEM, encoder_offset , 4 BISSC_CH2_CRC_SUCCESS?: - ADD slave_offset, slave_offset, 4 + ADD encoder_offset, encoder_offset, 4 QBEQ BISSC_CRC_SUCCESS?, SCRATCH.b2, BISSC_RCV_CRC.b2 ; crc: calculated - SCRATCH, received - BISSC_RCV_CRC - LBCO &SCRATCH3, PRUx_DMEM, slave_offset, 4 + LBCO &SCRATCH3, PRUx_DMEM, encoder_offset, 4 ADD SCRATCH3, SCRATCH3, 1 - SBCO &SCRATCH3, PRUx_DMEM, slave_offset , 4 + SBCO &SCRATCH3, PRUx_DMEM, encoder_offset , 4 BISSC_CRC_SUCCESS?: - ADD slave_offset, slave_offset, 4 - SBCO &SCRATCH, PRUx_DMEM, slave_offset , 4 + ADD encoder_offset, encoder_offset, 4 + SBCO &SCRATCH, PRUx_DMEM, encoder_offset , 4 .endm diff --git a/source/position_sense/bissc/firmware/bissc_main.asm b/source/position_sense/bissc/firmware/bissc_main.asm index 548a8ee..502c42b 100644 --- a/source/position_sense/bissc/firmware/bissc_main.asm +++ b/source/position_sense/bissc/firmware/bissc_main.asm @@ -223,26 +223,26 @@ BISSC_SEND_RECEIVE_BISSC_MULTI_CHANNEL: LBCO &FIFO_BIT_IDX, PRUx_DMEM, BISSC_FIFO_BIT_IDX_OFFSET, 1 LBCO &SCRATCH2.b1, PRUx_DMEM, BISSC_POS_CRC_LEN_CONFIG_OFFSET, 1 .if $isdefed("ENABLE_MULTI_MAKE_RTU") - LBCO &DAISY_CHAIN, PRUx_DMEM, BISSC_NUM_SLAVE_CH0_CONFIG_OFFSET, 4 + LBCO &DAISY_CHAIN, PRUx_DMEM, BISSC_NUM_ENCODER_CH0_CONFIG_OFFSET, 4 .elseif $isdefed("ENABLE_MULTI_MAKE_PRU") - LBCO &DAISY_CHAIN, PRUx_DMEM, BISSC_NUM_SLAVE_CH1_CONFIG_OFFSET, 4 + LBCO &DAISY_CHAIN, PRUx_DMEM, BISSC_NUM_ENCODER_CH1_CONFIG_OFFSET, 4 .elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU") - LBCO &DAISY_CHAIN, PRUx_DMEM, BISSC_NUM_SLAVE_CH2_CONFIG_OFFSET, 4 + LBCO &DAISY_CHAIN, PRUx_DMEM, BISSC_NUM_ENCODER_CH2_CONFIG_OFFSET, 4 .else - ;ch0 number of slaves and encoder data lengths is the base daisychain offset and only ch0 offset is going to be used in single ch or multi ch single pru - LBCO &DAISY_CHAIN, PRUx_DMEM, BISSC_NUM_SLAVE_CH0_CONFIG_OFFSET, 4 + ;ch0 number of encoders and encoder data lengths is the base daisychain offset and only ch0 offset is going to be used in single ch or multi ch single pru + LBCO &DAISY_CHAIN, PRUx_DMEM, BISSC_NUM_ENCODER_CH0_CONFIG_OFFSET, 4 .endif ;compute RX frame size from input arguments. ACK length will be taken from processing delay. - ADD SCRATCH2.w2, SCRATCH2.w2, DAISY_CHAIN.b1 ;data length of slave 0 + ADD SCRATCH2.w2, SCRATCH2.w2, DAISY_CHAIN.b1 ;data length of encoder 0 ADD SCRATCH2.w2, SCRATCH2.w2, SCRATCH2.b1 ;crc length ADD SCRATCH2.w2, SCRATCH2.w2, BISSC_EW_LEN ;E + W ADD SCRATCH2.w2, SCRATCH2.w2, BISSC_SB_CDS_LEN ;SB + CDS QBEQ BISSC_SKIP_DAISY_CHAIN, DAISY_CHAIN.b2, 0 - ADD SCRATCH2.w2, SCRATCH2.w2, DAISY_CHAIN.b2 ;data length of slave 1 + ADD SCRATCH2.w2, SCRATCH2.w2, DAISY_CHAIN.b2 ;data length of encoder 1 ADD SCRATCH2.w2, SCRATCH2.w2, SCRATCH2.b1 ;crc length ADD SCRATCH2.w2, SCRATCH2.w2, BISSC_EW_LEN ;E + W QBEQ BISSC_SKIP_DAISY_CHAIN, DAISY_CHAIN.b3, 0 - ADD SCRATCH2.w2, SCRATCH2.w2, DAISY_CHAIN.b3 ;data length of slave 2 + ADD SCRATCH2.w2, SCRATCH2.w2, DAISY_CHAIN.b3 ;data length of encoder 2 ADD SCRATCH2.w2, SCRATCH2.w2, SCRATCH2.b1 ;crc length ADD SCRATCH2.w2, SCRATCH2.w2, BISSC_EW_LEN ;E + W @@ -367,24 +367,24 @@ BISSC_POSITION_DATA?: QBEQ BISSC_END_RECEIVE?, DAISY_CHAIN.b0,0 ZERO &RAW_DATA1_0, 24 - QBEQ BISSC_SLAVE3_DATA?, DAISY_CHAIN.b0, 3 ;check if slave 2 is connected - QBEQ BISSC_SLAVE2_DATA?, DAISY_CHAIN.b0, 2 ;check if slave 1 is connected + QBEQ BISSC_ENCODER3_DATA?, DAISY_CHAIN.b0, 3 ;check if encoder 2 is connected + QBEQ BISSC_ENCODER2_DATA?, DAISY_CHAIN.b0, 2 ;check if encoder 1 is connected .if !$isdefed("ENABLE_MULTI_CHANNEL") ADD RAW_DATA_LEN, DAISY_CHAIN.b1, (BISSC_EW_LEN + BISSC_RX_CRCBITS) .endif - LDI SCRATCH2.b0, BISSC_POS_DATA_RES_SLAVE0_OFFSET + LDI SCRATCH2.b0, BISSC_POS_DATA_RES_ENCODER0_OFFSET QBA BISSC_START_RECEIVE? -BISSC_SLAVE2_DATA?: +BISSC_ENCODER2_DATA?: .if !$isdefed("ENABLE_MULTI_CHANNEL") ADD RAW_DATA_LEN, DAISY_CHAIN.b2, (BISSC_EW_LEN + BISSC_RX_CRCBITS) .endif - LDI SCRATCH2.b0, BISSC_POS_DATA_RES_SLAVE1_OFFSET + LDI SCRATCH2.b0, BISSC_POS_DATA_RES_ENCODER1_OFFSET QBA BISSC_START_RECEIVE? -BISSC_SLAVE3_DATA?: +BISSC_ENCODER3_DATA?: .if !$isdefed("ENABLE_MULTI_CHANNEL") ADD RAW_DATA_LEN, DAISY_CHAIN.b3, (BISSC_EW_LEN + BISSC_RX_CRCBITS) .endif - LDI SCRATCH2.b0, BISSC_POS_DATA_RES_SLAVE2_OFFSET + LDI SCRATCH2.b0, BISSC_POS_DATA_RES_ENCODER2_OFFSET BISSC_START_RECEIVE?: .if $isdefed("ENABLE_MULTI_CHANNEL") ;receive pos data for multiple channel at once @@ -418,22 +418,22 @@ BISSC_SEND_LOW?: SET SCRATCH1, SCRATCH1, 29 M_BISSC_CLK_CONFIG CH_MASK, SCRATCH1 BISSC_SEND_HIGH?: - QBNE BISSC_CTRL_NO_WAIT_FOR_SLAVE_START_BIT?, BISSC_CMD_BIT_PTR, 13 + QBNE BISSC_CTRL_NO_WAIT_FOR_ENCODER_START_BIT?, BISSC_CMD_BIT_PTR, 13 QBBC BISSC_CTRL_SB_CH1?, CH_MASK, 0 - QBBS BISSC_CTRL_NO_WAIT_FOR_SLAVE_START_BIT?, BISSC_CDS_BACKUP.b0, FIFO_BIT_IDX + QBBS BISSC_CTRL_NO_WAIT_FOR_ENCODER_START_BIT?, BISSC_CDS_BACKUP.b0, FIFO_BIT_IDX BISSC_CTRL_SB_CH1?: QBBC BISSC_CTRL_SB_CH2?, CH_MASK, 1 - QBBS BISSC_CTRL_NO_WAIT_FOR_SLAVE_START_BIT?, BISSC_CDS_BACKUP.b1, FIFO_BIT_IDX + QBBS BISSC_CTRL_NO_WAIT_FOR_ENCODER_START_BIT?, BISSC_CDS_BACKUP.b1, FIFO_BIT_IDX BISSC_CTRL_SB_CH2?: QBBC BISSC_SKIP_CTRL_SB?, CH_MASK, 2 - QBBS BISSC_CTRL_NO_WAIT_FOR_SLAVE_START_BIT?, BISSC_CDS_BACKUP.b2, FIFO_BIT_IDX + QBBS BISSC_CTRL_NO_WAIT_FOR_ENCODER_START_BIT?, BISSC_CDS_BACKUP.b2, FIFO_BIT_IDX BISSC_SKIP_CTRL_SB?: ZERO &SCRATCH1, 4 SET SCRATCH1, SCRATCH1, 29 M_BISSC_CLK_CONFIG CH_MASK, SCRATCH1 QBA BISSC_CTRL_CMD_BIT_SEND_SKIP? -BISSC_CTRL_NO_WAIT_FOR_SLAVE_START_BIT?: +BISSC_CTRL_NO_WAIT_FOR_ENCODER_START_BIT?: SUB BISSC_CMD_BIT_PTR, BISSC_CMD_BIT_PTR, 1 QBLE BISSC_CTRL_CMD_DATA_RCV_SKIP? , BISSC_CMD_BIT_PTR, 12 QBGT BISSC_READ_CTRL_CRC_BITS? , BISSC_CMD_BIT_PTR, 4 @@ -621,7 +621,7 @@ BISSC_SKIP_RESET_BIT?: QBBC BISSC_SKIP_GLOBAL_REINIT?, PRIMARY_CORE, 0 NOP NOP - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .elseif $isdefed("ENABLE_MULTI_MAKE_PRU") @@ -629,7 +629,7 @@ BISSC_SKIP_RESET_BIT?: QBBC BISSC_SKIP_GLOBAL_REINIT?, PRIMARY_CORE, 1 NOP NOP - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU") @@ -637,11 +637,11 @@ BISSC_SKIP_RESET_BIT?: QBBC BISSC_SKIP_GLOBAL_REINIT?, PRIMARY_CORE, 2 NOP NOP - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .else - SET R31, R31, 19 ;ENDAT_TX_GLOBAL_REINIT ; Set TX_EN low + SET R31, R31, 19 ;BISSC_TX_GLOBAL_REINIT ; Set TX_EN low ; rx_en = 0 : Disable RX mode LDI R30.b3, 0 .endif diff --git a/source/position_sense/bissc/firmware/bissc_params.h b/source/position_sense/bissc/firmware/bissc_params.h index 146d43e..5907ca1 100644 --- a/source/position_sense/bissc/firmware/bissc_params.h +++ b/source/position_sense/bissc/firmware/bissc_params.h @@ -45,7 +45,7 @@ ; R10 - flipflops for control communication otf crc. ; R11.b1 - holds 4-bit control communication crc, R11.b2 - holds cds data, R11.b3 - holds ctrl otf crc. ; R12.b0 - control command bit pointer, R12.b1 - control cycle counter. - ; R12.b2 - holds the channel number for channel in use, R12.b3 - holds slave offset for encoder connected in daisy chain. + ; R12.b2 - holds the channel number for channel in use, R12.b3 - holds encoder offset for encoder connected in daisy chain. ; R13-R14 - holds raw data for channel 0, R15-R16 - holds raw data for channel 1, R17-R18 - holds raw data for channel 2. ; R19 - holds cds backup for one biss-c cycle. ; R20 - Used as flag register. @@ -81,7 +81,7 @@ .asg R12.b0, BISSC_CMD_BIT_PTR .asg R12.b1, BISSC_CTRL_CYCLE_CNTR .asg R12.b2, BISSC_ENABLE_CHx_IN_USE - .asg R12.b3, SLAVE_OFFSET + .asg R12.b3, ENCODER_OFFSET .asg R13, RAW_DATA1_0 ;Includes Position data, ew and CRC .asg R14, RAW_DATA2_0 .asg R15, RAW_DATA1_1 ;Includes Position data, ew and CRC @@ -103,30 +103,30 @@ .asg R29, LINK_REG -BISSC_RX_CRCBITS .set 6 +BISSC_RX_CRCBITS .set 6 ;Pos data CRC len +BISSC_SB_CDS_LEN .set 2 ;Start bit + CDS bit len +BISSC_EW_LEN .set 2 ;Error warning len ; Time units below in nano sec -BISSC_MAX_TBiSS_Timeout .set 40000 ;max biss timeout -BISSC_MIN_TBiSS_Timeout .set 12500 ;min biss timeout -BISSC_TLineDelay .set 40000 ;max Line delay +BISSC_MAX_TBISS_TIMEOUT .set 40000 ;max biss timeout +BISSC_MIN_TBISS_TIMEOUT .set 12500 ;min biss timeout +BISSC_TLINEDELAY .set 40000 ;max Line delay -BISSC_BUSY_Tbust_s .set 40000 ;max processing time for single cycle data -BISSC_BUSY_Tbust_r .set 20000000 ;max processing time for register access +BISSC_BUSY_TBUSY_S .set 40000 ;max processing time for single cycle data +BISSC_BUSY_TbUSY_R .set 20000000 ;max processing time for register access -BISSC_CONFIG_CH0 .set 0x1 -BISSC_CONFIG_CH1 .set (0x1 << 1) -BISSC_CONFIG_CH2 .set (0x1 << 2) +BISSC_CONFIG_CH0 .set 0x1 ;Config Endat channel 0 +BISSC_CONFIG_CH1 .set (0x1 << 1) ;Config Endat channel 1 +BISSC_CONFIG_CH2 .set (0x1 << 2) ;Config Endat channel 2 -BISSC_SB_CDS_LEN .set 2 -BISSC_EW_LEN .set 2 +BISSC_CH0_RX_VALID_BIT_OFFSET .set 24 ;RX valid bit offset channel 0 +BISSC_CH1_RX_VALID_BIT_OFFSET .set 25 ;RX valid bit offset channel 1 +BISSC_CH2_RX_VALID_BIT_OFFSET .set 26 ;RX valid bit offset channel 2 -BISSC_CH0_RX_VALID_BIT_OFFSET .set 24 -BISSC_CH1_RX_VALID_BIT_OFFSET .set 25 -BISSC_CH2_RX_VALID_BIT_OFFSET .set 26 - - -BISSC_CH0_VALID_BIT_IDX .set 24 -BISSC_CH1_VALID_BIT_IDX .set 25 -BISSC_CH2_VALID_BIT_IDX .set 26 +BISSC_CH0_VALID_BIT_IDX .set 24 ;RX valid bit index channel 0 +BISSC_CH1_VALID_BIT_IDX .set 25 ;RX valid bit index channel 1 +BISSC_CH2_VALID_BIT_IDX .set 26 ;RX valid bit index channel 2 +BISSC_MAX_FRAME_SIZE .set 256 ;Max frame size for Processing delay measurement +BISSC_MAX_WAIT_FOR_ENC_DETECT .set 10000 ;Max wait count for encoder detected \ No newline at end of file diff --git a/source/position_sense/bissc/firmware/firmware_version.h b/source/position_sense/bissc/firmware/firmware_version.h index 7127295..b632fa4 100644 --- a/source/position_sense/bissc/firmware/firmware_version.h +++ b/source/position_sense/bissc/firmware/firmware_version.h @@ -43,9 +43,9 @@ __firmware_version_h .set 1 ; ICSS_FIRMWARE_RELEASE_1: ; bit 31..16 reserved ; bit15..8 device number -FIRMWARE_DEVICE_AM335x .set 0 ; AM335x -FIRMWARE_DEVICE_AM437x .set 1 ; AM437x -FIRMWARE_DEVICE_AM64x .set 2 ; AM64x +FIRMWARE_DEVICE_AM335x .set 0 ; AM335x +FIRMWARE_DEVICE_AM437x .set 1 ; AM437x +FIRMWARE_DEVICE_AM64x_AM243x .set 2 ; AM64x ; bit7..0 protocol type FIRMWARE_PROTOCOL_TYPE_PROFIBUS_SLAVE .set 0x00 FIRMWARE_PROTOCOL_TYPE_ETHERCAT_SLAVE .set 0x01 @@ -68,7 +68,7 @@ FIRMWARE_VERSION_MAJOR .set 0x00 ; bit15..0 minor number FIRMWARE_VERSION_MINOR .set 0x0002 -ICSS_FIRMWARE_RELEASE_1 .set ((FIRMWARE_DEVICE_AM64x << 8) | (FIRMWARE_PROTOCOL_TYPE_BISSC_MASTER << 0)) +ICSS_FIRMWARE_RELEASE_1 .set ((FIRMWARE_DEVICE_AM64x_AM243x << 8) | (FIRMWARE_PROTOCOL_TYPE_BISSC_MASTER << 0)) ICSS_FIRMWARE_RELEASE_2 .set ((FIRMWARE_VERSION_RELEASE << 31) | (FIRMWARE_VERSION_REVISION << 24) | (FIRMWARE_VERSION_MAJOR << 16) | (FIRMWARE_VERSION_MINOR << 0)) .endif diff --git a/source/position_sense/bissc/include/bissc_api.h b/source/position_sense/bissc/include/bissc_api.h index 43dfc43..e187211 100644 --- a/source/position_sense/bissc/include/bissc_api.h +++ b/source/position_sense/bissc/include/bissc_api.h @@ -36,12 +36,7 @@ #ifdef __cplusplus extern "C" { #endif - - /** - * \defgroup POSITION_SENSE_API APIs for Position Sense - * - * This module contains APIs for device drivers for various position sense encoders supported in this SDK. - */ +#include "bissc_drv.h" /** * \defgroup BISSC_API_MODULE APIs for BiSSC Encoder @@ -53,9 +48,9 @@ extern "C" { */ /** - * \brief send the BiSSC command and wait till firmware acknowledges + * \brief Send the BiSSC command and wait till firmware acknowledges * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * * \retval SystemP_SUCCESS for success, SystemP_FAILURE for failure * @@ -63,35 +58,35 @@ extern "C" { int32_t bissc_command_process(struct bissc_priv *priv); /** - * \brief trigger sending the BiSSC command in PRU + * \brief Trigger sending the BiSSC command in PRU * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * * */ void bissc_command_send(struct bissc_priv *priv); /** - * \brief wait till PRU finishes BiSSC transaction + * \brief Wait till PRU finishes BiSSC transaction * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * * */ int32_t bissc_command_wait(struct bissc_priv *priv); /** - * \brief Get single cycle BiSS-C position data + * \brief Get single cycle BiSS-C position data * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * */ -int32_t bissc_get_pos_res(struct bissc_priv *priv); +int32_t bissc_get_pos(struct bissc_priv *priv); /** - * \brief configure EnDat clock + * \brief Configure EnDat clock * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * \param[in] clk_cfg pointer to structure containing clock configuration data * */ @@ -99,48 +94,56 @@ void bissc_config_clock(struct bissc_priv *priv, struct bissc_clk_cfg *clk_cfg); /** - * \brief select channel to be used by BiSSC master + * \brief Select channel to be used by BiSSC master * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * \param[in] mask channel mask * \param[in] totalch total number of channels in use * */ void bissc_config_channel(struct bissc_priv *priv, int32_t mask, int32_t totalch); /** - * \brief configure the channels to be used by BiSSC master + * \brief Configure the channels to be used by BiSSC master * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * \param[in] mask channel mask - * \param[in] loadshare status for loadshare mode * */ -void bissc_config_load_share(struct bissc_priv *priv, int32_t mask, int32_t loadshare); +void bissc_config_load_share(struct bissc_priv *priv, int32_t mask); /** - * \brief enable load share mode for BiSSC master + * \brief Enable load share mode for BiSSC master * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * */ void bissc_enable_load_share_mode(struct bissc_priv *priv); /** - * \brief configure the primary core for load share mode + * \brief Configure the primary core for load share mode * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * \param[in] mask channel mask * */ void bissc_config_primary_core_mask(struct bissc_priv *priv, uint8_t mask); /** - * \brief wait for BiSSC master firmware to initialize + * \brief Wait for BiSSC master firmware to initialize * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * \param[in] timeout timeout to wait for initialization * \param[in] mask channel mask * \retval SystemP_SUCCESS for success, SystemP_FAILURE for failure * */ int32_t bissc_wait_for_fw_initialization(struct bissc_priv *priv, uint32_t timeout, uint8_t mask); + +/** + * \brief Initialize BiSSC hardware interface + * + * \param[in] priv cookie returned by \ref bissc_init + * + */ +void bissc_hw_init(struct bissc_priv *priv); + /** * \brief Initialize BiSSC firmware interface address and get the pointer * to struct bissc_priv instance @@ -148,23 +151,29 @@ int32_t bissc_wait_for_fw_initialization(struct bissc_priv *priv, uint32_t timeo * \param[in] gPruIcssXHandle BiSSC firmware interface address * \param[in] slice ICSS PRU SLICE * \param[in] frequency Input frequency + * \param[in] core_clk_freq Core clock frequency + * \param[in] uart_clk_freq Uart clock frequency * * \retval priv pointer to struct bissc_priv instance * */ -struct bissc_priv *bissc_init(PRUICSS_Handle gPruIcssXHandle, int32_t slice, uint32_t frequency); +struct bissc_priv *bissc_init(PRUICSS_Handle gPruIcssXHandle, + int32_t slice, + uint32_t frequency, + uint32_t core_clk_freq, + uint32_t uart_clk_freq); /** * \brief Update max processing time and bit index to poll in fifo data * - * \param[in] priv cookie returned by bissc_init - * \param[in] frequency Input frequency - */ -void bissc_update_max_proc_delay(struct bissc_priv *priv, uint32_t frequency); -/** - * \brief wait for BiSSC master firmware to measure processing time + * \param[in] priv cookie returned by \ref bissc_init * - * \param[in] priv cookie returned by bissc_init + */ +void bissc_update_max_proc_delay(struct bissc_priv *priv); +/** + * \brief Wait for BiSSC master firmware to measure processing time + * + * \param[in] priv cookie returned by \ref bissc_init * \param[in] timeout timeout to wait for initialization * \retval SystemP_SUCCESS for success, SystemP_FAILURE for failure * @@ -174,16 +183,15 @@ int32_t bissc_wait_measure_proc_delay(struct bissc_priv *priv, uint32_t timeout) /** * \brief Set default configuration parameters for BiSSC Master firmware * - * \param[in] priv cookie returned by bissc_init - * \param[in] frequency Input frequency + * \param[in] priv cookie returned by \ref bissc_init * \param[in] icssgclk ICSSG core clock for firmware reference * */ -void bissc_set_default_initialization(struct bissc_priv *priv, uint32_t frequency, uint64_t icssgclk); +void bissc_set_default_initialization(struct bissc_priv *priv, uint64_t icssgclk); /** - * \brief update data length with encoder bit width for BiSSC Master firmware + * \brief Update data length with encoder bit width for BiSSC Master firmware * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * \param[in] single_turn_len Encoder's single turn resolution * \param[in] multi_turn_len Encoder's multi turn resolution * \param[in] num_pru number(index) of PRU in use @@ -191,32 +199,38 @@ void bissc_set_default_initialization(struct bissc_priv *priv, uint32_t frequenc void bissc_update_data_len(struct bissc_priv *priv, uint32_t single_turn_len[], uint32_t multi_turn_len[], int32_t num_pru); /** - * \brief set control command and process the ctrl communication read/write + * \brief Set control command and process the ctrl communication read/write * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init * \param[in] ctrl_cmd Hex equivalent of control command * \retval SystemP_SUCCESS for success, SystemP_FAILURE for failure */ int32_t bissc_set_ctrl_cmd_and_process(struct bissc_priv *priv, uint32_t ctrl_cmd[]); /** - * \brief configure the master for EnDat mode + * \brief Configure the master for EnDat mode * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init */ void bissc_config_endat_mode(struct bissc_priv *priv); /** - * \brief clear the channel specific frame size cfg registers. + * \brief Clear the channel specific frame size cfg registers. * - * \param[in] priv cookie returned by bissc_init + * \param[in] priv cookie returned by \ref bissc_init */ void bissc_config_clr_cfg0(struct bissc_priv *priv); /** - * \brief calculate Rx and Tx divisors for given frequency. + * \brief Get measured processing delay of individual channel. * - * \param[in] freq frequecy specified by the user. - * \param[in] clk_cfg pointer to structure containing clock configuration data. + * \param[in] priv cookie returned by \ref bissc_init */ -int32_t bissc_calc_clock(uint32_t freq, struct bissc_clk_cfg *clk_cfg); +void bissc_get_enc_proc_delay(struct bissc_priv *priv); +/** + * \brief Calculate Rx and Tx divisors for given frequency. + * + * \param[in] priv cookie returned by \ref bissc_init + * \param[in] clk_cfg pointer to structure containing clock configuration data. + */ +int32_t bissc_calc_clock(struct bissc_priv *priv, struct bissc_clk_cfg *clk_cfg); /** @} */ #ifdef __cplusplus diff --git a/source/position_sense/bissc/include/bissc_drv.h b/source/position_sense/bissc/include/bissc_drv.h index e793c31..ff5bf8c 100644 --- a/source/position_sense/bissc/include/bissc_drv.h +++ b/source/position_sense/bissc/include/bissc_drv.h @@ -43,38 +43,47 @@ extern "C" { #include #include #include +/* Single PRU - Single channel configuration */ #define BISSC_MODE_SINGLE_CHANNEL_SINGLE_PRU (0U) +/* Single PRU - Multichannel configuration */ #define BISSC_MODE_MULTI_CHANNEL_SINGLE_PRU (1U) +/* Multichannel - Load Share configuration */ #define BISSC_MODE_MULTI_CHANNEL_MULTI_PRU (2U) -#define BISSC_NUM_BITS_POSITION_CRC 6 -#define BISSC_NUM_BITS_EW 2 -#define BISSC_NUM_BITS_ADDRESS 8 - -#define BISSC_MAX_CYCLE_TIMEOUT 5 -#define NUM_ED_CH_MAX 3 -#define NUM_SLAVE_MAX 3 -/* Max processing delay at 1 MHz is 40 us as per spec - values are in valid bits*/ +/* Minimum and Maximum BiSSC cycle time depends on various params as below: + TCycle_min = TMA ∗ (5 + DLEN + CRCLEN) + tLineDelay + tbusy_max + busy_s_max + tTO + Instead wait for max of 5 ms as this can vary for different encoders and for daisy chain +*/ +#define BISSC_MAX_CYCLE_TIMEOUT 5 +/* Maximum number of Endat Channels*/ +#define NUM_ED_CH_MAX 3 +/* Maximum number of BiSS-C Encoders connected in Daisy chain*/ +#define NUM_ENCODERS_MAX 3 +/* Max processing delay as per spec - values are in valid bits/clock cycles*/ #define BISSC_MAX_PROC_DELAY_1MHZ 40 #define BISSC_MAX_PROC_DELAY_2MHZ 80 #define BISSC_MAX_PROC_DELAY_5MHZ 200 #define BISSC_MAX_PROC_DELAY_8MHZ 320 #define BISSC_MAX_PROC_DELAY_10MHZ 400 -#define BISSC_RX_SAMPLE_SIZE 7 /* 8x over clock */ -#define BISSC_RX_SAMPLE_SIZE_10MHZ 3 /* 4x over clock */ -#define BISSC_POS_CRC_LEN 6 -#define BISSC_EW_LEN 2 -#define BISSC_CTRL_CMD_CRC_LEN 4 -#define BISSC_POS_DATA_LEN_DEFAULT 12 +#define BISSC_RX_SAMPLE_SIZE 7 /* 8x over clock */ +#define BISSC_RX_SAMPLE_SIZE_10MHZ 3 /* 4x over clock */ +#define BISSC_POS_CRC_LEN 6 /* Number of position data CRC bits */ +#define BISSC_EW_LEN 2 /* Number of Error and Warning bits */ +#define BISSC_CTRL_CMD_CRC_LEN 4 /* Number of CTRL cmd CRC bits */ +#define BISSC_POS_DATA_LEN_DEFAULT 12 /* Default data length instead of garbage*/ + +/* Allowed frequencies in MHz for BiSSC */ +#define BISSC_FREQ_1MHZ 1 +#define BISSC_FREQ_2MHZ 2 +#define BISSC_FREQ_5MHZ 5 +#define BISSC_FREQ_8MHZ 8 +#define BISSC_FREQ_10MHZ 10 -#define BISSC_INPUT_CLOCK_UART_FREQUENCY 192000000 -#define BISSC_INPUT_CLOCK_OCP_FREQUENCY 200000000 -#define BISSC_INPUT_CLOCK_FREQUENCY_UART BISSC_INPUT_CLOCK_UART_FREQUENCY /** * \brief Structure defining EnDat clock configuration for selected frequency * - * \details Rx, Tx divisors for selected frequency, oversampling rate, ocp/uart clock source status. + * \details Rx, Tx divisors for selected frequency, oversampling rate, core_clk/uart clock source status. * */ struct bissc_clk_cfg @@ -85,8 +94,8 @@ struct bissc_clk_cfg /**< Tx divisor for selected frequency*/ uint16_t rx_div_attr; /**< Rx oversampling rate*/ - uint16_t is_ocp; - /**< status for ocp clock source*/ + uint16_t is_core_clk; + /**< Status for core_clk clock source*/ }; /** * \brief Structure defining BiSSC Position data results @@ -95,17 +104,17 @@ struct bissc_clk_cfg */ struct bissc_position_info { - uint64_t position[NUM_SLAVE_MAX]; + uint64_t position[NUM_ENCODERS_MAX]; /**< Position data results from each encoder connected in daisy chain*/ - float angle[NUM_SLAVE_MAX]; + float angle[NUM_ENCODERS_MAX]; /**< Single turn result(Angle) for each encoder connected in daisy chain*/ - uint32_t num_of_turns[NUM_SLAVE_MAX]; + uint32_t num_of_turns[NUM_ENCODERS_MAX]; /**< Multi turn result(No. of rotations) for each encoder connected in daisy chain*/ - uint8_t ew[NUM_SLAVE_MAX]; + uint8_t ew[NUM_ENCODERS_MAX]; /**< Error and Warning result for each encoder connected in daisy chain*/ - uint8_t rcv_crc[NUM_SLAVE_MAX]; - /**< received 6-bit crc for each encoder connected in daisy chain*/ - uint8_t otf_crc[NUM_SLAVE_MAX]; + uint8_t rcv_crc[NUM_ENCODERS_MAX]; + /**< Received 6-bit crc for each encoder connected in daisy chain*/ + uint8_t otf_crc[NUM_ENCODERS_MAX]; /**< Calculated otf 6-bit crc for each encoder connected in daisy chain*/ }; /** @@ -135,18 +144,18 @@ struct bissc_priv /**< PRU ICSS slice number*/ int32_t load_share; /**< Load share flag*/ - int32_t data_len[NUM_ED_CH_MAX][NUM_SLAVE_MAX]; + int32_t data_len[NUM_ED_CH_MAX][NUM_ENCODERS_MAX]; /**< Resolution of each encoder connected in daisy chain config to each channel*/ - int32_t single_turn_len[NUM_ED_CH_MAX][NUM_SLAVE_MAX]; + int32_t single_turn_len[NUM_ED_CH_MAX][NUM_ENCODERS_MAX]; /**< Single turn resolution of each encoder connected in daisy chain config to each channel*/ - int32_t multi_turn_len[NUM_ED_CH_MAX][NUM_SLAVE_MAX]; + int32_t multi_turn_len[NUM_ED_CH_MAX][NUM_ENCODERS_MAX]; /**< Multi turn resolution of each encoder connected in daisy chain config to each channel*/ int32_t channel[NUM_ED_CH_MAX]; /**< Array of all configured channel*/ struct bissc_pruicss_xchg *pruicss_xchg; /**< Structure defining BiSSC interface*/ int32_t has_safety; - /**< status for safety support*/ + /**< Status for safety support*/ void *pruicss_cfg; /**< PRU-ICSS cfg registers base offset*/ int64_t raw_data; @@ -155,19 +164,24 @@ struct bissc_priv /**< Structure containing encoders position data results for each channel*/ struct bissc_control_info enc_ctrl_data[NUM_ED_CH_MAX]; /**< Structure containing encoders control communication results for each PRU*/ - int32_t pd_crc_err_cnt[NUM_ED_CH_MAX][NUM_SLAVE_MAX]; - /**< position data crc error count for each encoder connected in daisy chain to each channel*/ + int32_t pd_crc_err_cnt[NUM_ED_CH_MAX][NUM_ENCODERS_MAX]; + /**< Position data crc error count for each encoder connected in daisy chain to each channel*/ int32_t ctrl_crc_err_cnt[NUM_ED_CH_MAX]; - /**< control communication crc error count for each encoder connected to each PRU in load share*/ - int32_t num_slaves[NUM_ED_CH_MAX]; - /**< Number of slaves connected in daisy chain to each PRU in load share*/ + /**< Control communication crc error count for each encoder connected to each PRU in load share*/ + int32_t num_encoders[NUM_ED_CH_MAX]; + /**< Number of encoders connected in daisy chain to each PRU in load share*/ int32_t totalchannels; /**< Total number of channels configured*/ + uint16_t proc_delay[NUM_ED_CH_MAX]; + /**< Measured Processing delay of individual channel*/ + uint32_t baud_rate; + /**< Input baudrate*/ + uint32_t core_clk_freq; + /**< Core clock frequency*/ + uint32_t uart_clk_freq; + /**< UART clock frequency*/ }; - -#include "bissc_api.h" - #ifdef __cplusplus } #endif diff --git a/source/position_sense/bissc/include/bissc_interface.h b/source/position_sense/bissc/include/bissc_interface.h index 9539a89..2dbb86b 100644 --- a/source/position_sense/bissc/include/bissc_interface.h +++ b/source/position_sense/bissc/include/bissc_interface.h @@ -49,7 +49,8 @@ extern "C" { * \brief Structure defining BiSSC Raw data received from encoder. * */ -struct raw_data{ +struct raw_data +{ volatile uint32_t pos_data_word0; /**< Initial (<=32) position bits received */ volatile uint32_t pos_data_word1; @@ -58,10 +59,11 @@ struct raw_data{ /** * \brief Structure defining BiSSC Position data lengths of conected encoder. * - * \details number of slaves connected in daisy chain, and their position data lengths(resolution). + * \details Number of encoders connected in daisy chain, and their position data lengths(resolution). */ -struct enc_len{ - volatile uint8_t num_slaves; +struct enc_len +{ + volatile uint8_t num_encoders; /**< Number of Encoders connected */ volatile uint8_t data_len[3]; /**< Data length of individual encoder connected in daisy chain*/ @@ -71,7 +73,8 @@ struct enc_len{ * * \details raw data, position data crc error count, 6-bit otf crc. */ -struct pos_data_res{ +struct pos_data_res +{ struct raw_data raw_data[3]; /**< Structure defining BiSSC Raw data received from encoder*/ volatile uint32_t pd_crc_err_cnt[3];