Pull request #10: am64x/am243: Enable Multi channel continuous mode
Merge in PINDSW/motor_control_sdk from a0502729_PINDSW-5681_EnDat_enable_multi_channel_continuous_mode to next * commit '34b62601844e718b3c9484fa6290eac437330e44': am64x/am243: EnDat: Enable periodic trigger mode for multi-channel
This commit is contained in:
commit
044f71b27d
@ -48,6 +48,9 @@
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#include "ti_drivers_open_close.h"
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#include "ti_board_open_close.h"
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#include <position_sense/endat/include/endat_drv.h>
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#include "endat_periodic_trigger.h"
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#if PRU_ICSSGx_PRU_SLICE
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#define PRUICSS_PRUx PRUICSS_PRU1
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#define PRUICSS_TXPRUx PRUICSS_TX_PRU1
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@ -103,13 +106,14 @@ static void (*endat_fn_position_loop)(unsigned int);
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uint32_t gTaskFxnStack[TASK_STACK_SIZE/sizeof(uint32_t)] __attribute__((aligned(32)));
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TaskP_Object gTaskObject;
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#define VALID_PERIODIC_CMD(x) ((x) == 200)
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#define VALID_HOST_CMD(x) ((x == 100) || ((x) == 101) || ((x) == 102) || ((x) == 103) || ((x) == 104) || ((x) == 105) || \
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((x) == 106) || ((x) == 107) || ((x) == 108) || ((x) == 109) || ((x) == 110))
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#define HAVE_COMMAND_SUPPLEMENT(x) (((x) == 2) || ((x) == 3) || ((x) == 4) || ((x) == 7) || \
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((x) == 9) || ((x) == 10) || ((x) == 11) || ((x) == 13) || ((x) == 14) || \
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((x) == 100) || ((x) == 101) || ((x)== 103) || ((x) == 105) || ((x) == 106) || ((x) == 107) || ((x) == 108) || ((x) == 109))
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((x) == 100) || ((x) == 101) || ((x)== 103) || ((x) == 105) || ((x) == 106) || ((x) == 107) || ((x) == 108) || ((x) == 109)||((x) == 200))
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#define ENDAT_INPUT_CLOCK_UART_FREQUENCY 192000000
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/* use uart clock only to start with */
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@ -118,6 +122,7 @@ TaskP_Object gTaskObject;
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#define ENDAT_POSITION_LOOP_STOP 0
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#define ENDAT_POSITION_LOOP_START 1
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union position
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{
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float angle;
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@ -206,8 +211,8 @@ uint32_t endat_pruss_load_run_fw(struct endat_priv *priv)
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status = PRUICSS_disableCore(gPruIcssXHandle, PRUICSS_RTUPRUx);
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DebugP_assert(SystemP_SUCCESS == status);
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status=PRUICSS_writeMemory(gPruIcssXHandle, PRUICSS_IRAM_RTU_PRU(PRUICSS_SLICEx),
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0, (uint32_t *) EnDatFirmwareMultiMakeRTU,
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sizeof(EnDatFirmwareMultiMakeRTU));
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0, (uint32_t *) EnDatFirmwareMultiMakeRTU_0,
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sizeof(EnDatFirmwareMultiMakeRTU_0));
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DebugP_assert(0 != status);
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status = PRUICSS_resetCore(gPruIcssXHandle, PRUICSS_RTUPRUx);
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DebugP_assert(SystemP_SUCCESS == status);
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@ -221,8 +226,8 @@ uint32_t endat_pruss_load_run_fw(struct endat_priv *priv)
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status=PRUICSS_disableCore(gPruIcssXHandle, PRUICSS_PRUx );
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DebugP_assert(SystemP_SUCCESS == status);
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status = PRUICSS_writeMemory(gPruIcssXHandle, PRUICSS_IRAM_PRU(PRUICSS_SLICEx),
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0, (uint32_t *) EnDatFirmwareMultiMakePRU,
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sizeof(EnDatFirmwareMultiMakePRU));
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0, (uint32_t *) EnDatFirmwareMultiMakePRU_0,
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sizeof(EnDatFirmwareMultiMakePRU_0));
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DebugP_assert(0 != status);
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status = PRUICSS_resetCore(gPruIcssXHandle, PRUICSS_PRUx);
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DebugP_assert(SystemP_SUCCESS == status);
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@ -236,8 +241,8 @@ uint32_t endat_pruss_load_run_fw(struct endat_priv *priv)
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status = PRUICSS_disableCore(gPruIcssXHandle, PRUICSS_TXPRUx);
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DebugP_assert(SystemP_SUCCESS == status);
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status = PRUICSS_writeMemory(gPruIcssXHandle, PRUICSS_IRAM_TX_PRU(PRUICSS_SLICEx),
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0, (uint32_t *) EnDatFirmwareMultiMakeTXPRU,
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sizeof(EnDatFirmwareMultiMakeTXPRU));
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0, (uint32_t *) EnDatFirmwareMultiMakeTXPRU_0,
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sizeof(EnDatFirmwareMultiMakeTXPRU_0));
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DebugP_assert(0 != status);
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status = PRUICSS_resetCore(gPruIcssXHandle, PRUICSS_TXPRUx);
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DebugP_assert(SystemP_SUCCESS == status);
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@ -256,14 +261,14 @@ uint32_t endat_pruss_load_run_fw(struct endat_priv *priv)
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#if(CONFIG_ENDAT0_MODE == ENDAT_MODE_MULTI_CHANNEL_SINGLE_PRU)
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status = PRUICSS_writeMemory(gPruIcssXHandle, PRUICSS_IRAM_PRU(PRUICSS_SLICEx),
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0, (uint32_t *) EnDatFirmwareMulti,
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sizeof(EnDatFirmwareMulti));
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0, (uint32_t *) EnDatFirmwareMulti_0,
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sizeof(EnDatFirmwareMulti_0));
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#else
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status = PRUICSS_writeMemory(gPruIcssXHandle, PRUICSS_IRAM_PRU(PRUICSS_SLICEx),
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0, (uint32_t *) EnDatFirmware,
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sizeof(EnDatFirmware));
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0, (uint32_t *) EnDatFirmware_0,
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sizeof(EnDatFirmware_0));
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#endif
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DebugP_assert(0 != status);
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@ -284,23 +289,23 @@ uint32_t endat_pruss_load_run_fw(struct endat_priv *priv)
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uint64_t endat_get_fw_version(void)
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{
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#if CONFIG_ENDAT0_MODE == ENDAT_MODE_MULTI_CHANNEL_SINGLE_PRU
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return *((unsigned long *)EnDatFirmwareMulti + 2);
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return *((unsigned long *)EnDatFirmwareMulti_0 + 2);
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#endif
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#if (CONFIG_ENDAT0_CHANNEL0) && (CONFIG_ENDAT0_MODE == ENDAT_MODE_MULTI_CHANNEL_MULTI_PRU)
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return *((unsigned long *)EnDatFirmwareMultiMakeRTU + 2);
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return *((unsigned long *)EnDatFirmwareMultiMakeRTU_0 + 2);
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#endif
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#if (CONFIG_ENDAT0_CHANNEL1) && (CONFIG_ENDAT0_MODE == ENDAT_MODE_MULTI_CHANNEL_MULTI_PRU)
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return *((unsigned long *)EnDatFirmwareMultiMakePRU + 2);
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return *((unsigned long *)EnDatFirmwareMultiMakePRU_0 + 2);
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#endif
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#if (CONFIG_ENDAT0_CHANNEL2) && (CONFIG_ENDAT0_MODE == ENDAT_MODE_MULTI_CHANNEL_MULTI_PRU)
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return *((unsigned long *)EnDatFirmwareMultiMakeTXPRU + 2);
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return *((unsigned long *)EnDatFirmwareMultiMakeTXPRU_0 + 2);
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#endif
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#if CONFIG_ENDAT0_MODE == ENDAT_MODE_SINGLE_CHANNEL_SINGLE_PRU
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return *((unsigned long *)EnDatFirmware + 2);
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return *((unsigned long *)EnDatFirmware_0 + 2);
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#endif
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}
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@ -334,11 +339,8 @@ static void endat_print_menu(void)
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DebugP_log("\r|101: Simulate motor control 2.1 position loop |\n");
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DebugP_log("\r|102: Toggle raw data display |\n");
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DebugP_log("\r|103: Configure tST delay |\n");
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DebugP_log("\r|104: Start continuous mode |\n");
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if((!gEndat_is_multi_ch) && (!gEndat_is_load_share_mode))
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{
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DebugP_log("\r|104: Start continuous mode |\n");
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}
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DebugP_log("\r|105: Configure rx arm counter (account tD) |\n");
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DebugP_log("\r|106: Configure rx clock disable time (for tD) |\n");
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@ -357,6 +359,7 @@ static void endat_print_menu(void)
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}
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DebugP_log("\r|110: Recovery Time (RT) |\n");
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DebugP_log("\r|200: Start periodic continuous mode |\n");
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DebugP_log("\r|------------------------------------------------------------------------------|\n\r|\n");
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DebugP_log("\r| enter value: ");
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@ -373,7 +376,7 @@ static inline int32_t endat_get_command(void)
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}
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if(VALID_2_1_CMD(cmd) || (priv->cmd_set_2_2 && VALID_2_2_CMD(cmd))
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|| VALID_HOST_CMD(cmd))
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|| VALID_HOST_CMD(cmd) || VALID_PERIODIC_CMD(cmd))
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{
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return cmd;
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}
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@ -859,6 +862,51 @@ static int32_t endat_get_command_supplement(int32_t cmd,
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break;
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case 200:
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if(gEndat_is_load_share_mode)
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{
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if(gEndat_multi_ch_mask & 0)
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{
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DebugP_log("\r| Enter IEP cycle count for Channel0: \n");
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if(DebugP_scanf("%u\n", &cmd_supplement->cmp3) < 0)
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{
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DebugP_log("\r| ERROR: invalid value\n|\n|\n|\n");
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return -EINVAL;
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}
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}
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if(gEndat_multi_ch_mask & 1)
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{
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DebugP_log("\r| Enter IEP cycle count for Channel1: \n");
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if(DebugP_scanf("%u\n", &cmd_supplement->cmp5) < 0)
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{
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DebugP_log("\r| ERROR: invalid value\n|\n|\n|\n");
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return -EINVAL;
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}
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}
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if(gEndat_multi_ch_mask & 2)
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{
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DebugP_log("\r| Enter IEP cycle count for Channel2: \n");
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if(DebugP_scanf("%u\n", &cmd_supplement->cmp6) < 0)
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{
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DebugP_log("\r| ERROR: invalid value\n|\n|\n|\n");
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return -EINVAL;
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}
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}
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}
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else
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{
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DebugP_log("\r| Enter IEP cycle count: ");
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if(DebugP_scanf("%u\n", &cmd_supplement->cmp3) < 0)
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{
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DebugP_log("\r| ERROR: invalid value\n|\n|\n|\n");
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return -EINVAL;
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}
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}
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break;
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default:
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cmd = -EINVAL;
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DebugP_log("\r| ERROR: no command data required for the command\n");
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@ -1242,12 +1290,13 @@ static void endat_print_position_loop_channel_info(struct endat_priv *priv,
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static void endat_handle_prop_delay(struct endat_priv *priv,
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uint16_t prop_delay)
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{
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if(prop_delay > priv->rx_en_cnt)
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float ct = (priv->rx_en_cnt)/2; /*one endat clock cycle time = 1/endat frequency = 2*rx_en_cnt*/
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/* if propagation delay is more than half clock cycle time (2/endat frequency) then we have to reduce clock cycles for rx*/
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if(prop_delay > (ct/2))
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{
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uint16_t dis = (prop_delay - priv->rx_en_cnt) * 2 / priv->rx_en_cnt;
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uint16_t dis = round(prop_delay/ct);
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endat_config_rx_arm_cnt(priv, prop_delay);
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/* propagation delay - 2T */
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/* propagation delay/cycle_time */
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endat_config_rx_clock_disable(priv, dis);
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}
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else
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@ -1257,6 +1306,104 @@ static void endat_handle_prop_delay(struct endat_priv *priv,
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}
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}
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static void endat_process_periodic_command(int32_t cmd,
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struct cmd_supplement *cmd_supplement, struct endat_priv *priv)
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{
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if(cmd == 200)
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{
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endat_config_periodic_trigger(priv);
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int32_t status;
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int32_t pos_cmd = 1;
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DebugP_assert(endat_command_process(priv, pos_cmd, NULL) >= 0);
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if(gEndat_is_load_share_mode)
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{
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priv->cmp3 = gEndat_multi_ch_mask & 0 ? cmd_supplement->cmp3 : 0;
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priv->cmp5 = gEndat_multi_ch_mask & 1 ? cmd_supplement->cmp5 : 0;
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priv->cmp6 = gEndat_multi_ch_mask & 2 ? cmd_supplement->cmp6 : 0;
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}
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else
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{
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priv->cmp3 = cmd_supplement->cmp3;
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}
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if(endat_loop_task_create() != SystemP_SUCCESS)
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{
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DebugP_log("\r| ERROR: OS not allowing continuous mode as related Task creation failed\r\n|\r\n|\n");
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DebugP_log("Task_create() failed!\n");
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return;
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}
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struct endat_periodic_interface endat_periodic_interface;
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endat_periodic_interface.pruss_cfg = priv->pruss_cfg;
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endat_periodic_interface.pruss_iep = priv->pruss_iep;
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endat_periodic_interface.pruss_dmem = priv->pruss_xchg;
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endat_periodic_interface.load_share = priv->load_share;
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endat_periodic_interface.cmp3 = priv->cmp3;
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endat_periodic_interface.cmp5 = priv->cmp5;
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endat_periodic_interface.cmp6 = priv->cmp6;
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status = endat_config_periodic_mode(&endat_periodic_interface, gPruIcssXHandle);
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DebugP_assert(0 != status);
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endat_position_loop_status = ENDAT_POSITION_LOOP_START;
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if(priv->multi_turn_res)
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{
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DebugP_log("\r|\n\r| press enter to stop the continuous mode\r\n|\r\n| position, revolution, f1\r\n| ");
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}
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else
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{
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DebugP_log("\r|\n\r| press enter to stop the continuous mode\r\n|\r\n| position, f1\r\n| ");
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}
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while(1)
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if(endat_position_loop_status == ENDAT_POSITION_LOOP_STOP)
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{
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endat_stop_periodic_continuous_mode(&endat_periodic_interface);
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endat_config_host_trigger(priv);
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return;
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}
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else
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{
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int32_t i;
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if(gEndat_is_multi_ch || gEndat_is_load_share_mode)
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{
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int32_t j;
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for(i = 0, j = 0; j < 3; j++)
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{
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if(gEndat_multi_ch_mask & 1 << j)
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{
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endat_multi_channel_set_cur(priv, j);
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endat_recvd_process(priv, 1, &gEndat_format_data_mtrctrl[j]);
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i += endat_get_position_loop_chars(priv, 0, 0);
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DebugP_log("| ");
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DebugP_log("\r|\n\r| Channel: %10u\r\n| ", j);
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endat_print_position_loop(priv, 1, 0, j);
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DebugP_log(" ");
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DebugP_log("\n");
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i += 3;
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}
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}
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}
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else
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{
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endat_recvd_process(priv, 1, &gEndat_format_data_mtrctrl[0]);
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i = endat_get_position_loop_chars(priv, 1, 0);
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endat_print_position_loop(priv, 1, 0, 0);
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}
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/* increase sleep value if glitches in display to be prevented (and would result in slower position display freq) */
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ClockP_usleep(100);
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while(i--)
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{
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DebugP_log("%c", 8);
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}
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}
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}
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}
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static void endat_process_host_command(int32_t cmd,
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struct cmd_supplement *cmd_supplement, struct endat_priv *priv)
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{
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@ -1471,12 +1618,6 @@ static void endat_process_host_command(int32_t cmd,
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else if(cmd == 104)
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{
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if(gEndat_is_multi_ch || gEndat_is_load_share_mode)
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{
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DebugP_log("\r| ERROR: Multi channel configuration does not support continuous clock mode\r\n|\r\n|\n");
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return;
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}
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if(endat_loop_task_create() != SystemP_SUCCESS)
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{
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DebugP_log("\r| ERROR: OS not allowing continuous mode as related Task creation failed\r\n|\r\n|\n");
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@ -1504,13 +1645,34 @@ static void endat_process_host_command(int32_t cmd,
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}
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else
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{
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int i;
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int32_t i;
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endat_recvd_process(priv, 1, &gEndat_format_data_mtrctrl[0]);
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i = endat_get_position_loop_chars(priv, 1, 0);
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endat_print_position_loop(priv, 1, 0, 0);
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if(gEndat_is_multi_ch || gEndat_is_load_share_mode)
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{
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int32_t j;
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for(i = 0, j = 0; j < 3; j++)
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{
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if(gEndat_multi_ch_mask & 1 << j)
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{
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endat_multi_channel_set_cur(priv, j);
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endat_recvd_process(priv, 1, &gEndat_format_data_mtrctrl[j]);
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i += endat_get_position_loop_chars(priv, 0, 0);
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DebugP_log("| ");
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DebugP_log("\r|\n\r| Channel: %10u\r\n| ", j);
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endat_print_position_loop(priv, 1, 0, j);
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DebugP_log(" ");
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DebugP_log("\n");
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i += 3;
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}
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}
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}
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else
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{
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endat_recvd_process(priv, 1, &gEndat_format_data_mtrctrl[0]);
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i = endat_get_position_loop_chars(priv, 1, 0);
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endat_print_position_loop(priv, 1, 0, 0);
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}
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/* increase sleep value if glitches in display to be prevented (and would result in slower position display freq) */
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ClockP_usleep(100);
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@ -1845,6 +2007,7 @@ void endat_main(void *args)
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uint64_t icssgclk;
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void *pruss_cfg;
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void *pruss_iep;
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/* Open drivers to open the UART driver for console */
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Drivers_open();
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@ -1856,7 +2019,6 @@ void endat_main(void *args)
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GPIO_pinWriteHigh(ENC1_EN_BASE_ADDR, ENC1_EN_PIN);
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#endif
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i = endat_get_fw_version();
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DebugP_log("\n\n\n");
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@ -1905,14 +2067,15 @@ void endat_main(void *args)
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DebugP_log("\r\n\n");
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pruss_cfg = (void *)(((PRUICSS_HwAttrs *)(gPruIcssXHandle->hwAttrs))->cfgRegBase);
|
||||
pruss_iep = (void *)(((PRUICSS_HwAttrs *)(gPruIcssXHandle->hwAttrs))->iep0RegBase);
|
||||
|
||||
#if PRU_ICSSGx_PRU_SLICE
|
||||
priv = endat_init((struct endat_pruss_xchg *)((PRUICSS_HwAttrs *)(
|
||||
gPruIcssXHandle->hwAttrs))->pru1DramBase, pruss_cfg, PRUICSS_SLICEx);
|
||||
gPruIcssXHandle->hwAttrs))->pru1DramBase, pruss_cfg, pruss_iep, PRUICSS_SLICEx);
|
||||
|
||||
#else
|
||||
priv = endat_init((struct endat_pruss_xchg *)((PRUICSS_HwAttrs *)(
|
||||
gPruIcssXHandle->hwAttrs))->pru0DramBase, pruss_cfg, PRUICSS_SLICEx);
|
||||
gPruIcssXHandle->hwAttrs))->pru0DramBase, pruss_cfg, pruss_iep, PRUICSS_SLICEx);
|
||||
#endif
|
||||
|
||||
|
||||
@ -2036,7 +2199,6 @@ void endat_main(void *args)
|
||||
|
||||
endat_process_host_command(100, &cmd_supplement, priv);
|
||||
|
||||
|
||||
while(1)
|
||||
{
|
||||
int32_t cmd;
|
||||
@ -2055,6 +2217,13 @@ void endat_main(void *args)
|
||||
continue;
|
||||
}
|
||||
|
||||
if(VALID_PERIODIC_CMD(cmd))
|
||||
{
|
||||
endat_process_periodic_command(cmd, &cmd_supplement, priv);
|
||||
DebugP_log("\r|\n\r|\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
if(endat_command_process(priv, cmd, &cmd_supplement) < 0)
|
||||
{
|
||||
continue;
|
||||
|
||||
@ -0,0 +1,335 @@
|
||||
/*
|
||||
* Copyright (C) 2023 Texas Instruments Incorporated
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
|
||||
#include<stdio.h>
|
||||
#include<stdint.h>
|
||||
#include<math.h>
|
||||
|
||||
#include <drivers/pruicss.h>
|
||||
#include <drivers/hw_include/hw_types.h>
|
||||
#include <drivers/hw_include/tistdtypes.h>
|
||||
#include <kernel/dpl/ClockP.h>
|
||||
#include "endat_periodic_trigger.h"
|
||||
#include <drivers/soc.h>
|
||||
#include <position_sense/endat/include/endat_drv.h>
|
||||
#include <position_sense/endat/include/endat_interface.h>
|
||||
|
||||
|
||||
HwiP_Params hwiPrms;
|
||||
static HwiP_Object gIcssgEncoderHwiObject0; /* ICSSG EnDat PRU FW HWI */
|
||||
static HwiP_Object gIcssgEncoderHwiObject1; /* ICSSG EnDat PRU FW HWI */
|
||||
static HwiP_Object gIcssgEncoderHwiObject2; /* ICSSG EnDat PRU FW HWI */
|
||||
|
||||
/* ICSSG Interrupt settings */
|
||||
#define ICSSG_PRU_ENDAT_INT_NUM ( CSLR_R5FSS0_CORE0_INTR_PRU_ICSSG0_PR1_HOST_INTR_PEND_0 )
|
||||
uint32_t gPruEnDatIrqCnt0;
|
||||
uint32_t gPruEnDatIrqCnt1;
|
||||
uint32_t gPruEnDatIrqCnt2;
|
||||
|
||||
/*global variable */
|
||||
void *gPruss_iep;
|
||||
|
||||
|
||||
|
||||
PRUICSS_Handle gPruIcssXHandle;
|
||||
|
||||
/* ICSS INTC configuration */
|
||||
static const PRUICSS_IntcInitData gPruicssIntcInitdata = PRUICSS_INTC_INITDATA;
|
||||
|
||||
void endat_config_iep(struct endat_periodic_interface *endat_periodic_interface)
|
||||
{
|
||||
/*reset iep timer*/
|
||||
void *pruss_iep = endat_periodic_interface->pruss_iep;
|
||||
struct endat_pruss_xchg *pruss_xchg = endat_periodic_interface->pruss_dmem;
|
||||
uint8_t temp;
|
||||
uint8_t event;
|
||||
uint32_t cmp_reg0;
|
||||
uint32_t cmp_reg1;
|
||||
uint32_t event_clear;
|
||||
uint64_t cmp0 = 0;
|
||||
|
||||
/*clear IEP*/
|
||||
temp = HW_RD_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG );
|
||||
temp &= 0xFE;
|
||||
HW_WR_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG, temp);
|
||||
|
||||
/* cmp cfg reg */
|
||||
event = HW_RD_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG);
|
||||
event_clear = HW_RD_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_STATUS_REG);
|
||||
|
||||
/*enable IEP reset by cmp0 event*/
|
||||
event |= IEP_CMP0_ENABLE;
|
||||
event |= IEP_RST_CNT_EN;
|
||||
event_clear |= 1;
|
||||
|
||||
/*set IEP counter to ZERO*/
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG0, 0);
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_COUNT_REG1, 0);
|
||||
|
||||
/*Clear all event & configure*/
|
||||
if(endat_periodic_interface->load_share)
|
||||
{
|
||||
event |= pruss_xchg->config[0].channel==1?(0x1 << 4 ):0; //CMP3 for ch0
|
||||
event |= pruss_xchg->config[1].channel==2?(0x1 << 6 ):0; //CMP5 for Ch1
|
||||
event |= pruss_xchg->config[2].channel==4?(0x1 << 7 ):0; //CMP6 for CH2
|
||||
|
||||
/*clear event*/
|
||||
event_clear |= pruss_xchg->config[0].channel==1?(0x1 << 3 ):0; //CMP3 for ch0
|
||||
event_clear |= pruss_xchg->config[1].channel==2?(0x1 << 5 ):0; //CMP5 for Ch1
|
||||
event_clear |= pruss_xchg->config[2].channel==4?(0x1 << 6 ):0; //CMP6 for CH2
|
||||
|
||||
if(pruss_xchg->config[0].channel)
|
||||
{
|
||||
cmp_reg0 = (endat_periodic_interface->cmp3 & 0xffffffff) - IEP_DEFAULT_INC;
|
||||
cmp_reg1 = (endat_periodic_interface->cmp3>>32 & 0xffffffff);
|
||||
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG0, cmp_reg0);
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG1, cmp_reg1);
|
||||
|
||||
cmp0 = cmp0 > endat_periodic_interface->cmp3 ? cmp0: endat_periodic_interface->cmp3;
|
||||
}
|
||||
|
||||
if(pruss_xchg->config[1].channel)
|
||||
{
|
||||
cmp_reg0 = (endat_periodic_interface->cmp5 & 0xffffffff) - IEP_DEFAULT_INC;
|
||||
cmp_reg1 = (endat_periodic_interface->cmp5>>32 & 0xffffffff);
|
||||
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG0, cmp_reg0);
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP5_REG1, cmp_reg1);
|
||||
|
||||
cmp0 = cmp0 > endat_periodic_interface->cmp5 ? cmp0: endat_periodic_interface->cmp5;
|
||||
}
|
||||
|
||||
if(pruss_xchg->config[2].channel)
|
||||
{
|
||||
cmp_reg0 = (endat_periodic_interface->cmp6 & 0xffffffff) - IEP_DEFAULT_INC;
|
||||
cmp_reg1 = (endat_periodic_interface->cmp6>>32 & 0xffffffff);
|
||||
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG0, cmp_reg0);
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP6_REG1, cmp_reg1);
|
||||
|
||||
cmp0 = cmp0 > endat_periodic_interface->cmp6 ? cmp0: endat_periodic_interface->cmp6;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
event |= (0x1 << 4 );
|
||||
event_clear |= (0x1 << 3);
|
||||
cmp_reg0 = (endat_periodic_interface->cmp3 & 0xffffffff) - IEP_DEFAULT_INC;
|
||||
cmp_reg1 = (endat_periodic_interface->cmp3>>32 & 0xffffffff);
|
||||
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG0, cmp_reg0);
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP3_REG1, cmp_reg1);
|
||||
|
||||
cmp0 = endat_periodic_interface->cmp3;
|
||||
|
||||
}
|
||||
/*clear event*/
|
||||
HW_WR_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_STATUS_REG, event_clear);
|
||||
/*enable event*/
|
||||
HW_WR_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_CFG_REG, event);
|
||||
|
||||
/*configure cmp0 registers*/
|
||||
cmp0 = 2*cmp0;
|
||||
cmp_reg0 = (cmp0 & 0xffffffff) - IEP_DEFAULT_INC;
|
||||
cmp_reg1 = (cmp0>>32 & 0xffffffff);
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG0, cmp_reg0);
|
||||
HW_WR_REG32((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP0_REG1, cmp_reg1);
|
||||
|
||||
|
||||
/*write IEP default increment & IEP start*/
|
||||
temp = HW_RD_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG );
|
||||
temp &= 0x0F;
|
||||
temp |= 0x10;
|
||||
temp |= IEP_COUNTER_EN;
|
||||
HW_WR_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG, temp);
|
||||
}
|
||||
|
||||
|
||||
void endat_interrupt_config(struct endat_periodic_interface *endat_periodic_interface)
|
||||
{
|
||||
struct endat_pruss_xchg *pruss_xchg = endat_periodic_interface->pruss_dmem;
|
||||
int32_t status;
|
||||
if(endat_periodic_interface->load_share)
|
||||
{
|
||||
if(pruss_xchg->config[0].channel)
|
||||
{
|
||||
/* Register & enable ICSSG EnDat PRU FW interrupt */
|
||||
HwiP_Params_init(&hwiPrms);
|
||||
hwiPrms.intNum = ICSSG_PRU_ENDAT_INT_NUM;
|
||||
hwiPrms.callback = &pruEnDatIrqHandler0;
|
||||
hwiPrms.args = 0;
|
||||
hwiPrms.isPulse = FALSE;
|
||||
hwiPrms.isFIQ = FALSE;
|
||||
status = HwiP_construct(&gIcssgEncoderHwiObject0, &hwiPrms);
|
||||
DebugP_assert(status == SystemP_SUCCESS);
|
||||
|
||||
}
|
||||
if(pruss_xchg->config[1].channel)
|
||||
{
|
||||
/* Register & enable ICSSG EnDat PRU FW interrupt */
|
||||
HwiP_Params_init(&hwiPrms);
|
||||
hwiPrms.intNum = ICSSG_PRU_ENDAT_INT_NUM + 1;
|
||||
hwiPrms.callback = &pruEnDatIrqHandler1;
|
||||
hwiPrms.args = 0;
|
||||
hwiPrms.isPulse = FALSE;
|
||||
hwiPrms.isFIQ = FALSE;
|
||||
status = HwiP_construct(&gIcssgEncoderHwiObject1, &hwiPrms);
|
||||
DebugP_assert(status == SystemP_SUCCESS);
|
||||
|
||||
}
|
||||
if(pruss_xchg->config[2].channel)
|
||||
{
|
||||
/* Register & enable ICSSG EnDat PRU FW interrupt */
|
||||
HwiP_Params_init(&hwiPrms);
|
||||
hwiPrms.intNum = ICSSG_PRU_ENDAT_INT_NUM + 2;
|
||||
hwiPrms.callback = &pruEnDatIrqHandler2;
|
||||
hwiPrms.args = 0;
|
||||
hwiPrms.isPulse = FALSE;
|
||||
hwiPrms.isFIQ = FALSE;
|
||||
status = HwiP_construct(&gIcssgEncoderHwiObject2, &hwiPrms);
|
||||
DebugP_assert(status == SystemP_SUCCESS);
|
||||
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Register & enable ICSSG EnDat PRU FW interrupt */
|
||||
HwiP_Params_init(&hwiPrms);
|
||||
hwiPrms.intNum = ICSSG_PRU_ENDAT_INT_NUM;
|
||||
hwiPrms.callback = &pruEnDatIrqHandler0;
|
||||
hwiPrms.args = 0;
|
||||
hwiPrms.isPulse = FALSE;
|
||||
hwiPrms.isFIQ = FALSE;
|
||||
status = HwiP_construct(&gIcssgEncoderHwiObject0, &hwiPrms);
|
||||
DebugP_assert(status == SystemP_SUCCESS);
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
uint32_t endat_config_periodic_mode(struct endat_periodic_interface *endat_periodic_interface, PRUICSS_Handle handle)
|
||||
{
|
||||
int32_t status;
|
||||
gPruIcssXHandle = handle;
|
||||
gPruss_iep = endat_periodic_interface->pruss_iep;
|
||||
/*configure IEP*/
|
||||
endat_config_iep(endat_periodic_interface);
|
||||
/* Initialize ICSS INTC */
|
||||
status = PRUICSS_intcInit(gPruIcssXHandle, &gPruicssIntcInitdata);
|
||||
if (status != SystemP_SUCCESS)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
/*config Interrupt*/
|
||||
endat_interrupt_config(endat_periodic_interface);
|
||||
return 1;
|
||||
|
||||
}
|
||||
|
||||
void endat_stop_periodic_continuous_mode(struct endat_periodic_interface *endat_periodic_interface)
|
||||
{
|
||||
/*reset iep timer*/
|
||||
void *pruss_iep = endat_periodic_interface->pruss_iep;
|
||||
uint8_t temp;
|
||||
/*clear IEP*/
|
||||
temp = HW_RD_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG );
|
||||
temp &= 0xFE;
|
||||
HW_WR_REG8((uint8_t*)pruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG, temp);
|
||||
}
|
||||
|
||||
/* PRU EnDat FW IRQ handler */
|
||||
void pruEnDatIrqHandler0(void *args)
|
||||
{
|
||||
|
||||
/* debug, inncrement PRU SDFM IRQ count */
|
||||
gPruEnDatIrqCnt0++;
|
||||
|
||||
/* clear Cmp3 event*/
|
||||
uint32_t event_clear;
|
||||
event_clear = HW_RD_REG8((uint8_t*)gPruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_STATUS_REG);
|
||||
event_clear |= IEP_CMP3_EVNT;
|
||||
HW_WR_REG8((uint8_t*)gPruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_STATUS_REG, event_clear);
|
||||
|
||||
/* Clear interrupt at source */
|
||||
/* Write 18 to ICSSG_STATUS_CLR_INDEX_REG
|
||||
Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18
|
||||
18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM.
|
||||
*/
|
||||
PRUICSS_clearEvent(gPruIcssXHandle, PRU_TRIGGER_HOST_SDFM_EVT0);
|
||||
|
||||
}
|
||||
/* PRU EnDat FW IRQ handler */
|
||||
void pruEnDatIrqHandler1(void *args)
|
||||
{
|
||||
/* debug, inncrement PRU SDFM IRQ count */
|
||||
gPruEnDatIrqCnt1++;
|
||||
|
||||
/* clear Cmp5 event*/
|
||||
uint32_t event_clear;
|
||||
event_clear = HW_RD_REG8((uint8_t*)gPruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_STATUS_REG);
|
||||
event_clear |= IEP_CMP5_EVNT;
|
||||
HW_WR_REG8((uint8_t*)gPruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_STATUS_REG, event_clear);
|
||||
|
||||
/* Clear interrupt at source */
|
||||
/* Write 18 to ICSSG_STATUS_CLR_INDEX_REG
|
||||
Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18
|
||||
18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM.
|
||||
*/
|
||||
|
||||
PRUICSS_clearEvent(gPruIcssXHandle, PRU_TRIGGER_HOST_SDFM_EVT1);
|
||||
|
||||
|
||||
}
|
||||
/* PRU EnDat FW IRQ handler */
|
||||
void pruEnDatIrqHandler2(void *args)
|
||||
{
|
||||
/* debug, inncrement PRU SDFM IRQ count */
|
||||
gPruEnDatIrqCnt2++;
|
||||
|
||||
/* clear Cmp6 event*/
|
||||
uint32_t event_clear;
|
||||
event_clear = HW_RD_REG8((uint8_t*)gPruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_STATUS_REG);
|
||||
event_clear |= IEP_CMP6_EVNT;
|
||||
HW_WR_REG8((uint8_t*)gPruss_iep + CSL_ICSS_G_PR1_IEP1_SLV_CMP_STATUS_REG, event_clear);
|
||||
|
||||
/* Clear interrupt at source */
|
||||
/* Write 18 to ICSSG_STATUS_CLR_INDEX_REG
|
||||
Firmware: TRIGGER_HOST_SDFM_IRQ defined as 18
|
||||
18 = 16+2, 2 is Host Interrupt Number. See AM64x TRM.
|
||||
*/
|
||||
PRUICSS_clearEvent(gPruIcssXHandle, PRU_TRIGGER_HOST_SDFM_EVT2);
|
||||
|
||||
|
||||
}
|
||||
@ -0,0 +1,221 @@
|
||||
/*
|
||||
* Copyright (C) 2023 Texas Instruments Incorporated
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPgResS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _ENDAT_H_
|
||||
#define _ENDAT_H_
|
||||
|
||||
#include<stdint.h>
|
||||
|
||||
struct endat_periodic_interface
|
||||
{
|
||||
void *pruss_iep;
|
||||
void *pruss_dmem;
|
||||
void *pruss_cfg;
|
||||
uint8_t load_share;
|
||||
uint64_t cmp3;
|
||||
uint64_t cmp5;
|
||||
uint64_t cmp6;
|
||||
};
|
||||
#define IEP_DEFAULT_INC 0x1;
|
||||
#define IEP_DEFAULT_INC_EN 0x4;
|
||||
#define IEP_COUNTER_EN 0x1;
|
||||
#define IEP_RST_CNT_EN 0x1;
|
||||
#define IEP_CMP0_ENABLE 0x1 << 1;
|
||||
|
||||
#define IEP_CMP3_EVNT (0x1 << 3 )
|
||||
#define IEP_CMP5_EVNT (0x1 << 5 )
|
||||
#define IEP_CMP6_EVNT (0x1 << 6 )
|
||||
|
||||
#define PRU_TRIGGER_HOST_SDFM_EVT0 ( 2+16 ) /* pr0_pru_mst_intr[2]_intr_req */
|
||||
#define PRU_TRIGGER_HOST_SDFM_EVT1 ( 3+16 ) /* pr0_pru_mst_intr[3]_intr_req */
|
||||
#define PRU_TRIGGER_HOST_SDFM_EVT2 ( 4+16 ) /* pr0_pru_mst_intr[4]_intr_req */
|
||||
|
||||
|
||||
uint32_t endat_config_periodic_mode(struct endat_periodic_interface *endat_periodic_interface, PRUICSS_Handle handle);
|
||||
|
||||
void endat_stop_periodic_continuous_mode(struct endat_periodic_interface *endat_periodic_interface);
|
||||
|
||||
static void pruEnDatIrqHandler0(void *handle);
|
||||
static void pruEnDatIrqHandler1(void *handle);
|
||||
static void pruEnDatIrqHandler2(void *handle);
|
||||
|
||||
|
||||
#define IEP_TIM_CAP_CMP_EVENT 7
|
||||
#define SYNC1_OUT_EVENT 13
|
||||
#define SYNC0_OUT_EVENT 14
|
||||
|
||||
/* SYS_EVT_16-31 can be used for generating interrupts for IPC with hosts/prus etc */
|
||||
#define PRU_ARM_EVENT00 16
|
||||
#define PRU_ARM_EVENT01 17
|
||||
#define PRU_ARM_EVENT02 18
|
||||
#define PRU_ARM_EVENT03 19
|
||||
#define PRU_ARM_EVENT04 20
|
||||
#define PRU_ARM_EVENT05 21
|
||||
#define PRU_ARM_EVENT06 22
|
||||
#define PRU_ARM_EVENT07 23
|
||||
#define PRU_ARM_EVENT08 24
|
||||
#define PRU_ARM_EVENT09 25
|
||||
#define PRU_ARM_EVENT10 26
|
||||
#define PRU_ARM_EVENT11 27
|
||||
#define PRU_ARM_EVENT12 28
|
||||
#define PRU_ARM_EVENT13 29
|
||||
#define PRU_ARM_EVENT14 30
|
||||
#define PRU_ARM_EVENT15 31
|
||||
|
||||
#define PRU0_RX_ERR32_EVENT 33
|
||||
#define PORT1_TX_UNDERFLOW 39
|
||||
#define PORT1_TX_OVERFLOW 40
|
||||
#define MII_LINK0_EVENT 41
|
||||
#define PORT1_RX_EOF_EVENT 42
|
||||
#define PRU1_RX_ERR32_EVENT 45
|
||||
#define PORT2_TX_UNDERFLOW 51
|
||||
#define PORT2_TX_OVERFLOW 53
|
||||
#define PORT2_RX_EOF_EVENT 54
|
||||
#define MII_LINK1_EVENT 53
|
||||
|
||||
#define CHANNEL0 0
|
||||
#define CHANNEL1 1
|
||||
#define CHANNEL2 2
|
||||
#define CHANNEL3 3
|
||||
#define CHANNEL4 4
|
||||
#define CHANNEL5 5
|
||||
#define CHANNEL6 6
|
||||
#define CHANNEL7 7
|
||||
#define CHANNEL8 8
|
||||
#define CHANNEL9 9
|
||||
|
||||
#define PRU0 0
|
||||
#define PRU1 1
|
||||
#define PRU_EVTOUT0 2
|
||||
#define PRU_EVTOUT1 3
|
||||
#define PRU_EVTOUT2 4
|
||||
#define PRU_EVTOUT3 5
|
||||
#define PRU_EVTOUT4 6
|
||||
#define PRU_EVTOUT5 7
|
||||
#define PRU_EVTOUT6 8
|
||||
#define PRU_EVTOUT7 9
|
||||
|
||||
#define PRU0_HOSTEN_MASK ((uint32_t)0x0001)
|
||||
#define PRU1_HOSTEN_MASK ((uint32_t)0x0002)
|
||||
#define PRU_EVTOUT0_HOSTEN_MASK ((uint32_t)0x0004)
|
||||
#define PRU_EVTOUT1_HOSTEN_MASK ((uint32_t)0x0008)
|
||||
#define PRU_EVTOUT2_HOSTEN_MASK ((uint32_t)0x0010)
|
||||
#define PRU_EVTOUT3_HOSTEN_MASK ((uint32_t)0x0020)
|
||||
#define PRU_EVTOUT4_HOSTEN_MASK ((uint32_t)0x0040)
|
||||
#define PRU_EVTOUT5_HOSTEN_MASK ((uint32_t)0x0080)
|
||||
#define PRU_EVTOUT6_HOSTEN_MASK ((uint32_t)0x0100)
|
||||
#define PRU_EVTOUT7_HOSTEN_MASK ((uint32_t)0x0200)
|
||||
|
||||
#define SYS_EVT_POLARITY_LOW 0
|
||||
#define SYS_EVT_POLARITY_HIGH 1
|
||||
|
||||
#define SYS_EVT_TYPE_PULSE 0
|
||||
#define SYS_EVT_TYPE_EDGE 1
|
||||
|
||||
#define PRUICSS_INTC_INITDATA { \
|
||||
{ IEP_TIM_CAP_CMP_EVENT, PRU_ARM_EVENT02, PRU_ARM_EVENT03, PRU_ARM_EVENT04, PRU_ARM_EVENT05, PRU_ARM_EVENT06, \
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [6-15] for Misra C standards */ \
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [16-31] for Misra C standards */ \
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* initializing member [32-47] for Misra C standards */ \
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}, /* initializing member [48-63] for Misra C standards */ \
|
||||
{ {IEP_TIM_CAP_CMP_EVENT, CHANNEL1, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT02, CHANNEL2, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT03, CHANNEL3, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT04, CHANNEL4, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT05, CHANNEL5, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{PRU_ARM_EVENT06, CHANNEL6, SYS_EVT_POLARITY_HIGH, SYS_EVT_TYPE_PULSE},\
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [6] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [7] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [8] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [9] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [10] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [11] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [12] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [13] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [14] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [15] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [16] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [17] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [18] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [19] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [20] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [21] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [22] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [23] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [24] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [25] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [26] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [27] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [28] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [29] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [30] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [31] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [32] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [33] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [34] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [35] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [36] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [37] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [38] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [39] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [40] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [41] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [42] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [43] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [44] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [45] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [46] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [47] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [48] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [49] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [50] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [51] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [52] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [53] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [54] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [55] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [56] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [57] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [58] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [59] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [60] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [61] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}, /* initializing member [62] for Misra C standards */ \
|
||||
{0xFF,0xFF,0xFF,0xFF}}, /* initializing member [63] for Misra C standards */ \
|
||||
{ {CHANNEL1, PRU1}, {CHANNEL2, PRU_EVTOUT0}, {CHANNEL3, PRU_EVTOUT1},\
|
||||
{CHANNEL4, PRU_EVTOUT2}, {CHANNEL5, PRU_EVTOUT3}, {CHANNEL6, PRU_EVTOUT4}, \
|
||||
{0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF}, {0xFF, 0xFF} }, /* Initializing members [6,7,8,9] of array for Misra C standards */ \
|
||||
(PRU1_HOSTEN_MASK | PRU_EVTOUT0_HOSTEN_MASK | PRU_EVTOUT1_HOSTEN_MASK | PRU_EVTOUT2_HOSTEN_MASK | PRU_EVTOUT3_HOSTEN_MASK | PRU_EVTOUT4_HOSTEN_MASK) /* PRU_EVTOUT0 */ \
|
||||
}
|
||||
|
||||
|
||||
#endif /* _ENDAT_H_ */
|
||||
@ -5,6 +5,7 @@ let device = "am243x";
|
||||
const files = {
|
||||
common: [
|
||||
"endat_diagnostic.c",
|
||||
"endat_periodic_trigger.c",
|
||||
"main.c",
|
||||
],
|
||||
};
|
||||
@ -33,6 +34,7 @@ const includes_freertos_r5f = {
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic",
|
||||
],
|
||||
};
|
||||
|
||||
|
||||
@ -5,6 +5,7 @@ let device = "am64x";
|
||||
const files = {
|
||||
common: [
|
||||
"endat_diagnostic.c",
|
||||
"endat_periodic_trigger.c",
|
||||
"main.c",
|
||||
],
|
||||
};
|
||||
@ -33,6 +34,7 @@ const includes_freertos_r5f = {
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic",
|
||||
],
|
||||
};
|
||||
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic
|
||||
-mcpu=cortex-r5
|
||||
-mfloat-abi=hard
|
||||
-mfpu=vfpv3-d16
|
||||
@ -97,6 +98,8 @@
|
||||
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
|
||||
<file path="../../../../endat_diagnostic.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../../../../endat_periodic_trigger.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
|
||||
@ -39,6 +39,7 @@ endif
|
||||
|
||||
FILES_common := \
|
||||
endat_diagnostic.c \
|
||||
endat_periodic_trigger.c \
|
||||
main.c \
|
||||
ti_drivers_config.c \
|
||||
ti_drivers_open_close.c \
|
||||
@ -60,6 +61,7 @@ INCLUDES_common := \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic \
|
||||
-Igenerated \
|
||||
|
||||
DEFINES_common := \
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic
|
||||
-mcpu=cortex-r5
|
||||
-mfloat-abi=hard
|
||||
-mfpu=vfpv3-d16
|
||||
@ -97,6 +98,8 @@
|
||||
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
|
||||
<file path="../../../../endat_diagnostic.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../../../../endat_periodic_trigger.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
|
||||
@ -39,6 +39,7 @@ endif
|
||||
|
||||
FILES_common := \
|
||||
endat_diagnostic.c \
|
||||
endat_periodic_trigger.c \
|
||||
main.c \
|
||||
ti_drivers_config.c \
|
||||
ti_drivers_open_close.c \
|
||||
@ -60,6 +61,7 @@ INCLUDES_common := \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic \
|
||||
-Igenerated \
|
||||
|
||||
DEFINES_common := \
|
||||
|
||||
@ -5,6 +5,7 @@ let device = "am243x";
|
||||
const files = {
|
||||
common: [
|
||||
"endat_diagnostic.c",
|
||||
"endat_periodic_trigger.c",
|
||||
"main.c",
|
||||
],
|
||||
};
|
||||
@ -33,6 +34,7 @@ const includes_freertos_r5f = {
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic",
|
||||
],
|
||||
};
|
||||
|
||||
|
||||
@ -5,6 +5,7 @@ let device = "am64x";
|
||||
const files = {
|
||||
common: [
|
||||
"endat_diagnostic.c",
|
||||
"endat_periodic_trigger.c",
|
||||
"main.c",
|
||||
],
|
||||
};
|
||||
@ -33,6 +34,7 @@ const includes_freertos_r5f = {
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic",
|
||||
],
|
||||
};
|
||||
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic
|
||||
-mcpu=cortex-r5
|
||||
-mfloat-abi=hard
|
||||
-mfpu=vfpv3-d16
|
||||
@ -97,6 +98,8 @@
|
||||
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
|
||||
<file path="../../../../endat_diagnostic.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../../../../endat_periodic_trigger.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
|
||||
@ -39,6 +39,7 @@ endif
|
||||
|
||||
FILES_common := \
|
||||
endat_diagnostic.c \
|
||||
endat_periodic_trigger.c \
|
||||
main.c \
|
||||
ti_drivers_config.c \
|
||||
ti_drivers_open_close.c \
|
||||
@ -60,6 +61,7 @@ INCLUDES_common := \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic \
|
||||
-Igenerated \
|
||||
|
||||
DEFINES_common := \
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic
|
||||
-mcpu=cortex-r5
|
||||
-mfloat-abi=hard
|
||||
-mfpu=vfpv3-d16
|
||||
@ -97,6 +98,8 @@
|
||||
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
|
||||
<file path="../../../../endat_diagnostic.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../../../../endat_periodic_trigger.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
|
||||
@ -39,6 +39,7 @@ endif
|
||||
|
||||
FILES_common := \
|
||||
endat_diagnostic.c \
|
||||
endat_periodic_trigger.c \
|
||||
main.c \
|
||||
ti_drivers_config.c \
|
||||
ti_drivers_open_close.c \
|
||||
@ -60,6 +61,7 @@ INCLUDES_common := \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic \
|
||||
-Igenerated \
|
||||
|
||||
DEFINES_common := \
|
||||
|
||||
@ -5,6 +5,7 @@ let device = "am243x";
|
||||
const files = {
|
||||
common: [
|
||||
"endat_diagnostic.c",
|
||||
"endat_periodic_trigger.c",
|
||||
"main.c",
|
||||
],
|
||||
};
|
||||
@ -33,6 +34,7 @@ const includes_freertos_r5f = {
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic",
|
||||
],
|
||||
};
|
||||
|
||||
|
||||
@ -5,6 +5,7 @@ let device = "am64x";
|
||||
const files = {
|
||||
common: [
|
||||
"endat_diagnostic.c",
|
||||
"endat_periodic_trigger.c",
|
||||
"main.c",
|
||||
],
|
||||
};
|
||||
@ -33,6 +34,7 @@ const includes_freertos_r5f = {
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f",
|
||||
"${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic",
|
||||
],
|
||||
};
|
||||
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic
|
||||
-mcpu=cortex-r5
|
||||
-mfloat-abi=hard
|
||||
-mfpu=vfpv3-d16
|
||||
@ -97,6 +98,8 @@
|
||||
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
|
||||
<file path="../../../../endat_diagnostic.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../../../../endat_periodic_trigger.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
|
||||
@ -39,6 +39,7 @@ endif
|
||||
|
||||
FILES_common := \
|
||||
endat_diagnostic.c \
|
||||
endat_periodic_trigger.c \
|
||||
main.c \
|
||||
ti_drivers_config.c \
|
||||
ti_drivers_open_close.c \
|
||||
@ -60,6 +61,7 @@ INCLUDES_common := \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic \
|
||||
-Igenerated \
|
||||
|
||||
DEFINES_common := \
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic
|
||||
-mcpu=cortex-r5
|
||||
-mfloat-abi=hard
|
||||
-mfpu=vfpv3-d16
|
||||
@ -97,6 +98,8 @@
|
||||
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
|
||||
<file path="../../../../endat_diagnostic.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../../../../endat_periodic_trigger.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
|
||||
@ -39,6 +39,7 @@ endif
|
||||
|
||||
FILES_common := \
|
||||
endat_diagnostic.c \
|
||||
endat_periodic_trigger.c \
|
||||
main.c \
|
||||
ti_drivers_config.c \
|
||||
ti_drivers_open_close.c \
|
||||
@ -60,6 +61,7 @@ INCLUDES_common := \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic \
|
||||
-Igenerated \
|
||||
|
||||
DEFINES_common := \
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic
|
||||
-mcpu=cortex-r5
|
||||
-mfloat-abi=hard
|
||||
-mfpu=vfpv3-d16
|
||||
@ -97,6 +98,8 @@
|
||||
<pathVariable name="MOTOR_CONTROL_SDK_PATH" path="${COM_TI_MOTOR_CONTROL_SDK_AMXXX_INSTALL_DIR}" scope="project" />
|
||||
<file path="../../../../endat_diagnostic.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../../../../endat_periodic_trigger.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="../main.c" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
</file>
|
||||
<file path="linker.cmd" openOnCreation="false" excludeFromBuild="false" action="copy">
|
||||
|
||||
@ -39,6 +39,7 @@ endif
|
||||
|
||||
FILES_common := \
|
||||
endat_diagnostic.c \
|
||||
endat_periodic_trigger.c \
|
||||
main.c \
|
||||
ti_drivers_config.c \
|
||||
ti_drivers_open_close.c \
|
||||
@ -60,6 +61,7 @@ INCLUDES_common := \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am64x/r5f \
|
||||
-I${MOTOR_CONTROL_SDK_PATH}/examples/position_sense/endat_diagnostic \
|
||||
-Igenerated \
|
||||
|
||||
DEFINES_common := \
|
||||
|
||||
@ -1764,15 +1764,34 @@ void endat_config_rx_clock_disable(struct endat_priv *priv,
|
||||
static void endat_set_continuous_mode(struct endat_priv *priv)
|
||||
{
|
||||
struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
|
||||
if(priv->load_share)
|
||||
{
|
||||
pruss_xchg->config[0].trigger |= pruss_xchg->config[0].channel==1?(0x1 << 7 | 0x1):0;
|
||||
pruss_xchg->config[1].trigger |= pruss_xchg->config[1].channel==2?(0x1 << 7 | 0x1):0;
|
||||
pruss_xchg->config[2].trigger |= pruss_xchg->config[2].channel==4?(0x1 << 7 | 0x1):0;
|
||||
}
|
||||
else
|
||||
{
|
||||
pruss_xchg->config[0].trigger |= (0x1 << 7 | 0x1);
|
||||
}
|
||||
|
||||
pruss_xchg->config[0].trigger |= (0x1 << 7 | 0x1);
|
||||
}
|
||||
|
||||
static void endat_clear_continuous_mode(struct endat_priv *priv)
|
||||
{
|
||||
struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
|
||||
|
||||
pruss_xchg->config[0].trigger &= ~(0x1 << 7);
|
||||
if(priv->load_share)
|
||||
{
|
||||
pruss_xchg->config[0].trigger &= ~(0x1 << 7);
|
||||
pruss_xchg->config[1].trigger &= ~(0x1 << 7);
|
||||
pruss_xchg->config[2].trigger &= ~(0x1 << 7);
|
||||
}
|
||||
else
|
||||
{
|
||||
pruss_xchg->config[0].trigger &= ~(0x1 << 7);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
int32_t endat_start_continuous_mode(struct endat_priv *priv)
|
||||
@ -1816,8 +1835,17 @@ void endat_config_host_trigger(struct endat_priv *priv)
|
||||
void endat_config_periodic_trigger(struct endat_priv *priv)
|
||||
{
|
||||
struct endat_pruss_xchg *pruss_xchg = priv->pruss_xchg;
|
||||
|
||||
pruss_xchg->config[0].opmode = 0;
|
||||
/*for loadshare mode trigger set based on connected channels*/
|
||||
if(priv->load_share)
|
||||
{
|
||||
pruss_xchg->config[0].opmode=(pruss_xchg->config[0].channel&(1<<0))?0x0:pruss_xchg->config[0].opmode;
|
||||
pruss_xchg->config[1].opmode=(pruss_xchg->config[1].channel&(1<<1))?0x0:pruss_xchg->config[0].opmode;
|
||||
pruss_xchg->config[2].opmode=(pruss_xchg->config[2].channel&(1<<2))?0x0:pruss_xchg->config[0].opmode;
|
||||
}
|
||||
else
|
||||
{
|
||||
pruss_xchg->config[0].opmode = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void endat_config_channel(struct endat_priv *priv, int32_t ch)
|
||||
@ -2033,12 +2061,13 @@ static void endat_hw_init(struct endat_priv *priv)
|
||||
}
|
||||
|
||||
struct endat_priv *endat_init(struct endat_pruss_xchg *pruss_xchg,
|
||||
void *pruss_cfg, int32_t slice)
|
||||
void *pruss_cfg, void* pruss_iep, int32_t slice)
|
||||
{
|
||||
|
||||
endat_priv.pruss_xchg = pruss_xchg;
|
||||
endat_priv.pruss_cfg = pruss_cfg;
|
||||
endat_priv.pruicss_slicex = slice;
|
||||
endat_priv.pruss_iep = pruss_iep;
|
||||
endat_hw_init(&endat_priv);
|
||||
return &endat_priv;
|
||||
}
|
||||
|
||||
@ -31,8 +31,8 @@
|
||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;
|
||||
|
||||
.include "../../../../pru_io/firmware/common/icss_regs.inc"
|
||||
.include "../../../../pru_io/firmware/common/icss_cfg_regs.inc"
|
||||
.include "../../../../mcu_plus_sdk/source/pru_io/firmware/common/icss_regs.inc"
|
||||
.include "../../../../mcu_plus_sdk/source/pru_io/firmware/common/icss_cfg_regs.inc"
|
||||
|
||||
.asg R30.t24, ENDAT_CH0_RX_EN
|
||||
.asg R31.t27, ENDAT_CH0_RX_CLR_OVF
|
||||
@ -58,6 +58,13 @@ ENDAT_TX_CH0_SEL .set 0
|
||||
ENDAT_TX_CH1_SEL .set 1
|
||||
ENDAT_TX_CH2_SEL .set 2
|
||||
|
||||
|
||||
; ICSSG INTC events
|
||||
PRU_TRIGGER_HOST_ENDAT_EVT0 .set 34
|
||||
PRU_TRIGGER_HOST_ENDAT_EVT1 .set 35
|
||||
PRU_TRIGGER_HOST_ENDAT_EVT2 .set 36
|
||||
|
||||
|
||||
; CLK MODE bits R30[20:19]
|
||||
ENDAT_TX_CLK_MODE_FREERUN_STOPLOW .set (0 << 3)
|
||||
ENDAT_TX_CLK_MODE_FREERUN_STOPHIGH .set (1 << 3)
|
||||
|
||||
@ -164,3 +164,4 @@ ENDAT_CH2_RT_OFFSET .set 0xC8 ;
|
||||
;icssgclock
|
||||
PRUICSSG_CLOCK .set 0xCD;
|
||||
|
||||
|
||||
|
||||
@ -152,6 +152,7 @@ ENDAT_MAIN:
|
||||
M_ENABLE_PRU_CYCLE_COUNTER
|
||||
|
||||
|
||||
|
||||
.if $isdefed("ENDAT_FW_HW_INIT")
|
||||
; Initalize ENDAT mode
|
||||
; ICSS_CFG.GPCFG0[27:26] = 1
|
||||
@ -644,6 +645,8 @@ ENDAT_SKIP_INIT_SUCCESS:
|
||||
.endif
|
||||
; status update ends here
|
||||
|
||||
HANDLE_PERIODIC_TRIGGER_MODE:
|
||||
; check host trigger is enabled
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU") ; Check RTU host trigger for ch0
|
||||
LBCO &R0.b0, PRUx_DMEM, ENDAT_CH0_OPMODE_CONFIG_OFFSET, 1
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU") ;Check PRU host trigger for ch1
|
||||
@ -655,13 +658,31 @@ ENDAT_SKIP_INIT_SUCCESS:
|
||||
.endif
|
||||
QBNE HANDLE_HOST_TRIGGER_MODE, R0.b0, 0
|
||||
|
||||
HANDLE_PERIODIC_TRIGGER_MODE:
|
||||
|
||||
; Get pending events from IEP
|
||||
LBCO &R0, ICSS_IEP, ICSS_IEP_CMP_STATUS_REG, 4
|
||||
; wait till IEP CMP2 event
|
||||
QBBC HANDLE_PERIODIC_TRIGGER_MODE, R0, 2
|
||||
; Clear IEP CMP2 event
|
||||
SET R0, R0, 2
|
||||
LBCO &R0, ICSS_IEP, ICSS_IEP_CMP_STATUS_REG, 4
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
; wait till IEP CMP3 event
|
||||
QBBC HANDLE_PERIODIC_TRIGGER_MODE, R0, 3
|
||||
; Clear IEP CMP3 event
|
||||
SET R0, R0, 3
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU") ;Check PRU host trigger for ch1
|
||||
; wait till IEP CMP5 event
|
||||
QBBC HANDLE_PERIODIC_TRIGGER_MODE, R0, 5
|
||||
; Clear IEP CMP5 event
|
||||
SET R0, R0, 5
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
; wait till IEP CMP6 event
|
||||
QBBC HANDLE_PERIODIC_TRIGGER_MODE, R0, 6
|
||||
; Clear IEP CMP6 event
|
||||
SET R0, R0, 6
|
||||
.else
|
||||
; wait till IEP CMP3 event
|
||||
QBBC HANDLE_PERIODIC_TRIGGER_MODE, R0, 3
|
||||
; Clear IEP CMP3 event
|
||||
SET R0, R0, 3
|
||||
.endif
|
||||
|
||||
SBCO &R0, ICSS_IEP, ICSS_IEP_CMP_STATUS_REG, 4
|
||||
|
||||
; Let the fall thr' to trigger mode happen properly and trigger bit
|
||||
@ -688,12 +709,12 @@ HANDLE_HOST_TRIGGER_MODE:
|
||||
LBCO &R0.b0, PRUx_DMEM, ENDAT_CH0_INTFC_CMD_TRIGGER_OFFSET, 1 ; without load share mode(one command trigger for all three channels)
|
||||
.endif
|
||||
|
||||
QBBC HANDLE_HOST_TRIGGER_MODE, R0.b0, 0
|
||||
QBBC HANDLE_HOST_TRIGGER_MODE, R0.b0, 0
|
||||
|
||||
QBBC ENDAT_SKIP_CONTINUOUS_MODE, R0.b0, 7
|
||||
|
||||
QBBC ENDAT_SKIP_CONTINUOUS_MODE, R0.b0, 7
|
||||
.if !$isdefed("ENABLE_MULTI_CHANNEL") & !$isdefed("ENABLE_MULTI_MAKE_RTU") & !$isdefed("ENABLE_MULTI_MAKE_PRU") & !$isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
CALL FN_CONTINUOUS_MODE
|
||||
.endif
|
||||
|
||||
|
||||
JMP ENDAT_HOST_CMD_END
|
||||
|
||||
@ -924,6 +945,17 @@ ENDAT_HOST_CMD_END:
|
||||
LBCO &SCRATCH.b0, PRUx_DMEM, ENDAT_CH0_OPMODE_CONFIG_OFFSET, 1 ;check PRU host trigger for all three channels
|
||||
.endif
|
||||
|
||||
QBNE SKIP_INTERRUPT_TRIGGER, SCRATCH.b0, 0
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
LDI R31.w0, 34 ;PRU_TRIGGER_HOST_ENDAT_EVT0
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
LDI R31.w0, 35;PRU_TRIGGER_HOST_ENDAT_EVT1
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
LDI R31.w0, 36;PRU_TRIGGER_HOST_ENDAT_EVT2
|
||||
.else
|
||||
LDI R31.w0, 34;PRU_TRIGGER_HOST_ENDAT_EVT0
|
||||
.endif
|
||||
SKIP_INTERRUPT_TRIGGER:
|
||||
QBEQ HANDLE_PERIODIC_TRIGGER_MODE, SCRATCH.b0, 0
|
||||
JMP HANDLE_HOST_TRIGGER_MODE
|
||||
|
||||
@ -1418,11 +1450,27 @@ ENDAT_RECEIVE_DOWN_SAMPLE_END?:
|
||||
; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ;
|
||||
; continuous mode handling
|
||||
; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ;
|
||||
.if !$isdefed("ENABLE_MULTI_CHANNEL")
|
||||
|
||||
FN_CONTINUOUS_MODE:
|
||||
|
||||
LBCO &R0, PRUx_DMEM, ENDAT_CH0_CMD_WORD_0_OFFSET, 8
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU") ;command parameters for ch0
|
||||
LBCO &R0, PRUx_DMEM, ENDAT_CH0_CMD_WORD_0_OFFSET, 8
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU") ;command parameters for ch1
|
||||
LBCO &R0, PRUx_DMEM, ENDAT_CH1_CMD_WORD_0_OFFSET, 8
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU") ;command parameters for ch2
|
||||
LBCO &R0, PRUx_DMEM, ENDAT_CH2_CMD_WORD_0_OFFSET, 8
|
||||
.else ;command parameters for all enabled channels, when single pru used or load share mode is nor used
|
||||
LBCO &R0, PRUx_DMEM, ENDAT_CH0_CMD_WORD_0_OFFSET, 8
|
||||
.endif
|
||||
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
LDI R30.w2, (ENDAT_TX_CLK_MODE_FREERUN | ENDAT_TX_CH0_SEL)
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
LDI R30.w2, (ENDAT_TX_CLK_MODE_FREERUN | ENDAT_TX_CH1_SEL)
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
LDI R30.w2, (ENDAT_TX_CLK_MODE_FREERUN | ENDAT_TX_CH2_SEL)
|
||||
.else
|
||||
QBBC ENDAT_SKIP31_CH0, ENDAT_ENABLE_CHx, 0
|
||||
LDI R30.w2, (ENDAT_TX_CLK_MODE_FREERUN | ENDAT_TX_CH0_SEL)
|
||||
ENDAT_SKIP31_CH0:
|
||||
@ -1432,18 +1480,56 @@ ENDAT_SKIP31_CH1:
|
||||
QBBC ENDAT_SKIP31_CH2, ENDAT_ENABLE_CHx, 2
|
||||
LDI R30.w2, (ENDAT_TX_CLK_MODE_FREERUN | ENDAT_TX_CH2_SEL)
|
||||
ENDAT_SKIP31_CH2:
|
||||
.endif
|
||||
|
||||
MOV R30.b0, R0.b0 ; load cmd to tx fifo
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
LOOP FN_SEND_RECEIVE_ENDAT_CON_MULTI_CHANNEL, 3
|
||||
.endif
|
||||
MOV R30.b0, R0.b0
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
; since ENABLE_RUNTIME_CH is kept enabled with all 3 channels selected for multi channel, last channel would have been selected by now
|
||||
SUB R30.b2, R30.b2, 1
|
||||
FN_SEND_RECEIVE_ENDAT_CON_MULTI_CHANNEL:
|
||||
.endif
|
||||
|
||||
MOV R2.w1, R1.b0
|
||||
LSL R1.b0, R1.b1, 3
|
||||
CALL2 FN_SEND
|
||||
CALL2 FN_SEND
|
||||
|
||||
LOOP_CONTINUOUS_MODE:
|
||||
|
||||
;set syn_bit of all connected channels for TX_GLOBAL_INIT
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
LDI R14.b0, 0x1 ; set syn_bit of ch0
|
||||
SBCO &R14.b0, PRUx_DMEM, ENDAT_CH0_CONFIG_SYN_BIT, 1
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
LDI R14.b0, 0x2 ;set syn_bit of ch1
|
||||
SBCO &R14.b0, PRUx_DMEM, ENDAT_CH1_CONFIG_SYN_BIT, 1
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
LDI R14.b0, 0x4 ;set syn_bit of ch2
|
||||
SBCO &R14.b0, PRUx_DMEM, ENDAT_CH2_CONFIG_SYN_BIT, 1
|
||||
.endif
|
||||
|
||||
|
||||
LDI32 R15, 0
|
||||
LDI32 R16, 0
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
ZERO &R19, 8
|
||||
ZERO &R23, 8
|
||||
.endif
|
||||
|
||||
; store valid bit & rx fifo bit to be checked based on selected channel
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU") ;store valid bit & rx fifo bit to be checked for ch0 in PRU
|
||||
LDI R3.b0, 24
|
||||
LDI R3.b1, 4
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU") ;store valid bit & rx fifo bit to be checked for ch1 in RTU
|
||||
LDI R3.b0, 25
|
||||
LDI R3.b1, 4 + 8
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU") ;store valid bit & rx fifo bit to be checked for CH2 in TXPRU
|
||||
LDI R3.b0, 26
|
||||
LDI R3.b1, 4 + 16
|
||||
.else
|
||||
; store valid bit & rx fifo bit to be checked based on selected channel
|
||||
QBBC ENDAT_SKIP34_PRE_CH0, ENDAT_ENABLE_CHx, 0
|
||||
LDI R3.b0, 24
|
||||
@ -1457,6 +1543,8 @@ ENDAT_SKIP34_PRE_CH1:
|
||||
LDI R3.b0, 26
|
||||
LDI R3.b1, 4 + 16
|
||||
ENDAT_SKIP34_PRE_CH2:
|
||||
.endif
|
||||
|
||||
; set bit for calculation of RT
|
||||
LDI R27.b0, 0x1
|
||||
QBBC ENDAT_SKIP_RT_FOR_CD2_1, ENDAT_CMDTYP_NO_SUPPLEMENT_REG, 2
|
||||
@ -1472,6 +1560,14 @@ ENDAT_RT_FOR_CD2_2:
|
||||
M_OTF_RECEIVE R15, R16, R27.b0, 0
|
||||
.endif
|
||||
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
CLR R30.b3, R30.b3.t0 ; disable rx
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
CLR R30.b3, R30.b3.t1 ; disable rx
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
CLR R30.b3, R30.b3.t2 ; disable rx
|
||||
.else
|
||||
QBBC ENDAT_SKIP35_CH0, ENDAT_ENABLE_CHx, 0
|
||||
CLR R30.b3, R30.b3.t0 ; disable rx
|
||||
ENDAT_SKIP35_CH0:
|
||||
@ -1481,7 +1577,43 @@ ENDAT_SKIP35_CH1:
|
||||
QBBC ENDAT_SKIP35_CH2, ENDAT_ENABLE_CHx, 2
|
||||
CLR R30.b3, R30.b3.t2 ; disable rx
|
||||
ENDAT_SKIP35_CH2:
|
||||
.endif
|
||||
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
QBBC ENDAT_RTU_SKIP36A_CH0, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH0_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
ENDAT_RTU_SKIP36A_CH0:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
QBBC ENDAT_PRU_SKIP36A_CH1, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
ENDAT_PRU_SKIP36A_CH1:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
QBBC ENDAT_TX_SKIP36A_CH2, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
|
||||
ENDAT_TX_SKIP36A_CH2:
|
||||
CLR SCRATCH.b0, SCRATCH.b0, 0
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
.else
|
||||
; Update CRC status. Update i/f buffer iff CRC success, if failure increment error count
|
||||
QBBC ENDAT_SKIP36_CH0, ENDAT_ENABLE_CHx, 0
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH0_CRC_ERR_COUNTER_OFFSET, 4
|
||||
@ -1497,9 +1629,20 @@ ENDAT_SKIP36A_CH0:
|
||||
ENDAT_SKIP36_CH0:
|
||||
QBBC ENDAT_SKIP36_CH1, ENDAT_ENABLE_CHx, 1
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
QBBC ENDAT_SKIP36A_CH1, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
QBBC ENDAT_SKIP36A_CH1, R0.b1, 0
|
||||
.else
|
||||
QBBC ENDAT_SKIP36A_CH1, R0.b0, 0 ; (R0.t0 = 0) => crc failure
|
||||
.endif
|
||||
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
SBCO &R19, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
.else
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH1_POSITION_DATA_WORD0_OFFSET, 8
|
||||
.endif
|
||||
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
JMP ENDAT_SKIP36_CH1
|
||||
ENDAT_SKIP36A_CH1:
|
||||
@ -1507,11 +1650,21 @@ ENDAT_SKIP36A_CH1:
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH1_CRC_ERR_COUNTER_OFFSET, 4
|
||||
ENDAT_SKIP36_CH1:
|
||||
|
||||
QBBC ENDAT_SKIP36_CH2, ENDAT_ENABLE_CHx, 2
|
||||
LBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
QBBC ENDAT_SKIP36A_CH2, R0, 0 ; (R0.t0 = 0) => crc failure
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
QBBC ENDAT_SKIP36A_CH2, R0.b2, 0
|
||||
.else
|
||||
QBBC ENDAT_SKIP36A_CH2, R0.b0, 0 ; (R0.t0 = 0) => crc failure
|
||||
.endif
|
||||
SET SCRATCH.b0, SCRATCH.b0, 0
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_CHANNEL")
|
||||
SBCO &R23, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
.else
|
||||
SBCO &R15, PRUx_DMEM, ENDAT_CH2_POSITION_DATA_WORD0_OFFSET, 8
|
||||
.endif
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
JMP ENDAT_SKIP36_CH2
|
||||
ENDAT_SKIP36A_CH2:
|
||||
@ -1519,6 +1672,9 @@ ENDAT_SKIP36A_CH2:
|
||||
ADD SCRATCH.b1, SCRATCH.b1, 1
|
||||
SBCO &SCRATCH, PRUx_DMEM, ENDAT_CH2_CRC_ERR_COUNTER_OFFSET, 4
|
||||
ENDAT_SKIP36_CH2:
|
||||
|
||||
.endif
|
||||
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_CH0_CFG1+2
|
||||
LBCO &R0.w0, ICSS_CFG, SCRATCH1.w0, 2
|
||||
LSR R0.w0, R0.w0, 2
|
||||
@ -1526,6 +1682,14 @@ ENDAT_SKIP36_CH2:
|
||||
MOV R0, R0
|
||||
RX_EN_LOOP:
|
||||
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
SET R30.b3, R30.b3.t0 ; enable rx
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
SET R30.b3, R30.b3.t1 ; enable rx
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
SET R30.b3, R30.b3.t2 ; enable rx
|
||||
.else
|
||||
QBBC ENDAT_SKIP37_CH0, ENDAT_ENABLE_CHx, 0
|
||||
SET R30.b3, R30.b3.t0 ; enable rx
|
||||
ENDAT_SKIP37_CH0:
|
||||
@ -1535,10 +1699,62 @@ ENDAT_SKIP37_CH1:
|
||||
QBBC ENDAT_SKIP37_CH2, ENDAT_ENABLE_CHx, 2
|
||||
SET R30.b3, R30.b3.t2 ; enable rx
|
||||
ENDAT_SKIP37_CH2:
|
||||
LBCO &R0.b0, PRUx_DMEM, ENDAT_CH0_INTFC_CMD_TRIGGER_OFFSET, 1
|
||||
.endif
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU") ;wait until command trigger is not set for ch0
|
||||
LBCO &R0.b0, PRUx_DMEM, ENDAT_CH0_INTFC_CMD_TRIGGER_OFFSET, 1
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU") ;wait command host trigger is not set for ch1
|
||||
LBCO &R0.b0, PRUx_DMEM, ENDAT_CH1_INTFC_CMD_TRIGGER_OFFSET, 1
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU") ;wait until command trigger is not set for ch2
|
||||
LBCO &R0.b0, PRUx_DMEM, ENDAT_CH2_INTFC_CMD_TRIGGER_OFFSET, 1
|
||||
.else
|
||||
LBCO &R0.b0, PRUx_DMEM, ENDAT_CH0_INTFC_CMD_TRIGGER_OFFSET, 1 ; without load share mode(one command trigger for all three channels)
|
||||
.endif
|
||||
QBBS LOOP_CONTINUOUS_MODE, R0.b0, 7
|
||||
|
||||
SET R31, ENDAT_TX_GLOBAL_REINIT
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
LDI R14.b0 , 0 ;clear Syn_bit of ch0
|
||||
SBCO &R14.b0, PRUx_DMEM, ENDAT_CH0_CONFIG_SYN_BIT, 1
|
||||
M_WAIT_FOR_ENABLED_CHANNELS
|
||||
LBCO &R14.b2, PRUx_DMEM, MASK_FOR_PRIMARY_CORE, 1
|
||||
QBBC SKIP_GLOBAL_CTX_REINIT1, R14.b2, 0 ; check RTU is primary core
|
||||
SET R31, ENDAT_TX_GLOBAL_REINIT
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
LDI R14.b0, 0 ;clear syn_bit of ch1
|
||||
SBCO &R14.b0, PRUx_DMEM, ENDAT_CH1_CONFIG_SYN_BIT, 1
|
||||
M_WAIT_FOR_ENABLED_CHANNELS
|
||||
LBCO &R14.b2, PRUx_DMEM, MASK_FOR_PRIMARY_CORE, 1
|
||||
QBBC SKIP_GLOBAL_CTX_REINIT1, R14.b2, 1 ; check PRU is primary core
|
||||
SET R31, ENDAT_TX_GLOBAL_REINIT
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
LDI R14.b0, 0 ;clear syn_bit of ch2
|
||||
SBCO &R14.b0, PRUx_DMEM, ENDAT_CH2_CONFIG_SYN_BIT, 1
|
||||
M_WAIT_FOR_ENABLED_CHANNELS
|
||||
LBCO &R14.b2, PRUx_DMEM, MASK_FOR_PRIMARY_CORE, 1
|
||||
QBBC SKIP_GLOBAL_CTX_REINIT1, R14.b2, 2; check TXPRU is primary core
|
||||
SET R31, ENDAT_TX_GLOBAL_REINIT
|
||||
|
||||
.else ; for without load share mode
|
||||
SET R31, ENDAT_TX_GLOBAL_REINIT
|
||||
.endif
|
||||
|
||||
SKIP_GLOBAL_CTX_REINIT1:
|
||||
|
||||
|
||||
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
CLR R30.b3, R30.b3.t0 ; disable rx
|
||||
WBRTU8:
|
||||
QBBS WBRTU8, R31, 5
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
CLR R30.b3, R30.b3.t1 ; disable rx
|
||||
WBPRU9:
|
||||
QBBS WBPRU9, R31, 13
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU")
|
||||
CLR R30.b3, R30.b3.t2 ; disable rx
|
||||
WBTX10:
|
||||
QBBS WBTX10, R31, 21
|
||||
.else
|
||||
QBBC ENDAT_SKIP32_CH0, ENDAT_ENABLE_CHx, 0
|
||||
CLR R30.b3, R30.b3.t0 ; disable rx
|
||||
WB8:
|
||||
@ -1554,10 +1770,10 @@ ENDAT_SKIP32_CH1:
|
||||
WB10:
|
||||
QBBS WB10, R31, 21
|
||||
ENDAT_SKIP32_CH2:
|
||||
|
||||
.endif
|
||||
RET
|
||||
|
||||
.endif ; ENABLE_MULTI_CHANNEL
|
||||
|
||||
|
||||
|
||||
; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ;
|
||||
@ -2723,9 +2939,31 @@ ENDAT_TD_RISING_CLOCK:
|
||||
.else
|
||||
SBCO &R0, c11, PRUx_CNTL_CYCLE_COUNT_OFFSET, 4
|
||||
.endif
|
||||
; wait for start bit
|
||||
WB1:
|
||||
QBBC WB1, R31, R3.b2
|
||||
|
||||
; wait for start rx
|
||||
.if $isdefed("ENABLE_MULTI_MAKE_RTU")
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_CH0_CFG0
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_PRU")
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_CH1_CFG0
|
||||
.elseif $isdefed("ENABLE_MULTI_MAKE_TXPRU") ; load clock plus for position bit for CH2 in TXPRU
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_CH2_CFG0
|
||||
.else
|
||||
QBNE SKIP_CH0, R3.b0, 0
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_CH0_CFG0
|
||||
JMP SKIP_CH2
|
||||
SKIP_CH0:
|
||||
QBNE SKIP_CH1, R3.b0, 1
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_CH1_CFG0
|
||||
JMP SKIP_CH2
|
||||
SKIP_CH1:
|
||||
QBNE SKIP_CH2, R3.b0, 2
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_CH2_CFG0
|
||||
SKIP_CH2:
|
||||
|
||||
W_RX_HIGH:
|
||||
LDI SCRATCH1.w0, ICSS_CFG_PRUx_ENDAT_CH0_CFG0
|
||||
LBCO &R0, ICSS_CFG, SCRATCH1.w0, 4
|
||||
QBBC W_RX_HIGH, R0, 28
|
||||
|
||||
|
||||
; read pru counter at time when rx start
|
||||
@ -2735,6 +2973,7 @@ WB1:
|
||||
.else
|
||||
LBCO &R0, c11, PRUx_CNTL_CYCLE_COUNT_OFFSET, 4
|
||||
.endif
|
||||
|
||||
; rx_en = 0
|
||||
LDI R30.b3, 0
|
||||
|
||||
@ -2792,6 +3031,7 @@ WB4:
|
||||
SBCO &R14.b0, PRUx_DMEM, ENDAT_CH2_CONFIG_SYN_BIT, 1
|
||||
.endif
|
||||
|
||||
|
||||
ADD R8.w2, R8.w2, 1
|
||||
QBGT PROPAGATION_DELAY_CALC_LOOP, R8.w2, 8
|
||||
LSR R9, R9, 3 ; Average the 8 samples
|
||||
@ -2807,3 +3047,4 @@ ENDAT_SKIP_PROP_DELAY_MODULUS:
|
||||
|
||||
RET
|
||||
.endif
|
||||
|
||||
|
||||
@ -1,60 +1,4 @@
|
||||
/*
|
||||
* endat_master_bin.h
|
||||
*
|
||||
*
|
||||
* Copyright (c) 2015 - 2016, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
const unsigned int EnDatFirmware[]= {
|
||||
const uint32_t EnDatFirmware_0[] = {
|
||||
0x21000300,
|
||||
0x00000207,
|
||||
0x00020001,
|
||||
@ -68,53 +12,53 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x51000502,
|
||||
0x21000d00,
|
||||
0x24000105,
|
||||
0x23042e9d,
|
||||
0x2304309d,
|
||||
0x24005480,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0x91b03880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x24721d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x24003880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x24023880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x24421d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x241a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0x0903efef,
|
||||
0xc9000502,
|
||||
0x8144182f,
|
||||
@ -123,21 +67,21 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc9020502,
|
||||
0x8184182f,
|
||||
0x91a83880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x244a1d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0x91ac3880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x240a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0x0903efef,
|
||||
0xc9000502,
|
||||
0x8145182f,
|
||||
@ -146,11 +90,11 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc9020502,
|
||||
0x8185182f,
|
||||
0x91ac3880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x24000180,
|
||||
0x2403bfc0,
|
||||
0x24271081,
|
||||
0x23048b9d,
|
||||
0x23048d9d,
|
||||
0xc9000504,
|
||||
0x24080083,
|
||||
0x240518c3,
|
||||
@ -163,7 +107,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x240a0283,
|
||||
0x24151ac3,
|
||||
0x91841822,
|
||||
0x2304969d,
|
||||
0x2304989d,
|
||||
0xc9000502,
|
||||
0x81483889,
|
||||
0xc9010502,
|
||||
@ -175,7 +119,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x24000280,
|
||||
0x240017c0,
|
||||
0x2400fa81,
|
||||
0x23048b9d,
|
||||
0x23048d9d,
|
||||
0x24000020,
|
||||
0xc9000502,
|
||||
0x91441800,
|
||||
@ -189,21 +133,21 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x91001800,
|
||||
0x69000007,
|
||||
0x91743a80,
|
||||
0xcf02e0ff,
|
||||
0x1f02e0e0,
|
||||
0xcf03e0fd,
|
||||
0x1f03e0e0,
|
||||
0x81743a80,
|
||||
0x24000100,
|
||||
0x81021800,
|
||||
0x91021800,
|
||||
0xcf0000ff,
|
||||
0xc9070003,
|
||||
0x2300ca9d,
|
||||
0x2300cc9d,
|
||||
0x2100c500,
|
||||
0x910c7880,
|
||||
0x23023d9d,
|
||||
0x23023f9d,
|
||||
0xd1004103,
|
||||
0x91143881,
|
||||
0x2302319d,
|
||||
0x2302339d,
|
||||
0xc9000510,
|
||||
0x10000004,
|
||||
0x91413824,
|
||||
@ -255,7 +199,9 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x24000083,
|
||||
0x81021803,
|
||||
0x91001804,
|
||||
0x570004bd,
|
||||
0x69000402,
|
||||
0x2400229f,
|
||||
0x570004b9,
|
||||
0x21008b00,
|
||||
0x910c7880,
|
||||
0xc9000502,
|
||||
@ -267,7 +213,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x1000001e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x2301b3dd,
|
||||
0x2301b5dd,
|
||||
0x240000cf,
|
||||
0x2400008f,
|
||||
0x240000d0,
|
||||
@ -298,7 +244,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100f600,
|
||||
0x2100f800,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -313,7 +259,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21010500,
|
||||
0x21010700,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -329,17 +275,17 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011500,
|
||||
0x21011700,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21013c00,
|
||||
0x21013e00,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21011f00,
|
||||
0x21012100,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -356,7 +302,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21013000,
|
||||
0x21013200,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -367,7 +313,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21013b00,
|
||||
0x21013d00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -428,7 +374,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21017700,
|
||||
0x21017900,
|
||||
0x1f000000,
|
||||
0xc9000502,
|
||||
0x1d007e7e,
|
||||
@ -442,27 +388,27 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x1f000404,
|
||||
0x8130788f,
|
||||
0x81403884,
|
||||
0x21018700,
|
||||
0x21018900,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81403884,
|
||||
0xc901050a,
|
||||
0x91603884,
|
||||
0xc900e005,
|
||||
0xc9000005,
|
||||
0x1f000404,
|
||||
0x8150788f,
|
||||
0x81603884,
|
||||
0x21019100,
|
||||
0x21019300,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81603884,
|
||||
0xc902050a,
|
||||
0x91803884,
|
||||
0xc900e005,
|
||||
0xc9000005,
|
||||
0x1f000404,
|
||||
0x8170788f,
|
||||
0x81803884,
|
||||
0x21019b00,
|
||||
0x21019d00,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81803884,
|
||||
@ -626,7 +572,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x1001011e,
|
||||
0x1021211e,
|
||||
0x1041411e,
|
||||
0x2301dedd,
|
||||
0x2301e0dd,
|
||||
0x209d0000,
|
||||
0xc9004108,
|
||||
0xc9000502,
|
||||
@ -635,7 +581,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x240009de,
|
||||
0xc9020502,
|
||||
0x24000ade,
|
||||
0x21024b00,
|
||||
0x21024d00,
|
||||
0xc9000502,
|
||||
0x240000de,
|
||||
0xc9010502,
|
||||
@ -649,7 +595,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x1060601e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x2301b3dd,
|
||||
0x2301b5dd,
|
||||
0x2eff818f,
|
||||
0x2eff8190,
|
||||
0xc9000503,
|
||||
@ -686,7 +632,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21027a00,
|
||||
0x21027c00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -701,7 +647,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21028900,
|
||||
0x21028b00,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -717,17 +663,17 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21029900,
|
||||
0x21029b00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x2102c000,
|
||||
0x2102c200,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102a300,
|
||||
0x2102a500,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -744,7 +690,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102b400,
|
||||
0x2102b600,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -755,7 +701,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102bf00,
|
||||
0x2102c100,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -816,7 +762,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x2102fb00,
|
||||
0x2102fd00,
|
||||
0x1f000000,
|
||||
0x53000225,
|
||||
0x24001da2,
|
||||
@ -833,7 +779,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21030d00,
|
||||
0x21030f00,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -848,7 +794,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21031c00,
|
||||
0x21031e00,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -864,17 +810,17 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21032c00,
|
||||
0x21032e00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21035300,
|
||||
0x21035500,
|
||||
0x3062000e,
|
||||
0x0901f1f1,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21033600,
|
||||
0x21033800,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -891,7 +837,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21034700,
|
||||
0x21034900,
|
||||
0x1301f1f1,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -902,7 +848,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21035200,
|
||||
0x21035400,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -963,7 +909,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d010000,
|
||||
0x21038e00,
|
||||
0x21039000,
|
||||
0x1f010000,
|
||||
0x69180292,
|
||||
0x240101cc,
|
||||
@ -979,7 +925,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21039f00,
|
||||
0x2103a100,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -994,7 +940,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2103ae00,
|
||||
0x2103b000,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -1010,17 +956,17 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2103be00,
|
||||
0x2103c000,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x2103e500,
|
||||
0x2103e700,
|
||||
0x3062000e,
|
||||
0x0901f2f2,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2103c800,
|
||||
0x2103ca00,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -1037,7 +983,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2103d900,
|
||||
0x2103db00,
|
||||
0x1301f2f2,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -1048,7 +994,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2103e400,
|
||||
0x2103e600,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -1109,7 +1055,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d020000,
|
||||
0x21042000,
|
||||
0x21042200,
|
||||
0x1f020000,
|
||||
0xc9004108,
|
||||
0x1f13ffff,
|
||||
@ -1140,7 +1086,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91b83880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x24002000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
@ -1149,7 +1095,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91983880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x24006000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
@ -1158,7 +1104,7 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91b43880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x24000000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
@ -1245,29 +1191,40 @@ const unsigned int EnDatFirmware[]= {
|
||||
0x04a280a2,
|
||||
0x24003801,
|
||||
0x24000141,
|
||||
0x2301b3dd,
|
||||
0x2301b5dd,
|
||||
0x91a03880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x2401048d,
|
||||
0x908d0480,
|
||||
0xce2380fe,
|
||||
0x2eff8180,
|
||||
0x810c2b80,
|
||||
0xc843ff00,
|
||||
0x69000303,
|
||||
0x2401088d,
|
||||
0x2104b800,
|
||||
0x69010303,
|
||||
0x2401108d,
|
||||
0x2104b800,
|
||||
0x69020302,
|
||||
0x2401188d,
|
||||
0x2401088d,
|
||||
0x908d2480,
|
||||
0xcf1ce0fe,
|
||||
0x910c2b80,
|
||||
0x2400007e,
|
||||
0x00e0e9e9,
|
||||
0x91a43880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x1f13ffff,
|
||||
0xd063ff00,
|
||||
0x91a83880,
|
||||
0x230429dd,
|
||||
0x23042bdd,
|
||||
0x0101c8c8,
|
||||
0x6708c8de,
|
||||
0x6708c8d4,
|
||||
0x0b03e9e9,
|
||||
0x919c389b,
|
||||
0x60fbe903,
|
||||
0x04fbe9e9,
|
||||
0x2104bc00,
|
||||
0x209d0000 };
|
||||
0x2104c800,
|
||||
0x209d0000};
|
||||
|
||||
|
||||
@ -1,60 +1,4 @@
|
||||
/*
|
||||
* endat_master_multi_PRU_bin.h
|
||||
*
|
||||
*
|
||||
* Copyright (c) 2015 - 2016, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
const uint32_t EnDatFirmwareMultiMakePRU_0[] = {
|
||||
0x21000300,
|
||||
0x00000207,
|
||||
0x00020001,
|
||||
@ -68,77 +12,77 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x51000502,
|
||||
0x21000d00,
|
||||
0x24000105,
|
||||
0x23034a9d,
|
||||
0x23032e9d,
|
||||
0x24005480,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91b03880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24721d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24003880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24023880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24421d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x241a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x0903efef,
|
||||
0x8164182f,
|
||||
0x91a83880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x244a1d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x240a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x0903efef,
|
||||
0x8165182f,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24000180,
|
||||
0x2403bfc0,
|
||||
0x24271081,
|
||||
@ -160,13 +104,13 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9014e02,
|
||||
0x2303b49d,
|
||||
0x2303989d,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x24090183,
|
||||
0x240d19c3,
|
||||
0x91641822,
|
||||
0x2303bf9d,
|
||||
0x2303a39d,
|
||||
0x81683889,
|
||||
0x91905880,
|
||||
0x6900e004,
|
||||
@ -191,7 +135,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9014e02,
|
||||
0x2303b49d,
|
||||
0x2303989d,
|
||||
0x24000020,
|
||||
0x91641800,
|
||||
0x51000002,
|
||||
@ -200,20 +144,21 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x91041800,
|
||||
0x69000007,
|
||||
0x91743a80,
|
||||
0xcf02e0ff,
|
||||
0x1f02e0e0,
|
||||
0xcf05e0fd,
|
||||
0x1f05e0e0,
|
||||
0x81743a80,
|
||||
0x24000100,
|
||||
0x81061800,
|
||||
0x91061800,
|
||||
0xcf0000ff,
|
||||
0xc9070002,
|
||||
0x2100ae00,
|
||||
0xc9070003,
|
||||
0x2300b69d,
|
||||
0x2100af00,
|
||||
0x91187880,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0xd1004103,
|
||||
0x91203881,
|
||||
0x2301ab9d,
|
||||
0x23018f9d,
|
||||
0x10000004,
|
||||
0x91613824,
|
||||
0xd1000403,
|
||||
@ -232,32 +177,24 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x24000083,
|
||||
0x81061803,
|
||||
0x91041804,
|
||||
0x570004df,
|
||||
0x69000402,
|
||||
0x2400239f,
|
||||
0x570004da,
|
||||
0x21009600,
|
||||
0x910c7880,
|
||||
0xc9000502,
|
||||
0x240010de,
|
||||
0xc9010502,
|
||||
0x91187880,
|
||||
0x240011de,
|
||||
0xc9020502,
|
||||
0x240012de,
|
||||
0x1000001e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x240000cf,
|
||||
0x2400008f,
|
||||
0x240000d0,
|
||||
0x24000090,
|
||||
0xc9000503,
|
||||
0x24001803,
|
||||
0x24000423,
|
||||
0xc9010503,
|
||||
0x24001903,
|
||||
0x24000c23,
|
||||
0xc9020503,
|
||||
0x24001a03,
|
||||
0x24001423,
|
||||
0x2400011b,
|
||||
0xc9024102,
|
||||
0xd1004102,
|
||||
@ -275,7 +212,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100df00,
|
||||
0x2100d800,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -290,7 +227,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100ee00,
|
||||
0x2100e700,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -306,17 +243,17 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2100fe00,
|
||||
0x2100f700,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21012500,
|
||||
0x21011e00,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21010800,
|
||||
0x21010100,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -333,7 +270,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011900,
|
||||
0x21011200,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -344,7 +281,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21012400,
|
||||
0x21011d00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -376,67 +313,46 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21014300,
|
||||
0x21013c00,
|
||||
0x1f000000,
|
||||
0xc9000502,
|
||||
0x1d007e7e,
|
||||
0xc9010502,
|
||||
0x1d017e7e,
|
||||
0xc9020502,
|
||||
0x1d027e7e,
|
||||
0xc900050a,
|
||||
0x91403884,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8130788f,
|
||||
0x81403884,
|
||||
0x21015300,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81403884,
|
||||
0xc901050a,
|
||||
0x91603884,
|
||||
0xc900e005,
|
||||
0xc900e004,
|
||||
0x1f000404,
|
||||
0x8150788f,
|
||||
0x81603884,
|
||||
0x21015d00,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81603884,
|
||||
0xc902050a,
|
||||
0x91803884,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8170788f,
|
||||
0x81803884,
|
||||
0x21016700,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81803884,
|
||||
0x24010e8d,
|
||||
0x908d0480,
|
||||
0x0b028080,
|
||||
0x30800002,
|
||||
0x10e0e0e0,
|
||||
0xc9000502,
|
||||
0x1f007e7e,
|
||||
0xc9010502,
|
||||
0x1f017e7e,
|
||||
0xc9020502,
|
||||
0x1f027e7e,
|
||||
0x91021800,
|
||||
0xd707004b,
|
||||
0x91061800,
|
||||
0xd7070070,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9014e02,
|
||||
0x1f13ffff,
|
||||
0xc9000503,
|
||||
0x1d007e7e,
|
||||
0xd105ff00,
|
||||
0xc9010503,
|
||||
0x1d017e7e,
|
||||
0xd10dff00,
|
||||
0xc9020503,
|
||||
0x1d027e7e,
|
||||
0xd115ff00,
|
||||
0x209d0000,
|
||||
0x2401118d,
|
||||
0x908d0402,
|
||||
@ -487,11 +403,11 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x1001011e,
|
||||
0x1021211e,
|
||||
0x1041411e,
|
||||
0x23018edd,
|
||||
0x230172dd,
|
||||
0x209d0000,
|
||||
0xc9004103,
|
||||
0x240009de,
|
||||
0x2101b600,
|
||||
0x21019a00,
|
||||
0x240001de,
|
||||
0x1000001e,
|
||||
0x71082104,
|
||||
@ -500,7 +416,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x1060601e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x2eff818f,
|
||||
@ -532,7 +448,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101e000,
|
||||
0x2101c400,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -547,7 +463,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101ef00,
|
||||
0x2101d300,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -563,17 +479,17 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101ff00,
|
||||
0x2101e300,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21022600,
|
||||
0x21020a00,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21020900,
|
||||
0x2101ed00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -590,7 +506,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21021a00,
|
||||
0x2101fe00,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -601,7 +517,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21022500,
|
||||
0x21020900,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -633,7 +549,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21024400,
|
||||
0x21022800,
|
||||
0x1f000000,
|
||||
0x510002eb,
|
||||
0x24001da2,
|
||||
@ -650,7 +566,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21025600,
|
||||
0x21023a00,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -665,7 +581,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21026500,
|
||||
0x21024900,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -681,17 +597,17 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027500,
|
||||
0x21025900,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21029c00,
|
||||
0x21028000,
|
||||
0x3062000e,
|
||||
0x0901f1f1,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21027f00,
|
||||
0x21026300,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -708,7 +624,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21029000,
|
||||
0x21027400,
|
||||
0x1301f1f1,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -719,7 +635,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21029b00,
|
||||
0x21027f00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -751,7 +667,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d010000,
|
||||
0x2102ba00,
|
||||
0x21029e00,
|
||||
0x1f010000,
|
||||
0x69180275,
|
||||
0x240101cc,
|
||||
@ -767,7 +683,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102cb00,
|
||||
0x2102af00,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -782,7 +698,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102da00,
|
||||
0x2102be00,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -798,17 +714,17 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102ea00,
|
||||
0x2102ce00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21031100,
|
||||
0x2102f500,
|
||||
0x3062000e,
|
||||
0x0901f2f2,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102f400,
|
||||
0x2102d800,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -825,7 +741,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21030500,
|
||||
0x2102e900,
|
||||
0x1301f2f2,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -836,7 +752,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21031000,
|
||||
0x2102f400,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -868,7 +784,7 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d020000,
|
||||
0x21032f00,
|
||||
0x21031300,
|
||||
0x1f020000,
|
||||
0xc9004115,
|
||||
0x2400000e,
|
||||
@ -923,17 +839,17 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x2401138d,
|
||||
0x808d0400,
|
||||
0x91b83880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24002000,
|
||||
0x2401138d,
|
||||
0x808d0400,
|
||||
0x91983880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24006000,
|
||||
0x2401138d,
|
||||
0x808d0400,
|
||||
0x91b43880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24000000,
|
||||
0x2401138d,
|
||||
0x808d0400,
|
||||
@ -1025,49 +941,13 @@ const unsigned int EnDatFirmwareMultiMakePRU[]= {
|
||||
0x04a280a2,
|
||||
0x24003801,
|
||||
0x24000141,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x91a03880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x2401048d,
|
||||
0x908d0480,
|
||||
0xce2380fe,
|
||||
0x2eff8180,
|
||||
0x810c2b80,
|
||||
0xc843ff00,
|
||||
0x910c2b80,
|
||||
0x2400007e,
|
||||
0x00e0e9e9,
|
||||
0x91a43880,
|
||||
0x230345dd,
|
||||
0x2400000e,
|
||||
0x81be180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9014e02,
|
||||
0x1f13ffff,
|
||||
0xd063ff00,
|
||||
0x91a83880,
|
||||
0x230345dd,
|
||||
0x2400020e,
|
||||
0x81be180e,
|
||||
0x0101c8c8,
|
||||
0x6708c8cf,
|
||||
0x0b03e9e9,
|
||||
0x919c389b,
|
||||
0x60fbe903,
|
||||
0x04fbe9e9,
|
||||
0x2103f400,
|
||||
0x209d0000 };
|
||||
0x2401108d};
|
||||
|
||||
|
||||
@ -1,60 +1,4 @@
|
||||
/*
|
||||
* endat_master_multi_RTU_bin.h
|
||||
*
|
||||
*
|
||||
* Copyright (c) 2015 - 2016, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
const uint32_t EnDatFirmwareMultiMakeRTU_0[] = {
|
||||
0x21000300,
|
||||
0x00000207,
|
||||
0x00020001,
|
||||
@ -68,77 +12,77 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x51000502,
|
||||
0x21000d00,
|
||||
0x24000105,
|
||||
0x23034a9d,
|
||||
0x23032e9d,
|
||||
0x24005480,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91b03880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24721d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24003880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24023880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24421d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x241a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x0903efef,
|
||||
0x8144182f,
|
||||
0x91a83880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x244a1d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x240a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x0903efef,
|
||||
0x8145182f,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24000180,
|
||||
0x2403bfc0,
|
||||
0x24271081,
|
||||
@ -160,13 +104,13 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9004e02,
|
||||
0x2303b49d,
|
||||
0x2303989d,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x24080083,
|
||||
0x240518c3,
|
||||
0x91441822,
|
||||
0x2303bf9d,
|
||||
0x2303a39d,
|
||||
0x81483889,
|
||||
0x91905880,
|
||||
0x6900e004,
|
||||
@ -191,7 +135,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9004e02,
|
||||
0x2303b49d,
|
||||
0x2303989d,
|
||||
0x24000020,
|
||||
0x91441800,
|
||||
0x51000002,
|
||||
@ -200,20 +144,21 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x91001800,
|
||||
0x69000007,
|
||||
0x91743a80,
|
||||
0xcf02e0ff,
|
||||
0x1f02e0e0,
|
||||
0xcf03e0fd,
|
||||
0x1f03e0e0,
|
||||
0x81743a80,
|
||||
0x24000100,
|
||||
0x81021800,
|
||||
0x91021800,
|
||||
0xcf0000ff,
|
||||
0xc9070002,
|
||||
0x2100ae00,
|
||||
0xc9070003,
|
||||
0x2300b69d,
|
||||
0x2100af00,
|
||||
0x910c7880,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0xd1004103,
|
||||
0x91143881,
|
||||
0x2301ab9d,
|
||||
0x23018f9d,
|
||||
0x10000004,
|
||||
0x91413824,
|
||||
0xd1000403,
|
||||
@ -232,32 +177,24 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x24000083,
|
||||
0x81021803,
|
||||
0x91001804,
|
||||
0x570004df,
|
||||
0x69000402,
|
||||
0x2400229f,
|
||||
0x570004da,
|
||||
0x21009600,
|
||||
0x910c7880,
|
||||
0xc9000502,
|
||||
0x240010de,
|
||||
0xc9010502,
|
||||
0x240011de,
|
||||
0xc9020502,
|
||||
0x240012de,
|
||||
0x1000001e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x240000cf,
|
||||
0x2400008f,
|
||||
0x240000d0,
|
||||
0x24000090,
|
||||
0xc9000503,
|
||||
0x24001803,
|
||||
0x24000423,
|
||||
0xc9010503,
|
||||
0x24001903,
|
||||
0x24000c23,
|
||||
0xc9020503,
|
||||
0x24001a03,
|
||||
0x24001423,
|
||||
0x2400011b,
|
||||
0xc9024102,
|
||||
0xd1004102,
|
||||
@ -275,7 +212,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100df00,
|
||||
0x2100d800,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -290,7 +227,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100ee00,
|
||||
0x2100e700,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -306,17 +243,17 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2100fe00,
|
||||
0x2100f700,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21012500,
|
||||
0x21011e00,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21010800,
|
||||
0x21010100,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -333,7 +270,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011900,
|
||||
0x21011200,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -344,7 +281,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21012400,
|
||||
0x21011d00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -376,67 +313,46 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21014300,
|
||||
0x21013c00,
|
||||
0x1f000000,
|
||||
0xc9000502,
|
||||
0x1d007e7e,
|
||||
0xc9010502,
|
||||
0x1d017e7e,
|
||||
0xc9020502,
|
||||
0x1d027e7e,
|
||||
0xc900050a,
|
||||
0x91403884,
|
||||
0xc900e005,
|
||||
0xc900e004,
|
||||
0x1f000404,
|
||||
0x8130788f,
|
||||
0x81403884,
|
||||
0x21015300,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81403884,
|
||||
0xc901050a,
|
||||
0x91603884,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8150788f,
|
||||
0x81603884,
|
||||
0x21015d00,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81603884,
|
||||
0xc902050a,
|
||||
0x91803884,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8170788f,
|
||||
0x81803884,
|
||||
0x21016700,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81803884,
|
||||
0x24010e8d,
|
||||
0x908d0480,
|
||||
0x0b028080,
|
||||
0x30800002,
|
||||
0x10e0e0e0,
|
||||
0xc9000502,
|
||||
0x1f007e7e,
|
||||
0xc9010502,
|
||||
0x1f017e7e,
|
||||
0xc9020502,
|
||||
0x1f027e7e,
|
||||
0x91021800,
|
||||
0xd707004b,
|
||||
0xd7070070,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9004e02,
|
||||
0x1f13ffff,
|
||||
0xc9000503,
|
||||
0x1d007e7e,
|
||||
0xd105ff00,
|
||||
0xc9010503,
|
||||
0x1d017e7e,
|
||||
0xd10dff00,
|
||||
0xc9020503,
|
||||
0x1d027e7e,
|
||||
0xd115ff00,
|
||||
0x209d0000,
|
||||
0x2401098d,
|
||||
0x908d0402,
|
||||
@ -487,11 +403,11 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x1001011e,
|
||||
0x1021211e,
|
||||
0x1041411e,
|
||||
0x23018edd,
|
||||
0x230172dd,
|
||||
0x209d0000,
|
||||
0xc9004103,
|
||||
0x240008de,
|
||||
0x2101b600,
|
||||
0x21019a00,
|
||||
0x240000de,
|
||||
0x1000001e,
|
||||
0x71082104,
|
||||
@ -500,7 +416,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x1060601e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x2eff818f,
|
||||
@ -532,7 +448,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101e000,
|
||||
0x2101c400,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -547,7 +463,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101ef00,
|
||||
0x2101d300,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -563,17 +479,17 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101ff00,
|
||||
0x2101e300,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21022600,
|
||||
0x21020a00,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21020900,
|
||||
0x2101ed00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -590,7 +506,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21021a00,
|
||||
0x2101fe00,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -601,7 +517,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21022500,
|
||||
0x21020900,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -633,7 +549,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21024400,
|
||||
0x21022800,
|
||||
0x1f000000,
|
||||
0x510002eb,
|
||||
0x24001da2,
|
||||
@ -650,7 +566,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21025600,
|
||||
0x21023a00,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -665,7 +581,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21026500,
|
||||
0x21024900,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -681,17 +597,17 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027500,
|
||||
0x21025900,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21029c00,
|
||||
0x21028000,
|
||||
0x3062000e,
|
||||
0x0901f1f1,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21027f00,
|
||||
0x21026300,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -708,7 +624,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21029000,
|
||||
0x21027400,
|
||||
0x1301f1f1,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -719,7 +635,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21029b00,
|
||||
0x21027f00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -751,7 +667,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d010000,
|
||||
0x2102ba00,
|
||||
0x21029e00,
|
||||
0x1f010000,
|
||||
0x69180275,
|
||||
0x240101cc,
|
||||
@ -767,7 +683,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102cb00,
|
||||
0x2102af00,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -782,7 +698,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102da00,
|
||||
0x2102be00,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -798,17 +714,17 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102ea00,
|
||||
0x2102ce00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21031100,
|
||||
0x2102f500,
|
||||
0x3062000e,
|
||||
0x0901f2f2,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102f400,
|
||||
0x2102d800,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -825,7 +741,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21030500,
|
||||
0x2102e900,
|
||||
0x1301f2f2,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -836,7 +752,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21031000,
|
||||
0x2102f400,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -868,7 +784,7 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d020000,
|
||||
0x21032f00,
|
||||
0x21031300,
|
||||
0x1f020000,
|
||||
0xc9004115,
|
||||
0x2400000e,
|
||||
@ -923,17 +839,17 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
0x91b83880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24002000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
0x91983880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24006000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
0x91b43880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24000000,
|
||||
0x24010b8d,
|
||||
0x808d0400,
|
||||
@ -1025,49 +941,13 @@ const unsigned int EnDatFirmwareMultiMakeRTU[]= {
|
||||
0x04a280a2,
|
||||
0x24003801,
|
||||
0x24000141,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x91a03880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x2401048d,
|
||||
0x908d0480,
|
||||
0xce2380fe,
|
||||
0x2eff8180,
|
||||
0x810c2b80,
|
||||
0xc843ff00,
|
||||
0x910c2b80,
|
||||
0x2400007e,
|
||||
0x00e0e9e9,
|
||||
0x91a43880,
|
||||
0x230345dd,
|
||||
0x2400000e,
|
||||
0x81bd180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9004e02,
|
||||
0x1f13ffff,
|
||||
0xd063ff00,
|
||||
0x91a83880,
|
||||
0x230345dd,
|
||||
0x2400010e,
|
||||
0x81bd180e,
|
||||
0x0101c8c8,
|
||||
0x6708c8cf,
|
||||
0x0b03e9e9,
|
||||
0x919c389b,
|
||||
0x60fbe903,
|
||||
0x04fbe9e9,
|
||||
0x2103f400,
|
||||
0x209d0000 };
|
||||
0x2401088d};
|
||||
|
||||
|
||||
@ -1,60 +1,4 @@
|
||||
/*
|
||||
* endat_master_multi_TXPRU_bin.h
|
||||
*
|
||||
*
|
||||
* Copyright (c) 2015 - 2016, Texas Instruments Incorporated
|
||||
* All rights reserved not granted herein.
|
||||
*
|
||||
* Limited License.
|
||||
*
|
||||
* Texas Instruments Incorporated grants a world-wide, royalty-free,
|
||||
* non-exclusive license under copyrights and patents it now or hereafter
|
||||
* owns or controls to make, have made, use, import, offer to sell and sell ("Utilize")
|
||||
* this software subject to the terms herein. With respect to the foregoing patent
|
||||
* license, such license is granted solely to the extent that any such patent
|
||||
* is necessary to Utilize the software alone. The patent license shall not apply to any
|
||||
* combinations which include this software, other than combinations with devices
|
||||
* manufactured by or for TI ('TI Devices'). No hardware patent is licensed hereunder.
|
||||
*
|
||||
* Redistributions must preserve existing copyright notices and reproduce this license
|
||||
* (including the above copyright notice and the disclaimer and (if applicable) source
|
||||
* code license limitations below) in the documentation and/or other materials provided
|
||||
* with the distribution
|
||||
*
|
||||
* Redistribution and use in binary form, without modification, are permitted provided
|
||||
* that the following conditions are met:
|
||||
* No reverse engineering, decompilation, or disassembly of this software is
|
||||
* permitted with respect to any software provided in binary form.
|
||||
* Any redistribution and use are licensed by TI for use only with TI Devices.
|
||||
* Nothing shall obligate TI to provide you with source code for the software
|
||||
* licensed and provided to you in object code.
|
||||
*
|
||||
* If software source code is provided to you, modification and redistribution of the
|
||||
* source code are permitted provided that the following conditions are met:
|
||||
* Any redistribution and use of the source code, including any resulting derivative works,
|
||||
* are licensed by TI for use only with TI Devices.
|
||||
* Any redistribution and use of any object code compiled from the source code and
|
||||
* any resulting derivative works, are licensed by TI for use only with TI Devices.
|
||||
*
|
||||
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND
|
||||
* TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
const uint32_t EnDatFirmwareMultiMakeTXPRU_0[] = {
|
||||
0x21000300,
|
||||
0x00000207,
|
||||
0x00020001,
|
||||
@ -68,77 +12,77 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x51000502,
|
||||
0x21000d00,
|
||||
0x24000105,
|
||||
0x23034a9d,
|
||||
0x23032e9d,
|
||||
0x24005480,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91b03880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24721d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24003880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24023880,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24421d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x241a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x0903efef,
|
||||
0x8184182f,
|
||||
0x91a83880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x244a1d80,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x240a4680,
|
||||
0x240000c0,
|
||||
0x24001d01,
|
||||
0x24001f21,
|
||||
0x24000141,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0x0903efef,
|
||||
0x8185182f,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x91ac3880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24000180,
|
||||
0x2403bfc0,
|
||||
0x24271081,
|
||||
@ -160,13 +104,13 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9024e02,
|
||||
0x2303b49d,
|
||||
0x2303989d,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x240a0283,
|
||||
0x24151ac3,
|
||||
0x91841822,
|
||||
0x2303bf9d,
|
||||
0x2303a39d,
|
||||
0x81883889,
|
||||
0x91905880,
|
||||
0x6900e004,
|
||||
@ -191,7 +135,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9024e02,
|
||||
0x2303b49d,
|
||||
0x2303989d,
|
||||
0x24000020,
|
||||
0x91841800,
|
||||
0x51000002,
|
||||
@ -200,20 +144,21 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x91081800,
|
||||
0x69000007,
|
||||
0x91743a80,
|
||||
0xcf02e0ff,
|
||||
0x1f02e0e0,
|
||||
0xcf06e0fd,
|
||||
0x1f06e0e0,
|
||||
0x81743a80,
|
||||
0x24000100,
|
||||
0x810a1800,
|
||||
0x910a1800,
|
||||
0xcf0000ff,
|
||||
0xc9070002,
|
||||
0x2100ae00,
|
||||
0xc9070003,
|
||||
0x2300b69d,
|
||||
0x2100af00,
|
||||
0x91247880,
|
||||
0x2301b29d,
|
||||
0x2301969d,
|
||||
0xd1004103,
|
||||
0x912c3881,
|
||||
0x2301ab9d,
|
||||
0x23018f9d,
|
||||
0x10000004,
|
||||
0x91813824,
|
||||
0xd1000403,
|
||||
@ -232,30 +177,22 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x24000083,
|
||||
0x810a1803,
|
||||
0x91081804,
|
||||
0x570004df,
|
||||
0x69000402,
|
||||
0x2400249f,
|
||||
0x570004da,
|
||||
0x21009600,
|
||||
0x910c7880,
|
||||
0xc9000502,
|
||||
0x240010de,
|
||||
0xc9010502,
|
||||
0x240011de,
|
||||
0xc9020502,
|
||||
0x91247880,
|
||||
0x240012de,
|
||||
0x1000001e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x240000cf,
|
||||
0x2400008f,
|
||||
0x240000d0,
|
||||
0x24000090,
|
||||
0xc9000503,
|
||||
0x24001803,
|
||||
0x24000423,
|
||||
0xc9010503,
|
||||
0x24001903,
|
||||
0x24000c23,
|
||||
0xc9020503,
|
||||
0x24001a03,
|
||||
0x24001423,
|
||||
0x2400011b,
|
||||
@ -275,7 +212,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100df00,
|
||||
0x2100d800,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -290,7 +227,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2100ee00,
|
||||
0x2100e700,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -306,17 +243,17 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2100fe00,
|
||||
0x2100f700,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21012500,
|
||||
0x21011e00,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21010800,
|
||||
0x21010100,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -333,7 +270,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21011900,
|
||||
0x21011200,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -344,7 +281,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21012400,
|
||||
0x21011d00,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -376,41 +313,14 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21014300,
|
||||
0x21013c00,
|
||||
0x1f000000,
|
||||
0xc9000502,
|
||||
0x1d007e7e,
|
||||
0xc9010502,
|
||||
0x1d017e7e,
|
||||
0xc9020502,
|
||||
0x1d027e7e,
|
||||
0xc900050a,
|
||||
0x91403884,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8130788f,
|
||||
0x81403884,
|
||||
0x21015300,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81403884,
|
||||
0xc901050a,
|
||||
0x91603884,
|
||||
0xc900e005,
|
||||
0x1f000404,
|
||||
0x8150788f,
|
||||
0x81603884,
|
||||
0x21015d00,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81603884,
|
||||
0xc902050a,
|
||||
0x91803884,
|
||||
0xc900e005,
|
||||
0xc900e004,
|
||||
0x1f000404,
|
||||
0x8170788f,
|
||||
0x81803884,
|
||||
0x21016700,
|
||||
0x1d000404,
|
||||
0x01012424,
|
||||
0x81803884,
|
||||
@ -419,22 +329,28 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x0b028080,
|
||||
0x30800002,
|
||||
0x10e0e0e0,
|
||||
0xc9000502,
|
||||
0x1f007e7e,
|
||||
0xc9010502,
|
||||
0x1f017e7e,
|
||||
0xc9020502,
|
||||
0x1f027e7e,
|
||||
0x91021800,
|
||||
0xd707004b,
|
||||
0x910a1800,
|
||||
0xd7070070,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9024e02,
|
||||
0x1f13ffff,
|
||||
0xc9000503,
|
||||
0x1d007e7e,
|
||||
0xd105ff00,
|
||||
0xc9010503,
|
||||
0x1d017e7e,
|
||||
0xd10dff00,
|
||||
0xc9020503,
|
||||
0x1d027e7e,
|
||||
0xd115ff00,
|
||||
0x209d0000,
|
||||
@ -487,11 +403,11 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x1001011e,
|
||||
0x1021211e,
|
||||
0x1041411e,
|
||||
0x23018edd,
|
||||
0x230172dd,
|
||||
0x209d0000,
|
||||
0xc9004103,
|
||||
0x24000ade,
|
||||
0x2101b600,
|
||||
0x21019a00,
|
||||
0x240002de,
|
||||
0x1000001e,
|
||||
0x71082104,
|
||||
@ -500,7 +416,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x1060601e,
|
||||
0x100101a2,
|
||||
0x09032101,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x2eff818f,
|
||||
@ -532,7 +448,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101e000,
|
||||
0x2101c400,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -547,7 +463,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2101ef00,
|
||||
0x2101d300,
|
||||
0x16004363,
|
||||
0x1301f0f0,
|
||||
0x1e03ffff,
|
||||
@ -563,17 +479,17 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2101ff00,
|
||||
0x2101e300,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21022600,
|
||||
0x21020a00,
|
||||
0x3062000e,
|
||||
0x0901efef,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21020900,
|
||||
0x2101ed00,
|
||||
0x16004363,
|
||||
0x1301efef,
|
||||
0x1e03ffff,
|
||||
@ -590,7 +506,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21021a00,
|
||||
0x2101fe00,
|
||||
0x1301efef,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -601,7 +517,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21022500,
|
||||
0x21020900,
|
||||
0x1301f0f0,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -633,7 +549,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d000000,
|
||||
0x21024400,
|
||||
0x21022800,
|
||||
0x1f000000,
|
||||
0x510002eb,
|
||||
0x24001da2,
|
||||
@ -650,7 +566,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21025600,
|
||||
0x21023a00,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -665,7 +581,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21026500,
|
||||
0x21024900,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -681,17 +597,17 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21027500,
|
||||
0x21025900,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21029c00,
|
||||
0x21028000,
|
||||
0x3062000e,
|
||||
0x0901f1f1,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x21027f00,
|
||||
0x21026300,
|
||||
0x16004363,
|
||||
0x1301f1f1,
|
||||
0x1e03ffff,
|
||||
@ -708,7 +624,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21029000,
|
||||
0x21027400,
|
||||
0x1301f1f1,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -719,7 +635,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21029b00,
|
||||
0x21027f00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -751,7 +667,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d010000,
|
||||
0x2102ba00,
|
||||
0x21029e00,
|
||||
0x1f010000,
|
||||
0x69180275,
|
||||
0x240101cc,
|
||||
@ -767,7 +683,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102cb00,
|
||||
0x2102af00,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -782,7 +698,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102da00,
|
||||
0x2102be00,
|
||||
0x16004363,
|
||||
0x1301e4e4,
|
||||
0x1e03ffff,
|
||||
@ -798,17 +714,17 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x2102ea00,
|
||||
0x2102ce00,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
0x21031100,
|
||||
0x2102f500,
|
||||
0x3062000e,
|
||||
0x0901f2f2,
|
||||
0xc803ff00,
|
||||
0xd023ff03,
|
||||
0x10434363,
|
||||
0x2102f400,
|
||||
0x2102d800,
|
||||
0x16004363,
|
||||
0x1301f2f2,
|
||||
0x1e03ffff,
|
||||
@ -825,7 +741,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21030500,
|
||||
0x2102e900,
|
||||
0x1301f2f2,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -836,7 +752,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x09016363,
|
||||
0xc803ff00,
|
||||
0xd023ff02,
|
||||
0x21031000,
|
||||
0x2102f400,
|
||||
0x1301e4e4,
|
||||
0x13016363,
|
||||
0x1e03ffff,
|
||||
@ -868,7 +784,7 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x1f046262,
|
||||
0x50636203,
|
||||
0x1d020000,
|
||||
0x21032f00,
|
||||
0x21031300,
|
||||
0x1f020000,
|
||||
0xc9004115,
|
||||
0x2400000e,
|
||||
@ -923,17 +839,17 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91b83880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24002000,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91983880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24006000,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
0x91b43880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x24000000,
|
||||
0x24011b8d,
|
||||
0x808d0400,
|
||||
@ -1025,49 +941,13 @@ const unsigned int EnDatFirmwareMultiMakeTXPRU[]= {
|
||||
0x04a280a2,
|
||||
0x24003801,
|
||||
0x24000141,
|
||||
0x23017fdd,
|
||||
0x230163dd,
|
||||
0x91a03880,
|
||||
0x230345dd,
|
||||
0x230329dd,
|
||||
0x2401048d,
|
||||
0x908d0480,
|
||||
0xce2380fe,
|
||||
0x2eff8180,
|
||||
0x810c3c80,
|
||||
0xc843ff00,
|
||||
0x910c3c80,
|
||||
0x2400007e,
|
||||
0x00e0e9e9,
|
||||
0x91a43880,
|
||||
0x230345dd,
|
||||
0x2400000e,
|
||||
0x81bf180e,
|
||||
0x2400002e,
|
||||
0x91bd180e,
|
||||
0x9101184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91be180e,
|
||||
0x9105184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x91bf180e,
|
||||
0x9109184e,
|
||||
0x104e0e0e,
|
||||
0x120e2e2e,
|
||||
0x6f002ef3,
|
||||
0x91bc184e,
|
||||
0xc9024e02,
|
||||
0x1f13ffff,
|
||||
0xd063ff00,
|
||||
0x91a83880,
|
||||
0x230345dd,
|
||||
0x2400040e,
|
||||
0x81bf180e,
|
||||
0x0101c8c8,
|
||||
0x6708c8cf,
|
||||
0x0b03e9e9,
|
||||
0x919c389b,
|
||||
0x60fbe903,
|
||||
0x04fbe9e9,
|
||||
0x2103f400,
|
||||
0x209d0000 };
|
||||
0x2401188d};
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -74,15 +74,15 @@ const buildOptionCombos = [
|
||||
];
|
||||
|
||||
let postBuildStepsPru1 = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_PRU_bin.h EnDatFirmwareMultiMakePRU 4; move endat_master_multi_PRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h;",
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakePRU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h"
|
||||
|
||||
];
|
||||
let postBuildStepsRtupru1 = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.b00 endat_master_multi_RTU_bin.h EnDatFirmwareMultiMakeRTU 4; move endat_master_multi_RTU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h;",
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeRTU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h"
|
||||
|
||||
];
|
||||
let postBuildStepsTxpru1 = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.b00 endat_master_multi_TXPRU_bin.h EnDatFirmwareMultiMakeTXPRU 4; move endat_master_multi_TXPRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h;",
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeTXPRU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h"
|
||||
|
||||
];
|
||||
|
||||
@ -112,17 +112,17 @@ function getComponentBuildProperty(buildOption) {
|
||||
if(buildOption.cpu.match("icssg0-pru1"))
|
||||
{
|
||||
build_property.defines = defines_pru;
|
||||
property.postBuildSteps = postBuildStepsPru1;
|
||||
build_property.postBuildSteps = postBuildStepsPru1;
|
||||
}
|
||||
if(buildOption.cpu.match("icssg0-rtupru1"))
|
||||
{
|
||||
build_property.defines = defines_rtu;
|
||||
property.postBuildSteps = postBuildStepsRtupru1;
|
||||
build_property.postBuildSteps = postBuildStepsRtupru1;
|
||||
}
|
||||
if(buildOption.cpu.match("icssg0-txpru1"))
|
||||
{
|
||||
build_property.defines = defines_txpru;
|
||||
property.postBuildSteps = postBuildStepsTxpru1;
|
||||
build_property.postBuildSteps = postBuildStepsTxpru1;
|
||||
}
|
||||
|
||||
build_property.cflags = cflags;
|
||||
|
||||
@ -74,16 +74,15 @@ const buildOptionCombos = [
|
||||
];
|
||||
|
||||
let postBuildStepsPru1 = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_PRU_bin.h EnDatFirmwareMultiMakePRU 4; move endat_master_multi_PRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h ;"
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakePRU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h"
|
||||
|
||||
];
|
||||
let postBuildStepsRtupru1 = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.b00 endat_master_multi_RTU_bin.h EnDatFirmwareMultiMakeRTU 4; move endat_master_multi_RTU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h;"
|
||||
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeRTU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h"
|
||||
|
||||
];
|
||||
let postBuildStepsTxpru1 = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.b00 endat_master_multi_TXPRU_bin.h EnDatFirmwareMultiMakeTXPRU 4; move endat_master_multi_TXPRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h;"
|
||||
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeTXPRU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h"
|
||||
];
|
||||
|
||||
function getComponentProperty() {
|
||||
|
||||
@ -43,6 +43,9 @@
|
||||
--disable_auto_rts
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakePRU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Multi Ch Load Share FW project">
|
||||
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_PRU_bin.h EnDatFirmwareMultiMakePRU 4; move endat_master_multi_PRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakePRU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -43,6 +43,9 @@
|
||||
--disable_auto_rts
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeRTU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Multi Ch Load Share FW project">
|
||||
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.b00 endat_master_multi_RTU_bin.h EnDatFirmwareMultiMakeRTU 4; move endat_master_multi_RTU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeRTU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -45,6 +45,9 @@
|
||||
--disable_auto_rts
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeTXPRU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Multi Ch Load Share FW project">
|
||||
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.b00 endat_master_multi_TXPRU_bin.h EnDatFirmwareMultiMakeTXPRU 4; move endat_master_multi_TXPRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeTXPRU -o endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am243x-evm_icssg0-txpru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_PRU_bin.h EnDatFirmwareMultiMakePRU 4; move endat_master_multi_PRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h ;
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakePRU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Multi Ch Load Share FW project">
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_PRU_bin.h EnDatFirmwareMultiMakePRU 4; move endat_master_multi_PRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakePRU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_PRU_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.b00 endat_master_multi_RTU_bin.h EnDatFirmwareMultiMakeRTU 4; move endat_master_multi_RTU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h;
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeRTU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Multi Ch Load Share FW project">
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.b00 endat_master_multi_RTU_bin.h EnDatFirmwareMultiMakeRTU 4; move endat_master_multi_RTU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeRTU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-rtupru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_RTU_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -46,7 +46,7 @@
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.b00 endat_master_multi_TXPRU_bin.h EnDatFirmwareMultiMakeTXPRU 4; move endat_master_multi_TXPRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h;
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeTXPRU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Multi Ch Load Share FW project">
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.b00 endat_master_multi_TXPRU_bin.h EnDatFirmwareMultiMakeTXPRU 4; move endat_master_multi_TXPRU_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMultiMakeTXPRU -o endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_load_share_am64x-evm_icssg0-txpru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_TXPRU_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -16,7 +16,7 @@ const files = {
|
||||
const filedirs = {
|
||||
common: [
|
||||
"..", /* core_os_combo base */
|
||||
"../../..", /* Example base */
|
||||
"../..", /* Example base */
|
||||
"../../../..",
|
||||
|
||||
],
|
||||
@ -57,7 +57,7 @@ const buildOptionCombos = [
|
||||
];
|
||||
|
||||
let postBuildSteps = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_bin.h EnDatFirmwareMulti 4; move endat_master_multi_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h;",
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMulti -o endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h"
|
||||
|
||||
];
|
||||
function getComponentProperty() {
|
||||
|
||||
@ -57,7 +57,7 @@ const buildOptionCombos = [
|
||||
];
|
||||
|
||||
let postBuildSteps = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_bin.h EnDatFirmwareMulti 4; move endat_master_multi_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h;",
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMulti -o endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h"
|
||||
|
||||
|
||||
];
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_bin.h EnDatFirmwareMulti 4; move endat_master_multi_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h;
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMulti -o endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Multi Ch FW project">
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_bin.h EnDatFirmwareMulti 4; move endat_master_multi_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMulti -o endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_bin.h EnDatFirmwareMulti 4; move endat_master_multi_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h;
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMulti -o endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Multi Ch FW project">
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_multi_bin.h EnDatFirmwareMulti 4; move endat_master_multi_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmwareMulti -o endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_multi_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_multi_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -60,7 +60,7 @@ const buildOptionCombos = [
|
||||
];
|
||||
|
||||
let postBuildSteps = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_bin.h EnDatFirmware 4; move endat_master_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h;"
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmware -o endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h"
|
||||
|
||||
];
|
||||
function getComponentProperty() {
|
||||
|
||||
@ -56,8 +56,7 @@ const buildOptionCombos = [
|
||||
];
|
||||
|
||||
let postBuildSteps = [
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_bin.h EnDatFirmware 4; move endat_master_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h;",
|
||||
|
||||
"$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmware -o endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h"
|
||||
];
|
||||
function getComponentProperty() {
|
||||
let property = {};
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_bin.h EnDatFirmware 4; move endat_master_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h;
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmware -o endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Single Ch FW project">
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_bin.h EnDatFirmware 4; move endat_master_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmware -o endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_single_ch_am243x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
"
|
||||
|
||||
postBuildStep="
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_bin.h EnDatFirmware 4; move endat_master_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h;
|
||||
$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmware -o endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h
|
||||
"
|
||||
|
||||
description="A Endat Peripheral Interface Single Ch FW project">
|
||||
|
||||
@ -108,7 +108,7 @@ clean:
|
||||
-@echo ' '
|
||||
|
||||
post-build:
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_hexpru.cmd endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; ${MOTOR_CONTROL_SDK_PATH}/mcu_plus_sdk/tools/bin2header/bin2header.exe endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.b00 endat_master_bin.h EnDatFirmware 4; move endat_master_bin.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.h
|
||||
-$(CG_TOOL_ROOT)/bin/hexpru.exe --diag_wrap=off --array --array:name_prefix=EnDatFirmware -o endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.out; move endat_peripheral_interface_single_ch_am64x-evm_icssg0-pru1_fw_ti-pru-cgt.h ${MOTOR_CONTROL_SDK_PATH}/source/position_sense/endat/firmware/endat_master_bin.
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
|
||||
@ -500,13 +500,14 @@ int32_t endat_wait_initialization(struct endat_priv *priv, uint32_t timeout, uin
|
||||
*
|
||||
* \param[in] pruss_xchg EnDat firmware interface address
|
||||
* \param[in] pruss_cfg ICSS PRU config base address
|
||||
* \param[in] pruss_iep ICSS PRU iep base address
|
||||
* \param[in] slice ICSS PRU SLICE
|
||||
*
|
||||
* \retval priv pointer to struct endat_priv instance
|
||||
*
|
||||
*/
|
||||
struct endat_priv *endat_init(struct endat_pruss_xchg *pruss_xchg,
|
||||
void *pruss_cfg, int32_t slice);
|
||||
void *pruss_cfg, void *pruss_iep, int32_t slice);
|
||||
|
||||
/**
|
||||
* \brief Read EnDat 2.2 angular position in steps for rotary encoders <br>
|
||||
|
||||
@ -46,7 +46,6 @@ extern "C" {
|
||||
#define ENDAT_MODE_SINGLE_CHANNEL_SINGLE_PRU (0U)
|
||||
#define ENDAT_MODE_MULTI_CHANNEL_SINGLE_PRU (1U)
|
||||
#define ENDAT_MODE_MULTI_CHANNEL_MULTI_PRU (2U)
|
||||
|
||||
#define HWREG(x) \
|
||||
(*((volatile uint32_t *)(x)))
|
||||
#define HWREGB(x) \
|
||||
@ -152,6 +151,11 @@ struct endat_priv
|
||||
struct endat_pruss_xchg *pruss_xchg;
|
||||
int32_t has_safety;
|
||||
void *pruss_cfg;
|
||||
void *pruss_iep;
|
||||
uint64_t cmp3;
|
||||
uint64_t cmp5;
|
||||
uint64_t cmp6;
|
||||
|
||||
};
|
||||
|
||||
struct cmd_supplement
|
||||
@ -168,6 +172,9 @@ struct cmd_supplement
|
||||
uint32_t block;
|
||||
uint8_t has_block_address;
|
||||
uint32_t frequency;
|
||||
uint64_t cmp3;
|
||||
uint64_t cmp5;
|
||||
uint64_t cmp6;
|
||||
};
|
||||
|
||||
struct endat_data
|
||||
|
||||
Loading…
Reference in New Issue
Block a user