427 lines
13 KiB
C
427 lines
13 KiB
C
//#############################################################################
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//
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// FILE: cputimer.h
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//
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// TITLE: CM CPU timer Driver
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//
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//#############################################################################
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// $Copyright:
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// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//#############################################################################
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#ifndef CPUTIMER_H
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#define CPUTIMER_H
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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//! \addtogroup cputimer_api CPUTimer
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//! @{
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//
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//*****************************************************************************
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#include <stdbool.h>
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#include <stdint.h>
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#include "inc/hw_memmap.h"
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#include "inc/hw_types.h"
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#include "inc/hw_cputimer.h"
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#include "debug.h"
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#include "sysctl.h"
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//*****************************************************************************
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//
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// Defines for the API.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! Values that can be passed to CPUTimer_setEmulationMode() as the
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//! \e mode parameter.
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//
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//****************************************************************************
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typedef enum
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{
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//! Denotes that the timer will stop after the next decrement
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CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT = 0x0000,
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//! Denotes that the timer will stop when it reaches zero
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CPUTIMER_EMULATIONMODE_STOPATZERO = 0x0400,
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//! Denotes that the timer will run free
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CPUTIMER_EMULATIONMODE_RUNFREE = 0x0800
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}CPUTimer_EmulationMode;
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//*****************************************************************************
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//
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//! The following are values that can be passed to
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//! CPUTimer_selectClockSource() as the \e prescaler parameter.
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//
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//*****************************************************************************
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typedef enum
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{
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CPUTIMER_CLOCK_PRESCALER_1 = 0, //!< Prescaler value of / 1
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CPUTIMER_CLOCK_PRESCALER_2 = 1, //!< Prescaler value of / 2
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CPUTIMER_CLOCK_PRESCALER_4 = 2, //!< Prescaler value of / 4
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CPUTIMER_CLOCK_PRESCALER_8 = 3, //!< Prescaler value of / 8
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CPUTIMER_CLOCK_PRESCALER_16 = 4 //!< Prescaler value of / 16
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} CPUTimer_Prescaler;
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//*****************************************************************************
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//
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//! \internal
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//! Checks CPU timer base address.
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//!
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//! \param base specifies the Timer module base address.
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//!
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//! This function determines if a CPU timer module base address is valid.
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//!
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//! \return Returns \b true if the base address is valid and \b false
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//! otherwise.
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//
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//*****************************************************************************
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#ifdef DEBUG
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static inline bool CPUTimer_isBaseValid(uint32_t base)
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{
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return((base == CPUTIMER0_BASE) || (base == CPUTIMER1_BASE) ||
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(base == CPUTIMER2_BASE));
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}
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#endif
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//*****************************************************************************
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//
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//! Clears CPU timer overflow flag.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function clears the CPU timer overflow flag.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_clearOverflowFlag(uint32_t base)
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{
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Set TIF bit of TCR register
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//
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HWREGH(base + CPUTIMER_O_TCR) |= CPUTIMER_TCR_TIF;
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}
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//*****************************************************************************
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//
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//! Disables CPU timer interrupt.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function disables the CPU timer interrupt.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_disableInterrupt(uint32_t base)
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{
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Clear TIE bit of TCR register
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//
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HWREGH(base + CPUTIMER_O_TCR) &= ~CPUTIMER_TCR_TIE;
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}
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//*****************************************************************************
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//
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//! Enables CPU timer interrupt.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function enables the CPU timer interrupt.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_enableInterrupt(uint32_t base)
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{
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uint16_t tcrValue = 0;
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Set TIE bit of TCR register
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//
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tcrValue = HWREGH(base + CPUTIMER_O_TCR) & (~CPUTIMER_TCR_TIF);
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HWREGH(base + CPUTIMER_O_TCR) = tcrValue | CPUTIMER_TCR_TIE;
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}
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//*****************************************************************************
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//
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//! Reloads CPU timer counter.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function reloads the CPU timer counter with the values contained in
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//! the CPU timer period register.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_reloadTimerCounter(uint32_t base)
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{
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uint16_t tcrValue = 0;
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Set TRB bit of register TCR
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//
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tcrValue = HWREGH(base + CPUTIMER_O_TCR) & (~CPUTIMER_TCR_TIF);
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HWREGH(base + CPUTIMER_O_TCR) = tcrValue | CPUTIMER_TCR_TRB;
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}
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//*****************************************************************************
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//
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//! Stops CPU timer.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function stops the CPU timer.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_stopTimer(uint32_t base)
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{
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uint16_t tcrValue = 0;
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Set TSS bit of register TCR
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//
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tcrValue = HWREGH(base + CPUTIMER_O_TCR) & (~CPUTIMER_TCR_TIF);
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HWREGH(base + CPUTIMER_O_TCR) = tcrValue | CPUTIMER_TCR_TSS;
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}
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//*****************************************************************************
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//
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//! Starts(restarts) CPU timer.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function starts (restarts) the CPU timer.
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//!
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//! \b Note: This function doesn't reset the timer counter.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_resumeTimer(uint32_t base)
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{
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Clear TSS bit of register TCR
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//
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HWREGH(base + CPUTIMER_O_TCR) &= ~CPUTIMER_TCR_TSS;
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}
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//*****************************************************************************
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//
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//! Starts(restarts) CPU timer.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function starts (restarts) the CPU timer.
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//!
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//! \b Note: This function reloads the timer counter.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_startTimer(uint32_t base)
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{
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uint16_t tcrValue = 0;
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Reload the timer counter
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//
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tcrValue = HWREGH(base + CPUTIMER_O_TCR) & (~CPUTIMER_TCR_TIF);
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HWREGH(base + CPUTIMER_O_TCR) = tcrValue | CPUTIMER_TCR_TRB;
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//
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// Clear TSS bit of register TCR
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//
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HWREGH(base + CPUTIMER_O_TCR) &= ~CPUTIMER_TCR_TSS;
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}
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//*****************************************************************************
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//
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//! Sets CPU timer period.
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//!
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//! \param base is the base address of the timer module.
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//! \param periodCount is the CPU timer period count.
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//!
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//! This function sets the CPU timer period count.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_setPeriod(uint32_t base, uint32_t periodCount)
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{
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Load the MSB period Count
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//
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HWREG(base + CPUTIMER_O_PRD) = periodCount;
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}
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//*****************************************************************************
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//
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//! Returns the current CPU timer counter value.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function returns the current CPU timer counter value.
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//!
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//! \return Returns the current CPU timer count value.
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//
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//*****************************************************************************
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static inline uint32_t CPUTimer_getTimerCount(uint32_t base)
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{
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Get the TIMH:TIM registers value
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//
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return(HWREG(base + CPUTIMER_O_TIM));
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}
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//*****************************************************************************
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//
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//! Set CPU timer pre-scaler value.
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//!
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//! \param base is the base address of the timer module.
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//! \param prescaler is the CPU timer pre-scaler value.
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//!
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//! This function sets the pre-scaler value for the CPU timer. For every value
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//! of (prescaler + 1), the CPU timer counter decrements by 1.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void CPUTimer_setPreScaler(uint32_t base, uint16_t prescaler)
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{
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Writes to TPR.TDDRL and TPR.TDDRH bits
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//
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HWREGH(base + CPUTIMER_O_TPR) = (prescaler & CPUTIMER_TPR_TDDRL_M);
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HWREG(base + CPUTIMER_O_TPR) =
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(HWREG(base + CPUTIMER_O_TPR) & ~CPUTIMER_TPR_TDDRH_M) |
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(((uint32_t)prescaler << CPUTIMER_TPR_PSCL_S) & CPUTIMER_TPR_TDDRH_M);
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}
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//*****************************************************************************
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//
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//! Return the CPU timer overflow status.
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//!
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//! \param base is the base address of the timer module.
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//!
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//! This function returns the CPU timer overflow status.
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//!
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//! \return Returns true if the CPU timer has overflowed, false if not.
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//
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//*****************************************************************************
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static inline bool CPUTimer_getTimerOverflowStatus(uint32_t base)
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{
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ASSERT(CPUTimer_isBaseValid(base));
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//
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// Check if TIF bits of register TCR are set
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//
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return(((HWREGH(base + CPUTIMER_O_TCR) & CPUTIMER_TCR_TIF) ==
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CPUTIMER_TCR_TIF) ? true : false);
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}
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//*****************************************************************************
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//
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// Prototypes for the APIs.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! Sets Emulation mode for CPU timer.
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//!
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//! \param base is the base address of the timer module.
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//! \param mode is the emulation mode of the timer.
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//!
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//! This function sets the behaviour of CPU timer during emulation. Valid
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//! values mode are: CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT,
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//! CPUTIMER_EMULATIONMODE_STOPATZERO and CPUTIMER_EMULATIONMODE_RUNFREE.
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//!
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//! \return None.
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//
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//*****************************************************************************
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extern void CPUTimer_setEmulationMode(uint32_t base,
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CPUTimer_EmulationMode mode);
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//*****************************************************************************
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//
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// Close the Doxygen group.
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//! @}
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Mark the end of the C bindings section for C++ compilers.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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}
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#endif
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#endif // CPUTIMER_H
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