82 lines
3.8 KiB
C
82 lines
3.8 KiB
C
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//###########################################################################
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//
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// FILE: hw_gcrc.h
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//
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// TITLE: Definitions for the GCRC registers.
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//
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//###########################################################################
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// $Copyright:
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// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef HW_GCRC_H
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#define HW_GCRC_H
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//*************************************************************************************************
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//
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// The following are defines for the GCRC register offsets
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//
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//*************************************************************************************************
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#define GCRC_O_CRCCTRL 0x0U // CRC Control Register
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#define GCRC_O_CRCPOLY 0x4U // CRC Polynomial Register
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#define GCRC_O_CRCDATAMASK 0x8U // CRC Data Mask Register
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#define GCRC_O_CRCDATAIN 0xCU // CRC Data Input Register
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#define GCRC_O_CRCDATAOUT 0x10U // CRC Data Output Register
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#define GCRC_O_CRCDATATRANS 0x14U // CRC Transformed Data Register
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the CRCCTRL register
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//
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//*************************************************************************************************
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#define GCRC_CRCCTRL_POLYSIZE_S 0U
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#define GCRC_CRCCTRL_POLYSIZE_M 0x3FU // CRC polynomial order
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#define GCRC_CRCCTRL_ENDIANNESS 0x40U // Defines the endianness of the data stream.
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#define GCRC_CRCCTRL_BITREVERSE 0x80U // Enables the DATAIN bus to the CRC engine to be bit
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// reversed.
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#define GCRC_CRCCTRL_DATATYPE_S 8U
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#define GCRC_CRCCTRL_DATATYPE_M 0x300U // Defines the DATATYPE of the element of the data
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// array.
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the CRCDATAMASK register
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//
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//*************************************************************************************************
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#define GCRC_CRCDATAMASK_DATAMASK_S 0U
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#define GCRC_CRCDATAMASK_DATAMASK_M 0x1FU // Number of bits to be masked
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#endif
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