106 lines
4.7 KiB
C
106 lines
4.7 KiB
C
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//###########################################################################
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//
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// FILE: hw_memmap.h
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//
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// TITLE: Macros defining the memory map of the C28x.
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//
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//###########################################################################
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// $Copyright:
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// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef HW_MEMMAP_H
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#define HW_MEMMAP_H
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//*****************************************************************************
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//
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// The following are defines for the base address of the memories and
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// peripherals.
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//
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//*****************************************************************************
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#define C1RAM_BASE 0x1FFFC000U
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#define C0RAM_BASE 0x1FFFE000U
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#define S0RAM_BASE 0x20000000U
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#define S1RAM_BASE 0x20004000U
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#define S2RAM_BASE 0x20008000U
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#define S3RAM_BASE 0x2000C000U
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#define E0RAM_BASE 0x20010000U
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#define CPU1TOCMMSGRAM0_BASE 0x20080000U
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#define CPU1TOCMMSGRAM1_BASE 0x20080800U
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#define CMTOCPU1MSGRAM0_BASE 0x20082000U
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#define CMTOCPU1MSGRAM1_BASE 0x20082800U
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#define CPU2TOCMMSGRAM0_BASE 0x20084000U
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#define CPU2TOCMMSGRAM1_BASE 0x20084800U
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#define CMTOCPU2MSGRAM0_BASE 0x20086000U
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#define CMTOCPU2MSGRAM1_BASE 0x20086800U
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#define SSI0_BASE 0x40008000U
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#define UART0_BASE 0x4000C000U
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#define I2C0_BASE 0x40020000U
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#define GCRC_BASE 0x40040000U
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#define AES_BASE 0x4004A000U
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#define AESW_BASE 0x4004AC00U
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#define USB0_BASE 0x40050000U
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#define CANA_BASE 0x40070000U
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#define CANB_BASE 0x40074000U
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#define MCAN0_BASE 0x40078000U
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#define MCAN_SS_BASE 0x4007C400U
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#define MCAN_BASE 0x4007C600U
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#define MCAN_ERROR_BASE 0x4007C800U
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#define WD_BASE 0x40080000U
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#define NMI_BASE 0x40081000U
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#define GPIODATA_BASE 0x40083000U
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#define GPIODATAREAD_BASE 0x40083100U
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#define CPUTIMER0_BASE 0x40084000U
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#define CPUTIMER1_BASE 0x40084010U
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#define CPUTIMER2_BASE 0x40084020U
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#define DCSM_Z1_BASE 0x40085000U
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#define DCSM_Z2_BASE 0x40085100U
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#define DCSMCOMMON_BASE 0x40085180U
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#define ESC_SS_BASE 0x400AFC00U
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#define ESC_SS_CONFIG_BASE 0x400AFE00U
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#define EMAC_BASE 0x400C0000U
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#define EMAC_SS_BASE 0x400C2000U
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#define DMPU_BASE 0x400CC000U
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#define EMPU_BASE 0x400CD000U
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#define FLASH0CTRL_BASE 0x400FA000U
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#define FLASH0ECC_BASE 0x400FA600U
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#define CMSYSCTL_BASE 0x400FC000U
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#define IPC_CMTOCPU1_BASE 0x400FD000U
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#define FLASHPUMPSEMAPHORE_BASE 0x400FD048U
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#define IPC_CMTOCPU2_BASE 0x400FD080U
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#define CMMEMCFG_BASE 0x400FE000U
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#define CMMEMORYERROR_BASE 0x400FE400U
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#define CMMEMORYDIAGERROR_BASE 0x400FE800U
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#define UDMA_BASE 0x400FF000U
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#define NVIC_BASE 0xE000E000U
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#endif
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