Added C2000Ware v5.01.00.00 contents

This commit is contained in:
Deshpande 2023-12-13 16:46:16 +05:30
parent 58fd884015
commit 0ad1c07e52
12373 changed files with 1797245 additions and 19949 deletions

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@ -1,7 +1,7 @@
{
"name": "C2000WARE",
"displayName": "C2000 SysConfig",
"version": "5.00.00.00",
"version": "5.01.00.00",
"documentationPath": "./doc",
"includePaths": [
@ -13,6 +13,10 @@
"components": [
"/driverlib/PeripheralComponents.js",
"/utilities/clb_tool/clb_syscfg/source/CLBToolComponents.js",
"/utilities/dcsm_tool/dcsm_syscfg/source/DCSMToolComponents.js",
"/utilities/cmd_tool/cmd_syscfg/source/CMDToolComponents.js",
"/libraries/C2000WARELibraryComponents.js",
"/driverlib/clocktree/clockTreeComponents.js"
],

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@ -1,7 +1,7 @@
<div align="center">
<img src="https://upload.wikimedia.org/wikipedia/commons/b/ba/TexasInstruments-Logo.svg" width="150"><br/>
# C2000Ware v4.03.00.00
# C2000Ware v5.01.00.00
[Introduction](#introduction) | [Layout](#repositorylayout) | [Overview](#overview) | [Contribute](#contributing-to-the-project)
@ -12,6 +12,7 @@
C2000Ware for C2000 microcontrollers is a cohesive set of development software and documentation designed to minimize software development time.
It includes device-specific drivers and device peripheral examples, C2000Ware provides a solid foundation to begin development and evaluation.
List of devices supported
- [F28P65x](https://www.ti.com/product/TMS320F28P650DK)
- [F280015x](https://www.ti.com/product/TMS320F2800157)
- [F280013x](https://www.ti.com/product/TMS320F2800137)
- [F28004x](https://www.ti.com/product/TMS320F280049C)
@ -42,8 +43,8 @@ The SDK includes peripheral usage examples to help users to get started quickly.
- driverlib
- This folder contains the device-specific driver library and driver-based peripheral examples.
- examples
- This folder contains the examples involving multiple devices/peripherals to showcase different applications.
- libraries
- This folder contains the device-specific and core libraries.
- utilities
- This folder contains development utility applications such as flash programmers, windows drivers.

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@ -61,7 +61,7 @@
},
"pins": [
{ "number" : 1, "name" : "3V3" },
{ "number" : 2, "ball": "U3", "name" : "GPIO32" },
{ "number" : 2, "ball": "U13", "name" : "GPIO32" },
{ "number" : 3, "ball": "E4", "name" : "SCIB RX / GPIO19" },
{ "number" : 4, "ball": "E3", "name" : "SCIB RX / GPIO18" },
{ "number" : 5, "ball": "B19", "name" : "GPIO67" },

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@ -365,5 +365,19 @@
"EQEPI": "66" /*GPIO57*/
}
},
"FSI_HEADER": {
"displayName": "FSI Header",
"description": "FSI Header",
"longDescription": "This controlCARD features standard header for the FSI peripheral located on the controlCARD board.",
"definition": "/boards/components/fsi.json",
"connections" : {
"FSIRX_D0": "51", /* GPIO12 */
"FSIRX_D1": "52", /* GPIO11 */
"FSIRX_CLK": "50", /* GPIO13 */
"FSITX_D0": "58", /* GPIO26 */
"FSITX_D1": "57", /* GPIO25 */
"FSITX_CLK": "59" /* GPIO27 */
}
},
}
}

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@ -343,5 +343,19 @@
// "EQEPB": "25", /*GPIO25*/
// }
// },
// "FSI_HEADER": {
// "displayName": "FSI Header",
// "description": "FSI Header",
// "longDescription": "This controlCARD features standard header for the FSI peripheral located on the controlCARD board.",
// "definition": "/boards/components/fsi.json",
// "connections" : {
// "FSIRX_D0": "51", /* GPIO12 */
// // "FSIRX_D1": "64", /* GPIO11 */
// "FSIRX_CLK": "50", /* GPIO13 */
// "FSITX_D0": "58", /* GPIO26 */
// // "FSITX_D1": "69", /* GPIO25 */
// "FSITX_CLK": "59" /* GPIO27 */
// }
// },
}
}

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@ -403,6 +403,16 @@
"SCI_TX": "W11" /*GPIO29*/
}
},
"USB": {
"displayName": "USB0",
"description": "USB0",
"longDescription": "This controlCARD features standard locations for the USB communication peripheral.",
"definition" : "/boards/components/standard_usb.json",
"connections" : {
"USBDM": "D19", /*GPIO42*/
"USBDP": "C19" /*GPIO43*/
}
},
"CAN_LOC1": {
"displayName": "CANA",
"description": "CANA",

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@ -427,6 +427,16 @@
"SCI_TX": "W11" /*GPIO29*/
}
},
"USB": {
"displayName": "USB0",
"description": "USB0",
"longDescription": "This controlCARD features standard locations for the USB communication peripheral.",
"definition" : "/boards/components/standard_usb.json",
"connections" : {
"USBDM": "D19", /*GPIO42*/
"USBDP": "C19" /*GPIO43*/
}
},
"CAN_LOC1": {
"displayName": "CANA",
"description": "CANA",
@ -473,5 +483,51 @@
"FSITX_CLK": "L1" /* GPIO27 */
}
},
"ETHERCAT": {
"displayName": "ETHERCAT",
"description": "ETHERCAT",
"longDescription": "ETHERCAT",
"definition": "/boards/components/ethercat.json",
"connections": {
"ECAT_I2C_SDA": "B13", /*GPIO150*/
"ECAT_I2C_SCL": "C13", /*GPIO151*/
"ECAT_TX1_DATA0": "V10", /*GPIO131*/
"ECAT_TX1_DATA1": "W18", /*GPIO132*/
"ECAT_TX1_DATA2": "V18", /*GPIO134*/
"ECAT_TX1_DATA3": "U18", /*GPIO135*/
"ECAT_MDIO_CLK": "D13", /*GPIO152*/
"ECAT_MDIO_DATA": "A12", /*GPIO153*/
"ECAT_PHY_CLK": "B12", /*GPIO154*/
"ECAT_RX1_CLK": "T18", /*GPIO137*/
"ECAT_RX1_DV": "T17", /*GPIO136*/
"ECAT_RX1_ERR": "T19", /*GPIO138*/
"ECAT_RX1_DATA0": "N19", /*GPIO139*/
"ECAT_RX1_DATA1": "M19", /*GPIO140*/
"ECAT_RX1_DATA2": "M18", /*GPIO141*/
"ECAT_RX1_DATA3": "L19", /*GPIO142*/
"ECAT_PHY_RESETn": "C12", /*GPIO155*/
"ECAT_LED_RUN": "D18", /*GPIO146*/
"ECAT_LED_ERR": "E17", /*GPIO145*/
"ECAT_LED_LINK0_ACTIVE": "F18", /*GPIO143*/
"ECAT_LED_LINK1_ACTIVE": "F17", /*GPIO144*/
"ECAT_RX0_CLK": "A8", /*GPIO163*/
"ECAT_RX0_DV": "D9", /*GPIO162*/
"ECAT_RX0_ERR": "B8", /*GPIO164*/
"ECAT_RX0_DATA0": "C5", /*GPIO165*/
"ECAT_RX0_DATA1": "D5", /*GPIO166*/
"ECAT_RX0_DATA2": "C4", /*GPIO167*/
"ECAT_RX0_DATA3": "D4", /*GPIO168*/
"ECAT_TX0_ENA": "D12", /*GPIO156*/
"ECAT_TX0_CLK": "B10", /*GPIO157*/
"ECAT_TX0_DATA0": "C10", /*GPIO158*/
"ECAT_TX0_DATA1": "D10", /*GPIO159*/
"ECAT_TX0_DATA2": "B9", /*GPIO160*/
"ECAT_TX0_DATA3": "C9", /*GPIO161*/
"ECAT_TX1_ENA": "T10", /*GPIO129*/
"ECAT_TX1_CLK": "U10", /*GPIO130*/
"ECAT_PHY0_LINKSTATUS": "D14", /*GPIO148*/
"ECAT_PHY1_LINKSTATUS": "A13", /*GPIO149*/
}
},
}
}

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@ -427,6 +427,16 @@
"SCI_TX": "P11" /*GPIO29*/
}
},
"USB": {
"displayName": "USB0",
"description": "USB0",
"longDescription": "This controlCARD features standard locations for the USB communication peripheral.",
"definition" : "/boards/components/standard_usb.json",
"connections" : {
"USBDM": "E16", /*GPIO42*/
"USBDP": "D16" /*GPIO43*/
}
},
"CAN_LOC1": {
"displayName": "CANA",
"description": "CANA",
@ -473,5 +483,51 @@
"FSITX_CLK": "G13" /* GPIO27 */
}
},
"ETHERCAT": {
"displayName": "ETHERCAT",
"description": "ETHERCAT",
"longDescription": "ETHERCAT",
"definition": "/boards/components/ethercat.json",
"connections": {
"ECAT_I2C_SDA": "A12", /*GPIO150*/
"ECAT_I2C_SCL": "F11", /*GPIO151*/
"ECAT_TX1_DATA0": "N13", /*GPIO131*/
"ECAT_TX1_DATA1": "T14", /*GPIO132*/
"ECAT_TX1_DATA2": "R14", /*GPIO134*/
"ECAT_TX1_DATA3": "B2", /*GPIO19*/
"ECAT_MDIO_CLK": "E11", /*GPIO152*/
"ECAT_MDIO_DATA": "D11", /*GPIO153*/
"ECAT_PHY_CLK": "C11", /*GPIO154*/
"ECAT_RX1_CLK": "B16", /*GPIO69*/
"ECAT_RX1_DV": "C15", /*GPIO70*/
"ECAT_RX1_ERR": "B15", /*GPIO71*/
"ECAT_RX1_DATA0": "K14", /*GPIO63*/
"ECAT_RX1_DATA1": "K13", /*GPIO64*/
"ECAT_RX1_DATA2": "H13", /*GPIO141*/
"ECAT_RX1_DATA3": "H14", /*GPIO142*/
"ECAT_PHY_RESETn": "B11", /*GPIO155*/
"ECAT_LED_RUN": "H16", /*GPIO146*/
"ECAT_LED_ERR": "H15", /*GPIO145*/
"ECAT_LED_LINK0_ACTIVE": "L13", /*GPIO58*/
"ECAT_LED_LINK1_ACTIVE": "L14", /*GPIO59*/
"ECAT_RX0_CLK": "B8", /*GPIO163*/
"ECAT_RX0_DV": "A8", /*GPIO162*/
"ECAT_RX0_ERR": "C8", /*GPIO164*/
"ECAT_RX0_DATA0": "F6", /*GPIO165*/
"ECAT_RX0_DATA1": "B5", /*GPIO166*/
"ECAT_RX0_DATA2": "E5", /*GPIO167*/
"ECAT_RX0_DATA3": "F5", /*GPIO168*/
"ECAT_TX0_ENA": "A11", /*GPIO156*/
"ECAT_TX0_CLK": "E10", /*GPIO157*/
"ECAT_TX0_DATA0": "D10", /*GPIO158*/
"ECAT_TX0_DATA1": "C10", /*GPIO159*/
"ECAT_TX0_DATA2": "B10", /*GPIO160*/
"ECAT_TX0_DATA3": "E9", /*GPIO161*/
"ECAT_TX1_ENA": "L9", /*GPIO129*/
"ECAT_TX1_CLK": "T10", /*GPIO130*/
"ECAT_PHY0_LINKSTATUS": "C12", /*GPIO148*/
"ECAT_PHY1_LINKSTATUS": "B12", /*GPIO149*/
}
},
}
}

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@ -0,0 +1,52 @@
/*
* Copyright (c) 2018-2019 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* ======== standard_usb.json ========
*/
{
"type" : ["USB"],
"displayName": "USBDM/USBDP",
"description": "Standard locations for USB module",
"longDescription" : "Standard locations for USB module",
"signals" :
{
"USBDM": {
"type": ["USB#DM"]
},
"USBDP": {
"type": ["USB#DP"]
}
}
}

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@ -4,12 +4,12 @@ MEMORY
BOOT_RSVD : origin = 0x00000002, length = 0x00000126
RAMM0 : origin = 0x00000128, length = 0x000002D8
RAMM1 : origin = 0x00000400, length = 0x00000380 /* on-chip RAM block M1 */
//BOOT_RSVD_SYSBIOS: origin = 0x00000780, length = 0x00000080
RAMM1 : origin = 0x00000400, length = 0x000003F8
// RAMM1_RSVD : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMLS0 : origin = 0x00008000, length = 0x00002000
RAMLS1 : origin = 0x0000A000, length = 0x00001FF8
// RAMLS1_RSVD : origin = 0x0000BFF8, length = 0x00000008
// RAMLS1_RSVD : origin = 0x0000BFF8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RESET : origin = 0x003FFFC0, length = 0x00000002
@ -17,59 +17,34 @@ MEMORY
FLASH_BANK0_SEC_0_7 : origin = 0x080002, length = 0x1FFE /* on-chip Flash */
FLASH_BANK0_SEC_8_15 : origin = 0x082000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_16_23 : origin = 0x084000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_24 : origin = 0x086000, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_25 : origin = 0x086400, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_26 : origin = 0x086800, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_27 : origin = 0x086C00, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_28 : origin = 0x087000, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_29 : origin = 0x087400, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_30 : origin = 0x087800, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_31 : origin = 0x087C00, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_32 : origin = 0x088000, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_33 : origin = 0x088400, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_34 : origin = 0x088800, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_35 : origin = 0x088C00, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_36 : origin = 0x089000, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_37 : origin = 0x089400, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_38 : origin = 0x089800, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_39 : origin = 0x089C00, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_24_31 : origin = 0x086000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_32_39 : origin = 0x088000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_40_47 : origin = 0x08A000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_48_55 : origin = 0x08C000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_56_63 : origin = 0x08E000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_64_71 : origin = 0x090000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_72_79 : origin = 0x092000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_80_87 : origin = 0x094000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_88 : origin = 0x096000, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_89 : origin = 0x096400, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_90 : origin = 0x096800, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_91 : origin = 0x096C00, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_92 : origin = 0x097000, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_93 : origin = 0x097400, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_94 : origin = 0x097800, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_95 : origin = 0x097C00, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_96 : origin = 0x098000, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_97 : origin = 0x098400, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_98 : origin = 0x098800, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_99 : origin = 0x098C00, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_100 : origin = 0x099000, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_101 : origin = 0x099400, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_102 : origin = 0x099800, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_103 : origin = 0x099C00, length = 0x0400 /* on-chip Flash */
FLASH_BANK0_SEC_88_95 : origin = 0x096000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_96_103 : origin = 0x098000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_104_111 : origin = 0x09A000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_112_119 : origin = 0x09C000, length = 0x2000 /* on-chip Flash */
FLASH_BANK0_SEC_120_127 : origin = 0x09E000, length = 0x1FF0 /* on-chip Flash */
// FLASH_BANK0_SEC_127_RSVD : origin = 0x0A0FF0, length = 0x0010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
// FLASH_BANK0_SEC_127_RSVD : origin = 0x0A0FF0, length = 0x0010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
}
SECTIONS
{
codestart : > BEGIN, ALIGN(8)
codestart : > BEGIN
.text : >> FLASH_BANK0_SEC_8_15, ALIGN(8)
.text : >> FLASH_BANK0_SEC_8_15 | FLASH_BANK0_SEC_16_23 | FLASH_BANK0_SEC_24_31, ALIGN(8)
.cinit : > FLASH_BANK0_SEC_24, ALIGN(8)
.switch : > FLASH_BANK0_SEC_25, ALIGN(8)
.cinit : > FLASH_BANK0_SEC_40_47, ALIGN(8)
.switch : > FLASH_BANK0_SEC_40_47, ALIGN(8)
.reset : > RESET, TYPE = DSECT /* not used, */
@ -78,26 +53,26 @@ SECTIONS
#if defined(__TI_EABI__)
.bss : > RAMLS0
.bss:output : > RAMLS0
.init_array : >> FLASH_BANK0_SEC_28, ALIGN(8)
.const : >> FLASH_BANK0_SEC_88, ALIGN(8)
.init_array : >> FLASH_BANK0_SEC_40_47, ALIGN(8)
.const : >> FLASH_BANK0_SEC_32_39, ALIGN(8)
.data : > RAMLS0
.sysmem : > RAMLS0
.bss:cio : > RAMLS0
#else
.pinit : >> FLASH_BANK0_SEC_28, ALIGN(8)
.pinit : >> FLASH_BANK0_SEC_40_47, ALIGN(8)
.ebss : > RAMLS0
.econst : >> FLASH_BANK0_SEC_88, ALIGN(8)
.econst : >> FLASH_BANK0_SEC_32_39, ALIGN(8)
.esysmem : > RAMLS0
.cio : > RAMLS0
#endif
#if defined(__TI_EABI__)
GROUP
GROUP
{
.TI.ramfunc
{ -l FAPI_F280013x_EABI_v2.00.01.lib}
{ -l FAPI_F280013x_EABI_v2.00.10.lib}
} LOAD = FLASH_BANK0_SEC_16_23,
} LOAD = FLASH_BANK0_SEC_40_47,
RUN = RAMLS0,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
@ -107,12 +82,12 @@ SECTIONS
RUN_END(RamfuncsRunEnd),
ALIGN(8)
#else
GROUP
GROUP
{
.TI.ramfunc
{ -l FAPI_F280013x_EABI_v2.00.01.lib}
{ -l FAPI_F280013x_EABI_v2.00.10.lib}
} LOAD = FLASH_BANK0_SEC_16_23,
} LOAD = FLASH_BANK0_SEC_40_47,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
@ -124,8 +99,8 @@ SECTIONS
#endif
/* Allocate IQ math areas: */
IQmath : > RAMLS1
IQmathTables : > RAMLS1
IQmath : > FLASH_BANK0_SEC_32_39, ALIGN(8)
IQmathTables : > FLASH_BANK0_SEC_32_39, ALIGN(8)
DataBufferSection : > RAMLS1, ALIGN(2)
}

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@ -93,7 +93,9 @@ interrupt void EPWM6_ISR(void);
interrupt void EPWM7_ISR(void);
interrupt void ECAP1_ISR(void);
interrupt void ECAP2_ISR(void);
interrupt void ECAP3_ISR(void);
interrupt void EQEP1_ISR(void);
interrupt void EQEP2_ISR(void);
interrupt void SPIA_RX_ISR(void);
interrupt void SPIA_TX_ISR(void);
interrupt void DCC0_ISR(void);

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@ -47,4 +47,3 @@
#include "f280013x_examples.h" // f280013x Examples Include File
#endif // end of F28X_PROJECT_H definition

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@ -896,6 +896,29 @@ interrupt void ECAP2_ISR(void)
for(;;);
}
//
// 4.3 - eCAP3 Interrupt
//
interrupt void ECAP3_ISR(void)
{
//
// Insert ISR Code here
//
//
// To receive more interrupts from this PIE group,
// acknowledge this interrupt.
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
//
//
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
//
asm (" ESTOP0");
for(;;);
}
//
// 5.1 - eQEP1 Interrupt
//
@ -919,6 +942,29 @@ interrupt void EQEP1_ISR(void)
for(;;);
}
//
// 5.2 - eQEP2 Interrupt
//
interrupt void EQEP2_ISR(void)
{
//
// Insert ISR Code here
//
//
// To receive more interrupts from this PIE group,
// acknowledge this interrupt.
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
//
//
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
//
asm (" ESTOP0");
for(;;);
}
//
// 6.1 - SPIA Receive Interrupt
//

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@ -106,14 +106,14 @@ const struct PIE_VECT_TABLE PieVectTableInit = {
PIE_RESERVED_ISR, // 3.8 - Reserved
ECAP1_ISR, // 4.1 - eCAP1 Interrupt
ECAP2_ISR, // 4.2 - eCAP2 Interrupt
PIE_RESERVED_ISR, // 4.3 - Reserved
ECAP3_ISR, // 4.3 - eCAP3 Interrupt
PIE_RESERVED_ISR, // 4.4 - Reserved
PIE_RESERVED_ISR, // 3.5 - Reserved
PIE_RESERVED_ISR, // 3.6 - Reserved
PIE_RESERVED_ISR, // 3.7 - Reserved
PIE_RESERVED_ISR, // 3.8 - Reserved
EQEP1_ISR, // 5.1 - eQEP1 Interrupt
PIE_RESERVED_ISR, // 5.2 - Reserved
EQEP2_ISR, // 5.2 - eQEP2 Interrupt
PIE_RESERVED_ISR, // 5.3 - Reserved
PIE_RESERVED_ISR, // 5.4 - Reserved
PIE_RESERVED_ISR, // 5.5 - Reserved

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@ -1,6 +1,6 @@
var DOCUMENTATION_OPTIONS = {
URL_ROOT: document.getElementById("documentation_options").getAttribute('data-url_root'),
VERSION: 'v5.00.00.00',
VERSION: 'v5.01.00.00',
LANGUAGE: 'None',
COLLAPSE_INDEX: false,
BUILDER: 'html',

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@ -77,7 +77,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -853,8 +853,6 @@
</li>
<li><a href="modules/can.html#c.CAN_STATUS_LEC_NONE">CAN_STATUS_LEC_NONE (C macro)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/can.html#c.CAN_STATUS_LEC_STUFF">CAN_STATUS_LEC_STUFF (C macro)</a>
</li>
<li><a href="modules/can.html#c.CAN_STATUS_PERR">CAN_STATUS_PERR (C macro)</a>
@ -863,6 +861,8 @@
</li>
<li><a href="modules/can.html#c.CAN_STATUS_TXOK">CAN_STATUS_TXOK (C macro)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/can.html#_CPPv419CAN_transferMessage8uint32_t8uint16_t8uint32_tb">CAN_transferMessage (C++ function)</a>
</li>
<li><a href="modules/can.html#_CPPv416CAN_writeDataRegPCK8uint16_t8uint32_t8uint32_t">CAN_writeDataReg (C++ function)</a>
@ -894,6 +894,8 @@
<li><a href="modules/cmpss.html#_CPPv422CMPSS_configOutputsLow8uint32_t8uint16_t">CMPSS_configOutputsLow (C++ function)</a>
</li>
<li><a href="modules/cmpss.html#_CPPv416CMPSS_configRamp8uint32_t8uint16_t8uint16_t8uint16_t8uint16_tb">CMPSS_configRamp (C++ function)</a>
</li>
<li><a href="modules/cmpss.html#_CPPv429CMPSS_configureSyncSourceHigh8uint32_t8uint16_t">CMPSS_configureSyncSourceHigh (C++ function)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_DACSRC_RAMP">CMPSS_DACSRC_RAMP (C macro)</a>
</li>
@ -946,6 +948,20 @@
<li><a href="modules/cmpss.html#c.CMPSS_LOCMP_CTL_M">CMPSS_LOCMP_CTL_M (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_OR_ASYNC_OUT_W_FILT">CMPSS_OR_ASYNC_OUT_W_FILT (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC1">CMPSS_PWMSYNC1 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC2">CMPSS_PWMSYNC2 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC3">CMPSS_PWMSYNC3 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC4">CMPSS_PWMSYNC4 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC5">CMPSS_PWMSYNC5 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC6">CMPSS_PWMSYNC6 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC7">CMPSS_PWMSYNC7 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#_CPPv421CMPSS_setDACValueHigh8uint32_t8uint16_t">CMPSS_setDACValueHigh (C++ function)</a>
</li>
@ -1896,6 +1912,8 @@
<li><a href="modules/epwm.html#_CPPv424EPWM_clearADCTriggerFlag8uint32_t29EPWM_ADCStartOfConversionType">EPWM_clearADCTriggerFlag (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv434EPWM_clearCycleByCycleTripZoneFlag8uint32_t8uint16_t">EPWM_clearCycleByCycleTripZoneFlag (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv441EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t">EPWM_clearDigitalCompareCaptureStatusFlag (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv435EPWM_clearEventTriggerInterruptFlag8uint32_t">EPWM_clearEventTriggerInterruptFlag (C++ function)</a>
</li>
@ -1924,6 +1942,8 @@
<li><a href="modules/epwm.html#_CPPv4N17EPWM_ClockDivider21EPWM_CLOCK_DIVIDER_64E">EPWM_ClockDivider::EPWM_CLOCK_DIVIDER_64 (C++ enumerator)</a>
</li>
<li><a href="modules/epwm.html#_CPPv4N17EPWM_ClockDivider20EPWM_CLOCK_DIVIDER_8E">EPWM_ClockDivider::EPWM_CLOCK_DIVIDER_8 (C++ enumerator)</a>
</li>
<li><a href="modules/epwm.html#_CPPv446EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb">EPWM_configureDigitalCompareCounterCaptureMode (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv420EPWM_configureSignal8uint32_tPK17EPWM_SignalParams">EPWM_configureSignal (C++ function)</a>
</li>
@ -2316,11 +2336,11 @@
<li><a href="modules/epwm.html#_CPPv427EPWM_getCounterCompareValue8uint32_t25EPWM_CounterCompareModule">EPWM_getCounterCompareValue (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv438EPWM_getCycleByCycleTripZoneFlagStatus8uint32_t">EPWM_getCycleByCycleTripZoneFlagStatus (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv447EPWM_getDigitalCompareBlankingWindowLengthCount8uint32_t">EPWM_getDigitalCompareBlankingWindowLengthCount (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/epwm.html#_CPPv447EPWM_getDigitalCompareBlankingWindowLengthCount8uint32_t">EPWM_getDigitalCompareBlankingWindowLengthCount (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv447EPWM_getDigitalCompareBlankingWindowOffsetCount8uint32_t">EPWM_getDigitalCompareBlankingWindowOffsetCount (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv434EPWM_getDigitalCompareCaptureCount8uint32_t">EPWM_getDigitalCompareCaptureCount (C++ function)</a>
@ -3257,10 +3277,10 @@
</li>
<li><a href="modules/flash.html#_CPPv416Flash_initModule8uint32_t8uint32_t8uint16_t">Flash_initModule (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/flash.html#c.FLASH_O_TRIMCOMMIT">FLASH_O_TRIMCOMMIT (C macro)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/flash.html#c.FLASH_O_TRIMCTL">FLASH_O_TRIMCTL (C macro)</a>
</li>
<li><a href="modules/flash.html#c.FLASH_O_TRIMLOCK">FLASH_O_TRIMLOCK (C macro)</a>
@ -3282,6 +3302,10 @@
<li><a href="modules/flash.html#c.FLASH_TRIMLOCK_TRIMLOCKREAD_TRIMLOCKOTHER_M">FLASH_TRIMLOCK_TRIMLOCKREAD_TRIMLOCKOTHER_M (C macro)</a>
</li>
<li><a href="modules/flash.html#c.FLASH_TRIMLOCK_TRIMLOCKREAD_TRIMLOCKOTHER_S">FLASH_TRIMLOCK_TRIMLOCKREAD_TRIMLOCKOTHER_S (C macro)</a>
</li>
<li><a href="modules/flash.html#_CPPv416Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t">Flash_writeTrims (C++ function)</a>
</li>
<li><a href="modules/flash.html#c.FLASHCONFIG_BASE">FLASHCONFIG_BASE (C macro)</a>
</li>
<li><a href="modules/dcsm.html#c.FLSEM_KEY">FLSEM_KEY (C macro)</a>
</li>
@ -4077,10 +4101,10 @@
</li>
<li><a href="modules/i2c.html#_CPPv421I2C_sendStopCondition8uint32_t">I2C_sendStopCondition (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/i2c.html#_CPPv418I2C_setAddressMode8uint32_t15I2C_AddressMode">I2C_setAddressMode (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/i2c.html#_CPPv415I2C_setBitCount8uint32_t12I2C_BitCount">I2C_setBitCount (C++ function)</a>
</li>
<li><a href="modules/i2c.html#_CPPv413I2C_setConfig8uint32_t8uint16_t">I2C_setConfig (C++ function)</a>
@ -4254,6 +4278,8 @@
<li><a href="modules/interrupt.html#_CPPv420Interrupt_initModulev">Interrupt_initModule (C++ function)</a>
</li>
<li><a href="modules/interrupt.html#_CPPv425Interrupt_initVectorTablev">Interrupt_initVectorTable (C++ function)</a>
</li>
<li><a href="modules/interrupt.html#_CPPv420Interrupt_nmiHandlerv">Interrupt_nmiHandler (C++ function)</a>
</li>
<li><a href="modules/interrupt.html#_CPPv418Interrupt_register8uint32_tPFvvE">Interrupt_register (C++ function)</a>
</li>
@ -4415,6 +4441,238 @@
<h2 id="S">S</h2>
<table style="width: 100%" class="indextable genindextable"><tr>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/sci.html#_CPPv424SCI_clearInterruptStatus8uint32_t8uint32_t">SCI_clearInterruptStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv423SCI_clearOverflowStatus8uint32_t">SCI_clearOverflowStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_PAR_MASK">SCI_CONFIG_PAR_MASK (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_STOP_MASK">SCI_CONFIG_STOP_MASK (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_STOP_ONE">SCI_CONFIG_STOP_ONE (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_STOP_TWO">SCI_CONFIG_STOP_TWO (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_1">SCI_CONFIG_WLEN_1 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_2">SCI_CONFIG_WLEN_2 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_3">SCI_CONFIG_WLEN_3 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_4">SCI_CONFIG_WLEN_4 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_5">SCI_CONFIG_WLEN_5 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_6">SCI_CONFIG_WLEN_6 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_7">SCI_CONFIG_WLEN_7 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_8">SCI_CONFIG_WLEN_8 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_MASK">SCI_CONFIG_WLEN_MASK (C macro)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_disableFIFO8uint32_t">SCI_disableFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv420SCI_disableInterrupt8uint32_t8uint32_t">SCI_disableInterrupt (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_disableLoopback8uint32_t">SCI_disableLoopback (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_disableModule8uint32_t">SCI_disableModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_disableRxModule8uint32_t">SCI_disableRxModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv420SCI_disableSleepMode8uint32_t">SCI_disableSleepMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_disableTxModule8uint32_t">SCI_disableTxModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv414SCI_enableFIFO8uint32_t">SCI_enableFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_enableInterrupt8uint32_t8uint32_t">SCI_enableInterrupt (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv418SCI_enableLoopback8uint32_t">SCI_enableLoopback (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv416SCI_enableModule8uint32_t">SCI_enableModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv418SCI_enableRxModule8uint32_t">SCI_enableRxModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_enableSleepMode8uint32_t">SCI_enableSleepMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv418SCI_enableTxModule8uint32_t">SCI_enableTxModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv413SCI_getConfig8uint32_t8uint32_tP8uint32_tP8uint32_t">SCI_getConfig (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv425SCI_getFIFOInterruptLevel8uint32_tP15SCI_TxFIFOLevelP15SCI_RxFIFOLevel">SCI_getFIFOInterruptLevel (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv422SCI_getInterruptStatus8uint32_t">SCI_getInterruptStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv421SCI_getOverflowStatus8uint32_t">SCI_getOverflowStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_getParityMode8uint32_t">SCI_getParityMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_getRxFIFOStatus8uint32_t">SCI_getRxFIFOStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_getRxStatus8uint32_t">SCI_getRxStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_getTxFIFOStatus8uint32_t">SCI_getTxFIFOStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_FE">SCI_INT_FE (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_OE">SCI_INT_OE (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_PE">SCI_INT_PE (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_RXERR">SCI_INT_RXERR (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_RXFF">SCI_INT_RXFF (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_RXRDY_BRKDT">SCI_INT_RXRDY_BRKDT (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_TXFF">SCI_INT_TXFF (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_TXRDY">SCI_INT_TXRDY (C macro)</a>
</li>
<li><a href="modules/sci.html#_CPPv426SCI_isDataAvailableNonFIFO8uint32_t">SCI_isDataAvailableNonFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_isFIFOEnabled8uint32_t">SCI_isFIFOEnabled (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv427SCI_isSpaceAvailableNonFIFO8uint32_t">SCI_isSpaceAvailableNonFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv421SCI_isTransmitterBusy8uint32_t">SCI_isTransmitterBusy (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv416SCI_lockAutobaud8uint32_t">SCI_lockAutobaud (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv414SCI_ParityType">SCI_ParityType (C++ enum)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N14SCI_ParityType19SCI_CONFIG_PAR_EVENE">SCI_ParityType::SCI_CONFIG_PAR_EVEN (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N14SCI_ParityType19SCI_CONFIG_PAR_NONEE">SCI_ParityType::SCI_CONFIG_PAR_NONE (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N14SCI_ParityType18SCI_CONFIG_PAR_ODDE">SCI_ParityType::SCI_CONFIG_PAR_ODD (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv424SCI_performSoftwareReset8uint32_t">SCI_performSoftwareReset (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_readCharArray8uint32_tPC8uint16_t8uint16_t">SCI_readCharArray (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv424SCI_readCharBlockingFIFO8uint32_t">SCI_readCharBlockingFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv427SCI_readCharBlockingNonFIFO8uint32_t">SCI_readCharBlockingNonFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv423SCI_readCharNonBlocking8uint32_t">SCI_readCharNonBlocking (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_resetChannels8uint32_t">SCI_resetChannels (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_resetRxFIFO8uint32_t">SCI_resetRxFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_resetTxFIFO8uint32_t">SCI_resetTxFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_RxFIFOLevel">SCI_RxFIFOLevel (C++ enum)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX0E">SCI_RxFIFOLevel::SCI_FIFO_RX0 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX1E">SCI_RxFIFOLevel::SCI_FIFO_RX1 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX10E">SCI_RxFIFOLevel::SCI_FIFO_RX10 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX11E">SCI_RxFIFOLevel::SCI_FIFO_RX11 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX12E">SCI_RxFIFOLevel::SCI_FIFO_RX12 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX13E">SCI_RxFIFOLevel::SCI_FIFO_RX13 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX14E">SCI_RxFIFOLevel::SCI_FIFO_RX14 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX15E">SCI_RxFIFOLevel::SCI_FIFO_RX15 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX16E">SCI_RxFIFOLevel::SCI_FIFO_RX16 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX2E">SCI_RxFIFOLevel::SCI_FIFO_RX2 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX3E">SCI_RxFIFOLevel::SCI_FIFO_RX3 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX4E">SCI_RxFIFOLevel::SCI_FIFO_RX4 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX5E">SCI_RxFIFOLevel::SCI_FIFO_RX5 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX6E">SCI_RxFIFOLevel::SCI_FIFO_RX6 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX7E">SCI_RxFIFOLevel::SCI_FIFO_RX7 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX8E">SCI_RxFIFOLevel::SCI_FIFO_RX8 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX9E">SCI_RxFIFOLevel::SCI_FIFO_RX9 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_BREAK">SCI_RXSTATUS_BREAK (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_ERROR">SCI_RXSTATUS_ERROR (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_FRAMING">SCI_RXSTATUS_FRAMING (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_OVERRUN">SCI_RXSTATUS_OVERRUN (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_PARITY">SCI_RXSTATUS_PARITY (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_READY">SCI_RXSTATUS_READY (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_WAKE">SCI_RXSTATUS_WAKE (C macro)</a>
</li>
<li><a href="modules/sci.html#_CPPv429SCI_setAddrMultiProcessorMode8uint32_t">SCI_setAddrMultiProcessorMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv411SCI_setBaud8uint32_t8uint32_t8uint32_t">SCI_setBaud (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv413SCI_setConfig8uint32_t8uint32_t8uint32_t8uint32_t">SCI_setConfig (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv425SCI_setFIFOInterruptLevel8uint32_t15SCI_TxFIFOLevel15SCI_RxFIFOLevel">SCI_setFIFOInterruptLevel (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv429SCI_setIdleMultiProcessorMode8uint32_t">SCI_setIdleMultiProcessorMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_setParityMode8uint32_t14SCI_ParityType">SCI_setParityMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_setWakeFlag8uint32_t">SCI_setWakeFlag (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_TxFIFOLevel">SCI_TxFIFOLevel (C++ enum)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX0E">SCI_TxFIFOLevel::SCI_FIFO_TX0 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX1E">SCI_TxFIFOLevel::SCI_FIFO_TX1 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX10E">SCI_TxFIFOLevel::SCI_FIFO_TX10 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX11E">SCI_TxFIFOLevel::SCI_FIFO_TX11 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX12E">SCI_TxFIFOLevel::SCI_FIFO_TX12 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX13E">SCI_TxFIFOLevel::SCI_FIFO_TX13 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX14E">SCI_TxFIFOLevel::SCI_FIFO_TX14 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX15E">SCI_TxFIFOLevel::SCI_FIFO_TX15 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX16E">SCI_TxFIFOLevel::SCI_FIFO_TX16 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX2E">SCI_TxFIFOLevel::SCI_FIFO_TX2 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX3E">SCI_TxFIFOLevel::SCI_FIFO_TX3 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX4E">SCI_TxFIFOLevel::SCI_FIFO_TX4 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX5E">SCI_TxFIFOLevel::SCI_FIFO_TX5 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX6E">SCI_TxFIFOLevel::SCI_FIFO_TX6 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX7E">SCI_TxFIFOLevel::SCI_FIFO_TX7 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX8E">SCI_TxFIFOLevel::SCI_FIFO_TX8 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX9E">SCI_TxFIFOLevel::SCI_FIFO_TX9 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv418SCI_writeCharArray8uint32_tPCK8uint16_t8uint16_t">SCI_writeCharArray (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv425SCI_writeCharBlockingFIFO8uint32_t8uint16_t">SCI_writeCharBlockingFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv428SCI_writeCharBlockingNonFIFO8uint32_t8uint16_t">SCI_writeCharBlockingNonFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv424SCI_writeCharNonBlocking8uint32_t8uint16_t">SCI_writeCharNonBlocking (C++ function)</a>
</li>
<li><a href="modules/spi.html#_CPPv424SPI_clearInterruptStatus8uint32_t8uint32_t">SPI_clearInterruptStatus (C++ function)</a>
</li>
<li><a href="modules/spi.html#_CPPv415SPI_disableFIFO8uint32_t">SPI_disableFIFO (C++ function)</a>
@ -4781,6 +5039,8 @@
</li>
<li><a href="modules/sysctl.html#_CPPv4N16SysCtl_CpuRegSel22SYSCTL_REG_SEL_PCLKCR3E">SysCtl_CpuRegSel::SYSCTL_REG_SEL_PCLKCR3 (C++ enumerator)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/sysctl.html#_CPPv4N16SysCtl_CpuRegSel22SYSCTL_REG_SEL_PCLKCR4E">SysCtl_CpuRegSel::SYSCTL_REG_SEL_PCLKCR4 (C++ enumerator)</a>
</li>
<li><a href="modules/sysctl.html#_CPPv4N16SysCtl_CpuRegSel22SYSCTL_REG_SEL_PCLKCR6E">SysCtl_CpuRegSel::SYSCTL_REG_SEL_PCLKCR6 (C++ enumerator)</a>
@ -4897,8 +5157,6 @@
</li>
<li><a href="modules/sysctl.html#_CPPv427SysCtl_enableWatchdogInHaltv">SysCtl_enableWatchdogInHalt (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/sysctl.html#_CPPv426SysCtl_enableWatchdogResetv">SysCtl_enableWatchdogReset (C++ function)</a>
</li>
<li><a href="modules/sysctl.html#_CPPv434SysCtl_enableWatchdogStandbyWakeupv">SysCtl_enableWatchdogStandbyWakeup (C++ function)</a>
@ -5876,7 +6134,7 @@
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -5896,7 +6154,7 @@
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@ -77,7 +77,7 @@
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@ -197,7 +197,7 @@
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
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@ -217,7 +217,7 @@
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@ -78,7 +78,7 @@
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@ -199,7 +199,7 @@ library source code.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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</span></p>
</div>
@ -219,7 +219,7 @@ library source code.</p>
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@ -78,7 +78,7 @@
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@ -276,7 +276,7 @@ into depth on programming the peripherals.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
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</div>
@ -296,7 +296,7 @@ into depth on programming the peripherals.</p>
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@ -79,7 +79,7 @@
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</div>
@ -2125,7 +2125,7 @@ ADC_PPB1TRIPHI_HSIGN)<a class="headerlink" href="#c.ADC_PPBTRIP_MASK" title="Per
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -2145,7 +2145,7 @@ ADC_PPB1TRIPHI_HSIGN)<a class="headerlink" href="#c.ADC_PPBTRIP_MASK" title="Per
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@ -79,7 +79,7 @@
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@ -796,7 +796,7 @@ additional functionality if available for that device.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -816,7 +816,7 @@ additional functionality if available for that device.</p>
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@ -79,7 +79,7 @@
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</div>
@ -1274,13 +1274,13 @@ objects, send and read messages, and setup and handle interrupts and events.</p>
<p>The <em>flags</em> parameter can be set as <strong>CAN_MSG_OBJ_NO_FLAGS</strong> if no flags are required or the parameter can be a logical OR of any of the following values:<ul class="simple">
<li><p><strong>CAN_MSG_OBJ_TX_INT_ENABLE</strong> - Enable Transmit Interrupts</p></li>
<li><p><strong>CAN_MSG_OBJ_RX_INT_ENABLE</strong> - Enable Receive Interrupts</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_ID_FILTER</strong> - Use filtering based on the Message ID</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_EXT_FILTER</strong> - Use filtering based on the Extended Message ID</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_ID_FILTER</strong> - Use filtering based on the Message ID (Standard or Extended)</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_EXT_FILTER</strong> - Use Extended Identifier Bit for filtering (Only among Extended IDs will be accepted)</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_DIR_FILTER</strong> - Use filtering based on the direction of the transfer</p></li>
<li><p><strong>CAN_MSG_OBJ_FIFO</strong> - Message object is part of a FIFO structure and isnt the final message object in FIFO</p></li>
</ul>
</p>
<p>If filtering is based on message identifier, the value <strong>CAN_MSG_OBJ_USE_ID_FILTER</strong> has to be logically ORed with the <em>flag</em> parameter and <strong>CAN_MSG_OBJ_USE_EXT_FILTER</strong> also has to be ORed for message identifier filtering to be based on the extended identifier.</p>
<p>If filtering is based on message identifier (for Standard or Extended IDs) specified by the <em>msgIDMask</em> parameter, the value <strong>CAN_MSG_OBJ_USE_ID_FILTER</strong> has to be logically ORed with the <em>flag</em> parameter. If <strong>CAN_MSG_OBJ_USE_EXT_FILTER</strong> is ORed with the <em>flag</em> parameter, only extended identifier frames are accepted which can further be masked by using the flag above.</p>
<p><dl class="simple">
<dt><strong>Note</strong></dt><dd><p>The <strong>msgLen</strong><p> Parameter for the Receive Message Object is a “dont</p>
<p> care” but its value should be between 0-8 due to the assert.</p>
@ -1582,7 +1582,7 @@ can be re-enabled using CAN_enableController().</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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</span></p>
</div>
@ -1602,7 +1602,7 @@ can be re-enabled using CAN_enableController().</p>
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@ -76,7 +76,7 @@
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@ -219,7 +219,7 @@ an interrupt to the main CPU once it completes execution.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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@ -239,7 +239,7 @@ an interrupt to the main CPU once it completes execution.</p>
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@ -79,7 +79,7 @@
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@ -311,6 +311,48 @@ CMPSS_COMPCTL_ASYNCLEN)<a class="headerlink" href="#c.CMPSS_LOCMP_CTL_M" title="
<dd><p>DAC value is updated from the ramp register. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC1">
<span class="target" id="group__cmpss__api_1gab142adfd8e7960440469e7cf35a7acf2"></span><code class="sig-name descname">CMPSS_PWMSYNC1</code> 1U<a class="headerlink" href="#c.CMPSS_PWMSYNC1" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC1. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC2">
<span class="target" id="group__cmpss__api_1ga37dcf1159079f7646d06d0c8a3d6c700"></span><code class="sig-name descname">CMPSS_PWMSYNC2</code> 2U<a class="headerlink" href="#c.CMPSS_PWMSYNC2" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC2. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC3">
<span class="target" id="group__cmpss__api_1ga0f1252cb3e8a2e436b26c2948f3bbf27"></span><code class="sig-name descname">CMPSS_PWMSYNC3</code> 3U<a class="headerlink" href="#c.CMPSS_PWMSYNC3" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC3. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC4">
<span class="target" id="group__cmpss__api_1gaff7c5710b134e556086650f622b4429a"></span><code class="sig-name descname">CMPSS_PWMSYNC4</code> 4U<a class="headerlink" href="#c.CMPSS_PWMSYNC4" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC4. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC5">
<span class="target" id="group__cmpss__api_1gaa677cc8b4ed0fa6f032c95999f4c067e"></span><code class="sig-name descname">CMPSS_PWMSYNC5</code> 5U<a class="headerlink" href="#c.CMPSS_PWMSYNC5" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC5. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC6">
<span class="target" id="group__cmpss__api_1ga30395a94be81813cd5bb0061faebccdc"></span><code class="sig-name descname">CMPSS_PWMSYNC6</code> 6U<a class="headerlink" href="#c.CMPSS_PWMSYNC6" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC6. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC7">
<span class="target" id="group__cmpss__api_1gae6202ecbf9ec5cca3c865a9f40727e0e"></span><code class="sig-name descname">CMPSS_PWMSYNC7</code> 7U<a class="headerlink" href="#c.CMPSS_PWMSYNC7" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC7. </p>
</dd></dl>
</div>
<div class="breathe-sectiondef docutils container">
<p class="breathe-sectiondef-title rubric">Functions</p>
@ -806,6 +848,27 @@ CMPSS_COMPCTL_ASYNCLEN)<a class="headerlink" href="#c.CMPSS_LOCMP_CTL_M" title="
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv429CMPSS_configureSyncSourceHigh8uint32_t8uint16_t">
<span id="_CPPv329CMPSS_configureSyncSourceHigh8uint32_t8uint16_t"></span><span id="_CPPv229CMPSS_configureSyncSourceHigh8uint32_t8uint16_t"></span><span id="CMPSS_configureSyncSourceHigh__uint32_t.uint16_t"></span><span class="target" id="group__cmpss__api_1gafef09bb0fdce9d18ffeb9fd5778312bb"></span>void <code class="sig-name descname">CMPSS_configureSyncSourceHigh</code><span class="sig-paren">(</span>uint32_t <em>base</em>, uint16_t <em>syncSource</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv429CMPSS_configureSyncSourceHigh8uint32_t8uint16_t" title="Permalink to this definition"></a><br /></dt>
<dd><p>Configures sync source for high comparator</p>
<p><p>This function configures desired EPWMxSYNCPER source for high comparator blocks. Configured EPWMxSYNCPER signal can be used to synchronize loading of DAC input value from shadow to active register. It can also be used to synchronize Ramp generator, if applicable. Refer to device manual to check if Ramp generator is available in the desired CMPSS instance.</p>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
<li><p><code class="docutils literal notranslate"><span class="pre">base</span></code>: is the base address of the comparator module. </p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">syncSource</span></code>: is the desired EPWMxSYNCPER source</p></li>
</ul>
</dd>
</dl>
</p>
<p>Valid values for <em>syncSource</em> parameter can be 1 to n, where n represents the maximum number of EPWMSYNCPER signals available on the device. For instance, passing 2 into <em>syncSource</em> will select EPWM2SYNCPER.</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
</dl>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv419CMPSS_setHysteresis8uint32_t8uint16_t">
<span id="_CPPv319CMPSS_setHysteresis8uint32_t8uint16_t"></span><span id="_CPPv219CMPSS_setHysteresis8uint32_t8uint16_t"></span><span id="CMPSS_setHysteresis__uint32_t.uint16_t"></span><span class="target" id="group__cmpss__api_1gacc2df7773ce6970a508b3806f0ca8233"></span>void <code class="sig-name descname">CMPSS_setHysteresis</code><span class="sig-paren">(</span>uint32_t <em>base</em>, uint16_t <em>value</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv419CMPSS_setHysteresis8uint32_t8uint16_t" title="Permalink to this definition"></a><br /></dt>
@ -1068,7 +1131,7 @@ CMPSS_COMPCTL_ASYNCLEN)<a class="headerlink" href="#c.CMPSS_LOCMP_CTL_M" title="
</dl>
</p>
<p>These three values may be be set individually using the <a class="reference internal" href="#group__cmpss__api_1gacad3678f6149a910485cf7736dabe6a2"><span class="std std-ref">CMPSS_setMaxRampValue()</span></a>, <a class="reference internal" href="#group__cmpss__api_1ga2f08de2e02a45651b44f00cd06ec2211"><span class="std std-ref">CMPSS_setRampDecValue()</span></a>, and <a class="reference internal" href="#group__cmpss__api_1gaf7b73018ce1dbf30ef231e3478399e73"><span class="std std-ref">CMPSS_setRampDelayValue()</span></a> APIs.</p>
<p>The number of the PWMSYNC signal to be used to reset the ramp generator should be specified by passing it into the <em>pwmSyncSrc</em> parameter. For instance, passing a 2 into <em>pwmSyncSrc</em> will select PWMSYNC2.</p>
<p>The number of the PWMSYNC signal to be used to reset the ramp generator should be specified by passing it into the <em>pwmSyncSrc</em> parameter. For instance, passing a CMPSS_PWMSYNCx into <em>pwmSyncSrc</em> will select PWMSYNCx.</p>
<p>To indicate whether the ramp generator should reset with the value from the ramp max reference value shadow register or with the latched ramp max reference value, use the <em>useRampValShdw</em> parameter. Passing it <strong>true</strong> will result in the latched value being bypassed. The ramp generator will be loaded right from the shadow register. A value of <strong>false</strong> will load the ramp generator from the latched value.</p>
<p><dl class="simple">
<dt><strong>Note</strong></dt><dd><p>This API is not valid for CMPSS-Lite IP.</p>
@ -1103,7 +1166,7 @@ showing what resources the comparators share and what they contain separately.</
<p>
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@ -1123,7 +1186,7 @@ showing what resources the comparators share and what they contain separately.</
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@ -79,7 +79,7 @@
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@ -558,7 +558,7 @@ overflow flag.</p>
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@ -578,7 +578,7 @@ overflow flag.</p>
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@ -79,7 +79,7 @@
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@ -859,7 +859,7 @@ enabling interrupt signals, and reading the various clock counters.</p>
<p>
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@ -879,7 +879,7 @@ enabling interrupt signals, and reading the various clock counters.</p>
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@ -76,7 +76,7 @@
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@ -1268,7 +1268,7 @@ release the Flash pump to operate on a specific zone.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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@ -1288,7 +1288,7 @@ release the Flash pump to operate on a specific zone.</p>
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@ -76,7 +76,7 @@
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@ -184,7 +184,7 @@ operation of the channel DMA_stopChannel() may be used.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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@ -204,7 +204,7 @@ operation of the channel DMA_stopChannel() may be used.</p>
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@ -79,7 +79,7 @@
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</div>
@ -1554,7 +1554,7 @@ The necessary APIs are also provided for PWM mode of operation.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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@ -1574,7 +1574,7 @@ The necessary APIs are also provided for PWM mode of operation.</p>
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@ -79,7 +79,7 @@
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@ -188,7 +188,7 @@ EPG driver provides functions for independent clock generation and clock divisio
<p>
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@ -208,7 +208,7 @@ EPG driver provides functions for independent clock generation and clock divisio
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@ -79,7 +79,7 @@
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</div>
@ -3124,7 +3124,7 @@ EPWM_SYNCOUTEN_DCBEVT1EN)<a class="headerlink" href="#c.EPWM_SYNC_OUT_SOURCE_M"
<dd><p>Enables sync-out pulse source.</p>
<p><p>This function enables the sync-out pulse source. Below valid values for param </p>
<strong>source</strong> can be ORd together to enable multiple sync-out sources:<ul class="simple">
<li><p>EPWM_SYNC_OUT_PULSE_ON_SOFTWARE - sync-out pulse is generated by software when <a class="reference internal" href="#group__epwm__api_1ga65711f2f1bc2e91afeba3308f8d72f92"><span class="std std-ref">EPWM_forceSyncPulse()</span></a> function is called or by EPWMxSYNCI signal.</p></li>
<li><p>EPWM_SYNC_OUT_PULSE_ON_SOFTWARE - sync-out pulse is generated by software when <a class="reference internal" href="#group__epwm__api_1ga65711f2f1bc2e91afeba3308f8d72f92"><span class="std std-ref">EPWM_forceSyncPulse()</span></a> function is called.</p></li>
<li><p>EPWM_SYNC_OUT_PULSE_ON_CNTR_ZERO - sync-out pulse is generated when time base counter equals zero.</p></li>
<li><p>EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_B - sync-out pulse is generated when time base counter equals compare B value.</p></li>
<li><p>EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_C - sync-out pulse is generated when time base counter equals compare C value.</p></li>
@ -6515,6 +6515,41 @@ EPWM_SYNCOUTEN_DCBEVT1EN)<a class="headerlink" href="#c.EPWM_SYNC_OUT_SOURCE_M"
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv441EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t">
<span id="_CPPv341EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t"></span><span id="_CPPv241EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t"></span><span id="EPWM_clearDigitalCompareCaptureStatusFlag__uint32_t"></span><span class="target" id="group__epwm__api_1ga2c3f4750596fa2f92912ee4ebc14c00e"></span>void <code class="sig-name descname">EPWM_clearDigitalCompareCaptureStatusFlag</code><span class="sig-paren">(</span>uint32_t <em>base</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv441EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t" title="Permalink to this definition"></a><br /></dt>
<dd><p>Clears DC capture latched status flag</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
<li><p><code class="docutils literal notranslate"><span class="pre">base</span></code>: is the base address of the EPWM module. This function is used to clear the CAPSTS (set) condition.</p></li>
</ul>
</dd>
</dl>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv446EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb">
<span id="_CPPv346EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb"></span><span id="_CPPv246EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb"></span><span id="EPWM_configureDigitalCompareCounterCaptureMode__uint32_t.b"></span><span class="target" id="group__epwm__api_1gafdda4b0ad8a6339c0d21c829770e85ed"></span>void <code class="sig-name descname">EPWM_configureDigitalCompareCounterCaptureMode</code><span class="sig-paren">(</span>uint32_t <em>base</em>, bool <em>disableClearMode</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv446EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb" title="Permalink to this definition"></a><br /></dt>
<dd><p>Configures DC capture operating mode</p>
<p><p>This function is used to configure the DC capture operating mode. If </p>
<em>disableClearMode</em> is false, the TBCNT value is captured in active register on occurance of DCEVTFILT event. The trip events are ignored until next PRD or ZRO event re-triggers the capture mechanism. If <em>disableClearMode</em> is true, the TBCNT value is captured, CAPSTS flag is set and further trips are ignored until CAPSTS bit is cleared.<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
<li><p><code class="docutils literal notranslate"><span class="pre">base</span></code>: is the base address of the EPWM module. </p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">disableClearMode</span></code>: is the clear mode bit.</p></li>
</ul>
</dd>
</dl>
</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
</dl>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv434EPWM_getDigitalCompareCaptureCount8uint32_t">
<span id="_CPPv334EPWM_getDigitalCompareCaptureCount8uint32_t"></span><span id="_CPPv234EPWM_getDigitalCompareCaptureCount8uint32_t"></span><span id="EPWM_getDigitalCompareCaptureCount__uint32_t"></span><span class="target" id="group__epwm__api_1gaa15bdeca5d53a319646f3f4c12c2fcfb"></span>uint16_t <code class="sig-name descname">EPWM_getDigitalCompareCaptureCount</code><span class="sig-paren">(</span>uint32_t <em>base</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv434EPWM_getDigitalCompareCaptureCount8uint32_t" title="Permalink to this definition"></a><br /></dt>
@ -7178,7 +7213,7 @@ EPWM_SYNCOUTEN_DCBEVT1EN)<a class="headerlink" href="#c.EPWM_SYNC_OUT_SOURCE_M"
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -7198,7 +7233,7 @@ EPWM_SYNCOUTEN_DCBEVT1EN)<a class="headerlink" href="#c.EPWM_SYNC_OUT_SOURCE_M"
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -963,6 +963,7 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> - Strobe event latch</p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> - Index event latch</p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out</p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> - QMA error</p></li>
</ul>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
@ -996,6 +997,7 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> - Strobe event latch</p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> - Index event latch</p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out</p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> - QMA error</p></li>
</ul>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
@ -1037,7 +1039,8 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_POS_COMP_MATCH</strong> - Position-compare match</p></li>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> - Strobe event latch</p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> - Index event latch</p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out </p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out</p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> - QMA error </p></li>
</ul>
</p>
</dd>
@ -1063,6 +1066,7 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> - Strobe event latch</p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> - Index event latch</p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out</p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> - QMA error</p></li>
</ul>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
@ -1097,6 +1101,7 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> </p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> </p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> </p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> </p></li>
</ul>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
@ -1879,7 +1884,7 @@ the module can generate.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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@ -1899,7 +1904,7 @@ the module can generate.</p>
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@ -79,7 +79,7 @@
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</div>
@ -174,11 +174,16 @@ Flash ECC test mode registers and the Flash ECC error status registers.</p>
<dd><div class="breathe-sectiondef docutils container">
<p class="breathe-sectiondef-title rubric">Defines</p>
<dl class="cpp macro">
<dt id="c.FLASH_O_TRIMCTL">
<span class="target" id="group__flash__api_1ga669ee40363b47a7aaaf886ca0bda7ff9"></span><code class="sig-name descname">FLASH_O_TRIMCTL</code> 0x1600U<a class="headerlink" href="#c.FLASH_O_TRIMCTL" title="Permalink to this definition"></a><br /></dt>
<dt id="c.FLASHCONFIG_BASE">
<span class="target" id="group__flash__api_1ga276efbf257505771d8cb5be4b391465b"></span><code class="sig-name descname">FLASHCONFIG_BASE</code> 0x00051000U<a class="headerlink" href="#c.FLASHCONFIG_BASE" title="Permalink to this definition"></a><br /></dt>
<dd><p>Flash Trim Defines. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.FLASH_O_TRIMCTL">
<span class="target" id="group__flash__api_1ga669ee40363b47a7aaaf886ca0bda7ff9"></span><code class="sig-name descname">FLASH_O_TRIMCTL</code> 0x1600U<a class="headerlink" href="#c.FLASH_O_TRIMCTL" title="Permalink to this definition"></a><br /></dt>
<dd></dd></dl>
<dl class="cpp macro">
<dt id="c.FLASH_O_TRIMLOCK">
<span class="target" id="group__flash__api_1gad0f5c305e1406602eefa53fa29d91597"></span><code class="sig-name descname">FLASH_O_TRIMLOCK</code> 0x1604U<a class="headerlink" href="#c.FLASH_O_TRIMLOCK" title="Permalink to this definition"></a><br /></dt>
@ -445,6 +450,17 @@ Flash ECC test mode registers and the Flash ECC error status registers.</p>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv416Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t">
<span id="_CPPv316Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t"></span><span id="_CPPv216Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t"></span><span id="Flash_writeTrims__uint32_t.uint32_t.uint32_t.uint32_t"></span><span class="target" id="group__flash__api_1ga91c808f852b3ffff3460f869647b9345"></span>void <code class="sig-name descname">Flash_writeTrims</code><span class="sig-paren">(</span>uint32_t <em>reg_offset</em>, uint32_t <em>mask</em>, uint32_t <em>shift</em>, uint32_t <em>value</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv416Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t" title="Permalink to this definition"></a><br /></dt>
<dd><p>Initializes the flash trim registers.</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
</dl>
</p>
</dd></dl>
</div>
</dd></dl>
@ -465,7 +481,7 @@ Flash ECC test mode registers and the Flash ECC error status registers.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -485,7 +501,7 @@ Flash ECC test mode registers and the Flash ECC error status registers.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1166,7 +1166,7 @@ GPIO_writePin(), and GPIO_togglePin().</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -1186,7 +1186,7 @@ GPIO_writePin(), and GPIO_togglePin().</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1907,7 +1907,7 @@ than would be attainable just using the main CPU clock.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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@ -1927,7 +1927,7 @@ than would be attainable just using the main CPU clock.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1629,7 +1629,7 @@ will read the data from the receive buffer and return it.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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@ -1649,7 +1649,7 @@ will read the data from the receive buffer and return it.</p>
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@ -78,7 +78,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -203,7 +203,7 @@
<p>
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<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -223,7 +223,7 @@
<script type="text/javascript">
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -370,6 +370,17 @@ wherever a function has an e interruptNumber parameter.</p>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv420Interrupt_nmiHandlerv">
<span id="_CPPv320Interrupt_nmiHandlerv"></span><span id="_CPPv220Interrupt_nmiHandlerv"></span><span id="Interrupt_nmiHandler__void"></span><span class="target" id="group__interrupt__api_1gaadc214138b9d50e3883b8683fc3e0a11"></span>void <code class="sig-name descname">Interrupt_nmiHandler</code><span class="sig-paren">(</span>void<span class="sig-paren">)</span><a class="headerlink" href="#_CPPv420Interrupt_nmiHandlerv" title="Permalink to this definition"></a><br /></dt>
<dd><p>The default non-maskable interrupt handler.</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
</dl>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv422Interrupt_enableGlobalv">
<span id="_CPPv322Interrupt_enableGlobalv"></span><span id="_CPPv222Interrupt_enableGlobalv"></span><span id="Interrupt_enableGlobal__void"></span><span class="target" id="group__interrupt__api_1ga4f67f455d71a7e2adfdbc2efe1dc044e"></span>bool <code class="sig-name descname">Interrupt_enableGlobal</code><span class="sig-paren">(</span>void<span class="sig-paren">)</span><a class="headerlink" href="#_CPPv422Interrupt_enableGlobalv" title="Permalink to this definition"></a><br /></dt>
@ -640,7 +651,7 @@ at the end of the ISR.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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</span></p>
</div>
@ -660,7 +671,7 @@ at the end of the ISR.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1103,7 +1103,7 @@ detailed description to be sure.</p>
<p>
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@ -1123,7 +1123,7 @@ detailed description to be sure.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1783,7 +1783,7 @@ wait in a while-loop for data to become available.</p>
<p>
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@ -1803,7 +1803,7 @@ wait in a while-loop for data to become available.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -2905,7 +2905,7 @@ about resets and missing clock detection failures.</p>
<span id="_CPPv320SysCtl_simulateReset8uint32_t"></span><span id="_CPPv220SysCtl_simulateReset8uint32_t"></span><span id="SysCtl_simulateReset__uint32_t"></span><span class="target" id="group__sysctl__api_1gaadfc83982fbd2d0ea9f6d426ca7f7f91"></span>void <code class="sig-name descname">SysCtl_simulateReset</code><span class="sig-paren">(</span>uint32_t <em>rstCauses</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv420SysCtl_simulateReset8uint32_t" title="Permalink to this definition"></a><br /></dt>
<dd><p>Simulates a reset to the CPU1</p>
<p><p>The </p>
<em>rstCauses</em> parameter can be one/ more of these values: SYSCTL_CAUSE_CPU1RSN or SYSCTL_CAUSE_XRS<dl class="simple">
<em>rstCauses</em> parameter can be one/ more of these values: SYSCTL_SIMRESET_CPU1RSN or SYSCTL_SIMRESET_XRSN<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
<li><p><code class="docutils literal notranslate"><span class="pre">rstCauses</span></code>: is the cause for the reset.</p></li>
</ul>
@ -3483,7 +3483,7 @@ others used for the configuration of SysCtl.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -3503,7 +3503,7 @@ others used for the configuration of SysCtl.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -172,7 +172,7 @@ number of the driverlib.lib that is in use.</p>
<p class="breathe-sectiondef-title rubric">Defines</p>
<dl class="cpp macro">
<dt id="c.VERSION_NUMBER">
<span class="target" id="group__version__api_1gaffb1ffbd24de6be88bd8ac877aae1688"></span><code class="sig-name descname">VERSION_NUMBER</code> 5000000U<a class="headerlink" href="#c.VERSION_NUMBER" title="Permalink to this definition"></a><br /></dt>
<span class="target" id="group__version__api_1gaffb1ffbd24de6be88bd8ac877aae1688"></span><code class="sig-name descname">VERSION_NUMBER</code> 5010000U<a class="headerlink" href="#c.VERSION_NUMBER" title="Permalink to this definition"></a><br /></dt>
<dd><p>Version number to be returned by <a class="reference internal" href="#group__version__api_1ga2cb8491755bc8131175570364076743f"><span class="std std-ref">Version_getLibVersion()</span></a> </p>
</dd></dl>
@ -211,7 +211,7 @@ number of the driverlib.lib that is in use.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -231,7 +231,7 @@ number of the driverlib.lib that is in use.</p>
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@ -78,7 +78,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1724,7 +1724,7 @@ each input.</p>
<p>
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@ -1744,7 +1744,7 @@ each input.</p>
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@ -76,7 +76,7 @@
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v5.00.00.00
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</div>
@ -157,7 +157,7 @@
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@ -177,7 +177,7 @@
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@ -78,7 +78,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -267,7 +267,7 @@ found in Build -&gt; C2000 Compiler -&gt; Optimization.</p>
<p>
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@ -287,7 +287,7 @@ found in Build -&gt; C2000 Compiler -&gt; Optimization.</p>
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@ -0,0 +1,37 @@
<projectSpec>
<project
name="hrpwm_ex1_duty_sfo_v8"
device="TMS320F2800137"
cgtVersion="22.6.0.LTS"
products="c2000ware_software_package"
outputFormat="ELF"
launchWizard="False"
linkerCommandFile=""
>
<configuration name="CPU1_RAM" compilerBuildOptions="--opt_level=off -I${C2000WARE_COMMON_INCLUDE} -I${C2000WARE_HEADERS_INCLUDE} -I${C2000WARE_SFO_INCLUDE} -v28 -ml -mt --float_support=fpu32 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x200 --heap_size=0x100 --define=RAM "/>
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_COMMON_INCLUDE} -I${C2000WARE_HEADERS_INCLUDE} -I${C2000WARE_SFO_INCLUDE} -v28 -ml -mt --float_support=fpu32 --gen_func_subsections=on --define=_FLASH --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x200 --heap_size=0x100 --define=_FLASH "/>
<pathVariable name="C2000WARE_COMMON_INCLUDE" path="../../../common/include/" scope="project" />
<pathVariable name="C2000WARE_HEADERS_INCLUDE" path="../../../headers/include/" scope="project" />
<pathVariable name="C2000WARE_SFO_INCLUDE" path="../../../../../libraries/calibration/hrpwm/f280013x/include/" scope="project"/>
<file action="link" path="../../../../../libraries/calibration/hrpwm/f280013x/lib/SFO_v8_fpu_lib_build_c28_driverlib.lib" targetDirectory=""/>
<file action="copy" path="../../../common/source/f280013x_codestartbranch.asm" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_defaultisr.c" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_adc.c" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_epwm.c" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_cputimers.c" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_gpio.c" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_piectrl.c" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_pievect.c" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_sysctrl.c" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_usdelay.asm" targetDirectory="" />
<file action="copy" path="../../../common/source/f280013x_tempsensorconv.c" targetDirectory="" />
<file action="copy" path="../../../headers/cmd/f280013x_headers_nonBIOS.cmd" targetDirectory="" />
<file action="copy" path="../../../headers/source/f280013x_globalvariabledefs.c" targetDirectory="" />
<file action="copy" path="../../../common/targetConfigs/TMS320F2800137.ccxml" targetDirectory="targetConfigs" />
<file action="copy" path="../../../common/cmd/280013x_generic_ram_lnk.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM"/>
<file action="copy" path="../../../common/cmd/280013x_generic_flash_lnk.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH"/>
<file action="copy" path="../hrpwm_ex1_duty_sfo_v8.c" targetDirectory="" />
</project>
</projectSpec>

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@ -0,0 +1,37 @@
<projectSpec>
<project
name="hrpwm_ex2_prdupdown_sfo_v8"
device="TMS320F2800137"
cgtVersion="22.6.0.LTS"
products="c2000ware_software_package"
outputFormat="ELF"
launchWizard="False"
linkerCommandFile=""
>
<configuration name="CPU1_RAM" compilerBuildOptions="--opt_level=off -I${C2000WARE_COMMON_INCLUDE} -I${C2000WARE_HEADERS_INCLUDE} -I${C2000WARE_SFO_INCLUDE} -v28 -ml -mt --float_support=fpu32 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x200 --heap_size=0x100 --define=RAM "/>
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_COMMON_INCLUDE} -I${C2000WARE_HEADERS_INCLUDE} -I${C2000WARE_SFO_INCLUDE} -v28 -ml -mt --float_support=fpu32 --gen_func_subsections=on --define=_FLASH --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x200 --heap_size=0x100 --define=_FLASH "/>
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<pathVariable name="C2000WARE_HEADERS_INCLUDE" path="../../../headers/include/" scope="project" />
<pathVariable name="C2000WARE_SFO_INCLUDE" path="../../../../../libraries/calibration/hrpwm/f280013x/include/" scope="project"/>
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<file action="copy" path="../../../common/targetConfigs/TMS320F2800137.ccxml" targetDirectory="targetConfigs" />
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<file action="copy" path="../hrpwm_ex2_prdupdown_sfo_v8.c" targetDirectory="" />
</project>
</projectSpec>

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@ -0,0 +1,427 @@
//###########################################################################
//
// FILE: hrpwm_ex1_duty_sfo_v8.c
//
// TITLE: HRPWM SFO V8 High-Resolution Period
// (Up-Down Count) example
//
//! \addtogroup cpu01_example_list
//! <h1> HRPWM Duty SFO (hrpwm_duty_sfo_v8)</h1>
//! This program requires the header files, which include
//! the following files required for this example:
//! sfo_v8.h and SFO_v8_fpu_lib_build_c28_eabi.lib
//!
//! Monitor ePWM1-ePWM7 A/B pins on an oscilloscope.
//! DESCRIPTION:
//!
//! This example modifies the MEP control registers to show edge displacement
//! for high-resolution period with ePWM in Up-Down count mode
//! due to the HRPWM control extension of the respective ePWM module.
//!
//! This example calls the following TI's MEP Scale Factor Optimizer (SFO)
//! software library V8 functions:
//!
//! \b int \b SFO(); \n
//! - updates MEP_ScaleFactor dynamically when HRPWM is in use
//! - updates HRMSTEP register (exists only in EPwm1Regs register space)
//! with MEP_ScaleFactor value
//! - returns 2 if error: MEP_ScaleFactor is greater than maximum value of 255
//! (Auto-conversion may not function properly under this condition)
//! - returns 1 when complete for the specified channel
//! - returns 0 if not complete for the specified channel
//!
//! This example is intended to explain the HRPWM capabilities. The code can be
//! optimized for code efficiency. Refer to TI's Digital power application
//! examples and TI Digital Power Supply software libraries for details.
//!
//! EPWM1 A/B channels will have fine edge movement due to the
//! HRPWM logic
//! =======================================================================
//! NOTE: For more information on using the SFO software library, see the
//! High-Resolution Pulse Width Modulator (HRPWM) Reference Guide
//! =======================================================================
//!
//! To load and run this example:
//! -# **!!IMPORTANT!!**
//! -# Run this example at maximum SYSCLKOUT
//! -# Activate Real time mode
//! -# Run the code
//! -# Watch ePWM A / B channel waveforms on a Oscilloscope
//! -# In the watch window:
//! Set the variable UpdateFine = 1 to observe the ePWMxA & ePWMxB output
//! with HRPWM capabilities (default)
//! Observe the period/frequency of the waveform changes in fine MEP steps
//! -# In the watch window:
//! Change the variable UpdateFine to 0, to observe the
//! ePWMxA & ePWMxB output without HRPWM capabilities
//! Observe the period/frequency of the waveform changes in coarse
//! SYSCLKOUT cycle steps.
//
//###########################################################################
//
//
// $Copyright:
// Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################
//
// Included Files
//
#include "f28x_project.h"
#include "sfo_v8.h"
//
// Defines
//
#define PWM_CH 2 // # of PWM channels + 1
#define STATUS_SUCCESS 1
#define STATUS_FAIL 0
#define AUTOCONVERT 0 // 1 = Turn auto-conversion ON
// 0 = Turn auto-conversion OFF
//
// Globals
//
Uint16 UpdateFine;
Uint16 DutyFine;
Uint16 status;
Uint16 CMPA_reg_val;
Uint16 CMPAHR_reg_val;
Uint16 CMPB_reg_val;
Uint16 CMPBHR_reg_val;
int MEP_ScaleFactor; // Global variable used by the SFO library
// Result can be used for all HRPWM channels
// This variable is also copied to HRMSTEP
// register by SFO() function.
//
// Array of pointers to EPwm register structures:
// *ePWM[0] is defined as dummy value not used in the example
//
volatile struct EPWM_REGS *ePWM[PWM_CH] = {0, &EPwm1Regs};
//
// Function Prototypes
//
void HRPWM_Config(int);
void error(void);
void InitEPwm1Gpio(void);
//
// Main
//
void main(void)
{
int i;
Uint32 temp, temp1;
//
// Initialize System Control for Control and Analog Subsystems
// Enable Peripheral Clocks
//
EALLOW;
InitSysCtrl();
EDIS;
//
// Initialize GPIO
//
InitEPwm1Gpio();
DINT; // Disable CPU interrupts
//
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
//
InitPieCtrl();
//
// Disable CPU interrupts and clear all CPU interrupt flags
//
EALLOW;
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
//
InitPieVectTable();
//
// For this example, only initialize the ePWM
// User specific code, enable interrupts:
//
UpdateFine = 1;
DutyFine = 0;
status = SFO_INCOMPLETE;
//
// Enable global Interrupts and higher priority real-time debug events:
//
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
//
// Calling SFO() updates the HRMSTEP register with calibrated
// MEP_ScaleFactor. HRMSTEP must be populated with a scale factor
// value prior to enabling high resolution period control.
//
while(status == SFO_INCOMPLETE)
{
status = SFO();
if(status == SFO_ERROR)
{
error(); // SFO function returns 2 if an error occurs & # of MEP
} // steps/coarse step exceeds maximum of 255.
}
//
// ePWM and HRPWM register initialization
//
HRPWM_Config(10); // ePWMx target
EALLOW;
for(;;)
{
//
// Sweep DutyFine as a Q15 number from 0.2 - 0.999
//
for(DutyFine = 0x199A; DutyFine < 0x7FDF; DutyFine++)
{
if(UpdateFine)
{
/* All below calculations apply for CMPB as well.
// CMPA_reg_val , CMPAHR_reg_val is calculated as a Q0.
// Since DutyFine is a Q15 number, and the period is Q0
// the product is Q15. So to store as a Q0, we shift right
// 15 bits.
CMPA_reg_val = ((long)DutyFine * (EPwm1Regs.TBPRD + 1)) >> 15;
// This next step is to obtain the remainder which was
// truncated during our 15 bit shift above.
// compute the whole value, and then subtract CMPA_reg_val
// shifted LEFT 15 bits:
temp = ((long)DutyFine * (EPwm1Regs.TBPRD + 1)) ;
temp = temp - ((long)CMPA_reg_val << 15);
** If auto-conversion is disabled, the following step can be
// skipped. If autoconversion is enabled, the SFO function will
// write the MEP_ScaleFactor to the HRMSTEP register and the
// hardware will automatically scale the remainder in the CMPAHR
// register by the MEP_ScaleFactor.
// Because the remainder calculated above (temp) is in Q15
// format, it must be shifted left by 1 to convert to Q16 format
// for the hardware to properly convert.
CMPAHR_reg_val = temp << 1;
** If auto-conversion is enabled, the following step is
performed automatically in hardware and can be skipped
// This obtains the MEP count in digits, from
// 0,1, .... MEP_Scalefactor.
// 0x0080 (0.5 in Q8) is converted to 0.5 in Q15 by shifting
// left 7. This is added to fractional duty * MEP_SF product in
// order to round the decimal portion of the product up to the
// next integer if the decimal portion is >= 0.5.
//
// Once again since this is Q15 convert to Q0 by shifting:
//
CMPAHR_reg_val = (temp * MEP_ScaleFactor + (0x0080 << 7)) >> 15;
** If auto-conversion is enabled, the following step is
performed automatically in hardware and can be skipped
// Now the lower 8 bits contain the MEP count.
// Since the MEP count needs to be in the upper 8 bits of
// the 16 bit CMPAHR register, shift left by 8.
CMPAHR_reg_val = CMPAHR_reg_val << 8;
// Write the values to the registers as one 32-bit or two
// 16-bits
EPwm1Regs.CMPA.bit.CMPA = CMPA_reg_val;
EPwm1Regs.CMPA.bit.CMPAHR = CMPAHR_reg_val;
*/
//
// All the above operations may be condensed into the following
// form:
//
for(i = 1;i < PWM_CH;i++)
{
CMPA_reg_val = ((long)DutyFine * ((*ePWM[i]).TBPRD + 1)) >> 15;
CMPB_reg_val = ((long)DutyFine * ((*ePWM[i]).TBPRD + 1)) >> 15;
temp = ((long)DutyFine * ((*ePWM[i]).TBPRD + 1)) ;
temp1 = ((long)DutyFine * ((*ePWM[i]).TBPRD + 1)) ;
temp = temp - ((long)CMPA_reg_val << 15);
temp1 = temp1 - ((long)CMPB_reg_val << 15);
#if(AUTOCONVERT)
CMPAHR_reg_val = temp << 1; // convert to Q16
CMPBHR_reg_val = temp << 1; // convert to Q16
#else
CMPAHR_reg_val = ((temp * MEP_ScaleFactor) +
(0x0080 << 7)) >> 15;
CMPAHR_reg_val = CMPAHR_reg_val << 8;
CMPBHR_reg_val = ((temp1 * MEP_ScaleFactor) +
(0x0080 << 7)) >> 15;
CMPBHR_reg_val = CMPBHR_reg_val << 8;
#endif
//
// Example for a 32 bit write to CMPA:CMPAHR
//
(*ePWM[i]).CMPA.all = ((long)CMPA_reg_val) << 16 |
CMPAHR_reg_val; // loses lower 8-bits
//
// Example for a 32 bit write to CMPB:CMPBHR
//
(*ePWM[i]).CMPB.all = ((long)CMPB_reg_val) << 16 |
CMPBHR_reg_val; // loses lower 8-bits
}
}
else
{
//
// CMPA_reg_val is calculated as a Q0.
// Since DutyFine is a Q15 number, and the period is Q0
// the product is Q15. So to store as a Q0, we shift right
// 15 bits.
//
for(i = 1;i < PWM_CH;i++)
{
(*ePWM[i]).CMPA.bit.CMPA = (((long)DutyFine *
((*ePWM[i]).TBPRD + 1)) >> 15);
(*ePWM[i]).CMPB.bit.CMPB = (((long)DutyFine *
((*ePWM[i]).TBPRD + 1)) >> 15);
}
}
//
// Call the scale factor optimizer lib function SFO()
// periodically to track for any change due to temp/voltage.
// This function generates MEP_ScaleFactor by running the
// MEP calibration module in the HRPWM logic. This scale
// factor can be used for all HRPWM channels. The SFO()
// function also updates the HRMSTEP register with the
// scale factor value.
//
status = SFO(); // in background, MEP calibration module
// continuously updates MEP_ScaleFactor
if(status == SFO_ERROR)
{
error(); // SFO function returns 2 if an error occurs & #
// of MEP steps/coarse step
} // exceeds maximum of 255.
} // end DutyFine for loop
} // end infinite for loop
}
//
// HRPWM_Config - Configures all ePWM channels and sets up HRPWM
// on ePWMxA / ePWMxB channels
//
void HRPWM_Config(period)
{
Uint16 j;
//
// ePWM channel register configuration with HRPWM
// ePWMxA / ePWMxB toggle low/high with MEP control on Rising edge
//
for (j = 1;j < PWM_CH;j++)
{
(*ePWM[j]).TBCTL.bit.PRDLD = TB_SHADOW; // set Shadow load
(*ePWM[j]).TBPRD = period-1; // PWM frequency = 1 / period
(*ePWM[j]).CMPA.bit.CMPA = period / 2; // set duty 50% initially
(*ePWM[j]).CMPA.bit.CMPAHR = (1 << 8); // initialize HRPWM extension
(*ePWM[j]).CMPB.bit.CMPB = period / 2; // set duty 50% initially
(*ePWM[j]).CMPB.all |= (1 << 8); // initialize HRPWM extension
(*ePWM[j]).TBPHS.all = 0;
(*ePWM[j]).TBCTR = 0;
(*ePWM[j]).TBCTL.bit.CTRMODE = TB_COUNT_UP;
(*ePWM[j]).TBCTL.bit.PHSEN = TB_DISABLE;
(*ePWM[j]).EPWMSYNCINSEL.all = SYNC_IN_SRC_DISABLE_ALL;
(*ePWM[j]).EPWMSYNCOUTEN.all = SYNC_OUT_SRC_DISABLE_ALL;
(*ePWM[j]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
(*ePWM[j]).TBCTL.bit.CLKDIV = TB_DIV1;
(*ePWM[j]).TBCTL.bit.FREE_SOFT = 11;
(*ePWM[j]).CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
(*ePWM[j]).CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
(*ePWM[j]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
(*ePWM[j]).CMPCTL.bit.SHDWBMODE = CC_SHADOW;
(*ePWM[j]).AQCTLA.bit.ZRO = AQ_SET; // PWM toggle high/low
(*ePWM[j]).AQCTLA.bit.CAU = AQ_CLEAR;
(*ePWM[j]).AQCTLB.bit.ZRO = AQ_SET;
(*ePWM[j]).AQCTLB.bit.CBU = AQ_CLEAR;
EALLOW;
(*ePWM[j]).HRCNFG.all = 0x0;
(*ePWM[j]).HRCNFG.bit.EDGMODE = HR_FEP; // MEP control on falling edge
(*ePWM[j]).HRCNFG.bit.CTLMODE = HR_CMP;
(*ePWM[j]).HRCNFG.bit.HRLOAD = HR_CTR_ZERO;
(*ePWM[j]).HRCNFG.bit.EDGMODEB = HR_FEP; // MEP control on falling edge
(*ePWM[j]).HRCNFG.bit.CTLMODEB = HR_CMP;
(*ePWM[j]).HRCNFG.bit.HRLOADB = HR_CTR_ZERO;
#if(AUTOCONVERT)
(*ePWM[j]).HRCNFG.bit.AUTOCONV = 1; // Enable auto-conversion
// logic
#endif
(*ePWM[j]).HRPCTL.bit.HRPE = 0; // Turn off high-resolution period
// control.
EDIS;
}
}
//
// error - Halt debugger when called
//
void error (void)
{
ESTOP0; // Stop here and handle error
}
//
// End of file
//

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@ -0,0 +1,358 @@
//###########################################################################
//
// FILE: hrpwm_ex2_prdupdown_sfo_v8.c
//
// TITLE: HRPWM SFO V8 High-Resolution Period (Up-Down Count)
// example
//
//! \addtogroup cpu01_example_list
//! <h1> HRPWM SFO Test (hrpwm_prdupdown_sfo_v8)</h1>
//!
//! This program requires the header files, which include
//! the following files required for this example:
//! sfo_v8.h and SFO_v8_fpu_lib_build_c28_eabi.lib
//!
//! Monitor ePWM1-ePWM7 A/B pins on an oscilloscope.
//! DESCRIPTION:
//!
//! This example modifies the MEP control registers to show edge displacement
//! for high-resolution period with ePWM in Up-Down count mode
//! due to the HRPWM control extension of the respective ePWM module.
//!
//! This example calls the following TI's MEP Scale Factor Optimizer (SFO)
//! software library V8 functions:
//!
//! \b int \b SFO(); \n
//! - updates MEP_ScaleFactor dynamically when HRPWM is in use
//! - updates HRMSTEP register (exists only in EPwm1Regs register space)
//! with MEP_ScaleFactor value
//! - returns 2 if error: MEP_ScaleFactor is greater than maximum value of 255
//! (Auto-conversion may not function properly under this condition)
//! - returns 1 when complete for the specified channel
//! - returns 0 if not complete for the specified channel
//!
//! This example is intended to explain the HRPWM capabilities. The code can be
//! optimized for code efficiency. Refer to TI's Digital power application
//! examples and TI Digital Power Supply software libraries for details.
//!
//! EPWM1 A/B channels will have fine edge movement due to the
//! HRPWM logic
//!
//! =======================================================================
//! NOTE: For more information on using the SFO software library, see the
//! High-Resolution Pulse Width Modulator (HRPWM) Reference Guide
//! =======================================================================
//!
//! To load and run this example:
//! -# **!!IMPORTANT!!**
//! -# Run this example at maximum SYSCLKOUT
//! -# Activate Real time mode
//! -# Run the code
//! -# Watch ePWM A / B channel waveforms on an Oscilloscope
//! -# In the watch window:
//! Set the variable UpdateFine = 1 to observe the ePWMxA & ePWMxB output
//! with HRPWM capabilities (default)
//! Observe the period/frequency of the waveform changes in fine MEP steps
//! -# In the watch window:
//! Change the variable UpdateFine to 0, to observe the
//! ePWMxA & ePWMxB output without HRPWM capabilities
//! Observe the period/frequency of the waveform changes in coarse SYSCLKOUT
//! cycle steps.
//
//###########################################################################
//
//
// $Copyright:
// Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################
//
// Included Files
//
#include "f28x_project.h"
#include "sfo_v8.h"
//
// Defines
//
#define PWM_CH 2 // # of PWM channels + 1
#define STATUS_SUCCESS 1
#define STATUS_FAIL 0
//
// Globals
//
Uint16 UpdateFine, PeriodFine, status;
int MEP_ScaleFactor; // Global variable used by the SFO library
// Result can be used for all HRPWM channels
// This variable is also copied to HRMSTEP
// register by SFO(0) function.
//
// Array of pointers to EPwm register structures:
// *ePWM[0] is defined as dummy value not used in the example
//
volatile struct EPWM_REGS *ePWM[PWM_CH] = {0, &EPwm1Regs};
//
// Function Prototypes
//
void HRPWM_Config(int);
void error(void);
void InitEPwmGpio(void);
//
// Main
//
void main(void)
{
int i;
EALLOW; // This is needed to write to EALLOW protected registers
//
// Initialize System Control for Control and Analog Subsystems
// Enable Peripheral Clocks
//
InitSysCtrl();
EDIS;
//
// EPWM1A and EPWM1B through all PWMS
//
InitEPwmGpio();
DINT; // Disable CPU interrupts
//
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
//
InitPieCtrl();
//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
EALLOW;
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
//
InitPieVectTable();
//
// Initialize system variables, enable HRPWM
//
UpdateFine = 1;
PeriodFine = 0;
status = SFO_INCOMPLETE;
//
// Enable global Interrupts and higher priority real-time debug events:
//
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
//
// Calling SFO() updates the HRMSTEP register with calibrated
// MEP_ScaleFactor. HRMSTEP must be populated with a scale factor
// value prior to enabling high resolution period control.
//
while(status == SFO_INCOMPLETE) // Call until complete
{
status = SFO();
if(status == SFO_ERROR)
{
error(); // SFO function returns 2 if an error occurs & # of MEP
} // steps/coarse step exceeds maximum of 255.
}
//
// ePWM and HRPWM register initialization
//
HRPWM_Config(20); // ePWMx target
for(;;)
{
//
// Sweep PeriodFine as a Q16 number from 0.2 - 0.999
//
for(PeriodFine = 0x3333; PeriodFine < 0xFFBF; PeriodFine++)
{
if(UpdateFine)
{
//
// Because auto-conversion is enabled, the desired
// fractional period must be written directly to the
// TBPRDHR (or TBPRDHRM) register in Q16 format
// (lower 8-bits are ignored)
//
// EPwm1Regs.TBPRDHR = PeriodFine;
//
// The hardware will automatically scale
// the fractional period by the MEP_ScaleFactor
// in the HRMSTEP register (which is updated
// by the SFO calibration software).
//
// Hardware conversion:
// MEP delay movement = ((TBPRDHR(15:0) >> 8) * HRMSTEP(7:0) +
// 0x80) >> 8
//
for(i = 1;i < PWM_CH; i++)
{
(*ePWM[i]).TBPRDHR = PeriodFine; //In Q16 format
}
}
else
{
//
// No high-resolution movement on TBPRDHR.
//
for(i = 1;i < PWM_CH; i++)
{
(*ePWM[i]).TBPRDHR = 0;
}
}
//
// Call the scale factor optimizer lib function SFO(0)
// periodically to track for any change due to temp/voltage.
// This function generates MEP_ScaleFactor by running the
// MEP calibration module in the HRPWM logic. This scale
// factor can be used for all HRPWM channels. HRMSTEP
// register is automatically updated by the SFO function.
//
status = SFO(); // in background, MEP calibration module
// continuously updates MEP_ScaleFactor
if(status == SFO_ERROR)
{
error(); // SFO function returns 2 if an error occurs & # of
} // MEP steps/coarse step exceeds maximum of 255.
} // end PeriodFine for loop
} // end infinite for loop
}
//
// HRPWM_Config - Configures all ePWM channels and sets up HRPWM
// on ePWMxA channels & ePWMxB channels
//
void HRPWM_Config(period)
{
Uint16 j;
//
// ePWM channel register configuration with HRPWM
// ePWMxA toggle low/high with MEP control on Rising edge
//
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0; // Disable TBCLK within the EPWM
EDIS;
for(j = 1;j < PWM_CH;j++)
{
(*ePWM[j]).TBCTL.bit.PRDLD = TB_SHADOW; // set Shadow load
(*ePWM[j]).TBPRD = period; // PWM frequency = 1/(2*TBPRD)
(*ePWM[j]).CMPA.bit.CMPA = period / 2; // set duty 50% initially
(*ePWM[j]).CMPA.bit.CMPAHR = (1 << 8); // initialize HRPWM extension
(*ePWM[j]).CMPB.bit.CMPB = period / 2; // set duty 50% initially
(*ePWM[j]).CMPB.all |= 1;
(*ePWM[j]).TBPHS.all = 0;
(*ePWM[j]).TBCTR = 0;
(*ePWM[j]).TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Select up-down
// count mode
(*ePWM[j]).EPWMSYNCINSEL.all = SYNC_IN_SRC_DISABLE_ALL;
(*ePWM[j]).EPWMSYNCOUTEN.all = SYNC_OUT_SRC_DISABLE_ALL;
(*ePWM[j]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
(*ePWM[j]).TBCTL.bit.CLKDIV = TB_DIV1; // TBCLK = SYSCLKOUT
(*ePWM[j]).TBCTL.bit.FREE_SOFT = 11;
(*ePWM[j]).CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // LOAD CMPA on CTR = 0
(*ePWM[j]).CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
(*ePWM[j]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
(*ePWM[j]).CMPCTL.bit.SHDWBMODE = CC_SHADOW;
(*ePWM[j]).AQCTLA.bit.CAU = AQ_SET; // PWM toggle high/low
(*ePWM[j]).AQCTLA.bit.CAD = AQ_CLEAR;
(*ePWM[j]).AQCTLB.bit.CBU = AQ_SET; // PWM toggle high/low
(*ePWM[j]).AQCTLB.bit.CBD = AQ_CLEAR;
EALLOW;
(*ePWM[j]).HRCNFG.all = 0x0;
(*ePWM[j]).HRCNFG.bit.EDGMODE = HR_BEP; // MEP control on
// both edges.
(*ePWM[j]).HRCNFG.bit.CTLMODE = HR_CMP; // CMPAHR and TBPRDHR
// HR control.
(*ePWM[j]).HRCNFG.bit.HRLOAD = HR_CTR_ZERO_PRD; // load on CTR = 0
// and CTR = TBPRD
(*ePWM[j]).HRCNFG.bit.EDGMODEB = HR_BEP; // MEP control on
// both edges
(*ePWM[j]).HRCNFG.bit.CTLMODEB = HR_CMP; // CMPBHR and TBPRDHR
// HR control
(*ePWM[j]).HRCNFG.bit.HRLOADB = HR_CTR_ZERO_PRD; // load on CTR = 0
// and CTR = TBPRD
(*ePWM[j]).HRCNFG.bit.AUTOCONV = 1; // Enable autoconversion for
// HR period
(*ePWM[j]).HRPCTL.bit.TBPHSHRLOADE = 1; // Enable TBPHSHR sync
// (required for updwn
// count HR control)
(*ePWM[j]).HRPCTL.bit.HRPE = 1; // Turn on high-resolution
// period control.
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Enable TBCLK within
// the EPWM
(*ePWM[j]).TBCTL.bit.SWFSYNC = 1; // Synchronize high
// resolution phase to
// start HR period
EDIS;
}
}
//
// error - Halt debugger when error occurs
//
void error (void)
{
ESTOP0; // Stop here and handle error
}
//
// End of file
//

View File

@ -240,20 +240,20 @@ void InitSpiaGpio(void)
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
//
GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0; // Enable pull-up on GPIO16 (SPISIMOA)
GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0; // Enable pull-up on GPIO17 (SPISOMIA)
GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0; // Enable pull-up on GPIO16 (SPIPICOA)
GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0; // Enable pull-up on GPIO17 (SPIPOCIA)
GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pull-up on GPIO18 (SPICLKA)
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; // Enable pull-up on GPIO19 (SPISTEA)
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; // Enable pull-up on GPIO19 (SPIPTEA)
//
// Set qualification for selected pins to asynch only
//
// This will select asynch (no qualification) for the selected pins.
//
GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // Asynch input GPIO16 (SPISIMOA)
GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // Asynch input GPIO17 (SPISOMIA)
GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // Asynch input GPIO16 (SPIPICOA)
GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // Asynch input GPIO17 (SPIPOCIA)
GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Asynch input GPIO18 (SPICLKA)
GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // Asynch input GPIO19 (SPISTEA)
GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // Asynch input GPIO19 (SPIPTEA)
//
// Configure SPI-A pins
@ -261,10 +261,10 @@ void InitSpiaGpio(void)
// This specifies which of the possible GPIO pins will be SPI functional
// pins.
//
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // Configure GPIO16 as SPISIMOA
GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // Configure GPIO17 as SPISOMIA
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // Configure GPIO16 as SPIPICOA
GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // Configure GPIO17 as SPIPOCIA
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; // Configure GPIO18 as SPICLKA
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // Configure GPIO19 as SPISTEA
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // Configure GPIO19 as SPIPTEA
EDIS;
}

View File

@ -27,6 +27,7 @@ MEMORY
DEVCFG : origin = 0x0005D000, length = 0x000001AC
ECAP1 : origin = 0x00005200, length = 0x00000020
ECAP2 : origin = 0x00005240, length = 0x00000020
ECAP3 : origin = 0x00005280, length = 0x00000020
EPG1MUX : origin = 0x0005ECD0, length = 0x00000010
EPG1 : origin = 0x0005EC00, length = 0x00000050
EPWM1 : origin = 0x00004000, length = 0x00000100
@ -38,6 +39,7 @@ MEMORY
EPWM7 : origin = 0x00004600, length = 0x00000100
EPWMXBAR : origin = 0x00007A00, length = 0x00000040
EQEP1 : origin = 0x00005100, length = 0x00000040
EQEP2 : origin = 0x00005140, length = 0x00000040
FLASH0CTRL : origin = 0x0005F800, length = 0x00000182
FLASH0ECC : origin = 0x0005FB00, length = 0x00000028
GPIOCTRL : origin = 0x00007C00, length = 0x00000200
@ -107,6 +109,7 @@ UNION run = PIEVECTTABLE
DevCfgRegsFile : > DEVCFG, type=NOINIT
ECap1RegsFile : > ECAP1, type=NOINIT
ECap2RegsFile : > ECAP2, type=NOINIT
ECap3RegsFile : > ECAP3, type=NOINIT
Epg1MuxRegsFile : > EPG1MUX, type=NOINIT
Epg1RegsFile : > EPG1, type=NOINIT
EPwm1RegsFile : > EPWM1, type=NOINIT
@ -118,6 +121,7 @@ UNION run = PIEVECTTABLE
EPwm7RegsFile : > EPWM7, type=NOINIT
EPwmXbarRegsFile : > EPWMXBAR, type=NOINIT
EQep1RegsFile : > EQEP1, type=NOINIT
EQep2RegsFile : > EQEP2, type=NOINIT
Flash0CtrlRegsFile : > FLASH0CTRL, type=NOINIT
Flash0EccRegsFile : > FLASH0ECC, type=NOINIT
GpioCtrlRegsFile : > GPIOCTRL, type=NOINIT

View File

@ -27,6 +27,7 @@ MEMORY
DEVCFG : origin = 0x0005D000, length = 0x000001AC
ECAP1 : origin = 0x00005200, length = 0x00000020
ECAP2 : origin = 0x00005240, length = 0x00000020
ECAP3 : origin = 0x00005280, length = 0x00000020
EPG1MUX : origin = 0x0005ECD0, length = 0x00000010
EPG1 : origin = 0x0005EC00, length = 0x00000050
EPWM1 : origin = 0x00004000, length = 0x00000100
@ -38,6 +39,7 @@ MEMORY
EPWM7 : origin = 0x00004600, length = 0x00000100
EPWMXBAR : origin = 0x00007A00, length = 0x00000040
EQEP1 : origin = 0x00005100, length = 0x00000040
EQEP2 : origin = 0x00005140, length = 0x00000040
FLASH0CTRL : origin = 0x0005F800, length = 0x00000182
FLASH0ECC : origin = 0x0005FB00, length = 0x00000028
GPIOCTRL : origin = 0x00007C00, length = 0x00000200
@ -107,6 +109,7 @@ UNION run = PIEVECTTABLE
DevCfgRegsFile : > DEVCFG, type=NOINIT
ECap1RegsFile : > ECAP1, type=NOINIT
ECap2RegsFile : > ECAP2, type=NOINIT
ECap3RegsFile : > ECAP3, type=NOINIT
Epg1MuxRegsFile : > EPG1MUX, type=NOINIT
Epg1RegsFile : > EPG1, type=NOINIT
EPwm1RegsFile : > EPWM1, type=NOINIT
@ -118,6 +121,7 @@ UNION run = PIEVECTTABLE
EPwm7RegsFile : > EPWM7, type=NOINIT
EPwmXbarRegsFile : > EPWMXBAR, type=NOINIT
EQep1RegsFile : > EQEP1, type=NOINIT
EQep2RegsFile : > EQEP2, type=NOINIT
Flash0CtrlRegsFile : > FLASH0CTRL, type=NOINIT
Flash0EccRegsFile : > FLASH0ECC, type=NOINIT
GpioCtrlRegsFile : > GPIOCTRL, type=NOINIT

View File

@ -135,8 +135,8 @@ union DCCCNT1_REG {
};
struct DCCCLKSRC1_BITS { // bits description
bp_16 CLKSRC1:5; // 4:0 Clock Source Select for Counter 1
bp_16 rsvd1:7; // 11:5 Reserved
bp_16 CLKSRC1:6; // 5:0 Clock Source Select for Counter 1
bp_16 rsvd1:6; // 11:6 Reserved
bp_16 KEY:4; // 15:12 Enables or Disables Clock Source Selection for COUNT1
bp_32 rsvd2:16; // 31:16 Reserved
};
@ -147,8 +147,8 @@ union DCCCLKSRC1_REG {
};
struct DCCCLKSRC0_BITS { // bits description
bp_16 CLKSRC0:4; // 3:0 Clock Source Select for Counter 0
bp_16 rsvd1:8; // 11:4 Reserved
bp_16 CLKSRC0:5; // 4:0 Clock Source Select for Counter 0
bp_16 rsvd1:7; // 11:5 Reserved
bp_16 KEY:4; // 15:12 Enables or Disables Clock Source Selection for COUNT0
bp_32 rsvd2:16; // 31:16 Reserved
};

View File

@ -201,93 +201,12 @@ struct ECAP_REGS {
union ECAPSYNCINSEL_REG ECAPSYNCINSEL; // SYNC source select register
};
struct HRCTL_BITS { // bits description
Uint16 HRE:1; // 0 High Resolution Enable
Uint16 HRCLKE:1; // 1 High Resolution Clock Enable
Uint16 PRDSEL:1; // 2 Calibration Period Match
Uint16 CALIBSTART:1; // 3 Calibration start
Uint16 CALIBSTS:1; // 4 Calibration status
Uint16 CALIBCONT:1; // 5 Continuous mode Calibration Select
Uint16 rsvd1:10; // 15:6 Reserved
Uint16 rsvd2:16; // 31:16 Reserved
};
union HRCTL_REG {
Uint32 all;
struct HRCTL_BITS bit;
};
struct HRINTEN_BITS { // bits description
Uint16 rsvd1:1; // 0 Reserved
Uint16 CALIBDONE:1; // 1 Calibration doe interrupt enable
Uint16 CALPRDCHKSTS:1; // 2 Calibration period check status enable
Uint16 rsvd2:13; // 15:3 Reserved
Uint16 rsvd3:16; // 31:16 Reserved
};
union HRINTEN_REG {
Uint32 all;
struct HRINTEN_BITS bit;
};
struct HRFLG_BITS { // bits description
Uint16 CALIBINT:1; // 0 Global calibration Interrupt Status Flag
Uint16 CALIBDONE:1; // 1 Calibration Done Interrupt Flag Bit
Uint16 CALPRDCHKSTS:1; // 2 Calibration period check status Flag Bi
Uint16 rsvd1:13; // 15:3 Reserved
Uint16 rsvd2:16; // 31:16 Reserved
};
union HRFLG_REG {
Uint32 all;
struct HRFLG_BITS bit;
};
struct HRCLR_BITS { // bits description
Uint16 CALIBINT:1; // 0 Clear Global calibration Interrupt Flag
Uint16 CALIBDONE:1; // 1 Clear Calibration Done Interrupt Flag Bit
Uint16 CALPRDCHKSTS:1; // 2 Clear Calibration period check status Flag Bit
Uint16 rsvd1:13; // 15:3 Reserved
Uint16 rsvd2:16; // 31:16 Reserved
};
union HRCLR_REG {
Uint32 all;
struct HRCLR_BITS bit;
};
struct HRFRC_BITS { // bits description
Uint16 rsvd1:1; // 0 Reserved
Uint16 CALIBDONE:1; // 1 Force Calibration Done Interrupt Flag Bit
Uint16 CALPRDCHKSTS:1; // 2 Force Calibration period check status Flag Bit
Uint16 rsvd2:13; // 15:3 Reserved
Uint16 rsvd3:16; // 31:16 Reserved
};
union HRFRC_REG {
Uint32 all;
struct HRFRC_BITS bit;
};
struct HRCAP_REGS {
union HRCTL_REG HRCTL; // High-Res Control Register
Uint16 rsvd1[2]; // Reserved
union HRINTEN_REG HRINTEN; // High-Res Calibration Interrupt Enable Register
union HRFLG_REG HRFLG; // High-Res Calibration Interrupt Flag Register
union HRCLR_REG HRCLR; // High-Res Calibration Interrupt Clear Register
union HRFRC_REG HRFRC; // High-Res Calibration Interrupt Force Register
Uint32 HRCALPRD; // High-Res Calibration Period Register
Uint32 HRSYSCLKCTR; // High-Res Calibration SYSCLK Counter Register
Uint32 HRSYSCLKCAP; // High-Res Calibration SYSCLK Capture Register
Uint32 HRCLKCTR; // High-Res Calibration HRCLK Counter Register
Uint32 HRCLKCAP; // High-Res Calibration HRCLK Capture Register
};
//---------------------------------------------------------------------------
// ECAP External References & Function Declarations:
//
extern volatile struct ECAP_REGS ECap1Regs;
extern volatile struct ECAP_REGS ECap2Regs;
extern volatile struct ECAP_REGS ECap3Regs;
#ifdef __cplusplus
}
#endif /* extern "C" */

View File

@ -164,8 +164,8 @@ union EPGCOMMIT_REG {
struct GINTSTS_BITS { // bits description
Uint16 INT:1; // 0 Global interrupt flag register
Uint16 SIGGEN0_DONE:1; // 1 SIGGEN0 operation done interrupt enable
Uint16 SIGGEN0_FILL:1; // 2 SIGGEN0 data fill interrupt enable
Uint16 SIGGEN0_DONE:1; // 1 SIGGEN0 operation done status
Uint16 SIGGEN0_FILL:1; // 2 SIGGEN0 data fill status
Uint16 rsvd1:1; // 3 Reserved
Uint16 rsvd2:1; // 4 Reserved
Uint16 rsvd3:11; // 15:5 Reserved

View File

@ -301,6 +301,7 @@ struct EQEP_REGS {
// EQEP External References & Function Declarations:
//
extern volatile struct EQEP_REGS EQep1Regs;
extern volatile struct EQEP_REGS EQep2Regs;
#ifdef __cplusplus
}
#endif /* extern "C" */

View File

@ -110,52 +110,52 @@ struct PIE_VECT_TABLE {
PINT PIE16_RESERVED_INT; // 3.8 - Reserved
PINT ECAP1_INT; // 4.1 - eCAP1 Interrupt
PINT ECAP2_INT; // 4.2 - eCAP2 Interrupt
PINT PIE17_RESERVED_INT; // 4.3 - Reserved
PINT PIE18_RESERVED_INT; // 4.4 - Reserved
PINT PIE19_RESERVED_INT; // 3.5 - Reserved
PINT PIE20_RESERVED_INT; // 3.6 - Reserved
PINT PIE21_RESERVED_INT; // 3.7 - Reserved
PINT PIE22_RESERVED_INT; // 3.8 - Reserved
PINT ECAP3_INT; // 4.3 - eCAP3 Interrupt
PINT PIE17_RESERVED_INT; // 4.4 - Reserved
PINT PIE18_RESERVED_INT; // 3.5 - Reserved
PINT PIE19_RESERVED_INT; // 3.6 - Reserved
PINT PIE20_RESERVED_INT; // 3.7 - Reserved
PINT PIE21_RESERVED_INT; // 3.8 - Reserved
PINT EQEP1_INT; // 5.1 - eQEP1 Interrupt
PINT PIE23_RESERVED_INT; // 5.2 - Reserved
PINT PIE24_RESERVED_INT; // 5.3 - Reserved
PINT PIE25_RESERVED_INT; // 5.4 - Reserved
PINT PIE26_RESERVED_INT; // 5.5 - Reserved
PINT PIE27_RESERVED_INT; // 5.6 - Reserved
PINT PIE28_RESERVED_INT; // 5.7 - Reserved
PINT PIE29_RESERVED_INT; // 5.8 - Reserved
PINT EQEP2_INT; // 5.2 - eQEP2 Interrupt
PINT PIE22_RESERVED_INT; // 5.3 - Reserved
PINT PIE23_RESERVED_INT; // 5.4 - Reserved
PINT PIE24_RESERVED_INT; // 5.5 - Reserved
PINT PIE25_RESERVED_INT; // 5.6 - Reserved
PINT PIE26_RESERVED_INT; // 5.7 - Reserved
PINT PIE27_RESERVED_INT; // 5.8 - Reserved
PINT SPIA_RX_INT; // 6.1 - SPIA Receive Interrupt
PINT SPIA_TX_INT; // 6.2 - SPIA Transmit Interrupt
PINT PIE30_RESERVED_INT; // 6.3 - Reserved
PINT PIE31_RESERVED_INT; // 6.4 - Reserved
PINT PIE32_RESERVED_INT; // 6.5 - Reserved
PINT PIE33_RESERVED_INT; // 6.6 - Reserved
PINT PIE28_RESERVED_INT; // 6.3 - Reserved
PINT PIE29_RESERVED_INT; // 6.4 - Reserved
PINT PIE30_RESERVED_INT; // 6.5 - Reserved
PINT PIE31_RESERVED_INT; // 6.6 - Reserved
PINT DCC0_INT; // 6.7 - DCC0 Interrupt
PINT PIE34_RESERVED_INT; // 6.8 - Reserved
PINT PIE35_RESERVED_INT; // 7.1 - Reserved
PINT PIE36_RESERVED_INT; // 7.2 - Reserved
PINT PIE37_RESERVED_INT; // 7.3 - Reserved
PINT PIE38_RESERVED_INT; // 7.4 - Reserved
PINT PIE39_RESERVED_INT; // 7.5 - Reserved
PINT PIE40_RESERVED_INT; // 7.6 - Reserved
PINT PIE41_RESERVED_INT; // 7.7 - Reserved
PINT PIE42_RESERVED_INT; // 7.8 - Reserved
PINT PIE32_RESERVED_INT; // 6.8 - Reserved
PINT PIE33_RESERVED_INT; // 7.1 - Reserved
PINT PIE34_RESERVED_INT; // 7.2 - Reserved
PINT PIE35_RESERVED_INT; // 7.3 - Reserved
PINT PIE36_RESERVED_INT; // 7.4 - Reserved
PINT PIE37_RESERVED_INT; // 7.5 - Reserved
PINT PIE38_RESERVED_INT; // 7.6 - Reserved
PINT PIE39_RESERVED_INT; // 7.7 - Reserved
PINT PIE40_RESERVED_INT; // 7.8 - Reserved
PINT I2CA_INT; // 8.1 - I2CA Interrupt 1
PINT I2CA_FIFO_INT; // 8.2 - I2CA Interrupt 2
PINT I2CB_INT; // 8.3 - I2CB Interrupt 1
PINT I2CB_FIFO_INT; // 8.4 - I2CB Interrupt 2
PINT SCIC_RX_INT; // 8.5 - SCIC Receive Interrupt
PINT SCIC_TX_INT; // 8.6 - SCIC Transmit Interrupt
PINT PIE43_RESERVED_INT; // 8.7 - Reserved
PINT PIE44_RESERVED_INT; // 8.8 - Reserved
PINT PIE41_RESERVED_INT; // 8.7 - Reserved
PINT PIE42_RESERVED_INT; // 8.8 - Reserved
PINT SCIA_RX_INT; // 9.1 - SCIA Receive Interrupt
PINT SCIA_TX_INT; // 9.2 - SCIA Transmit Interrupt
PINT SCIB_RX_INT; // 9.3 - SCIB Receive Interrupt
PINT SCIB_TX_INT; // 9.4 - SCIB Transmit Interrupt
PINT CANA0_INT; // 9.5 - CANA Interrupt 0
PINT CANA1_INT; // 9.6 - CANA Interrupt 1
PINT PIE45_RESERVED_INT; // 9.7 - Reserved
PINT PIE46_RESERVED_INT; // 9.8 - Reserved
PINT PIE43_RESERVED_INT; // 9.7 - Reserved
PINT PIE44_RESERVED_INT; // 9.8 - Reserved
PINT ADCA_EVT_INT; // 10.1 - ADCA Event Interrupt
PINT ADCA2_INT; // 10.2 - ADCA Interrupt 2
PINT ADCA3_INT; // 10.3 - ADCA Interrupt 3
@ -164,22 +164,22 @@ struct PIE_VECT_TABLE {
PINT ADCC2_INT; // 10.6 - ADCC Interrupt 2
PINT ADCC3_INT; // 10.7 - ADCC Interrupt 3
PINT ADCC4_INT; // 10.8 - ADCC Interrupt 4
PINT PIE47_RESERVED_INT; // 11.1 - Reserved
PINT PIE48_RESERVED_INT; // 11.2 - Reserved
PINT PIE49_RESERVED_INT; // 11.3 - Reserved
PINT PIE50_RESERVED_INT; // 11.4 - Reserved
PINT PIE51_RESERVED_INT; // 11.5 - Reserved
PINT PIE52_RESERVED_INT; // 11.6 - Reserved
PINT PIE53_RESERVED_INT; // 11.7 - Reserved
PINT PIE54_RESERVED_INT; // 11.8 - Reserved
PINT PIE45_RESERVED_INT; // 11.1 - Reserved
PINT PIE46_RESERVED_INT; // 11.2 - Reserved
PINT PIE47_RESERVED_INT; // 11.3 - Reserved
PINT PIE48_RESERVED_INT; // 11.4 - Reserved
PINT PIE49_RESERVED_INT; // 11.5 - Reserved
PINT PIE50_RESERVED_INT; // 11.6 - Reserved
PINT PIE51_RESERVED_INT; // 11.7 - Reserved
PINT PIE52_RESERVED_INT; // 11.8 - Reserved
PINT XINT3_INT; // 12.1 - XINT3 Interrupt
PINT XINT4_INT; // 12.2 - XINT4 Interrupt
PINT XINT5_INT; // 12.3 - XINT5 Interrupt
PINT PIE55_RESERVED_INT; // 12.4 - Reserved
PINT PIE53_RESERVED_INT; // 12.4 - Reserved
PINT FLSS_INT; // 12.5 - Interrupt from flash sub-system
PINT PIE56_RESERVED_INT; // 12.6 - Reserved
PINT PIE57_RESERVED_INT; // 12.7 - Reserved
PINT PIE58_RESERVED_INT; // 12.8 - Reserved
PINT PIE54_RESERVED_INT; // 12.6 - Reserved
PINT PIE55_RESERVED_INT; // 12.7 - Reserved
PINT PIE56_RESERVED_INT; // 12.8 - Reserved
};
//---------------------------------------------------------------------------

View File

@ -244,6 +244,14 @@ volatile struct ECAP_REGS ECap1Regs;
#endif
volatile struct ECAP_REGS ECap2Regs;
//----------------------------------------
#ifdef __cplusplus
#pragma DATA_SECTION("ECap3RegsFile")
#else
#pragma DATA_SECTION(ECap3Regs,"ECap3RegsFile");
#endif
volatile struct ECAP_REGS ECap3Regs;
//----------------------------------------
#ifdef __cplusplus
#pragma DATA_SECTION("Epg1MuxRegsFile")
@ -332,6 +340,14 @@ volatile struct EPWM_XBAR_REGS EPwmXbarRegs;
#endif
volatile struct EQEP_REGS EQep1Regs;
//----------------------------------------
#ifdef __cplusplus
#pragma DATA_SECTION("EQep2RegsFile")
#else
#pragma DATA_SECTION(EQep2Regs,"EQep2RegsFile");
#endif
volatile struct EQEP_REGS EQep2Regs;
//----------------------------------------
#ifdef __cplusplus
#pragma DATA_SECTION("Flash0CtrlRegsFile")

View File

@ -70,7 +70,7 @@ SECTIONS
GROUP
{
.TI.ramfunc
{ -l FAPI_F280015x_EABI_v2.00.01.lib}
{ -l FAPI_F280015x_EABI_v2.00.10.lib}
} LOAD = FLASH_BANK0_SEC_40_47,
RUN = RAMLS0,
@ -85,7 +85,7 @@ SECTIONS
GROUP
{
.TI.ramfunc
{ -l FAPI_F280015x_EABI_v2.00.01.lib}
{ -l FAPI_F280015x_EABI_v2.00.10.lib}
} LOAD = FLASH_BANK0_SEC_40_47,
RUN = RAMLS0,

View File

@ -40,7 +40,7 @@ SECTIONS
{
codestart : > BEGIN
.TI.ramfunc : > RAMM0
.text : >> RAMLS0 | RAMLS1
.text : >> RAMLS0 | RAMLS1 | RAMM0
.cinit : > RAMM0
.switch : > RAMM0
.reset : > RESET, TYPE = DSECT /* not used, */

View File

@ -1,6 +1,6 @@
var DOCUMENTATION_OPTIONS = {
URL_ROOT: document.getElementById("documentation_options").getAttribute('data-url_root'),
VERSION: 'v5.00.00.00',
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@ -77,7 +77,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -901,14 +901,14 @@
</li>
<li><a href="modules/cmpss.html#_CPPv422CMPSS_configOutputsLow8uint32_t8uint16_t">CMPSS_configOutputsLow (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/cmpss.html#_CPPv416CMPSS_configRamp8uint32_t8uint16_t8uint16_t8uint16_t8uint16_tb">CMPSS_configRamp (C++ function)</a>
</li>
<li><a href="modules/cmpss.html#_CPPv420CMPSS_configRampHigh8uint32_t19CMPSS_RampDirection8uint16_t8uint16_t8uint16_t8uint16_tb">CMPSS_configRampHigh (C++ function)</a>
</li>
<li><a href="modules/cmpss.html#_CPPv419CMPSS_configRampLow8uint32_t19CMPSS_RampDirection8uint16_t8uint16_t8uint16_t8uint16_tb">CMPSS_configRampLow (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/cmpss.html#_CPPv430CMPSS_configureFilterInputHigh8uint32_t17CMPSS_FilterInput">CMPSS_configureFilterInputHigh (C++ function)</a>
</li>
<li><a href="modules/cmpss.html#_CPPv429CMPSS_configureFilterInputLow8uint32_t17CMPSS_FilterInput">CMPSS_configureFilterInputLow (C++ function)</a>
@ -1008,6 +1008,20 @@
<li><a href="modules/cmpss.html#c.CMPSS_LOCMP_CTL_M">CMPSS_LOCMP_CTL_M (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_OR_ASYNC_OUT_W_FILT">CMPSS_OR_ASYNC_OUT_W_FILT (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC1">CMPSS_PWMSYNC1 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC2">CMPSS_PWMSYNC2 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC3">CMPSS_PWMSYNC3 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC4">CMPSS_PWMSYNC4 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC5">CMPSS_PWMSYNC5 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC6">CMPSS_PWMSYNC6 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#c.CMPSS_PWMSYNC7">CMPSS_PWMSYNC7 (C macro)</a>
</li>
<li><a href="modules/cmpss.html#_CPPv419CMPSS_RampDirection">CMPSS_RampDirection (C++ enum)</a>
</li>
@ -2000,6 +2014,8 @@
<li><a href="modules/epwm.html#_CPPv424EPWM_clearADCTriggerFlag8uint32_t29EPWM_ADCStartOfConversionType">EPWM_clearADCTriggerFlag (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv434EPWM_clearCycleByCycleTripZoneFlag8uint32_t8uint16_t">EPWM_clearCycleByCycleTripZoneFlag (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv441EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t">EPWM_clearDigitalCompareCaptureStatusFlag (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv435EPWM_clearEventTriggerInterruptFlag8uint32_t">EPWM_clearEventTriggerInterruptFlag (C++ function)</a>
</li>
@ -2028,6 +2044,8 @@
<li><a href="modules/epwm.html#_CPPv4N17EPWM_ClockDivider21EPWM_CLOCK_DIVIDER_64E">EPWM_ClockDivider::EPWM_CLOCK_DIVIDER_64 (C++ enumerator)</a>
</li>
<li><a href="modules/epwm.html#_CPPv4N17EPWM_ClockDivider20EPWM_CLOCK_DIVIDER_8E">EPWM_ClockDivider::EPWM_CLOCK_DIVIDER_8 (C++ enumerator)</a>
</li>
<li><a href="modules/epwm.html#_CPPv446EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb">EPWM_configureDigitalCompareCounterCaptureMode (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv420EPWM_configureSignal8uint32_tPK17EPWM_SignalParams">EPWM_configureSignal (C++ function)</a>
</li>
@ -2418,11 +2436,11 @@
<li><a href="modules/epwm.html#_CPPv434EPWM_getCounterCompareShadowStatus8uint32_t25EPWM_CounterCompareModule">EPWM_getCounterCompareShadowStatus (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv427EPWM_getCounterCompareValue8uint32_t25EPWM_CounterCompareModule">EPWM_getCounterCompareValue (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv438EPWM_getCycleByCycleTripZoneFlagStatus8uint32_t">EPWM_getCycleByCycleTripZoneFlagStatus (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/epwm.html#_CPPv438EPWM_getCycleByCycleTripZoneFlagStatus8uint32_t">EPWM_getCycleByCycleTripZoneFlagStatus (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv447EPWM_getDigitalCompareBlankingWindowLengthCount8uint32_t">EPWM_getDigitalCompareBlankingWindowLengthCount (C++ function)</a>
</li>
<li><a href="modules/epwm.html#_CPPv447EPWM_getDigitalCompareBlankingWindowOffsetCount8uint32_t">EPWM_getDigitalCompareBlankingWindowOffsetCount (C++ function)</a>
@ -3361,10 +3379,10 @@
</li>
<li><a href="modules/flash.html#_CPPv416Flash_initModule8uint32_t8uint32_t8uint16_t">Flash_initModule (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/flash.html#c.FLASH_O_TRIMCOMMIT">FLASH_O_TRIMCOMMIT (C macro)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/flash.html#c.FLASH_O_TRIMCTL">FLASH_O_TRIMCTL (C macro)</a>
</li>
<li><a href="modules/flash.html#c.FLASH_O_TRIMLOCK">FLASH_O_TRIMLOCK (C macro)</a>
@ -3386,6 +3404,10 @@
<li><a href="modules/flash.html#c.FLASH_TRIMLOCK_TRIMLOCKREAD_TRIMLOCKOTHER_M">FLASH_TRIMLOCK_TRIMLOCKREAD_TRIMLOCKOTHER_M (C macro)</a>
</li>
<li><a href="modules/flash.html#c.FLASH_TRIMLOCK_TRIMLOCKREAD_TRIMLOCKOTHER_S">FLASH_TRIMLOCK_TRIMLOCKREAD_TRIMLOCKOTHER_S (C macro)</a>
</li>
<li><a href="modules/flash.html#_CPPv416Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t">Flash_writeTrims (C++ function)</a>
</li>
<li><a href="modules/flash.html#c.FLASHCONFIG_BASE">FLASHCONFIG_BASE (C macro)</a>
</li>
<li><a href="modules/dcsm.html#c.FLSEM_KEY">FLSEM_KEY (C macro)</a>
</li>
@ -4181,10 +4203,10 @@
</li>
<li><a href="modules/i2c.html#_CPPv421I2C_sendStopCondition8uint32_t">I2C_sendStopCondition (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/i2c.html#_CPPv418I2C_setAddressMode8uint32_t15I2C_AddressMode">I2C_setAddressMode (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/i2c.html#_CPPv415I2C_setBitCount8uint32_t12I2C_BitCount">I2C_setBitCount (C++ function)</a>
</li>
<li><a href="modules/i2c.html#_CPPv413I2C_setConfig8uint32_t8uint16_t">I2C_setConfig (C++ function)</a>
@ -4358,6 +4380,8 @@
<li><a href="modules/interrupt.html#_CPPv420Interrupt_initModulev">Interrupt_initModule (C++ function)</a>
</li>
<li><a href="modules/interrupt.html#_CPPv425Interrupt_initVectorTablev">Interrupt_initVectorTable (C++ function)</a>
</li>
<li><a href="modules/interrupt.html#_CPPv420Interrupt_nmiHandlerv">Interrupt_nmiHandler (C++ function)</a>
</li>
<li><a href="modules/interrupt.html#_CPPv418Interrupt_register8uint32_tPFvvE">Interrupt_register (C++ function)</a>
</li>
@ -5097,10 +5121,10 @@
</li>
<li><a href="modules/mcan.html#_CPPv4N13MCAN_LpbkMode23MCAN_LPBK_MODE_INTERNALE">MCAN_LpbkMode::MCAN_LPBK_MODE_INTERNAL (C++ enumerator)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/mcan.html#_CPPv419MCAN_lpbkModeEnable8uint32_t8uint32_t8uint32_t">MCAN_lpbkModeEnable (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/mcan.html#c.MCAN_MAX_PAYLOAD_BYTES">MCAN_MAX_PAYLOAD_BYTES (C macro)</a>
</li>
<li><a href="modules/mcan.html#_CPPv412MCAN_MemType">MCAN_MemType (C++ enum)</a>
@ -5126,6 +5150,8 @@
<li><a href="modules/mcan.html#_CPPv4N12MCAN_PinType16MCAN_PIN_TYPE_TXE">MCAN_PinType::MCAN_PIN_TYPE_TX (C++ enumerator)</a>
</li>
<li><a href="modules/mcan.html#_CPPv419MCAN_ProtocolStatus">MCAN_ProtocolStatus (C++ struct)</a>
</li>
<li><a href="modules/mcan.html#_CPPv427MCAN_readHighPriorityMsgRam8uint32_tP17MCAN_RxBufElement">MCAN_readHighPriorityMsgRam (C++ function)</a>
</li>
<li><a href="modules/mcan.html#_CPPv415MCAN_readMsgRam8uint32_t8uint32_t8uint32_t8uint32_tP17MCAN_RxBufElement">MCAN_readMsgRam (C++ function)</a>
</li>
@ -6015,6 +6041,238 @@
<h2 id="S">S</h2>
<table style="width: 100%" class="indextable genindextable"><tr>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/sci.html#_CPPv424SCI_clearInterruptStatus8uint32_t8uint32_t">SCI_clearInterruptStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv423SCI_clearOverflowStatus8uint32_t">SCI_clearOverflowStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_PAR_MASK">SCI_CONFIG_PAR_MASK (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_STOP_MASK">SCI_CONFIG_STOP_MASK (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_STOP_ONE">SCI_CONFIG_STOP_ONE (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_STOP_TWO">SCI_CONFIG_STOP_TWO (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_1">SCI_CONFIG_WLEN_1 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_2">SCI_CONFIG_WLEN_2 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_3">SCI_CONFIG_WLEN_3 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_4">SCI_CONFIG_WLEN_4 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_5">SCI_CONFIG_WLEN_5 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_6">SCI_CONFIG_WLEN_6 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_7">SCI_CONFIG_WLEN_7 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_8">SCI_CONFIG_WLEN_8 (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_CONFIG_WLEN_MASK">SCI_CONFIG_WLEN_MASK (C macro)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_disableFIFO8uint32_t">SCI_disableFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv420SCI_disableInterrupt8uint32_t8uint32_t">SCI_disableInterrupt (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_disableLoopback8uint32_t">SCI_disableLoopback (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_disableModule8uint32_t">SCI_disableModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_disableRxModule8uint32_t">SCI_disableRxModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv420SCI_disableSleepMode8uint32_t">SCI_disableSleepMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_disableTxModule8uint32_t">SCI_disableTxModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv414SCI_enableFIFO8uint32_t">SCI_enableFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_enableInterrupt8uint32_t8uint32_t">SCI_enableInterrupt (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv418SCI_enableLoopback8uint32_t">SCI_enableLoopback (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv416SCI_enableModule8uint32_t">SCI_enableModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv418SCI_enableRxModule8uint32_t">SCI_enableRxModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_enableSleepMode8uint32_t">SCI_enableSleepMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv418SCI_enableTxModule8uint32_t">SCI_enableTxModule (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv413SCI_getConfig8uint32_t8uint32_tP8uint32_tP8uint32_t">SCI_getConfig (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv425SCI_getFIFOInterruptLevel8uint32_tP15SCI_TxFIFOLevelP15SCI_RxFIFOLevel">SCI_getFIFOInterruptLevel (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv422SCI_getInterruptStatus8uint32_t">SCI_getInterruptStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv421SCI_getOverflowStatus8uint32_t">SCI_getOverflowStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_getParityMode8uint32_t">SCI_getParityMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_getRxFIFOStatus8uint32_t">SCI_getRxFIFOStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_getRxStatus8uint32_t">SCI_getRxStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv419SCI_getTxFIFOStatus8uint32_t">SCI_getTxFIFOStatus (C++ function)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_FE">SCI_INT_FE (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_OE">SCI_INT_OE (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_PE">SCI_INT_PE (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_RXERR">SCI_INT_RXERR (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_RXFF">SCI_INT_RXFF (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_RXRDY_BRKDT">SCI_INT_RXRDY_BRKDT (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_TXFF">SCI_INT_TXFF (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_INT_TXRDY">SCI_INT_TXRDY (C macro)</a>
</li>
<li><a href="modules/sci.html#_CPPv426SCI_isDataAvailableNonFIFO8uint32_t">SCI_isDataAvailableNonFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_isFIFOEnabled8uint32_t">SCI_isFIFOEnabled (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv427SCI_isSpaceAvailableNonFIFO8uint32_t">SCI_isSpaceAvailableNonFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv421SCI_isTransmitterBusy8uint32_t">SCI_isTransmitterBusy (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv416SCI_lockAutobaud8uint32_t">SCI_lockAutobaud (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv414SCI_ParityType">SCI_ParityType (C++ enum)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N14SCI_ParityType19SCI_CONFIG_PAR_EVENE">SCI_ParityType::SCI_CONFIG_PAR_EVEN (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N14SCI_ParityType19SCI_CONFIG_PAR_NONEE">SCI_ParityType::SCI_CONFIG_PAR_NONE (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N14SCI_ParityType18SCI_CONFIG_PAR_ODDE">SCI_ParityType::SCI_CONFIG_PAR_ODD (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv424SCI_performSoftwareReset8uint32_t">SCI_performSoftwareReset (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_readCharArray8uint32_tPC8uint16_t8uint16_t">SCI_readCharArray (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv424SCI_readCharBlockingFIFO8uint32_t">SCI_readCharBlockingFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv427SCI_readCharBlockingNonFIFO8uint32_t">SCI_readCharBlockingNonFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv423SCI_readCharNonBlocking8uint32_t">SCI_readCharNonBlocking (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_resetChannels8uint32_t">SCI_resetChannels (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_resetRxFIFO8uint32_t">SCI_resetRxFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_resetTxFIFO8uint32_t">SCI_resetTxFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_RxFIFOLevel">SCI_RxFIFOLevel (C++ enum)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX0E">SCI_RxFIFOLevel::SCI_FIFO_RX0 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX1E">SCI_RxFIFOLevel::SCI_FIFO_RX1 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX10E">SCI_RxFIFOLevel::SCI_FIFO_RX10 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX11E">SCI_RxFIFOLevel::SCI_FIFO_RX11 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX12E">SCI_RxFIFOLevel::SCI_FIFO_RX12 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX13E">SCI_RxFIFOLevel::SCI_FIFO_RX13 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX14E">SCI_RxFIFOLevel::SCI_FIFO_RX14 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX15E">SCI_RxFIFOLevel::SCI_FIFO_RX15 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel13SCI_FIFO_RX16E">SCI_RxFIFOLevel::SCI_FIFO_RX16 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX2E">SCI_RxFIFOLevel::SCI_FIFO_RX2 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX3E">SCI_RxFIFOLevel::SCI_FIFO_RX3 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX4E">SCI_RxFIFOLevel::SCI_FIFO_RX4 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX5E">SCI_RxFIFOLevel::SCI_FIFO_RX5 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX6E">SCI_RxFIFOLevel::SCI_FIFO_RX6 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX7E">SCI_RxFIFOLevel::SCI_FIFO_RX7 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX8E">SCI_RxFIFOLevel::SCI_FIFO_RX8 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_RxFIFOLevel12SCI_FIFO_RX9E">SCI_RxFIFOLevel::SCI_FIFO_RX9 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_BREAK">SCI_RXSTATUS_BREAK (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_ERROR">SCI_RXSTATUS_ERROR (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_FRAMING">SCI_RXSTATUS_FRAMING (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_OVERRUN">SCI_RXSTATUS_OVERRUN (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_PARITY">SCI_RXSTATUS_PARITY (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_READY">SCI_RXSTATUS_READY (C macro)</a>
</li>
<li><a href="modules/sci.html#c.SCI_RXSTATUS_WAKE">SCI_RXSTATUS_WAKE (C macro)</a>
</li>
<li><a href="modules/sci.html#_CPPv429SCI_setAddrMultiProcessorMode8uint32_t">SCI_setAddrMultiProcessorMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv411SCI_setBaud8uint32_t8uint32_t8uint32_t">SCI_setBaud (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv413SCI_setConfig8uint32_t8uint32_t8uint32_t8uint32_t">SCI_setConfig (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv425SCI_setFIFOInterruptLevel8uint32_t15SCI_TxFIFOLevel15SCI_RxFIFOLevel">SCI_setFIFOInterruptLevel (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv429SCI_setIdleMultiProcessorMode8uint32_t">SCI_setIdleMultiProcessorMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv417SCI_setParityMode8uint32_t14SCI_ParityType">SCI_setParityMode (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_setWakeFlag8uint32_t">SCI_setWakeFlag (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv415SCI_TxFIFOLevel">SCI_TxFIFOLevel (C++ enum)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX0E">SCI_TxFIFOLevel::SCI_FIFO_TX0 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX1E">SCI_TxFIFOLevel::SCI_FIFO_TX1 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX10E">SCI_TxFIFOLevel::SCI_FIFO_TX10 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX11E">SCI_TxFIFOLevel::SCI_FIFO_TX11 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX12E">SCI_TxFIFOLevel::SCI_FIFO_TX12 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX13E">SCI_TxFIFOLevel::SCI_FIFO_TX13 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX14E">SCI_TxFIFOLevel::SCI_FIFO_TX14 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX15E">SCI_TxFIFOLevel::SCI_FIFO_TX15 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel13SCI_FIFO_TX16E">SCI_TxFIFOLevel::SCI_FIFO_TX16 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX2E">SCI_TxFIFOLevel::SCI_FIFO_TX2 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX3E">SCI_TxFIFOLevel::SCI_FIFO_TX3 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX4E">SCI_TxFIFOLevel::SCI_FIFO_TX4 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX5E">SCI_TxFIFOLevel::SCI_FIFO_TX5 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX6E">SCI_TxFIFOLevel::SCI_FIFO_TX6 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX7E">SCI_TxFIFOLevel::SCI_FIFO_TX7 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX8E">SCI_TxFIFOLevel::SCI_FIFO_TX8 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv4N15SCI_TxFIFOLevel12SCI_FIFO_TX9E">SCI_TxFIFOLevel::SCI_FIFO_TX9 (C++ enumerator)</a>
</li>
<li><a href="modules/sci.html#_CPPv418SCI_writeCharArray8uint32_tPCK8uint16_t8uint16_t">SCI_writeCharArray (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv425SCI_writeCharBlockingFIFO8uint32_t8uint16_t">SCI_writeCharBlockingFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv428SCI_writeCharBlockingNonFIFO8uint32_t8uint16_t">SCI_writeCharBlockingNonFIFO (C++ function)</a>
</li>
<li><a href="modules/sci.html#_CPPv424SCI_writeCharNonBlocking8uint32_t8uint16_t">SCI_writeCharNonBlocking (C++ function)</a>
</li>
<li><a href="modules/spi.html#_CPPv424SPI_clearInterruptStatus8uint32_t8uint32_t">SPI_clearInterruptStatus (C++ function)</a>
</li>
<li><a href="modules/spi.html#_CPPv415SPI_disableFIFO8uint32_t">SPI_disableFIFO (C++ function)</a>
@ -6439,6 +6697,8 @@
</li>
<li><a href="modules/sysctl.html#_CPPv4N16SysCtl_CpuRegSel33SYSCTL_REG_SEL_USER_REG3_PORESETNE">SysCtl_CpuRegSel::SYSCTL_REG_SEL_USER_REG3_PORESETN (C++ enumerator)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/sysctl.html#_CPPv4N16SysCtl_CpuRegSel33SYSCTL_REG_SEL_USER_REG4_PORESETNE">SysCtl_CpuRegSel::SYSCTL_REG_SEL_USER_REG4_PORESETN (C++ enumerator)</a>
</li>
<li><a href="modules/sysctl.html#_CPPv426SysCtl_Cputimer2ClkDivider">SysCtl_Cputimer2ClkDivider (C++ enum)</a>
@ -6555,8 +6815,6 @@
</li>
<li><a href="modules/sysctl.html#_CPPv417SysCtl_forceErrorv">SysCtl_forceError (C++ function)</a>
</li>
</ul></td>
<td style="width: 33%; vertical-align: top;"><ul>
<li><a href="modules/sysctl.html#_CPPv420SysCtl_forceNMIFlags8uint16_t">SysCtl_forceNMIFlags (C++ function)</a>
</li>
<li><a href="modules/sysctl.html#_CPPv415SysCtl_getClock8uint32_t">SysCtl_getClock (C++ function)</a>
@ -7612,7 +7870,7 @@
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -7632,7 +7890,7 @@
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@ -77,7 +77,7 @@
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@ -217,7 +217,7 @@
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
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</span></p>
</div>
@ -237,7 +237,7 @@
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@ -78,7 +78,7 @@
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@ -199,7 +199,7 @@ library source code.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -219,7 +219,7 @@ library source code.</p>
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@ -78,7 +78,7 @@
<div class="version">
v5.00.00.00
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</div>
@ -276,7 +276,7 @@ into depth on programming the peripherals.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -296,7 +296,7 @@ into depth on programming the peripherals.</p>
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@ -79,7 +79,7 @@
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v5.00.00.00
v5.01.00.00
</div>
@ -2129,7 +2129,7 @@ ADC_PPB1TRIPHI_HSIGN)<a class="headerlink" href="#c.ADC_PPBTRIP_MASK" title="Per
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -2149,7 +2149,7 @@ ADC_PPB1TRIPHI_HSIGN)<a class="headerlink" href="#c.ADC_PPBTRIP_MASK" title="Per
<script type="text/javascript">
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@ -79,7 +79,7 @@
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@ -800,7 +800,7 @@ additional functionality if available for that device.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -820,7 +820,7 @@ additional functionality if available for that device.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
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</div>
@ -1278,13 +1278,13 @@ objects, send and read messages, and setup and handle interrupts and events.</p>
<p>The <em>flags</em> parameter can be set as <strong>CAN_MSG_OBJ_NO_FLAGS</strong> if no flags are required or the parameter can be a logical OR of any of the following values:<ul class="simple">
<li><p><strong>CAN_MSG_OBJ_TX_INT_ENABLE</strong> - Enable Transmit Interrupts</p></li>
<li><p><strong>CAN_MSG_OBJ_RX_INT_ENABLE</strong> - Enable Receive Interrupts</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_ID_FILTER</strong> - Use filtering based on the Message ID</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_EXT_FILTER</strong> - Use filtering based on the Extended Message ID</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_ID_FILTER</strong> - Use filtering based on the Message ID (Standard or Extended)</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_EXT_FILTER</strong> - Use Extended Identifier Bit for filtering (Only among Extended IDs will be accepted)</p></li>
<li><p><strong>CAN_MSG_OBJ_USE_DIR_FILTER</strong> - Use filtering based on the direction of the transfer</p></li>
<li><p><strong>CAN_MSG_OBJ_FIFO</strong> - Message object is part of a FIFO structure and isnt the final message object in FIFO</p></li>
</ul>
</p>
<p>If filtering is based on message identifier, the value <strong>CAN_MSG_OBJ_USE_ID_FILTER</strong> has to be logically ORed with the <em>flag</em> parameter and <strong>CAN_MSG_OBJ_USE_EXT_FILTER</strong> also has to be ORed for message identifier filtering to be based on the extended identifier.</p>
<p>If filtering is based on message identifier (for Standard or Extended IDs) specified by the <em>msgIDMask</em> parameter, the value <strong>CAN_MSG_OBJ_USE_ID_FILTER</strong> has to be logically ORed with the <em>flag</em> parameter. If <strong>CAN_MSG_OBJ_USE_EXT_FILTER</strong> is ORed with the <em>flag</em> parameter, only extended identifier frames are accepted which can further be masked by using the flag above.</p>
<p><dl class="simple">
<dt><strong>Note</strong></dt><dd><p>The <strong>msgLen</strong><p> Parameter for the Receive Message Object is a “dont</p>
<p> care” but its value should be between 0-8 due to the assert.</p>
@ -1586,7 +1586,7 @@ can be re-enabled using CAN_enableController().</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -1606,7 +1606,7 @@ can be re-enabled using CAN_enableController().</p>
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@ -79,7 +79,7 @@
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@ -315,6 +315,48 @@ CMPSS_COMPCTL_ASYNCLEN)<a class="headerlink" href="#c.CMPSS_LOCMP_CTL_M" title="
<dd><p>DAC value is updated from the ramp register. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC1">
<span class="target" id="group__cmpss__api_1gab142adfd8e7960440469e7cf35a7acf2"></span><code class="sig-name descname">CMPSS_PWMSYNC1</code> 1U<a class="headerlink" href="#c.CMPSS_PWMSYNC1" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC1. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC2">
<span class="target" id="group__cmpss__api_1ga37dcf1159079f7646d06d0c8a3d6c700"></span><code class="sig-name descname">CMPSS_PWMSYNC2</code> 2U<a class="headerlink" href="#c.CMPSS_PWMSYNC2" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC2. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC3">
<span class="target" id="group__cmpss__api_1ga0f1252cb3e8a2e436b26c2948f3bbf27"></span><code class="sig-name descname">CMPSS_PWMSYNC3</code> 3U<a class="headerlink" href="#c.CMPSS_PWMSYNC3" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC3. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC4">
<span class="target" id="group__cmpss__api_1gaff7c5710b134e556086650f622b4429a"></span><code class="sig-name descname">CMPSS_PWMSYNC4</code> 4U<a class="headerlink" href="#c.CMPSS_PWMSYNC4" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC4. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC5">
<span class="target" id="group__cmpss__api_1gaa677cc8b4ed0fa6f032c95999f4c067e"></span><code class="sig-name descname">CMPSS_PWMSYNC5</code> 5U<a class="headerlink" href="#c.CMPSS_PWMSYNC5" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC5. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC6">
<span class="target" id="group__cmpss__api_1ga30395a94be81813cd5bb0061faebccdc"></span><code class="sig-name descname">CMPSS_PWMSYNC6</code> 6U<a class="headerlink" href="#c.CMPSS_PWMSYNC6" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC6. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.CMPSS_PWMSYNC7">
<span class="target" id="group__cmpss__api_1gae6202ecbf9ec5cca3c865a9f40727e0e"></span><code class="sig-name descname">CMPSS_PWMSYNC7</code> 7U<a class="headerlink" href="#c.CMPSS_PWMSYNC7" title="Permalink to this definition"></a><br /></dt>
<dd><p>PWMSYNC7. </p>
</dd></dl>
</div>
<div class="breathe-sectiondef docutils container">
<p class="breathe-sectiondef-title rubric">Enums</p>
@ -1747,7 +1789,7 @@ CMPSS_COMPCTL_ASYNCLEN)<a class="headerlink" href="#c.CMPSS_LOCMP_CTL_M" title="
</dd>
</dl>
</p>
<p>The number of the PWMSYNC signal to be used to reset the ramp generator should be specified by passing it into the <em>pwmSyncSrc</em> parameter. For instance, passing a 2 into <em>pwmSyncSrc</em> will select PWMSYNC2.</p>
<p>The number of the PWMSYNC signal to be used to reset the ramp generator should be specified by passing it into the <em>pwmSyncSrc</em> parameter. For instance, passing a CMPSS_PWMSYNCx into <em>pwmSyncSrc</em> will select PWMSYNCx.</p>
<p>To indicate whether the ramp generator should reset with the value from the ramp max reference value shadow register or with the latched ramp max reference value, use the <em>useRampValShdw</em> parameter. Passing it <strong>true</strong> will result in the latched value being bypassed. The ramp generator will be loaded right from the shadow register. A value of <strong>false</strong> will load the ramp generator from the latched value.</p>
<p><dl class="simple">
<dt><strong>Note</strong></dt><dd><p>This API is not valid for CMPSS-Lite IP.</p>
@ -1779,7 +1821,7 @@ CMPSS_COMPCTL_ASYNCLEN)<a class="headerlink" href="#c.CMPSS_LOCMP_CTL_M" title="
</dl>
</p>
<p>Values for parameters <em>rampDir</em>, <em>rampRef</em>, <em>stepVal</em>, <em>delayVal</em> and <em>pwmSyncSrc</em> may be set individually using <strong><a class="reference internal" href="#group__cmpss__api_1ga1b7e0af6c30d074d755d6bf4f1d6dba5"><span class="std std-ref">CMPSS_setRampDirectionHigh()</span></a></strong>, <strong><a class="reference internal" href="#group__cmpss__api_1ga0eca6b537c641943da3e04c2f4fc667e"><span class="std std-ref">CMPSS_setRampReferenceHigh()</span></a></strong>, <strong><a class="reference internal" href="#group__cmpss__api_1gafc0f6ce82c88bffcfc025ac3dc90a6e2"><span class="std std-ref">CMPSS_setRampStepHigh()</span></a></strong>, <strong><a class="reference internal" href="#group__cmpss__api_1ga9c39f70f91378dbe3009cb07430b901c"><span class="std std-ref">CMPSS_setRampDelayHigh()</span></a></strong> and <strong><a class="reference internal" href="#group__cmpss__api_1gafef09bb0fdce9d18ffeb9fd5778312bb"><span class="std std-ref">CMPSS_configureSyncSourceHigh()</span></a></strong> APIs respectively.</p>
<p>The number of the PWMSYNC signal to be used to reset the ramp generator should be specified by passing it into the <em>pwmSyncSrc</em> parameter. For instance, passing a 2 into <em>pwmSyncSrc</em> will select PWMSYNC2.</p>
<p>The number of the PWMSYNC signal to be used to reset the ramp generator should be specified by passing it into the <em>pwmSyncSrc</em> parameter. For instance, passing a CMPSS_PWMSYNCx into <em>pwmSyncSrc</em> will select PWMSYNCx.</p>
<p>To indicate whether the ramp generator should reset with the value from the ramp reference value shadow register or with the latched ramp reference value, use the <em>useRampValShdw</em> parameter. Passing it <strong>true</strong> will result in the latched value being bypassed. The ramp generator will be loaded right from the shadow register. A value of <strong>false</strong> will load the ramp generator from the latched value.</p>
<p><dl class="simple">
<dt><strong>Note</strong></dt><dd><p>This API is not valid for CMPSS-Lite IP.</p>
@ -1809,7 +1851,7 @@ CMPSS_COMPCTL_ASYNCLEN)<a class="headerlink" href="#c.CMPSS_LOCMP_CTL_M" title="
</dl>
</p>
<p>Values for parameters <em>rampDir</em>, <em>rampRef</em>, <em>stepVal</em>, <em>delayVal</em> and <em>pwmSyncSrc</em> may be set individually using <strong><a class="reference internal" href="#group__cmpss__api_1gab51fdd7a2dd897349977edfd1e48c8fd"><span class="std std-ref">CMPSS_setRampDirectionLow()</span></a></strong>, <strong><a class="reference internal" href="#group__cmpss__api_1ga4b90b11463732886658797e183c6f7a0"><span class="std std-ref">CMPSS_setRampReferenceLow()</span></a></strong>, <strong><a class="reference internal" href="#group__cmpss__api_1ga67729780873766289ce7e25c19010aeb"><span class="std std-ref">CMPSS_setRampStepLow()</span></a></strong>, <strong><a class="reference internal" href="#group__cmpss__api_1ga0ab9fe3fa1eeb8f143323cc71ac7eb13"><span class="std std-ref">CMPSS_setRampDelayLow()</span></a></strong> and <strong><a class="reference internal" href="#group__cmpss__api_1ga81aa2e0672bbd51e8675a2d7974fe5b5"><span class="std std-ref">CMPSS_configureSyncSourceLow()</span></a></strong> APIs respectively.</p>
<p>The number of the PWMSYNC signal to be used to reset the ramp generator should be specified by passing it into the <em>pwmSyncSrc</em> parameter. For instance, passing a 2 into <em>pwmSyncSrc</em> will select PWMSYNC2.</p>
<p>The number of the PWMSYNC signal to be used to reset the ramp generator should be specified by passing it into the <em>pwmSyncSrc</em> parameter. For instance, passing a CMPSS_PWMSYNCx into <em>pwmSyncSrc</em> will select PWMSYNCx.</p>
<p>To indicate whether the ramp generator should reset with the value from the ramp reference value shadow register or with the latched ramp reference value, use the <em>useRampValShdw</em> parameter. Passing it <strong>true</strong> will result in the latched value being bypassed. The ramp generator will be loaded right from the shadow register. A value of <strong>false</strong> will load the ramp generator from the latched value.</p>
<p><dl class="simple">
<dt><strong>Note</strong></dt><dd><p>This API is not valid for CMPSS-Lite IP.</p>
@ -1844,7 +1886,7 @@ showing what resources the comparators share and what they contain separately.</
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -1864,7 +1906,7 @@ showing what resources the comparators share and what they contain separately.</
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@ -79,7 +79,7 @@
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</div>
@ -562,7 +562,7 @@ overflow flag.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
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@ -582,7 +582,7 @@ overflow flag.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -863,7 +863,7 @@ enabling interrupt signals, and reading the various clock counters.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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@ -883,7 +883,7 @@ enabling interrupt signals, and reading the various clock counters.</p>
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@ -79,7 +79,7 @@
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v5.00.00.00
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</div>
@ -1346,7 +1346,7 @@ release the Flash pump to operate on a specific zone.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -1366,7 +1366,7 @@ release the Flash pump to operate on a specific zone.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1570,7 +1570,7 @@ The necessary APIs are also provided for PWM mode of operation.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -1590,7 +1590,7 @@ The necessary APIs are also provided for PWM mode of operation.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -192,7 +192,7 @@ EPG driver provides functions for independent clock generation and clock divisio
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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@ -212,7 +212,7 @@ EPG driver provides functions for independent clock generation and clock divisio
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -3128,7 +3128,7 @@ EPWM_SYNCOUTEN_DCBEVT1EN)<a class="headerlink" href="#c.EPWM_SYNC_OUT_SOURCE_M"
<dd><p>Enables sync-out pulse source.</p>
<p><p>This function enables the sync-out pulse source. Below valid values for param </p>
<strong>source</strong> can be ORd together to enable multiple sync-out sources:<ul class="simple">
<li><p>EPWM_SYNC_OUT_PULSE_ON_SOFTWARE - sync-out pulse is generated by software when <a class="reference internal" href="#group__epwm__api_1ga65711f2f1bc2e91afeba3308f8d72f92"><span class="std std-ref">EPWM_forceSyncPulse()</span></a> function is called or by EPWMxSYNCI signal.</p></li>
<li><p>EPWM_SYNC_OUT_PULSE_ON_SOFTWARE - sync-out pulse is generated by software when <a class="reference internal" href="#group__epwm__api_1ga65711f2f1bc2e91afeba3308f8d72f92"><span class="std std-ref">EPWM_forceSyncPulse()</span></a> function is called.</p></li>
<li><p>EPWM_SYNC_OUT_PULSE_ON_CNTR_ZERO - sync-out pulse is generated when time base counter equals zero.</p></li>
<li><p>EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_B - sync-out pulse is generated when time base counter equals compare B value.</p></li>
<li><p>EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_C - sync-out pulse is generated when time base counter equals compare C value.</p></li>
@ -6519,6 +6519,41 @@ EPWM_SYNCOUTEN_DCBEVT1EN)<a class="headerlink" href="#c.EPWM_SYNC_OUT_SOURCE_M"
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv441EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t">
<span id="_CPPv341EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t"></span><span id="_CPPv241EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t"></span><span id="EPWM_clearDigitalCompareCaptureStatusFlag__uint32_t"></span><span class="target" id="group__epwm__api_1ga2c3f4750596fa2f92912ee4ebc14c00e"></span>void <code class="sig-name descname">EPWM_clearDigitalCompareCaptureStatusFlag</code><span class="sig-paren">(</span>uint32_t <em>base</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv441EPWM_clearDigitalCompareCaptureStatusFlag8uint32_t" title="Permalink to this definition"></a><br /></dt>
<dd><p>Clears DC capture latched status flag</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
<li><p><code class="docutils literal notranslate"><span class="pre">base</span></code>: is the base address of the EPWM module. This function is used to clear the CAPSTS (set) condition.</p></li>
</ul>
</dd>
</dl>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv446EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb">
<span id="_CPPv346EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb"></span><span id="_CPPv246EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb"></span><span id="EPWM_configureDigitalCompareCounterCaptureMode__uint32_t.b"></span><span class="target" id="group__epwm__api_1gafdda4b0ad8a6339c0d21c829770e85ed"></span>void <code class="sig-name descname">EPWM_configureDigitalCompareCounterCaptureMode</code><span class="sig-paren">(</span>uint32_t <em>base</em>, bool <em>disableClearMode</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv446EPWM_configureDigitalCompareCounterCaptureMode8uint32_tb" title="Permalink to this definition"></a><br /></dt>
<dd><p>Configures DC capture operating mode</p>
<p><p>This function is used to configure the DC capture operating mode. If </p>
<em>disableClearMode</em> is false, the TBCNT value is captured in active register on occurance of DCEVTFILT event. The trip events are ignored until next PRD or ZRO event re-triggers the capture mechanism. If <em>disableClearMode</em> is true, the TBCNT value is captured, CAPSTS flag is set and further trips are ignored until CAPSTS bit is cleared.<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
<li><p><code class="docutils literal notranslate"><span class="pre">base</span></code>: is the base address of the EPWM module. </p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">disableClearMode</span></code>: is the clear mode bit.</p></li>
</ul>
</dd>
</dl>
</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
</dl>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv434EPWM_getDigitalCompareCaptureCount8uint32_t">
<span id="_CPPv334EPWM_getDigitalCompareCaptureCount8uint32_t"></span><span id="_CPPv234EPWM_getDigitalCompareCaptureCount8uint32_t"></span><span id="EPWM_getDigitalCompareCaptureCount__uint32_t"></span><span class="target" id="group__epwm__api_1gaa15bdeca5d53a319646f3f4c12c2fcfb"></span>uint16_t <code class="sig-name descname">EPWM_getDigitalCompareCaptureCount</code><span class="sig-paren">(</span>uint32_t <em>base</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv434EPWM_getDigitalCompareCaptureCount8uint32_t" title="Permalink to this definition"></a><br /></dt>
@ -7182,7 +7217,7 @@ EPWM_SYNCOUTEN_DCBEVT1EN)<a class="headerlink" href="#c.EPWM_SYNC_OUT_SOURCE_M"
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -7202,7 +7237,7 @@ EPWM_SYNCOUTEN_DCBEVT1EN)<a class="headerlink" href="#c.EPWM_SYNC_OUT_SOURCE_M"
<script type="text/javascript">
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -967,6 +967,7 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> - Strobe event latch</p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> - Index event latch</p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out</p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> - QMA error</p></li>
</ul>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
@ -1000,6 +1001,7 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> - Strobe event latch</p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> - Index event latch</p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out</p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> - QMA error</p></li>
</ul>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
@ -1041,7 +1043,8 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_POS_COMP_MATCH</strong> - Position-compare match</p></li>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> - Strobe event latch</p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> - Index event latch</p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out </p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out</p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> - QMA error </p></li>
</ul>
</p>
</dd>
@ -1067,6 +1070,7 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> - Strobe event latch</p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> - Index event latch</p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> - Unit time-out</p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> - QMA error</p></li>
</ul>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
@ -1101,6 +1105,7 @@ the module can generate.</p>
<li><p><strong>EQEP_INT_STROBE_EVNT_LATCH</strong> </p></li>
<li><p><strong>EQEP_INT_INDEX_EVNT_LATCH</strong> </p></li>
<li><p><strong>EQEP_INT_UNIT_TIME_OUT</strong> </p></li>
<li><p><strong>EQEP_INT_QMA_ERROR</strong> </p></li>
</ul>
<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
@ -1883,7 +1888,7 @@ the module can generate.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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</span></p>
</div>
@ -1903,7 +1908,7 @@ the module can generate.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -178,11 +178,16 @@ Flash ECC test mode registers and the Flash ECC error status registers.</p>
<dd><div class="breathe-sectiondef docutils container">
<p class="breathe-sectiondef-title rubric">Defines</p>
<dl class="cpp macro">
<dt id="c.FLASH_O_TRIMCTL">
<span class="target" id="group__flash__api_1ga669ee40363b47a7aaaf886ca0bda7ff9"></span><code class="sig-name descname">FLASH_O_TRIMCTL</code> 0x1600U<a class="headerlink" href="#c.FLASH_O_TRIMCTL" title="Permalink to this definition"></a><br /></dt>
<dt id="c.FLASHCONFIG_BASE">
<span class="target" id="group__flash__api_1ga276efbf257505771d8cb5be4b391465b"></span><code class="sig-name descname">FLASHCONFIG_BASE</code> 0x00051000U<a class="headerlink" href="#c.FLASHCONFIG_BASE" title="Permalink to this definition"></a><br /></dt>
<dd><p>Flash Trim Defines. </p>
</dd></dl>
<dl class="cpp macro">
<dt id="c.FLASH_O_TRIMCTL">
<span class="target" id="group__flash__api_1ga669ee40363b47a7aaaf886ca0bda7ff9"></span><code class="sig-name descname">FLASH_O_TRIMCTL</code> 0x1600U<a class="headerlink" href="#c.FLASH_O_TRIMCTL" title="Permalink to this definition"></a><br /></dt>
<dd></dd></dl>
<dl class="cpp macro">
<dt id="c.FLASH_O_TRIMLOCK">
<span class="target" id="group__flash__api_1gad0f5c305e1406602eefa53fa29d91597"></span><code class="sig-name descname">FLASH_O_TRIMLOCK</code> 0x1604U<a class="headerlink" href="#c.FLASH_O_TRIMLOCK" title="Permalink to this definition"></a><br /></dt>
@ -449,6 +454,17 @@ Flash ECC test mode registers and the Flash ECC error status registers.</p>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv416Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t">
<span id="_CPPv316Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t"></span><span id="_CPPv216Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t"></span><span id="Flash_writeTrims__uint32_t.uint32_t.uint32_t.uint32_t"></span><span class="target" id="group__flash__api_1ga91c808f852b3ffff3460f869647b9345"></span>void <code class="sig-name descname">Flash_writeTrims</code><span class="sig-paren">(</span>uint32_t <em>reg_offset</em>, uint32_t <em>mask</em>, uint32_t <em>shift</em>, uint32_t <em>value</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv416Flash_writeTrims8uint32_t8uint32_t8uint32_t8uint32_t" title="Permalink to this definition"></a><br /></dt>
<dd><p>Initializes the flash trim registers.</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
</dl>
</p>
</dd></dl>
</div>
</dd></dl>
@ -469,7 +485,7 @@ Flash ECC test mode registers and the Flash ECC error status registers.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
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</div>
@ -489,7 +505,7 @@ Flash ECC test mode registers and the Flash ECC error status registers.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1170,7 +1170,7 @@ GPIO_writePin(), and GPIO_togglePin().</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -1190,7 +1190,7 @@ GPIO_writePin(), and GPIO_togglePin().</p>
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@ -79,7 +79,7 @@
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</div>
@ -1911,7 +1911,7 @@ than would be attainable just using the main CPU clock.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
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@ -1931,7 +1931,7 @@ than would be attainable just using the main CPU clock.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
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</div>
@ -1633,7 +1633,7 @@ will read the data from the receive buffer and return it.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
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<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -1653,7 +1653,7 @@ will read the data from the receive buffer and return it.</p>
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@ -78,7 +78,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -227,7 +227,7 @@
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -247,7 +247,7 @@
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -374,6 +374,17 @@ wherever a function has an e interruptNumber parameter.</p>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv420Interrupt_nmiHandlerv">
<span id="_CPPv320Interrupt_nmiHandlerv"></span><span id="_CPPv220Interrupt_nmiHandlerv"></span><span id="Interrupt_nmiHandler__void"></span><span class="target" id="group__interrupt__api_1gaadc214138b9d50e3883b8683fc3e0a11"></span>void <code class="sig-name descname">Interrupt_nmiHandler</code><span class="sig-paren">(</span>void<span class="sig-paren">)</span><a class="headerlink" href="#_CPPv420Interrupt_nmiHandlerv" title="Permalink to this definition"></a><br /></dt>
<dd><p>The default non-maskable interrupt handler.</p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
</dl>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv422Interrupt_enableGlobalv">
<span id="_CPPv322Interrupt_enableGlobalv"></span><span id="_CPPv222Interrupt_enableGlobalv"></span><span id="Interrupt_enableGlobal__void"></span><span class="target" id="group__interrupt__api_1ga4f67f455d71a7e2adfdbc2efe1dc044e"></span>bool <code class="sig-name descname">Interrupt_enableGlobal</code><span class="sig-paren">(</span>void<span class="sig-paren">)</span><a class="headerlink" href="#_CPPv422Interrupt_enableGlobalv" title="Permalink to this definition"></a><br /></dt>
@ -644,7 +655,7 @@ at the end of the ISR.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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</span></p>
</div>
@ -664,7 +675,7 @@ at the end of the ISR.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -971,7 +971,7 @@ send and receive data, and setup interrupt event handling.</p>
<dl class="cpp function">
<dt id="_CPPv422LIN_setMaximumBaudRate8uint32_t8uint32_t">
<span id="_CPPv322LIN_setMaximumBaudRate8uint32_t8uint32_t"></span><span id="_CPPv222LIN_setMaximumBaudRate8uint32_t8uint32_t"></span><span id="LIN_setMaximumBaudRate__uint32_t.uint32_t"></span><span class="target" id="group__lin__api_1ga922c7794122ec0a1bad34b5777f8c73c"></span>void <code class="sig-name descname">LIN_setMaximumBaudRate</code><span class="sig-paren">(</span>uint32_t <em>base</em>, uint32_t <em>clock</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv422LIN_setMaximumBaudRate8uint32_t8uint32_t" title="Permalink to this definition"></a><br /></dt>
<span id="_CPPv322LIN_setMaximumBaudRate8uint32_t8uint32_t"></span><span id="_CPPv222LIN_setMaximumBaudRate8uint32_t8uint32_t"></span><span id="LIN_setMaximumBaudRate__uint32_t.uint32_t"></span><span class="target" id="group__lin__api_1ga4d116db44b17983014b9d39df55ce9bf"></span>void <code class="sig-name descname">LIN_setMaximumBaudRate</code><span class="sig-paren">(</span>uint32_t <em>base</em>, uint32_t <em>systemClock</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv422LIN_setMaximumBaudRate8uint32_t8uint32_t" title="Permalink to this definition"></a><br /></dt>
<dd><p>Set Maximum Baud Rate Prescaler</p>
<p><p>In LIN mode only, this function is used to set the maximum baud rate prescaler used during synchronization phase of a responder module if the ADAPT bit is set. The maximum baud rate prescaler is used by the wakeup and idle timer counters for a constant 4 second expiration time relative to a 20kHz rate.</p>
<dl class="simple">
@ -3293,7 +3293,7 @@ applications.</p>
<p>
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<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -3313,7 +3313,7 @@ applications.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1146,7 +1146,7 @@ MCAN_IR_ARA_MASK)<a class="headerlink" href="#c.MCAN_INTR_MASK_ALL" title="Perma
<dl class="cpp function">
<dt id="_CPPv415MCAN_readMsgRam8uint32_t8uint32_t8uint32_t8uint32_tP17MCAN_RxBufElement">
<span id="_CPPv315MCAN_readMsgRam8uint32_t8uint32_t8uint32_t8uint32_tP17MCAN_RxBufElement"></span><span id="_CPPv215MCAN_readMsgRam8uint32_t8uint32_t8uint32_t8uint32_tP17MCAN_RxBufElement"></span><span id="MCAN_readMsgRam__uint32_t.uint32_t.uint32_t.uint32_t.MCAN_RxBufElementP"></span><span class="target" id="group__mcan__api_1gab7f5ca9e1bf82489a130afbb64a675cf"></span>void <code class="sig-name descname">MCAN_readMsgRam</code><span class="sig-paren">(</span>uint32_t <em>baseAddr</em>, uint32_t <em>memType</em>, uint32_t <em>bufNum</em>, uint32_t <em>fifoNum</em>, <a class="reference internal" href="#_CPPv417MCAN_RxBufElement" title="MCAN_RxBufElement">MCAN_RxBufElement</a> *<em>elem</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv415MCAN_readMsgRam8uint32_t8uint32_t8uint32_t8uint32_tP17MCAN_RxBufElement" title="Permalink to this definition"></a><br /></dt>
<dd><p>This API is used to read received message form message RAM. </p>
<dd><p>This API is used to read received message from Message RAM. </p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
@ -1165,7 +1165,7 @@ MCAN_IR_ARA_MASK)<a class="headerlink" href="#c.MCAN_INTR_MASK_ALL" title="Perma
<dl class="cpp function">
<dt id="_CPPv420MCAN_readTxEventFIFO8uint32_tP23MCAN_TxEventFIFOElement">
<span id="_CPPv320MCAN_readTxEventFIFO8uint32_tP23MCAN_TxEventFIFOElement"></span><span id="_CPPv220MCAN_readTxEventFIFO8uint32_tP23MCAN_TxEventFIFOElement"></span><span id="MCAN_readTxEventFIFO__uint32_t.MCAN_TxEventFIFOElementP"></span><span class="target" id="group__mcan__api_1ga4a86d17e792e22905cdd13d826bc4302"></span>void <code class="sig-name descname">MCAN_readTxEventFIFO</code><span class="sig-paren">(</span>uint32_t <em>baseAddr</em>, <a class="reference internal" href="#_CPPv423MCAN_TxEventFIFOElement" title="MCAN_TxEventFIFOElement">MCAN_TxEventFIFOElement</a> *<em>txEventElem</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv420MCAN_readTxEventFIFO8uint32_tP23MCAN_TxEventFIFOElement" title="Permalink to this definition"></a><br /></dt>
<dd><p>This API is used to read message form Tx Event FIFO. </p>
<dd><p>This API is used to read from Tx Event FIFO. </p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
@ -1392,6 +1392,22 @@ MCAN_IR_ARA_MASK)<a class="headerlink" href="#c.MCAN_INTR_MASK_ALL" title="Perma
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv427MCAN_readHighPriorityMsgRam8uint32_tP17MCAN_RxBufElement">
<span id="_CPPv327MCAN_readHighPriorityMsgRam8uint32_tP17MCAN_RxBufElement"></span><span id="_CPPv227MCAN_readHighPriorityMsgRam8uint32_tP17MCAN_RxBufElement"></span><span id="MCAN_readHighPriorityMsgRam__uint32_t.MCAN_RxBufElementP"></span><span class="target" id="group__mcan__api_1gaf866a1df174c6aa66b73db3c8ce91c63"></span>void <code class="sig-name descname">MCAN_readHighPriorityMsgRam</code><span class="sig-paren">(</span>uint32_t <em>baseAddr</em>, <a class="reference internal" href="#_CPPv417MCAN_RxBufElement" title="MCAN_RxBufElement">MCAN_RxBufElement</a> *<em>elem</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv427MCAN_readHighPriorityMsgRam8uint32_tP17MCAN_RxBufElement" title="Permalink to this definition"></a><br /></dt>
<dd><p>This API will read the High Priority message object from Message RAM. </p>
<p><dl class="simple">
<dt><strong>Return</strong></dt><dd><p>None. </p>
</dd>
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
<li><p><code class="docutils literal notranslate"><span class="pre">baseAddr</span></code>: Base Address of the MCAN Registers. </p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">elem</span></code>: Message Object. Refer struct <a class="reference internal" href="#struct_m_c_a_n___rx_buf_element"><span class="std std-ref">MCAN_RxBufElement</span></a>.</p></li>
</ul>
</dd>
</dl>
</p>
</dd></dl>
<dl class="cpp function">
<dt id="_CPPv420MCAN_getRxFIFOStatus8uint32_tP17MCAN_RxFIFOStatus">
<span id="_CPPv320MCAN_getRxFIFOStatus8uint32_tP17MCAN_RxFIFOStatus"></span><span id="_CPPv220MCAN_getRxFIFOStatus8uint32_tP17MCAN_RxFIFOStatus"></span><span id="MCAN_getRxFIFOStatus__uint32_t.MCAN_RxFIFOStatusP"></span><span class="target" id="group__mcan__api_1gaefbff5d60072f7b330b0976b2389c283"></span>void <code class="sig-name descname">MCAN_getRxFIFOStatus</code><span class="sig-paren">(</span>uint32_t <em>baseAddr</em>, <a class="reference internal" href="#_CPPv417MCAN_RxFIFOStatus" title="MCAN_RxFIFOStatus">MCAN_RxFIFOStatus</a> *<em>fifoStatus</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv420MCAN_getRxFIFOStatus8uint32_tP17MCAN_RxFIFOStatus" title="Permalink to this definition"></a><br /></dt>
@ -2238,7 +2254,7 @@ applications.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
<span class="lastupdated">Last updated on Nov 09, 2023.
</span></p>
</div>
@ -2258,7 +2274,7 @@ applications.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -1113,7 +1113,7 @@ detailed description to be sure.</p>
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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</span></p>
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@ -1133,7 +1133,7 @@ detailed description to be sure.</p>
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@ -79,7 +79,7 @@
<div class="version">
v5.00.00.00
v5.01.00.00
</div>
@ -511,7 +511,7 @@ any data from the winning master.</p>
<dl class="cpp macro">
<dt id="c.PMBUS_MODULE_FREQ_MIN">
<span class="target" id="group__pmbus__api_1ga4422b69069077d4be231cb76a01247a5"></span><code class="sig-name descname">PMBUS_MODULE_FREQ_MIN</code> (<a class="reference internal" href="#group__pmbus__api_1ga4732e3857d92b9278c884a76493942fd"><span class="std std-ref">PMBUS_SYS_FREQ_MIN</span></a> / 32)<a class="headerlink" href="#c.PMBUS_MODULE_FREQ_MIN" title="Permalink to this definition"></a><br /></dt>
<span class="target" id="group__pmbus__api_1ga4422b69069077d4be231cb76a01247a5"></span><code class="sig-name descname">PMBUS_MODULE_FREQ_MIN</code> (<a class="reference internal" href="#group__pmbus__api_1ga4732e3857d92b9278c884a76493942fd"><span class="std std-ref">PMBUS_SYS_FREQ_MIN</span></a> / 32U)<a class="headerlink" href="#c.PMBUS_MODULE_FREQ_MIN" title="Permalink to this definition"></a><br /></dt>
<dd><p>Min module frequency = min_sys_freq / 32. </p>
</dd></dl>
@ -2887,7 +2887,7 @@ the data byte(s).}
<p>
<a href="https://www.ti.com/corp/docs/legal/copyright.shtml">2021, Texas Instruments Incorporated</a>, Texas Instruments Incorporated. All rights reserved. <br/>
<a href="https://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="https://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="https://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="https://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
<span class="lastupdated">Last updated on Jul 01, 2023.
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</div>
@ -2907,7 +2907,7 @@ the data byte(s).}
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@ -79,7 +79,7 @@
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</div>
@ -1787,7 +1787,7 @@ wait in a while-loop for data to become available.</p>
<p>
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@ -1807,7 +1807,7 @@ wait in a while-loop for data to become available.</p>
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@ -79,7 +79,7 @@
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v5.00.00.00
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</div>
@ -3249,7 +3249,7 @@ about resets and missing clock detection failures.</p>
<span id="_CPPv320SysCtl_simulateReset8uint32_t"></span><span id="_CPPv220SysCtl_simulateReset8uint32_t"></span><span id="SysCtl_simulateReset__uint32_t"></span><span class="target" id="group__sysctl__api_1gaadfc83982fbd2d0ea9f6d426ca7f7f91"></span>void <code class="sig-name descname">SysCtl_simulateReset</code><span class="sig-paren">(</span>uint32_t <em>rstCauses</em><span class="sig-paren">)</span><a class="headerlink" href="#_CPPv420SysCtl_simulateReset8uint32_t" title="Permalink to this definition"></a><br /></dt>
<dd><p>Simulates a reset to the CPU1</p>
<p><p>The </p>
<em>rstCauses</em> parameter can be one/ more of these values: SYSCTL_CAUSE_CPU1RSN or SYSCTL_CAUSE_XRS<dl class="simple">
<em>rstCauses</em> parameter can be one/ more of these values: SYSCTL_SIMRESET_CPU1RSN or SYSCTL_SIMRESET_XRSN<dl class="simple">
<dt><strong>Parameters</strong></dt><dd><ul class="breatheparameterlist simple">
<li><p><code class="docutils literal notranslate"><span class="pre">rstCauses</span></code>: is the cause for the reset.</p></li>
</ul>
@ -3996,7 +3996,7 @@ others used for the configuration of SysCtl.</p>
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@ -4016,7 +4016,7 @@ others used for the configuration of SysCtl.</p>
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@ -79,7 +79,7 @@
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v5.00.00.00
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</div>
@ -176,7 +176,7 @@ number of the driverlib.lib that is in use.</p>
<p class="breathe-sectiondef-title rubric">Defines</p>
<dl class="cpp macro">
<dt id="c.VERSION_NUMBER">
<span class="target" id="group__version__api_1gaffb1ffbd24de6be88bd8ac877aae1688"></span><code class="sig-name descname">VERSION_NUMBER</code> 5000000U<a class="headerlink" href="#c.VERSION_NUMBER" title="Permalink to this definition"></a><br /></dt>
<span class="target" id="group__version__api_1gaffb1ffbd24de6be88bd8ac877aae1688"></span><code class="sig-name descname">VERSION_NUMBER</code> 5010000U<a class="headerlink" href="#c.VERSION_NUMBER" title="Permalink to this definition"></a><br /></dt>
<dd><p>Version number to be returned by <a class="reference internal" href="#group__version__api_1ga2cb8491755bc8131175570364076743f"><span class="std std-ref">Version_getLibVersion()</span></a> </p>
</dd></dl>
@ -215,7 +215,7 @@ number of the driverlib.lib that is in use.</p>
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@ -235,7 +235,7 @@ number of the driverlib.lib that is in use.</p>
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@ -78,7 +78,7 @@
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@ -1773,7 +1773,7 @@ each input.</p>
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@ -1793,7 +1793,7 @@ each input.</p>
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@ -76,7 +76,7 @@
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@ -157,7 +157,7 @@
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@ -177,7 +177,7 @@
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@ -78,7 +78,7 @@
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@ -267,7 +267,7 @@ found in Build -&gt; C2000 Compiler -&gt; Optimization.</p>
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@ -287,7 +287,7 @@ found in Build -&gt; C2000 Compiler -&gt; Optimization.</p>
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