diff --git a/kernel/.meta/freertos_tool/FREERTOS.syscfg.js b/kernel/.meta/freertos_tool/FREERTOS.syscfg.js index cdc8333..ec00df8 100644 --- a/kernel/.meta/freertos_tool/FREERTOS.syscfg.js +++ b/kernel/.meta/freertos_tool/FREERTOS.syscfg.js @@ -24,7 +24,7 @@ var config = [ { name: "freertosPath", displayName: "FreeRTOS Install Path", - default: "C:/FreeRTOSv202012_00", + default: "", fileFilter: ".*", hidden: true, pickDirectory: true, diff --git a/kernel/.meta/freertos_tool/FREERTOSToolComponents.js b/kernel/.meta/freertos_tool/FREERTOSToolComponents.js index 7c6607e..b89960d 100644 --- a/kernel/.meta/freertos_tool/FREERTOSToolComponents.js +++ b/kernel/.meta/freertos_tool/FREERTOSToolComponents.js @@ -9,7 +9,8 @@ if ([ "F2837xD", "F2838x", "F28002x", "F280013x", - "F280015x"].includes(system.deviceData.device)) + "F280015x", + "F28P65x"].includes(system.deviceData.device)) { freertos_export = { displayName: "FreeRTOS Configuration Tool", diff --git a/kernel/.meta/freertos_tool/templates/c2000_freertos.h.xdt b/kernel/.meta/freertos_tool/templates/c2000_freertos.h.xdt index a155003..ec6f750 100644 --- a/kernel/.meta/freertos_tool/templates/c2000_freertos.h.xdt +++ b/kernel/.meta/freertos_tool/templates/c2000_freertos.h.xdt @@ -164,7 +164,7 @@ extern uint8_t `queueInstance.queueStorageBuffer`[`queueInstance.queueLength` * // // Declare a variable to hold the handle of the created timer. // -extern TimerHandle_t `timerInstance.timerHandle` = NULL; +extern TimerHandle_t `timerInstance.timerHandle`; % if(timerInstance.createDynamicTimer == false) % { diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex1_c28x_led_blinky.projectspec b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex1_c28x_led_blinky.projectspec new file mode 100644 index 0000000..8cbc73e --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex1_c28x_led_blinky.projectspec @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex1_c28x_led_blinky_syscfg.projectspec b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex1_c28x_led_blinky_syscfg.projectspec new file mode 100644 index 0000000..4190545 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex1_c28x_led_blinky_syscfg.projectspec @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex2_c28x_dual_blinky.projectspec b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex2_c28x_dual_blinky.projectspec new file mode 100644 index 0000000..be115f1 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/CCS/freertos_ex2_c28x_dual_blinky.projectspec @@ -0,0 +1,90 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/FreeRTOSConfig.h b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/FreeRTOSConfig.h new file mode 100644 index 0000000..4dbb037 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/FreeRTOSConfig.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +//-------------------------------------------------------------------------------------------------- +// Application specific definitions. +// +// These definitions should be adjusted for your particular hardware and +// application requirements. +// +// THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE +// FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. +// +// See http://www.freertos.org/a00110.html. +//-------------------------------------------------------------------------------------------------- + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ( ( unsigned long ) 200000000 ) +#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 17 * 1024 ) ) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 + +// Set the following definitions to 1 to include the API function, or zero +// to exclude the API function. + +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 0 +#define INCLUDE_vTaskDelayUntil 0 +#define INCLUDE_vTaskDelay 1 + +#endif /* FREERTOS_CONFIG_H */ + diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_config/FreeRTOSConfig_ex1_led_blinky.h b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_config/FreeRTOSConfig_ex1_led_blinky.h new file mode 100644 index 0000000..63bd593 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_config/FreeRTOSConfig_ex1_led_blinky.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +//-------------------------------------------------------------------------------------------------- +// Application specific definitions. +// +// These definitions should be adjusted for your particular hardware and +// application requirements. +// +// THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE +// FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. +// +// See http://www.freertos.org/a00110.html. +//-------------------------------------------------------------------------------------------------- + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ( ( unsigned long ) 200000000 ) +#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 17 * 1024 ) ) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 0 + +// Set the following definitions to 1 to include the API function, or zero +// to exclude the API function. + +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 0 +#define INCLUDE_vTaskDelayUntil 0 +#define INCLUDE_vTaskDelay 1 + +#endif /* FREERTOS_CONFIG_H */ + diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_config/FreeRTOSConfig_ex2_dual_blinky.h b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_config/FreeRTOSConfig_ex2_dual_blinky.h new file mode 100644 index 0000000..17b674c --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_config/FreeRTOSConfig_ex2_dual_blinky.h @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +//-------------------------------------------------------------------------------------------------- +// Application specific definitions. +// +// These definitions should be adjusted for your particular hardware and +// application requirements. +// +// THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE +// FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. +// +// See http://www.freertos.org/a00110.html. +//-------------------------------------------------------------------------------------------------- + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ( ( unsigned long ) 200000000 ) +#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 8 * 1024 ) ) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 1 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_CO_ROUTINES 0 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 + +/* This option needs to be enabled to keep the heap memory in valid memory section + * as the c28x stack memory can be allocated in the lower 64k RAM memory only. + */ +#define configAPPLICATION_ALLOCATED_HEAP 1 + +// Set the following definitions to 1 to include the API function, or zero +// to exclude the API function. + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 + +#endif /* FREERTOS_CONFIG_H */ + diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky.c b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky.c new file mode 100644 index 0000000..eedc0a2 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky.c @@ -0,0 +1,238 @@ +/* + * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "driverlib.h" +#include "device.h" // Device Headerfile and Examples Include File +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +#define STACK_SIZE 256U +#define RED 0xDEADBEAF +#define BLUE 0xBAADF00D + +static StaticTask_t redTaskBuffer; +static StackType_t redTaskStack[STACK_SIZE]; + +static StaticTask_t blueTaskBuffer; +static StackType_t blueTaskStack[STACK_SIZE]; + +static StaticTask_t idleTaskBuffer; +static StackType_t idleTaskStack[STACK_SIZE]; + +static SemaphoreHandle_t xSemaphore = NULL; +static StaticSemaphore_t xSemaphoreBuffer; + +//------------------------------------------------------------------------------------------------- +void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName ) +{ + while(1); +} + +//------------------------------------------------------------------------------------------------- +static void blueLedToggle(void) +{ + static uint32_t counter = 0; + + counter++; + GPIO_writePin(DEVICE_GPIO_PIN_LED1, counter & 1); +} + +//------------------------------------------------------------------------------------------------- +static void redLedToggle(void) +{ + static uint32_t counter = 0; + + counter++; + GPIO_writePin(DEVICE_GPIO_PIN_LED2, counter & 1); +} + +//------------------------------------------------------------------------------------------------- +static void ledToggle(uint32_t led) +{ + if(RED == led) + { + redLedToggle(); + } + else + if(BLUE == led) + { + blueLedToggle(); + } +} +// +// configCPUTimer - This function initializes the selected timer to the +// period specified by the "freq" and "period" variables. The "freq" is +// CPU frequency in Hz and the period in uSeconds. The timer is held in +// the stopped state after configuration. +// +void +configCPUTimer(uint32_t cpuTimer, uint32_t period) +{ + uint32_t temp, freq = DEVICE_SYSCLK_FREQ; + + // + // Initialize timer period: + // + temp = ((freq / 1000000) * period); + CPUTimer_setPeriod(cpuTimer, temp); + + // + // Set pre-scale counter to divide by 1 (SYSCLKOUT): + // + CPUTimer_setPreScaler(cpuTimer, 0); + + // + // Initializes timer control register. The timer is stopped, reloaded, + // free run disabled, and interrupt enabled. + // Additionally, the free and soft bits are set + // + CPUTimer_stopTimer(cpuTimer); + CPUTimer_reloadTimerCounter(cpuTimer); + CPUTimer_setEmulationMode(cpuTimer, + CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT); + CPUTimer_enableInterrupt(cpuTimer); + +} + +//------------------------------------------------------------------------------------------------- +interrupt void timer1_ISR( void ) +{ + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + + xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken ); + + portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); +} + +//------------------------------------------------------------------------------------------------- +static void setupTimer1( void ) +{ + Interrupt_register(INT_TIMER1, &timer1_ISR); + + CPUTimer_setPeriod(CPUTIMER1_BASE, 0xFFFFFFFF); + CPUTimer_setPreScaler(CPUTIMER1_BASE, 0); + CPUTimer_stopTimer(CPUTIMER1_BASE); + CPUTimer_reloadTimerCounter(CPUTIMER1_BASE); + + configCPUTimer(CPUTIMER1_BASE, 100000); + + CPUTimer_enableInterrupt(CPUTIMER1_BASE); + + Interrupt_enable(INT_TIMER1); + CPUTimer_startTimer(CPUTIMER1_BASE); +} + +//------------------------------------------------------------------------------------------------- +void LED_TaskRed(void * pvParameters) +{ + for(;;) + { + if(xSemaphoreTake( xSemaphore, portMAX_DELAY ) == pdTRUE) + { + ledToggle((uint32_t)pvParameters); + } + } +} + +//------------------------------------------------------------------------------------------------- +void LED_TaskBlue(void * pvParameters) +{ + for(;;) + { + ledToggle((uint32_t)pvParameters); + vTaskDelay(250 / portTICK_PERIOD_MS); + } +} + +//------------------------------------------------------------------------------------------------- +void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) +{ + *ppxIdleTaskTCBBuffer = &idleTaskBuffer; + *ppxIdleTaskStackBuffer = idleTaskStack; + *pulIdleTaskStackSize = STACK_SIZE; +} + +//------------------------------------------------------------------------------------------------- +void main(void) +{ + // + // Initializes device clock and peripherals + // + Device_init(); + + // + // Initializes PIE and clears PIE registers. Disables CPU interrupts. + // + Interrupt_initModule(); + + Device_initGPIO(); + GPIO_setPadConfig(DEVICE_GPIO_PIN_LED1, GPIO_PIN_TYPE_STD); + GPIO_setDirectionMode(DEVICE_GPIO_PIN_LED1, GPIO_DIR_MODE_OUT); + GPIO_setPadConfig(DEVICE_GPIO_PIN_LED2, GPIO_PIN_TYPE_STD); + GPIO_setDirectionMode(DEVICE_GPIO_PIN_LED2, GPIO_DIR_MODE_OUT); + + GPIO_writePin(DEVICE_GPIO_PIN_LED1, 1); + GPIO_writePin(DEVICE_GPIO_PIN_LED2, 1); + + // Step 3. Clear all interrupts and initialize PIE vector table: + // Disable CPU interrupts + DINT; + + + // Disable CPU interrupts and clear all CPU interrupt flags: + IER = 0x0000; + IFR = 0x0000; + + // + // Initializes the PIE vector table with pointers to the shell Interrupt + // Service Routines (ISR). + // + Interrupt_initVectorTable(); + + xSemaphore = xSemaphoreCreateBinaryStatic( &xSemaphoreBuffer ); + + setupTimer1(); + + // Enable global Interrupts and higher priority real-time debug events: + EINT; // Enable Global interrupt INTM + ERTM; // Enable Global realtime interrupt DBGM + + // Create the task without using any dynamic memory allocation. + xTaskCreateStatic(LED_TaskRed, // Function that implements the task. + "Red LED task", // Text name for the task. + STACK_SIZE, // Number of indexes in the xStack array. + ( void * ) RED, // Parameter passed into the task. + tskIDLE_PRIORITY + 2, // Priority at which the task is created. + redTaskStack, // Array to use as the task's stack. + &redTaskBuffer ); // Variable to hold the task's data structure. + + xTaskCreateStatic(LED_TaskBlue, // Function that implements the task. + "Blue LED task", // Text name for the task. + STACK_SIZE, // Number of indexes in the xStack array. + ( void * ) BLUE, // Parameter passed into the task. + tskIDLE_PRIORITY + 1, // Priority at which the task is created. + blueTaskStack, // Array to use as the task's stack. + &blueTaskBuffer ); // Variable to hold the task's data structure. + + vTaskStartScheduler(); +} diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky_syscfg.c b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky_syscfg.c new file mode 100644 index 0000000..b205cd9 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky_syscfg.c @@ -0,0 +1,237 @@ +//############################################################################# +// +// FILE: freertos_ex1_c28x_led_blinky_syscfg.c +// +// TITLE: FreeRTOS C28x LED Blinky (SYSCONFIG) +// +//! This example demonstrates the FreeRTOS specific configuration through +//! Sysconfig. The example configures LEDs, CPUTimers and FreeRTOS and creates +//! two tasks which blinks the on-board LEDs periodically. +//! +//! External Connections: +//! None +//! +//! Watch Variables: +//! - None - The on-board LEDs should be blinking periodically +// +//############################################################################# +// +// +// $Copyright: +// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.co/ +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions +// are met: +// +// Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// +// Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the +// distribution. +// +// Neither the name of Texas Instruments Incorporated nor the names of +// its contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// $ +//############################################################################# + +// +// Included Files +// +#include "driverlib.h" +#include "device.h" +#include "FreeRTOS.h" +#include "board.h" +#include "c2000_freertos.h" + +#define RED 0xDEADBEAF +#define BLUE 0xBAADF00D + +// +// Function Prototypes +// +void vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName); +void vApplicationMallocFailedHook( void ); + +// +// Timer1 ISR +// +__interrupt void timer1_ISR(void); + +// +// Task Functions +// +void LED_TaskRed(void * pvParameters); +void LED_TaskBlue(void * pvParameters); +static void blueLedToggle(void); +static void redLedToggle(void); +static void ledToggle(uint32_t led); + +// +// Main +// +void main(void) +{ + // + // Initializes device clock and peripherals + // + Device_init(); + + // + // Initializes PIE and clears PIE registers. Disables CPU interrupts. + // + Interrupt_initModule(); + + Device_initGPIO(); + + // + // Disable all CPU interrupts and clear all CPU interrupt flags. + // + DINT; + IER = 0x0000; + IFR = 0x0000; + + // + // Initializes the PIE vector table with pointers to the shell Interrupt + // Service Routines (ISR). + // + Interrupt_initVectorTable(); + + // + // Set up CPUTimer1, LEDs. + // + Board_init(); + + // + // Configure FreeRTOS + // + FreeRTOS_init(); + + // + // Loop forever. This statement should never be reached. + // + while(1) + { + } +} + +// +// Timer1 ISR - Gives semaphore for RED task +// +__interrupt void timer1_ISR( void ) +{ + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + + xSemaphoreGiveFromISR( binarySem1Handle, &xHigherPriorityTaskWoken ); + + portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); +} + +// +// LED_TaskRed - Takes Semaphore and then toggles the LED +// +void LED_TaskRed(void * pvParameters) +{ + for(;;) + { + if(xSemaphoreTake( binarySem1Handle, portMAX_DELAY ) == pdTRUE) + { + ledToggle((uint32_t)pvParameters); + } + } +} + +// +// LED_TaskBlue - Toggles LED and blocks for 250 ticks +// +void LED_TaskBlue(void * pvParameters) +{ + for(;;) + { + ledToggle((uint32_t)pvParameters); + vTaskDelay(250 / portTICK_PERIOD_MS); + } +} + +// +// Helper functions +// +static void blueLedToggle(void) +{ + static uint32_t counter = 0; + + counter++; + GPIO_writePin(DEVICE_GPIO_PIN_LED1, counter & 1); +} + +static void redLedToggle(void) +{ + static uint32_t counter = 0; + + counter++; + GPIO_writePin(DEVICE_GPIO_PIN_LED2, counter & 1); +} + +static void ledToggle(uint32_t led) +{ + if(RED == led) + { + redLedToggle(); + } + else + if(BLUE == led) + { + blueLedToggle(); + } +} + +// +// vApplicationStackOverflowHook - Checks run time stack overflow +// +void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) +{ + ( void ) pcTaskName; + ( void ) pxTask; + + /* Run time stack overflow checking is performed if + configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook + function is called if a stack overflow is detected. */ + taskDISABLE_INTERRUPTS(); + for( ;; ); +} + +// +// vApplicationMallocFailedHook - Hook function for catching pvPortMalloc() failures +// +void vApplicationMallocFailedHook( void ) +{ + /* vApplicationMallocFailedHook() will only be called if + configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook + function that will get called if a call to pvPortMalloc() fails. + pvPortMalloc() is called internally by the kernel whenever a task, queue, + timer or semaphore is created. It is also called by various parts of the + demo application. If heap_1.c or heap_2.c are used, then the size of the + heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in + FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used + to query the size of free heap space that remains (although it does not + provide information on how the remaining heap might be fragmented). */ + taskDISABLE_INTERRUPTS(); + for( ;; ); +} + + diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky_syscfg.syscfg b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky_syscfg.syscfg new file mode 100644 index 0000000..2ea27ca --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex1_c28x_led_blinky_syscfg.syscfg @@ -0,0 +1,54 @@ + +/** + * Import the modules used in this configuration. + */ +const led = scripting.addModule("/driverlib/board_components/led", {}, false); +const led1 = led.addInstance(); +const led2 = led.addInstance(); +const cputimer = scripting.addModule("/driverlib/cputimer.js", {}, false); +const cputimer1 = cputimer.addInstance(); +const FREERTOS = scripting.addModule("/kernel/freertos_tool/FREERTOS", {}, false); +const FREERTOS1 = FREERTOS.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +led1.$name = "myLED1"; +led1.gpio.writeInitialValue = true; +led1.gpio.initialValue = 1; +led1.gpio.gpioPin.$assign = "GPIO31"; + +led2.$name = "myLED2"; +led2.gpio.writeInitialValue = true; +led2.gpio.initialValue = 1; +led2.gpio.gpioPin.$assign = "GPIO34"; + +cputimer1.$name = "timer1"; +cputimer1.cputimerBase = "CPUTIMER1_BASE"; +cputimer1.enableInterrupt = true; +cputimer1.registerInterrupts = true; +cputimer1.timerPeriod = 20000000; +cputimer1.startTimer = true; +cputimer1.timerInt.interruptHandler = "timer1_ISR"; +cputimer1.timerInt.enableInterrupt = true; + +FREERTOS1.$name = "myFREERTOS0"; +FREERTOS1.CPU_CLOCK_HZ = 200000000; +FREERTOS1.MINIMAL_STACK_SIZE = 256; +FREERTOS1.USE_MUTEXES = true; +FREERTOS1.USE_RECURSIVE_MUTEXES = true; +FREERTOS1.USE_COUNTING_SEMAPHORES = true; +FREERTOS1.vTaskSuspend = false; +FREERTOS1.tasks.create(2); +FREERTOS1.tasks[0].$name = "redTask"; +FREERTOS1.tasks[0].taskPointer = "LED_TaskRed"; +FREERTOS1.tasks[0].taskStackSize = 256; +FREERTOS1.tasks[0].taskPriority = 2; +FREERTOS1.tasks[0].taskParams = "0xDEADBEAF"; +FREERTOS1.tasks[1].$name = "blueTask"; +FREERTOS1.tasks[1].taskPointer = "LED_TaskBlue"; +FREERTOS1.tasks[1].taskStackSize = 256; +FREERTOS1.tasks[1].taskPriority = 1; +FREERTOS1.tasks[1].taskParams = "0xBAADF00D"; +FREERTOS1.semaphores.create(1); +FREERTOS1.semaphores[0].$name = "binarySem1"; diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex2_c28x_dual_blinky_cpu1.c b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex2_c28x_dual_blinky_cpu1.c new file mode 100644 index 0000000..5e0b802 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex2_c28x_dual_blinky_cpu1.c @@ -0,0 +1,363 @@ +//############################################################################# +// +// FILE: freertos_ex2_c28x_dual_blinky_cpu1.c +// +// TITLE: LED Blinky Example +// +//!

LED Blinky Example

+//! +//! This example demonstrates LED blinky demo using freeRTOS tasks on both +//! CPU1 and CPU2 cores. CPU1 passes the ownership of GPIOs connected to +//! LED2 to CPU2. CPU1 toggles LED1 while CPU2 toggles LED2 with varying +//! frequency through two tasks. The varying frequency is achieved through +//! adding different delays between LED toggles for different tasks. Mutual +//! exclusion between tasks is achieved through mutex semaphores. +//! +//! \note In the default CPU2 linker cmd file, GS4, FLASH_BANK3 anf FLASH_BANK4 +//! are used for allocating various CPU2 sections. The CPU1 application +//! assigns the ownership of these memory regions to CPU2. Please note that CPU2 +//! .out file can be loaded only after CPU1 completes this configuration +//! +//! \b External \b Connections \n +//! - None. +//! +//! \b Watch \b Variables \n +//! - None. +//! +// +//############################################################################# +// +// +// $Copyright: +// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.co/ +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions +// are met: +// +// Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// +// Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the +// distribution. +// +// Neither the name of Texas Instruments Incorporated nor the names of +// its contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// $ +//############################################################################# + +// +// Included Files +// +#include "driverlib.h" +#include "device.h" +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +// +// Macro to define stack size of individual tasks +// +#define LED_TASK1_STACK_SIZE 256 +#define LED_TASK2_STACK_SIZE 256 + +// +// Macro to define priorities of individual tasks +// +#define LED_TASK1_PRIORITY 4 +#define LED_TASK2_PRIORITY 2 + +// +// Macro to define delay(in ticks) between LED toggle +// in tasks. This delay determines the LED toggle +// frequency within a task. +// Note: 1 tick is configured as 1ms in FreeRTOSConfig.h +// +#define LED_TASK1_BLINK_DELAY 500 +#define LED_TASK2_BLINK_DELAY 1500 +#define LED_TASK_BLOCK_TICKS 10 + +// +// Macro to define task duration(in ticks) +// +#define LED_TASK1_DURATION 10000 +#define LED_TASK2_DURATION 10000 + +#define STACK_SIZE 256U + +// +// Globals +// + +// +// Task handles +// +TaskHandle_t ledTask1, ledTask2; + +// +// Execution counters +// +static uint32_t ctrTask1, ctrTask2; + +// +// The mutex that protects concurrent access of LED2 from multiple tasks. +// +xSemaphoreHandle ledSemaphore; + +static StaticTask_t idleTaskBuffer; +static StackType_t idleTaskStack[STACK_SIZE]; +#pragma DATA_SECTION(idleTaskStack, ".freertosStaticStack") +#pragma DATA_ALIGN ( idleTaskStack , portBYTE_ALIGNMENT ) + +#if(configAPPLICATION_ALLOCATED_HEAP == 1) +uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#pragma DATA_SECTION(ucHeap, ".freertosHeap") +#pragma DATA_ALIGN ( ucHeap , portBYTE_ALIGNMENT ) +#endif + +// +// Function prototypes +// +void ledTask1Func(void *pvParameters); +void ledTask2Func(void *pvParameters); + + +// +// vApplicationGetIdleTaskMemory +// +void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, + StackType_t **ppxIdleTaskStackBuffer, + uint32_t *pulIdleTaskStackSize ) +{ + *ppxIdleTaskTCBBuffer = &idleTaskBuffer; + *ppxIdleTaskStackBuffer = idleTaskStack; + *pulIdleTaskStackSize = STACK_SIZE; +} + +// +// vApplicationStackOverflowHook +// +void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName ) +{ + while(1); +} + +// +// Main +// +void main(void) +{ + // + // Initialize device clock and peripherals + // + Device_init(); + + // + // Assign RAMs and Flash banks to CPU2. + // In the default CPU2 linker cmd files, GS4, FLASH_BANK3 anf FLASH_BANK4 + // are used for allocating various CPU2 sections. + // In case CPU2 needs additional RAM or Flash regions, CPU1 needs to assign + // its ownership to CPU2 using the following functions : + // - MemCfg_setGSRAMControllerSel for GSRAM + // - SysCtl_allocateDxRAM for DRAM + // - SysCtl_allocateFlashBank for Flash + // + SysCtl_allocateDxRAM(SYSCTL_D2RAM, SYSCTL_CPUSEL_CPU2); + SysCtl_allocateDxRAM(SYSCTL_D3RAM, SYSCTL_CPUSEL_CPU2); + SysCtl_allocateFlashBank(SYSCTL_FLASH_BANK3, SYSCTL_CPUSEL_CPU2); + SysCtl_allocateFlashBank(SYSCTL_FLASH_BANK4, SYSCTL_CPUSEL_CPU2); + MemCfg_setGSRAMControllerSel(MEMCFG_SECT_GS4, MEMCFG_GSRAMCONTROLLER_CPU2); + + + // + // Boot CPU2 core + // +#ifdef _FLASH + Device_bootCPU2(BOOTMODE_BOOT_TO_FLASH_BANK0_SECTOR0); +#else + Device_bootCPU2(BOOTMODE_BOOT_TO_M0RAM); +#endif + + // + // Initialize GPIO and configure the GPIO pin as a push-pull output + // + Device_initGPIO(); + GPIO_setPadConfig(DEVICE_GPIO_PIN_LED1, GPIO_PIN_TYPE_STD); + GPIO_setDirectionMode(DEVICE_GPIO_PIN_LED1, GPIO_DIR_MODE_OUT); + GPIO_setPadConfig(DEVICE_GPIO_PIN_LED2, GPIO_PIN_TYPE_STD); + GPIO_setDirectionMode(DEVICE_GPIO_PIN_LED2, GPIO_DIR_MODE_OUT); + + // + // Configure CPU2 to control the LED GPIO + // + GPIO_setControllerCore(DEVICE_GPIO_PIN_LED2, GPIO_CORE_CPU2); + + // + // Initialize PIE and clear PIE registers. Disables CPU interrupts. + // + Interrupt_initModule(); + + // + // Initialize the PIE vector table with pointers to the shell Interrupt + // Service Routines (ISR). + // + Interrupt_initVectorTable(); + + // + // Create a mutex to guard the LED. + // + ledSemaphore = xSemaphoreCreateMutex(); + + if(ledSemaphore != NULL) + { + // + // Create tasks to toggle LEDs at varying frequency + // + if(xTaskCreate(ledTask1Func, (const char *)"ledTask1", LED_TASK1_STACK_SIZE, NULL, + (tskIDLE_PRIORITY + LED_TASK1_PRIORITY), &ledTask1) != pdTRUE) + { + ESTOP0; + } + + if(xTaskCreate(ledTask2Func, (const char *)"ledTask2", LED_TASK2_STACK_SIZE, NULL, + (tskIDLE_PRIORITY + LED_TASK2_PRIORITY), &ledTask2) != pdTRUE) + { + ESTOP0; + } + + // + // Clear any IPC flags if set already + // + IPC_clearFlagLtoR(IPC_CPU1_L_CPU2_R, IPC_FLAG_ALL); + + // + // Synchronize both the cores. + // + IPC_sync(IPC_CPU1_L_CPU2_R, IPC_FLAG31); + + // + // Start the scheduler. This should not return. + // + vTaskStartScheduler(); + } + + // + // In case the scheduler returns for some reason, loop forever. + // + for(;;) + { + } +} + +// +// led Task1 Func - Task function for led task 1 +// +void ledTask1Func(void *pvParameters) +{ + portTickType wakeTime; + uint32_t taskDuration; + + while(1) + { + if(xSemaphoreTake(ledSemaphore, portMAX_DELAY) == pdPASS) + { + // + // Get the current tick count. + // + wakeTime = xTaskGetTickCount(); + taskDuration = xTaskGetTickCount() + LED_TASK1_DURATION; + while(taskDuration > xTaskGetTickCount()) + { + // + // Toggle LED1 for the entire task duration + // + GPIO_togglePin(DEVICE_GPIO_PIN_LED1); + + // + // Delay until LED_TASK1_BLINK_DELAY + // + vTaskDelayUntil(&wakeTime, LED_TASK1_BLINK_DELAY); + } + + ctrTask1++; + + // + // Give semaphore + // + xSemaphoreGive(ledSemaphore); + + // + // Put the task in blocked state + // + vTaskDelay(LED_TASK_BLOCK_TICKS); + } + } +} + +// +// led Task2 Func - Task function for led task 2 +// +void ledTask2Func(void *pvParameters) +{ + portTickType wakeTime; + uint32_t taskDuration; + + while(1) + { + if(xSemaphoreTake(ledSemaphore, portMAX_DELAY) == pdPASS) + { + // + // Get the current tick count + // + wakeTime = xTaskGetTickCount(); + taskDuration = xTaskGetTickCount() + LED_TASK2_DURATION; + while(taskDuration > xTaskGetTickCount()) + { + // + // Toggle LED1 for the entire task duration + // + GPIO_togglePin(DEVICE_GPIO_PIN_LED1); + + // + // Delay until LED_TASK2_BLINK_DELAY ticks + // + vTaskDelayUntil(&wakeTime, LED_TASK2_BLINK_DELAY); + } + + // + // Increment counter + // + ctrTask2++; + + // + // Give semaphore + // + xSemaphoreGive(ledSemaphore); + + // + // Put the task in blocked state + // + vTaskDelay(LED_TASK_BLOCK_TICKS); + } + } +} + + +// +// End of File +// diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex2_c28x_dual_blinky_cpu2.c b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex2_c28x_dual_blinky_cpu2.c new file mode 100644 index 0000000..beedb84 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/freertos_ex2_c28x_dual_blinky_cpu2.c @@ -0,0 +1,323 @@ +//############################################################################# +// +// FILE: freertos_ex2_c28x_dual_blinky_cpu2.c +// +// TITLE: LED Blinky Example +// +//

LED Blinky Example (CPU2)

+// +//! This example demonstrates LED blinky demo using freeRTOS tasks on both +//! CPU1 and CPU2 cores. CPU1 passes the ownership of GPIOs connected to +//! LED2 to CPU2. CPU1 toggles LED1 while CPU2 toggles LED2 with varying +//! frequency through two tasks. The varying frequency is achieved through +//! adding different delays between LED toggles for different tasks. Mutual +//! exclusion between tasks is achieved through mutex semaphores. +//! +//! \b External \b Connections \n +//! - None. +//! +//! \b Watch \b Variables \n +//! - None. +//! +// +//############################################################################# +// +// +// $Copyright: +// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.co/ +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions +// are met: +// +// Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// +// Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the +// distribution. +// +// Neither the name of Texas Instruments Incorporated nor the names of +// its contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// $ +//############################################################################# + +// +// Included Files +// +#include "driverlib.h" +#include "device.h" +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" + +// +// Macro to define stack size of individual tasks +// +#define LED_TASK1_STACK_SIZE 256 +#define LED_TASK2_STACK_SIZE 256 + +// +// Macro to define priorities of individual tasks +// +#define LED_TASK1_PRIORITY 4 +#define LED_TASK2_PRIORITY 2 + +// +// Macro to define delay(in ticks) between LED toggle +// in tasks. This delay determines the LED toggle +// frequency within a task. +// Note: 1 tick is configured as 1ms in FreeRTOSConfig.h +// +#define LED_TASK1_BLINK_DELAY 500 +#define LED_TASK2_BLINK_DELAY 1500 +#define LED_TASK_BLOCK_TICKS 10 + +// +// Macro to define task duration(in ticks) +// +#define LED_TASK1_DURATION 10000 +#define LED_TASK2_DURATION 10000 + +#define STACK_SIZE 256U + +// +// Globals +// + +// +// Task handles +// +TaskHandle_t ledTask1, ledTask2; + +// +// Execution counters +// +static uint32_t ctrTask1, ctrTask2; + +// +// The mutex that protects concurrent access of LED2 from multiple tasks. +// +xSemaphoreHandle ledSemaphore; + +static StaticTask_t idleTaskBuffer; +static StackType_t idleTaskStack[STACK_SIZE]; +#pragma DATA_SECTION(idleTaskStack, ".freertosStaticStack") +#pragma DATA_ALIGN ( idleTaskStack , portBYTE_ALIGNMENT ) + +#if(configAPPLICATION_ALLOCATED_HEAP == 1) +uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#pragma DATA_SECTION(ucHeap, ".freertosHeap") +#pragma DATA_ALIGN ( ucHeap , portBYTE_ALIGNMENT ) +#endif + +// +// Function prototypes +// +void ledTask1Func(void *pvParameters); +void ledTask2Func(void *pvParameters); + +// +// vApplicationGetIdleTaskMemory +// +void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, + StackType_t **ppxIdleTaskStackBuffer, + uint32_t *pulIdleTaskStackSize ) +{ + *ppxIdleTaskTCBBuffer = &idleTaskBuffer; + *ppxIdleTaskStackBuffer = idleTaskStack; + *pulIdleTaskStackSize = STACK_SIZE; +} + +// +// vApplicationStackOverflowHook +// +void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName ) +{ + while(1); +} + +// +// Main +// +void main(void) +{ + // + // Initialize device clock and peripherals + // + Device_init(); + + // + // Initialize GPIO and configure the GPIO pin as a push-pull output + // + // This is configured by CPU1 + + // + // Initialize PIE and clear PIE registers. Disables CPU interrupts. + // + Interrupt_initModule(); + + // + // Initialize the PIE vector table with pointers to the shell Interrupt + // Service Routines (ISR). + // + Interrupt_initVectorTable(); + + // + // Create a mutex to guard the LED. + // + ledSemaphore = xSemaphoreCreateMutex(); + + if(ledSemaphore != NULL) + { + // + // Create tasks to toggle LEDs at varying frequency + // + if(xTaskCreate(ledTask1Func, (const char *)"ledTask1", LED_TASK1_STACK_SIZE, NULL, + (tskIDLE_PRIORITY + LED_TASK1_PRIORITY), &ledTask1) != pdTRUE) + { + ESTOP0; + } + + if(xTaskCreate(ledTask2Func, (const char *)"ledTask2", LED_TASK2_STACK_SIZE, NULL, + (tskIDLE_PRIORITY + LED_TASK2_PRIORITY), &ledTask2) != pdTRUE) + { + ESTOP0; + } + + // + // Clear any IPC flags if set already + // + IPC_clearFlagLtoR(IPC_CPU2_L_CPU1_R, IPC_FLAG_ALL); + + // + // Synchronize both the cores. + // + IPC_sync(IPC_CPU2_L_CPU1_R, IPC_FLAG31); + + // + // Start the scheduler. This should not return. + // + vTaskStartScheduler(); + } + + // + // In case the scheduler returns for some reason, loop forever. + // + for(;;) + { + } + +} + +// +// led Task1 Func - Task function for led task 1 +// +void ledTask1Func(void *pvParameters) +{ + portTickType wakeTime; + uint32_t taskDuration; + + while(1) + { + if(xSemaphoreTake(ledSemaphore, portMAX_DELAY) == pdPASS) + { + // + // Get the current tick count. + // + wakeTime = xTaskGetTickCount(); + taskDuration = xTaskGetTickCount() + LED_TASK1_DURATION; + while(taskDuration > xTaskGetTickCount()) + { + // + // Toggle LED2 for the entire task duration + // + GPIO_togglePin(DEVICE_GPIO_PIN_LED2); + + // + // Delay until LED_TASK1_BLINK_DELAY + // + vTaskDelayUntil(&wakeTime, LED_TASK1_BLINK_DELAY); + } + + ctrTask1++; + + // + // Give semaphore + // + xSemaphoreGive(ledSemaphore); + + // + // Put the task in blocked state + // + vTaskDelay(LED_TASK_BLOCK_TICKS); + } + } +} + +// +// led Task2 Func - Task function for led task 2 +// +void ledTask2Func(void *pvParameters) +{ + portTickType wakeTime; + uint32_t taskDuration; + + while(1) + { + if(xSemaphoreTake(ledSemaphore, portMAX_DELAY) == pdPASS) + { + // + // Get the current tick count + // + wakeTime = xTaskGetTickCount(); + taskDuration = xTaskGetTickCount() + LED_TASK2_DURATION; + while(taskDuration > xTaskGetTickCount()) + { + // + // Toggle LED2 for the entire task duration + // + GPIO_togglePin(DEVICE_GPIO_PIN_LED2); + + // + // Delay until LED_TASK2_BLINK_DELAY ticks + // + vTaskDelayUntil(&wakeTime, LED_TASK2_BLINK_DELAY); + } + + // + // Increment counter + // + ctrTask2++; + + // + // Give semaphore + // + xSemaphoreGive(ledSemaphore); + + // + // Put the task in blocked state + // + vTaskDelay(LED_TASK_BLOCK_TICKS); + } + } +} + +// +// End of File +// diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_flash_lnk_cpu1.cmd b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_flash_lnk_cpu1.cmd new file mode 100644 index 0000000..11efb45 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_flash_lnk_cpu1.cmd @@ -0,0 +1,123 @@ +MEMORY +{ + BEGIN : origin = 0x080000, length = 0x000002 // Update the codestart location as needed + + BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */ + RAMM0 : origin = 0x0001B1, length = 0x00024F + RAMM1 : origin = 0x000400, length = 0x000400 + + RAMD0 : origin = 0x00C000, length = 0x002000 + RAMD1 : origin = 0x00E000, length = 0x002000 + // RAMD2 : origin = 0x01A000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0x8000. User should comment/uncomment based on core selection + // RAMD3 : origin = 0x01C000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xA000. User should comment/uncomment based on core selection + RAMD4 : origin = 0x01E000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xC000. User should comment/uncomment based on core selection + RAMD5 : origin = 0x020000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xE000. User should comment/uncomment based on core selection + + RAMLS0 : origin = 0x008000, length = 0x000800 + RAMLS1 : origin = 0x008800, length = 0x000800 + RAMLS2 : origin = 0x009000, length = 0x000800 + RAMLS3 : origin = 0x009800, length = 0x000800 + RAMLS4 : origin = 0x00A000, length = 0x000800 + RAMLS5 : origin = 0x00A800, length = 0x000800 + RAMLS6 : origin = 0x00B000, length = 0x000800 + RAMLS7 : origin = 0x00B800, length = 0x000800 + RAMLS8 : origin = 0x022000, length = 0x002000 // When configured as CLA program use the address 0x4000 + RAMLS9 : origin = 0x024000, length = 0x002000 // When configured as CLA program use the address 0x6000 + + // RAMLS8_CLA : origin = 0x004000, length = 0x002000 // Use only if configured as CLA program memory + // RAMLS9_CLA : origin = 0x006000, length = 0x002000 // Use only if configured as CLA program memory + + RAMGS0 : origin = 0x010000, length = 0x002000 + RAMGS1 : origin = 0x012000, length = 0x002000 + RAMGS2 : origin = 0x014000, length = 0x002000 + RAMGS3 : origin = 0x016000, length = 0x002000 + RAMGS4 : origin = 0x018000, length = 0x002000 + + /* Flash Banks (128 sectors each) */ + FLASH_BANK0 : origin = 0x080002, length = 0x1FFFE // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + FLASH_BANK1 : origin = 0x0A0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + FLASH_BANK2 : origin = 0x0C0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + // FLASH_BANK3 : origin = 0x0E0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + // FLASH_BANK4 : origin = 0x100000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + + + + CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800 + CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800 + + CLATOCPURAM : origin = 0x001480, length = 0x000080 + CPUTOCLARAM : origin = 0x001500, length = 0x000080 + CLATODMARAM : origin = 0x001680, length = 0x000080 + DMATOCLARAM : origin = 0x001700, length = 0x000080 + + CANA_MSG_RAM : origin = 0x049000, length = 0x000800 + CANB_MSG_RAM : origin = 0x04B000, length = 0x000800 + RESET : origin = 0x3FFFC0, length = 0x000002 +} + + +SECTIONS +{ + codestart : > BEGIN + .text : >> FLASH_BANK0 | FLASH_BANK1, ALIGN(8) + .cinit : > FLASH_BANK0, ALIGN(8) + .switch : > FLASH_BANK0, ALIGN(8) + .reset : > RESET, TYPE = DSECT /* not used, */ + + .stack : > RAMM1 +#if defined(__TI_EABI__) + .bss : > RAMLS5 + .bss:output : > RAMLS3 + .init_array : > FLASH_BANK0, ALIGN(8) + .const : > FLASH_BANK0, ALIGN(8) + .data : > RAMLS5 + .sysmem : > RAMLS4 +#else + .pinit : > FLASH_BANK0, ALIGN(8) + .ebss : >> RAMLS5 | RAMLS6 + .econst : > FLASH_BANK0, ALIGN(8) + .esysmem : > RAMLS5 +#endif + + ramgs0 : > RAMGS0, type=NOINIT + ramgs1 : > RAMGS1, type=NOINIT + ramgs2 : > RAMGS2, type=NOINIT + + MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT + MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT + + #if defined(__TI_EABI__) + .TI.ramfunc : {} LOAD = FLASH_BANK0, + RUN = RAMLS0, + LOAD_START(RamfuncsLoadStart), + LOAD_SIZE(RamfuncsLoadSize), + LOAD_END(RamfuncsLoadEnd), + RUN_START(RamfuncsRunStart), + RUN_SIZE(RamfuncsRunSize), + RUN_END(RamfuncsRunEnd), + ALIGN(8) + #else + .TI.ramfunc : {} LOAD = FLASH_BANK0, + RUN = RAMLS0, + LOAD_START(_RamfuncsLoadStart), + LOAD_SIZE(_RamfuncsLoadSize), + LOAD_END(_RamfuncsLoadEnd), + RUN_START(_RamfuncsRunStart), + RUN_SIZE(_RamfuncsRunSize), + RUN_END(_RamfuncsRunEnd), + ALIGN(8) + #endif + + /* IMPORTANT: The FreeRTOS statically allocated stack should be allocated to this section only */ + .freertosStaticStack : >> RAMD0 | RAMD1 + + /* IMPORTANT: The FreeRTOS heap should be allocated to this section only as the C28x stack + memory can be allocated in the lower 64k RAM memory only. */ + .freertosHeap : > RAMD0 | RAMD1 +} + +/* +//=========================================================================== +// End of file. +//=========================================================================== +*/ \ No newline at end of file diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_flash_lnk_cpu2.cmd b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_flash_lnk_cpu2.cmd new file mode 100644 index 0000000..9b3a48f --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_flash_lnk_cpu2.cmd @@ -0,0 +1,106 @@ +MEMORY +{ + BEGIN : origin = 0x0E0000, length = 0x000002 // Update the codestart location as needed + + BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */ + RAMM0 : origin = 0x0001B1, length = 0x00024F + RAMM1 : origin = 0x000400, length = 0x000400 + + RAMD2 : origin = 0x008000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU1, use the address 0x01A000. User should comment/uncomment based on core selection + RAMD3 : origin = 0x00A000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU1, use the address 0x01C000. User should comment/uncomment based on core selection + // RAMD4 : origin = 0x00C000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU1, use the address 0x01E000. User should comment/uncomment based on core selection + // RAMD5 : origin = 0x00E000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU1, use the address 0x020000. User should comment/uncomment based on core selection + + RAMGS0 : origin = 0x010000, length = 0x002000 + RAMGS1 : origin = 0x012000, length = 0x002000 + RAMGS2 : origin = 0x014000, length = 0x002000 + RAMGS3 : origin = 0x016000, length = 0x002000 + RAMGS4 : origin = 0x018000, length = 0x002000 + + /* Flash Banks (128 sectors each) */ + // FLASH_BANK0 : origin = 0x080000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + // FLASH_BANK1 : origin = 0x0A0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + // FLASH_BANK2 : origin = 0x0C0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + FLASH_BANK3 : origin = 0x0E0002, length = 0x1FFFE // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + FLASH_BANK4 : origin = 0x100000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + + + CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800 + CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800 + + CLATOCPURAM : origin = 0x001480, length = 0x000080 + CPUTOCLARAM : origin = 0x001500, length = 0x000080 + CLATODMARAM : origin = 0x001680, length = 0x000080 + DMATOCLARAM : origin = 0x001700, length = 0x000080 + + CANA_MSG_RAM : origin = 0x049000, length = 0x000800 + CANB_MSG_RAM : origin = 0x04B000, length = 0x000800 + RESET : origin = 0x3FFFC0, length = 0x000002 +} + + +SECTIONS +{ + codestart : > BEGIN + .text : >> FLASH_BANK3 | FLASH_BANK4, ALIGN(8) + .cinit : > FLASH_BANK3, ALIGN(8) + .switch : > FLASH_BANK3, ALIGN(8) + .reset : > RESET, TYPE = DSECT /* not used, */ + + .stack : > RAMM1 +#if defined(__TI_EABI__) + .bss : > RAMGS4 + .bss:output : > RAMGS4 + .init_array : > FLASH_BANK3, ALIGN(8) + .const : > FLASH_BANK3, ALIGN(8) + .data : > RAMGS4 + .sysmem : > RAMGS4 +#else + .pinit : > FLASH_BANK3, ALIGN(8) + .ebss : > RAMGS4 + .econst : > FLASH_BANK3, ALIGN(8) + .esysmem : > RAMGS4 +#endif + + ramgs0 : > RAMGS0, type=NOINIT + ramgs1 : > RAMGS1, type=NOINIT + ramgs2 : > RAMGS2, type=NOINIT + + MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT + MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT + + #if defined(__TI_EABI__) + .TI.ramfunc : {} LOAD = FLASH_BANK3, // Use flash that is mapped to CPU2 + RUN = RAMGS4, + LOAD_START(RamfuncsLoadStart), + LOAD_SIZE(RamfuncsLoadSize), + LOAD_END(RamfuncsLoadEnd), + RUN_START(RamfuncsRunStart), + RUN_SIZE(RamfuncsRunSize), + RUN_END(RamfuncsRunEnd), + ALIGN(8) + #else + .TI.ramfunc : {} LOAD = FLASH_BANK3, // Use flash that is mapped to CPU2 + RUN = RAMGS4, + LOAD_START(_RamfuncsLoadStart), + LOAD_SIZE(_RamfuncsLoadSize), + LOAD_END(_RamfuncsLoadEnd), + RUN_START(_RamfuncsRunStart), + RUN_SIZE(_RamfuncsRunSize), + RUN_END(_RamfuncsRunEnd), + ALIGN(8) + #endif + + /* IMPORTANT: The FreeRTOS statically allocated stack should be allocated to this section only */ + .freertosStaticStack : >> RAMD2 | RAMD3 + + /* IMPORTANT: The FreeRTOS heap should be allocated to this section only as the C28x stack + memory can be allocated in the lower 64k RAM memory only. */ + .freertosHeap : > RAMD2 | RAMD3 +} + +/* +//=========================================================================== +// End of file. +//=========================================================================== +*/ \ No newline at end of file diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_ram_lnk_cpu1.cmd b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_ram_lnk_cpu1.cmd new file mode 100644 index 0000000..ac306aa --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_ram_lnk_cpu1.cmd @@ -0,0 +1,103 @@ +MEMORY +{ + /* BEGIN is used for the "boot to SARAM" bootloader mode */ + BEGIN : origin = 0x000000, length = 0x000002 + BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */ + RAMM0 : origin = 0x0001B1, length = 0x00024F + RAMM1 : origin = 0x000400, length = 0x000400 + + RAMD0 : origin = 0x00C000, length = 0x002000 + RAMD1 : origin = 0x00E000, length = 0x002000 + // RAMD2 : origin = 0x01A000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0x8000. User should comment/uncomment based on core selection + // RAMD3 : origin = 0x01C000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xA000. User should comment/uncomment based on core selection + RAMD4 : origin = 0x01E000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xC000. User should comment/uncomment based on core selection + RAMD5 : origin = 0x020000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xE000. User should comment/uncomment based on core selection + + RAMLS0 : origin = 0x008000, length = 0x000800 + RAMLS1 : origin = 0x008800, length = 0x000800 + RAMLS2 : origin = 0x009000, length = 0x000800 + RAMLS3 : origin = 0x009800, length = 0x000800 + RAMLS4 : origin = 0x00A000, length = 0x000800 + RAMLS5 : origin = 0x00A800, length = 0x000800 + RAMLS6 : origin = 0x00B000, length = 0x000800 + RAMLS7 : origin = 0x00B800, length = 0x000800 + RAMLS8 : origin = 0x022000, length = 0x002000 // When configured as CLA program use the address 0x4000 + RAMLS9 : origin = 0x024000, length = 0x002000 // When configured as CLA program use the address 0x6000 + + // RAMLS8_CLA : origin = 0x004000, length = 0x002000 // Use only if configured as CLA program memory + // RAMLS9_CLA : origin = 0x006000, length = 0x002000 // Use only if configured as CLA program memory + + RAMGS0 : origin = 0x010000, length = 0x002000 + RAMGS1 : origin = 0x012000, length = 0x002000 + RAMGS2 : origin = 0x014000, length = 0x002000 + RAMGS3 : origin = 0x016000, length = 0x002000 + RAMGS4 : origin = 0x018000, length = 0x002000 + + /* Flash Banks (128 sectors each) */ + FLASH_BANK0 : origin = 0x080002, length = 0x1FFFE // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + FLASH_BANK1 : origin = 0x0A0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + FLASH_BANK2 : origin = 0x0C0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + // FLASH_BANK3 : origin = 0x0E0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + // FLASH_BANK4 : origin = 0x100000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + + + + CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800 + CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800 + + CLATOCPURAM : origin = 0x001480, length = 0x000080 + CPUTOCLARAM : origin = 0x001500, length = 0x000080 + CLATODMARAM : origin = 0x001680, length = 0x000080 + DMATOCLARAM : origin = 0x001700, length = 0x000080 + + CANA_MSG_RAM : origin = 0x049000, length = 0x000800 + CANB_MSG_RAM : origin = 0x04B000, length = 0x000800 + RESET : origin = 0x3FFFC0, length = 0x000002 +} + + +SECTIONS +{ + codestart : > BEGIN + .text : >> RAMD0 | RAMD1 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 + .cinit : > RAMM0 + .switch : > RAMM0 + .reset : > RESET, TYPE = DSECT /* not used, */ + + .stack : > RAMM1 +#if defined(__TI_EABI__) + .bss : > RAMLS5 + .bss:output : > RAMLS3 + .init_array : > RAMM0 + .const : > RAMLS5 | RAMLS6 + .data : > RAMLS5 + .sysmem : > RAMLS4 +#else + .pinit : > RAMM0 + .ebss : >> RAMLS5 | RAMLS6 + .econst : > RAMLS5 + .esysmem : > RAMLS5 +#endif + + ramgs0 : > RAMGS0, type=NOINIT + ramgs1 : > RAMGS1, type=NOINIT + ramgs2 : > RAMGS2, type=NOINIT + + MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT + MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT + + .TI.ramfunc : {} > RAMM0 + + /* IMPORTANT: The FreeRTOS statically allocated stack should be allocated to this section only */ + .freertosStaticStack : >> RAMD0 | RAMD1 + + /* IMPORTANT: The FreeRTOS heap should be allocated to this section only as the C28x stack + memory can be allocated in the lower 64k RAM memory only. */ + .freertosHeap : > RAMD0 | RAMD1 +} + +/* +//=========================================================================== +// End of file. +//=========================================================================== +*/ \ No newline at end of file diff --git a/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_ram_lnk_cpu2.cmd b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_ram_lnk_cpu2.cmd new file mode 100644 index 0000000..2266e03 --- /dev/null +++ b/kernel/FreeRTOS/Demo/C2000_F28P65x_C28x_CCS/linker_cmd/28p65x_freertos_ram_lnk_cpu2.cmd @@ -0,0 +1,87 @@ +MEMORY +{ + /* BEGIN is used for the "boot to SARAM" bootloader mode */ + BEGIN : origin = 0x000000, length = 0x000002 + BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */ + RAMM0 : origin = 0x0001B1, length = 0x00024F + RAMM1 : origin = 0x000400, length = 0x000400 + + RAMD2 : origin = 0x008000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU1, use the address 0x01A000. User should comment/uncomment based on core selection + RAMD3 : origin = 0x00A000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU1, use the address 0x01C000. User should comment/uncomment based on core selection + // RAMD4 : origin = 0x00C000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU1, use the address 0x01E000. User should comment/uncomment based on core selection + // RAMD5 : origin = 0x00E000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU1, use the address 0x020000. User should comment/uncomment based on core selection + + RAMGS0 : origin = 0x010000, length = 0x002000 + RAMGS1 : origin = 0x012000, length = 0x002000 + RAMGS2 : origin = 0x014000, length = 0x002000 + RAMGS3 : origin = 0x016000, length = 0x002000 + RAMGS4 : origin = 0x018000, length = 0x002000 + + /* Flash Banks (128 sectors each) */ + // FLASH_BANK0 : origin = 0x080000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + // FLASH_BANK1 : origin = 0x0A0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + // FLASH_BANK2 : origin = 0x0C0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + FLASH_BANK3 : origin = 0x0E0002, length = 0x1FFFE // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + FLASH_BANK4 : origin = 0x100000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection + + + + CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800 + CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800 + + CLATOCPURAM : origin = 0x001480, length = 0x000080 + CPUTOCLARAM : origin = 0x001500, length = 0x000080 + CLATODMARAM : origin = 0x001680, length = 0x000080 + DMATOCLARAM : origin = 0x001700, length = 0x000080 + + CANA_MSG_RAM : origin = 0x049000, length = 0x000800 + CANB_MSG_RAM : origin = 0x04B000, length = 0x000800 + RESET : origin = 0x3FFFC0, length = 0x000002 +} + + +SECTIONS +{ + codestart : > BEGIN + .text : > RAMGS4 + .cinit : > RAMM0 + .switch : > RAMM0 + .reset : > RESET, TYPE = DSECT /* not used, */ + + .stack : > RAMM1 +#if defined(__TI_EABI__) + .bss : > RAMGS4 + .bss:output : > RAMGS4 + .init_array : > RAMM0 + .const : > RAMGS4 + .data : > RAMGS4 + .sysmem : > RAMGS4 +#else + .pinit : > RAMM0 + .ebss : > RAMGS4 + .econst : > RAMGS4 + .esysmem : > RAMGS4 +#endif + + ramgs0 : > RAMGS0, type=NOINIT + ramgs1 : > RAMGS1, type=NOINIT + ramgs2 : > RAMGS2, type=NOINIT + + MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT + MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT + + .TI.ramfunc : {} > RAMM0 + + /* IMPORTANT: The FreeRTOS statically allocated stack should be allocated to this section only */ + .freertosStaticStack : >> RAMD2 | RAMD3 + + /* IMPORTANT: The FreeRTOS heap should be allocated to this section only as the C28x stack + memory can be allocated in the lower 64k RAM memory only. */ + .freertosHeap : > RAMD2 | RAMD3 +} + +/* +//=========================================================================== +// End of file. +//=========================================================================== +*/ \ No newline at end of file diff --git a/kernel/docs/html/genindex.html b/kernel/docs/html/genindex.html index 4bd2c52..bed093a 100644 --- a/kernel/docs/html/genindex.html +++ b/kernel/docs/html/genindex.html @@ -77,7 +77,7 @@
- v4.02.00.00 + v5.00.00.00
@@ -147,8 +147,10 @@
-

© Copyright 2020, Texas Instruments Incorporated. - Last updated on Feb 02, 2023. +

+ 2020, Texas Instruments Incorporated, Texas Instruments Incorporated. All rights reserved.
+ Trademarks | Privacy policy | Terms of use | Terms of sale + Last updated on Jul 04, 2023.

@@ -168,7 +170,7 @@