378 lines
11 KiB
C
378 lines
11 KiB
C
//#############################################################################
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//
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// FILE: dcsm.c
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//
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// TITLE: C28x Driver for the DCSM security module.
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//
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//#############################################################################
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// $TI Release: F2838x Support Library v3.04.00.00 $
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// $Release Date: Fri Feb 12 19:08:49 IST 2021 $
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// $Copyright:
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// Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//#############################################################################
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#include "dcsm.h"
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//*****************************************************************************
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//
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// DCSM_writeZone1CSM
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//
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//*****************************************************************************
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void
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DCSM_writeZone1CSM(const DCSM_CSMPasswordKey * const psCMDKey)
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{
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//
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// Check the arguments.
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//
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ASSERT(psCMDKey != NULL);
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if(psCMDKey != NULL)
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{
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HWREG(DCSM_Z1_BASE + DCSM_O_Z1_CSMKEY0) = psCMDKey->csmKey0;
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HWREG(DCSM_Z1_BASE + DCSM_O_Z1_CSMKEY1) = psCMDKey->csmKey1;
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HWREG(DCSM_Z1_BASE + DCSM_O_Z1_CSMKEY2) = psCMDKey->csmKey2;
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HWREG(DCSM_Z1_BASE + DCSM_O_Z1_CSMKEY3) = psCMDKey->csmKey3;
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}
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}
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//*****************************************************************************
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//
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// DCSM_writeZone2CSM
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//
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//*****************************************************************************
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void
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DCSM_writeZone2CSM(const DCSM_CSMPasswordKey * const psCMDKey)
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{
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//
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// Check the arguments.
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//
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ASSERT(psCMDKey != NULL);
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if(psCMDKey != NULL)
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{
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HWREG(DCSM_Z2_BASE + DCSM_O_Z2_CSMKEY0) = psCMDKey->csmKey0;
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HWREG(DCSM_Z2_BASE + DCSM_O_Z2_CSMKEY1) = psCMDKey->csmKey1;
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HWREG(DCSM_Z2_BASE + DCSM_O_Z2_CSMKEY2) = psCMDKey->csmKey2;
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HWREG(DCSM_Z2_BASE + DCSM_O_Z2_CSMKEY3) = psCMDKey->csmKey3;
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}
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}
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//*****************************************************************************
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//
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// DCSM_getZone1FlashEXEStatus
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//
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//*****************************************************************************
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DCSM_EXEOnlyStatus
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DCSM_getZone1FlashEXEStatus(DCSM_Sector sector, DCSM_CPUSel cpuInst)
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{
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uint16_t regValue;
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uint32_t regintValue;
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DCSM_EXEOnlyStatus status;
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//
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// Check if sector belongs to this zone
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//
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if(DCSM_getFlashSectorZone(sector, cpuInst) != DCSM_MEMORY_ZONE1)
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{
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status = DCSM_INCORRECT_ZONE;
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}
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else
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{
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//
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// Get the EXE status register
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//
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if(cpuInst == DCSM_CPUSEL_CPU1)
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{
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regintValue = ((HWREG(DCSM_Z1_BASE +
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DCSM_O_Z1_EXEONLYSECT1R)) &
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DCSM_EXEONLYSECTR_M);
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regValue = (uint16_t)regintValue;
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}
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else if(cpuInst == DCSM_CPUSEL_CM)
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{
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regintValue = ((HWREG(DCSM_Z1_BASE + DCSM_O_Z1_EXEONLYSECT1R))
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>> DCSM_EXEONLYSECTR_S);
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regValue = (uint16_t)regintValue;
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}
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else
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{
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regValue = (HWREGH(DCSM_Z1_BASE + DCSM_O_Z1_EXEONLYSECT2R));
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}
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//
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// Get the EXE status of the Flash Sector
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//
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status = (DCSM_EXEOnlyStatus)((regValue >> (uint16_t)sector) &
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(uint16_t)0x01U);
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}
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return(status);
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}
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//*****************************************************************************
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//
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// DCSM_getZone1RAMEXEStatus
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//
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//*****************************************************************************
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DCSM_EXEOnlyStatus
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DCSM_getZone1RAMEXEStatus(DCSM_RAMModule module, DCSM_CPUSel cpuInst)
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{
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DCSM_EXEOnlyStatus status;
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DCSM_RAMModule moduleCM = (DCSM_RAMModule)0U;
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ASSERT(cpuInst <= DCSM_CPUSEL_CPU2);
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if((cpuInst == DCSM_CPUSEL_CPU1) || (cpuInst == DCSM_CPUSEL_CPU2))
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ASSERT(module < DCSM_C28_RAM_END);
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if(cpuInst == DCSM_CPUSEL_CM)
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{
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ASSERT((module > DCSM_C28_RAM_END) &&
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(module < DCSM_CM_RAM_END));
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moduleCM = (DCSM_RAMModule)(module - (DCSM_C28_RAM_END + 1U));
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}
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//
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// Check if module belongs to this zone
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//
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if(DCSM_getRAMZone(module, cpuInst) != DCSM_MEMORY_ZONE1)
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{
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status = DCSM_INCORRECT_ZONE;
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}
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else
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{
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//
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// Get the EXE status of the RAM Module
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//
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if(cpuInst == DCSM_CPUSEL_CPU1)
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{
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status = (DCSM_EXEOnlyStatus)((HWREGH(DCSM_Z1_BASE +
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DCSM_O_Z1_EXEONLYRAM1R) >>
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(uint16_t)module) & (uint16_t)0x01U);
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}
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else if(cpuInst == DCSM_CPUSEL_CM)
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{
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status = (DCSM_EXEOnlyStatus)(((uint32_t)HWREG(DCSM_Z1_BASE +
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DCSM_O_Z1_EXEONLYRAM1R) >>
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(DCSM_Z1_EXEONLYRAM1R_CM +
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(uint16_t)moduleCM)) &
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(uint32_t)0x01U);
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}
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else
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{
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status = (DCSM_EXEOnlyStatus)((HWREG(DCSM_Z1_BASE +
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DCSM_O_Z1_EXEONLYRAM1R) >>
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(DCSM_Z1_EXEONLYRAM1R_CPU2 -
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(uint16_t)module)) &
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(uint16_t)0x01U);
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}
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}
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return(status);
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}
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//*****************************************************************************
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//
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// DCSM_getZone2FlashEXEStatus
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//
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//*****************************************************************************
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DCSM_EXEOnlyStatus
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DCSM_getZone2FlashEXEStatus(DCSM_Sector sector, DCSM_CPUSel cpuInst)
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{
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uint16_t regValue;
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uint32_t regintValue;
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DCSM_EXEOnlyStatus status;
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//
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// Check if sector belongs to this zone
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//
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if(DCSM_getFlashSectorZone(sector, cpuInst) != DCSM_MEMORY_ZONE2)
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{
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status = DCSM_INCORRECT_ZONE;
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}
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else
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{
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//
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// Get the EXE status register
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//
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if(cpuInst == DCSM_CPUSEL_CPU1)
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{
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regintValue = ((HWREG(DCSM_Z2_BASE +
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DCSM_O_Z2_EXEONLYSECT1R)) &
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DCSM_EXEONLYSECTR_M);
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regValue = (uint16_t)regintValue;
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}
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else if(cpuInst == DCSM_CPUSEL_CM)
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{
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regintValue = ((HWREG(DCSM_Z2_BASE + DCSM_O_Z2_EXEONLYSECT1R))
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>> DCSM_EXEONLYSECTR_S);
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regValue = (uint16_t)regintValue;
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}
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else
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{
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regValue = HWREGH(DCSM_Z2_BASE + DCSM_O_Z2_EXEONLYSECT2R);
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}
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//
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// Get the EXE status of the Flash Sector
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//
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status = (DCSM_EXEOnlyStatus)((regValue >> (uint16_t)sector) &
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(uint16_t)0x01U);
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}
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return(status);
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}
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//*****************************************************************************
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//
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// DCSM_getZone2RAMEXEStatus
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//
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//*****************************************************************************
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DCSM_EXEOnlyStatus
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DCSM_getZone2RAMEXEStatus(DCSM_RAMModule module, DCSM_CPUSel cpuInst)
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{
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DCSM_EXEOnlyStatus status;
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DCSM_RAMModule moduleCM = (DCSM_RAMModule)0U;
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ASSERT(cpuInst <= DCSM_CPUSEL_CPU2);
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if((cpuInst == DCSM_CPUSEL_CPU1) || (cpuInst == DCSM_CPUSEL_CPU2))
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ASSERT(module < DCSM_C28_RAM_END);
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if(cpuInst == DCSM_CPUSEL_CM)
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{
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ASSERT((module > DCSM_C28_RAM_END) &&
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(module < DCSM_CM_RAM_END));
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moduleCM = (DCSM_RAMModule)(module - (DCSM_C28_RAM_END + 1U));
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}
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//
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// Check if module belongs to this zone
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//
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if(DCSM_getRAMZone(module, cpuInst) != DCSM_MEMORY_ZONE2)
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{
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status = DCSM_INCORRECT_ZONE;
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}
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else
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{
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//
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// Get the EXE status of the RAM Module
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//
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if(cpuInst == DCSM_CPUSEL_CPU1)
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{
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status = (DCSM_EXEOnlyStatus)((HWREGH(DCSM_Z2_BASE +
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DCSM_O_Z2_EXEONLYRAM1R) >>
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(uint16_t)module) & (uint16_t)0x01U);
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}
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else if(cpuInst == DCSM_CPUSEL_CM)
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{
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status = (DCSM_EXEOnlyStatus)((HWREG(DCSM_Z2_BASE +
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DCSM_O_Z2_EXEONLYRAM1R) >>
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(DCSM_Z2_EXEONLYRAM1R_CM +
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(uint16_t)moduleCM)) &
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(uint16_t)0x01U);
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}
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else
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{
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status = (DCSM_EXEOnlyStatus)((HWREG(DCSM_Z2_BASE +
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DCSM_O_Z2_EXEONLYRAM1R) >>
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(DCSM_Z2_EXEONLYRAM1R_CPU2 -
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(uint16_t)module)) &
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(uint16_t)0x01U);
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}
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}
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return(status);
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}
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//*****************************************************************************
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//
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// DCSM_claimZoneSemaphore
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//
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//*****************************************************************************
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bool
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DCSM_claimZoneSemaphore(DCSM_SemaphoreZone zone)
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{
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//
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// FLSEM register address.
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//
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uint32_t regAddress = DCSMCOMMON_BASE + DCSM_O_FLSEM;
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//
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// Write 0xA5 to the key and write the zone that is attempting to claim the
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// Flash Pump Semaphore to the semaphore bits.
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//
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HWREGH(regAddress) = ((uint16_t)FLSEM_KEY << DCSM_FLSEM_KEY_S) |
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(uint16_t)zone;
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//
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// If the calling function was unable to claim the zone semaphore, then
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// return false
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//
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return(((HWREGH(regAddress) & DCSM_FLSEM_SEM_M) == (uint16_t)zone) ?
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true : false);
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}
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//*****************************************************************************
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//
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// DCSM_releaseZoneSemaphore
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//
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//*****************************************************************************
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bool
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DCSM_releaseZoneSemaphore(void)
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{
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//
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// FLSEM register address.
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//
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uint32_t regAddress = DCSMCOMMON_BASE + DCSM_O_FLSEM;
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//
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// Write 0xA5 to the key and write the zone that is attempting to claim the
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// Flash Pump Semaphore to the semaphore bits.
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//
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HWREGH(regAddress) = ((uint16_t)FLSEM_KEY << DCSM_FLSEM_KEY_S);
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//
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// If the calling function was unable to release the zone semaphore, then
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// return false
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//
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return(((HWREGH(regAddress) & DCSM_FLSEM_SEM_M) == 0x0U) ? true : false);
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}
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