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Projects/epwm_test/lib/f2838x_adc.c
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272
Projects/epwm_test/lib/f2838x_adc.c
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//###########################################################################
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//
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// FILE: f2838x_adc.c
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//
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// TITLE: F2838x Adc Support Functions.
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//
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//###########################################################################
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//
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//
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// $Copyright:
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// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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//
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// Included Files
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//
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#include "f2838x_device.h"
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#include "f2838x_examples.h"
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//
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// AdcSetMode - Set the resolution and signalmode for a given ADC. This will
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// ensure that the correct trim is loaded.
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//
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// NOTE!!! There is no EALLOW/EDIS in this function! You need to make sure you
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// perform the EALLOW before calling this function or else the ADC registers
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// will not be configured.
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//
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void AdcSetMode(Uint16 adc, Uint16 resolution, Uint16 signalmode)
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{
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Uint16 adcOffsetTrim; // temporary ADC offset trim
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Uint16 *adcOffsetTrimOTPLoc; // pointer to offset trim location in OTP
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//
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// Re-populate INL trim
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//
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CalAdcINL(adc);
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//
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// Calculate offset trim value based on ADC instance and
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// desired resolution
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//
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adcOffsetTrimOTPLoc = GetAdcOffsetTrimOTPLoc(adc, resolution);
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if(TI_OTP_DEV_PRG_KEY_BF == TI_OTP_DEV_KEY_BF)
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{
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adcOffsetTrim = *(Uint16 *)(adcOffsetTrimOTPLoc);
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//
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// Offset trim codes for single-ended and differential modes are
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// bit-packed in one location. Single-ended offset (signalmode=0)
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// is [15:8], differential mode (signalmode=1) is [7:0], hence
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// the code below
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//
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adcOffsetTrim = (signalmode == 0) ?
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(adcOffsetTrim >> 8):(adcOffsetTrim & 0xFF);
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}
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else
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{
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adcOffsetTrim = 0;
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}
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//
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// Apply the resolution and signalmode to the specified ADC.
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// Also apply the offset trim and, if needed, linearity trim correction.
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//
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switch(adc)
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{
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case ADC_ADCA:
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{
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AdcaRegs.ADCCTL2.bit.SIGNALMODE = signalmode;
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if(adcOffsetTrim > 0x0)
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{
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AdcaRegs.ADCOFFTRIM.all = adcOffsetTrim;
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}
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#ifndef _DUAL_HEADERS
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if(ADC_RESOLUTION_12BIT == resolution)
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#else
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if(ADC_BITRESOLUTION_12BIT == resolution)
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#endif
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{
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AdcaRegs.ADCCTL2.bit.RESOLUTION = 0;
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//
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// 12-bit linearity trim workaround
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//
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AdcaRegs.ADCINLTRIM1 &= 0xFFFF0000;
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AdcaRegs.ADCINLTRIM2 &= 0xFFFF0000;
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AdcaRegs.ADCINLTRIM4 &= 0xFFFF0000;
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AdcaRegs.ADCINLTRIM5 &= 0xFFFF0000;
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}
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else
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{
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AdcaRegs.ADCCTL2.bit.RESOLUTION = 1;
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}
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break;
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}
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case ADC_ADCB:
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{
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AdcbRegs.ADCCTL2.bit.SIGNALMODE = signalmode;
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if(adcOffsetTrim > 0x0)
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{
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AdcbRegs.ADCOFFTRIM.all = adcOffsetTrim;
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}
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#ifndef _DUAL_HEADERS
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if(ADC_RESOLUTION_12BIT == resolution)
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#else
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if(ADC_BITRESOLUTION_12BIT == resolution)
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#endif
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{
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AdcbRegs.ADCCTL2.bit.RESOLUTION = 0;
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//
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// 12-bit linearity trim workaround
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//
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AdcbRegs.ADCINLTRIM1 &= 0xFFFF0000;
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AdcbRegs.ADCINLTRIM2 &= 0xFFFF0000;
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AdcbRegs.ADCINLTRIM4 &= 0xFFFF0000;
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AdcbRegs.ADCINLTRIM5 &= 0xFFFF0000;
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}
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else
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{
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AdcbRegs.ADCCTL2.bit.RESOLUTION = 1;
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}
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break;
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}
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case ADC_ADCC:
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{
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AdccRegs.ADCCTL2.bit.SIGNALMODE = signalmode;
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if(adcOffsetTrim > 0x0)
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{
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AdccRegs.ADCOFFTRIM.all = adcOffsetTrim;
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}
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#ifndef _DUAL_HEADERS
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if(ADC_RESOLUTION_12BIT == resolution)
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#else
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if(ADC_BITRESOLUTION_12BIT == resolution)
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#endif
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{
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AdccRegs.ADCCTL2.bit.RESOLUTION = 0;
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//
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// 12-bit linearity trim workaround
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//
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AdccRegs.ADCINLTRIM1 &= 0xFFFF0000;
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AdccRegs.ADCINLTRIM2 &= 0xFFFF0000;
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AdccRegs.ADCINLTRIM4 &= 0xFFFF0000;
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AdccRegs.ADCINLTRIM5 &= 0xFFFF0000;
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}
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else
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{
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AdccRegs.ADCCTL2.bit.RESOLUTION = 1;
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}
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break;
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}
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case ADC_ADCD:
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{
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AdcdRegs.ADCCTL2.bit.SIGNALMODE = signalmode;
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if(adcOffsetTrim > 0x0)
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{
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AdcdRegs.ADCOFFTRIM.all = adcOffsetTrim;
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}
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#ifndef _DUAL_HEADERS
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if(ADC_RESOLUTION_12BIT == resolution)
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#else
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if(ADC_BITRESOLUTION_12BIT == resolution)
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#endif
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{
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AdcdRegs.ADCCTL2.bit.RESOLUTION = 0;
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//
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// 12-bit linearity trim workaround
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//
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AdcdRegs.ADCINLTRIM1 &= 0xFFFF0000;
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AdcdRegs.ADCINLTRIM2 &= 0xFFFF0000;
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AdcdRegs.ADCINLTRIM4 &= 0xFFFF0000;
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AdcdRegs.ADCINLTRIM5 &= 0xFFFF0000;
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}
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else
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{
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AdcdRegs.ADCCTL2.bit.RESOLUTION = 1;
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}
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break;
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}
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}
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}
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//
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// CalAdcINL - Loads INL trim values from OTP into the trim registers of the
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// specified ADC. Use only as part of AdcSetMode function, since
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// linearity trim correction is needed for some modes.
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//
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void CalAdcINL(Uint16 adc)
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{
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volatile Uint32 *inlRegBaseAddr, *inlOTPBaseAddr;
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Uint32 i;
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switch(adc)
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{
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case ADC_ADCA:
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//
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// Pointer to ADCA trim address base
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//
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inlRegBaseAddr = &AdcaRegs.ADCINLTRIM1;
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break;
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case ADC_ADCB:
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//
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// Pointer to ADCB trim address
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//
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inlRegBaseAddr = &AdcbRegs.ADCINLTRIM1;
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break;
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case ADC_ADCC:
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//
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// Pointer to ADCC trim address
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//
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inlRegBaseAddr = &AdccRegs.ADCINLTRIM1;
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break;
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case ADC_ADCD:
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//
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// Pointer to ADCD trim address
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//
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inlRegBaseAddr = &AdcdRegs.ADCINLTRIM1;
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break;
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}
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//
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// OTP trim location for ADC
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//
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inlOTPBaseAddr = GetAdcINLTrimOTPLoc(adc);
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//
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// Populate INL Trim Codes 1 to 6 for respective ADC
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//
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if(TI_OTP_DEV_PRG_KEY_BF == TI_OTP_DEV_KEY_BF)
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{
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for(i = 0; i < 6; i++)
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{
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*inlRegBaseAddr++ = *inlOTPBaseAddr++;
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}
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}
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}
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//
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// End of file
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//
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10
Projects/epwm_test/src/Peripherals/adc_init.c
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10
Projects/epwm_test/src/Peripherals/adc_init.c
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/*
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* adc_init.c
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*
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* Created on: 19 äåê. 2023 ã.
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* Author: seklyuts
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*/
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15
Projects/epwm_test/src/Peripherals/adc_init.h
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15
Projects/epwm_test/src/Peripherals/adc_init.h
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/*
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* adc_init.h
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*
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* Created on: 19 äåê. 2023 ã.
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* Author: seklyuts
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*/
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#ifndef SRC_PERIPHERALS_ADC_INIT_H_
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#define SRC_PERIPHERALS_ADC_INIT_H_
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#endif /* SRC_PERIPHERALS_ADC_INIT_H_ */
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