diff --git a/Projects/mem_test/src/Peripherals/ipc_init.c b/Projects/mem_test/src/Peripherals/ipc_init.c
index bd66362..cf7ea80 100644
--- a/Projects/mem_test/src/Peripherals/ipc_init.c
+++ b/Projects/mem_test/src/Peripherals/ipc_init.c
@@ -20,6 +20,7 @@
 #include "GD25Q16ETIGR.h"
 #include "emif_init.h"
 #include "spi_init.h"
+#include "sysctl.h"
 #endif
 //#pragma DATA_SECTION(readData, "MSGRAM_CPU_TO_CM")
 //uint32_t readData[10];
@@ -382,8 +383,13 @@ void ipc_run(void)
 #ifdef CPU1
             if((InCommand >> 16) == RESET_NOW)
             {
-//                CpuSysRegs.SIMRESET.bit.XRSn = 1;
-                CpuSysRegs.SIMRESET.bit.CPU1RSn = 1;
+//                CpuSysRegs.SIMRESET.all = 0xA5A50002;//bit.XRSn
+
+//                EALLOW;
+//                CmConfRegs.CMRESCTL.all = SYSCTL_CMRESCTL_RESET | SYSCTL_REG_KEY;//.bit.RESETSTS = 1;
+//                DevCfgRegs.CPU2RESCTL.all =  ((uint32_t)SYSCTL_CPU2RESCTL_RESET |(SYSCTL_REG_KEY & SYSCTL_CPU2RESCTL_KEY_M)); //.bit.RESET = 1;
+//                EDIS;
+                CpuSysRegs.SIMRESET.all =  ((uint32_t)SYSCTL_REG_KEY | (uint32_t)1);
                 IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C, 0, 0);
                 IPC_setFlagLtoR(IPC_CPU1_L_CM_R,(1<<0));
                 ReadFromCm = 0;