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отлажен алгоритм чтения/записи для BL25CM1A

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This commit is contained in:
Eugene 2023-11-23 09:07:58 +03:00
parent 80ea1ca20d
commit 980c4080ff
15 changed files with 236 additions and 150 deletions
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10
Projects/mem_test/.launches/mem_test.launch
View File

@ -2,9 +2,11 @@
<launchConfiguration type="com.ti.ccstudio.debug.launchType.device.debugging"> <launchConfiguration type="com.ti.ccstudio.debug.launchType.device.debugging">
<mapAttribute key="ccs.memoryview.format"> <mapAttribute key="ccs.memoryview.format">
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_1@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1@#$1" value="16-Bit Hex - TI Style"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_1@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1@#$1" value="16-Bit Hex - TI Style"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_1@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0@#$0" value="32-Bit Hex - TI Style"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_1@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0@#$0" value="16-Bit Hex - C Style"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1@#$1" value="16-Bit Hex - C Style"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2@#$1" value="16-Bit Hex - TI Style"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2@#$1" value="16-Bit Hex - TI Style"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0@#$0" value="16-Bit Hex - C Style"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0@#$0" value="16-Bit Hex - C Style"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1@#$1" value="16-Bit Hex - C Style"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2@#$1" value="16-Bit Hex - TI Style"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2@#$1" value="16-Bit Hex - TI Style"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0@#$0" value="16-Bit Hex - C Style"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0@#$0" value="16-Bit Hex - C Style"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_4@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1@#$1" value="16-Bit Hex - TI Style"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_4@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1@#$1" value="16-Bit Hex - TI Style"/>
@ -18,14 +20,16 @@
</mapAttribute> </mapAttribute>
<mapAttribute key="ccs.memoryview.pageexpr"> <mapAttribute key="ccs.memoryview.pageexpr">
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_1@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x82000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_1@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x82000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_1@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0" value="@@0x20080000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_1@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0" value="@@0x20082000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x38000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2" value="Data@@0"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2" value="Data@@0"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0" value="@@0x20086000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_2@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0" value="@@0x20086000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x39000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2" value="Data@@0x80000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2" value="Data@@0x80000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0" value="@@0x20082000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_3@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0" value="@@0x20082000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_4@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x38000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_4@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x38000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_5@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x39000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser.PIN_CLONE_VIEW_5@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x39000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x82000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU1" value="Data@@0x2008000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2" value="Data@@0x82000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser@#$Texas Instruments XDS100v2 USB Debug Probe_0/C28xx_CPU2" value="Data@@0x82000"/>
<mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0" value="@@0x20080000"/> <mapEntry key="org.eclipse.cdt.debug.ui.memory.memorybrowser.MemoryBrowser@#$Texas Instruments XDS100v2 USB Debug Probe_0/Cortex_M4_0" value="@@0x20080000"/>
</mapAttribute> </mapAttribute>

153
Projects/mem_test/src/ExternalEEPROM/BL25CM1A.c
View File

@ -8,6 +8,7 @@
#include "spi_init.h" #include "spi_init.h"
#include "BL25CM1A.h" #include "BL25CM1A.h"
#include "Arr.h"
#define WREN 0b00000110 //Enable Write Operations #define WREN 0b00000110 //Enable Write Operations
#define WRDI 0b00000100 //Disable Write Operations #define WRDI 0b00000100 //Disable Write Operations
@ -20,10 +21,10 @@
#define RDLS 0b10000011 //Reads the identification page lock status #define RDLS 0b10000011 //Reads the identification page lock status
#define LID 0b10000010 //Locks the identification page in read-only mode #define LID 0b10000010 //Locks the identification page in read-only mode
#define FIFO_SIZE 8
uint16_t sdata2 = RDSR; // sent data uint16_t WaitedTimes = 0;
uint16_t rdata2[16] ; // received data uint16_t Stat = 1;
//uint16_t error2 = 0;
void Bl25cm1a_en(void) void Bl25cm1a_en(void)
{ {
@ -36,25 +37,31 @@ void Bl25cm1a_en(void)
empty = SpiRegs.SPIRXBUF; empty = SpiRegs.SPIRXBUF;
} }
uint16_t Bl25cm1a_ReadStatus(void)
void Bl25cm1a_write(void)
{ {
transmitData(sdata2); volatile uint16_t empty;
transmitData(0xFF); transmitData(RDSR);
while(SpiRegs.SPIFFRX.bit.RXFFST != 2) transmitData(0xFF);
{ while(SpiRegs.SPIFFRX.bit.RXFFST != 2)
{
} }
rdata2[0] = SpiRegs.SPIRXBUF; empty = SpiRegs.SPIRXBUF;
rdata2[1] = SpiRegs.SPIRXBUF; empty = SpiRegs.SPIRXBUF;
return empty;
} }
#define FIFO_SIZE 8
void Bl25cm1a_read_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte) void Bl25cm1a_read_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte)
{ {
volatile uint16_t empty, i, j; volatile uint16_t empty, i, j;
Stat = Bl25cm1a_ReadStatus();
while((Stat&0x1) != 0 )
{
Stat = Bl25cm1a_ReadStatus();
WaitedTimes++;
}
transmitData(READ); transmitData(READ);
transmitData(Addr>>16); transmitData(Addr>>16);
transmitData(Addr>>8); transmitData(Addr>>8);
@ -77,11 +84,22 @@ void Bl25cm1a_read_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte)
void Bl25cm1a_write_8_bytes(uint32_t Addr, char * write_data, uint16_t num_byte) void Bl25cm1a_write_8_bytes(uint32_t Addr, char * write_data, uint16_t num_byte)
{ {
volatile uint16_t empty, i, j; volatile uint16_t empty, i, j;
Stat = Bl25cm1a_ReadStatus();
while((Stat&0x1) != 0 )
{
Stat = Bl25cm1a_ReadStatus();
WaitedTimes++;
}
Bl25cm1a_en();
transmitData(WRITE); transmitData(WRITE);
transmitData(Addr>>16); transmitData(Addr>>16);
transmitData(Addr>>8); transmitData(Addr>>8);
transmitData(Addr); transmitData(Addr);
for(i = 0; i<num_byte; i++) transmitData(rdata2[i]); for(i = 0; i<num_byte; i++) transmitData(write_data[i]);
while(SpiRegs.SPIFFRX.bit.RXFFST != (num_byte+4)) while(SpiRegs.SPIFFRX.bit.RXFFST != (num_byte+4))
{ {
@ -99,6 +117,14 @@ void Bl25cm1a_write_8_bytes(uint32_t Addr, char * write_data, uint16_t num_byte)
uint16_t Bl25cm1a_verify_8_bytes(uint32_t Addr, char * verify_data, uint16_t num_byte) uint16_t Bl25cm1a_verify_8_bytes(uint32_t Addr, char * verify_data, uint16_t num_byte)
{ {
volatile uint16_t empty, i, j; volatile uint16_t empty, i, j;
Stat = Bl25cm1a_ReadStatus();
while((Stat&0x1) != 0 )
{
Stat = Bl25cm1a_ReadStatus();
WaitedTimes++;
}
transmitData(READ); transmitData(READ);
transmitData(Addr>>16); transmitData(Addr>>16);
transmitData(Addr>>8); transmitData(Addr>>8);
@ -119,69 +145,94 @@ uint16_t Bl25cm1a_verify_8_bytes(uint32_t Addr, char * verify_data, uint16_t nu
return 0; return 0;
} }
void Bl25cm1a_read_data(uint32_t Addr, uint16_t quant, char * read_data) void Bl25cm1a_read_data(uint32_t Addr, uint16_t quant16, uint16_t * read_data)
{ {
uint32_t i=0; uint32_t i=0;
char * addr_read_data = read_data; uint32_t Addressfull8bit;
char addr_read_data[8];
if(quant > 8) if(quant16 > 4)
{ {
for(i = 0; i < (quant-8); i += 8) for(i = 0; i < (quant16-4); i += 4)
{ {
Bl25cm1a_read_8_bytes(Addr+i, addr_read_data, 8); Addressfull8bit = Addr+2*i;
addr_read_data += 8; Bl25cm1a_read_8_bytes(Addressfull8bit, addr_read_data, 8);
copy8_to_16(addr_read_data, read_data, 4);
read_data+=4;
} }
} }
if(i < quant) Bl25cm1a_read_8_bytes(Addr+i, addr_read_data, quant - i); if(i < quant16)
{
Addressfull8bit = Addr+2*i;
Bl25cm1a_read_8_bytes(Addressfull8bit, addr_read_data, 2*(quant16 - i));
copy8_to_16(addr_read_data, read_data, (quant16 - i));
}
} }
uint16_t Bl25cm1a_verify_data(uint32_t Addr, uint16_t quant, char * verify_data) uint16_t Bl25cm1a_verify_data(uint32_t Addr, uint16_t quant, uint16_t * verify_data)
{ {
uint32_t i=0; uint32_t i=0;
char * addr_read_data = verify_data; char addr_vfy_data[8];
if(quant > 8) if(quant > 4)
{ {
for(i = 0; i < (quant-8); i += 8) for(i = 0; i < (quant-4); i += 4)
{ {
if(Bl25cm1a_verify_8_bytes(Addr+i, addr_read_data, 8)) return 1; copy16_to_8(verify_data, addr_vfy_data, 4);
addr_read_data += 8; if(Bl25cm1a_verify_8_bytes(Addr+2*i, addr_vfy_data, 8)) return 1;
verify_data+=4;
} }
} }
if(i < quant) if(Bl25cm1a_verify_8_bytes(Addr+i, addr_read_data, quant - i)) return 1; if(i < quant)
{
copy16_to_8(verify_data, addr_vfy_data, (quant - i));
if(Bl25cm1a_verify_8_bytes(Addr+2*i, addr_vfy_data, 2*(quant - i))) return 1;
}
return 0; return 0;
} }
void Bl25cm1a_write_1_page(uint32_t Addr, uint16_t quant, char * write_data) void Bl25cm1a_write_1_page(uint32_t Addr, uint16_t quant, uint16_t * write_data)
{ {
uint32_t i=0; uint32_t i=0;
char * addr_write_data = write_data; char addr_write_data[8];
uint32_t Addressfull8bit;
if(quant > 8) if(quant > 4)
{ {
for(i = 0; i < (quant-8); i += 8) for(i = 0; i < (quant-4); i += 4)
{ {
Bl25cm1a_write_8_bytes(Addr+i, addr_write_data, 8); copy16_to_8(write_data, addr_write_data, 4);
addr_write_data += 8; Addressfull8bit = Addr+2*i;
Bl25cm1a_write_8_bytes(Addressfull8bit, addr_write_data, 8);
write_data += 4;
} }
} }
if(i < quant) Bl25cm1a_write_8_bytes(Addr+i, addr_write_data, quant - i); if(i < quant)
}
void Bl25cm1a_write_data(uint32_t Addr, uint16_t quant, char * write_data)
{
char * addr_write_data = write_data;
uint16_t page_quant = 0;
while( (Addr&0xFF)+quant > BL25CM1A0_PAGE) //åñëè äàííûå âûõîäÿò çà ãðàíèöó òåêóùåé ñòðàíèöû
{ {
page_quant = BL25CM1A0_PAGE - (Addr&0xFF); //âû÷èñëÿåì êîë-âî äàííûõ äî êîíöà òåêóùåé ñòðàíèöû copy16_to_8(write_data, addr_write_data, (quant - i));
Bl25cm1a_write_1_page(Addr, page_quant, addr_write_data); //çàïèñûâàåì ýòè äàííûå íà òåêóùóþ ñòðàíèöó Addressfull8bit = Addr+2*i;
Addr += page_quant; //ïåðåëèñòûâàåì ñòðàíèöó âíåøíåé ïàìÿòè Bl25cm1a_write_8_bytes(Addressfull8bit, addr_write_data, 2*(quant - i));
addr_write_data += page_quant; //øàãàåì íà ñëåäóþùèå íåçàïèñàííûå äàííûå â áóôåðå }
quant -= page_quant; //óìåíüøàåì êîë-âî äàííûõ íà âåëè÷èíó êîòîðóþ óæå çàïèñàëè }
void Bl25cm1a_write_data(uint32_t Addr_8bit, uint16_t quant_16bit, uint16_t * write_data)
{
uint16_t * addr_write_data = write_data;
uint16_t page_quant_8bit = 0;
while( (Addr_8bit&0xFF)+(2*quant_16bit) > BL25CM1A0_PAGE) //åñëè äàííûå âûõîäÿò çà ãðàíèöó òåêóùåé ñòðàíèöû
{
page_quant_8bit = BL25CM1A0_PAGE - (Addr_8bit&0xFF); //âû÷èñëÿåì êîë-âî áàéò äàííûõ äî êîíöà òåêóùåé ñòðàíèöû
Bl25cm1a_write_1_page(Addr_8bit, page_quant_8bit/2, addr_write_data); //çàïèñûâàåì ýòè äàííûå íà òåêóùóþ ñòðàíèöó
Addr_8bit += page_quant_8bit; //ïåðåëèñòûâàåì ñòðàíèöó âíåøíåé ïàìÿòè
addr_write_data += page_quant_8bit/2; //øàãàåì íà ñëåäóþùèå íåçàïèñàííûå äàííûå â áóôåðå
quant_16bit -= page_quant_8bit/2; //óìåíüøàåì êîë-âî äàííûõ íà âåëè÷èíó êîòîðóþ óæå çàïèñàëè
}
if(quant_16bit > 0)
{
Bl25cm1a_write_1_page(Addr_8bit, quant_16bit, addr_write_data); //åñëè äàííûå äëÿ çàïèñè îñòàëèñü, òî çàïèñûâàåì èõ
} }
if(quant > 0) Bl25cm1a_write_1_page(Addr, quant, addr_write_data); //åñëè äàííûå äëÿ çàïèñè îñòàëèñü, òî çàïèñûâàåì èõ
} }

8
Projects/mem_test/src/ExternalEEPROM/BL25CM1A.h
View File

@ -12,8 +12,8 @@
#define BL25CM1A0_PAGE 0x100 #define BL25CM1A0_PAGE 0x100
void Bl25cm1a_en(void); void Bl25cm1a_en(void);
void Bl25cm1a_write(void);
void Bl25cm1a_write_data(uint32_t Addr, uint16_t quant, char * write_data); void Bl25cm1a_write_data(uint32_t Addr, uint16_t quant, uint16_t * write_data);
void Bl25cm1a_read_data(uint32_t Addr, uint16_t quant, char * read_data); void Bl25cm1a_read_data(uint32_t Addr, uint16_t quant, uint16_t * read_data);
uint16_t Bl25cm1a_verify_data(uint32_t Addr, uint16_t quant, char * verify_data); uint16_t Bl25cm1a_verify_data(uint32_t Addr, uint16_t quant, uint16_t * verify_data);
#endif /* SRC_BL25CM1A_H_ */ #endif /* SRC_BL25CM1A_H_ */

44
Projects/mem_test/src/ExternalEEPROM/GD25Q16ETIGR.c
View File

@ -21,11 +21,12 @@
#define ReadManufacturerDeviceID 0x90 #define ReadManufacturerDeviceID 0x90
#define PageProgram 0x02 //A23-A16 A15-A8 A7-A0 D7-D0 #define PageProgram 0x02 //A23-A16 A15-A8 A7-A0 D7-D0
#define SectorErase 0x20 //A23-A16 A15-A8 A7-A0 #define SectorErase 0x20 //A23-A16 A15-A8 A7-A0
#define Chip Erase 0xC7 //0x60 #define ChipErase 0xC7 //0x60
uint16_t sdata1 = ReadStatusRegister1; // sent data uint16_t sdata1 = ReadStatusRegister1; // sent data
uint16_t rdata1[16]; // received data //uint16_t rdata1[16]; // received data
//uint16_t error1 = 0; //uint16_t error1 = 0;
char GD25Q16ETIGR_buffer8bytes[8];
void GD25Q16ETIGR_en(void) void GD25Q16ETIGR_en(void)
@ -40,20 +41,28 @@ void GD25Q16ETIGR_en(void)
} }
void GD25Q16ETIGR_write(void)
{
transmitData(sdata1);
transmitData(0xFF);
while(SpiRegs.SPIFFRX.bit.RXFFST != 2)
{
}
rdata1[0] = SpiRegs.SPIRXBUF;
rdata1[1] = SpiRegs.SPIRXBUF;
}
#define FIFO_SIZE 8 #define FIFO_SIZE 8
void GD25Q16ETIGR_sector_erase(uint32_t Addr)
{
volatile uint16_t empty;
GD25Q16ETIGR_en();
transmitData(ReadData);
transmitData(Addr>>16);
transmitData(Addr>>8);
transmitData(Addr);
while(SpiRegs.SPIFFRX.bit.RXFFST != 4)
{
}
empty = SpiRegs.SPIRXBUF;
empty = SpiRegs.SPIRXBUF;
empty = SpiRegs.SPIRXBUF;
empty = SpiRegs.SPIRXBUF;
}
void GD25Q16ETIGR_read_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte)//÷òåíèå äî 8 áàéò void GD25Q16ETIGR_read_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte)//÷òåíèå äî 8 áàéò
{ {
volatile uint16_t empty, i, j; volatile uint16_t empty, i, j;
@ -99,15 +108,15 @@ uint16_t GD25Q16ETIGR_verify_8_bytes(uint32_t Addr, char * verify_data, uint16_t
return 0; return 0;
} }
void GD25Q16ETIGR_write_8_bytes(uint32_t Addr, char * read_data, uint16_t num_byte)//çàïèñü äî 8 áàéò void GD25Q16ETIGR_write_8_bytes(uint32_t Addr, char * write_data, uint16_t num_byte)//çàïèñü äî 8 áàéò
{ {
volatile uint16_t empty, i, j; volatile uint16_t empty, i, j;
GD25Q16ETIGR_en();
transmitData(PageProgram); transmitData(PageProgram);
transmitData(Addr>>16); transmitData(Addr>>16);
transmitData(Addr>>8); transmitData(Addr>>8);
transmitData(Addr); transmitData(Addr);
for(i = 0; i<num_byte; i++) transmitData(rdata1[i]); for(i = 0; i<num_byte; i++) transmitData(write_data[i]);
while(SpiRegs.SPIFFRX.bit.RXFFST != (num_byte+4)) while(SpiRegs.SPIFFRX.bit.RXFFST != (num_byte+4))
{ {
@ -190,7 +199,7 @@ uint16_t GD25Q16ETIGR_verify_data(uint32_t Addr, uint16_t quant, char * verify_d
} }
void GD25Q16ETIGR_ReadManufacturerDeviceID(void) uint16_t GD25Q16ETIGR_ReadManufacturerDeviceID(void)
{ {
volatile uint16_t empty, i, j; volatile uint16_t empty, i, j;
transmitData(ReadManufacturerDeviceID); transmitData(ReadManufacturerDeviceID);
@ -202,6 +211,7 @@ void GD25Q16ETIGR_ReadManufacturerDeviceID(void)
} }
for(j = 0; j<6; j++) for(j = 0; j<6; j++)
{ {
rdata1[j] = SpiRegs.SPIRXBUF; empty = SpiRegs.SPIRXBUF;
} }
return empty;
} }

2
Projects/mem_test/src/ExternalEEPROM/GD25Q16ETIGR.h
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@ -16,6 +16,6 @@ void GD25Q16ETIGR_write(void);
void GD25Q16ETIGR_write_data(uint32_t Addr, uint16_t quant, char * write_data); void GD25Q16ETIGR_write_data(uint32_t Addr, uint16_t quant, char * write_data);
void GD25Q16ETIGR_read_data(uint32_t Addr, uint16_t quant, char * read_data); void GD25Q16ETIGR_read_data(uint32_t Addr, uint16_t quant, char * read_data);
uint16_t GD25Q16ETIGR_verify_data(uint32_t Addr, uint16_t quant, char * verify_data); uint16_t GD25Q16ETIGR_verify_data(uint32_t Addr, uint16_t quant, char * verify_data);
void GD25Q16ETIGR_ReadManufacturerDeviceID(void); uint16_t GD25Q16ETIGR_ReadManufacturerDeviceID(void);
#endif /* SRC_GD25Q16ETIGR_H_ */ #endif /* SRC_GD25Q16ETIGR_H_ */

10
Projects/mem_test/src/Peripherals/emif_init.c Normal file
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@ -0,0 +1,10 @@
/*
* emif_init.c
*
* Created on: 20 íîÿá. 2023 ã.
* Author: seklyuts
*/

15
Projects/mem_test/src/Peripherals/emif_init.h Normal file
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@ -0,0 +1,15 @@
/*
* emif_init.h
*
* Created on: 20 íîÿá. 2023 ã.
* Author: seklyuts
*/
#ifndef SRC_EMIF_INIT_H_
#define SRC_EMIF_INIT_H_
#endif /* SRC_EMIF_INIT_H_ */

0
Projects/mem_test/src/flash_programming_f2838x_c28x.h → Projects/mem_test/src/Peripherals/flash_programming_f2838x_c28x.h
View File

0
Projects/mem_test/src/internal_flash.c → Projects/mem_test/src/Peripherals/internal_flash.c
View File

0
Projects/mem_test/src/internal_flash.h → Projects/mem_test/src/Peripherals/internal_flash.h
View File

21
Projects/mem_test/src/Peripherals/ipc.c
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@ -96,8 +96,8 @@ const IPC_Instance_t IPC_Instance[IPC_TOTAL_NUM] = {
.IPC_Offset_Corr = IPC_ADDR_OFFSET_NOCHANGE .IPC_Offset_Corr = IPC_ADDR_OFFSET_NOCHANGE
#if IPC_MSGQ_SUPPORT == 1U #if IPC_MSGQ_SUPPORT == 1U
, ,
.IPC_PutBuffer = (uint16_t *)CPU1TOCPU2MSGRAM0_BASE, .IPC_PutBuffer = (IPC_PutBuffer_t *)CPU1TOCPU2MSGRAM0_BASE,
.IPC_GetBuffer = (uint16_t *)CPU2TOCPU1MSGRAM0_BASE .IPC_GetBuffer = (IPC_GetBuffer_t *)CPU2TOCPU1MSGRAM0_BASE
#endif #endif
}, },
@ -119,8 +119,8 @@ const IPC_Instance_t IPC_Instance[IPC_TOTAL_NUM] = {
.IPC_Offset_Corr = IPC_ADDR_OFFSET_DIV2 .IPC_Offset_Corr = IPC_ADDR_OFFSET_DIV2
#if IPC_MSGQ_SUPPORT == 1U #if IPC_MSGQ_SUPPORT == 1U
, ,
.IPC_PutBuffer = (uint16_t *)CPUXTOCMMSGRAM0_BASE, .IPC_PutBuffer = (IPC_PutBuffer_t *)CPUXTOCMMSGRAM0_BASE,
.IPC_GetBuffer = (uint16_t *)CMTOCPUXMSGRAM0_BASE .IPC_GetBuffer = (IPC_GetBuffer_t *)CMTOCPUXMSGRAM0_BASE
#endif #endif
}, },
@ -140,8 +140,8 @@ const IPC_Instance_t IPC_Instance[IPC_TOTAL_NUM] = {
.IPC_Offset_Corr = IPC_ADDR_OFFSET_NOCHANGE .IPC_Offset_Corr = IPC_ADDR_OFFSET_NOCHANGE
#if IPC_MSGQ_SUPPORT == 1U #if IPC_MSGQ_SUPPORT == 1U
, ,
.IPC_PutBuffer = (uint16_t *)CPU2TOCPU1MSGRAM0_BASE, .IPC_PutBuffer = (IPC_PutBuffer_t *)CPU2TOCPU1MSGRAM0_BASE,
.IPC_GetBuffer = (uint16_t *)CPU1TOCPU2MSGRAM0_BASE .IPC_GetBuffer = (IPC_GetBuffer_t *)CPU1TOCPU2MSGRAM0_BASE
#endif #endif
}, },
@ -164,8 +164,8 @@ const IPC_Instance_t IPC_Instance[IPC_TOTAL_NUM] = {
.IPC_Offset_Corr = IPC_ADDR_OFFSET_DIV2 .IPC_Offset_Corr = IPC_ADDR_OFFSET_DIV2
#if IPC_MSGQ_SUPPORT == 1U #if IPC_MSGQ_SUPPORT == 1U
, ,
.IPC_PutBuffer = (uint16_t *)CPUXTOCMMSGRAM0_BASE, .IPC_PutBuffer = (IPC_PutBuffer_t *)CPUXTOCMMSGRAM0_BASE,
.IPC_GetBuffer = (uint16_t *)CMTOCPUXMSGRAM0_BASE .IPC_GetBuffer = (IPC_GetBuffer_t *)CMTOCPUXMSGRAM0_BASE
#endif #endif
} }
}; };
@ -175,14 +175,13 @@ const IPC_Instance_t IPC_Instance[IPC_TOTAL_NUM] = {
// IPC_sendCommand // IPC_sendCommand
// //
//***************************************************************************** //*****************************************************************************
bool IPC_sendCommand(IPC_Type_t ipcType, uint32_t flags, bool addrCorrEnable, bool IPC_sendCommand(IPC_Type_t ipcType, uint32_t command, uint16_t devID, uint32_t addr, uint32_t data)
uint32_t command, uint32_t addr, uint32_t data)
{ {
bool ret; bool ret;
ret = true; ret = true;
IPC_Instance[ipcType].IPC_SendCmd_Reg->IPC_SENDCOM = command; IPC_Instance[ipcType].IPC_SendCmd_Reg->IPC_SENDCOM = (command << 16) + devID;
IPC_Instance[ipcType].IPC_SendCmd_Reg->IPC_SENDDATA = data; IPC_Instance[ipcType].IPC_SendCmd_Reg->IPC_SENDDATA = data;
IPC_Instance[ipcType].IPC_SendCmd_Reg->IPC_SENDADDR = addr; IPC_Instance[ipcType].IPC_SendCmd_Reg->IPC_SENDADDR = addr;

3
Projects/mem_test/src/Peripherals/ipc.h
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@ -556,8 +556,7 @@ IPC_init(IPC_Type_t ipcType)
// //
//***************************************************************************** //*****************************************************************************
extern bool extern bool
IPC_sendCommand(IPC_Type_t ipcType, uint32_t flags, bool addrCorrEnable, IPC_sendCommand(IPC_Type_t ipcType, uint32_t command, uint16_t devID, uint32_t addr, uint32_t data);
uint32_t command, uint32_t addr, uint32_t data);
//***************************************************************************** //*****************************************************************************
// //

117
Projects/mem_test/src/Peripherals/ipc_init.c
View File

@ -18,6 +18,7 @@
#include "ZD24C02A.h" #include "ZD24C02A.h"
#include "BL25CM1A.h" #include "BL25CM1A.h"
#include "GD25Q16ETIGR.h" #include "GD25Q16ETIGR.h"
#include "emif_init.h"
#endif #endif
//#pragma DATA_SECTION(readData, "MSGRAM_CPU_TO_CM") //#pragma DATA_SECTION(readData, "MSGRAM_CPU_TO_CM")
//uint32_t readData[10]; //uint32_t readData[10];
@ -30,11 +31,12 @@
#define FLASH_ECC_FAIL 0x14 #define FLASH_ECC_FAIL 0x14
#define WRONG_LENGHT 0x15 #define WRONG_LENGHT 0x15
#define WRONG_ADDR 0x16 #define WRONG_ADDR 0x16
#define WRONG_ID 0x17
#define COMMAND_ACCEPTED 0x20 #define COMMAND_ACCEPTED 0x20
#define DONE_SUCCESS 0x21 #define DONE_SUCCESS 0x21
#define Flash 0xA0 #define INT_FLASH 0xA0
#define EMIF 0xA1 #define EMIF 0xA1
#define BL25CM1A_1M_bit_SPI 0xA2 #define BL25CM1A_1M_bit_SPI 0xA2
#define GD25Q16E_16M_bit_SPI 0xA3 #define GD25Q16E_16M_bit_SPI 0xA3
@ -114,9 +116,9 @@ void getMessage_from_Cm_Flash(void)
uint32_t block1, block2; uint32_t block1, block2;
uint16_t MemOperationError = 0; uint16_t MemOperationError = 0;
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;} if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, INT_FLASH, 0, 0); return;}
if((InAddr+InData) > 0x40000) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;} if((InAddr+InData) > 0x40000) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, INT_FLASH, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, INT_FLASH, 0, 0);
FactAddressFlash = InAddr + Bzero_Sector0_start; FactAddressFlash = InAddr + Bzero_Sector0_start;
@ -124,7 +126,7 @@ void getMessage_from_Cm_Flash(void)
{ {
case READ: case READ:
putFlashMessage_to_Cm(FactAddressFlash, InData); putFlashMessage_to_Cm(FactAddressFlash, InData);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, INT_FLASH, 0, 0);
break; break;
case WRITE: case WRITE:
FlashSektorStart = Internal_flash_Sektor_Addr(FactAddressFlash); //ñåêòîð ñ êîòîðîãî íà÷èíàåòñÿ çàïèñü FlashSektorStart = Internal_flash_Sektor_Addr(FactAddressFlash); //ñåêòîð ñ êîòîðîãî íà÷èíàåòñÿ çàïèñü
@ -133,12 +135,12 @@ void getMessage_from_Cm_Flash(void)
{ {
MemOperationError = Internal_flash_Erase(FactAddressFlash); // åñëè ñåêòîð ñ êîòîðîãî íà÷èíàåì çàïèñü íå áûë ñò¸ðò, òî ñòèðàåì åãî MemOperationError = Internal_flash_Erase(FactAddressFlash); // åñëè ñåêòîð ñ êîòîðîãî íà÷èíàåì çàïèñü íå áûë ñò¸ðò, òî ñòèðàåì åãî
if(!MemOperationError) BlockWasErased[FlashSektorStart] = 1; if(!MemOperationError) BlockWasErased[FlashSektorStart] = 1;
else {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì else {IPC_sendCommand(IPC_CPU1_L_CM_R, MemOperationError, INT_FLASH, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
} }
if(FlashSektorEnd == FlashSektorStart) //åñëè çàêàí÷èâàåì â ýòîì æå ñåêòîðå ÷òî è íà÷àëè, òî ïðîñòî ïèøåì åãî if(FlashSektorEnd == FlashSektorStart) //åñëè çàêàí÷èâàåì â ýòîì æå ñåêòîðå ÷òî è íà÷àëè, òî ïðîñòî ïèøåì åãî
{ {
MemOperationError = Internal_flash_Program_AutoECC(FactAddressFlash, InData); MemOperationError = Internal_flash_Program_AutoECC(FactAddressFlash, InData);
if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, MemOperationError, INT_FLASH, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
} }
else //åñëè íà÷àëè â îäíîì ñåêòîðå, à çàêàí÷èâàåì â äðóãîì òî else //åñëè íà÷àëè â îäíîì ñåêòîðå, à çàêàí÷èâàåì â äðóãîì òî
{ {
@ -146,27 +148,27 @@ void getMessage_from_Cm_Flash(void)
{ {
MemOperationError = Internal_flash_Erase(FactAddressFlash+InData); MemOperationError = Internal_flash_Erase(FactAddressFlash+InData);
if(!MemOperationError)BlockWasErased[FlashSektorEnd] = 1; if(!MemOperationError)BlockWasErased[FlashSektorEnd] = 1;
else {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì else {IPC_sendCommand(IPC_CPU1_L_CM_R, MemOperationError, INT_FLASH, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
} }
block1 = internal_flash_FlashBankStartAddr(FlashSektorEnd)-FactAddressFlash; //âû÷èñëÿåì ðàçìåð ïåðâîãî êóñêà block1 = internal_flash_FlashBankStartAddr(FlashSektorEnd)-FactAddressFlash; //âû÷èñëÿåì ðàçìåð ïåðâîãî êóñêà
block2 = InData - block1; //è ðàçìåð êóñêà äëÿ âòîðîãî ñåêòîðà block2 = InData - block1; //è ðàçìåð êóñêà äëÿ âòîðîãî ñåêòîðà
MemOperationError = Internal_flash_Program_AutoECC(FactAddressFlash, block1); // è ïèøåì ñïåðâà êóñîê â ïåðâûé ñåêòîð, MemOperationError = Internal_flash_Program_AutoECC(FactAddressFlash, block1); // è ïèøåì ñïåðâà êóñîê â ïåðâûé ñåêòîð,
if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, MemOperationError, INT_FLASH, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
MemOperationError = Internal_flash_Program_AutoECC(internal_flash_FlashBankStartAddr(FlashSektorEnd), block2); // ïîòîì êóñîê âî âòîðîé MemOperationError = Internal_flash_Program_AutoECC(internal_flash_FlashBankStartAddr(FlashSektorEnd), block2); // ïîòîì êóñîê âî âòîðîé
if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, MemOperationError, INT_FLASH, 0, 0); return;}//åñëè îøèáêà -- îòïðàâëÿåì ñîîáùåíèå è çàâåðøàåì
} }
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, INT_FLASH, 0, 0);
break; break;
case VERIFY: case VERIFY:
MemOperationError = verifyFlashMessage_to_Cm(FactAddressFlash, InData); MemOperationError = verifyFlashMessage_to_Cm(FactAddressFlash, InData);
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0); if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, ERROR_VERIFY, INT_FLASH, MemOperationError, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, INT_FLASH, 0, 0);
break; break;
case END: case END:
clear_BlockWasErased(); clear_BlockWasErased();
break; break;
default: default:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_COMMAND, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, INT_FLASH, 0, 0);
break; break;
} }
} }
@ -175,9 +177,9 @@ void getMessage_from_Cm_Flash(void)
void getMessage_from_Cm_EMIF(void) void getMessage_from_Cm_EMIF(void)
{ {
uint16_t MemOperationError = 0; uint16_t MemOperationError = 0;
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;} if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, EMIF, 0, 0); return;}
if((InAddr+InData) > 0x100000) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;} if((InAddr+InData) > 0x100000) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, EMIF, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, EMIF, 0, 0);
switch(InCommand >> 16) switch(InCommand >> 16)
{ {
@ -191,10 +193,10 @@ void getMessage_from_Cm_EMIF(void)
break; break;
case END: case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, EMIF, 0, 0);
break; break;
default: default:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_COMMAND, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, EMIF, 0, 0);
break; break;
} }
} }
@ -202,33 +204,31 @@ void getMessage_from_Cm_EMIF(void)
void getMessage_from_Cm_BL25CM1A(void) void getMessage_from_Cm_BL25CM1A(void)
{ {
uint16_t MemOperationError = 0; uint16_t MemOperationError = 0;
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;} if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, BL25CM1A_1M_bit_SPI, 0, 0); return;}
if((InAddr+InData) > BL25CM1A0_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;} if((InAddr+InData) > BL25CM1A0_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, BL25CM1A_1M_bit_SPI, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, BL25CM1A_1M_bit_SPI, 0, 0);
switch(InCommand >> 16) switch(InCommand >> 16)
{ {
case READ: case READ:
Bl25cm1a_en(); Bl25cm1a_read_data(2*InAddr, InData, (uint16_t *)CPUXTOCMMSGRAM0_BASE);
Bl25cm1a_read_data(InAddr*2, InData*2, (char *)CPUXTOCMMSGRAM0_BASE); IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, BL25CM1A_1M_bit_SPI, 0, 0);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break; break;
case WRITE: case WRITE:
Bl25cm1a_en(); //Bl25cm1a_en();
Bl25cm1a_write_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE); Bl25cm1a_write_data(2*InAddr, InData, (uint16_t *)CMTOCPUXMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, BL25CM1A_1M_bit_SPI, 0, 0);
break; break;
case VERIFY: case VERIFY:
Bl25cm1a_en(); MemOperationError = Bl25cm1a_verify_data(2*InAddr, InData, (uint16_t *)CMTOCPUXMSGRAM0_BASE);
MemOperationError = Bl25cm1a_verify_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE); if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, ERROR_VERIFY, BL25CM1A_1M_bit_SPI, 0, 0);
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, BL25CM1A_1M_bit_SPI, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0);
break; break;
case END: case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, BL25CM1A_1M_bit_SPI, 0, 0);
break; break;
default: default:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_COMMAND, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, BL25CM1A_1M_bit_SPI, 0, 0);
break; break;
} }
} }
@ -236,33 +236,30 @@ void getMessage_from_Cm_BL25CM1A(void)
void getMessage_from_Cm_GD25Q16E(void) void getMessage_from_Cm_GD25Q16E(void)
{ {
uint16_t MemOperationError = 0; uint16_t MemOperationError = 0;
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;} if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, GD25Q16E_16M_bit_SPI, 0, 0); return;}
if((InAddr+InData) > GD25Q16E_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;} if((InAddr+InData) > GD25Q16E_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, GD25Q16E_16M_bit_SPI, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, GD25Q16E_16M_bit_SPI, 0, 0);
switch(InCommand >> 16) switch(InCommand >> 16)
{ {
case READ: case READ:
GD25Q16ETIGR_en();
GD25Q16ETIGR_read_data(InAddr*2, InData*2, (char *)CPUXTOCMMSGRAM0_BASE); GD25Q16ETIGR_read_data(InAddr*2, InData*2, (char *)CPUXTOCMMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, GD25Q16E_16M_bit_SPI, 0, 0);
break; break;
case WRITE: case WRITE:
GD25Q16ETIGR_en();
GD25Q16ETIGR_write_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE); GD25Q16ETIGR_write_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, GD25Q16E_16M_bit_SPI, 0, 0);
break; break;
case VERIFY: case VERIFY:
GD25Q16ETIGR_en();
MemOperationError = GD25Q16ETIGR_verify_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE); MemOperationError = GD25Q16ETIGR_verify_data(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0); if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, ERROR_VERIFY, GD25Q16E_16M_bit_SPI, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, GD25Q16E_16M_bit_SPI, 0, 0);
break; break;
case END: case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, GD25Q16E_16M_bit_SPI, 0, 0);
break; break;
default: default:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_COMMAND, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, GD25Q16E_16M_bit_SPI, 0, 0);
break; break;
} }
} }
@ -271,33 +268,33 @@ void getMessage_from_Cm_ZD24C02A(void)
{ {
uint16_t MemOperationError = 0; uint16_t MemOperationError = 0;
uint16_t I2CErr = 0; uint16_t I2CErr = 0;
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_LENGHT, 0, 0); return;} if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, ZD24C02A_2K_I2C, 0, 0); return;}
if((InAddr+InData) > ZD24C02A_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_ADDR, 0, 0); return;} if((InAddr+InData) > ZD24C02A_SIZE) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, ZD24C02A_2K_I2C, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C, 0, 0);
switch(InCommand >> 16) switch(InCommand >> 16)
{ {
case READ: case READ:
I2CErr = ZD24C02A_read(InAddr*2, InData*2, (char *)CPUXTOCMMSGRAM0_BASE); I2CErr = ZD24C02A_read(InAddr*2, InData*2, (char *)CPUXTOCMMSGRAM0_BASE);
if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C, 0, 0);
break; break;
case WRITE: case WRITE:
I2CErr = ZD24C02A_write(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE); I2CErr = ZD24C02A_write(InAddr*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, ZD24C02A_2K_I2C, FLASH_ERR, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, ZD24C02A_2K_I2C, DONE_SUCCESS, 0, 0);
break; break;
case VERIFY: case VERIFY:
MemOperationError = ZD24C02A_verify(InData*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE); MemOperationError = ZD24C02A_verify(InData*2, InData*2, (char *)CMTOCPUXMSGRAM0_BASE);
if(MemOperationError == 2) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, ERROR_VERIFY, MemOperationError, 0); if(MemOperationError == 2) IPC_sendCommand(IPC_CPU1_L_CM_R, ERROR_VERIFY, ZD24C02A_2K_I2C, 0, 0);
else if(MemOperationError == 1) IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, MemOperationError, 0, 0); else if(MemOperationError == 1) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, DONE_SUCCESS, 0, 0); else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C, 0, 0);
break; break;
case END: case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, COMMAND_ACCEPTED, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C, 0, 0);
break; break;
default: default:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_COMMAND, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, ZD24C02A_2K_I2C, 0, 0);
break; break;
} }
} }
@ -309,7 +306,7 @@ __interrupt void IPC_ISR0()
switch(InCommand & 0xFFFF) switch(InCommand & 0xFFFF)
{ {
case Flash: case INT_FLASH:
getMessage_from_Cm_Flash(); getMessage_from_Cm_Flash();
break; break;
#ifdef CPU1 #ifdef CPU1
@ -327,7 +324,7 @@ __interrupt void IPC_ISR0()
break; break;
#endif #endif
default: default:
IPC_sendCommand(IPC_CPU1_L_CM_R, 0, 0, WRONG_COMMAND, 0, 0); IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ID, 0, 0, 0);
break; break;
} }

2
Projects/mem_test/src/frmmstr_run.c
View File

@ -15,6 +15,7 @@ volatile uint16_t counter2=0 ;
void frmmstr_run(void) void frmmstr_run(void)
{ {
FMSTR_Poll();
if(FMSTR_is_enable()) { if(FMSTR_is_enable()) {
if(counter < 100) counter++; if(counter < 100) counter++;
else else
@ -27,7 +28,6 @@ void frmmstr_run(void)
counter2++; counter2++;
} }
} }
FMSTR_Poll();
FMSTR_Recorder(); FMSTR_Recorder();
FMSTR_enable_clr(); FMSTR_enable_clr();
} }

1
Projects/mem_test/src/init_perif.c
View File

@ -17,6 +17,7 @@
#include "ZD24C02A.h" #include "ZD24C02A.h"
#include "BL25CM1A.h" #include "BL25CM1A.h"
#include "pwm_init.h" #include "pwm_init.h"
#include "emif_init.h"
#endif #endif