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изменения от Евгения Лапутина внесены

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seklyuts 2024-09-23 14:34:04 +03:00
parent 54e5b58c74
commit 7d999ee9db
37 changed files with 567 additions and 450 deletions
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97
Projects/EFC_IPC_Server_C28/.cproject
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@ -114,40 +114,6 @@
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108
Projects/EFC_IPC_Server_C28/2838x_RAM_combined_lnk_cpu1.cmd
View File

@ -1,48 +1,46 @@
MEMORY
{
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
BEGIN : origin = 0x000000, length = 0x000002 // CPU1 IPC SERVER
BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x0001B1, length = 0x00024F
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
RAMM0 : origin = 0x0001B1, length = 0x00024F // CPU1 IPC SERVER
RAMM1 : origin = 0x000400, length = 0x0003F8 // CPU1 IPC SERVER
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMD01 : origin = 0x00C000, length = 0x001000
RAMLS02 : origin = 0x008000, length = 0x001800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMLS56 : origin = 0x00A800, length = 0x001000
RAMLS7 : origin = 0x00B800, length = 0x000800
RAMGS0 : origin = 0x00D000, length = 0x001000
RAMGS1 : origin = 0x00E000, length = 0x001000
RAMGS2 : origin = 0x00F000, length = 0x001000
RAMGS3 : origin = 0x010000, length = 0x001000
RAMGS4 : origin = 0x011000, length = 0x001000
RAMGS5 : origin = 0x012000, length = 0x001000
RAMGS6 : origin = 0x013000, length = 0x001000
RAMGS7 : origin = 0x014000, length = 0x001000
RAMGS8 : origin = 0x015000, length = 0x001000
RAMGS9 : origin = 0x016000, length = 0x001000
RAMGS101112 : origin = 0x017000, length = 0x003000
RAMGS13 : origin = 0x01A000, length = 0x001000
RAMGS14 : origin = 0x01B000, length = 0x001000
RAMGS15 : origin = 0x01C000, length = 0x000FF8
RAMD0 : origin = 0x00C000, length = 0x000800 // CPU1 IPC SERVER
RAMD1 : origin = 0x00C800, length = 0x000800 // CPU1 IPC SERVER
RAMLS0 : origin = 0x008000, length = 0x000800 // CPU1 IPC SERVER
RAMLS1 : origin = 0x008800, length = 0x000800 // CPU1 IPC SERVER
RAMLS2 : origin = 0x009000, length = 0x000800 // CPU1 IPC SERVER
RAMLS3 : origin = 0x009800, length = 0x000800 // CPU1 IPC SERVER
RAMLS4 : origin = 0x00A000, length = 0x000800 // CPU1 IPC SERVER
RAMLS5 : origin = 0x00A800, length = 0x000800 // CPU1 IPC BOOTLOADER
RAMLS6 : origin = 0x00B000, length = 0x000800 // CPU1 IPC BOOTLOADER
RAMLS7 : origin = 0x00B800, length = 0x000800 // CPU1 IPC BOOTLOADER
RAMGS0 : origin = 0x00D000, length = 0x001000 // CPU1 IPC BOOTLOADER
RAMGS1 : origin = 0x00E000, length = 0x001000 // CPU1 IPC SERVER
RAMGS2 : origin = 0x00F000, length = 0x001000 // CPU2 IPC SERVER
RAMGS3 : origin = 0x010000, length = 0x001000 // CPU2 IPC SERVER
RAMGS4 : origin = 0x011000, length = 0x001000 // CPU1 IPC SERVER
RAMGS5 : origin = 0x012000, length = 0x001000 // CM IPC BOOTLOADER
USB_CM_FIRMWARE : origin = 0x013000, length = 0x00A000 // CM USB SERVER
// RAMGS15_RSVD : origin = 0x01CFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
/* Flash sectors */
FLASH0 : origin = 0x080000, length = 0x002000 /* on-chip Flash */
FLASH1 : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASH2 : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASH3 : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASH4 : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASH5 : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASH6 : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASH7 : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASH8 : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASH9 : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASH10 : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASH11 : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASH12 : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASH13 : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
FLASH0 : origin = 0x080000, length = 0x002000 /* on-chip Flash */
FLASH1 : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASH2 : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASH3 : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASH4 : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASH5 : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASH6 : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASH7 : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASH8 : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASH9 : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASH10 : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASH11 : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASH12 : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASH13 : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800
@ -51,36 +49,32 @@ MEMORY
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
RESET : origin = 0x3FFFC0, length = 0x000002
}
SECTIONS
{
codestart : > BEGIN
.text : >> RAMD01 | RAMLS02 | RAMLS3 | RAMGS101112 //text - Code
.cinit : > RAMM0 //cinit - Init values fos global vars
.switch : > RAMM0 //switch - tables for switch statements
.reset : > RESET, TYPE = DSECT /* not used, */
.text : >> RAMM0 | RAMM1 | RAMD0 | RAMD1 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3
.cinit : > RAMGS4
.switch : > RAMLS3
.reset : > RAMLS3, TYPE = DSECT /* not used, */
.stack : > RAMM1 //stack - Local vars
.stack : > RAMLS4
#if defined(__TI_EABI__)
.bss : >> RAMLS56 | RAMGS101112
.bss:output : > RAMLS3
.init_array : > RAMM0
.const : > RAMLS56
.data : >> RAMLS56 | RAMLS7 | RAMGS101112
.bss : >> RAMLS4 | RAMGS1
.bss:output : > RAMLS4
.init_array : > RAMLS4
.const : > RAMLS4
.data : > RAMLS4
.sysmem : > RAMLS4
#else
.pinit : > RAMM0 //pinit - tables for global constructors (C++)
.ebss : >> RAMLS56 //ebss - Global vars
.econst : > RAMLS56
.esysmem : > RAMLS56
.pinit : > RAMLS4
.ebss : > RAMLS4
.econst : > RAMLS4
.esysmem : > RAMLS4
#endif
ramgs0 : > RAMGS0, type=NOINIT
ramgs1 : > RAMGS1, type=NOINIT
MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT
MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT
MSGRAM_CPU_TO_CM > CPUTOCMRAM, type=NOINIT
@ -89,7 +83,7 @@ SECTIONS
/* The following section definition are for SDFM examples */
.TI.ramfunc : {} > RAMM0
.TI.ramfunc : {} > RAMGS1
}

126
Projects/EFC_IPC_Server_C28/2838x_RAM_combined_lnk_cpu2.cmd
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@ -1,94 +1,90 @@
MEMORY
{
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
BEGIN : origin = 0x000000, length = 0x000002 // CPU1 IPC SERVER
BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x0001B1, length = 0x00024F
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
RAMM0 : origin = 0x0001B1, length = 0x00024F // CPU1 IPC SERVER
RAMM1 : origin = 0x000400, length = 0x0003F8 // CPU1 IPC SERVER
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMD01 : origin = 0x00C000, length = 0x001000
RAMLS02 : origin = 0x008000, length = 0x001800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMLS56 : origin = 0x00A800, length = 0x001000
RAMLS7 : origin = 0x00B800, length = 0x000800
RAMGS0 : origin = 0x00D000, length = 0x001000
RAMGS1 : origin = 0x00E000, length = 0x001000
RAMGS2 : origin = 0x00F000, length = 0x001000
RAMGS3 : origin = 0x010000, length = 0x001000
RAMGS4 : origin = 0x011000, length = 0x001000
RAMGS5 : origin = 0x012000, length = 0x001000
RAMGS6 : origin = 0x013000, length = 0x001000
RAMGS7 : origin = 0x014000, length = 0x001000
RAMGS8 : origin = 0x015000, length = 0x001000
RAMGS9 : origin = 0x016000, length = 0x001000
RAMGS101112 : origin = 0x017000, length = 0x003000
RAMGS13 : origin = 0x01A000, length = 0x001000
RAMGS14 : origin = 0x01B000, length = 0x001000
RAMGS15 : origin = 0x01C000, length = 0x000FF8
RAMD0 : origin = 0x00C000, length = 0x000800 // CPU1 IPC SERVER
RAMD1 : origin = 0x00C800, length = 0x000800 // CPU1 IPC SERVER
RAMLS0 : origin = 0x008000, length = 0x000800 // CPU1 IPC SERVER
RAMLS1 : origin = 0x008800, length = 0x000800 // CPU1 IPC SERVER
RAMLS2 : origin = 0x009000, length = 0x000800 // CPU1 IPC SERVER
RAMLS3 : origin = 0x009800, length = 0x000800 // CPU1 IPC SERVER
RAMLS4 : origin = 0x00A000, length = 0x000800 // CPU1 IPC SERVER
RAMLS5 : origin = 0x00A800, length = 0x000800 // CPU1 IPC BOOTLOADER
RAMLS6 : origin = 0x00B000, length = 0x000800 // CPU1 IPC BOOTLOADER
RAMLS7 : origin = 0x00B800, length = 0x000800 // CPU1 IPC BOOTLOADER
RAMGS0 : origin = 0x00D000, length = 0x001000 // CPU1 IPC BOOTLOADER
RAMGS1 : origin = 0x00E000, length = 0x001000 // CPU1 IPC SERVER
RAMGS2 : origin = 0x00F000, length = 0x001000 // CPU2 IPC SERVER
RAMGS3 : origin = 0x010000, length = 0x001000 // CPU2 IPC SERVER
RAMGS4 : origin = 0x011000, length = 0x001000 // CPU1 IPC SERVER
RAMGS5 : origin = 0x012000, length = 0x001000 // CM IPC BOOTLOADER
USB_CM_FIRMWARE : origin = 0x013000, length = 0x00A000 // CM USB SERVER
// RAMGS15_RSVD : origin = 0x01CFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
/* Flash sectors */
FLASH0 : origin = 0x080000, length = 0x002000 /* on-chip Flash */
FLASH1 : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASH2 : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASH3 : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASH4 : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASH5 : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASH6 : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASH7 : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASH8 : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASH9 : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASH10 : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASH11 : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASH12 : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASH13 : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
FLASH0 : origin = 0x080000, length = 0x002000 /* on-chip Flash */
FLASH1 : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASH2 : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASH3 : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASH4 : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASH5 : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASH6 : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASH7 : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASH8 : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASH9 : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASH10 : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASH11 : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASH12 : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASH13 : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
CPU1TOCPU2RAM0 : origin = 0x03A000, length = 0x000008
CPU1TOCPU2RAM1 : origin = 0x03A400, length = 0x000400 // CPU2 IPC SERVER
CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800
CPUTOCMRAM : origin = 0x039000, length = 0x000800
CPUTOCMRAM0 : origin = 0x039000, length = 0x000400
CPUTOCMRAM1 : origin = 0x039400, length = 0x000400, fill=0x0000
CMTOCPURAM : origin = 0x038000, length = 0x000800
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
RESET : origin = 0x3FFFC0, length = 0x000002
}
SECTIONS
{
codestart : > CPU1TOCPU2RAM
.text : >> RAMGS1 | RAMGS2 //text - Code
.cinit : > RAMGS0 //cinit - Init values fos global vars
.switch : > RAMGS0 //switch - tables for switch statements
.reset : > RESET, TYPE = DSECT /* not used, */
codestart : > CPU1TOCPU2RAM1
.text : >> RAMGS2 | RAMGS3
.cinit : > RAMGS3
.switch : > RAMGS3
.reset : > RAMGS3, TYPE = DSECT
.stack : > RAMGS0 //stack - Local vars
.stack : > RAMD0, TYPE = NOLOAD
#if defined(__TI_EABI__)
.bss : >> RAMGS0 | RAMGS1
.bss:output : > RAMGS0
.init_array : > RAMGS0
.const : > RAMGS0
.data : >> RAMGS0 | RAMGS1
.sysmem : > RAMGS0
.bss : > RAMGS3
.bss:output : > RAMGS3
.init_array : > RAMGS3
.const : > RAMGS3
.data : > RAMGS3
.sysmem : > RAMGS3
#else
.pinit : > RAMGS0 //pinit - tables for global constructors (C++)
.ebss : >> RAMGS0 //ebss - Global vars
.econst : > RAMGS0
.esysmem : > RAMGS0
.pinit : > RAMGS3
.ebss : > RAMGS3
.econst : > RAMGS3
.esysmem : > RAMGS3
#endif
ramgs0 : > RAMGS0, type=NOINIT
ramgs1 : > RAMGS1, type=NOINIT
MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT
MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM0, type=NOINIT
MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT
MSGRAM_CPU_TO_CM > CPUTOCMRAM, type=NOINIT
MSGRAM_CPU_TO_CM > CPUTOCMRAM0, type=NOINIT
MSGRAM_CM_TO_CPU > CMTOCPURAM, type=NOINIT
.TI.ramfunc : {} > RAMGS0
.TI.ramfunc : {} > RAMGS3
}

4
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/Arr.c
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@ -1,7 +1,7 @@
/*
* Arr.c
*
* Created on: 21 нояб. 2023 г.
* Created on: 21 нояб. 2023 г.
* Author: seklyuts
*/
@ -9,7 +9,7 @@
uint16_t quant16bitWords(uint16_t bytes)
{
if((bytes) & 1) return (bytes + 1)/2; //если осталось нечётное число байт, то чтобы рассчитать кол-во 16-битных слов надо +1
if((bytes) & 1) return (bytes + 1)/2; //если осталось нечётное число байт, то чтобы рассчитать кол-во 16-битных слов надо +1
else return (bytes)/2;
}

2
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/Arr.h
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@ -1,7 +1,7 @@
/*
* Arr.h
*
* Created on: 21 íîÿá. 2023 ã.
* Created on: 21 нояб. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/BL25CM1A.h
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@ -1,7 +1,7 @@
/*
* BL25CM1A.h
*
* Created on: 7 ñåíò. 2023 ã.
* Created on: 7 сент. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/GD25Q16ETIGR.h
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@ -1,7 +1,7 @@
/*
* GD25Q16ETIGR.h
*
* Created on: 7 ñåíò. 2023 ã.
* Created on: 7 сент. 2023 г.
* Author: seklyuts
*/

141
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/ZD24C02A.c
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@ -1,141 +0,0 @@
/*
* ZD24C02A.c
*
* Created on: 8 ñåíò. 2023 ã.
* Author: seklyuts
*/
#include "f28x_project.h"
#include "i2c_init.h"
#include "ZD24C02A.h"
#include "Arr.h"
volatile uint16_t SlaveAdr = I2C_SLAVE_ADDRESS;
uint16_t BufferZD24C02A[17];
uint16_t ZD24C02A_write_8(uint16_t Addr, uint16_t * Array, uint16_t quant)// ìîæåò ïèñàòü î÷åðåäÿìè ïî 16 áàéò
{
if(I2CWrite(SlaveAdr, Addr, quant, true, Array)) return 1;
else return 0;
}
uint16_t ZD24C02A_read_8(uint16_t Addr, uint16_t * Array, uint16_t quant)
{
if(I2CWrite(SlaveAdr, Addr, 0, false, Array)) return 1;
if(I2CRead(SlaveAdr, quant, true, Array)) return 1;
else return 0;
}
uint16_t ZD24C02A_verify_8(uint16_t Addr, uint16_t * Array, uint16_t quant)
{
uint16_t VerifyErr = 0;
if(I2CWrite(SlaveAdr, Addr, 0, false, BufferZD24C02A)) return 1;
VerifyErr = I2CVerify(SlaveAdr, quant, true, Array);
return VerifyErr;
}
uint16_t ZD24C02A_write(uint32_t Addr, uint16_t quant8, uint16_t * write_data)
{
uint32_t i=0;
uint16_t addr_write_data[0x100];
uint16_t quant16;
quant16 = quant16bitWords(quant8);
copy16_to_8(write_data, addr_write_data, quant16);
for(i = 0; i < quant8; i += 1)
{
if( ZD24C02A_write_8(Addr+i, addr_write_data+i, 1)) return 1;
}
/* if(quant8 > 8)
{
for(i = 0; i < (quant8-8); i += 8)
{//â ýòîì öèêëå òîëüêî ïîëíûå ïîñûëêè ïî 8 áàéò
copy16_to_8(write_data, addr_write_data, 4);
if( ZD24C02A_write_8(Addr+i, addr_write_data, 8)) return 1;
write_data += 4;
}
}
if(i < quant8)
{//òóò ì.á. îò 1 äî 8 áàéò
quant16 = quant16bitWords(quant8-i);
copy16_to_8(write_data, addr_write_data, quant16);
if( ZD24C02A_write_8(Addr+i, addr_write_data, (quant8 - i))) return 1;
}
*/
return 0;
}
uint16_t ZD24C02A_read(uint32_t Addr, uint16_t quant8, uint16_t * read_data)
{
uint32_t i=0;
uint16_t addr_read_data[8];
if(quant8 > 8)
{
for(i = 0; i < (quant8-8); i += 8)
{//â ýòîì öèêëå òîëüêî ïîëíûå ïîñûëêè ïî 8 áàéò
if( ZD24C02A_read_8(Addr+i, addr_read_data, 8)) return 1;
copy8_to_16(addr_read_data, read_data, 4);
read_data+=4;
}
}
if(i < quant8)
{//òóò ì.á. îò 1 äî 8 áàéò
if( ZD24C02A_read_8(Addr+i, addr_read_data, (quant8 - i))) return 1;
if((quant8 - i) & 1) {addr_read_data[quant8] = 0; quant8++; }//åñëè áàéò íå÷¸òíîå ÷èñëî, òî äîïîëíÿåì äî ÷¸òíîãî íóë¸ì
copy8_to_16(addr_read_data, read_data, (quant8 - i)/2);
}
return 0;
}
uint16_t ZD24C02A_verify(uint32_t Addr, uint16_t quant8, uint16_t * verify_data)
{
uint32_t i=0;
uint16_t addr_vfy_data[8];
uint16_t Err_read = 0;
uint16_t quant16;
if(quant8 > 8)
{
for(i = 0; i < (quant8-8); i += 8)
{//â ýòîì öèêëå òîëüêî ïîëíûå ïîñûëêè ïî 8 áàéò
copy16_to_8(verify_data, addr_vfy_data, 4);
Err_read = ZD24C02A_verify_8(Addr+i, addr_vfy_data, 8);
if(Err_read) return Err_read;
verify_data+=4;
}
}
if(i < quant8)
{//òóò ì.á. îò 1 äî 8 áàéò
quant16 = quant16bitWords(quant8-i);
copy16_to_8(verify_data, addr_vfy_data, quant16);
Err_read = ZD24C02A_verify_8(Addr+i, addr_vfy_data, (quant8 - i));
if(Err_read) return Err_read;
}
return 0;// 0 - DONE_SUCCESS ; 1 - FLASH_ERR; 2 - ERROR_VERIFY
}
void ZD24C02A_read_all(uint16_t byteCount, uint16_t * Array)
{
I2CRead(SlaveAdr, byteCount, true, Array);
// I2CWriteRead(I2C_SLAVE_ADDRESS, byteCount, true, Array);
// I2CWriteReadOnes(I2C_SLAVE_ADDRESS);
}
void ZD24C02A_test(uint16_t * Array)
{
uint16_t i=0;
for(i=0;i<=255;i+=15)
{
// I2CWrite(SlaveAdr, 1, true, Array);
}
}

23
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/ZD24C02A.h
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@ -1,23 +0,0 @@
/*
* ZD24C02A.h
*
* Created on: 8 ñåíò. 2023 ã.
* Author: seklyuts
*/
#ifndef SRC_ZD24C02A_H_
#define SRC_ZD24C02A_H_
#define I2C_SLAVE_ADDRESS 0x51U
#define I2C_OWN_ADDRESS 0x30U
#define ZD24C02A_SIZE 0x80
uint16_t ZD24C02A_write(uint32_t Addr, uint16_t quant, uint16_t * write_data);
uint16_t ZD24C02A_read(uint32_t Addr, uint16_t quant, uint16_t * read_data);
void ZD24C02A_test(uint16_t * Array);
void ZD24C02A_read_all(uint16_t byteCount, uint16_t * Array);
uint16_t ZD24C02A_verify(uint32_t Addr, uint16_t quant, uint16_t * verify_data);
#endif /* SRC_ZD24C02A_H_ */

125
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/ZD24C02A_Control_Module.c Normal file
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@ -0,0 +1,125 @@
/*
* ZD24C02A.c
*
* Created on: 8 сент. 2023 г.
* Author: seklyuts
*/
#include <ZD24C02A_Control_Module.h>
#include "f28x_project.h"
#include "i2c_init.h"
#include "Arr.h"
//Нуждается в проверке и отладке, так как с этой микросхемой не удалось добиться стабильной работы, она то работает, то нет
volatile uint16_t ControlModuleSlaveAdr = I2C_CONTROL_MODULE_SLAVE_ADDRESS;
uint16_t BufferZD24C02A_ControlModule[17];
uint16_t ZD24C02A_ControlModule_write_8(uint16_t Addr, uint16_t * Array, uint16_t quant)// может писать очередями по 16 байт
{
if(I2CWrite(ControlModuleSlaveAdr, Addr, quant, true, Array)) return 1;
else return 0;
}
uint16_t ZD24C02A_ControlModule_read_8(uint16_t Addr, uint16_t * Array, uint16_t quant)
{
if(I2CWrite(ControlModuleSlaveAdr, Addr, 0, false, Array)) return 1;
if(I2CRead(ControlModuleSlaveAdr, quant, true, Array)) return 1;
else return 0;
}
uint16_t ZD24C02A_ControlModule_verify_16(uint16_t Addr, uint16_t * Array, uint16_t quant)
{
uint16_t VerifyErr = 0;
if(I2CWrite(ControlModuleSlaveAdr, Addr, 0, false, BufferZD24C02A_ControlModule)) return 1;
VerifyErr = I2CVerify(ControlModuleSlaveAdr, quant, true, Array);
return VerifyErr;
}
uint16_t ZD24C02A_ControlModule_write(uint32_t Addr, uint16_t quant8, uint16_t * write_data)
{
uint32_t i=0;
uint16_t addr_write_data[0x100];
uint16_t quant16;
quant16 = quant16bitWords(quant8);
copy16_to_8(write_data, addr_write_data, quant16);
for(i = 0; i < quant8; i += 1)
{
if( ZD24C02A_ControlModule_write_8(Addr+i, addr_write_data+i, 1)) return 1;
}
return 0;
}
uint16_t ZD24C02A_ControlModule_read(uint32_t Addr, uint16_t quant8, uint16_t * read_data)
{
uint32_t i=0;
uint16_t addr_read_data[8];
if(quant8 > 8)
{
for(i = 0; i < (quant8-8); i += 8)
{//в этом цикле только полные посылки по 8 байт
if( ZD24C02A_ControlModule_read_8(Addr+i, addr_read_data, 8)) return 1;
copy8_to_16(addr_read_data, read_data, 4);
read_data+=4;
}
}
if(i < quant8)
{//тут м.б. от 1 до 8 байт
if( ZD24C02A_ControlModule_read_8(Addr+i, addr_read_data, (quant8 - i))) return 1;
if((quant8 - i) & 1) {addr_read_data[quant8] = 0; quant8++; }//если байт нечётное число, то дополняем до чётного нулём
copy8_to_16(addr_read_data, read_data, (quant8 - i)/2);
}
return 0;
}
uint16_t ZD24C02A_ControlModule_verify(uint32_t Addr, uint16_t quant8, uint16_t * verify_data)
{
uint32_t i=0;
uint16_t addr_vfy_data[8];
uint16_t Err_read = 0;
uint16_t quant16;
if(quant8 > 8)
{
for(i = 0; i < (quant8-8); i += 8)
{//в этом цикле только полные посылки по 8 байт
copy16_to_8(verify_data, addr_vfy_data, 4);
Err_read = ZD24C02A_ControlModule_verify_16(Addr+i, addr_vfy_data, 8);
if(Err_read) return Err_read;
verify_data+=4;
}
}
if(i < quant8)
{//тут м.б. от 1 до 8 байт
quant16 = quant16bitWords(quant8-i);
copy16_to_8(verify_data, addr_vfy_data, quant16);
Err_read = ZD24C02A_ControlModule_verify_16(Addr+i, addr_vfy_data, (quant8 - i));
if(Err_read) return Err_read;
}
return 0;
}
void ZD24C02A_ControlModule_read_all(uint16_t byteCount, uint16_t * Array)
{
I2CRead(ControlModuleSlaveAdr, byteCount, true, Array);
// I2CWriteRead(I2C_SLAVE_ADDRESS, byteCount, true, Array);
// I2CWriteReadOnes(I2C_SLAVE_ADDRESS);
}
void ZD24C02A_ControlModule_test(uint16_t * Array)
{
uint16_t i=0;
for(i=0;i<=255;i+=15)
{
// I2CWrite(SlaveAdr, 1, true, Array);
}
}

24
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/ZD24C02A_Control_Module.h Normal file
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/*
* ZD24C02A.h
*
* Created on: 8 сент. 2023 г.
* Author: seklyuts
*/
#ifndef SRC_ZD24C02A_CONTROL_MODULE_H_
#define SRC_ZD24C02A_CONTROL_MODULE_H_
#define I2C_CONTROL_MODULE_SLAVE_ADDRESS 0x51U
#define ZD24C02A_CONTROL_MODULE_SIZE 0x80
#include "stdint.h"
uint16_t ZD24C02A_ControlModule_write(uint32_t Addr, uint16_t quant, uint16_t * write_data);
uint16_t ZD24C02A_ControlModule_read(uint32_t Addr, uint16_t quant, uint16_t * read_data);
void ZD24C02A_ControlModule_test(uint16_t * Array);
void ZD24C02A_ControlModule_read_all(uint16_t byteCount, uint16_t * Array);
uint16_t ZD24C02A_ControlModule_verify(uint32_t Addr, uint16_t quant, uint16_t * verify_data);
#endif /* SRC_ZD24C02A_CONTROL_MODULE_H_ */

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Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/ZD24C02A_Power_Module.c Normal file
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/*
* ZD24C02A.c
*
* Created on: 8 сент. 2023 г.
* Author: seklyuts
*/
#include <ZD24C02A_Power_Module.h>
#include "f28x_project.h"
#include "i2c_init.h"
#include "Arr.h"
//Нуждается в проверке и отладке, так как с этой микросхемой не удалось добиться стабильной работы, она то работает, то нет
volatile uint16_t PowerModuleSlaveAdr = I2C_POWER_MODULE_SLAVE_ADDRESS;
uint16_t BufferZD24C02A_PowerModule[17];
uint16_t ZD24C02A_Power_Module_write_8(uint16_t Addr, uint16_t * Array, uint16_t quant)// может писать очередями по 16 байт
{
if(I2CWrite(PowerModuleSlaveAdr, Addr, quant, true, Array)) return 1;
else return 0;
}
uint16_t ZD24C02A_PowerModule_read_8(uint16_t Addr, uint16_t * Array, uint16_t quant)
{
if(I2CWrite(PowerModuleSlaveAdr, Addr, 0, false, Array)) return 1;
if(I2CRead(PowerModuleSlaveAdr, quant, true, Array)) return 1;
else return 0;
}
uint16_t ZD24C02A_PowerModule_verify_16(uint16_t Addr, uint16_t * Array, uint16_t quant)
{
uint16_t VerifyErr = 0;
if(I2CWrite(PowerModuleSlaveAdr, Addr, 0, false, BufferZD24C02A_PowerModule)) return 1;
VerifyErr = I2CVerify(PowerModuleSlaveAdr, quant, true, Array);
return VerifyErr;
}
uint16_t ZD24C02A_PowerModule_write(uint32_t Addr, uint16_t quant8, uint16_t * write_data)
{
uint32_t i=0;
uint16_t addr_write_data[0x100];
uint16_t quant16;
quant16 = quant16bitWords(quant8);
copy16_to_8(write_data, addr_write_data, quant16);
for(i = 0; i < quant8; i += 1)
{
if( ZD24C02A_Power_Module_write_8(Addr+i, addr_write_data+i, 1)) return 1;
}
return 0;
}
uint16_t ZD24C02A_PowerModule_read(uint32_t Addr, uint16_t quant8, uint16_t * read_data)
{
uint32_t i=0;
uint16_t addr_read_data[8];
if(quant8 > 8)
{
for(i = 0; i < (quant8-8); i += 8)
{//в этом цикле только полные посылки по 8 байт
if( ZD24C02A_PowerModule_read_8(Addr+i, addr_read_data, 8)) return 1;
copy8_to_16(addr_read_data, read_data, 4);
read_data+=4;
}
}
if(i < quant8)
{//тут м.б. от 1 до 8 байт
if( ZD24C02A_PowerModule_read_8(Addr+i, addr_read_data, (quant8 - i))) return 1;
if((quant8 - i) & 1) {addr_read_data[quant8] = 0; quant8++; }//если байт нечётное число, то дополняем до чётного нулём
copy8_to_16(addr_read_data, read_data, (quant8 - i)/2);
}
return 0;
}
uint16_t ZD24C02A_PowerModule_verify(uint32_t Addr, uint16_t quant8, uint16_t * verify_data)
{
uint32_t i=0;
uint16_t addr_vfy_data[8];
uint16_t Err_read = 0;
uint16_t quant16;
if(quant8 > 8)
{
for(i = 0; i < (quant8-8); i += 8)
{//в этом цикле только полные посылки по 8 байт
copy16_to_8(verify_data, addr_vfy_data, 4);
Err_read = ZD24C02A_PowerModule_verify_16(Addr+i, addr_vfy_data, 8);
if(Err_read) return Err_read;
verify_data+=4;
}
}
if(i < quant8)
{//тут м.б. от 1 до 8 байт
quant16 = quant16bitWords(quant8-i);
copy16_to_8(verify_data, addr_vfy_data, quant16);
Err_read = ZD24C02A_PowerModule_verify_16(Addr+i, addr_vfy_data, (quant8 - i));
if(Err_read) return Err_read;
}
return 0;
}
void ZD24C02A_PowerModule_read_all(uint16_t byteCount, uint16_t * Array)
{
I2CRead(PowerModuleSlaveAdr, byteCount, true, Array);
// I2CWriteRead(I2C_SLAVE_ADDRESS, byteCount, true, Array);
// I2CWriteReadOnes(I2C_SLAVE_ADDRESS);
}
void ZD24C02A_PowerModule_test(uint16_t * Array)
{
uint16_t i=0;
for(i=0;i<=255;i+=15)
{
// I2CWrite(SlaveAdr, 1, true, Array);
}
}

23
Projects/EFC_IPC_Server_C28/src/ExternalEEPROM/ZD24C02A_Power_Module.h Normal file
View File

@ -0,0 +1,23 @@
/*
* ZD24C02A.h
*
* Created on: 8 сент. 2023 г.
* Author: seklyuts
*/
#ifndef SRC_ZD24C02A_POWER_MODULE_H_
#define SRC_ZD24C02A_POWER_MODULE_H_
#define I2C_POWER_MODULE_SLAVE_ADDRESS 0x50U
#define ZD24C02A_POWER_MODULE_SIZE 0x80
#include "stdint.h"
uint16_t ZD24C02A_PowerModule_write(uint32_t Addr, uint16_t quant, uint16_t * write_data);
uint16_t ZD24C02A_PowerModule_read(uint32_t Addr, uint16_t quant, uint16_t * read_data);
void ZD24C02A_PowerModule_test(uint16_t * Array);
void ZD24C02A_PowerModule_read_all(uint16_t byteCount, uint16_t * Array);
uint16_t ZD24C02A_PowerModule_verify(uint32_t Addr, uint16_t quant, uint16_t * verify_data);
#endif /* SRC_ZD24C02A_POWER_MODULE_H_ */

2
Projects/EFC_IPC_Server_C28/src/Peripherals/emif_init.c
View File

@ -1,7 +1,7 @@
/*
* emif_init.c
*
* Created on: 20 íîÿá. 2023 ã.
* Created on: 20 нояб. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/Peripherals/emif_init.h
View File

@ -1,7 +1,7 @@
/*
* emif_init.h
*
* Created on: 20 íîÿá. 2023 ã.
* Created on: 20 нояб. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/Peripherals/gpio_init.h
View File

@ -1,7 +1,7 @@
/*
* gpio_init.h
*
* Created on: 4 ñåíò. 2023 ã.
* Created on: 4 сент. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/Peripherals/i2c_init.c
View File

@ -1,7 +1,7 @@
/*
* i2c_init.c
*
* Created on: 5 ñåíò. 2023 ã.
* Created on: 5 сент. 2023 г.
* Author: seklyuts
*/
#include "f28x_project.h"

2
Projects/EFC_IPC_Server_C28/src/Peripherals/i2c_init.h
View File

@ -1,7 +1,7 @@
/*
* i2c_init.h
*
* Created on: 5 ñåíò. 2023 ã.
* Created on: 5 сент. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/Peripherals/internal_flash.c
View File

@ -1,7 +1,7 @@
/*
* internal_flash.c
*
* Created on: 9 íîÿá. 2023 ã.
* Created on: 9 нояб. 2023 г.
* Author: seklyuts
*/
#include "f28x_project.h"

2
Projects/EFC_IPC_Server_C28/src/Peripherals/internal_flash.h
View File

@ -1,7 +1,7 @@
/*
* internal_flash.h
*
* Created on: 9 íîÿá. 2023 ã.
* Created on: 9 нояб. 2023 г.
* Author: seklyuts
*/

4
Projects/EFC_IPC_Server_C28/src/Peripherals/ipc.h
View File

@ -265,10 +265,10 @@ typedef struct
typedef struct
{
IPC_Message_t Buffer[IPC_NUM_OF_INTERRUPTS][IPC_BUFFER_SIZE];//IPC_Message_t = 32*4=128 (8*16) 8 ñëîâ * 16 = 128 ñëîâ 0x80
IPC_Message_t Buffer[IPC_NUM_OF_INTERRUPTS][IPC_BUFFER_SIZE];//IPC_Message_t = 32*4=128 (8*16) 8 слов * 16 = 128 слов 0x80
uint16_t PutWriteIndex[IPC_NUM_OF_INTERRUPTS];
uint16_t GetReadIndex[IPC_NUM_OF_INTERRUPTS];
}IPC_PutBuffer_t; //128 + 4 + 4 = 136 = 0x88 ñëîâ
}IPC_PutBuffer_t; //128 + 4 + 4 = 136 = 0x88 слов
typedef struct
{

150
Projects/EFC_IPC_Server_C28/src/Peripherals/ipc_init.c
View File

@ -15,7 +15,8 @@
#include "flash_programming_f2838x_c28x.h"
#include "internal_flash.h"
#ifdef CPU1
#include "ZD24C02A.h"
#include <ZD24C02A_Control_Module.h>
#include <ZD24C02A_Power_Module.h>
#include "BL25CM1A.h"
#include "GD25Q16ETIGR.h"
#include "emif_init.h"
@ -39,11 +40,13 @@
#define COMMAND_ACCEPTED 0x20
#define DONE_SUCCESS 0x21
#define INT_FLASH 0xA0
#define EMIF 0xA1
#define BL25CM1A_1M_bit_SPI 0xA2
#define GD25Q16E_16M_bit_SPI 0xA3
#define ZD24C02A_2K_I2C 0xA4
#define INT_FLASH 0xA0
#define EMIF 0xA1
#define BL25CM1A_1M_bit_SPI 0xA2
#define GD25Q16E_16M_bit_SPI 0xA3
#define ZD24C02A_2K_I2C__CONTROL_MODULE 0xA4
#define ZD24C02A_2K_I2C__POWER_MODULE 0xA5
#define FLASH_OTP 0xA6
typedef enum
{
@ -115,6 +118,47 @@ void clear_BlockWasErased(void)
//#define Internal_flash_Program Internal_flash_Program_DataOnlyECCOnly
#define Internal_flash_Program Internal_flash_Program_AutoECC
static const uint32_t FLASH_OTP_START_ADDRESS = 0x00078008;
static const uint32_t FLASH_OTP_MAX_SIZE_IN_BYTES = 0x10;
static const uint32_t IPC_MESSAGE_MEMORY_SIZE_IN_BYTES = 2048;
void getMessage_from_Cm_Flash_OTP(void){
if((InData & 1)||(InAddr & 1)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, FLASH_OTP, 0, 0); return;}
InData /= 2;
InAddr /= 2;
if((InData > IPC_MESSAGE_MEMORY_SIZE_IN_BYTES)||(InData > FLASH_OTP_MAX_SIZE_IN_BYTES)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, FLASH_OTP, 0, 0); return;}
if((InAddr+InData) > FLASH_OTP_START_ADDRESS) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, FLASH_OTP, 0, 0); return;}
uint32_t FactAddressFlash = InAddr + FLASH_OTP_START_ADDRESS;
uint16_t MemOperationError = 0;
switch(InCommand >> 16)
{
case READ:
putFlashMessage_to_Cm(FactAddressFlash, InData);
IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, FLASH_OTP, 0, 0);
break;
case WRITE:
MemOperationError = Internal_flash_Program(FactAddressFlash, InData);
if(MemOperationError) {IPC_sendCommand(IPC_CPU1_L_CM_R, MemOperationError, FLASH_OTP, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, FLASH_OTP, 0, 0);
break;
case VERIFY:
MemOperationError = verifyFlashMessage_to_Cm(FactAddressFlash, InData);
if(MemOperationError) IPC_sendCommand(IPC_CPU1_L_CM_R, ERROR_VERIFY, INT_FLASH, MemOperationError, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, FLASH_OTP, 0, 0);
break;
case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, FLASH_OTP, 0, 0);
break;
default:
IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, FLASH_OTP, 0, 0);
break;
}
}
void getMessage_from_Cm_Flash(void)
{
@ -188,7 +232,7 @@ void getMessage_from_Cm_Flash(void)
#ifdef CPU1
void getMessage_from_Cm_EMIF(void)
{
// uint16_t MemOperationError = 0;
uint16_t MemOperationError = 0;
if((InData > 2048)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, EMIF, 0, 0); return;}
if((InAddr+InData) > 0x100000*2) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, EMIF, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, EMIF, 0, 0);
@ -217,7 +261,7 @@ void getMessage_from_Cm_BL25CM1A(void)
{
uint16_t MemOperationError = 0;
if((InData > 2048*2)||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, BL25CM1A_1M_bit_SPI, 0, 0); return;}
if( ((InAddr+InData) > (BL25CM1A0_SIZE*2))||((InAddr) > (BL25CM1A0_SIZE*2)) ){IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, BL25CM1A_1M_bit_SPI, 0, 0); return;}
if( ((InAddr+InData) > (BL25CM1A0_SIZE*2))||((InAddr) > (BL25CM1A0_SIZE*2)) ) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, BL25CM1A_1M_bit_SPI, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, BL25CM1A_1M_bit_SPI, 0, 0);
spi_TurnOffCS1_GD25Q16E();
@ -248,10 +292,9 @@ void getMessage_from_Cm_BL25CM1A(void)
void getMessage_from_Cm_GD25Q16E(void)
{
uint16_t MemOperationError = 0;
uint32_t EndOfAdr = (InAddr+InData);
if((InData > (2048*2))||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, GD25Q16E_16M_bit_SPI, 0, 0); return;}
if( (EndOfAdr > (GD25Q16E_SIZE*2)) || (InAddr > (GD25Q16E_SIZE*2)) ) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, GD25Q16E_16M_bit_SPI, 0, 0); return;}
if( (EndOfAdr > (GD25Q16E_SIZE*2)) || (InAddr > (GD25Q16E_SIZE*2)) ) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, GD25Q16E_16M_bit_SPI, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, GD25Q16E_16M_bit_SPI, 0, 0);
Gpio_SPI_CS_BL25CM1A(1);
@ -285,37 +328,72 @@ void getMessage_from_Cm_GD25Q16E(void)
spi_TurnOffCS1_GD25Q16E();
}
void getMessage_from_Cm_ZD24C02A(void)
void getMessage_from_Cm_ZD24C02A_CONTROL_MODULE(void)
{
uint16_t MemOperationError = 0;
uint16_t I2CErr = 0;
if((InData > (2048*2))||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, ZD24C02A_2K_I2C, 0, 0); return;}
if((InAddr+InData) > (ZD24C02A_SIZE*2)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, ZD24C02A_2K_I2C, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C, 0, 0);
if((InData > (2048*2))||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0); return;}
if((InAddr+InData) > (ZD24C02A_CONTROL_MODULE_SIZE*2)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
switch(InCommand >> 16)
{
case READ:
I2CErr = ZD24C02A_read(InAddr, InData, (uint16_t *)CPUXTOCMMSGRAM0_BASE);
if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C, 0, 0);
I2CErr = ZD24C02A_ControlModule_read(InAddr, InData, (uint16_t *)CPUXTOCMMSGRAM0_BASE);
if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
break;
case WRITE:
I2CErr = ZD24C02A_write(InAddr, InData, (uint16_t *)CMTOCPUXMSGRAM0_BASE);
if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C, 0, 0);
I2CErr = ZD24C02A_ControlModule_write(InAddr, InData, (uint16_t *)CMTOCPUXMSGRAM0_BASE);
if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
break;
case VERIFY:
MemOperationError = ZD24C02A_verify(InAddr, InData, (uint16_t *)CMTOCPUXMSGRAM0_BASE);
if(MemOperationError == 2) IPC_sendCommand(IPC_CPU1_L_CM_R, ERROR_VERIFY, ZD24C02A_2K_I2C, 0, 0);
else if(MemOperationError == 1) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C, 0, 0);
MemOperationError = ZD24C02A_ControlModule_verify(InAddr, InData, (uint16_t *)CMTOCPUXMSGRAM0_BASE);
if(MemOperationError == 2) IPC_sendCommand(IPC_CPU1_L_CM_R, ERROR_VERIFY, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
else if(MemOperationError == 1) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
break;
case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C, 0, 0);
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
break;
default:
IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, ZD24C02A_2K_I2C, 0, 0);
IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
break;
}
}
void getMessage_from_Cm_ZD24C02A_POWER_MODULE(void)
{
uint16_t MemOperationError = 0;
uint16_t I2CErr = 0;
if((InData > (2048*2))||(InData == 0)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_LENGHT, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0); return;}
if((InAddr+InData) > (ZD24C02A_POWER_MODULE_SIZE*2)) {IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_ADDR, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0); return;}
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
switch(InCommand >> 16)
{
case READ:
I2CErr = ZD24C02A_PowerModule_read(InAddr, InData, (uint16_t *)CPUXTOCMMSGRAM0_BASE);
if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
break;
case WRITE:
I2CErr = ZD24C02A_PowerModule_write(InAddr, InData, (uint16_t *)CMTOCPUXMSGRAM0_BASE);
if(I2CErr) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
break;
case VERIFY:
MemOperationError = ZD24C02A_PowerModule_verify(InAddr, InData, (uint16_t *)CMTOCPUXMSGRAM0_BASE);
if(MemOperationError == 2) IPC_sendCommand(IPC_CPU1_L_CM_R, ERROR_VERIFY, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
else if(MemOperationError == 1) IPC_sendCommand(IPC_CPU1_L_CM_R, FLASH_ERR, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, DONE_SUCCESS, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
break;
case END:
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
break;
default:
IPC_sendCommand(IPC_CPU1_L_CM_R, WRONG_COMMAND, ZD24C02A_2K_I2C__POWER_MODULE, 0, 0);
break;
}
}
@ -326,7 +404,7 @@ __interrupt void IPC_ISR0()
IPC_ackFlagRtoL(IPC_CPU1_L_CM_R, (1<<0));
PieCtrlRegs.PIEACK.all = PIEACK_GROUP11;
if(ReadFromCm == 0) ReadFromCm = 1;
else IPC_sendCommand(IPC_CPU1_L_CM_R, BUSY, ZD24C02A_2K_I2C, 0, 0);
else IPC_sendCommand(IPC_CPU1_L_CM_R, BUSY, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
}
@ -387,8 +465,13 @@ void ipc_run(void)
#ifdef CPU1
if((InCommand >> 16) == RESET_NOW)
{
// CpuSysRegs.SIMRESET.all = 0xA5A50002;//bit.XRSn
// EALLOW;
// CmConfRegs.CMRESCTL.all = SYSCTL_CMRESCTL_RESET | SYSCTL_REG_KEY;//.bit.RESETSTS = 1;
// DevCfgRegs.CPU2RESCTL.all = ((uint32_t)SYSCTL_CPU2RESCTL_RESET |(SYSCTL_REG_KEY & SYSCTL_CPU2RESCTL_KEY_M)); //.bit.RESET = 1;
// EDIS;
CpuSysRegs.SIMRESET.all = ((uint32_t)SYSCTL_REG_KEY | (uint32_t)1);//программный сброс всех контроллеров
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C, 0, 0);
IPC_sendCommand(IPC_CPU1_L_CM_R, COMMAND_ACCEPTED, ZD24C02A_2K_I2C__CONTROL_MODULE, 0, 0);
IPC_setFlagLtoR(IPC_CPU1_L_CM_R,(1<<0));
ReadFromCm = 0;
return;
@ -400,6 +483,9 @@ void ipc_run(void)
getMessage_from_Cm_Flash();
break;
#ifdef CPU1
case FLASH_OTP:
getMessage_from_Cm_Flash_OTP();
break;
case EMIF:
getMessage_from_Cm_EMIF();
break;
@ -409,8 +495,11 @@ void ipc_run(void)
case GD25Q16E_16M_bit_SPI:
getMessage_from_Cm_GD25Q16E();
break;
case ZD24C02A_2K_I2C:
getMessage_from_Cm_ZD24C02A();
case ZD24C02A_2K_I2C__CONTROL_MODULE:
getMessage_from_Cm_ZD24C02A_CONTROL_MODULE();
break;
case ZD24C02A_2K_I2C__POWER_MODULE:
getMessage_from_Cm_ZD24C02A_POWER_MODULE();
break;
#endif
default:
@ -422,3 +511,4 @@ void ipc_run(void)
ReadFromCm = 0;
}
}

2
Projects/EFC_IPC_Server_C28/src/Peripherals/ipc_init.h
View File

@ -1,7 +1,7 @@
/*
* ipc_init.h
*
* Created on: 7 íîÿá. 2023 ã.
* Created on: 7 нояб. 2023 г.
* Author: seklyuts
*/

4
Projects/EFC_IPC_Server_C28/src/Peripherals/pwm_init.c
View File

@ -1,7 +1,7 @@
/*
* init.c
*
* Created on: 21 авг. 2023 г.
* Created on: 21 авг. 2023 г.
* Author: seklyuts
*/
@ -175,7 +175,7 @@ void PWMInit(uint16_t Num, uint16_t Period, uint16_t Independed)
EPwmRegs[Num]->TZFRC.all = 4;
EDIS; //Программно выставляем TZ-событие
EDIS; //Программно выставляем TZ-событие
//
// Set actions
//

2
Projects/EFC_IPC_Server_C28/src/Peripherals/pwm_init.h
View File

@ -1,7 +1,7 @@
/*
* pwm_init.h
*
* Created on: 21 àâã. 2023 ã.
* Created on: 21 авг. 2023 г.
* Author: seklyuts
*/
#include "f28x_project.h"

4
Projects/EFC_IPC_Server_C28/src/Peripherals/pwm_interrupts.c
View File

@ -1,7 +1,7 @@
/*
* interrupts.c
*
* Created on: 21 <EFBFBD><EFBFBD><EFBFBD>. 2023 <EFBFBD>.
* Created on: 21 авг. 2023 г.
* Author: seklyuts
*/
@ -21,7 +21,7 @@ volatile uint16_t PWM_out = 2500;
uint16_t Fault = 0, Fault_fix = 0, Ready = 0, Ready_Fix = 0;
uint16_t counter1s=0;
uint16_t FaultABC = 0, FaultABCFix = 0;
uint16_t PwmFlagStartCurrentMeashure = 0;
uint16_t PwmFlagStartADC = 0;
typedef struct
{

2
Projects/EFC_IPC_Server_C28/src/Peripherals/pwm_interrupts.h
View File

@ -1,7 +1,7 @@
/*
* pwm_interrupts.h
*
* Created on: 21 àâã. 2023 ã.
* Created on: 21 авг. 2023 г.
* Author: seklyuts
*/

8
Projects/EFC_IPC_Server_C28/src/Peripherals/spi_init.c
View File

@ -9,8 +9,8 @@
//в новой версии платы CS для BL25CM1A переехал на GPIO127 (в старой версии был на GPIO98)
#define SPI_PROGRAM_CS_GPAMUX GpioCtrlRegs.GPDMUX2.bit.GPIO127
#define SPI_PROGRAM_CS_GPAGMUX GpioCtrlRegs.GPDGMUX2.bit.GPIO127
#define SPI_PROGRAM_CS_GPAMUX1 GpioCtrlRegs.GPDMUX2.bit.GPIO127
#define SPI_PROGRAM_CS_GPAGMUX1 GpioCtrlRegs.GPDGMUX2.bit.GPIO127
#define SPI_PROGRAM_CS_GPADIR GpioCtrlRegs.GPDDIR.bit.GPIO127
#define SPI_PROGRAM_CS_GPADAT GpioDataRegs.GPDDAT.bit.GPIO127
@ -121,8 +121,8 @@ void SpiAGpioInit(void)
GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 3; // Configure GPIO35 as SPISTEA
SPI_PROGRAM_CS_GPAMUX = 0;//program CS for BL25CM1A
SPI_PROGRAM_CS_GPAGMUX = 0;
SPI_PROGRAM_CS_GPAMUX1 = 0;//program CS for BL25CM1A
SPI_PROGRAM_CS_GPAGMUX1 = 0;
SPI_PROGRAM_CS_GPADIR = 1;
SPI_PROGRAM_CS_GPADAT = 0;

2
Projects/EFC_IPC_Server_C28/src/Peripherals/spi_init.h
View File

@ -1,7 +1,7 @@
/*
* spi_init.h
*
* Created on: 5 ñåíò. 2023 ã.
* Created on: 5 сент. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/frm_uart.c
View File

@ -1,7 +1,7 @@
/*
* frm_uart.c
*
* Created on: 21 àâã. 2023 ã.
* Created on: 21 авг. 2023 г.
* Author: seklyuts
*/
#include "f28x_project.h"

2
Projects/EFC_IPC_Server_C28/src/frm_uart.h
View File

@ -1,7 +1,7 @@
/*
* frm_uart.h
*
* Created on: 21 àâã. 2023 ã.
* Created on: 21 авг. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/frmmstr_run.c
View File

@ -1,7 +1,7 @@
/*
* frmmstr_run.c
*
* Created on: 14 ñåíò. 2023 ã.
* Created on: 14 сент. 2023 г.
* Author: seklyuts
*/
#include "f28x_project.h"

2
Projects/EFC_IPC_Server_C28/src/frmmstr_run.h
View File

@ -1,7 +1,7 @@
/*
* frmmstr_run.h
*
* Created on: 14 ñåíò. 2023 ã.
* Created on: 14 сент. 2023 г.
* Author: seklyuts
*/

9
Projects/EFC_IPC_Server_C28/src/init_perif.c
View File

@ -1,7 +1,7 @@
/*
* init_perif.c
*
* Created on: 21 àâã. 2023 ã.
* Created on: 21 авг. 2023 г.
* Author: seklyuts
*/
#include "f28x_project.h"
@ -14,14 +14,13 @@
#include "i2c_init.h"
#include "frm_uart.h"
#include "GD25Q16ETIGR.h"
#include "ZD24C02A.h"
#include <ZD24C02A_Control_Module.h>
#include "BL25CM1A.h"
#include "pwm_init.h"
#include "emif_init.h"
#endif
#define I2C_OWN_ADDRESS 0x30U
void InitPerif(void)
{
@ -65,7 +64,7 @@ void InitPerif(void)
GpioInit();
Gpio_SPI_CS_BL25CM1A(1);
SpiInit();
I2CMasterInit(I2C_OWN_ADDRESS,I2C_SLAVE_ADDRESS);
I2CMasterInit(I2C_OWN_ADDRESS,I2C_CONTROL_MODULE_SLAVE_ADDRESS);
#endif
//
// Enable global Interrupts and higher priority real-time debug events:

2
Projects/EFC_IPC_Server_C28/src/init_perif.h
View File

@ -1,7 +1,7 @@
/*
* init_perif.h
*
* Created on: 21 àâã. 2023 ã.
* Created on: 21 авг. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/timer_base.c
View File

@ -1,7 +1,7 @@
/*
* timer_base.c
*
* Created on: 11 ñåíò. 2023 ã.
* Created on: 11 сент. 2023 г.
* Author: seklyuts
*/

2
Projects/EFC_IPC_Server_C28/src/timer_base.h
View File

@ -1,7 +1,7 @@
/*
* timer_base.h
*
* Created on: 11 ñåíò. 2023 ã.
* Created on: 11 сент. 2023 г.
* Author: seklyuts
*/