diff --git a/Projects/epwm_test_biss_c_cpu1/src/Peripherals/sdfm_pwm_xbar.c b/Projects/epwm_test_biss_c_cpu1/src/Peripherals/sdfm_pwm_xbar.c new file mode 100644 index 0000000..2993861 --- /dev/null +++ b/Projects/epwm_test_biss_c_cpu1/src/Peripherals/sdfm_pwm_xbar.c @@ -0,0 +1,33 @@ +/* + * sdfm_pwm_xbar.c + * + * Created on: 29 авг. 2024 г. + * Author: seklyuts + */ +#include "f28x_project.h" +#include "pwm_init.h" + + +void sdfm_pwm_xbarInit(void) +{ + EALLOW; +// EPwmXbarRegs.TRIPLOCK = 0x5A5A0000; +// EPwmXbarRegs.TRIP4MUX0TO15CFG.bit. = ; //str 2145 + EPwmXbarRegs.TRIP4MUX16TO31CFG.bit.MUX16 = 1;//SD1FLT1.CEVT1_OR_CEVT2 + EPwmXbarRegs.TRIP4MUX16TO31CFG.bit.MUX18 = 1;//SD1FLT2.CEVT1_OR_CEVT2 + EPwmXbarRegs.TRIP4MUX16TO31CFG.bit.MUX20 = 1;//SD1FLT3.CEVT1_OR_CEVT2 + EPwmXbarRegs.TRIP4MUX16TO31CFG.bit.MUX22 = 1;//SD1FLT4.CEVT1_OR_CEVT2 + EPwmXbarRegs.TRIP4MUX16TO31CFG.bit.MUX24 = 1;//SD2FLT1.CEVT1_OR_CEVT2 + EPwmXbarRegs.TRIP4MUX16TO31CFG.bit.MUX26 = 1;//SD2FLT2.CEVT1_OR_CEVT2 + EPwmXbarRegs.TRIP4MUX16TO31CFG.bit.MUX28 = 1;//SD2FLT3.CEVT1_OR_CEVT2 + EPwmXbarRegs.TRIP4MUX16TO31CFG.bit.MUX30 = 1;//SD2FLT4.CEVT1_OR_CEVT2 + EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX16 = 1; + EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX18 = 1; + EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX20 = 1; + EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX22 = 1; + EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX24 = 1; + EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX26 = 1; + EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX28 = 1; + EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX30 = 1; + EDIS; +} diff --git a/Projects/epwm_test_biss_c_cpu1/src/Peripherals/sdfm_pwm_xbar.h b/Projects/epwm_test_biss_c_cpu1/src/Peripherals/sdfm_pwm_xbar.h new file mode 100644 index 0000000..9b88f46 --- /dev/null +++ b/Projects/epwm_test_biss_c_cpu1/src/Peripherals/sdfm_pwm_xbar.h @@ -0,0 +1,13 @@ +/* + * sdfm_pwm_xbar.h + * + * Created on: 29 авг. 2024 г. + * Author: seklyuts + */ + +#ifndef SRC_PERIPHERALS_SDFM_PWM_XBAR_H_ +#define SRC_PERIPHERALS_SDFM_PWM_XBAR_H_ + +void sdfm_pwm_xbarInit(void); + +#endif /* SRC_PERIPHERALS_SDFM_PWM_XBAR_H_ */ diff --git a/Projects/epwm_test_biss_c_cpu1/src/init_perif.c b/Projects/epwm_test_biss_c_cpu1/src/init_perif.c index 4baf734..639dcbc 100644 --- a/Projects/epwm_test_biss_c_cpu1/src/init_perif.c +++ b/Projects/epwm_test_biss_c_cpu1/src/init_perif.c @@ -117,6 +117,7 @@ void InitPerif(void) SpiCGpioInit(); BissGpioInit(); BissInit(); + sdfm_pwm_xbarInit(); diff --git a/Projects/epwm_test_biss_c_cpu2/Start_rfm.pmp b/Projects/epwm_test_biss_c_cpu2/Start_rfm.pmp index 060700f..40cd7b8 100644 Binary files a/Projects/epwm_test_biss_c_cpu2/Start_rfm.pmp and b/Projects/epwm_test_biss_c_cpu2/Start_rfm.pmp differ diff --git a/Projects/epwm_test_biss_c_cpu2/src/Peripherals/pwm_init.c b/Projects/epwm_test_biss_c_cpu2/src/Peripherals/pwm_init.c index 9e05cde..150db07 100644 --- a/Projects/epwm_test_biss_c_cpu2/src/Peripherals/pwm_init.c +++ b/Projects/epwm_test_biss_c_cpu2/src/Peripherals/pwm_init.c @@ -35,24 +35,24 @@ volatile uint16_t TimerBase = PERIOD_TIMER_BASE; void PWM_ABC_StopAllClose(void) { EALLOW; - EPwmRegs[PWM_A]->TZCTL.bit.TZA = 2; - EPwmRegs[PWM_A]->TZCTL.bit.TZB = 2; - EPwmRegs[PWM_B]->TZCTL.bit.TZA = 2; - EPwmRegs[PWM_B]->TZCTL.bit.TZB = 2; - EPwmRegs[PWM_C]->TZCTL.bit.TZA = 2; - EPwmRegs[PWM_C]->TZCTL.bit.TZB = 2; + EPwmRegs[PWM_A]->TZFRC.all = 4; + EPwmRegs[PWM_B]->TZFRC.all = 4; + EPwmRegs[PWM_C]->TZFRC.all = 4; +// EPwmRegs[PWM_A]->TZCTL.bit.TZA = 2; +// EPwmRegs[PWM_A]->TZCTL.bit.TZB = 2; +// EPwmRegs[PWM_B]->TZCTL.bit.TZA = 2; +// EPwmRegs[PWM_B]->TZCTL.bit.TZB = 2; +// EPwmRegs[PWM_C]->TZCTL.bit.TZA = 2; +// EPwmRegs[PWM_C]->TZCTL.bit.TZB = 2; EDIS; } void PWM_ABC_StartOut(void) { EALLOW; - EPwmRegs[PWM_A]->TZCTL.bit.TZA = 3; - EPwmRegs[PWM_A]->TZCTL.bit.TZB = 3; - EPwmRegs[PWM_B]->TZCTL.bit.TZA = 3; - EPwmRegs[PWM_B]->TZCTL.bit.TZB = 3; - EPwmRegs[PWM_C]->TZCTL.bit.TZA = 3; - EPwmRegs[PWM_C]->TZCTL.bit.TZB = 3; + EPwmRegs[PWM_A]->TZCLR.all = 0x4;// + EPwmRegs[PWM_B]->TZCLR.all = 0x4;// + EPwmRegs[PWM_C]->TZCLR.all = 0x4;// EDIS; } @@ -81,13 +81,79 @@ void PWM_ABC_Start(uint16_t Num) EDIS; } - +/* + * Нужно сформировать с соответствующих каналов SDFM (трёх каналов, на которых происходит измерение токов) + * модулей сигналы CEVT1 и/или CEVT2, выбрав значения CEVT1SEL и CEVT2SEL и настроив границы + * SDFLTxCMPH1.bit.HLT и SDFLTxCMPL1.bit.LLT (или SDFLTxCMPH2.bit.HLT и SDFLTxCMPL2.bit.LLT). + * + * На CPU1 при помощи EPwmXbarRegs (см. стр. 2145 TRM) подключить эти выходы на входы + * TRIPn (можно черех MUX завести сразу несколько сигналов SDxFLTy.CEVT1_OR_CEVT2 на один TRIPn, + * где n = 4..12, x = 1..2, y = 1..4) + * + * На блоке PWM подключить TRIPn к блоку "Digital Compare Signals" (стр 2917 TRM) + * через регистры DCTRIPSEL соответствующих PWM-модулей (трёх модулей, отвечающих за формирование + * напряжения мотора). Если настроено верно, то изменения сигналов можно видеть в DCACTL и/или DCBCTL + * в битах EVT1LAT и/или EVT2LAT. + */ void PWMTripInit(void) { EALLOW; - EPwmRegs[PWM_A]->DCTRIPSEL.all = 0x3333; - EPwmRegs[PWM_B]->DCTRIPSEL.all = 0x3333; - EPwmRegs[PWM_C]->DCTRIPSEL.all = 0x3333; + EPwmRegs[PWM_A]->DCTRIPSEL.all = 0x3333;//3 - TRIPIN4 + EPwmRegs[PWM_B]->DCTRIPSEL.all = 0x3333;//3 - TRIPIN4 + EPwmRegs[PWM_C]->DCTRIPSEL.all = 0x3333;//3 - TRIPIN4 + EPwmRegs[PWM_A]->TZDCSEL.all = 0b010010010010; + EPwmRegs[PWM_B]->TZDCSEL.all = 0b010010010010; + EPwmRegs[PWM_C]->TZDCSEL.all = 0b010010010010; + EPwmRegs[PWM_A]->TZSEL.bit.DCAEVT1 = 1; + EPwmRegs[PWM_B]->TZSEL.bit.DCAEVT1 = 1; + EPwmRegs[PWM_C]->TZSEL.bit.DCAEVT1 = 1; + EPwmRegs[PWM_A]->TZSEL.bit.DCBEVT1 = 1; + EPwmRegs[PWM_B]->TZSEL.bit.DCBEVT1 = 1; + EPwmRegs[PWM_C]->TZSEL.bit.DCBEVT1 = 1; + EPwmRegs[PWM_A]->TZSEL.bit.DCAEVT2 = 0; + EPwmRegs[PWM_B]->TZSEL.bit.DCAEVT2 = 0; + EPwmRegs[PWM_C]->TZSEL.bit.DCAEVT2 = 0; + EPwmRegs[PWM_A]->TZSEL.bit.DCBEVT2 = 0; + EPwmRegs[PWM_B]->TZSEL.bit.DCBEVT2 = 0; + EPwmRegs[PWM_C]->TZSEL.bit.DCBEVT2 = 0; + EPwmRegs[PWM_A]->TZCTL.bit.DCAEVT1 = 2; //Force EPWMxA to a low state. + EPwmRegs[PWM_B]->TZCTL.bit.DCAEVT1 = 2; //Force EPWMxA to a low state. + EPwmRegs[PWM_C]->TZCTL.bit.DCAEVT1 = 2; //Force EPWMxA to a low state. + EPwmRegs[PWM_A]->TZCTL.bit.DCBEVT1 = 2; //Force EPWMxB to a low state. + EPwmRegs[PWM_B]->TZCTL.bit.DCBEVT1 = 2; //Force EPWMxB to a low state. + EPwmRegs[PWM_C]->TZCTL.bit.DCBEVT1 = 2; //Force EPWMxB to a low state. + EPwmRegs[PWM_A]->TZCTL.bit.DCAEVT2 = 2; //Force EPWMxA to a low state. + EPwmRegs[PWM_B]->TZCTL.bit.DCAEVT2 = 2; //Force EPWMxA to a low state. + EPwmRegs[PWM_C]->TZCTL.bit.DCAEVT2 = 2; //Force EPWMxA to a low state. + EPwmRegs[PWM_A]->TZCTL.bit.DCBEVT2 = 2; //Force EPWMxB to a low state. + EPwmRegs[PWM_B]->TZCTL.bit.DCBEVT2 = 2; //Force EPWMxB to a low state. + EPwmRegs[PWM_C]->TZCTL.bit.DCBEVT2 = 2; //Force EPWMxB to a low state. + EPwmRegs[PWM_A]->TZOSTCLR.all = 0xFFFF;// + EPwmRegs[PWM_B]->TZOSTCLR.all = 0xFFFF;// + EPwmRegs[PWM_C]->TZOSTCLR.all = 0xFFFF;// + EPwmRegs[PWM_A]->DCACTL.bit.EVT2LATSEL = 1; + EPwmRegs[PWM_B]->DCACTL.bit.EVT2LATSEL = 1; + EPwmRegs[PWM_C]->DCACTL.bit.EVT2LATSEL = 1; + EPwmRegs[PWM_A]->DCACTL.bit.EVT1LATSEL = 1; + EPwmRegs[PWM_B]->DCACTL.bit.EVT1LATSEL = 1; + EPwmRegs[PWM_C]->DCACTL.bit.EVT1LATSEL = 1; + +// EPwmRegs[PWM_A]->TZFRC.bit.DCAEVT1 = 1; +// EPwmRegs[PWM_B]->TZFRC.bit.DCAEVT1 = 1; +// EPwmRegs[PWM_C]->TZFRC.bit.DCAEVT1 = 1; + EDIS; +} + + +void PWM_clrTripEvnt(void) +{ + EALLOW; + EPwmRegs[PWM_A]->TZCLR.all = 0xFFFF;// + EPwmRegs[PWM_B]->TZCLR.all = 0xFFFF;// + EPwmRegs[PWM_C]->TZCLR.all = 0xFFFF;// + EPwmRegs[PWM_A]->TZOSTCLR.all = 0xFFFF;// + EPwmRegs[PWM_B]->TZOSTCLR.all = 0xFFFF;// + EPwmRegs[PWM_C]->TZOSTCLR.all = 0xFFFF;// EDIS; } diff --git a/Projects/epwm_test_biss_c_cpu2/src/Peripherals/pwm_init.h b/Projects/epwm_test_biss_c_cpu2/src/Peripherals/pwm_init.h index 4b290ce..f711f9b 100644 --- a/Projects/epwm_test_biss_c_cpu2/src/Peripherals/pwm_init.h +++ b/Projects/epwm_test_biss_c_cpu2/src/Peripherals/pwm_init.h @@ -29,7 +29,7 @@ #define SDFM_DELAY (SDFM_DELAY_mkS*SYS_PWM_FREQUENCY/1000000) #define PERIOD_DIV2 (PERIOD_MOTOR/2.0) -#define PERIOD_MAX (PERIOD_MOTOR*1.25) +#define PERIOD_MAX (PERIOD_MOTOR*1.25) //#define PWM_MAX (PERIOD_MOTOR - EPWM_DB) //#define PWM_MIN EPWM_DB*2 #define INDEPENDED 1 diff --git a/Projects/epwm_test_biss_c_cpu2/src/Peripherals/sdfm.c b/Projects/epwm_test_biss_c_cpu2/src/Peripherals/sdfm.c index 99ea526..fbefc13 100644 --- a/Projects/epwm_test_biss_c_cpu2/src/Peripherals/sdfm.c +++ b/Projects/epwm_test_biss_c_cpu2/src/Peripherals/sdfm.c @@ -88,11 +88,23 @@ volatile int16 * SdfmReadData[8] = { (volatile int16 *)((Uint16)0x5EC7), }; +volatile int16 * SdfmReadFiltr[8] = { + (volatile int16 *)((Uint16)0x5E1A), + (volatile int16 *)((Uint16)0x5E2A), + (volatile int16 *)((Uint16)0x5E3A), + (volatile int16 *)((Uint16)0x5E4A), + (volatile int16 *)((Uint16)0x5E9A), + (volatile int16 *)((Uint16)0x5EAA), + (volatile int16 *)((Uint16)0x5EBA), + (volatile int16 *)((Uint16)0x5ECA), +}; + #define WAIT_STABILITY_SDFM 6 int16_t sdfmAdc[8] = {0,0,0,0,0,0,0,0}; +int16_t sdfmFiltr[8]= {0,0,0,0,0,0,0,0}; int16_t sdfmAdcErr[8] = {0,0,0,0,0,0,0,0}; -int16_t sdfmOffset[8] = {0,0,0,0,0,-10,0,0}; +int16_t sdfmOffset[8] = {0,0,-50,0,0,0,0,0}; uint16_t startInitCurrent = 0; uint16_t initDone[8] = {WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM,WAIT_STABILITY_SDFM}; uint16_t AllInitDone =0; @@ -312,9 +324,16 @@ void SdfmInit(void) Sdfm2Regs.SDDFPARM4.bit.FEN = 1; EDIS; - sdfmInitPwmFlt(SDFM_IA, Max, Min); - sdfmInitPwmFlt(SDFM_IB, Max, Min); - sdfmInitPwmFlt(SDFM_IC, Max, Min); + Max = (BIT_MAX>>1)+IMAX_A_KZ*DIV_FACTOR_CURRENT_MOTOR/2/20; + Min = (BIT_MAX>>1)-IMAX_A_KZ*DIV_FACTOR_CURRENT_MOTOR/2/20; + + + + sdfmInitPwmFlt(SDFM_IA, Min, Max); + sdfmInitPwmFlt(SDFM_IB, Min, Max); + sdfmInitPwmFlt(SDFM_IC, Min, Max); + + sdfmInitPwmFlt(SDFM_U_DC, 0, 0x4200); } #define CEVT_interrupt_enable 0; @@ -335,6 +354,7 @@ void sdfmInitPwmFlt(uint16_t N, uint16_t LowFLT, uint16_t HightFlt) Sdfm1Regs.SDCPARM1.bit.EN_CEVT2 = CEVT_interrupt_enable; Sdfm1Regs.SDFLT1CMPH1.bit.HLT = HightFlt; Sdfm1Regs.SDFLT1CMPL1.bit.LLT = LowFLT; + //Sdfm1Regs.SDIFLG.bit.FLT1_FLG_CEVT1;-flag break; case 1: Sdfm1Regs.SDCPARM2.bit.CEVT1SEL = 1; @@ -432,6 +452,7 @@ void sdfmGetResult(uint16_t N) FilterResult[N][loopCounter[N]] = *SdfmReadData[N]; sdfmAdc[N] = FilterResult[N][loopCounter[N]] - sdfmOffset[N]; + sdfmFiltr[N] = *SdfmReadFiltr[N]; if((N != SDFM_U_DC)&(N != SDFM_BRAKE)) { if(loopCounter[N] < MAX_SAMPLES) loopCounter[N]++; else @@ -492,6 +513,15 @@ void sdfm_check_brake_measurements_was_done(void) } } +uint16_t sdfmOverCurrentCounter = 0; + +void sdfmOverCurrent(void) +{ +// PWM_ABC_StopAllClose(); +// vectorFault(); + sdfmOverCurrentCounter++; +} + __interrupt void Sdfm1_ISR(void) { @@ -503,6 +533,7 @@ uint32_t IntFlags; for(i = 0; i < 4; i++) if((uint16_t)IntFlags & (0x1000 << i)) sdfmGetResult(i); for(i = 0; i < 4; i++) if((uint16_t)IntFlags & (0x100 << i)) sdfmErr(i); + if( (((uint16_t)IntFlags)&0xFF) != 0 ) sdfmOverCurrent(); Sdfm_clearFlagRegister(SDFM1,IntFlags); sdfm_check_all_current_measurements_was_done(); diff --git a/Projects/epwm_test_biss_c_cpu2/src/frm_uart.c b/Projects/epwm_test_biss_c_cpu2/src/frm_uart.c index 7d0c701..2a62a71 100644 --- a/Projects/epwm_test_biss_c_cpu2/src/frm_uart.c +++ b/Projects/epwm_test_biss_c_cpu2/src/frm_uart.c @@ -9,7 +9,8 @@ #include "frm_uart.h" #define LSPCLK_HZ 50000000.0 -#define BAUD 57600.0 +//#define BAUD 57600.0 +#define BAUD 4000000.0 #define BRR LSPCLK_HZ/(BAUD*8) + 1 uint16_t frmEn = 0; diff --git a/Projects/epwm_test_biss_c_cpu2/src/vector.c b/Projects/epwm_test_biss_c_cpu2/src/vector.c index 09404c0..b94a367 100644 --- a/Projects/epwm_test_biss_c_cpu2/src/vector.c +++ b/Projects/epwm_test_biss_c_cpu2/src/vector.c @@ -393,10 +393,10 @@ void vector_klark_park(uint16_t SectorOn, int16_t CurrentA, int16_t CurrentB, in ( CurrLoop.piIq.Ref = -CurrLoop.CurrentLimit); } - CurrLoop.piIq.Fbk = vectorIdq.q; + CurrLoop.piIq.Fbk = vectorIdq.q;// действующий ток // CurrLoop.piId.Ref = 0; - CurrLoop.piId.Fbk = vectorIdq.d; + CurrLoop.piId.Fbk = vectorIdq.d;// // CurrLoop.piId.Umax = CurrLoop.piIq.Umax = Inputs->Udc; // CurrLoop.piId.Umin = CurrLoop.piIq.Umin = -CurrLoop.piIq.Umax;