отсортированы модули ШИМ, сделана инициализация сдвига нуля сигма-дельта, сделан тестовый блок SPI

Projects/epwm_test/epwm_test.c

@@ -16,6 +16,7 @@
 #include "f28x_project.h"
 #include "init_perif.h"
 #include"frm_uart.h"
+#include "spi_init.h"
 //
 // Main
 //
@@ -25,6 +26,12 @@ volatile uint16_t counter=0 ;
 volatile uint16_t counter1=0 ;
 volatile uint16_t counter2=0 ;
 
+
+uint16_t sdata = 0;  // sent data
+uint16_t rdata = 0;  // received data
+uint16_t error = 0;
+
+
 void main(void)
 {
 
@@ -35,7 +42,30 @@ void main(void)
 //
     for(;;)
     {
-        asm ("          NOP");
+        asm (" NOP");
+
+        transmitData(sdata);
+
+        //
+        // Wait until data is received
+        //
+        while(SpiaRegs.SPIFFRX.bit.RXFFST != 1)
+        {
+
+        }
+
+        //
+        // Check against sent data
+        //
+        rdata = SpiaRegs.SPIRXBUF;
+        if(rdata != sdata)
+        {
+            error++;
+        }
+        sdata++;
+
+
+
 
         if(FMSTR_is_enable()) {
                 if(counter < 100) counter++;

Projects/epwm_test/src/init_perif.c

@@ -11,19 +11,21 @@
 #include "sdfm.h"
 #include "f2838x_sdfm_drivers.h"
 #include "gpio_init.h"
+#include "spi_init.h"
 
 
 void InitPerif(void)
 {
     InitSysCtrl();
-//    InitGpio();
 
+    PWMGpioInit();
     PWMInitEnable();
-    PWMInitGpio();
+
-    SdfmInitGpio();
+    SdfmGpioInit();
     SdfmInitEnable();
 
-    GpioInit();
+    SpiaGpioInit();
+
 
 // Clear all interrupts and initialize PIE vector table:
 // Disable CPU interrupts
@@ -55,10 +57,12 @@ void InitPerif(void)
     InitPieVectTable();
 
 //
+    GpioInit();
     PWMInitInterruptEn();
     PWMAllInit();
     SdfmInitInterruptEn();
     SdfmInit(SDFM1);
+    SpiInit();
 //
 // Enable global Interrupts and higher priority real-time debug events:
 //

Projects/epwm_test/src/pwm_init.c

@@ -77,9 +77,8 @@ void PWMAllInit(void)
 }
 
 
-void PWMInitGpio(void)
+void PWMGpioInit(void)
 {
-//    InitEPwm1Gpio();
     InitEPwm2Gpio();
     InitEPwm3Gpio();
     InitEPwm4Gpio();
@@ -89,7 +88,6 @@ void PWMInitGpio(void)
 
 void PWMInitEnable(void)
 {
-//    CpuSysRegs.PCLKCR2.bit.EPWM1=1;
     CpuSysRegs.PCLKCR2.bit.EPWM2=1;
     CpuSysRegs.PCLKCR2.bit.EPWM3=1;
     CpuSysRegs.PCLKCR2.bit.EPWM4=1;
@@ -104,7 +102,7 @@ void PWMInitInterruptEn(void)
     // ISR functions found within this file.
     //
         EALLOW; // This is needed to write to EALLOW protected registers
-        PieVectTable.EPWM1_INT = &epwm1_isr;
+//        PieVectTable.EPWM1_INT = &epwm1_isr;
         PieVectTable.EPWM2_INT = &epwm2_isr;
         PieVectTable.EPWM3_INT = &epwm3_isr;
         PieVectTable.EPWM4_INT = &epwm4_isr;

Projects/epwm_test/src/pwm_init.h

@@ -20,7 +20,7 @@
 
 
 void PWMInit(uint16_t Num, uint16_t Period, uint16_t Independed);
-void PWMInitGpio(void);
+void PWMGpioInit(void);
 void PWMInitEnable(void);
 void PWMInitInterruptEn(void);
 void PWMAllInit(void);

Projects/epwm_test/src/pwm_interrupts.c

@@ -100,11 +100,11 @@ __interrupt void epwm4_isr(void)
 __interrupt void epwm5_isr(void)
 {
     Fault = !GpioDataRegs.GPADAT.bit.GPIO18;
-    if(Fault)
+    if(Fault || Fault_fix)
     {
-        EPwm5Regs.CMPA.bit.CMPA = 0;
+        EPwm5Regs.CMPA.bit.CMPA = PERIOD_BRAKE;
         PWM_out = 0;
-        Fault_fix = 1;
+        if(Fault)Fault_fix = 1;
     }
     else
     {

Projects/epwm_test/src/sdfm.c

@@ -11,7 +11,9 @@
 //
 // Defines
 //
-#define MAX_SAMPLES               1024
+#define FILTER_BIT                10
+#define SKIP_FIRST                100
+#define MAX_SAMPLES               (1<<FILTER_BIT)
 #define SDFM_PIN_MUX_OPTION1      1
 #define SDFM_PIN_MUX_OPTION2      2
 #define SDFM_PIN_MUX_OPTION3      3
@@ -22,6 +24,7 @@
 //
 uint16_t gPeripheralNumber;
 //uint16_t gPWM_number = 1; // ePWM 1 for synchronizing SDFM1 filters
+
 int16_t  Filter1_Result[MAX_SAMPLES];
 int16_t  Filter3_Result[MAX_SAMPLES];
 int16_t  Filter2_Result[MAX_SAMPLES];
@@ -30,12 +33,15 @@ int16_t  Filter4_Result[MAX_SAMPLES];
 #pragma DATA_SECTION(Filter2_Result,"Filter2_RegsFile");
 #pragma DATA_SECTION(Filter3_Result,"Filter3_RegsFile");
 #pragma DATA_SECTION(Filter4_Result,"Filter4_RegsFile");
-int16_t  ADC_Volt;
+int16_t  ADC_Volt = 0;
+int16_t  sdfmOffset = 0;
+uint16_t startInitCurrent = 0;
+uint16_t initDone = 0;
 
 __interrupt void Sdfm1_ISR(void);
 
 
-void SdfmInitGpio(void)
+void SdfmGpioInit(void)
 {
     EALLOW;
 
@@ -51,7 +57,6 @@ void SdfmInitEnable(void)
 {
     CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
     CpuSysRegs.PCLKCR6.bit.SD1 = 1;
-
 }
 
 void SdfmInitInterruptEn(void)
@@ -147,6 +152,8 @@ void SdfmInit(uint16_t Num)
 __interrupt void Sdfm1_ISR(void)
 {
     static uint16_t loopCounter1 = 0;
+    uint16_t i = 0;
+    int32_t OffsetCount = 0;
 
     Gpio1out(1);
     //
@@ -158,25 +165,24 @@ __interrupt void Sdfm1_ISR(void)
 //           SDFM_INT_MASK) != SDFM_INT_MASK);
 
 
-    //
-    // Reset the loop counter
-    //
-    if(loopCounter1 >= MAX_SAMPLES)
-    {
-        loopCounter1 = 0;
-    }
-
-    //
-    // Read each SDFM filter output and store it in respective filter
-    // result array
-    //
-
     if (IntFlags & 0x1000)
     {
-        ADC_Volt = Filter1_Result[loopCounter1++] = SDFM1_READ_FILTER1_DATA_16BIT;
+        if(loopCounter1 >= (MAX_SAMPLES-1))
-        EALLOW;
+        {
-        Sdfm1Regs.SDCPARM1.bit.MFIE = 1;
+            loopCounter1 = 0;
-        EDIS;
+            if(startInitCurrent < SKIP_FIRST) startInitCurrent++;
+            else if(!initDone)
+            {
+                for(i = 0; i <= (MAX_SAMPLES-1); i++)
+                {
+                    OffsetCount += Filter1_Result[i];
+                }
+                sdfmOffset = OffsetCount>>FILTER_BIT;
+                initDone = 1;
+            }
+        }
+        Filter1_Result[loopCounter1++] = SDFM1_READ_FILTER1_DATA_16BIT;
+        ADC_Volt = Filter1_Result[loopCounter1-1] - sdfmOffset;
     }
 
     if(IntFlags & 0x100)
@@ -186,6 +192,12 @@ __interrupt void Sdfm1_ISR(void)
         Sdfm1Regs.SDCPARM1.bit.MFIE = 0;
         EDIS;
     }
+    else
+    {
+        EALLOW;
+        Sdfm1Regs.SDCPARM1.bit.MFIE = 1;
+        EDIS;
+    }
 
     //
     // Clear SDFM flag register

Projects/epwm_test/src/sdfm.h

@@ -8,7 +8,7 @@
 #ifndef SRC_SDFM_H_
 #define SRC_SDFM_H_
 
-void SdfmInitGpio(void);
+void SdfmGpioInit(void);
 void SdfmInitEnable(void);
 void SdfmInitInterruptEn(void);
 void SdfmInit(uint16_t Num);

Projects/epwm_test/src/spi_init.c

@@ -5,6 +5,107 @@
  *      Author: seklyuts
  */
 
+#include "f28x_project.h"
 
 
+void SpiInit(void)
+{
+    //
+    // Initialize SPI-A
+    //
+    //
+    // Initialize SPI FIFO registers
+    //
+    CpuSysRegs.PCLKCR8.bit.SPI_A = 1;
+
+    SpiaRegs.SPIFFTX.all = 0xE040;
+    SpiaRegs.SPIFFRX.all = 0x2044;
+    SpiaRegs.SPIFFCT.all = 0x0;
+
+    //
+    // Initialize core SPI registers
+    //
+    //
+    // Set reset low before configuration changes
+    // Clock polarity (0 == rising, 1 == falling)
+    // 16-bit character
+    // Enable loop-back
+    //
+    SpiaRegs.SPICCR.bit.SPISWRESET = 0;
+    SpiaRegs.SPICCR.bit.CLKPOLARITY = 0;
+    SpiaRegs.SPICCR.bit.SPICHAR = (16 - 1);
+    SpiaRegs.SPICCR.bit.SPILBK = 1;
+
+    //
+    // Enable master (0 == slave, 1 == master)
+    // Enable transmission (Talk)
+    // Clock phase (0 == normal, 1 == delayed)
+    // SPI interrupts are disabled
+    //
+    SpiaRegs.SPICTL.bit.MASTER_SLAVE = 1;
+    SpiaRegs.SPICTL.bit.TALK = 1;
+    SpiaRegs.SPICTL.bit.CLK_PHASE = 0;
+    SpiaRegs.SPICTL.bit.SPIINTENA = 0;
+
+    //
+    // Set the baud rate using a 1 MHz SPICLK
+    // BRR = (LSPCLK / SPICLK) - 1
+    //
+    SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = ((50000000 / 1000000) - 1);
+
+    // Set FREE bit
+    // Halting on a breakpoint will not halt the SPI
+    //
+    SpiaRegs.SPIPRI.bit.FREE = 1;
+
+    //
+    // Release the SPI from reset
+    //
+    SpiaRegs.SPICCR.bit.SPISWRESET = 1;
+}
+
+void SpiaGpioInit(void)
+{
+       EALLOW;
+
+    //
+    // Enable internal pull-up for the selected pins
+    //
+    // Pull-ups can be enabled or disabled by the user.
+    // This will enable the pullups for the specified pins.
+    //
+    GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0;  // Enable pull-up on GPIO16 (SPISIMOA)
+    GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0;  // Enable pull-up on GPIO17 (SPISOMIA)
+    GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0;  // Enable pull-up on GPIO18 (SPICLKA)
+    GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0;  // Enable pull-up on GPIO19 (SPISTEA)
+
+    //
+    // Set qualification for selected pins to asynch only
+    //
+    // This will select asynch (no qualification) for the selected pins.
+    //
+    GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3; // Asynch input GPIO16 (SPISIMOA)
+    GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3; // Asynch input GPIO17 (SPISOMIA)
+    GpioCtrlRegs.GPBQSEL1.bit.GPIO34 = 3; // Asynch input GPIO18 (SPICLKA)
+    GpioCtrlRegs.GPBQSEL1.bit.GPIO35 = 3; // Asynch input GPIO19 (SPISTEA)
+
+    //
+    // Configure SPI-A pins
+    //
+    // This specifies which of the possible GPIO pins will be SPI functional
+    // pins.
+    //
+    GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 3; // Configure GPIO16 as SPISIMOA
+    GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 3; // Configure GPIO17 as SPISOMIA
+    GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 3; // Configure GPIO18 as SPICLKA
+    GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 3; // Configure GPIO19 as SPISTEA
+
+    EDIS;
+}
+
+void transmitData(uint16_t a)
+{
+    SpiaRegs.SPITXBUF = a;
+}
+
 

Projects/epwm_test/src/spi_init.h

@@ -8,8 +8,9 @@
 #ifndef SRC_SPI_INIT_H_
 #define SRC_SPI_INIT_H_
 
-
+void SpiaGpioInit(void);
-
+void SpiInit(void);
+void transmitData(uint16_t a);
 
 
 #endif /* SRC_SPI_INIT_H_ */