From 6d0905983ff84b5a5d69f467f7a526249080cb97 Mon Sep 17 00:00:00 2001
From: seklyuts <seklyuts@diakont.com>
Date: Wed, 4 Sep 2024 14:59:27 +0300
Subject: [PATCH] =?UTF-8?q?=D0=B4=D0=BE=D0=B1=D0=B0=D0=B2=D0=BB=D0=B5?=
 =?UTF-8?q?=D0=BD=D1=8B=20=D0=BD=D0=BE=D0=B2=D1=8B=D0=B5=20=D1=84=D0=B0?=
 =?UTF-8?q?=D0=B9=D0=BB=D1=8B?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

---
 Projects/epwm_test_biss_c_cpu2/.cproject      |   2 +-
 Projects/epwm_test_biss_c_cpu2/Start_rfm.pmp  | Bin 61234 -> 61234 bytes
 .../epwm_test_biss_c_cpu2/src/SyncPWMFonRun.c | 100 ++++++++++++++++++
 .../epwm_test_biss_c_cpu2/src/SyncPWMFonRun.h |  16 +++
 .../epwm_test_biss_c_cpu2/src/uart_4Mbit.c    |  78 ++++++++++++++
 .../epwm_test_biss_c_cpu2/src/uart_4Mbit.h    |  14 +++
 6 files changed, 209 insertions(+), 1 deletion(-)
 create mode 100644 Projects/epwm_test_biss_c_cpu2/src/SyncPWMFonRun.c
 create mode 100644 Projects/epwm_test_biss_c_cpu2/src/SyncPWMFonRun.h
 create mode 100644 Projects/epwm_test_biss_c_cpu2/src/uart_4Mbit.c
 create mode 100644 Projects/epwm_test_biss_c_cpu2/src/uart_4Mbit.h

diff --git a/Projects/epwm_test_biss_c_cpu2/.cproject b/Projects/epwm_test_biss_c_cpu2/.cproject
index eed45f4..95879de 100644
--- a/Projects/epwm_test_biss_c_cpu2/.cproject
+++ b/Projects/epwm_test_biss_c_cpu2/.cproject
@@ -62,7 +62,7 @@
 								</option>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEFINE.2084039298" name="Pre-define NAME (--define, -D)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEFINE" valueType="definedSymbols">
 									<listOptionValue builtIn="false" value="${COM_TI_C2000WARE_SOFTWARE_PACKAGE_SYMBOLS}"/>
-									<listOptionValue builtIn="false" value="FREEMASTER"/>
+									<listOptionValue builtIn="false" value="NFREEMASTER"/>
 									<listOptionValue builtIn="false" value="NRS485"/>
 									<listOptionValue builtIn="false" value="REF1"/>
 									<listOptionValue builtIn="false" value="USE_25MHZ_XTAL"/>
diff --git a/Projects/epwm_test_biss_c_cpu2/Start_rfm.pmp b/Projects/epwm_test_biss_c_cpu2/Start_rfm.pmp
index adb9214f0dbde504de3ac840c98cbd7d44330a68..99e48d5a1658c96fdface5ee7bc56049360e5b62 100644
GIT binary patch
delta 675
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oktZ#udwWe-)t#B)8lKIh@ku7$7mx0o);QPiNe)==ZR|Vv2i^q&(*OVf

delta 670
zcmY+BOK4M35QdrDP~%O|8|h6NsZG*Y+oY|zin<cp=%RukYCz~CDz4Nb2nt143NBnI
zw*5_PT!gAMsR)wx>;x%Y2;!;|qm7T6g+>t{^;xAZoSfQt-TnVJ|2cDJ&iITnKBM%v
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z6%*cSnyrv>I^|nPmv6F(lJ5}FdsDzG+f2|meo-Gz8(|!1aNyc%H+?se0R1pI2R5y7
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diff --git a/Projects/epwm_test_biss_c_cpu2/src/SyncPWMFonRun.c b/Projects/epwm_test_biss_c_cpu2/src/SyncPWMFonRun.c
new file mode 100644
index 0000000..3d4f668
--- /dev/null
+++ b/Projects/epwm_test_biss_c_cpu2/src/SyncPWMFonRun.c
@@ -0,0 +1,100 @@
+/*
+ * SyncPWMFonRun.c
+ *
+ *  Created on: 4 сент. 2024 г.
+ *      Author: seklyuts
+ */
+#include "f28x_project.h"
+#include "frmmstr_run.h"
+#include "init_perif.h"
+#include "gpio_init.h"
+#include "fault.h"
+#include "i2c_oled.h"
+#include "buttons.h"
+#include "eqep.h"
+#include "SyncPWMFonRun.h"
+
+volatile uint16_t counter=0 ;
+volatile uint16_t counter1=0 ;
+volatile uint16_t counter2=0 ;
+
+volatile uint16_t testMode = 0;
+
+uint16_t BisscPwrOn = 1;
+uint16_t BrakeOn = 0;
+
+void SyncPWMFonRun(void)
+{
+        static    uint16_t diod = 0;
+
+        if(SynchPWMFonRunEnable())
+        {
+#ifdef  FREEMASTER
+                frmmstr_run();
+#endif
+                SynchPWMFonRunEnableClr();
+                if(counter < 100) counter++;
+                else
+                {
+                    counter = 0;
+                    if(counter1 < 100) counter1++;
+                    else
+                    {
+                        counter1=0;
+                        counter2++;
+                        diod++;
+                        if(diod > 7) diod = 0;
+                        Gpio_rainbow(diod);
+                    }
+                }
+        }
+        else
+        {
+            if(BisscPwrOn)
+            {
+                GpioDataRegs.GPADAT.bit.GPIO21 = 1;
+            }
+            else
+            {
+                GpioDataRegs.GPADAT.bit.GPIO21 = 0;
+            }
+
+            if(BrakeOn)
+            {
+                GpioDataRegs.GPADAT.bit.GPIO14 = 1;
+            }
+            else
+            {
+                GpioDataRegs.GPADAT.bit.GPIO14 = 0;
+            }
+
+            if(fault_read_check())
+            {
+                    fault_read_clr();
+                    fault_read_ports();
+            }else{
+                buttonsDisp();
+                ScreenDisp();
+            }
+        }
+
+}
+
+
+uint16_t SynchPWMFonRunEn = 0;
+
+
+uint16_t SynchPWMFonRunEnable(void)
+{
+    return SynchPWMFonRunEn;
+}
+
+void SynchPWMFonRunEnableClr(void)
+{
+    SynchPWMFonRunEn = 0;
+}
+
+void SynchPWMFonRunEnableSet(void)
+{
+    SynchPWMFonRunEn = 1;
+}
diff --git a/Projects/epwm_test_biss_c_cpu2/src/SyncPWMFonRun.h b/Projects/epwm_test_biss_c_cpu2/src/SyncPWMFonRun.h
new file mode 100644
index 0000000..dbe6f7a
--- /dev/null
+++ b/Projects/epwm_test_biss_c_cpu2/src/SyncPWMFonRun.h
@@ -0,0 +1,16 @@
+/*
+ * SyncPWMFonRun.h
+ *
+ *  Created on: 4 сент. 2024 г.
+ *      Author: seklyuts
+ */
+
+#ifndef SRC_SYNCPWMFONRUN_H_
+#define SRC_SYNCPWMFONRUN_H_
+
+void SyncPWMFonRun(void);
+uint16_t SynchPWMFonRunEnable(void);
+void SynchPWMFonRunEnableClr(void);
+void SynchPWMFonRunEnableSet(void);
+
+#endif /* SRC_SYNCPWMFONRUN_H_ */
diff --git a/Projects/epwm_test_biss_c_cpu2/src/uart_4Mbit.c b/Projects/epwm_test_biss_c_cpu2/src/uart_4Mbit.c
new file mode 100644
index 0000000..15acb62
--- /dev/null
+++ b/Projects/epwm_test_biss_c_cpu2/src/uart_4Mbit.c
@@ -0,0 +1,78 @@
+/*
+ * uart_4Mbit.c
+ *
+ *  Created on: 4 сент. 2024 г.
+ *      Author: seklyuts
+ */
+
+
+#include "f28x_project.h"
+#include "uart_4Mbit.h"
+
+#define LSPCLK_HZ   50000000.0
+#define BAUD        4000000.0
+#define BRR         LSPCLK_HZ/(BAUD*8) + 1
+
+
+
+
+void UartInit(void)
+{
+    EALLOW;
+    CpuSysRegs.PCLKCR7.bit.SCI_A = 1;
+    EDIS;
+
+
+#ifdef REF0
+       EALLOW;
+       GpioDataRegs.GPADAT.bit.GPIO21 = 1;
+       GpioDataRegs.GPCDAT.bit.GPIO83 = 0;
+       EDIS;
+#else
+       EALLOW;
+       GpioDataRegs.GPEDAT.bit.GPIO133 = 1;
+       GpioDataRegs.GPEDAT.bit.GPIO145 = 0;
+       EDIS;
+#endif
+
+
+    EALLOW;
+    SciaRegs.SCICCR.all = 0x0007;   // 1 stop bit,  No loopback
+                                    // No parity,8 char bits,
+                                    // async mode, idle-line protocol
+    SciaRegs.SCICTL1.all = 0x0003;  // enable TX, RX, internal SCICLK,
+                                    // Disable RX ERR, SLEEP, TXWAKE
+    SciaRegs.SCICTL2.all = 0x0003;
+    SciaRegs.SCICTL2.bit.TXINTENA = 0;
+    SciaRegs.SCICTL2.bit.RXBKINTENA = 0;
+
+    uint16_t Brr = BRR;
+
+    SciaRegs.SCIHBAUD.all = 0xFF & (Brr>>8);//0x0002;
+    SciaRegs.SCILBAUD.all = 0xFF & Brr;//0x008B;
+
+    SciaRegs.SCICTL1.all = 0x0023;  // Relinquish SCI from Reset
+
+    SciaRegs.SCICTL1.bit.RXENA = 1;
+    SciaRegs.SCICTL1.bit.TXENA = 1;
+
+    EDIS;
+}
+
+void UartErrorReset(void)
+{
+    if(SciaRegs.SCIRXST.bit.RXERROR)
+    {
+        EALLOW;
+        SciaRegs.SCICTL1.bit.SWRESET = 0;
+        EDIS;
+    }
+    else
+    {
+        EALLOW;
+        SciaRegs.SCICTL1.bit.SWRESET = 1;
+        EDIS;
+    }
+}
+
+
diff --git a/Projects/epwm_test_biss_c_cpu2/src/uart_4Mbit.h b/Projects/epwm_test_biss_c_cpu2/src/uart_4Mbit.h
new file mode 100644
index 0000000..e3e79f5
--- /dev/null
+++ b/Projects/epwm_test_biss_c_cpu2/src/uart_4Mbit.h
@@ -0,0 +1,14 @@
+/*
+ * uart_4Mbit.h
+ *
+ *  Created on: 4 сент. 2024 г.
+ *      Author: seklyuts
+ */
+
+#ifndef SRC_UART_4MBIT_H_
+#define SRC_UART_4MBIT_H_
+
+void UartInit(void);
+void UartErrorReset(void);
+
+#endif /* SRC_UART_4MBIT_H_ */