332 lines
8.4 KiB
C
332 lines
8.4 KiB
C
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//###########################################################################
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//
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// FILE: uart.c
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//
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// TITLE: CM UARTdriver.
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//
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//###########################################################################
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// $TI Release: F2838x Support Library v3.04.00.00 $
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// $Release Date: Fri Feb 12 19:08:49 IST 2021 $
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// $Copyright:
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// Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#include <stdbool.h>
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#include <stdint.h>
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#include "inc/hw_memmap.h"
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#include "inc/hw_types.h"
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#include "inc/hw_uart.h"
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#include "debug.h"
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#include "interrupt.h"
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#include "uart.h"
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//*****************************************************************************
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//
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// API Function prototypes
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// UART_setConfig()
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//
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//*****************************************************************************
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void
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UART_setConfig(uint32_t base, uint32_t uartClk,
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uint32_t baud, uint32_t config)
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{
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uint32_t div, baudrt;
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baudrt = baud;
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//
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// Check the arguments.
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//
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ASSERT(UART_isBaseValid(base));
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ASSERT(baudrt != 0U);
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ASSERT(uartClk >= (baudrt * UART_CLK_DIVIDER));
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//
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// Stop the UART.
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//
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UART_disableModule(base);
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//
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// Is the required baud rate greater than the maximum rate supported
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// without the use of high speed mode?
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//
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if((baudrt * 16U) > uartClk)
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{
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//
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// Enable high speed mode.
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//
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HWREG(base + UART_O_CTL) |= UART_CTL_HSE;
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//
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// Half the supplied baud rate to compensate for enabling high speed
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// mode. This allows the following code to be common to both cases.
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//
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baudrt /= 2U;
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}
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else
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{
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//
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// Disable high speed mode.
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//
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HWREG(base + UART_O_CTL) &= ~(UART_CTL_HSE);
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}
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//
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// Compute the fractional baud rate divider.
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//
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div = (((uartClk * 8U) / baudrt) + 1U) / 2U;
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//
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// Set the baud rate.
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//
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HWREG(base + UART_O_IBRD) = div / 64U;
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HWREG(base + UART_O_FBRD) = div % 64U;
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//
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// Set parity, data length, and number of stop bits.
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//
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HWREG(base + UART_O_LCRH) = config;
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//
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// Start the UART.
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//
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UART_enableModule(base);
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}
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//*****************************************************************************
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//
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// UART_getConfig()
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//
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//*****************************************************************************
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void
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UART_getConfig(uint32_t base, uint32_t uartClk,
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uint32_t *baud, uint32_t *config)
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{
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uint32_t integr, frac;
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//
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// Check the arguments.
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//
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ASSERT(UART_isBaseValid(base));
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//
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// Compute the baud rate.
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//
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integr = HWREG(base + UART_O_IBRD);
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frac = HWREG(base + UART_O_FBRD);
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*baud = (uartClk * 4U) / ((64U * integr) + frac);
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//
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// See if high speed mode enabled.
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//
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if((HWREG(base + UART_O_CTL) & UART_CTL_HSE) == UART_CTL_HSE)
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{
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//
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// High speed mode is enabled so the actual baud rate is actually
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// double what was just calculated.
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//
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*baud *= 2U;
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}
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//
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// Get the parity, data length, and number of stop bits.
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//
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*config = (HWREG(base + UART_O_LCRH) &
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(UART_LCRH_SPS | UART_LCRH_WLEN_M | UART_LCRH_STP2 |
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UART_LCRH_EPS | UART_LCRH_PEN));
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}
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//*****************************************************************************
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//
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// UART_writeCharNonBlocking()
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//
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//*****************************************************************************
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bool
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UART_writeCharNonBlocking(uint32_t base, uint8_t data)
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{
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bool ret;
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//
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// Check the arguments.
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//
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ASSERT(UART_isBaseValid(base));
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//
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// See if there is space in the transmit FIFO.
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//
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if((HWREG(base + UART_O_FR) & UART_FR_TXFF) == 0U)
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{
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//
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// Write this character to the transmit FIFO.
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//
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HWREG(base + UART_O_DR) = data;
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//
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// Success.
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//
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ret = true;
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}
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else
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{
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//
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// There is no space in the transmit FIFO, so return a failure.
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//
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ret = false;
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}
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return(ret);
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}
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//*****************************************************************************
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//
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// UART_send9BitAddress()
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//
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//*****************************************************************************
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void
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UART_send9BitAddress(uint32_t base, uint8_t addr)
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{
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uint32_t lcrh;
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//
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// Check the arguments.
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//
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ASSERT(UART_isBaseValid(base));
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//
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// Wait until the FIFO is empty and the UART is not busy.
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//
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while((HWREG(base + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY)) !=
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UART_FR_TXFE)
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{
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}
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//
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// Force the address/data bit to 1 to indicate this is an address byte.
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//
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lcrh = HWREG(base + UART_O_LCRH);
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HWREG(base + UART_O_LCRH) = ((lcrh & ~UART_LCRH_EPS) |
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UART_LCRH_SPS | UART_LCRH_PEN);
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//
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// Send the address.
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//
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HWREG(base + UART_O_DR) = addr;
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//
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// Wait until the address has been sent.
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//
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while((HWREG(base + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY)) !=
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UART_FR_TXFE)
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{
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}
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//
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// Restore the address/data setting.
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//
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HWREG(base + UART_O_LCRH) = lcrh;
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}
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//*****************************************************************************
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//
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// UART_stop9BitDataMode()
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//
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//*****************************************************************************
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void
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UART_stop9BitDataMode(uint32_t base, uint32_t lcrh)
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{
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//
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// Check the arguments.
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//
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ASSERT(UART_isBaseValid(base));
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//
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// Wait until the FIFO is empty and the UART is not busy.
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//
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while((HWREG(base + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY)) !=
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UART_FR_TXFE)
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{
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}
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//
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// Restore the address/data setting to enter normal transmission mode.
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//
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HWREG(base + UART_O_LCRH) = lcrh;
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}
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//*****************************************************************************
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//
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// UART_configure9BitDataMode()
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//
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//*****************************************************************************
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uint32_t
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UART_configure9BitDataMode(uint32_t base)
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{
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uint32_t lcrh;
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//
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// Check the arguments.
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//
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ASSERT(UART_isBaseValid(base));
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//
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// Wait until the FIFO is empty and the UART is not busy.
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//
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while((HWREG(base + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY)) !=
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UART_FR_TXFE)
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{
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}
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//
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// Force the address/data bit to 0 to indicate this is an data byte.
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//
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lcrh = HWREG(base + UART_O_LCRH);
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HWREG(base + UART_O_LCRH) = (lcrh | UART_LCRH_EPS |
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UART_LCRH_SPS | UART_LCRH_PEN);
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//
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// Needed to restore the address/data setting after the full
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// 9-bit data transmission.
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//
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return(lcrh);
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}
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