//###########################################################################
//
// FILE:   emif1_ex1_16bit_asram.c
//
// TITLE:  EMIF1 module accessing 16bit ASRAM.
//
//! \addtogroup cpu01_example_list
//! <h1> EMIF ASYNC module (emif1_16bit_asram)</h1>
//!
//! This example configures EMIF1 in 16bit ASYNC mode
//! This example uses CS2 as chip enable.
//!
//! \b Watch \b Variables: \n
//! - \b TEST_STATUS - Equivalent to \b TEST_PASS if test finished correctly,
//!                    else the value is set to \b TEST_FAIL
//! - \b ErrCount - Error counter
//!
//
//###########################################################################
//
//
// $Copyright:
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// $
//###########################################################################

//
// Included Files
//
#include "f28x_project.h"

#define TEST_PASS            0xABCDABCD
#define TEST_FAIL            0xDEADDEAD
#define ASRAM_CS2_START_ADDR 0x100000
#define ASRAM_CS2_SIZE       0x100000

//
// Globals
//
Uint16  ErrCount = 0;
Uint32  TEST_STATUS;
int i;

//
// Function Prototypes
//
extern void setup_emif1_pinmux_async_16bit(Uint16);

//
// mem_read_write - This function performs simple read/write word accesses
//                  to memory.
//
char mem_read_write(Uint32 start_addr, Uint32 mem_size) {
    unsigned short mem_rds;
    unsigned short mem_wds;
    unsigned short* XMEM_ps;
    unsigned long i;

    // Write data
    XMEM_ps = (unsigned short* )start_addr;
    XMEM_ps++;
    mem_wds = 0x0123;
    for (i = 0; i < mem_size; i++) {
        *(XMEM_ps) = mem_wds; // Запись по адресу, затем инкремент
        XMEM_ps+=2;
        mem_wds += 0x1111;
    }
    // Verify memory
    mem_wds = 0x0123;
    XMEM_ps = (unsigned short* )start_addr;
    for (i = 0; i < mem_size; i++) {
        mem_rds = *(XMEM_ps);  // Чтение по адресу, затем инкремент
        XMEM_ps+=2;
        if (mem_rds != mem_wds) {
            return 1;
        }
        mem_wds += 0x1111;
    }
    return 0;
}


//
// Main
//
void main(void)
{
    char ErrCount_local;
    TEST_STATUS = TEST_FAIL;

//
// Initialize system control
//
    InitSysCtrl();

    DINT;

//
//  Initialize the PIE control registers to their default state.
//  The default state is all PIE interrupts disabled and flags
//  are cleared.
//  This function is found in the f2838x_piectrl.c file.
//
    InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
    EALLOW;
    IER = 0x0000;
    IFR = 0x0000;
    EDIS;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// GService Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in f2838x_defaultisr.c.
// This function is found in f2838x_pievect.c.
//
   InitPieVectTable();

//
//Configure to run EMIF1 on full Rate (EMIF1CLK = CPU1SYSCLK)
//
  EALLOW;
  ClkCfgRegs.PERCLKDIVSEL.bit.EMIF1CLKDIV = 0x1;
  ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0x1;
  EDIS;

  EALLOW;
//
// Grab EMIF1 For CPU1
//
  Emif1ConfigRegs.EMIF1MSEL.all = 0x93A5CE71;
  if(Emif1ConfigRegs.EMIF1MSEL.all != 0x1)
  {
      ErrCount++;
  }

//
//Disable Access Protection (CPU_FETCH/CPU_WR/DMA_WR)
//
  Emif1ConfigRegs.EMIF1ACCPROT0.all = 0x0;
  if(Emif1ConfigRegs.EMIF1ACCPROT0.all != 0x0)
  {
      ErrCount++;
  }

//
// Commit the configuration related to protection. Till this bit remains set
// content of EMIF1ACCPROT0 register can't be changed.
//
  Emif1ConfigRegs.EMIF1COMMIT.all = 0x1;
  if(Emif1ConfigRegs.EMIF1COMMIT.all != 0x1)
  {
     ErrCount++;
  }

//
// Lock the configuration so that EMIF1COMMIT register can't be
// changed any more.
//
  Emif1ConfigRegs.EMIF1LOCK.all = 0x1;
  if(Emif1ConfigRegs.EMIF1LOCK.all != 1)
  {
      ErrCount++;
  }

  EDIS;

//
//Configure GPIO pins for EMIF1
//
  setup_emif1_pinmux_async_16bit(0);

#define MEM_D_WIDTH          1            // 16Bit Memory Interface
#define TURN_AROUND_TIME     1            // Turn Around time
#define RD_SETUP_TIME        1            // Read Setup time
#define RD_STROBE_TIME       15            // Read Strobe time
#define RD_HOLD_TIME         1            // Read Hold time
#define WR_SETUP_TIME        1           // Write Hold time
#define WR_STROBE_TIME       15            // Write Setup time
#define WR_HOLD_TIME         1            // Write Hold time
#define EXTEND_WAIT          0            // Disable Extended Wait
#define STROBE_SEL           0            // Disable Strobe Mode

// Объявление структуры и ее инициализация
struct ASYNC_CS2_CR_BITS cs2_cr_bits = {
    .ASIZE = MEM_D_WIDTH,
    .TA = TURN_AROUND_TIME,
    .R_HOLD = RD_HOLD_TIME,
    .R_STROBE = RD_STROBE_TIME,
    .R_SETUP = RD_SETUP_TIME,
    .W_HOLD = WR_HOLD_TIME,
    .W_STROBE = WR_STROBE_TIME,
    .W_SETUP = WR_SETUP_TIME,
    .EW = EXTEND_WAIT,
    .SS = STROBE_SEL
};

// Присвоение значений структуре регистру
Emif1Regs.ASYNC_CS2_CR.all = *(Uint32 *)&cs2_cr_bits;

//
//Check basic RD/WR access to CS2 space
//
  ErrCount_local = mem_read_write(ASRAM_CS2_START_ADDR, ASRAM_CS2_SIZE);
  ErrCount = ErrCount + ErrCount_local;


  if (ErrCount == 0x0)
  {
      TEST_STATUS = TEST_PASS;
  }

  while (1);
}

//
// End of file
//
