1327 lines
78 KiB
Plaintext
1327 lines
78 KiB
Plaintext
******************************************************************************
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TMS320C2000 Linker PC v22.6.0
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******************************************************************************
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>> Linked Fri Aug 9 12:18:59 2024
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OUTPUT FILE NAME: <i2c_ex1_master.out>
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ENTRY POINT SYMBOL: "code_start" address: 00000000
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MEMORY CONFIGURATION
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name origin length used unused attr fill
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---------------------- -------- --------- -------- -------- ---- --------
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PAGE 0:
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BEGIN 00000000 00000002 00000002 00000000 RWIX
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BOOT_RSVD 00000002 000001af 00000000 000001af RWIX
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RAMM0 000001b1 0000024f 00000028 00000227 RWIX
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RAMM1 00000400 000003f8 00000100 000002f8 RWIX
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RAMLS0 00008000 00000800 0000059c 00000264 RWIX
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RAMLS1 00008800 00000800 00000000 00000800 RWIX
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RAMLS2 00009000 00000800 00000000 00000800 RWIX
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RAMLS3 00009800 00000800 00000000 00000800 RWIX
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RAMLS4 0000a000 00000800 00000000 00000800 RWIX
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RAMLS5 0000a800 00000800 0000042e 000003d2 RWIX
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RAMLS6 0000b000 00000800 00000500 00000300 RWIX
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RAMLS7 0000b800 00000800 00000000 00000800 RWIX
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RAMD0 0000c000 00000800 00000800 00000000 RWIX
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RAMD1 0000c800 00000800 00000800 00000000 RWIX
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RAMGS0 0000d000 00001000 00000000 00001000 RWIX
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RAMGS1 0000e000 00001000 00000000 00001000 RWIX
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RAMGS2 0000f000 00001000 00000000 00001000 RWIX
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RAMGS3 00010000 00001000 00000000 00001000 RWIX
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RAMGS4 00011000 00001000 00000000 00001000 RWIX
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RAMGS5 00012000 00001000 00000000 00001000 RWIX
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RAMGS6 00013000 00001000 00000000 00001000 RWIX
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RAMGS7 00014000 00001000 00000000 00001000 RWIX
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RAMGS8 00015000 00001000 00000000 00001000 RWIX
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RAMGS9 00016000 00001000 00000000 00001000 RWIX
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RAMGS10 00017000 00001000 00000000 00001000 RWIX
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RAMGS11 00018000 00001000 00000000 00001000 RWIX
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RAMGS12 00019000 00001000 00000000 00001000 RWIX
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RAMGS13 0001a000 00001000 00000000 00001000 RWIX
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RAMGS14 0001b000 00001000 00000000 00001000 RWIX
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RAMGS15 0001c000 00000ff8 00000000 00000ff8 RWIX
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CMTOCPURAM 00038000 00000800 00000000 00000800 RWIX
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CPUTOCMRAM 00039000 00000800 00000000 00000800 RWIX
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CPU1TOCPU2RAM 0003a000 00000800 00000000 00000800 RWIX
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CPU2TOCPU1RAM 0003b000 00000800 00000000 00000800 RWIX
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CANA_MSG_RAM 00049000 00000800 00000000 00000800 RWIX
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CANB_MSG_RAM 0004b000 00000800 00000000 00000800 RWIX
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FLASH0 00080000 00002000 00000000 00002000 RWIX
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FLASH1 00082000 00002000 00000000 00002000 RWIX
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FLASH2 00084000 00002000 00000000 00002000 RWIX
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FLASH3 00086000 00002000 00000000 00002000 RWIX
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FLASH4 00088000 00008000 00000000 00008000 RWIX
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FLASH5 00090000 00008000 00000000 00008000 RWIX
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FLASH6 00098000 00008000 00000000 00008000 RWIX
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FLASH7 000a0000 00008000 00000000 00008000 RWIX
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FLASH8 000a8000 00008000 00000000 00008000 RWIX
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FLASH9 000b0000 00008000 00000000 00008000 RWIX
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FLASH10 000b8000 00002000 00000000 00002000 RWIX
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FLASH11 000ba000 00002000 00000000 00002000 RWIX
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FLASH12 000bc000 00002000 00000000 00002000 RWIX
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FLASH13 000be000 00002000 00000000 00002000 RWIX
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RESET 003fffc0 00000002 00000000 00000002 RWIX
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PAGE 1:
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ADCARESULT 00000b00 00000018 00000000 00000018 RWIX
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ADCBRESULT 00000b20 00000018 00000000 00000018 RWIX
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ADCCRESULT 00000b40 00000018 00000000 00000018 RWIX
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ADCDRESULT 00000b60 00000018 00000000 00000018 RWIX
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CPUTIMER0 00000c00 00000008 00000000 00000008 RWIX
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CPUTIMER1 00000c08 00000008 00000000 00000008 RWIX
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CPUTIMER2 00000c10 00000008 00000000 00000008 RWIX
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PIECTRL 00000ce0 0000001a 0000001a 00000000 RWIX
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PIEVECTTABLE 00000d00 00000200 000001c0 00000040 RWIX
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DMA 00001000 00000200 00000000 00000200 RWIX
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CLA1 00001400 00000080 00000000 00000080 RWIX
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CLB1LOGICCFG 00003000 00000052 00000000 00000052 RWIX
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CLB1LOGICCTRL 00003100 00000040 00000000 00000040 RWIX
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CLB1DATAEXCH 00003180 00000080 00000000 00000080 RWIX
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CLB2LOGICCFG 00003200 00000052 00000000 00000052 RWIX
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CLB2LOGICCTRL 00003300 00000040 00000000 00000040 RWIX
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CLB2DATAEXCH 00003380 00000080 00000000 00000080 RWIX
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CLB3LOGICCFG 00003400 00000052 00000000 00000052 RWIX
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CLB3LOGICCTRL 00003500 00000040 00000000 00000040 RWIX
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CLB3DATAEXCH 00003580 00000080 00000000 00000080 RWIX
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CLB4LOGICCFG 00003600 00000052 00000000 00000052 RWIX
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CLB4LOGICCTRL 00003700 00000040 00000000 00000040 RWIX
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CLB4DATAEXCH 00003780 00000080 00000000 00000080 RWIX
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CLB5LOGICCFG 00003800 00000052 00000000 00000052 RWIX
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CLB5LOGICCTRL 00003900 00000040 00000000 00000040 RWIX
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CLB5DATAEXCH 00003980 00000080 00000000 00000080 RWIX
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CLB6LOGICCFG 00003a00 00000052 00000000 00000052 RWIX
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CLB6LOGICCTRL 00003b00 00000040 00000000 00000040 RWIX
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CLB6DATAEXCH 00003b80 00000080 00000000 00000080 RWIX
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CLB7LOGICCFG 00003c00 00000052 00000000 00000052 RWIX
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CLB7LOGICCTRL 00003d00 00000040 00000000 00000040 RWIX
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CLB7DATAEXCH 00003d80 00000080 00000000 00000080 RWIX
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CLB8LOGICCFG 00003e00 00000052 00000000 00000052 RWIX
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CLB8LOGICCTRL 00003f00 00000040 00000000 00000040 RWIX
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CLB8DATAEXCH 00003f80 00000080 00000000 00000080 RWIX
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EPWM1 00004000 00000100 00000000 00000100 RWIX
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EPWM2 00004100 00000100 00000000 00000100 RWIX
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EPWM3 00004200 00000100 00000000 00000100 RWIX
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EPWM4 00004300 00000100 00000000 00000100 RWIX
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EPWM5 00004400 00000100 00000000 00000100 RWIX
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EPWM6 00004500 00000100 00000000 00000100 RWIX
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EPWM7 00004600 00000100 00000000 00000100 RWIX
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EPWM8 00004700 00000100 00000000 00000100 RWIX
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EPWM9 00004800 00000100 00000000 00000100 RWIX
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EPWM10 00004900 00000100 00000000 00000100 RWIX
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EPWM11 00004a00 00000100 00000000 00000100 RWIX
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EPWM12 00004b00 00000100 00000000 00000100 RWIX
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EPWM13 00004c00 00000100 00000000 00000100 RWIX
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EPWM14 00004d00 00000100 00000000 00000100 RWIX
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EPWM15 00004e00 00000100 00000000 00000100 RWIX
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EPWM16 00004f00 00000100 00000000 00000100 RWIX
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EQEP1 00005100 00000040 00000000 00000040 RWIX
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EQEP2 00005140 00000040 00000000 00000040 RWIX
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EQEP3 00005180 00000040 00000000 00000040 RWIX
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ECAP1 00005200 00000020 00000000 00000020 RWIX
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ECAP2 00005240 00000020 00000000 00000020 RWIX
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ECAP3 00005280 00000020 00000000 00000020 RWIX
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ECAP4 000052c0 00000020 00000000 00000020 RWIX
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ECAP5 00005300 00000020 00000000 00000020 RWIX
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ECAP6 00005340 00000020 00000000 00000020 RWIX
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HRCAP6 00005360 00000020 00000000 00000020 RWIX
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ECAP7 00005380 00000020 00000000 00000020 RWIX
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HRCAP7 000053a0 00000020 00000000 00000020 RWIX
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DACA 00005c00 00000008 00000000 00000008 RWIX
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DACB 00005c10 00000008 00000000 00000008 RWIX
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DACC 00005c20 00000008 00000000 00000008 RWIX
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CMPSS1 00005c80 00000020 00000000 00000020 RWIX
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CMPSS2 00005ca0 00000020 00000000 00000020 RWIX
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CMPSS3 00005cc0 00000020 00000000 00000020 RWIX
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CMPSS4 00005ce0 00000020 00000000 00000020 RWIX
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CMPSS5 00005d00 00000020 00000000 00000020 RWIX
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CMPSS6 00005d20 00000020 00000000 00000020 RWIX
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CMPSS7 00005d40 00000020 00000000 00000020 RWIX
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CMPSS8 00005d60 00000020 00000000 00000020 RWIX
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SDFM1 00005e00 00000080 00000000 00000080 RWIX
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SDFM2 00005e80 00000080 00000000 00000080 RWIX
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MCBSPA 00006000 00000024 00000000 00000024 RWIX
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MCBSPB 00006040 00000024 00000000 00000024 RWIX
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SPIA 00006100 00000010 00000000 00000010 RWIX
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SPIB 00006110 00000010 00000000 00000010 RWIX
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SPIC 00006120 00000010 00000000 00000010 RWIX
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SPID 00006130 00000010 00000000 00000010 RWIX
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BGCRCCPU 00006340 00000040 00000000 00000040 RWIX
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BGCRCCLA1 00006380 00000040 00000000 00000040 RWIX
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PMBUSA 00006400 00000020 00000000 00000020 RWIX
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FSITXA 00006600 00000050 00000000 00000050 RWIX
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FSIRXA 00006680 00000050 00000000 00000050 RWIX
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FSITXB 00006700 00000050 00000000 00000050 RWIX
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FSIRXB 00006780 00000050 00000000 00000050 RWIX
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FSIRXC 00006880 00000050 00000000 00000050 RWIX
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FSIRXD 00006980 00000050 00000000 00000050 RWIX
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FSIRXE 00006a80 00000050 00000000 00000050 RWIX
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FSIRXF 00006b80 00000050 00000000 00000050 RWIX
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FSIRXG 00006c80 00000050 00000000 00000050 RWIX
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FSIRXH 00006d80 00000050 00000000 00000050 RWIX
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WD 00007000 0000002c 0000002b 00000001 RWIX
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NMIINTRUPT 00007060 00000010 00000000 00000010 RWIX
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XINT 00007070 0000000c 00000000 0000000c RWIX
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SCIA 00007200 00000010 00000000 00000010 RWIX
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SCIB 00007210 00000010 00000000 00000010 RWIX
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SCIC 00007220 00000010 00000000 00000010 RWIX
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SCID 00007230 00000010 00000000 00000010 RWIX
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I2CA 00007300 00000022 00000022 00000000 RWIX
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I2CB 00007340 00000022 00000000 00000022 RWIX
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ADCA 00007400 00000080 00000000 00000080 RWIX
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ADCB 00007480 00000080 00000000 00000080 RWIX
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ADCC 00007500 00000080 00000000 00000080 RWIX
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ADCD 00007580 00000080 00000000 00000080 RWIX
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INPUTXBAR 00007900 00000020 00000000 00000020 RWIX
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XBAR 00007920 00000020 00000000 00000020 RWIX
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SYNCSOC 00007940 00000006 00000000 00000006 RWIX
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CLBINPUTXBAR 00007960 00000020 00000000 00000020 RWIX
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DMACLASRCSEL 00007980 0000001a 00000000 0000001a RWIX
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EPWMXBAR 00007a00 00000040 00000000 00000040 RWIX
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CLBXBAR 00007a40 00000040 00000000 00000040 RWIX
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OUTPUTXBAR 00007a80 00000040 00000000 00000040 RWIX
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CLBOUTPUTXBAR 00007bc0 00000040 00000000 00000040 RWIX
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GPIOCTRL 00007c00 00000200 00000180 00000080 RWIX
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GPIODATA 00007f00 00000040 00000030 00000010 RWIX
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GPIODATAREAD 00007f80 00000010 00000000 00000010 RWIX
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EMIF1 00047000 00000070 00000000 00000070 RWIX
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EMIF2 00047800 00000070 00000000 00000070 RWIX
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CANA 00048000 00000200 00000000 00000200 RWIX
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CANB 0004a000 00000200 00000000 00000200 RWIX
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ESCSS 00057e00 00000024 00000000 00000024 RWIX
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ESCSSCONFIG 00057f00 00000016 00000000 00000016 RWIX
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MCANASS 0005c400 0000002c 00000000 0000002c RWIX
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MCANA 0005c600 00000100 00000000 00000100 RWIX
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MCANAERR 0005c800 00000210 00000000 00000210 RWIX
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CPU1TOCPU2IPC 0005ce00 00000026 00000000 00000026 RWIX
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CPU1TOCMIPC 0005ce40 00000026 00000000 00000026 RWIX
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DEVCFG 0005d000 000001a0 000001a0 00000000 RWIX
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CLKCFG 0005d200 00000100 0000003a 000000c6 RWIX
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CPUSYS 0005d300 000000a0 0000009c 00000004 RWIX
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SYSSTATUS 0005d400 00000100 00000000 00000100 RWIX
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SYSPERIPHAC 0005d500 00000200 00000000 00000200 RWIX
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ANALOGSUBSYS 0005d700 00000100 0000003e 000000c2 RWIX
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CMCONF 0005dc00 00000400 00000000 00000400 RWIX
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DCC0 0005e700 00000038 0000002c 0000000c RWIX
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DCC1 0005e740 00000038 0000002c 0000000c RWIX
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DCC2 0005e780 00000038 0000002c 0000000c RWIX
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ERADGLOBAL 0005e800 00000014 00000000 00000014 RWIX
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ERADHWBP1 0005e900 00000008 00000000 00000008 RWIX
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ERADHWBP2 0005e908 00000008 00000000 00000008 RWIX
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ERADHWBP3 0005e910 00000008 00000000 00000008 RWIX
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ERADHWBP4 0005e918 00000008 00000000 00000008 RWIX
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ERADHWBP5 0005e920 00000008 00000000 00000008 RWIX
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ERADHWBP6 0005e928 00000008 00000000 00000008 RWIX
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ERADHWBP7 0005e930 00000008 00000000 00000008 RWIX
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ERADHWBP8 0005e938 00000008 00000000 00000008 RWIX
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ERADCOUNTER1 0005e980 00000010 00000000 00000010 RWIX
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ERADCOUNTER2 0005e990 00000010 00000000 00000010 RWIX
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ERADCOUNTER3 0005e9a0 00000010 00000000 00000010 RWIX
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ERADCOUNTER4 0005e9b0 00000010 00000000 00000010 RWIX
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ERADCRCGLOBAL 0005ea00 00000010 00000000 00000010 RWIX
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ERADCRC1 0005ea10 00000010 00000000 00000010 RWIX
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ERADCRC2 0005ea20 00000010 00000000 00000010 RWIX
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ERADCRC3 0005ea30 00000010 00000000 00000010 RWIX
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ERADCRC4 0005ea40 00000010 00000000 00000010 RWIX
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ERADCRC5 0005ea50 00000010 00000000 00000010 RWIX
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ERADCRC6 0005ea60 00000010 00000000 00000010 RWIX
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ERADCRC7 0005ea70 00000010 00000000 00000010 RWIX
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ERADCRC8 0005ea80 00000010 00000000 00000010 RWIX
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DCSMZ1 0005f000 0000003e 00000000 0000003e RWIX
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DCSMZ2 0005f080 0000003e 00000000 0000003e RWIX
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DCSMCOMMON 0005f0c0 00000020 00000000 00000020 RWIX
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MEMCFG 0005f400 000000c0 00000000 000000c0 RWIX
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EMIF1CONFIG 0005f4c0 00000020 00000000 00000020 RWIX
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EMIF2CONFIG 0005f4e0 00000020 00000000 00000020 RWIX
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ACCESSPROTECTION 0005f500 00000040 00000000 00000040 RWIX
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MEMORYERROR 0005f540 00000040 00000000 00000040 RWIX
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ROMWAITSTATE 0005f580 00000008 00000000 00000008 RWIX
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ROMPREFETCH 0005f588 00000008 00000000 00000008 RWIX
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TESTERROR 0005f590 00000010 00000000 00000010 RWIX
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FLASH0CTRL 0005f800 00000182 00000000 00000182 RWIX
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FLASH0ECC 0005fb00 00000028 00000000 00000028 RWIX
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DCSMZ1OTP 00078000 00000020 00000000 00000020 RWIX
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DCSMZ2OTP 00078200 00000020 00000000 00000020 RWIX
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SECTION ALLOCATION MAP
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output attributes/
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section page origin length input sections
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-------- ---- ---------- ---------- ----------------
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codestart
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* 0 00000000 00000002
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00000000 00000002 f2838x_codestartbranch.obj (codestart)
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.cinit 0 000001b8 00000024
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000001b8 00000008 (.cinit..data.load) [load image, compression = lzss]
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000001c0 00000006 (__TI_handler_table)
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000001c6 00000004 (.cinit..bss.load) [load image, compression = zero_init]
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000001ca 00000004 (.cinit.PieVectTableFile.load) [load image, compression = zero_init]
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000001ce 00000002 --HOLE-- [fill = 0]
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000001d0 0000000c (__TI_cinit_table)
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.reset 0 003fffc0 00000000 DSECT
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.stack 0 00000400 00000100 UNINITIALIZED
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00000400 00000100 --HOLE--
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.bss 0 0000a800 00000424 UNINITIALIZED
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0000a800 00000400 i2c_oled.obj (.bss:SSD1306_Buffer)
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0000ac00 00000010 i2c_oled.obj (.bss:I2C_RXdata)
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0000ac10 00000010 i2c_oled.obj (.bss:I2C_TXdata)
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0000ac20 00000004 i2c_oled.obj (.bss)
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.init_array
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* 0 000001b1 00000000 UNINITIALIZED
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.data 0 0000ac24 0000000a UNINITIALIZED
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0000ac24 00000006 rts2800_fpu64_eabi.lib : exit.c.obj (.data)
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0000ac2a 00000002 : _lock.c.obj (.data:_lock)
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0000ac2c 00000002 : _lock.c.obj (.data:_unlock)
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.const 0 0000b000 00000500
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0000b000 00000340 i2c_ex1_master.obj (.const:.string:$P$T0$1)
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0000b340 000001c0 f2838x_pievect.obj (.const)
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.TI.ramfunc
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* 0 000001b1 00000004
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000001b1 00000004 f2838x_usdelay.obj (.TI.ramfunc)
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PieVectTableFile
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* 1 00000d00 000001c0 UNINITIALIZED
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00000d00 000001c0 f2838x_globalvariabledefs.obj (PieVectTableFile)
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EmuKeyVar
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* 1 00000d00 00000000 UNINITIALIZED
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EmuBModeVar
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* 1 00000d00 00000000 UNINITIALIZED
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EmuBootPinsVar
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* 1 00000d00 00000000 UNINITIALIZED
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FlashCallbackVar
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* 1 00000d00 00000000 UNINITIALIZED
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FlashScalingVar
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* 1 00000d00 00000000 UNINITIALIZED
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AnalogSubsysRegsFile
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* 1 0005d700 0000003e UNINITIALIZED
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0005d700 0000003e f2838x_globalvariabledefs.obj (AnalogSubsysRegsFile)
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ClkCfgRegsFile
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* 1 0005d200 0000003a UNINITIALIZED
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0005d200 0000003a f2838x_globalvariabledefs.obj (ClkCfgRegsFile)
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CpuSysRegsFile
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* 1 0005d300 0000009c UNINITIALIZED
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0005d300 0000009c f2838x_globalvariabledefs.obj (CpuSysRegsFile)
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Dcc0RegsFile
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* 1 0005e700 0000002c UNINITIALIZED
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0005e700 0000002c f2838x_globalvariabledefs.obj (Dcc0RegsFile)
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Dcc1RegsFile
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* 1 0005e740 0000002c UNINITIALIZED
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0005e740 0000002c f2838x_globalvariabledefs.obj (Dcc1RegsFile)
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Dcc2RegsFile
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* 1 0005e780 0000002c UNINITIALIZED
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0005e780 0000002c f2838x_globalvariabledefs.obj (Dcc2RegsFile)
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DevCfgRegsFile
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* 1 0005d000 000001a0 UNINITIALIZED
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0005d000 000001a0 f2838x_globalvariabledefs.obj (DevCfgRegsFile)
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GpioCtrlRegsFile
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* 1 00007c00 00000180 UNINITIALIZED
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00007c00 00000180 f2838x_globalvariabledefs.obj (GpioCtrlRegsFile)
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GpioDataRegsFile
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* 1 00007f00 00000030 UNINITIALIZED
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00007f00 00000030 f2838x_globalvariabledefs.obj (GpioDataRegsFile)
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I2caRegsFile
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* 1 00007300 00000022 UNINITIALIZED
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00007300 00000022 f2838x_globalvariabledefs.obj (I2caRegsFile)
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PieCtrlRegsFile
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* 1 00000ce0 0000001a UNINITIALIZED
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00000ce0 0000001a f2838x_globalvariabledefs.obj (PieCtrlRegsFile)
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WdRegsFile
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* 1 00007000 0000002b UNINITIALIZED
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00007000 0000002b f2838x_globalvariabledefs.obj (WdRegsFile)
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.text.1 0 00008000 0000059c
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00008000 0000000a f2838x_defaultisr.obj (.text:ECAP6_2_ISR)
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0000800a 0000000a f2838x_defaultisr.obj (.text:ECAP6_ISR)
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00008014 0000000a f2838x_defaultisr.obj (.text:ECAP7_2_ISR)
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0000801e 0000000a f2838x_defaultisr.obj (.text:ECAP7_ISR)
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00008028 0000000a f2838x_defaultisr.obj (.text:ECATRST_ISR)
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00008032 0000000a f2838x_defaultisr.obj (.text:ECATSYNC0_ISR)
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|
|
0000cf55 0000000a f2838x_defaultisr.obj (.text:CMTOCPUXIPC5_ISR)
|
|
0000cf5f 0000000a f2838x_defaultisr.obj (.text:CMTOCPUXIPC6_ISR)
|
|
0000cf69 0000000a f2838x_defaultisr.obj (.text:CMTOCPUXIPC7_ISR)
|
|
0000cf73 0000000a f2838x_defaultisr.obj (.text:CM_STATUS_ISR)
|
|
0000cf7d 0000000a f2838x_defaultisr.obj (.text:CPUCRC_ISR)
|
|
0000cf87 0000000a f2838x_defaultisr.obj (.text:DATALOG_ISR)
|
|
0000cf91 0000000a f2838x_defaultisr.obj (.text:DMA_CH1_ISR)
|
|
0000cf9b 0000000a f2838x_defaultisr.obj (.text:DMA_CH2_ISR)
|
|
0000cfa5 0000000a f2838x_defaultisr.obj (.text:DMA_CH3_ISR)
|
|
0000cfaf 0000000a f2838x_defaultisr.obj (.text:DMA_CH4_ISR)
|
|
0000cfb9 0000000a f2838x_defaultisr.obj (.text:DMA_CH5_ISR)
|
|
0000cfc3 0000000a f2838x_defaultisr.obj (.text:DMA_CH6_ISR)
|
|
0000cfcd 0000000a f2838x_defaultisr.obj (.text:ECAP1_ISR)
|
|
0000cfd7 0000000a f2838x_defaultisr.obj (.text:ECAP2_ISR)
|
|
0000cfe1 0000000a f2838x_defaultisr.obj (.text:ECAP3_ISR)
|
|
0000cfeb 0000000a f2838x_defaultisr.obj (.text:ECAP4_ISR)
|
|
0000cff5 0000000a f2838x_defaultisr.obj (.text:ECAP5_ISR)
|
|
0000cfff 00000001 rts2800_fpu64_eabi.lib : startup.c.obj (.text)
|
|
|
|
MODULE SUMMARY
|
|
|
|
Module code ro data rw data
|
|
------ ---- ------- -------
|
|
.\
|
|
f2838x_defaultisr.obj 2063 0 0
|
|
f2838x_globalvariabledefs.obj 0 0 1807
|
|
i2c_oled.obj 735 0 1060
|
|
f2838x_sysctrl.obj 1343 0 0
|
|
i2c_ex1_master.obj 97 832 0
|
|
f2838x_gpio.obj 612 0 0
|
|
f2838x_pievect.obj 38 448 0
|
|
f2838x_piectrl.obj 31 0 0
|
|
f2838x_codestartbranch.obj 10 0 0
|
|
f2838x_usdelay.obj 4 0 0
|
|
+--+-------------------------------+------+---------+---------+
|
|
Total: 4933 1280 2867
|
|
|
|
C:\ti\ccs1240\ccs\tools\compiler\ti-cgt-c2000_22.6.0.LTS\lib\rts2800_fpu64_eabi.lib
|
|
s_ceil.c.obj 216 0 0
|
|
fs_div28.asm.obj 136 0 0
|
|
exit.c.obj 41 0 6
|
|
copy_decompress_lzss.c.obj 46 0 0
|
|
autoinit.c.obj 43 0 0
|
|
memcpy.c.obj 29 0 0
|
|
boot28.asm.obj 25 0 0
|
|
ll_aox28.asm.obj 24 0 0
|
|
_lock.c.obj 9 0 4
|
|
args_main.c.obj 12 0 0
|
|
copy_decompress_none.c.obj 8 0 0
|
|
memset.c.obj 7 0 0
|
|
copy_zero_init.c.obj 6 0 0
|
|
pre_init.c.obj 2 0 0
|
|
startup.c.obj 1 0 0
|
|
+--+-------------------------------+------+---------+---------+
|
|
Total: 605 0 10
|
|
|
|
Stack: 0 0 256
|
|
Linker Generated: 0 34 0
|
|
+--+-------------------------------+------+---------+---------+
|
|
Grand Total: 5538 1314 3133
|
|
|
|
|
|
LINKER GENERATED COPY TABLES
|
|
|
|
__TI_cinit_table @ 000001d0 records: 3, size/record: 4, table size: 12
|
|
.data: load addr=000001b8, load size=00000008 bytes, run addr=0000ac24, run size=0000000a bytes, compression=lzss
|
|
.bss: load addr=000001c6, load size=00000004 bytes, run addr=0000a800, run size=00000424 bytes, compression=zero_init
|
|
PieVectTableFile: load addr=000001ca, load size=00000004 bytes, run addr=00000d00, run size=000001c0 bytes, compression=zero_init
|
|
|
|
|
|
LINKER GENERATED HANDLER TABLE
|
|
|
|
__TI_handler_table @ 000001c0 records: 3, size/record: 2, table size: 6
|
|
index: 0, handler: __TI_zero_init
|
|
index: 1, handler: __TI_decompress_lzss
|
|
index: 2, handler: __TI_decompress_none
|
|
|
|
|
|
GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE
|
|
|
|
address data page name
|
|
-------- ---------------- ----
|
|
00000400 10 (00000400) __stack
|
|
|
|
00000ce0 33 (00000cc0) PieCtrlRegs
|
|
|
|
00000d00 34 (00000d00) PieVectTable
|
|
|
|
00007000 1c0 (00007000) WdRegs
|
|
|
|
00007300 1cc (00007300) I2caRegs
|
|
|
|
00007c00 1f0 (00007c00) GpioCtrlRegs
|
|
|
|
00007f00 1fc (00007f00) GpioDataRegs
|
|
|
|
0000ac00 2b0 (0000ac00) I2C_RXdata
|
|
0000ac10 2b0 (0000ac00) I2C_TXdata
|
|
0000ac24 2b0 (0000ac00) __TI_enable_exit_profile_output
|
|
0000ac26 2b0 (0000ac00) __TI_cleanup_ptr
|
|
0000ac28 2b0 (0000ac00) __TI_dtors_ptr
|
|
0000ac2a 2b0 (0000ac00) _lock
|
|
0000ac2c 2b0 (0000ac00) _unlock
|
|
|
|
0000b340 2cd (0000b340) PieVectTableInit
|
|
|
|
0005d000 1740 (0005d000) DevCfgRegs
|
|
|
|
0005d200 1748 (0005d200) ClkCfgRegs
|
|
|
|
0005d300 174c (0005d300) CpuSysRegs
|
|
|
|
0005d700 175c (0005d700) AnalogSubsysRegs
|
|
|
|
0005e700 179c (0005e700) Dcc0Regs
|
|
|
|
0005e740 179d (0005e740) Dcc1Regs
|
|
|
|
0005e780 179e (0005e780) Dcc2Regs
|
|
|
|
|
|
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
|
|
|
|
page address name
|
|
---- ------- ----
|
|
0 0000cd43 ADCA1_ISR
|
|
0 0000cd4d ADCA2_ISR
|
|
0 0000cd57 ADCA3_ISR
|
|
0 0000cd61 ADCA4_ISR
|
|
0 0000cd6b ADCA_EVT_ISR
|
|
0 0000cd75 ADCB1_ISR
|
|
0 0000cd7f ADCB2_ISR
|
|
0 0000cd89 ADCB3_ISR
|
|
0 0000cd93 ADCB4_ISR
|
|
0 0000cd9d ADCB_EVT_ISR
|
|
0 0000cda7 ADCC1_ISR
|
|
0 0000cdb1 ADCC2_ISR
|
|
0 0000cdbb ADCC3_ISR
|
|
0 0000cdc5 ADCC4_ISR
|
|
0 0000cdcf ADCC_EVT_ISR
|
|
0 0000cdd9 ADCD1_ISR
|
|
0 0000cde3 ADCD2_ISR
|
|
0 0000cded ADCD3_ISR
|
|
0 0000cdf7 ADCD4_ISR
|
|
0 0000ce01 ADCD_EVT_ISR
|
|
1 0005d700 AnalogSubsysRegs
|
|
0 0000ce0b AuxAuxClkSel
|
|
0 0000856d AuxIntOsc2Sel
|
|
0 0000ccec AuxXtalOscSESel
|
|
0 0000ccfd AuxXtalOscSel
|
|
0 0000cb79 C$$EXIT
|
|
0 0000ce15 CANA0_ISR
|
|
0 0000ce1f CANA1_ISR
|
|
0 0000ce29 CANB0_ISR
|
|
0 0000ce33 CANB1_ISR
|
|
0 0000ce3d CIPC0_ISR
|
|
0 0000ce47 CIPC1_ISR
|
|
0 0000ce51 CIPC2_ISR
|
|
0 0000ce5b CIPC3_ISR
|
|
0 0000ce65 CLA1CRC_ISR
|
|
0 0000ce6f CLA1_1_ISR
|
|
0 0000ce79 CLA1_2_ISR
|
|
0 0000ce83 CLA1_3_ISR
|
|
0 0000ce8d CLA1_4_ISR
|
|
0 0000ce97 CLA1_5_ISR
|
|
0 0000cea1 CLA1_6_ISR
|
|
0 0000ceab CLA1_7_ISR
|
|
0 0000ceb5 CLA1_8_ISR
|
|
0 0000cebf CLA_OVERFLOW_ISR
|
|
0 0000cec9 CLA_UNDERFLOW_ISR
|
|
0 0000ced3 CLB1_ISR
|
|
0 0000cedd CLB2_ISR
|
|
0 0000cee7 CLB3_ISR
|
|
0 0000cef1 CLB4_ISR
|
|
0 0000cefb CLB5_ISR
|
|
0 0000cf05 CLB6_ISR
|
|
0 0000cf0f CLB7_ISR
|
|
0 0000cf19 CLB8_ISR
|
|
0 0000cf23 CMTOCPUXIPC0_ISR
|
|
0 0000cf2d CMTOCPUXIPC1_ISR
|
|
0 0000cf37 CMTOCPUXIPC2_ISR
|
|
0 0000cf41 CMTOCPUXIPC3_ISR
|
|
0 0000cf4b CMTOCPUXIPC4_ISR
|
|
0 0000cf55 CMTOCPUXIPC5_ISR
|
|
0 0000cf5f CMTOCPUXIPC6_ISR
|
|
0 0000cf69 CMTOCPUXIPC7_ISR
|
|
0 0000cf73 CM_STATUS_ISR
|
|
0 0000cf7d CPUCRC_ISR
|
|
1 0005d200 ClkCfgRegs
|
|
0 0000c800 ComputeCntrSeedValue
|
|
1 0005d300 CpuSysRegs
|
|
0 0000cf87 DATALOG_ISR
|
|
0 0000cf91 DMA_CH1_ISR
|
|
0 0000cf9b DMA_CH2_ISR
|
|
0 0000cfa5 DMA_CH3_ISR
|
|
0 0000cfaf DMA_CH4_ISR
|
|
0 0000cfb9 DMA_CH5_ISR
|
|
0 0000cfc3 DMA_CH6_ISR
|
|
1 0005e700 Dcc0Regs
|
|
1 0005e740 Dcc1Regs
|
|
1 0005e780 Dcc2Regs
|
|
1 0005d000 DevCfgRegs
|
|
0 0000cd0e DisableDog
|
|
0 0000cfcd ECAP1_ISR
|
|
0 0000cfd7 ECAP2_ISR
|
|
0 0000cfe1 ECAP3_ISR
|
|
0 0000cfeb ECAP4_ISR
|
|
0 0000cff5 ECAP5_ISR
|
|
0 00008000 ECAP6_2_ISR
|
|
0 0000800a ECAP6_ISR
|
|
0 00008014 ECAP7_2_ISR
|
|
0 0000801e ECAP7_ISR
|
|
0 00008028 ECATRST_ISR
|
|
0 00008032 ECATSYNC0_ISR
|
|
0 0000803c ECATSYNC1_ISR
|
|
0 00008046 ECAT_ISR
|
|
0 0000cd2a EMPTY_ISR
|
|
0 00008050 EMU_ISR
|
|
0 0000805a EPWM10_ISR
|
|
0 00008064 EPWM10_TZ_ISR
|
|
0 0000806e EPWM11_ISR
|
|
0 00008078 EPWM11_TZ_ISR
|
|
0 00008082 EPWM12_ISR
|
|
0 0000808c EPWM12_TZ_ISR
|
|
0 00008096 EPWM13_ISR
|
|
0 000080a0 EPWM13_TZ_ISR
|
|
0 000080aa EPWM14_ISR
|
|
0 000080b4 EPWM14_TZ_ISR
|
|
0 000080be EPWM15_ISR
|
|
0 000080c8 EPWM15_TZ_ISR
|
|
0 000080d2 EPWM16_ISR
|
|
0 000080dc EPWM16_TZ_ISR
|
|
0 000080e6 EPWM1_ISR
|
|
0 000080f0 EPWM1_TZ_ISR
|
|
0 000080fa EPWM2_ISR
|
|
0 00008104 EPWM2_TZ_ISR
|
|
0 0000810e EPWM3_ISR
|
|
0 00008118 EPWM3_TZ_ISR
|
|
0 00008122 EPWM4_ISR
|
|
0 0000812c EPWM4_TZ_ISR
|
|
0 00008136 EPWM5_ISR
|
|
0 00008140 EPWM5_TZ_ISR
|
|
0 0000814a EPWM6_ISR
|
|
0 00008154 EPWM6_TZ_ISR
|
|
0 0000815e EPWM7_ISR
|
|
0 00008168 EPWM7_TZ_ISR
|
|
0 00008172 EPWM8_ISR
|
|
0 0000817c EPWM8_TZ_ISR
|
|
0 00008186 EPWM9_ISR
|
|
0 00008190 EPWM9_TZ_ISR
|
|
0 0000819a EQEP1_ISR
|
|
0 000081a4 EQEP2_ISR
|
|
0 000081ae EQEP3_ISR
|
|
0 000001b1 F28x_usDelay
|
|
0 000081b8 FMC_ISR
|
|
0 000081c2 FPU_OFLOW_ISR
|
|
0 000081cc FPU_UFLOW_ISR
|
|
0 000081d6 FSIRXA1_ISR
|
|
0 000081e0 FSIRXA2_ISR
|
|
0 000081ea FSIRXB1_ISR
|
|
0 000081f4 FSIRXB2_ISR
|
|
0 000081fe FSIRXC1_ISR
|
|
0 00008208 FSIRXC2_ISR
|
|
0 00008212 FSIRXD1_ISR
|
|
0 0000821c FSIRXD2_ISR
|
|
0 00008226 FSIRXE1_ISR
|
|
0 00008230 FSIRXE2_ISR
|
|
0 0000823a FSIRXF1_ISR
|
|
0 00008244 FSIRXF2_ISR
|
|
0 0000824e FSIRXG1_ISR
|
|
0 00008258 FSIRXG2_ISR
|
|
0 00008262 FSIRXH1_ISR
|
|
0 0000826c FSIRXH2_ISR
|
|
0 00008276 FSITXA1_ISR
|
|
0 00008280 FSITXA2_ISR
|
|
0 0000828a FSITXB1_ISR
|
|
0 00008294 FSITXB2_ISR
|
|
0 0000cd1c GPIO_EnableUnbondedIOPullups
|
|
0 0000cc8c GPIO_EnableUnbondedIOPullupsFor176Pin
|
|
0 0000c14f GPIO_SetupPinMux
|
|
0 0000c24e GPIO_SetupPinOptions
|
|
1 00007c00 GpioCtrlRegs
|
|
1 00007f00 GpioDataRegs
|
|
0 0000829e I2CA_FIFO_ISR
|
|
0 000082a8 I2CA_HIGH_ISR
|
|
0 000082b2 I2CA_ISR
|
|
0 000082bc I2CB_FIFO_ISR
|
|
0 000082c6 I2CB_ISR
|
|
0 0000cbee I2CMaster_Init
|
|
0 0000c7c3 I2CWrite
|
|
0 0000ac00 I2C_RXdata
|
|
0 0000ac10 I2C_TXdata
|
|
1 00007300 I2caRegs
|
|
0 000082d0 ILLEGAL_ISR
|
|
0 0000c717 InitAuxPll
|
|
0 0000ca8b InitGpio
|
|
0 0000c665 InitPeripheralClocks
|
|
0 0000cc35 InitPieCtrl
|
|
0 0000cba2 InitPieVectTable
|
|
0 0000ca39 InitSysCtrl
|
|
0 0000c33b InitSysPll
|
|
0 0000c5b0 IsPLLValid
|
|
0 000082da MCANA_0_ISR
|
|
0 000082e4 MCANA_1_ISR
|
|
0 000082ee MCANA_ECC_ISR
|
|
0 000082f8 MCANA_WAKE_ISR
|
|
0 00008302 MCBSPA_RX_ISR
|
|
0 0000830c MCBSPA_TX_ISR
|
|
0 00008316 MCBSPB_RX_ISR
|
|
0 00008320 MCBSPB_TX_ISR
|
|
0 0000832a MPOST_ISR
|
|
0 00008334 NMI_ISR
|
|
0 0000833e NOTUSED_ISR
|
|
0 00008348 PIE_RESERVED_ISR
|
|
0 00008352 PMBUSA_ISR
|
|
1 00000ce0 PieCtrlRegs
|
|
1 00000d00 PieVectTable
|
|
0 0000b340 PieVectTableInit
|
|
0 0000835c RTOS_ISR
|
|
0 00008366 SCIA_RX_ISR
|
|
0 00008370 SCIA_TX_ISR
|
|
0 0000837a SCIB_RX_ISR
|
|
0 00008384 SCIB_TX_ISR
|
|
0 0000838e SCIC_RX_ISR
|
|
0 00008398 SCIC_TX_ISR
|
|
0 000083a2 SCID_RX_ISR
|
|
0 000083ac SCID_TX_ISR
|
|
0 000083b6 SDFM1DR1_ISR
|
|
0 000083c0 SDFM1DR2_ISR
|
|
0 000083ca SDFM1DR3_ISR
|
|
0 000083d4 SDFM1DR4_ISR
|
|
0 000083de SDFM1_ISR
|
|
0 000083e8 SDFM2DR1_ISR
|
|
0 000083f2 SDFM2DR2_ISR
|
|
0 000083fc SDFM2DR3_ISR
|
|
0 00008406 SDFM2DR4_ISR
|
|
0 00008410 SDFM2_ISR
|
|
0 0000841a SPIA_RX_ISR
|
|
0 00008424 SPIA_TX_ISR
|
|
0 0000842e SPIB_RX_ISR
|
|
0 00008438 SPIB_TX_ISR
|
|
0 00008442 SPIC_RX_ISR
|
|
0 0000844c SPIC_TX_ISR
|
|
0 00008456 SPID_RX_ISR
|
|
0 00008460 SPID_TX_ISR
|
|
0 0000c9df SSD1306_DrawPixel
|
|
0 0000c7f1 SSD1306_Fill
|
|
0 0000846a SSD1306_GotoXY
|
|
0 0000c000 SSD1306_Init
|
|
0 0000cadc SSD1306_UpdateScreen
|
|
0 0000cbc8 SSD1306_setPosition
|
|
0 00008474 SYS_ERR_ISR
|
|
0 0000847e SysIntOsc1Sel
|
|
0 00008575 SysIntOsc2Sel
|
|
0 0000ccd6 SysXtalOscSESel
|
|
0 0000cc12 SysXtalOscSel
|
|
0 00008488 TIMER0_ISR
|
|
0 00008492 TIMER1_ISR
|
|
0 0000849c TIMER2_ISR
|
|
0 000084a6 USBA_ISR
|
|
0 000084b0 USER10_ISR
|
|
0 000084ba USER11_ISR
|
|
0 000084c4 USER12_ISR
|
|
0 000084ce USER1_ISR
|
|
0 000084d8 USER2_ISR
|
|
0 000084e2 USER3_ISR
|
|
0 000084ec USER4_ISR
|
|
0 000084f6 USER5_ISR
|
|
0 00008500 USER6_ISR
|
|
0 0000850a USER7_ISR
|
|
0 00008514 USER8_ISR
|
|
0 0000851e USER9_ISR
|
|
0 0000c4f9 VerifyXTAL
|
|
0 00008528 WAKE_ISR
|
|
1 00007000 WdRegs
|
|
0 00008532 XINT1_ISR
|
|
0 0000853c XINT2_ISR
|
|
0 00008546 XINT3_ISR
|
|
0 00008550 XINT4_ISR
|
|
0 0000855a XINT5_ISR
|
|
0 000001d0 __TI_CINIT_Base
|
|
0 000001dc __TI_CINIT_Limit
|
|
0 000001dc __TI_CINIT_Warm
|
|
0 000001c0 __TI_Handler_Table_Base
|
|
0 000001c6 __TI_Handler_Table_Limit
|
|
0 00000500 __TI_STACK_END
|
|
abs 00000100 __TI_STACK_SIZE
|
|
0 0000cb4e __TI_auto_init_nobinit_nopinit
|
|
0 0000ac26 __TI_cleanup_ptr
|
|
0 0000cb20 __TI_decompress_lzss
|
|
0 0000857d __TI_decompress_none
|
|
0 0000ac28 __TI_dtors_ptr
|
|
0 0000ac24 __TI_enable_exit_profile_output
|
|
abs ffffffff __TI_pprof_out_hndl
|
|
abs ffffffff __TI_prof_data_size
|
|
abs ffffffff __TI_prof_data_start
|
|
0 00008594 __TI_zero_init
|
|
0 0000ccbe __c28xabi_andll
|
|
0 0000c895 __c28xabi_divf
|
|
0 0000ccc6 __c28xabi_orll
|
|
0 0000ccce __c28xabi_xorll
|
|
n/a UNDEFED __c_args__
|
|
0 00000400 __stack
|
|
0 0000cd37 _args_main
|
|
0 0000cca5 _c_int00
|
|
0 0000ac2a _lock
|
|
0 0000856c _nop
|
|
0 00008568 _register_lock
|
|
0 00008564 _register_unlock
|
|
0 0000cfff _system_post_cinit
|
|
0 0000859a _system_pre_init
|
|
0 0000ac2c _unlock
|
|
0 0000cb79 abort
|
|
0 0000c421 ceil
|
|
0 0000c421 ceill
|
|
0 00000000 code_start
|
|
0 0000cb7b exit
|
|
0 0000c91d main
|
|
0 0000cc54 memcpy
|
|
0 0000858d memset
|
|
0 0000c97e ssd1306_DrawBitmap
|
|
|
|
|
|
GLOBAL SYMBOLS: SORTED BY Symbol Address
|
|
|
|
page address name
|
|
---- ------- ----
|
|
0 00000000 code_start
|
|
0 000001b1 F28x_usDelay
|
|
0 000001c0 __TI_Handler_Table_Base
|
|
0 000001c6 __TI_Handler_Table_Limit
|
|
0 000001d0 __TI_CINIT_Base
|
|
0 000001dc __TI_CINIT_Limit
|
|
0 000001dc __TI_CINIT_Warm
|
|
0 00000400 __stack
|
|
0 00000500 __TI_STACK_END
|
|
0 00008000 ECAP6_2_ISR
|
|
0 0000800a ECAP6_ISR
|
|
0 00008014 ECAP7_2_ISR
|
|
0 0000801e ECAP7_ISR
|
|
0 00008028 ECATRST_ISR
|
|
0 00008032 ECATSYNC0_ISR
|
|
0 0000803c ECATSYNC1_ISR
|
|
0 00008046 ECAT_ISR
|
|
0 00008050 EMU_ISR
|
|
0 0000805a EPWM10_ISR
|
|
0 00008064 EPWM10_TZ_ISR
|
|
0 0000806e EPWM11_ISR
|
|
0 00008078 EPWM11_TZ_ISR
|
|
0 00008082 EPWM12_ISR
|
|
0 0000808c EPWM12_TZ_ISR
|
|
0 00008096 EPWM13_ISR
|
|
0 000080a0 EPWM13_TZ_ISR
|
|
0 000080aa EPWM14_ISR
|
|
0 000080b4 EPWM14_TZ_ISR
|
|
0 000080be EPWM15_ISR
|
|
0 000080c8 EPWM15_TZ_ISR
|
|
0 000080d2 EPWM16_ISR
|
|
0 000080dc EPWM16_TZ_ISR
|
|
0 000080e6 EPWM1_ISR
|
|
0 000080f0 EPWM1_TZ_ISR
|
|
0 000080fa EPWM2_ISR
|
|
0 00008104 EPWM2_TZ_ISR
|
|
0 0000810e EPWM3_ISR
|
|
0 00008118 EPWM3_TZ_ISR
|
|
0 00008122 EPWM4_ISR
|
|
0 0000812c EPWM4_TZ_ISR
|
|
0 00008136 EPWM5_ISR
|
|
0 00008140 EPWM5_TZ_ISR
|
|
0 0000814a EPWM6_ISR
|
|
0 00008154 EPWM6_TZ_ISR
|
|
0 0000815e EPWM7_ISR
|
|
0 00008168 EPWM7_TZ_ISR
|
|
0 00008172 EPWM8_ISR
|
|
0 0000817c EPWM8_TZ_ISR
|
|
0 00008186 EPWM9_ISR
|
|
0 00008190 EPWM9_TZ_ISR
|
|
0 0000819a EQEP1_ISR
|
|
0 000081a4 EQEP2_ISR
|
|
0 000081ae EQEP3_ISR
|
|
0 000081b8 FMC_ISR
|
|
0 000081c2 FPU_OFLOW_ISR
|
|
0 000081cc FPU_UFLOW_ISR
|
|
0 000081d6 FSIRXA1_ISR
|
|
0 000081e0 FSIRXA2_ISR
|
|
0 000081ea FSIRXB1_ISR
|
|
0 000081f4 FSIRXB2_ISR
|
|
0 000081fe FSIRXC1_ISR
|
|
0 00008208 FSIRXC2_ISR
|
|
0 00008212 FSIRXD1_ISR
|
|
0 0000821c FSIRXD2_ISR
|
|
0 00008226 FSIRXE1_ISR
|
|
0 00008230 FSIRXE2_ISR
|
|
0 0000823a FSIRXF1_ISR
|
|
0 00008244 FSIRXF2_ISR
|
|
0 0000824e FSIRXG1_ISR
|
|
0 00008258 FSIRXG2_ISR
|
|
0 00008262 FSIRXH1_ISR
|
|
0 0000826c FSIRXH2_ISR
|
|
0 00008276 FSITXA1_ISR
|
|
0 00008280 FSITXA2_ISR
|
|
0 0000828a FSITXB1_ISR
|
|
0 00008294 FSITXB2_ISR
|
|
0 0000829e I2CA_FIFO_ISR
|
|
0 000082a8 I2CA_HIGH_ISR
|
|
0 000082b2 I2CA_ISR
|
|
0 000082bc I2CB_FIFO_ISR
|
|
0 000082c6 I2CB_ISR
|
|
0 000082d0 ILLEGAL_ISR
|
|
0 000082da MCANA_0_ISR
|
|
0 000082e4 MCANA_1_ISR
|
|
0 000082ee MCANA_ECC_ISR
|
|
0 000082f8 MCANA_WAKE_ISR
|
|
0 00008302 MCBSPA_RX_ISR
|
|
0 0000830c MCBSPA_TX_ISR
|
|
0 00008316 MCBSPB_RX_ISR
|
|
0 00008320 MCBSPB_TX_ISR
|
|
0 0000832a MPOST_ISR
|
|
0 00008334 NMI_ISR
|
|
0 0000833e NOTUSED_ISR
|
|
0 00008348 PIE_RESERVED_ISR
|
|
0 00008352 PMBUSA_ISR
|
|
0 0000835c RTOS_ISR
|
|
0 00008366 SCIA_RX_ISR
|
|
0 00008370 SCIA_TX_ISR
|
|
0 0000837a SCIB_RX_ISR
|
|
0 00008384 SCIB_TX_ISR
|
|
0 0000838e SCIC_RX_ISR
|
|
0 00008398 SCIC_TX_ISR
|
|
0 000083a2 SCID_RX_ISR
|
|
0 000083ac SCID_TX_ISR
|
|
0 000083b6 SDFM1DR1_ISR
|
|
0 000083c0 SDFM1DR2_ISR
|
|
0 000083ca SDFM1DR3_ISR
|
|
0 000083d4 SDFM1DR4_ISR
|
|
0 000083de SDFM1_ISR
|
|
0 000083e8 SDFM2DR1_ISR
|
|
0 000083f2 SDFM2DR2_ISR
|
|
0 000083fc SDFM2DR3_ISR
|
|
0 00008406 SDFM2DR4_ISR
|
|
0 00008410 SDFM2_ISR
|
|
0 0000841a SPIA_RX_ISR
|
|
0 00008424 SPIA_TX_ISR
|
|
0 0000842e SPIB_RX_ISR
|
|
0 00008438 SPIB_TX_ISR
|
|
0 00008442 SPIC_RX_ISR
|
|
0 0000844c SPIC_TX_ISR
|
|
0 00008456 SPID_RX_ISR
|
|
0 00008460 SPID_TX_ISR
|
|
0 0000846a SSD1306_GotoXY
|
|
0 00008474 SYS_ERR_ISR
|
|
0 0000847e SysIntOsc1Sel
|
|
0 00008488 TIMER0_ISR
|
|
0 00008492 TIMER1_ISR
|
|
0 0000849c TIMER2_ISR
|
|
0 000084a6 USBA_ISR
|
|
0 000084b0 USER10_ISR
|
|
0 000084ba USER11_ISR
|
|
0 000084c4 USER12_ISR
|
|
0 000084ce USER1_ISR
|
|
0 000084d8 USER2_ISR
|
|
0 000084e2 USER3_ISR
|
|
0 000084ec USER4_ISR
|
|
0 000084f6 USER5_ISR
|
|
0 00008500 USER6_ISR
|
|
0 0000850a USER7_ISR
|
|
0 00008514 USER8_ISR
|
|
0 0000851e USER9_ISR
|
|
0 00008528 WAKE_ISR
|
|
0 00008532 XINT1_ISR
|
|
0 0000853c XINT2_ISR
|
|
0 00008546 XINT3_ISR
|
|
0 00008550 XINT4_ISR
|
|
0 0000855a XINT5_ISR
|
|
0 00008564 _register_unlock
|
|
0 00008568 _register_lock
|
|
0 0000856c _nop
|
|
0 0000856d AuxIntOsc2Sel
|
|
0 00008575 SysIntOsc2Sel
|
|
0 0000857d __TI_decompress_none
|
|
0 0000858d memset
|
|
0 00008594 __TI_zero_init
|
|
0 0000859a _system_pre_init
|
|
0 0000ac00 I2C_RXdata
|
|
0 0000ac10 I2C_TXdata
|
|
0 0000ac24 __TI_enable_exit_profile_output
|
|
0 0000ac26 __TI_cleanup_ptr
|
|
0 0000ac28 __TI_dtors_ptr
|
|
0 0000ac2a _lock
|
|
0 0000ac2c _unlock
|
|
0 0000b340 PieVectTableInit
|
|
0 0000c000 SSD1306_Init
|
|
0 0000c14f GPIO_SetupPinMux
|
|
0 0000c24e GPIO_SetupPinOptions
|
|
0 0000c33b InitSysPll
|
|
0 0000c421 ceil
|
|
0 0000c421 ceill
|
|
0 0000c4f9 VerifyXTAL
|
|
0 0000c5b0 IsPLLValid
|
|
0 0000c665 InitPeripheralClocks
|
|
0 0000c717 InitAuxPll
|
|
0 0000c7c3 I2CWrite
|
|
0 0000c7f1 SSD1306_Fill
|
|
0 0000c800 ComputeCntrSeedValue
|
|
0 0000c895 __c28xabi_divf
|
|
0 0000c91d main
|
|
0 0000c97e ssd1306_DrawBitmap
|
|
0 0000c9df SSD1306_DrawPixel
|
|
0 0000ca39 InitSysCtrl
|
|
0 0000ca8b InitGpio
|
|
0 0000cadc SSD1306_UpdateScreen
|
|
0 0000cb20 __TI_decompress_lzss
|
|
0 0000cb4e __TI_auto_init_nobinit_nopinit
|
|
0 0000cb79 C$$EXIT
|
|
0 0000cb79 abort
|
|
0 0000cb7b exit
|
|
0 0000cba2 InitPieVectTable
|
|
0 0000cbc8 SSD1306_setPosition
|
|
0 0000cbee I2CMaster_Init
|
|
0 0000cc12 SysXtalOscSel
|
|
0 0000cc35 InitPieCtrl
|
|
0 0000cc54 memcpy
|
|
0 0000cc8c GPIO_EnableUnbondedIOPullupsFor176Pin
|
|
0 0000cca5 _c_int00
|
|
0 0000ccbe __c28xabi_andll
|
|
0 0000ccc6 __c28xabi_orll
|
|
0 0000ccce __c28xabi_xorll
|
|
0 0000ccd6 SysXtalOscSESel
|
|
0 0000ccec AuxXtalOscSESel
|
|
0 0000ccfd AuxXtalOscSel
|
|
0 0000cd0e DisableDog
|
|
0 0000cd1c GPIO_EnableUnbondedIOPullups
|
|
0 0000cd2a EMPTY_ISR
|
|
0 0000cd37 _args_main
|
|
0 0000cd43 ADCA1_ISR
|
|
0 0000cd4d ADCA2_ISR
|
|
0 0000cd57 ADCA3_ISR
|
|
0 0000cd61 ADCA4_ISR
|
|
0 0000cd6b ADCA_EVT_ISR
|
|
0 0000cd75 ADCB1_ISR
|
|
0 0000cd7f ADCB2_ISR
|
|
0 0000cd89 ADCB3_ISR
|
|
0 0000cd93 ADCB4_ISR
|
|
0 0000cd9d ADCB_EVT_ISR
|
|
0 0000cda7 ADCC1_ISR
|
|
0 0000cdb1 ADCC2_ISR
|
|
0 0000cdbb ADCC3_ISR
|
|
0 0000cdc5 ADCC4_ISR
|
|
0 0000cdcf ADCC_EVT_ISR
|
|
0 0000cdd9 ADCD1_ISR
|
|
0 0000cde3 ADCD2_ISR
|
|
0 0000cded ADCD3_ISR
|
|
0 0000cdf7 ADCD4_ISR
|
|
0 0000ce01 ADCD_EVT_ISR
|
|
0 0000ce0b AuxAuxClkSel
|
|
0 0000ce15 CANA0_ISR
|
|
0 0000ce1f CANA1_ISR
|
|
0 0000ce29 CANB0_ISR
|
|
0 0000ce33 CANB1_ISR
|
|
0 0000ce3d CIPC0_ISR
|
|
0 0000ce47 CIPC1_ISR
|
|
0 0000ce51 CIPC2_ISR
|
|
0 0000ce5b CIPC3_ISR
|
|
0 0000ce65 CLA1CRC_ISR
|
|
0 0000ce6f CLA1_1_ISR
|
|
0 0000ce79 CLA1_2_ISR
|
|
0 0000ce83 CLA1_3_ISR
|
|
0 0000ce8d CLA1_4_ISR
|
|
0 0000ce97 CLA1_5_ISR
|
|
0 0000cea1 CLA1_6_ISR
|
|
0 0000ceab CLA1_7_ISR
|
|
0 0000ceb5 CLA1_8_ISR
|
|
0 0000cebf CLA_OVERFLOW_ISR
|
|
0 0000cec9 CLA_UNDERFLOW_ISR
|
|
0 0000ced3 CLB1_ISR
|
|
0 0000cedd CLB2_ISR
|
|
0 0000cee7 CLB3_ISR
|
|
0 0000cef1 CLB4_ISR
|
|
0 0000cefb CLB5_ISR
|
|
0 0000cf05 CLB6_ISR
|
|
0 0000cf0f CLB7_ISR
|
|
0 0000cf19 CLB8_ISR
|
|
0 0000cf23 CMTOCPUXIPC0_ISR
|
|
0 0000cf2d CMTOCPUXIPC1_ISR
|
|
0 0000cf37 CMTOCPUXIPC2_ISR
|
|
0 0000cf41 CMTOCPUXIPC3_ISR
|
|
0 0000cf4b CMTOCPUXIPC4_ISR
|
|
0 0000cf55 CMTOCPUXIPC5_ISR
|
|
0 0000cf5f CMTOCPUXIPC6_ISR
|
|
0 0000cf69 CMTOCPUXIPC7_ISR
|
|
0 0000cf73 CM_STATUS_ISR
|
|
0 0000cf7d CPUCRC_ISR
|
|
0 0000cf87 DATALOG_ISR
|
|
0 0000cf91 DMA_CH1_ISR
|
|
0 0000cf9b DMA_CH2_ISR
|
|
0 0000cfa5 DMA_CH3_ISR
|
|
0 0000cfaf DMA_CH4_ISR
|
|
0 0000cfb9 DMA_CH5_ISR
|
|
0 0000cfc3 DMA_CH6_ISR
|
|
0 0000cfcd ECAP1_ISR
|
|
0 0000cfd7 ECAP2_ISR
|
|
0 0000cfe1 ECAP3_ISR
|
|
0 0000cfeb ECAP4_ISR
|
|
0 0000cff5 ECAP5_ISR
|
|
0 0000cfff _system_post_cinit
|
|
1 00000ce0 PieCtrlRegs
|
|
1 00000d00 PieVectTable
|
|
1 00007000 WdRegs
|
|
1 00007300 I2caRegs
|
|
1 00007c00 GpioCtrlRegs
|
|
1 00007f00 GpioDataRegs
|
|
1 0005d000 DevCfgRegs
|
|
1 0005d200 ClkCfgRegs
|
|
1 0005d300 CpuSysRegs
|
|
1 0005d700 AnalogSubsysRegs
|
|
1 0005e700 Dcc0Regs
|
|
1 0005e740 Dcc1Regs
|
|
1 0005e780 Dcc2Regs
|
|
abs 00000100 __TI_STACK_SIZE
|
|
abs ffffffff __TI_pprof_out_hndl
|
|
abs ffffffff __TI_prof_data_size
|
|
abs ffffffff __TI_prof_data_start
|
|
n/a UNDEFED __c_args__
|
|
|
|
[296 symbols]
|