233 lines
7.7 KiB
C
233 lines
7.7 KiB
C
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//###########################################################################
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//
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// FILE: Example_2833xECap_apwm.c
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//
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// TITLE: eCAP APWM Example
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//
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//! \addtogroup f2833x_example_list
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//! <h1>eCAP APWM (ecap_epwm)</h1>
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//!
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//! This program sets up eCAP pins in the APWM mode.
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//! This program runs at 150 MHz SYSCLKOUT assuming a 30 MHz
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//! XCLKIN or 100 MHz SYSCLKOUT assuming a 20 MHz XCLKIN. \n
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//! For 150 MHz devices: \n
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//! - eCAP1 will come out on the GPIO24 pin.
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//! This pin is configured to vary between 7.5 Hz and 15 Hz using
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//! the shadow registers to load the next period/compare values. \n
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//! - eCAP2 will come out on the GPIO7 pin.
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//! This pin is configured as a 7.5 Hz output. \n
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//! - eCAP3 will come out on the GPIO9 pin.
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//! This pin is configured as a 1.5 Hz output. \n
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//! - eCAP4 will come out on the GPIO11 pin.
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//! This pin is configured as a 30 kHz output. \n
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//! - All frequencies assume a 30 Mhz input clock. The XCLKOUT pin
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//! should show 150Mhz. \n
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//!
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//! For 100 MHz devices: \n
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//! - eCAP1 will come out on the GPIO24 pin.
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//! This pin is configured to vary between 5 Hz and 10 Hz using
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//! the shadow registers to load the next period/compare values. \n
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//! - eCAP2 will come out on the GPIO7 pin.
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//! This pin is configured as a 5 Hz output. \n
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//! - eCAP3 will come out on the GPIO9 pin.
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//! This pin is configured as a 1 Hz output. \n
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//! - eCAP4 will come out on the GPIO11 pin.
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//! This pin is configured as a 20kHz output. \n
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//! - All frequencies assume a 20 Mhz input clock. The XCLKOUT pin
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//! should show 100Mhz.
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//
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//
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//###########################################################################
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// $TI Release: $
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// $Release Date: $
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// $Copyright:
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// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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//
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// Included Files
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//
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#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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//
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// Globals
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//
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Uint16 direction = 0;
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//
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// Main
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//
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void main(void)
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{
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//
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// Step 1. Initialize System Control:
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// PLL, WatchDog, enable Peripheral Clocks
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// This example function is found in the DSP2833x_SysCtrl.c file.
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//
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InitSysCtrl();
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//
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// Step 2. Initialize GPIO:
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// This example function is found in the DSP2833x_Gpio.c file and
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// illustrates how to set the GPIO to it's default state.
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//
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// InitGpio(); // Skipped for this example
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//
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// Initialize the GPIO pins for eCAP.
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// This function is found in the DSP2833x_ECap.c file
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//
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InitECapGpio();
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//
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// Step 3. Clear all interrupts and initialize PIE vector table:
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// Disable CPU interrupts
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//
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DINT;
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//
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// Initialize the PIE control registers to their default state.
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// The default state is all PIE interrupts disabled and flags
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// are cleared.
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// This function is found in the DSP2833x_PieCtrl.c file.
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//
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InitPieCtrl();
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//
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// Disable CPU interrupts and clear all CPU interrupt flags
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//
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IER = 0x0000;
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IFR = 0x0000;
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//
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// Initialize the PIE vector table with pointers to the shell Interrupt
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// Service Routines (ISR).
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// This will populate the entire table, even if the interrupt
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// is not used in this example. This is useful for debug purposes.
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// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
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// This function is found in DSP2833x_PieVect.c.
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//
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InitPieVectTable();
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//
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// Interrupts that are used in this example are re-mapped to
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// ISR functions found within this file.
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// No interrupts used for this example.
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//
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//
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// Step 4. Initialize all the Device Peripherals:
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// This function is found in DSP2833x_InitPeripherals.c
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//
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// InitPeripherals(); // Not required for this example
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//
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// Step 5. User specific code
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// Setup APWM mode on CAP1, set period and compare registers
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//
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ECap1Regs.ECCTL2.bit.CAP_APWM = 1; // Enable APWM mode
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ECap1Regs.CAP1 = 0x01312D00; // Set Period value
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ECap1Regs.CAP2 = 0x00989680; // Set Compare value
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ECap1Regs.ECCLR.all = 0x0FF; // Clear pending interrupts
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ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1; // enable Compare Equal Int
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//
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// Setup APWM mode on CAP2, set period and compare registers
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//
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ECap2Regs.ECCTL2.bit.CAP_APWM = 1; // Enable APWM mode
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ECap2Regs.CAP1 = 0x01312D00; // Set Period value
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ECap2Regs.CAP2 = 0x00989680; // Set Compare value
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ECap2Regs.ECCLR.all = 0x0FF; // Clear pending interrupts
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ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1; // enable Compare Equal Int
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//
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// Setup APWM mode on CAP3, set period and compare registers
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//
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ECap3Regs.ECCTL2.bit.CAP_APWM = 1; // Enable APWM mode
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ECap3Regs.CAP1 = 0x05F5E100; // Set Period value
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ECap3Regs.CAP2 = 0x02FAF080; // Set Compare value
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ECap3Regs.ECCLR.all = 0x0FF; // Clear pending interrupts
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ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1; // enable Compare Equal Int
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//
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// Setup APWM mode on CAP4, set period and compare registers
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//
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ECap4Regs.ECCTL2.bit.CAP_APWM = 1; // Enable APWM mode
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ECap4Regs.CAP1 = 0x00001388; // Set Period value
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ECap4Regs.CAP2 = 0x000009C4; // Set Compare value
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ECap4Regs.ECCLR.all = 0x0FF; // Clear pending interrupts
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ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1; // enable Compare Equal Int
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//
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// Start counters
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//
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ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1;
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ECap2Regs.ECCTL2.bit.TSCTRSTOP = 1;
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ECap3Regs.ECCTL2.bit.TSCTRSTOP = 1;
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ECap4Regs.ECCTL2.bit.TSCTRSTOP = 1;
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for(;;)
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{
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//
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// set next duty cycle to 50%
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//
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ECap1Regs.CAP4 = ECap1Regs.CAP1 >> 1;
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//
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// vary freq between 7.5 Hz and 15 Hz (for 150MHz SYSCLKOUT)
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// 5 Hz and 10 Hz (for 100 MHz SYSCLKOUT)
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//
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if(ECap1Regs.CAP1 >= 0x01312D00)
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{
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direction = 0;
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}
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else if (ECap1Regs.CAP1 <= 0x00989680)
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{
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direction = 1;
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}
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if(direction == 0)
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{
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ECap1Regs.CAP3 = ECap1Regs.CAP1 - 500000;
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}
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else
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{
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ECap1Regs.CAP3 = ECap1Regs.CAP1 + 500000;
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}
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}
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}
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//
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// End of File
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//
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